xref: /linux/drivers/net/wireless/intel/iwlwifi/mvm/rs.h (revision e705c12146aa9c69ca498d4ebb83ba7138f9b41f)
1*e705c121SKalle Valo /******************************************************************************
2*e705c121SKalle Valo  *
3*e705c121SKalle Valo  * Copyright(c) 2003 - 2014 Intel Corporation. All rights reserved.
4*e705c121SKalle Valo  * Copyright(c) 2015 Intel Mobile Communications GmbH
5*e705c121SKalle Valo  *
6*e705c121SKalle Valo  * This program is free software; you can redistribute it and/or modify it
7*e705c121SKalle Valo  * under the terms of version 2 of the GNU General Public License as
8*e705c121SKalle Valo  * published by the Free Software Foundation.
9*e705c121SKalle Valo  *
10*e705c121SKalle Valo  * This program is distributed in the hope that it will be useful, but WITHOUT
11*e705c121SKalle Valo  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12*e705c121SKalle Valo  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13*e705c121SKalle Valo  * more details.
14*e705c121SKalle Valo  *
15*e705c121SKalle Valo  * You should have received a copy of the GNU General Public License along with
16*e705c121SKalle Valo  * this program; if not, write to the Free Software Foundation, Inc.,
17*e705c121SKalle Valo  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
18*e705c121SKalle Valo  *
19*e705c121SKalle Valo  * The full GNU General Public License is included in this distribution in the
20*e705c121SKalle Valo  * file called LICENSE.
21*e705c121SKalle Valo  *
22*e705c121SKalle Valo  * Contact Information:
23*e705c121SKalle Valo  *  Intel Linux Wireless <ilw@linux.intel.com>
24*e705c121SKalle Valo  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25*e705c121SKalle Valo  *
26*e705c121SKalle Valo  *****************************************************************************/
27*e705c121SKalle Valo 
28*e705c121SKalle Valo #ifndef __rs_h__
29*e705c121SKalle Valo #define __rs_h__
30*e705c121SKalle Valo 
31*e705c121SKalle Valo #include <net/mac80211.h>
32*e705c121SKalle Valo 
33*e705c121SKalle Valo #include "iwl-config.h"
34*e705c121SKalle Valo 
35*e705c121SKalle Valo #include "fw-api.h"
36*e705c121SKalle Valo #include "iwl-trans.h"
37*e705c121SKalle Valo 
38*e705c121SKalle Valo struct iwl_rs_rate_info {
39*e705c121SKalle Valo 	u8 plcp;	  /* uCode API:  IWL_RATE_6M_PLCP, etc. */
40*e705c121SKalle Valo 	u8 plcp_ht_siso;  /* uCode API:  IWL_RATE_SISO_6M_PLCP, etc. */
41*e705c121SKalle Valo 	u8 plcp_ht_mimo2; /* uCode API:  IWL_RATE_MIMO2_6M_PLCP, etc. */
42*e705c121SKalle Valo 	u8 plcp_vht_siso;
43*e705c121SKalle Valo 	u8 plcp_vht_mimo2;
44*e705c121SKalle Valo 	u8 prev_rs;      /* previous rate used in rs algo */
45*e705c121SKalle Valo 	u8 next_rs;      /* next rate used in rs algo */
46*e705c121SKalle Valo };
47*e705c121SKalle Valo 
48*e705c121SKalle Valo #define IWL_RATE_60M_PLCP 3
49*e705c121SKalle Valo 
50*e705c121SKalle Valo enum {
51*e705c121SKalle Valo 	IWL_RATE_INVM_INDEX = IWL_RATE_COUNT,
52*e705c121SKalle Valo 	IWL_RATE_INVALID = IWL_RATE_COUNT,
53*e705c121SKalle Valo };
54*e705c121SKalle Valo 
55*e705c121SKalle Valo #define LINK_QUAL_MAX_RETRY_NUM 16
56*e705c121SKalle Valo 
57*e705c121SKalle Valo enum {
58*e705c121SKalle Valo 	IWL_RATE_6M_INDEX_TABLE = 0,
59*e705c121SKalle Valo 	IWL_RATE_9M_INDEX_TABLE,
60*e705c121SKalle Valo 	IWL_RATE_12M_INDEX_TABLE,
61*e705c121SKalle Valo 	IWL_RATE_18M_INDEX_TABLE,
62*e705c121SKalle Valo 	IWL_RATE_24M_INDEX_TABLE,
63*e705c121SKalle Valo 	IWL_RATE_36M_INDEX_TABLE,
64*e705c121SKalle Valo 	IWL_RATE_48M_INDEX_TABLE,
65*e705c121SKalle Valo 	IWL_RATE_54M_INDEX_TABLE,
66*e705c121SKalle Valo 	IWL_RATE_1M_INDEX_TABLE,
67*e705c121SKalle Valo 	IWL_RATE_2M_INDEX_TABLE,
68*e705c121SKalle Valo 	IWL_RATE_5M_INDEX_TABLE,
69*e705c121SKalle Valo 	IWL_RATE_11M_INDEX_TABLE,
70*e705c121SKalle Valo 	IWL_RATE_INVM_INDEX_TABLE = IWL_RATE_INVM_INDEX - 1,
71*e705c121SKalle Valo };
72*e705c121SKalle Valo 
73*e705c121SKalle Valo /* #define vs. enum to keep from defaulting to 'large integer' */
74*e705c121SKalle Valo #define	IWL_RATE_6M_MASK   (1 << IWL_RATE_6M_INDEX)
75*e705c121SKalle Valo #define	IWL_RATE_9M_MASK   (1 << IWL_RATE_9M_INDEX)
76*e705c121SKalle Valo #define	IWL_RATE_12M_MASK  (1 << IWL_RATE_12M_INDEX)
77*e705c121SKalle Valo #define	IWL_RATE_18M_MASK  (1 << IWL_RATE_18M_INDEX)
78*e705c121SKalle Valo #define	IWL_RATE_24M_MASK  (1 << IWL_RATE_24M_INDEX)
79*e705c121SKalle Valo #define	IWL_RATE_36M_MASK  (1 << IWL_RATE_36M_INDEX)
80*e705c121SKalle Valo #define	IWL_RATE_48M_MASK  (1 << IWL_RATE_48M_INDEX)
81*e705c121SKalle Valo #define	IWL_RATE_54M_MASK  (1 << IWL_RATE_54M_INDEX)
82*e705c121SKalle Valo #define IWL_RATE_60M_MASK  (1 << IWL_RATE_60M_INDEX)
83*e705c121SKalle Valo #define	IWL_RATE_1M_MASK   (1 << IWL_RATE_1M_INDEX)
84*e705c121SKalle Valo #define	IWL_RATE_2M_MASK   (1 << IWL_RATE_2M_INDEX)
85*e705c121SKalle Valo #define	IWL_RATE_5M_MASK   (1 << IWL_RATE_5M_INDEX)
86*e705c121SKalle Valo #define	IWL_RATE_11M_MASK  (1 << IWL_RATE_11M_INDEX)
87*e705c121SKalle Valo 
88*e705c121SKalle Valo 
89*e705c121SKalle Valo /* uCode API values for HT/VHT bit rates */
90*e705c121SKalle Valo enum {
91*e705c121SKalle Valo 	IWL_RATE_HT_SISO_MCS_0_PLCP = 0,
92*e705c121SKalle Valo 	IWL_RATE_HT_SISO_MCS_1_PLCP = 1,
93*e705c121SKalle Valo 	IWL_RATE_HT_SISO_MCS_2_PLCP = 2,
94*e705c121SKalle Valo 	IWL_RATE_HT_SISO_MCS_3_PLCP = 3,
95*e705c121SKalle Valo 	IWL_RATE_HT_SISO_MCS_4_PLCP = 4,
96*e705c121SKalle Valo 	IWL_RATE_HT_SISO_MCS_5_PLCP = 5,
97*e705c121SKalle Valo 	IWL_RATE_HT_SISO_MCS_6_PLCP = 6,
98*e705c121SKalle Valo 	IWL_RATE_HT_SISO_MCS_7_PLCP = 7,
99*e705c121SKalle Valo 	IWL_RATE_HT_MIMO2_MCS_0_PLCP = 0x8,
100*e705c121SKalle Valo 	IWL_RATE_HT_MIMO2_MCS_1_PLCP = 0x9,
101*e705c121SKalle Valo 	IWL_RATE_HT_MIMO2_MCS_2_PLCP = 0xA,
102*e705c121SKalle Valo 	IWL_RATE_HT_MIMO2_MCS_3_PLCP = 0xB,
103*e705c121SKalle Valo 	IWL_RATE_HT_MIMO2_MCS_4_PLCP = 0xC,
104*e705c121SKalle Valo 	IWL_RATE_HT_MIMO2_MCS_5_PLCP = 0xD,
105*e705c121SKalle Valo 	IWL_RATE_HT_MIMO2_MCS_6_PLCP = 0xE,
106*e705c121SKalle Valo 	IWL_RATE_HT_MIMO2_MCS_7_PLCP = 0xF,
107*e705c121SKalle Valo 	IWL_RATE_VHT_SISO_MCS_0_PLCP = 0,
108*e705c121SKalle Valo 	IWL_RATE_VHT_SISO_MCS_1_PLCP = 1,
109*e705c121SKalle Valo 	IWL_RATE_VHT_SISO_MCS_2_PLCP = 2,
110*e705c121SKalle Valo 	IWL_RATE_VHT_SISO_MCS_3_PLCP = 3,
111*e705c121SKalle Valo 	IWL_RATE_VHT_SISO_MCS_4_PLCP = 4,
112*e705c121SKalle Valo 	IWL_RATE_VHT_SISO_MCS_5_PLCP = 5,
113*e705c121SKalle Valo 	IWL_RATE_VHT_SISO_MCS_6_PLCP = 6,
114*e705c121SKalle Valo 	IWL_RATE_VHT_SISO_MCS_7_PLCP = 7,
115*e705c121SKalle Valo 	IWL_RATE_VHT_SISO_MCS_8_PLCP = 8,
116*e705c121SKalle Valo 	IWL_RATE_VHT_SISO_MCS_9_PLCP = 9,
117*e705c121SKalle Valo 	IWL_RATE_VHT_MIMO2_MCS_0_PLCP = 0x10,
118*e705c121SKalle Valo 	IWL_RATE_VHT_MIMO2_MCS_1_PLCP = 0x11,
119*e705c121SKalle Valo 	IWL_RATE_VHT_MIMO2_MCS_2_PLCP = 0x12,
120*e705c121SKalle Valo 	IWL_RATE_VHT_MIMO2_MCS_3_PLCP = 0x13,
121*e705c121SKalle Valo 	IWL_RATE_VHT_MIMO2_MCS_4_PLCP = 0x14,
122*e705c121SKalle Valo 	IWL_RATE_VHT_MIMO2_MCS_5_PLCP = 0x15,
123*e705c121SKalle Valo 	IWL_RATE_VHT_MIMO2_MCS_6_PLCP = 0x16,
124*e705c121SKalle Valo 	IWL_RATE_VHT_MIMO2_MCS_7_PLCP = 0x17,
125*e705c121SKalle Valo 	IWL_RATE_VHT_MIMO2_MCS_8_PLCP = 0x18,
126*e705c121SKalle Valo 	IWL_RATE_VHT_MIMO2_MCS_9_PLCP = 0x19,
127*e705c121SKalle Valo 	IWL_RATE_HT_SISO_MCS_INV_PLCP,
128*e705c121SKalle Valo 	IWL_RATE_HT_MIMO2_MCS_INV_PLCP = IWL_RATE_HT_SISO_MCS_INV_PLCP,
129*e705c121SKalle Valo 	IWL_RATE_VHT_SISO_MCS_INV_PLCP = IWL_RATE_HT_SISO_MCS_INV_PLCP,
130*e705c121SKalle Valo 	IWL_RATE_VHT_MIMO2_MCS_INV_PLCP = IWL_RATE_HT_SISO_MCS_INV_PLCP,
131*e705c121SKalle Valo 	IWL_RATE_HT_SISO_MCS_8_PLCP = IWL_RATE_HT_SISO_MCS_INV_PLCP,
132*e705c121SKalle Valo 	IWL_RATE_HT_SISO_MCS_9_PLCP = IWL_RATE_HT_SISO_MCS_INV_PLCP,
133*e705c121SKalle Valo 	IWL_RATE_HT_MIMO2_MCS_8_PLCP = IWL_RATE_HT_SISO_MCS_INV_PLCP,
134*e705c121SKalle Valo 	IWL_RATE_HT_MIMO2_MCS_9_PLCP = IWL_RATE_HT_SISO_MCS_INV_PLCP,
135*e705c121SKalle Valo };
136*e705c121SKalle Valo 
137*e705c121SKalle Valo #define IWL_RATES_MASK ((1 << IWL_RATE_COUNT) - 1)
138*e705c121SKalle Valo 
139*e705c121SKalle Valo #define IWL_INVALID_VALUE    -1
140*e705c121SKalle Valo 
141*e705c121SKalle Valo #define TPC_MAX_REDUCTION		15
142*e705c121SKalle Valo #define TPC_NO_REDUCTION		0
143*e705c121SKalle Valo #define TPC_INVALID			0xff
144*e705c121SKalle Valo 
145*e705c121SKalle Valo #define LINK_QUAL_AGG_FRAME_LIMIT_DEF	(63)
146*e705c121SKalle Valo #define LINK_QUAL_AGG_FRAME_LIMIT_MAX	(63)
147*e705c121SKalle Valo #define LINK_QUAL_AGG_FRAME_LIMIT_MIN	(0)
148*e705c121SKalle Valo 
149*e705c121SKalle Valo #define LQ_SIZE		2	/* 2 mode tables:  "Active" and "Search" */
150*e705c121SKalle Valo 
151*e705c121SKalle Valo /* load per tid defines for A-MPDU activation */
152*e705c121SKalle Valo #define IWL_AGG_TPT_THREHOLD	0
153*e705c121SKalle Valo #define IWL_AGG_ALL_TID		0xff
154*e705c121SKalle Valo 
155*e705c121SKalle Valo enum iwl_table_type {
156*e705c121SKalle Valo 	LQ_NONE,
157*e705c121SKalle Valo 	LQ_LEGACY_G,	/* legacy types */
158*e705c121SKalle Valo 	LQ_LEGACY_A,
159*e705c121SKalle Valo 	LQ_HT_SISO,	/* HT types */
160*e705c121SKalle Valo 	LQ_HT_MIMO2,
161*e705c121SKalle Valo 	LQ_VHT_SISO,    /* VHT types */
162*e705c121SKalle Valo 	LQ_VHT_MIMO2,
163*e705c121SKalle Valo 	LQ_MAX,
164*e705c121SKalle Valo };
165*e705c121SKalle Valo 
166*e705c121SKalle Valo struct rs_rate {
167*e705c121SKalle Valo 	int index;
168*e705c121SKalle Valo 	enum iwl_table_type type;
169*e705c121SKalle Valo 	u8 ant;
170*e705c121SKalle Valo 	u32 bw;
171*e705c121SKalle Valo 	bool sgi;
172*e705c121SKalle Valo 	bool ldpc;
173*e705c121SKalle Valo 	bool stbc;
174*e705c121SKalle Valo 	bool bfer;
175*e705c121SKalle Valo };
176*e705c121SKalle Valo 
177*e705c121SKalle Valo 
178*e705c121SKalle Valo #define is_type_legacy(type) (((type) == LQ_LEGACY_G) || \
179*e705c121SKalle Valo 			      ((type) == LQ_LEGACY_A))
180*e705c121SKalle Valo #define is_type_ht_siso(type) ((type) == LQ_HT_SISO)
181*e705c121SKalle Valo #define is_type_ht_mimo2(type) ((type) == LQ_HT_MIMO2)
182*e705c121SKalle Valo #define is_type_vht_siso(type) ((type) == LQ_VHT_SISO)
183*e705c121SKalle Valo #define is_type_vht_mimo2(type) ((type) == LQ_VHT_MIMO2)
184*e705c121SKalle Valo #define is_type_siso(type) (is_type_ht_siso(type) || is_type_vht_siso(type))
185*e705c121SKalle Valo #define is_type_mimo2(type) (is_type_ht_mimo2(type) || is_type_vht_mimo2(type))
186*e705c121SKalle Valo #define is_type_mimo(type) (is_type_mimo2(type))
187*e705c121SKalle Valo #define is_type_ht(type) (is_type_ht_siso(type) || is_type_ht_mimo2(type))
188*e705c121SKalle Valo #define is_type_vht(type) (is_type_vht_siso(type) || is_type_vht_mimo2(type))
189*e705c121SKalle Valo #define is_type_a_band(type) ((type) == LQ_LEGACY_A)
190*e705c121SKalle Valo #define is_type_g_band(type) ((type) == LQ_LEGACY_G)
191*e705c121SKalle Valo 
192*e705c121SKalle Valo #define is_legacy(rate)       is_type_legacy((rate)->type)
193*e705c121SKalle Valo #define is_ht_siso(rate)      is_type_ht_siso((rate)->type)
194*e705c121SKalle Valo #define is_ht_mimo2(rate)     is_type_ht_mimo2((rate)->type)
195*e705c121SKalle Valo #define is_vht_siso(rate)     is_type_vht_siso((rate)->type)
196*e705c121SKalle Valo #define is_vht_mimo2(rate)    is_type_vht_mimo2((rate)->type)
197*e705c121SKalle Valo #define is_siso(rate)         is_type_siso((rate)->type)
198*e705c121SKalle Valo #define is_mimo2(rate)        is_type_mimo2((rate)->type)
199*e705c121SKalle Valo #define is_mimo(rate)         is_type_mimo((rate)->type)
200*e705c121SKalle Valo #define is_ht(rate)           is_type_ht((rate)->type)
201*e705c121SKalle Valo #define is_vht(rate)          is_type_vht((rate)->type)
202*e705c121SKalle Valo #define is_a_band(rate)       is_type_a_band((rate)->type)
203*e705c121SKalle Valo #define is_g_band(rate)       is_type_g_band((rate)->type)
204*e705c121SKalle Valo 
205*e705c121SKalle Valo #define is_ht20(rate)         ((rate)->bw == RATE_MCS_CHAN_WIDTH_20)
206*e705c121SKalle Valo #define is_ht40(rate)         ((rate)->bw == RATE_MCS_CHAN_WIDTH_40)
207*e705c121SKalle Valo #define is_ht80(rate)         ((rate)->bw == RATE_MCS_CHAN_WIDTH_80)
208*e705c121SKalle Valo 
209*e705c121SKalle Valo #define IWL_MAX_MCS_DISPLAY_SIZE	12
210*e705c121SKalle Valo 
211*e705c121SKalle Valo struct iwl_rate_mcs_info {
212*e705c121SKalle Valo 	char	mbps[IWL_MAX_MCS_DISPLAY_SIZE];
213*e705c121SKalle Valo 	char	mcs[IWL_MAX_MCS_DISPLAY_SIZE];
214*e705c121SKalle Valo };
215*e705c121SKalle Valo 
216*e705c121SKalle Valo /**
217*e705c121SKalle Valo  * struct iwl_rate_scale_data -- tx success history for one rate
218*e705c121SKalle Valo  */
219*e705c121SKalle Valo struct iwl_rate_scale_data {
220*e705c121SKalle Valo 	u64 data;		/* bitmap of successful frames */
221*e705c121SKalle Valo 	s32 success_counter;	/* number of frames successful */
222*e705c121SKalle Valo 	s32 success_ratio;	/* per-cent * 128  */
223*e705c121SKalle Valo 	s32 counter;		/* number of frames attempted */
224*e705c121SKalle Valo 	s32 average_tpt;	/* success ratio * expected throughput */
225*e705c121SKalle Valo };
226*e705c121SKalle Valo 
227*e705c121SKalle Valo /* Possible Tx columns
228*e705c121SKalle Valo  * Tx Column = a combo of legacy/siso/mimo x antenna x SGI
229*e705c121SKalle Valo  */
230*e705c121SKalle Valo enum rs_column {
231*e705c121SKalle Valo 	RS_COLUMN_LEGACY_ANT_A = 0,
232*e705c121SKalle Valo 	RS_COLUMN_LEGACY_ANT_B,
233*e705c121SKalle Valo 	RS_COLUMN_SISO_ANT_A,
234*e705c121SKalle Valo 	RS_COLUMN_SISO_ANT_B,
235*e705c121SKalle Valo 	RS_COLUMN_SISO_ANT_A_SGI,
236*e705c121SKalle Valo 	RS_COLUMN_SISO_ANT_B_SGI,
237*e705c121SKalle Valo 	RS_COLUMN_MIMO2,
238*e705c121SKalle Valo 	RS_COLUMN_MIMO2_SGI,
239*e705c121SKalle Valo 
240*e705c121SKalle Valo 	RS_COLUMN_LAST = RS_COLUMN_MIMO2_SGI,
241*e705c121SKalle Valo 	RS_COLUMN_COUNT = RS_COLUMN_LAST + 1,
242*e705c121SKalle Valo 	RS_COLUMN_INVALID,
243*e705c121SKalle Valo };
244*e705c121SKalle Valo 
245*e705c121SKalle Valo enum rs_ss_force_opt {
246*e705c121SKalle Valo 	RS_SS_FORCE_NONE = 0,
247*e705c121SKalle Valo 	RS_SS_FORCE_STBC,
248*e705c121SKalle Valo 	RS_SS_FORCE_BFER,
249*e705c121SKalle Valo 	RS_SS_FORCE_SISO,
250*e705c121SKalle Valo };
251*e705c121SKalle Valo 
252*e705c121SKalle Valo /* Packet stats per rate */
253*e705c121SKalle Valo struct rs_rate_stats {
254*e705c121SKalle Valo 	u64 success;
255*e705c121SKalle Valo 	u64 total;
256*e705c121SKalle Valo };
257*e705c121SKalle Valo 
258*e705c121SKalle Valo /**
259*e705c121SKalle Valo  * struct iwl_scale_tbl_info -- tx params and success history for all rates
260*e705c121SKalle Valo  *
261*e705c121SKalle Valo  * There are two of these in struct iwl_lq_sta,
262*e705c121SKalle Valo  * one for "active", and one for "search".
263*e705c121SKalle Valo  */
264*e705c121SKalle Valo struct iwl_scale_tbl_info {
265*e705c121SKalle Valo 	struct rs_rate rate;
266*e705c121SKalle Valo 	enum rs_column column;
267*e705c121SKalle Valo 	const u16 *expected_tpt;	/* throughput metrics; expected_tpt_G, etc. */
268*e705c121SKalle Valo 	struct iwl_rate_scale_data win[IWL_RATE_COUNT]; /* rate histories */
269*e705c121SKalle Valo 	/* per txpower-reduction history */
270*e705c121SKalle Valo 	struct iwl_rate_scale_data tpc_win[TPC_MAX_REDUCTION + 1];
271*e705c121SKalle Valo };
272*e705c121SKalle Valo 
273*e705c121SKalle Valo enum {
274*e705c121SKalle Valo 	RS_STATE_SEARCH_CYCLE_STARTED,
275*e705c121SKalle Valo 	RS_STATE_SEARCH_CYCLE_ENDED,
276*e705c121SKalle Valo 	RS_STATE_STAY_IN_COLUMN,
277*e705c121SKalle Valo };
278*e705c121SKalle Valo 
279*e705c121SKalle Valo /**
280*e705c121SKalle Valo  * struct iwl_lq_sta -- driver's rate scaling private structure
281*e705c121SKalle Valo  *
282*e705c121SKalle Valo  * Pointer to this gets passed back and forth between driver and mac80211.
283*e705c121SKalle Valo  */
284*e705c121SKalle Valo struct iwl_lq_sta {
285*e705c121SKalle Valo 	u8 active_tbl;		/* index of active table, range 0-1 */
286*e705c121SKalle Valo 	u8 rs_state;            /* RS_STATE_* */
287*e705c121SKalle Valo 	u8 search_better_tbl;	/* 1: currently trying alternate mode */
288*e705c121SKalle Valo 	s32 last_tpt;
289*e705c121SKalle Valo 
290*e705c121SKalle Valo 	/* The following determine when to search for a new mode */
291*e705c121SKalle Valo 	u32 table_count_limit;
292*e705c121SKalle Valo 	u32 max_failure_limit;	/* # failed frames before new search */
293*e705c121SKalle Valo 	u32 max_success_limit;	/* # successful frames before new search */
294*e705c121SKalle Valo 	u32 table_count;
295*e705c121SKalle Valo 	u32 total_failed;	/* total failed frames, any/all rates */
296*e705c121SKalle Valo 	u32 total_success;	/* total successful frames, any/all rates */
297*e705c121SKalle Valo 	u64 flush_timer;	/* time staying in mode before new search */
298*e705c121SKalle Valo 
299*e705c121SKalle Valo 	u32 visited_columns;    /* Bitmask marking which Tx columns were
300*e705c121SKalle Valo 				 * explored during a search cycle
301*e705c121SKalle Valo 				 */
302*e705c121SKalle Valo 	u64 last_tx;
303*e705c121SKalle Valo 	bool is_vht;
304*e705c121SKalle Valo 	bool ldpc;              /* LDPC Rx is supported by the STA */
305*e705c121SKalle Valo 	bool stbc_capable;      /* Tx STBC is supported by chip and Rx by STA */
306*e705c121SKalle Valo 	bool bfer_capable;      /* Remote supports beamformee and we BFer */
307*e705c121SKalle Valo 
308*e705c121SKalle Valo 	enum ieee80211_band band;
309*e705c121SKalle Valo 
310*e705c121SKalle Valo 	/* The following are bitmaps of rates; IWL_RATE_6M_MASK, etc. */
311*e705c121SKalle Valo 	unsigned long active_legacy_rate;
312*e705c121SKalle Valo 	unsigned long active_siso_rate;
313*e705c121SKalle Valo 	unsigned long active_mimo2_rate;
314*e705c121SKalle Valo 
315*e705c121SKalle Valo 	/* Highest rate per Tx mode */
316*e705c121SKalle Valo 	u8 max_legacy_rate_idx;
317*e705c121SKalle Valo 	u8 max_siso_rate_idx;
318*e705c121SKalle Valo 	u8 max_mimo2_rate_idx;
319*e705c121SKalle Valo 
320*e705c121SKalle Valo 	/* Optimal rate based on RSSI and STA caps.
321*e705c121SKalle Valo 	 * Used only to reflect link speed to userspace.
322*e705c121SKalle Valo 	 */
323*e705c121SKalle Valo 	struct rs_rate optimal_rate;
324*e705c121SKalle Valo 	unsigned long optimal_rate_mask;
325*e705c121SKalle Valo 	const struct rs_init_rate_info *optimal_rates;
326*e705c121SKalle Valo 	int optimal_nentries;
327*e705c121SKalle Valo 
328*e705c121SKalle Valo 	u8 missed_rate_counter;
329*e705c121SKalle Valo 
330*e705c121SKalle Valo 	struct iwl_lq_cmd lq;
331*e705c121SKalle Valo 	struct iwl_scale_tbl_info lq_info[LQ_SIZE]; /* "active", "search" */
332*e705c121SKalle Valo 	u8 tx_agg_tid_en;
333*e705c121SKalle Valo 
334*e705c121SKalle Valo 	/* last tx rate_n_flags */
335*e705c121SKalle Valo 	u32 last_rate_n_flags;
336*e705c121SKalle Valo 	/* packets destined for this STA are aggregated */
337*e705c121SKalle Valo 	u8 is_agg;
338*e705c121SKalle Valo 
339*e705c121SKalle Valo 	/* tx power reduce for this sta */
340*e705c121SKalle Valo 	int tpc_reduce;
341*e705c121SKalle Valo 
342*e705c121SKalle Valo 	/* persistent fields - initialized only once - keep last! */
343*e705c121SKalle Valo 	struct lq_sta_pers {
344*e705c121SKalle Valo #ifdef CONFIG_MAC80211_DEBUGFS
345*e705c121SKalle Valo 		u32 dbg_fixed_rate;
346*e705c121SKalle Valo 		u8 dbg_fixed_txp_reduction;
347*e705c121SKalle Valo 
348*e705c121SKalle Valo 		/* force STBC/BFER/SISO for testing */
349*e705c121SKalle Valo 		enum rs_ss_force_opt ss_force;
350*e705c121SKalle Valo #endif
351*e705c121SKalle Valo 		u8 chains;
352*e705c121SKalle Valo 		s8 chain_signal[IEEE80211_MAX_CHAINS];
353*e705c121SKalle Valo 		s8 last_rssi;
354*e705c121SKalle Valo 		struct rs_rate_stats tx_stats[RS_COLUMN_COUNT][IWL_RATE_COUNT];
355*e705c121SKalle Valo 		struct iwl_mvm *drv;
356*e705c121SKalle Valo 	} pers;
357*e705c121SKalle Valo };
358*e705c121SKalle Valo 
359*e705c121SKalle Valo /* Initialize station's rate scaling information after adding station */
360*e705c121SKalle Valo void iwl_mvm_rs_rate_init(struct iwl_mvm *mvm, struct ieee80211_sta *sta,
361*e705c121SKalle Valo 			  enum ieee80211_band band, bool init);
362*e705c121SKalle Valo 
363*e705c121SKalle Valo /* Notify RS about Tx status */
364*e705c121SKalle Valo void iwl_mvm_rs_tx_status(struct iwl_mvm *mvm, struct ieee80211_sta *sta,
365*e705c121SKalle Valo 			  int tid, struct ieee80211_tx_info *info);
366*e705c121SKalle Valo 
367*e705c121SKalle Valo /**
368*e705c121SKalle Valo  * iwl_rate_control_register - Register the rate control algorithm callbacks
369*e705c121SKalle Valo  *
370*e705c121SKalle Valo  * Since the rate control algorithm is hardware specific, there is no need
371*e705c121SKalle Valo  * or reason to place it as a stand alone module.  The driver can call
372*e705c121SKalle Valo  * iwl_rate_control_register in order to register the rate control callbacks
373*e705c121SKalle Valo  * with the mac80211 subsystem.  This should be performed prior to calling
374*e705c121SKalle Valo  * ieee80211_register_hw
375*e705c121SKalle Valo  *
376*e705c121SKalle Valo  */
377*e705c121SKalle Valo int iwl_mvm_rate_control_register(void);
378*e705c121SKalle Valo 
379*e705c121SKalle Valo /**
380*e705c121SKalle Valo  * iwl_rate_control_unregister - Unregister the rate control callbacks
381*e705c121SKalle Valo  *
382*e705c121SKalle Valo  * This should be called after calling ieee80211_unregister_hw, but before
383*e705c121SKalle Valo  * the driver is unloaded.
384*e705c121SKalle Valo  */
385*e705c121SKalle Valo void iwl_mvm_rate_control_unregister(void);
386*e705c121SKalle Valo 
387*e705c121SKalle Valo struct iwl_mvm_sta;
388*e705c121SKalle Valo 
389*e705c121SKalle Valo int iwl_mvm_tx_protection(struct iwl_mvm *mvm, struct iwl_mvm_sta *mvmsta,
390*e705c121SKalle Valo 			  bool enable);
391*e705c121SKalle Valo 
392*e705c121SKalle Valo #endif /* __rs__ */
393