1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause 2 /* 3 * Copyright (C) 2012-2014, 2018-2025 Intel Corporation 4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH 5 * Copyright (C) 2016-2017 Intel Deutschland GmbH 6 */ 7 #include <net/mac80211.h> 8 #include <linux/netdevice.h> 9 #include <linux/dmi.h> 10 11 #include "iwl-trans.h" 12 #include "iwl-op-mode.h" 13 #include "fw/img.h" 14 #include "iwl-debug.h" 15 #include "iwl-prph.h" 16 #include "fw/acpi.h" 17 #include "fw/pnvm.h" 18 #include "fw/uefi.h" 19 #include "fw/regulatory.h" 20 21 #include "mvm.h" 22 #include "fw/dbg.h" 23 #include "iwl-phy-db.h" 24 #include "iwl-modparams.h" 25 #include "iwl-nvm-parse.h" 26 #include "time-sync.h" 27 28 #define MVM_UCODE_ALIVE_TIMEOUT (2 * HZ) 29 #define MVM_UCODE_CALIB_TIMEOUT (2 * HZ) 30 31 struct iwl_mvm_alive_data { 32 __le32 sku_id[3]; 33 bool valid; 34 }; 35 36 static int iwl_send_tx_ant_cfg(struct iwl_mvm *mvm, u8 valid_tx_ant) 37 { 38 struct iwl_tx_ant_cfg_cmd tx_ant_cmd = { 39 .valid = cpu_to_le32(valid_tx_ant), 40 }; 41 42 IWL_DEBUG_FW(mvm, "select valid tx ant: %u\n", valid_tx_ant); 43 return iwl_mvm_send_cmd_pdu(mvm, TX_ANT_CONFIGURATION_CMD, 0, 44 sizeof(tx_ant_cmd), &tx_ant_cmd); 45 } 46 47 static int iwl_send_rss_cfg_cmd(struct iwl_mvm *mvm) 48 { 49 int i; 50 struct iwl_rss_config_cmd cmd = { 51 .flags = cpu_to_le32(IWL_RSS_ENABLE), 52 .hash_mask = BIT(IWL_RSS_HASH_TYPE_IPV4_TCP) | 53 BIT(IWL_RSS_HASH_TYPE_IPV4_UDP) | 54 BIT(IWL_RSS_HASH_TYPE_IPV4_PAYLOAD) | 55 BIT(IWL_RSS_HASH_TYPE_IPV6_TCP) | 56 BIT(IWL_RSS_HASH_TYPE_IPV6_UDP) | 57 BIT(IWL_RSS_HASH_TYPE_IPV6_PAYLOAD), 58 }; 59 60 if (mvm->trans->info.num_rxqs == 1) 61 return 0; 62 63 /* Do not direct RSS traffic to Q 0 which is our fallback queue */ 64 for (i = 0; i < ARRAY_SIZE(cmd.indirection_table); i++) 65 cmd.indirection_table[i] = 66 1 + (i % (mvm->trans->info.num_rxqs - 1)); 67 netdev_rss_key_fill(cmd.secret_key, sizeof(cmd.secret_key)); 68 69 return iwl_mvm_send_cmd_pdu(mvm, RSS_CONFIG_CMD, 0, sizeof(cmd), &cmd); 70 } 71 72 static int iwl_mvm_send_dqa_cmd(struct iwl_mvm *mvm) 73 { 74 struct iwl_dqa_enable_cmd dqa_cmd = { 75 .cmd_queue = cpu_to_le32(IWL_MVM_DQA_CMD_QUEUE), 76 }; 77 u32 cmd_id = WIDE_ID(DATA_PATH_GROUP, DQA_ENABLE_CMD); 78 int ret; 79 80 ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, sizeof(dqa_cmd), &dqa_cmd); 81 if (ret) 82 IWL_ERR(mvm, "Failed to send DQA enabling command: %d\n", ret); 83 else 84 IWL_DEBUG_FW(mvm, "Working in DQA mode\n"); 85 86 return ret; 87 } 88 89 void iwl_mvm_mfu_assert_dump_notif(struct iwl_mvm *mvm, 90 struct iwl_rx_cmd_buffer *rxb) 91 { 92 struct iwl_rx_packet *pkt = rxb_addr(rxb); 93 struct iwl_mfu_assert_dump_notif *mfu_dump_notif = (void *)pkt->data; 94 95 if (mfu_dump_notif->index_num == 0) 96 IWL_INFO(mvm, "MFUART assert id 0x%x occurred\n", 97 le32_to_cpu(mfu_dump_notif->assert_id)); 98 } 99 100 static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait, 101 struct iwl_rx_packet *pkt, void *data) 102 { 103 unsigned int pkt_len = iwl_rx_packet_payload_len(pkt); 104 struct iwl_mvm *mvm = 105 container_of(notif_wait, struct iwl_mvm, notif_wait); 106 struct iwl_mvm_alive_data *alive_data = data; 107 struct iwl_umac_alive *umac; 108 struct iwl_lmac_alive *lmac1; 109 struct iwl_lmac_alive *lmac2 = NULL; 110 u16 status; 111 u32 lmac_error_event_table, umac_error_table; 112 u32 version = iwl_fw_lookup_notif_ver(mvm->fw, LEGACY_GROUP, 113 UCODE_ALIVE_NTFY, 0); 114 u32 i; 115 116 117 if (version >= 6) { 118 struct iwl_alive_ntf_v7 *palive; 119 120 if (pkt_len < sizeof(*palive)) 121 return false; 122 123 palive = (void *)pkt->data; 124 125 umac = &palive->umac_data; 126 lmac1 = &palive->lmac_data[0]; 127 lmac2 = &palive->lmac_data[1]; 128 status = le16_to_cpu(palive->status); 129 130 BUILD_BUG_ON(sizeof(palive->sku_id.data) != 131 sizeof(alive_data->sku_id)); 132 memcpy(alive_data->sku_id, palive->sku_id.data, 133 sizeof(palive->sku_id.data)); 134 135 IWL_DEBUG_FW(mvm, "Got sku_id: 0x0%x 0x0%x 0x0%x\n", 136 le32_to_cpu(alive_data->sku_id[0]), 137 le32_to_cpu(alive_data->sku_id[1]), 138 le32_to_cpu(alive_data->sku_id[2])); 139 140 mvm->trans->dbg.imr_data.imr_enable = 141 le32_to_cpu(palive->imr.enabled); 142 mvm->trans->dbg.imr_data.imr_size = 143 le32_to_cpu(palive->imr.size); 144 mvm->trans->dbg.imr_data.imr2sram_remainbyte = 145 mvm->trans->dbg.imr_data.imr_size; 146 mvm->trans->dbg.imr_data.imr_base_addr = 147 palive->imr.base_addr; 148 mvm->trans->dbg.imr_data.imr_curr_addr = 149 le64_to_cpu(mvm->trans->dbg.imr_data.imr_base_addr); 150 IWL_DEBUG_FW(mvm, "IMR Enabled: 0x0%x size 0x0%x Address 0x%016llx\n", 151 mvm->trans->dbg.imr_data.imr_enable, 152 mvm->trans->dbg.imr_data.imr_size, 153 le64_to_cpu(mvm->trans->dbg.imr_data.imr_base_addr)); 154 155 if (!mvm->trans->dbg.imr_data.imr_enable) { 156 for (i = 0; i < ARRAY_SIZE(mvm->trans->dbg.active_regions); i++) { 157 struct iwl_ucode_tlv *reg_tlv; 158 struct iwl_fw_ini_region_tlv *reg; 159 160 reg_tlv = mvm->trans->dbg.active_regions[i]; 161 if (!reg_tlv) 162 continue; 163 164 reg = (void *)reg_tlv->data; 165 /* 166 * We have only one DRAM IMR region, so we 167 * can break as soon as we find the first 168 * one. 169 */ 170 if (reg->type == IWL_FW_INI_REGION_DRAM_IMR) { 171 mvm->trans->dbg.unsupported_region_msk |= BIT(i); 172 break; 173 } 174 } 175 } 176 177 if (version >= 8) { 178 const struct iwl_alive_ntf *palive_v8 = 179 (void *)pkt->data; 180 181 if (pkt_len < sizeof(*palive_v8)) 182 return false; 183 184 IWL_DEBUG_FW(mvm, "platform id: 0x%llx\n", 185 palive_v8->platform_id); 186 } 187 } else if (iwl_rx_packet_payload_len(pkt) == 188 sizeof(struct iwl_alive_ntf_v3)) { 189 struct iwl_alive_ntf_v3 *palive3; 190 191 if (pkt_len < sizeof(*palive3)) 192 return false; 193 194 palive3 = (void *)pkt->data; 195 umac = &palive3->umac_data; 196 lmac1 = &palive3->lmac_data; 197 status = le16_to_cpu(palive3->status); 198 } else { 199 WARN(1, "unsupported alive notification (size %d)\n", 200 iwl_rx_packet_payload_len(pkt)); 201 /* get timeout later */ 202 return false; 203 } 204 205 lmac_error_event_table = 206 le32_to_cpu(lmac1->dbg_ptrs.error_event_table_ptr); 207 iwl_fw_lmac1_set_alive_err_table(mvm->trans, lmac_error_event_table); 208 209 if (lmac2) 210 mvm->trans->dbg.lmac_error_event_table[1] = 211 le32_to_cpu(lmac2->dbg_ptrs.error_event_table_ptr); 212 213 umac_error_table = le32_to_cpu(umac->dbg_ptrs.error_info_addr) & 214 ~FW_ADDR_CACHE_CONTROL; 215 216 if (umac_error_table) { 217 iwl_fw_umac_set_alive_err_table(mvm->trans, 218 umac_error_table); 219 } 220 221 alive_data->valid = status == IWL_ALIVE_STATUS_OK; 222 223 IWL_DEBUG_FW(mvm, 224 "Alive ucode status 0x%04x revision 0x%01X 0x%01X\n", 225 status, lmac1->ver_type, lmac1->ver_subtype); 226 227 if (lmac2) 228 IWL_DEBUG_FW(mvm, "Alive ucode CDB\n"); 229 230 IWL_DEBUG_FW(mvm, 231 "UMAC version: Major - 0x%x, Minor - 0x%x\n", 232 le32_to_cpu(umac->umac_major), 233 le32_to_cpu(umac->umac_minor)); 234 235 iwl_fwrt_update_fw_versions(&mvm->fwrt, lmac1, umac); 236 237 return true; 238 } 239 240 static bool iwl_wait_init_complete(struct iwl_notif_wait_data *notif_wait, 241 struct iwl_rx_packet *pkt, void *data) 242 { 243 WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF); 244 245 return true; 246 } 247 248 static bool iwl_wait_phy_db_entry(struct iwl_notif_wait_data *notif_wait, 249 struct iwl_rx_packet *pkt, void *data) 250 { 251 struct iwl_phy_db *phy_db = data; 252 253 if (pkt->hdr.cmd != CALIB_RES_NOTIF_PHY_DB) { 254 WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF); 255 return true; 256 } 257 258 WARN_ON(iwl_phy_db_set_section(phy_db, pkt)); 259 260 return false; 261 } 262 263 static void iwl_mvm_print_pd_notification(struct iwl_mvm *mvm) 264 { 265 #define IWL_FW_PRINT_REG_INFO(reg_name) \ 266 IWL_ERR(mvm, #reg_name ": 0x%x\n", iwl_read_umac_prph(trans, reg_name)) 267 268 struct iwl_trans *trans = mvm->trans; 269 enum iwl_device_family device_family = trans->mac_cfg->device_family; 270 271 if (device_family < IWL_DEVICE_FAMILY_8000) 272 return; 273 274 if (device_family <= IWL_DEVICE_FAMILY_9000) 275 IWL_FW_PRINT_REG_INFO(WFPM_ARC1_PD_NOTIFICATION); 276 else 277 IWL_FW_PRINT_REG_INFO(WFPM_LMAC1_PD_NOTIFICATION); 278 279 IWL_FW_PRINT_REG_INFO(HPM_SECONDARY_DEVICE_STATE); 280 281 /* print OPT info */ 282 IWL_FW_PRINT_REG_INFO(WFPM_MAC_OTP_CFG7_ADDR); 283 IWL_FW_PRINT_REG_INFO(WFPM_MAC_OTP_CFG7_DATA); 284 } 285 286 static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm, 287 enum iwl_ucode_type ucode_type) 288 { 289 struct iwl_notification_wait alive_wait; 290 struct iwl_mvm_alive_data alive_data = {}; 291 int ret; 292 enum iwl_ucode_type old_type = mvm->fwrt.cur_fw_img; 293 static const u16 alive_cmd[] = { UCODE_ALIVE_NTFY }; 294 bool run_in_rfkill = 295 ucode_type == IWL_UCODE_INIT || iwl_mvm_has_unified_ucode(mvm); 296 u8 count; 297 struct iwl_pc_data *pc_data; 298 299 if (ucode_type == IWL_UCODE_REGULAR && 300 iwl_fw_dbg_conf_usniffer(mvm->fw, FW_DBG_START_FROM_ALIVE) && 301 !(fw_has_capa(&mvm->fw->ucode_capa, 302 IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED))) 303 ucode_type = IWL_UCODE_REGULAR_USNIFFER; 304 iwl_fw_set_current_image(&mvm->fwrt, ucode_type); 305 clear_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status); 306 307 iwl_init_notification_wait(&mvm->notif_wait, &alive_wait, 308 alive_cmd, ARRAY_SIZE(alive_cmd), 309 iwl_alive_fn, &alive_data); 310 311 /* 312 * We want to load the INIT firmware even in RFKILL 313 * For the unified firmware case, the ucode_type is not 314 * INIT, but we still need to run it. 315 */ 316 ret = iwl_trans_start_fw(mvm->trans, mvm->fw, ucode_type, 317 run_in_rfkill); 318 if (ret) { 319 iwl_fw_set_current_image(&mvm->fwrt, old_type); 320 iwl_remove_notification(&mvm->notif_wait, &alive_wait); 321 return ret; 322 } 323 324 /* 325 * Some things may run in the background now, but we 326 * just wait for the ALIVE notification here. 327 */ 328 ret = iwl_wait_notification(&mvm->notif_wait, &alive_wait, 329 MVM_UCODE_ALIVE_TIMEOUT); 330 331 if (mvm->trans->mac_cfg->device_family == 332 IWL_DEVICE_FAMILY_AX210) { 333 /* print these registers regardless of alive fail/success */ 334 IWL_INFO(mvm, "WFPM_UMAC_PD_NOTIFICATION: 0x%x\n", 335 iwl_read_umac_prph(mvm->trans, WFPM_ARC1_PD_NOTIFICATION)); 336 IWL_INFO(mvm, "WFPM_LMAC2_PD_NOTIFICATION: 0x%x\n", 337 iwl_read_umac_prph(mvm->trans, WFPM_LMAC2_PD_NOTIFICATION)); 338 IWL_INFO(mvm, "WFPM_AUTH_KEY_0: 0x%x\n", 339 iwl_read_umac_prph(mvm->trans, SB_MODIFY_CFG_FLAG)); 340 IWL_INFO(mvm, "CNVI_SCU_SEQ_DATA_DW9: 0x%x\n", 341 iwl_read_prph(mvm->trans, CNVI_SCU_SEQ_DATA_DW9)); 342 } 343 344 if (ret) { 345 struct iwl_trans *trans = mvm->trans; 346 347 /* SecBoot info */ 348 if (trans->mac_cfg->device_family >= 349 IWL_DEVICE_FAMILY_22000) { 350 IWL_ERR(mvm, 351 "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n", 352 iwl_read_umac_prph(trans, UMAG_SB_CPU_1_STATUS), 353 iwl_read_umac_prph(trans, 354 UMAG_SB_CPU_2_STATUS)); 355 } else if (trans->mac_cfg->device_family >= 356 IWL_DEVICE_FAMILY_8000) { 357 IWL_ERR(mvm, 358 "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n", 359 iwl_read_prph(trans, SB_CPU_1_STATUS), 360 iwl_read_prph(trans, SB_CPU_2_STATUS)); 361 } 362 363 iwl_mvm_print_pd_notification(mvm); 364 365 /* LMAC/UMAC PC info */ 366 if (trans->mac_cfg->device_family >= 367 IWL_DEVICE_FAMILY_22000) { 368 pc_data = trans->dbg.pc_data; 369 for (count = 0; count < trans->dbg.num_pc; 370 count++, pc_data++) 371 IWL_ERR(mvm, "%s: 0x%x\n", 372 pc_data->pc_name, 373 pc_data->pc_address); 374 } else if (trans->mac_cfg->device_family >= 375 IWL_DEVICE_FAMILY_9000) { 376 IWL_ERR(mvm, "UMAC PC: 0x%x\n", 377 iwl_read_umac_prph(trans, 378 UREG_UMAC_CURRENT_PC)); 379 IWL_ERR(mvm, "LMAC PC: 0x%x\n", 380 iwl_read_umac_prph(trans, 381 UREG_LMAC1_CURRENT_PC)); 382 if (iwl_mvm_is_cdb_supported(mvm)) 383 IWL_ERR(mvm, "LMAC2 PC: 0x%x\n", 384 iwl_read_umac_prph(trans, 385 UREG_LMAC2_CURRENT_PC)); 386 } 387 388 if (ret == -ETIMEDOUT && !mvm->fw_product_reset) 389 iwl_fw_dbg_error_collect(&mvm->fwrt, 390 FW_DBG_TRIGGER_ALIVE_TIMEOUT); 391 392 iwl_fw_set_current_image(&mvm->fwrt, old_type); 393 return ret; 394 } 395 396 if (!alive_data.valid) { 397 IWL_ERR(mvm, "Loaded ucode is not valid!\n"); 398 iwl_fw_set_current_image(&mvm->fwrt, old_type); 399 return -EIO; 400 } 401 402 /* if reached this point, Alive notification was received */ 403 iwl_mei_alive_notif(true); 404 405 iwl_trans_fw_alive(mvm->trans); 406 407 ret = iwl_pnvm_load(mvm->trans, &mvm->notif_wait, 408 mvm->fw, alive_data.sku_id); 409 if (ret) { 410 IWL_ERR(mvm, "Timeout waiting for PNVM load!\n"); 411 iwl_fw_set_current_image(&mvm->fwrt, old_type); 412 return ret; 413 } 414 415 /* 416 * Note: all the queues are enabled as part of the interface 417 * initialization, but in firmware restart scenarios they 418 * could be stopped, so wake them up. In firmware restart, 419 * mac80211 will have the queues stopped as well until the 420 * reconfiguration completes. During normal startup, they 421 * will be empty. 422 */ 423 424 memset(&mvm->queue_info, 0, sizeof(mvm->queue_info)); 425 /* 426 * Set a 'fake' TID for the command queue, since we use the 427 * hweight() of the tid_bitmap as a refcount now. Not that 428 * we ever even consider the command queue as one we might 429 * want to reuse, but be safe nevertheless. 430 */ 431 mvm->queue_info[IWL_MVM_DQA_CMD_QUEUE].tid_bitmap = 432 BIT(IWL_MAX_TID_COUNT + 2); 433 434 set_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status); 435 #ifdef CONFIG_IWLWIFI_DEBUGFS 436 iwl_fw_set_dbg_rec_on(&mvm->fwrt); 437 #endif 438 439 /* 440 * For pre-MLD API (MLD API doesn't use the timestamps): 441 * All the BSSes in the BSS table include the GP2 in the system 442 * at the beacon Rx time, this is of course no longer relevant 443 * since we are resetting the firmware. 444 * Purge all the BSS table. 445 */ 446 if (!mvm->mld_api_is_used) 447 cfg80211_bss_flush(mvm->hw->wiphy); 448 449 return 0; 450 } 451 452 static void iwl_mvm_phy_filter_init(struct iwl_mvm *mvm, 453 struct iwl_phy_specific_cfg *phy_filters) 454 { 455 #ifdef CONFIG_ACPI 456 *phy_filters = mvm->fwrt.phy_filters; 457 #endif /* CONFIG_ACPI */ 458 } 459 460 static void iwl_mvm_uats_init(struct iwl_mvm *mvm) 461 { 462 u8 cmd_ver; 463 int ret; 464 struct iwl_host_cmd cmd = { 465 .id = WIDE_ID(REGULATORY_AND_NVM_GROUP, 466 MCC_ALLOWED_AP_TYPE_CMD), 467 .flags = 0, 468 .data[0] = &mvm->fwrt.uats_table, 469 .len[0] = sizeof(mvm->fwrt.uats_table), 470 .dataflags[0] = IWL_HCMD_DFL_NOCOPY, 471 }; 472 473 if (mvm->trans->mac_cfg->device_family < IWL_DEVICE_FAMILY_AX210) { 474 IWL_DEBUG_RADIO(mvm, "UATS feature is not supported\n"); 475 return; 476 } 477 478 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd.id, 479 IWL_FW_CMD_VER_UNKNOWN); 480 if (cmd_ver != 1) { 481 IWL_DEBUG_RADIO(mvm, 482 "MCC_ALLOWED_AP_TYPE_CMD ver %d not supported\n", 483 cmd_ver); 484 return; 485 } 486 487 iwl_uefi_get_uats_table(mvm->trans, &mvm->fwrt); 488 489 if (!mvm->fwrt.uats_valid) 490 return; 491 492 ret = iwl_mvm_send_cmd(mvm, &cmd); 493 if (ret < 0) 494 IWL_ERR(mvm, "failed to send MCC_ALLOWED_AP_TYPE_CMD (%d)\n", 495 ret); 496 else 497 IWL_DEBUG_RADIO(mvm, "MCC_ALLOWED_AP_TYPE_CMD sent to FW\n"); 498 } 499 500 static int iwl_mvm_sgom_init(struct iwl_mvm *mvm) 501 { 502 u8 cmd_ver; 503 int ret; 504 struct iwl_host_cmd cmd = { 505 .id = WIDE_ID(REGULATORY_AND_NVM_GROUP, 506 SAR_OFFSET_MAPPING_TABLE_CMD), 507 .flags = 0, 508 .data[0] = &mvm->fwrt.sgom_table, 509 .len[0] = sizeof(mvm->fwrt.sgom_table), 510 .dataflags[0] = IWL_HCMD_DFL_NOCOPY, 511 }; 512 513 if (!mvm->fwrt.sgom_enabled) { 514 IWL_DEBUG_RADIO(mvm, "SGOM table is disabled\n"); 515 return 0; 516 } 517 518 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd.id, 519 IWL_FW_CMD_VER_UNKNOWN); 520 521 if (cmd_ver != 2) { 522 IWL_DEBUG_RADIO(mvm, "command version is unsupported. version = %d\n", 523 cmd_ver); 524 return 0; 525 } 526 527 ret = iwl_mvm_send_cmd(mvm, &cmd); 528 if (ret < 0) 529 IWL_ERR(mvm, "failed to send SAR_OFFSET_MAPPING_CMD (%d)\n", ret); 530 531 return ret; 532 } 533 534 static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm) 535 { 536 u32 cmd_id = PHY_CONFIGURATION_CMD; 537 struct iwl_phy_cfg_cmd_v3 phy_cfg_cmd; 538 enum iwl_ucode_type ucode_type = mvm->fwrt.cur_fw_img; 539 u8 cmd_ver; 540 size_t cmd_size; 541 542 if (iwl_mvm_has_unified_ucode(mvm) && 543 !mvm->trans->cfg->tx_with_siso_diversity) 544 return 0; 545 546 if (mvm->trans->cfg->tx_with_siso_diversity) { 547 /* 548 * TODO: currently we don't set the antenna but letting the NIC 549 * to decide which antenna to use. This should come from BIOS. 550 */ 551 phy_cfg_cmd.phy_cfg = 552 cpu_to_le32(FW_PHY_CFG_CHAIN_SAD_ENABLED); 553 } 554 555 /* Set parameters */ 556 phy_cfg_cmd.phy_cfg = cpu_to_le32(iwl_mvm_get_phy_config(mvm)); 557 558 /* set flags extra PHY configuration flags from the device's cfg */ 559 phy_cfg_cmd.phy_cfg |= 560 cpu_to_le32(mvm->trans->mac_cfg->extra_phy_cfg_flags); 561 562 phy_cfg_cmd.calib_control.event_trigger = 563 mvm->fw->default_calib[ucode_type].event_trigger; 564 phy_cfg_cmd.calib_control.flow_trigger = 565 mvm->fw->default_calib[ucode_type].flow_trigger; 566 567 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id, 568 IWL_FW_CMD_VER_UNKNOWN); 569 if (cmd_ver >= 3) 570 iwl_mvm_phy_filter_init(mvm, &phy_cfg_cmd.phy_specific_cfg); 571 572 IWL_DEBUG_INFO(mvm, "Sending Phy CFG command: 0x%x\n", 573 phy_cfg_cmd.phy_cfg); 574 cmd_size = (cmd_ver == 3) ? sizeof(struct iwl_phy_cfg_cmd_v3) : 575 sizeof(struct iwl_phy_cfg_cmd_v1); 576 return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, cmd_size, &phy_cfg_cmd); 577 } 578 579 static int iwl_run_unified_mvm_ucode(struct iwl_mvm *mvm) 580 { 581 struct iwl_notification_wait init_wait; 582 struct iwl_nvm_access_complete_cmd nvm_complete = {}; 583 struct iwl_init_extended_cfg_cmd init_cfg = { 584 .init_flags = cpu_to_le32(BIT(IWL_INIT_NVM)), 585 }; 586 static const u16 init_complete[] = { 587 INIT_COMPLETE_NOTIF, 588 }; 589 u32 sb_cfg; 590 int ret; 591 592 if (mvm->trans->cfg->tx_with_siso_diversity) 593 init_cfg.init_flags |= cpu_to_le32(BIT(IWL_INIT_PHY)); 594 595 lockdep_assert_held(&mvm->mutex); 596 597 mvm->rfkill_safe_init_done = false; 598 599 if (mvm->trans->mac_cfg->device_family == IWL_DEVICE_FAMILY_AX210) { 600 sb_cfg = iwl_read_umac_prph(mvm->trans, SB_MODIFY_CFG_FLAG); 601 /* if needed, we'll reset this on our way out later */ 602 mvm->fw_product_reset = sb_cfg == SB_CFG_RESIDES_IN_ROM; 603 if (mvm->fw_product_reset && iwl_mei_pldr_req()) 604 return -EBUSY; 605 } 606 607 iwl_init_notification_wait(&mvm->notif_wait, 608 &init_wait, 609 init_complete, 610 ARRAY_SIZE(init_complete), 611 iwl_wait_init_complete, 612 NULL); 613 614 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL); 615 616 /* Will also start the device */ 617 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR); 618 if (ret) { 619 IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret); 620 621 /* if we needed reset then fail here, but notify and remove */ 622 if (mvm->fw_product_reset) { 623 iwl_mei_alive_notif(false); 624 iwl_trans_pcie_reset(mvm->trans, 625 IWL_RESET_MODE_RESCAN); 626 } 627 628 goto error; 629 } 630 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE, 631 NULL); 632 633 /* Send init config command to mark that we are sending NVM access 634 * commands 635 */ 636 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(SYSTEM_GROUP, 637 INIT_EXTENDED_CFG_CMD), 638 CMD_SEND_IN_RFKILL, 639 sizeof(init_cfg), &init_cfg); 640 if (ret) { 641 IWL_ERR(mvm, "Failed to run init config command: %d\n", 642 ret); 643 goto error; 644 } 645 646 /* Load NVM to NIC if needed */ 647 if (mvm->nvm_file_name) { 648 ret = iwl_read_external_nvm(mvm->trans, mvm->nvm_file_name, 649 mvm->nvm_sections); 650 if (ret) 651 goto error; 652 ret = iwl_mvm_load_nvm_to_nic(mvm); 653 if (ret) 654 goto error; 655 } 656 657 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(REGULATORY_AND_NVM_GROUP, 658 NVM_ACCESS_COMPLETE), 659 CMD_SEND_IN_RFKILL, 660 sizeof(nvm_complete), &nvm_complete); 661 if (ret) { 662 IWL_ERR(mvm, "Failed to run complete NVM access: %d\n", 663 ret); 664 goto error; 665 } 666 667 ret = iwl_send_phy_cfg_cmd(mvm); 668 if (ret) { 669 IWL_ERR(mvm, "Failed to run PHY configuration: %d\n", 670 ret); 671 goto error; 672 } 673 674 /* We wait for the INIT complete notification */ 675 ret = iwl_wait_notification(&mvm->notif_wait, &init_wait, 676 MVM_UCODE_ALIVE_TIMEOUT); 677 if (ret) 678 return ret; 679 680 /* Read the NVM only at driver load time, no need to do this twice */ 681 if (!mvm->nvm_data) { 682 mvm->nvm_data = iwl_get_nvm(mvm->trans, mvm->fw, 683 mvm->set_tx_ant, mvm->set_rx_ant); 684 if (IS_ERR(mvm->nvm_data)) { 685 ret = PTR_ERR(mvm->nvm_data); 686 mvm->nvm_data = NULL; 687 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret); 688 return ret; 689 } 690 } 691 692 mvm->rfkill_safe_init_done = true; 693 694 return 0; 695 696 error: 697 iwl_remove_notification(&mvm->notif_wait, &init_wait); 698 return ret; 699 } 700 701 int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm) 702 { 703 struct iwl_notification_wait calib_wait; 704 static const u16 init_complete[] = { 705 INIT_COMPLETE_NOTIF, 706 CALIB_RES_NOTIF_PHY_DB 707 }; 708 int ret; 709 710 if (iwl_mvm_has_unified_ucode(mvm)) 711 return iwl_run_unified_mvm_ucode(mvm); 712 713 lockdep_assert_held(&mvm->mutex); 714 715 mvm->rfkill_safe_init_done = false; 716 717 iwl_init_notification_wait(&mvm->notif_wait, 718 &calib_wait, 719 init_complete, 720 ARRAY_SIZE(init_complete), 721 iwl_wait_phy_db_entry, 722 mvm->phy_db); 723 724 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL); 725 726 /* Will also start the device */ 727 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_INIT); 728 if (ret) { 729 IWL_ERR(mvm, "Failed to start INIT ucode: %d\n", ret); 730 goto remove_notif; 731 } 732 733 if (mvm->trans->mac_cfg->device_family < IWL_DEVICE_FAMILY_8000) { 734 ret = iwl_mvm_send_bt_init_conf(mvm); 735 if (ret) 736 goto remove_notif; 737 } 738 739 /* Read the NVM only at driver load time, no need to do this twice */ 740 if (!mvm->nvm_data) { 741 ret = iwl_nvm_init(mvm); 742 if (ret) { 743 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret); 744 goto remove_notif; 745 } 746 } 747 748 /* In case we read the NVM from external file, load it to the NIC */ 749 if (mvm->nvm_file_name) { 750 ret = iwl_mvm_load_nvm_to_nic(mvm); 751 if (ret) 752 goto remove_notif; 753 } 754 755 WARN_ONCE(mvm->nvm_data->nvm_version < mvm->trans->cfg->nvm_ver, 756 "Too old NVM version (0x%0x, required = 0x%0x)", 757 mvm->nvm_data->nvm_version, mvm->trans->cfg->nvm_ver); 758 759 /* 760 * abort after reading the nvm in case RF Kill is on, we will complete 761 * the init seq later when RF kill will switch to off 762 */ 763 if (iwl_mvm_is_radio_hw_killed(mvm)) { 764 IWL_DEBUG_RF_KILL(mvm, 765 "jump over all phy activities due to RF kill\n"); 766 goto remove_notif; 767 } 768 769 mvm->rfkill_safe_init_done = true; 770 771 /* Send TX valid antennas before triggering calibrations */ 772 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); 773 if (ret) 774 goto remove_notif; 775 776 ret = iwl_send_phy_cfg_cmd(mvm); 777 if (ret) { 778 IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n", 779 ret); 780 goto remove_notif; 781 } 782 783 /* 784 * Some things may run in the background now, but we 785 * just wait for the calibration complete notification. 786 */ 787 ret = iwl_wait_notification(&mvm->notif_wait, &calib_wait, 788 MVM_UCODE_CALIB_TIMEOUT); 789 if (!ret) 790 goto out; 791 792 if (iwl_mvm_is_radio_hw_killed(mvm)) { 793 IWL_DEBUG_RF_KILL(mvm, "RFKILL while calibrating.\n"); 794 ret = 0; 795 } else { 796 IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n", 797 ret); 798 } 799 800 goto out; 801 802 remove_notif: 803 iwl_remove_notification(&mvm->notif_wait, &calib_wait); 804 out: 805 mvm->rfkill_safe_init_done = false; 806 if (!mvm->nvm_data) { 807 /* we want to debug INIT and we have no NVM - fake */ 808 mvm->nvm_data = kzalloc(sizeof(struct iwl_nvm_data) + 809 sizeof(struct ieee80211_channel) + 810 sizeof(struct ieee80211_rate), 811 GFP_KERNEL); 812 if (!mvm->nvm_data) 813 return -ENOMEM; 814 mvm->nvm_data->bands[0].channels = mvm->nvm_data->channels; 815 mvm->nvm_data->bands[0].n_channels = 1; 816 mvm->nvm_data->bands[0].n_bitrates = 1; 817 mvm->nvm_data->bands[0].bitrates = 818 (void *)(mvm->nvm_data->channels + 1); 819 mvm->nvm_data->bands[0].bitrates->hw_value = 10; 820 } 821 822 return ret; 823 } 824 825 static int iwl_mvm_config_ltr(struct iwl_mvm *mvm) 826 { 827 struct iwl_ltr_config_cmd cmd = { 828 .flags = cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE), 829 }; 830 831 if (!iwl_trans_is_ltr_enabled(mvm->trans)) 832 return 0; 833 834 return iwl_mvm_send_cmd_pdu(mvm, LTR_CONFIG, 0, 835 sizeof(cmd), &cmd); 836 } 837 838 int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a, int prof_b) 839 { 840 u32 cmd_id = REDUCE_TX_POWER_CMD; 841 struct iwl_dev_tx_power_cmd_v3_v8 cmd = { 842 .common.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_CHAINS), 843 }; 844 struct iwl_dev_tx_power_cmd cmd_v9_v10 = { 845 .common.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_CHAINS), 846 }; 847 __le16 *per_chain; 848 int ret; 849 u16 len = 0; 850 u32 n_subbands; 851 u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id, 3); 852 void *cmd_data = &cmd; 853 854 if (cmd_ver == 10) { 855 len = sizeof(cmd_v9_v10.v10); 856 n_subbands = IWL_NUM_SUB_BANDS_V2; 857 per_chain = &cmd_v9_v10.v10.per_chain[0][0][0]; 858 cmd_v9_v10.v10.flags = 859 cpu_to_le32(mvm->fwrt.reduced_power_flags); 860 } else if (cmd_ver == 9) { 861 len = sizeof(cmd_v9_v10.v9); 862 n_subbands = IWL_NUM_SUB_BANDS_V1; 863 per_chain = &cmd_v9_v10.v9.per_chain[0][0]; 864 } else if (cmd_ver == 8) { 865 len = sizeof(cmd.v8); 866 n_subbands = IWL_NUM_SUB_BANDS_V2; 867 per_chain = cmd.v8.per_chain[0][0]; 868 cmd.v8.flags = cpu_to_le32(mvm->fwrt.reduced_power_flags); 869 } else if (fw_has_api(&mvm->fw->ucode_capa, 870 IWL_UCODE_TLV_API_REDUCE_TX_POWER)) { 871 len = sizeof(cmd.v5); 872 n_subbands = IWL_NUM_SUB_BANDS_V1; 873 per_chain = cmd.v5.per_chain[0][0]; 874 } else if (fw_has_capa(&mvm->fw->ucode_capa, 875 IWL_UCODE_TLV_CAPA_TX_POWER_ACK)) { 876 len = sizeof(cmd.v4); 877 n_subbands = IWL_NUM_SUB_BANDS_V1; 878 per_chain = cmd.v4.per_chain[0][0]; 879 } else { 880 len = sizeof(cmd.v3); 881 n_subbands = IWL_NUM_SUB_BANDS_V1; 882 per_chain = cmd.v3.per_chain[0][0]; 883 } 884 885 /* all structs have the same common part, add its length */ 886 len += sizeof(cmd.common); 887 888 if (cmd_ver < 9) 889 len += sizeof(cmd.per_band); 890 else 891 cmd_data = &cmd_v9_v10; 892 893 ret = iwl_sar_fill_profile(&mvm->fwrt, per_chain, 894 IWL_NUM_CHAIN_TABLES, 895 n_subbands, prof_a, prof_b); 896 897 /* return on error or if the profile is disabled (positive number) */ 898 if (ret) 899 return ret; 900 901 iwl_mei_set_power_limit(per_chain); 902 903 IWL_DEBUG_RADIO(mvm, "Sending REDUCE_TX_POWER_CMD per chain\n"); 904 return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, len, cmd_data); 905 } 906 907 int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm) 908 { 909 union iwl_geo_tx_power_profiles_cmd geo_tx_cmd; 910 struct iwl_geo_tx_power_profiles_resp *resp; 911 u16 len; 912 int ret; 913 struct iwl_host_cmd cmd = { 914 .id = WIDE_ID(PHY_OPS_GROUP, PER_CHAIN_LIMIT_OFFSET_CMD), 915 .flags = CMD_WANT_SKB, 916 .data = { &geo_tx_cmd }, 917 }; 918 u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd.id, 919 IWL_FW_CMD_VER_UNKNOWN); 920 921 /* the ops field is at the same spot for all versions, so set in v1 */ 922 geo_tx_cmd.v1.ops = 923 cpu_to_le32(IWL_PER_CHAIN_OFFSET_GET_CURRENT_TABLE); 924 925 if (cmd_ver == 5) 926 len = sizeof(geo_tx_cmd.v5); 927 else if (cmd_ver == 4) 928 len = sizeof(geo_tx_cmd.v4); 929 else if (cmd_ver == 3) 930 len = sizeof(geo_tx_cmd.v3); 931 else if (fw_has_api(&mvm->fwrt.fw->ucode_capa, 932 IWL_UCODE_TLV_API_SAR_TABLE_VER)) 933 len = sizeof(geo_tx_cmd.v2); 934 else 935 len = sizeof(geo_tx_cmd.v1); 936 937 if (!iwl_sar_geo_support(&mvm->fwrt)) 938 return -EOPNOTSUPP; 939 940 cmd.len[0] = len; 941 942 ret = iwl_mvm_send_cmd(mvm, &cmd); 943 if (ret) { 944 IWL_ERR(mvm, "Failed to get geographic profile info %d\n", ret); 945 return ret; 946 } 947 948 resp = (void *)cmd.resp_pkt->data; 949 ret = le32_to_cpu(resp->profile_idx); 950 951 if (WARN_ON(ret > BIOS_GEO_MAX_PROFILE_NUM)) 952 ret = -EIO; 953 954 iwl_free_resp(&cmd); 955 return ret; 956 } 957 958 static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm) 959 { 960 u32 cmd_id = WIDE_ID(PHY_OPS_GROUP, PER_CHAIN_LIMIT_OFFSET_CMD); 961 union iwl_geo_tx_power_profiles_cmd cmd; 962 u16 len; 963 u32 n_bands; 964 u32 n_profiles; 965 __le32 sk = cpu_to_le32(0); 966 int ret; 967 u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id, 968 IWL_FW_CMD_VER_UNKNOWN); 969 970 BUILD_BUG_ON(offsetof(struct iwl_geo_tx_power_profiles_cmd_v1, ops) != 971 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, ops) || 972 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, ops) != 973 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, ops) || 974 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, ops) != 975 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, ops) || 976 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, ops) != 977 offsetof(struct iwl_geo_tx_power_profiles_cmd_v5, ops)); 978 979 /* the ops field is at the same spot for all versions, so set in v1 */ 980 cmd.v1.ops = cpu_to_le32(IWL_PER_CHAIN_OFFSET_SET_TABLES); 981 982 /* Only set to South Korea if the table revision is 1 */ 983 if (mvm->fwrt.geo_rev == 1) 984 sk = cpu_to_le32(1); 985 986 if (cmd_ver == 5) { 987 len = sizeof(cmd.v5); 988 n_bands = ARRAY_SIZE(cmd.v5.table[0]); 989 n_profiles = BIOS_GEO_MAX_PROFILE_NUM; 990 cmd.v5.table_revision = sk; 991 } else if (cmd_ver == 4) { 992 len = sizeof(cmd.v4); 993 n_bands = ARRAY_SIZE(cmd.v4.table[0]); 994 n_profiles = BIOS_GEO_MAX_PROFILE_NUM; 995 cmd.v4.table_revision = sk; 996 } else if (cmd_ver == 3) { 997 len = sizeof(cmd.v3); 998 n_bands = ARRAY_SIZE(cmd.v3.table[0]); 999 n_profiles = BIOS_GEO_MIN_PROFILE_NUM; 1000 cmd.v3.table_revision = sk; 1001 } else if (fw_has_api(&mvm->fwrt.fw->ucode_capa, 1002 IWL_UCODE_TLV_API_SAR_TABLE_VER)) { 1003 len = sizeof(cmd.v2); 1004 n_bands = ARRAY_SIZE(cmd.v2.table[0]); 1005 n_profiles = BIOS_GEO_MIN_PROFILE_NUM; 1006 cmd.v2.table_revision = sk; 1007 } else { 1008 len = sizeof(cmd.v1); 1009 n_bands = ARRAY_SIZE(cmd.v1.table[0]); 1010 n_profiles = BIOS_GEO_MIN_PROFILE_NUM; 1011 } 1012 1013 BUILD_BUG_ON(offsetof(struct iwl_geo_tx_power_profiles_cmd_v1, table) != 1014 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, table) || 1015 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, table) != 1016 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, table) || 1017 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, table) != 1018 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, table) || 1019 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, table) != 1020 offsetof(struct iwl_geo_tx_power_profiles_cmd_v5, table)); 1021 /* the table is at the same position for all versions, so set use v1 */ 1022 ret = iwl_sar_geo_fill_table(&mvm->fwrt, &cmd.v1.table[0][0], 1023 n_bands, n_profiles); 1024 1025 /* 1026 * It is a valid scenario to not support SAR, or miss wgds table, 1027 * but in that case there is no need to send the command. 1028 */ 1029 if (ret) 1030 return 0; 1031 1032 return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, len, &cmd); 1033 } 1034 1035 int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm) 1036 { 1037 union iwl_ppag_table_cmd cmd; 1038 int ret, cmd_size; 1039 1040 ret = iwl_fill_ppag_table(&mvm->fwrt, &cmd, &cmd_size); 1041 /* Not supporting PPAG table is a valid scenario */ 1042 if (ret < 0) 1043 return 0; 1044 1045 IWL_DEBUG_RADIO(mvm, "Sending PER_PLATFORM_ANT_GAIN_CMD\n"); 1046 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(PHY_OPS_GROUP, 1047 PER_PLATFORM_ANT_GAIN_CMD), 1048 0, cmd_size, &cmd); 1049 if (ret < 0) 1050 IWL_ERR(mvm, "failed to send PER_PLATFORM_ANT_GAIN_CMD (%d)\n", 1051 ret); 1052 1053 return ret; 1054 } 1055 1056 static int iwl_mvm_ppag_init(struct iwl_mvm *mvm) 1057 { 1058 /* no need to read the table, done in INIT stage */ 1059 if (!(iwl_is_ppag_approved(&mvm->fwrt))) 1060 return 0; 1061 1062 return iwl_mvm_ppag_send_cmd(mvm); 1063 } 1064 1065 static void iwl_mvm_tas_init(struct iwl_mvm *mvm) 1066 { 1067 u32 cmd_id = WIDE_ID(REGULATORY_AND_NVM_GROUP, TAS_CONFIG); 1068 int fw_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id, 1069 IWL_FW_CMD_VER_UNKNOWN); 1070 struct iwl_tas_selection_data selection_data = {}; 1071 struct iwl_tas_config_cmd_v2_v4 cmd_v2_v4 = {}; 1072 struct iwl_tas_config_cmd cmd_v5 = {}; 1073 struct iwl_tas_data data = {}; 1074 void *cmd_data = &cmd_v2_v4; 1075 int cmd_size; 1076 int ret; 1077 1078 BUILD_BUG_ON(ARRAY_SIZE(data.block_list_array) != 1079 IWL_WTAS_BLACK_LIST_MAX); 1080 BUILD_BUG_ON(ARRAY_SIZE(cmd_v2_v4.common.block_list_array) != 1081 IWL_WTAS_BLACK_LIST_MAX); 1082 BUILD_BUG_ON(ARRAY_SIZE(cmd_v5.block_list_array) != 1083 IWL_WTAS_BLACK_LIST_MAX); 1084 1085 if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_TAS_CFG)) { 1086 IWL_DEBUG_RADIO(mvm, "TAS not enabled in FW\n"); 1087 return; 1088 } 1089 1090 ret = iwl_bios_get_tas_table(&mvm->fwrt, &data); 1091 if (ret < 0) { 1092 IWL_DEBUG_RADIO(mvm, 1093 "TAS table invalid or unavailable. (%d)\n", 1094 ret); 1095 return; 1096 } 1097 1098 if (ret == 0 && fw_ver < 5) 1099 return; 1100 1101 if (!iwl_is_tas_approved()) { 1102 IWL_DEBUG_RADIO(mvm, 1103 "System vendor '%s' is not in the approved list, disabling TAS in US and Canada.\n", 1104 dmi_get_system_info(DMI_SYS_VENDOR) ?: "<unknown>"); 1105 if ((!iwl_add_mcc_to_tas_block_list(data.block_list_array, 1106 &data.block_list_size, 1107 IWL_MCC_US)) || 1108 (!iwl_add_mcc_to_tas_block_list(data.block_list_array, 1109 &data.block_list_size, 1110 IWL_MCC_CANADA))) { 1111 IWL_DEBUG_RADIO(mvm, 1112 "Unable to add US/Canada to TAS block list, disabling TAS\n"); 1113 return; 1114 } 1115 } else { 1116 IWL_DEBUG_RADIO(mvm, 1117 "System vendor '%s' is in the approved list.\n", 1118 dmi_get_system_info(DMI_SYS_VENDOR) ?: "<unknown>"); 1119 } 1120 1121 if (fw_ver < 5) { 1122 selection_data = iwl_parse_tas_selection(data.tas_selection, 1123 data.table_revision); 1124 cmd_v2_v4.common.block_list_size = 1125 cpu_to_le32(data.block_list_size); 1126 for (u8 i = 0; i < data.block_list_size; i++) 1127 cmd_v2_v4.common.block_list_array[i] = 1128 cpu_to_le32(data.block_list_array[i]); 1129 } 1130 1131 if (fw_ver == 5) { 1132 cmd_size = sizeof(cmd_v5); 1133 cmd_data = &cmd_v5; 1134 cmd_v5.block_list_size = cpu_to_le16(data.block_list_size); 1135 for (u16 i = 0; i < data.block_list_size; i++) 1136 cmd_v5.block_list_array[i] = 1137 cpu_to_le16(data.block_list_array[i]); 1138 cmd_v5.tas_config_info.hdr.table_source = data.table_source; 1139 cmd_v5.tas_config_info.hdr.table_revision = 1140 data.table_revision; 1141 cmd_v5.tas_config_info.value = cpu_to_le32(data.tas_selection); 1142 } else if (fw_ver == 4) { 1143 cmd_size = sizeof(cmd_v2_v4.common) + sizeof(cmd_v2_v4.v4); 1144 cmd_v2_v4.v4.override_tas_iec = selection_data.override_tas_iec; 1145 cmd_v2_v4.v4.enable_tas_iec = selection_data.enable_tas_iec; 1146 cmd_v2_v4.v4.usa_tas_uhb_allowed = 1147 selection_data.usa_tas_uhb_allowed; 1148 if (fw_has_capa(&mvm->fw->ucode_capa, 1149 IWL_UCODE_TLV_CAPA_UHB_CANADA_TAS_SUPPORT) && 1150 selection_data.canada_tas_uhb_allowed) 1151 cmd_v2_v4.v4.uhb_allowed_flags = TAS_UHB_ALLOWED_CANADA; 1152 } else if (fw_ver == 3) { 1153 cmd_size = sizeof(cmd_v2_v4.common) + sizeof(cmd_v2_v4.v3); 1154 cmd_v2_v4.v3.override_tas_iec = 1155 cpu_to_le16(selection_data.override_tas_iec); 1156 cmd_v2_v4.v3.enable_tas_iec = 1157 cpu_to_le16(selection_data.enable_tas_iec); 1158 } else if (fw_ver == 2) { 1159 cmd_size = sizeof(cmd_v2_v4.common); 1160 } else { 1161 return; 1162 } 1163 1164 ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, cmd_size, cmd_data); 1165 if (ret < 0) 1166 IWL_DEBUG_RADIO(mvm, "failed to send TAS_CONFIG (%d)\n", ret); 1167 } 1168 1169 static __le32 iwl_mvm_get_lari_config_bitmap(struct iwl_fw_runtime *fwrt) 1170 { 1171 int ret; 1172 u32 val; 1173 __le32 config_bitmap = 0; 1174 1175 switch (CSR_HW_RFID_TYPE(fwrt->trans->info.hw_rf_id)) { 1176 case IWL_CFG_RF_TYPE_HR1: 1177 case IWL_CFG_RF_TYPE_HR2: 1178 case IWL_CFG_RF_TYPE_JF1: 1179 case IWL_CFG_RF_TYPE_JF2: 1180 ret = iwl_bios_get_dsm(fwrt, DSM_FUNC_ENABLE_INDONESIA_5G2, 1181 &val); 1182 1183 if (!ret && val == DSM_VALUE_INDONESIA_ENABLE) 1184 config_bitmap |= 1185 cpu_to_le32(LARI_CONFIG_ENABLE_5G2_IN_INDONESIA_MSK); 1186 break; 1187 default: 1188 break; 1189 } 1190 1191 ret = iwl_bios_get_dsm(fwrt, DSM_FUNC_DISABLE_SRD, &val); 1192 if (!ret) { 1193 if (val == DSM_VALUE_SRD_PASSIVE) 1194 config_bitmap |= 1195 cpu_to_le32(LARI_CONFIG_CHANGE_ETSI_TO_PASSIVE_MSK); 1196 else if (val == DSM_VALUE_SRD_DISABLE) 1197 config_bitmap |= 1198 cpu_to_le32(LARI_CONFIG_CHANGE_ETSI_TO_DISABLED_MSK); 1199 } 1200 1201 if (fw_has_capa(&fwrt->fw->ucode_capa, 1202 IWL_UCODE_TLV_CAPA_CHINA_22_REG_SUPPORT)) { 1203 ret = iwl_bios_get_dsm(fwrt, DSM_FUNC_REGULATORY_CONFIG, 1204 &val); 1205 /* 1206 * China 2022 enable if the BIOS object does not exist or 1207 * if it is enabled in BIOS. 1208 */ 1209 if (ret < 0 || val & DSM_MASK_CHINA_22_REG) 1210 config_bitmap |= 1211 cpu_to_le32(LARI_CONFIG_ENABLE_CHINA_22_REG_SUPPORT_MSK); 1212 } 1213 1214 return config_bitmap; 1215 } 1216 1217 static size_t iwl_mvm_get_lari_config_cmd_size(u8 cmd_ver) 1218 { 1219 size_t cmd_size; 1220 1221 switch (cmd_ver) { 1222 case 12: 1223 cmd_size = offsetof(struct iwl_lari_config_change_cmd, 1224 oem_11bn_allow_bitmap); 1225 break; 1226 case 8: 1227 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v8); 1228 break; 1229 case 6: 1230 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v6); 1231 break; 1232 default: 1233 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v1); 1234 break; 1235 } 1236 return cmd_size; 1237 } 1238 1239 static int iwl_mvm_fill_lari_config(struct iwl_fw_runtime *fwrt, 1240 struct iwl_lari_config_change_cmd *cmd, 1241 size_t *cmd_size) 1242 { 1243 int ret; 1244 u32 value; 1245 bool has_raw_dsm_capa = fw_has_capa(&fwrt->fw->ucode_capa, 1246 IWL_UCODE_TLV_CAPA_FW_ACCEPTS_RAW_DSM_TABLE); 1247 u8 cmd_ver = iwl_fw_lookup_cmd_ver(fwrt->fw, 1248 WIDE_ID(REGULATORY_AND_NVM_GROUP, 1249 LARI_CONFIG_CHANGE), 1); 1250 1251 memset(cmd, 0, sizeof(*cmd)); 1252 *cmd_size = iwl_mvm_get_lari_config_cmd_size(cmd_ver); 1253 1254 cmd->config_bitmap = iwl_mvm_get_lari_config_bitmap(fwrt); 1255 1256 ret = iwl_bios_get_dsm(fwrt, DSM_FUNC_11AX_ENABLEMENT, &value); 1257 if (!ret) { 1258 if (!has_raw_dsm_capa) 1259 value &= DSM_11AX_ALLOW_BITMAP; 1260 cmd->oem_11ax_allow_bitmap = cpu_to_le32(value); 1261 } 1262 1263 ret = iwl_bios_get_dsm(fwrt, DSM_FUNC_ENABLE_UNII4_CHAN, &value); 1264 if (!ret) { 1265 if (!has_raw_dsm_capa) 1266 value &= DSM_UNII4_ALLOW_BITMAP; 1267 1268 /* Since version 12, bits 4 and 5 are supported 1269 * regardless of this capability, By pass this masking 1270 * if firmware has capability of accepting raw DSM table. 1271 */ 1272 if (!has_raw_dsm_capa && cmd_ver < 12 && 1273 !fw_has_capa(&fwrt->fw->ucode_capa, 1274 IWL_UCODE_TLV_CAPA_BIOS_OVERRIDE_5G9_FOR_CA)) 1275 value &= ~(DSM_VALUE_UNII4_CANADA_OVERRIDE_MSK | 1276 DSM_VALUE_UNII4_CANADA_EN_MSK); 1277 1278 cmd->oem_unii4_allow_bitmap = cpu_to_le32(value); 1279 } 1280 1281 ret = iwl_bios_get_dsm(fwrt, DSM_FUNC_ACTIVATE_CHANNEL, &value); 1282 if (!ret) { 1283 if (!has_raw_dsm_capa) 1284 value &= CHAN_STATE_ACTIVE_BITMAP_CMD_V12; 1285 1286 if (!has_raw_dsm_capa && cmd_ver < 8) 1287 value &= ~ACTIVATE_5G2_IN_WW_MASK; 1288 1289 /* Since version 12, bits 5 and 6 are supported 1290 * regardless of this capability, By pass this masking 1291 * if firmware has capability of accepting raw DSM table. 1292 */ 1293 if (!has_raw_dsm_capa && cmd_ver < 12 && 1294 !fw_has_capa(&fwrt->fw->ucode_capa, 1295 IWL_UCODE_TLV_CAPA_BIOS_OVERRIDE_UNII4_US_CA)) 1296 value &= CHAN_STATE_ACTIVE_BITMAP_CMD_V8; 1297 1298 cmd->chan_state_active_bitmap = cpu_to_le32(value); 1299 } 1300 1301 ret = iwl_bios_get_dsm(fwrt, DSM_FUNC_ENABLE_6E, &value); 1302 if (!ret) 1303 cmd->oem_uhb_allow_bitmap = cpu_to_le32(value); 1304 1305 ret = iwl_bios_get_dsm(fwrt, DSM_FUNC_FORCE_DISABLE_CHANNELS, &value); 1306 if (!ret) { 1307 if (!has_raw_dsm_capa) 1308 value &= DSM_FORCE_DISABLE_CHANNELS_ALLOWED_BITMAP; 1309 cmd->force_disable_channels_bitmap = cpu_to_le32(value); 1310 } 1311 1312 ret = iwl_bios_get_dsm(fwrt, DSM_FUNC_ENERGY_DETECTION_THRESHOLD, 1313 &value); 1314 if (!ret) { 1315 if (!has_raw_dsm_capa) 1316 value &= DSM_EDT_ALLOWED_BITMAP; 1317 cmd->edt_bitmap = cpu_to_le32(value); 1318 } 1319 1320 ret = iwl_bios_get_wbem(fwrt, &value); 1321 if (!ret) 1322 cmd->oem_320mhz_allow_bitmap = cpu_to_le32(value); 1323 1324 ret = iwl_bios_get_dsm(fwrt, DSM_FUNC_ENABLE_11BE, &value); 1325 if (!ret) 1326 cmd->oem_11be_allow_bitmap = cpu_to_le32(value); 1327 1328 if (cmd->config_bitmap || 1329 cmd->oem_uhb_allow_bitmap || 1330 cmd->oem_11ax_allow_bitmap || 1331 cmd->oem_unii4_allow_bitmap || 1332 cmd->chan_state_active_bitmap || 1333 cmd->force_disable_channels_bitmap || 1334 cmd->edt_bitmap || 1335 cmd->oem_320mhz_allow_bitmap || 1336 cmd->oem_11be_allow_bitmap) { 1337 IWL_DEBUG_RADIO(fwrt, 1338 "sending LARI_CONFIG_CHANGE, config_bitmap=0x%x, oem_11ax_allow_bitmap=0x%x\n", 1339 le32_to_cpu(cmd->config_bitmap), 1340 le32_to_cpu(cmd->oem_11ax_allow_bitmap)); 1341 IWL_DEBUG_RADIO(fwrt, 1342 "sending LARI_CONFIG_CHANGE, oem_unii4_allow_bitmap=0x%x, chan_state_active_bitmap=0x%x, cmd_ver=%d\n", 1343 le32_to_cpu(cmd->oem_unii4_allow_bitmap), 1344 le32_to_cpu(cmd->chan_state_active_bitmap), 1345 cmd_ver); 1346 IWL_DEBUG_RADIO(fwrt, 1347 "sending LARI_CONFIG_CHANGE, oem_uhb_allow_bitmap=0x%x, force_disable_channels_bitmap=0x%x\n", 1348 le32_to_cpu(cmd->oem_uhb_allow_bitmap), 1349 le32_to_cpu(cmd->force_disable_channels_bitmap)); 1350 IWL_DEBUG_RADIO(fwrt, 1351 "sending LARI_CONFIG_CHANGE, edt_bitmap=0x%x, oem_320mhz_allow_bitmap=0x%x\n", 1352 le32_to_cpu(cmd->edt_bitmap), 1353 le32_to_cpu(cmd->oem_320mhz_allow_bitmap)); 1354 IWL_DEBUG_RADIO(fwrt, 1355 "sending LARI_CONFIG_CHANGE, oem_11be_allow_bitmap=0x%x\n", 1356 le32_to_cpu(cmd->oem_11be_allow_bitmap)); 1357 } else { 1358 return 1; 1359 } 1360 1361 return 0; 1362 } 1363 1364 static void iwl_mvm_lari_cfg(struct iwl_mvm *mvm) 1365 { 1366 struct iwl_lari_config_change_cmd cmd; 1367 size_t cmd_size; 1368 int ret; 1369 1370 ret = iwl_mvm_fill_lari_config(&mvm->fwrt, &cmd, &cmd_size); 1371 if (!ret) { 1372 ret = iwl_mvm_send_cmd_pdu(mvm, 1373 WIDE_ID(REGULATORY_AND_NVM_GROUP, 1374 LARI_CONFIG_CHANGE), 1375 0, cmd_size, &cmd); 1376 if (ret < 0) 1377 IWL_DEBUG_RADIO(mvm, 1378 "Failed to send LARI_CONFIG_CHANGE (%d)\n", 1379 ret); 1380 } 1381 } 1382 1383 void iwl_mvm_get_bios_tables(struct iwl_mvm *mvm) 1384 { 1385 int ret; 1386 1387 iwl_acpi_get_guid_lock_status(&mvm->fwrt); 1388 1389 /* read PPAG table */ 1390 ret = iwl_bios_get_ppag_table(&mvm->fwrt); 1391 if (ret < 0) { 1392 IWL_DEBUG_RADIO(mvm, 1393 "PPAG BIOS table invalid or unavailable. (%d)\n", 1394 ret); 1395 } 1396 1397 /* read SAR tables */ 1398 ret = iwl_bios_get_wrds_table(&mvm->fwrt); 1399 if (ret < 0) { 1400 IWL_DEBUG_RADIO(mvm, 1401 "WRDS SAR BIOS table invalid or unavailable. (%d)\n", 1402 ret); 1403 /* 1404 * If not available, don't fail and don't bother with EWRD and 1405 * WGDS */ 1406 1407 if (!iwl_bios_get_wgds_table(&mvm->fwrt)) { 1408 /* 1409 * If basic SAR is not available, we check for WGDS, 1410 * which should *not* be available either. If it is 1411 * available, issue an error, because we can't use SAR 1412 * Geo without basic SAR. 1413 */ 1414 IWL_ERR(mvm, "BIOS contains WGDS but no WRDS\n"); 1415 } 1416 1417 } else { 1418 ret = iwl_bios_get_ewrd_table(&mvm->fwrt); 1419 /* if EWRD is not available, we can still use 1420 * WRDS, so don't fail */ 1421 if (ret < 0) 1422 IWL_DEBUG_RADIO(mvm, 1423 "EWRD SAR BIOS table invalid or unavailable. (%d)\n", 1424 ret); 1425 1426 /* read geo SAR table */ 1427 if (iwl_sar_geo_support(&mvm->fwrt)) { 1428 ret = iwl_bios_get_wgds_table(&mvm->fwrt); 1429 if (ret < 0) 1430 IWL_DEBUG_RADIO(mvm, 1431 "Geo SAR BIOS table invalid or unavailable. (%d)\n", 1432 ret); 1433 /* we don't fail if the table is not available */ 1434 } 1435 } 1436 1437 iwl_acpi_get_phy_filters(&mvm->fwrt); 1438 1439 if (iwl_bios_get_eckv(&mvm->fwrt, &mvm->ext_clock_valid)) 1440 IWL_DEBUG_RADIO(mvm, "ECKV table doesn't exist in BIOS\n"); 1441 } 1442 1443 static void iwl_mvm_disconnect_iterator(void *data, u8 *mac, 1444 struct ieee80211_vif *vif) 1445 { 1446 if (vif->type == NL80211_IFTYPE_STATION) 1447 ieee80211_hw_restart_disconnect(vif); 1448 } 1449 1450 void iwl_mvm_send_recovery_cmd(struct iwl_mvm *mvm, u32 flags) 1451 { 1452 u32 error_log_size = mvm->fw->ucode_capa.error_log_size; 1453 u32 status = 0; 1454 int ret; 1455 1456 struct iwl_fw_error_recovery_cmd recovery_cmd = { 1457 .flags = cpu_to_le32(flags), 1458 .buf_size = 0, 1459 }; 1460 struct iwl_host_cmd host_cmd = { 1461 .id = WIDE_ID(SYSTEM_GROUP, FW_ERROR_RECOVERY_CMD), 1462 .data = {&recovery_cmd, }, 1463 .len = {sizeof(recovery_cmd), }, 1464 }; 1465 1466 /* no error log was defined in TLV */ 1467 if (!error_log_size) 1468 return; 1469 1470 if (flags & ERROR_RECOVERY_UPDATE_DB) { 1471 /* no buf was allocated while HW reset */ 1472 if (!mvm->error_recovery_buf) 1473 return; 1474 1475 host_cmd.data[1] = mvm->error_recovery_buf; 1476 host_cmd.len[1] = error_log_size; 1477 host_cmd.dataflags[1] = IWL_HCMD_DFL_NOCOPY; 1478 recovery_cmd.buf_size = cpu_to_le32(error_log_size); 1479 } 1480 1481 ret = iwl_mvm_send_cmd_status(mvm, &host_cmd, &status); 1482 kfree(mvm->error_recovery_buf); 1483 mvm->error_recovery_buf = NULL; 1484 1485 if (ret) { 1486 IWL_ERR(mvm, "Failed to send recovery cmd %d\n", ret); 1487 return; 1488 } 1489 1490 /* skb respond is only relevant in ERROR_RECOVERY_UPDATE_DB */ 1491 if (flags & ERROR_RECOVERY_UPDATE_DB) { 1492 if (status) { 1493 IWL_ERR(mvm, 1494 "Failed to send recovery cmd blob was invalid %d\n", 1495 status); 1496 1497 ieee80211_iterate_interfaces(mvm->hw, 0, 1498 iwl_mvm_disconnect_iterator, 1499 mvm); 1500 } 1501 } 1502 } 1503 1504 static int iwl_mvm_sar_init(struct iwl_mvm *mvm) 1505 { 1506 return iwl_mvm_sar_select_profile(mvm, 1, 1); 1507 } 1508 1509 static int iwl_mvm_load_rt_fw(struct iwl_mvm *mvm) 1510 { 1511 int ret; 1512 1513 if (iwl_mvm_has_unified_ucode(mvm)) 1514 return iwl_run_unified_mvm_ucode(mvm); 1515 1516 ret = iwl_run_init_mvm_ucode(mvm); 1517 1518 if (ret) { 1519 IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", ret); 1520 return ret; 1521 } 1522 1523 iwl_fw_dbg_stop_sync(&mvm->fwrt); 1524 iwl_trans_stop_device(mvm->trans); 1525 ret = iwl_trans_start_hw(mvm->trans); 1526 if (ret) 1527 return ret; 1528 1529 mvm->rfkill_safe_init_done = false; 1530 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR); 1531 if (ret) 1532 return ret; 1533 1534 mvm->rfkill_safe_init_done = true; 1535 1536 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE, 1537 NULL); 1538 1539 return iwl_init_paging(&mvm->fwrt, mvm->fwrt.cur_fw_img); 1540 } 1541 1542 int iwl_mvm_up(struct iwl_mvm *mvm) 1543 { 1544 int ret, i; 1545 struct ieee80211_supported_band *sband = NULL; 1546 1547 lockdep_assert_wiphy(mvm->hw->wiphy); 1548 lockdep_assert_held(&mvm->mutex); 1549 1550 ret = iwl_trans_start_hw(mvm->trans); 1551 if (ret) 1552 return ret; 1553 1554 ret = iwl_mvm_load_rt_fw(mvm); 1555 if (ret) { 1556 IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret); 1557 if (ret != -ERFKILL && !mvm->fw_product_reset) 1558 iwl_fw_dbg_error_collect(&mvm->fwrt, 1559 FW_DBG_TRIGGER_DRIVER); 1560 goto error; 1561 } 1562 1563 /* FW loaded successfully */ 1564 mvm->fw_product_reset = false; 1565 1566 iwl_fw_disable_dbg_asserts(&mvm->fwrt); 1567 iwl_get_shared_mem_conf(&mvm->fwrt); 1568 1569 ret = iwl_mvm_sf_update(mvm, NULL, false); 1570 if (ret) 1571 IWL_ERR(mvm, "Failed to initialize Smart Fifo\n"); 1572 1573 if (!iwl_trans_dbg_ini_valid(mvm->trans)) { 1574 mvm->fwrt.dump.conf = FW_DBG_INVALID; 1575 /* if we have a destination, assume EARLY START */ 1576 if (mvm->fw->dbg.dest_tlv) 1577 mvm->fwrt.dump.conf = FW_DBG_START_FROM_ALIVE; 1578 iwl_fw_start_dbg_conf(&mvm->fwrt, FW_DBG_START_FROM_ALIVE); 1579 } 1580 1581 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); 1582 if (ret) 1583 goto error; 1584 1585 if (!iwl_mvm_has_unified_ucode(mvm)) { 1586 /* Send phy db control command and then phy db calibration */ 1587 ret = iwl_send_phy_db_data(mvm->phy_db); 1588 if (ret) 1589 goto error; 1590 ret = iwl_send_phy_cfg_cmd(mvm); 1591 if (ret) 1592 goto error; 1593 } 1594 1595 ret = iwl_mvm_send_bt_init_conf(mvm); 1596 if (ret) 1597 goto error; 1598 1599 if (fw_has_capa(&mvm->fw->ucode_capa, 1600 IWL_UCODE_TLV_CAPA_SOC_LATENCY_SUPPORT)) { 1601 ret = iwl_set_soc_latency(&mvm->fwrt); 1602 if (ret) 1603 goto error; 1604 } 1605 1606 iwl_mvm_lari_cfg(mvm); 1607 1608 /* Init RSS configuration */ 1609 ret = iwl_configure_rxq(&mvm->fwrt); 1610 if (ret) 1611 goto error; 1612 1613 if (iwl_mvm_has_new_rx_api(mvm)) { 1614 ret = iwl_send_rss_cfg_cmd(mvm); 1615 if (ret) { 1616 IWL_ERR(mvm, "Failed to configure RSS queues: %d\n", 1617 ret); 1618 goto error; 1619 } 1620 } 1621 1622 /* init the fw <-> mac80211 STA mapping */ 1623 for (i = 0; i < mvm->fw->ucode_capa.num_stations; i++) { 1624 RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL); 1625 RCU_INIT_POINTER(mvm->fw_id_to_link_sta[i], NULL); 1626 } 1627 1628 mvm->tdls_cs.peer.sta_id = IWL_INVALID_STA; 1629 1630 /* reset quota debouncing buffer - 0xff will yield invalid data */ 1631 memset(&mvm->last_quota_cmd, 0xff, sizeof(mvm->last_quota_cmd)); 1632 1633 if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_DQA_SUPPORT)) { 1634 ret = iwl_mvm_send_dqa_cmd(mvm); 1635 if (ret) 1636 goto error; 1637 } 1638 1639 /* 1640 * Add auxiliary station for scanning. 1641 * Newer versions of this command implies that the fw uses 1642 * internal aux station for all aux activities that don't 1643 * requires a dedicated data queue. 1644 */ 1645 if (!iwl_mvm_has_new_station_api(mvm->fw)) { 1646 /* 1647 * In old version the aux station uses mac id like other 1648 * station and not lmac id 1649 */ 1650 ret = iwl_mvm_add_aux_sta(mvm, MAC_INDEX_AUX); 1651 if (ret) 1652 goto error; 1653 } 1654 1655 /* Add all the PHY contexts */ 1656 i = 0; 1657 while (!sband && i < NUM_NL80211_BANDS) 1658 sband = mvm->hw->wiphy->bands[i++]; 1659 1660 if (WARN_ON_ONCE(!sband)) { 1661 ret = -ENODEV; 1662 goto error; 1663 } 1664 1665 if (iwl_mvm_is_tt_in_fw(mvm)) { 1666 /* in order to give the responsibility of ct-kill and 1667 * TX backoff to FW we need to send empty temperature reporting 1668 * cmd during init time 1669 */ 1670 iwl_mvm_send_temp_report_ths_cmd(mvm); 1671 } else { 1672 /* Initialize tx backoffs to the minimal possible */ 1673 iwl_mvm_tt_tx_backoff(mvm, 0); 1674 } 1675 1676 #ifdef CONFIG_THERMAL 1677 /* TODO: read the budget from BIOS / Platform NVM */ 1678 1679 /* 1680 * In case there is no budget from BIOS / Platform NVM the default 1681 * budget should be 2000mW (cooling state 0). 1682 */ 1683 if (iwl_mvm_is_ctdp_supported(mvm)) { 1684 ret = iwl_mvm_ctdp_command(mvm, CTDP_CMD_OPERATION_START, 1685 mvm->cooling_dev.cur_state); 1686 if (ret) 1687 goto error; 1688 } 1689 #endif 1690 1691 if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_SET_LTR_GEN2)) 1692 WARN_ON(iwl_mvm_config_ltr(mvm)); 1693 1694 ret = iwl_mvm_power_update_device(mvm); 1695 if (ret) 1696 goto error; 1697 1698 /* 1699 * RTNL is not taken during Ct-kill, but we don't need to scan/Tx 1700 * anyway, so don't init MCC. 1701 */ 1702 if (!test_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status)) { 1703 ret = iwl_mvm_init_mcc(mvm); 1704 if (ret) 1705 goto error; 1706 } 1707 1708 if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_UMAC_SCAN)) { 1709 mvm->scan_type = IWL_SCAN_TYPE_NOT_SET; 1710 mvm->hb_scan_type = IWL_SCAN_TYPE_NOT_SET; 1711 ret = iwl_mvm_config_scan(mvm); 1712 if (ret) 1713 goto error; 1714 } 1715 1716 if (test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status)) { 1717 iwl_mvm_send_recovery_cmd(mvm, ERROR_RECOVERY_UPDATE_DB); 1718 1719 if (mvm->time_sync.active) 1720 iwl_mvm_time_sync_config(mvm, mvm->time_sync.peer_addr, 1721 IWL_TIME_SYNC_PROTOCOL_TM | 1722 IWL_TIME_SYNC_PROTOCOL_FTM); 1723 } 1724 1725 if (!mvm->ptp_data.ptp_clock) 1726 iwl_mvm_ptp_init(mvm); 1727 1728 ret = iwl_mvm_ppag_init(mvm); 1729 if (ret) 1730 goto error; 1731 1732 ret = iwl_mvm_sar_init(mvm); 1733 if (ret == 0) 1734 ret = iwl_mvm_sar_geo_init(mvm); 1735 if (ret < 0) 1736 goto error; 1737 1738 ret = iwl_mvm_sgom_init(mvm); 1739 if (ret) 1740 goto error; 1741 1742 iwl_mvm_tas_init(mvm); 1743 iwl_mvm_leds_sync(mvm); 1744 iwl_mvm_uats_init(mvm); 1745 1746 if (iwl_rfi_supported(mvm)) { 1747 if (iwl_rfi_is_enabled_in_bios(&mvm->fwrt)) 1748 iwl_rfi_send_config_cmd(mvm, NULL); 1749 } 1750 1751 iwl_mvm_mei_device_state(mvm, true); 1752 1753 IWL_DEBUG_INFO(mvm, "RT uCode started.\n"); 1754 return 0; 1755 error: 1756 iwl_mvm_stop_device(mvm); 1757 return ret; 1758 } 1759 1760 int iwl_mvm_load_d3_fw(struct iwl_mvm *mvm) 1761 { 1762 int ret, i; 1763 1764 lockdep_assert_wiphy(mvm->hw->wiphy); 1765 lockdep_assert_held(&mvm->mutex); 1766 1767 ret = iwl_trans_start_hw(mvm->trans); 1768 if (ret) 1769 return ret; 1770 1771 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_WOWLAN); 1772 if (ret) { 1773 IWL_ERR(mvm, "Failed to start WoWLAN firmware: %d\n", ret); 1774 goto error; 1775 } 1776 1777 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); 1778 if (ret) 1779 goto error; 1780 1781 /* Send phy db control command and then phy db calibration*/ 1782 ret = iwl_send_phy_db_data(mvm->phy_db); 1783 if (ret) 1784 goto error; 1785 1786 ret = iwl_send_phy_cfg_cmd(mvm); 1787 if (ret) 1788 goto error; 1789 1790 /* init the fw <-> mac80211 STA mapping */ 1791 for (i = 0; i < mvm->fw->ucode_capa.num_stations; i++) { 1792 RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL); 1793 RCU_INIT_POINTER(mvm->fw_id_to_link_sta[i], NULL); 1794 } 1795 1796 if (!iwl_mvm_has_new_station_api(mvm->fw)) { 1797 /* 1798 * Add auxiliary station for scanning. 1799 * Newer versions of this command implies that the fw uses 1800 * internal aux station for all aux activities that don't 1801 * requires a dedicated data queue. 1802 * In old version the aux station uses mac id like other 1803 * station and not lmac id 1804 */ 1805 ret = iwl_mvm_add_aux_sta(mvm, MAC_INDEX_AUX); 1806 if (ret) 1807 goto error; 1808 } 1809 1810 return 0; 1811 error: 1812 iwl_mvm_stop_device(mvm); 1813 return ret; 1814 } 1815 1816 void iwl_mvm_rx_mfuart_notif(struct iwl_mvm *mvm, 1817 struct iwl_rx_cmd_buffer *rxb) 1818 { 1819 struct iwl_rx_packet *pkt = rxb_addr(rxb); 1820 struct iwl_mfuart_load_notif *mfuart_notif = (void *)pkt->data; 1821 1822 IWL_DEBUG_INFO(mvm, 1823 "MFUART: installed ver: 0x%08x, external ver: 0x%08x, status: 0x%08x, duration: 0x%08x\n", 1824 le32_to_cpu(mfuart_notif->installed_ver), 1825 le32_to_cpu(mfuart_notif->external_ver), 1826 le32_to_cpu(mfuart_notif->status), 1827 le32_to_cpu(mfuart_notif->duration)); 1828 1829 if (iwl_rx_packet_payload_len(pkt) == sizeof(*mfuart_notif)) 1830 IWL_DEBUG_INFO(mvm, 1831 "MFUART: image size: 0x%08x\n", 1832 le32_to_cpu(mfuart_notif->image_size)); 1833 } 1834