xref: /linux/drivers/net/wireless/intel/iwlwifi/mvm/fw.c (revision 7bb377107c72a40ab7505341f8626c8eb79a0cb7)
1 /******************************************************************************
2  *
3  * This file is provided under a dual BSD/GPLv2 license.  When using or
4  * redistributing this file, you may do so under either license.
5  *
6  * GPL LICENSE SUMMARY
7  *
8  * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
9  * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
10  * Copyright(c) 2012 - 2014, 2018 - 2020 Intel Corporation
11  *
12  * This program is free software; you can redistribute it and/or modify
13  * it under the terms of version 2 of the GNU General Public License as
14  * published by the Free Software Foundation.
15  *
16  * This program is distributed in the hope that it will be useful, but
17  * WITHOUT ANY WARRANTY; without even the implied warranty of
18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
19  * General Public License for more details.
20  *
21  * The full GNU General Public License is included in this distribution
22  * in the file called COPYING.
23  *
24  * Contact Information:
25  *  Intel Linux Wireless <linuxwifi@intel.com>
26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27  *
28  * BSD LICENSE
29  *
30  * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
31  * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
32  * Copyright(c) 2012 - 2014, 2018 - 2020 Intel Corporation
33  * All rights reserved.
34  *
35  * Redistribution and use in source and binary forms, with or without
36  * modification, are permitted provided that the following conditions
37  * are met:
38  *
39  *  * Redistributions of source code must retain the above copyright
40  *    notice, this list of conditions and the following disclaimer.
41  *  * Redistributions in binary form must reproduce the above copyright
42  *    notice, this list of conditions and the following disclaimer in
43  *    the documentation and/or other materials provided with the
44  *    distribution.
45  *  * Neither the name Intel Corporation nor the names of its
46  *    contributors may be used to endorse or promote products derived
47  *    from this software without specific prior written permission.
48  *
49  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
50  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
51  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
52  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
53  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
54  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
55  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
56  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
57  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
58  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
59  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
60  *
61  *****************************************************************************/
62 #include <net/mac80211.h>
63 #include <linux/netdevice.h>
64 
65 #include "iwl-trans.h"
66 #include "iwl-op-mode.h"
67 #include "fw/img.h"
68 #include "iwl-debug.h"
69 #include "iwl-csr.h" /* for iwl_mvm_rx_card_state_notif */
70 #include "iwl-io.h" /* for iwl_mvm_rx_card_state_notif */
71 #include "iwl-prph.h"
72 #include "fw/acpi.h"
73 
74 #include "mvm.h"
75 #include "fw/dbg.h"
76 #include "iwl-phy-db.h"
77 #include "iwl-modparams.h"
78 #include "iwl-nvm-parse.h"
79 
80 #define MVM_UCODE_ALIVE_TIMEOUT	HZ
81 #define MVM_UCODE_CALIB_TIMEOUT	(2*HZ)
82 
83 #define UCODE_VALID_OK	cpu_to_le32(0x1)
84 
85 struct iwl_mvm_alive_data {
86 	bool valid;
87 	u32 scd_base_addr;
88 };
89 
90 /* set device type and latency */
91 static int iwl_set_soc_latency(struct iwl_mvm *mvm)
92 {
93 	struct iwl_soc_configuration_cmd cmd = {};
94 	int ret;
95 
96 	/*
97 	 * In VER_1 of this command, the discrete value is considered
98 	 * an integer; In VER_2, it's a bitmask.  Since we have only 2
99 	 * values in VER_1, this is backwards-compatible with VER_2,
100 	 * as long as we don't set any other bits.
101 	 */
102 	if (!mvm->trans->trans_cfg->integrated)
103 		cmd.flags = cpu_to_le32(SOC_CONFIG_CMD_FLAGS_DISCRETE);
104 
105 	BUILD_BUG_ON(IWL_CFG_TRANS_LTR_DELAY_NONE !=
106 		     SOC_FLAGS_LTR_APPLY_DELAY_NONE);
107 	BUILD_BUG_ON(IWL_CFG_TRANS_LTR_DELAY_200US !=
108 		     SOC_FLAGS_LTR_APPLY_DELAY_200);
109 	BUILD_BUG_ON(IWL_CFG_TRANS_LTR_DELAY_2500US !=
110 		     SOC_FLAGS_LTR_APPLY_DELAY_2500);
111 	BUILD_BUG_ON(IWL_CFG_TRANS_LTR_DELAY_1820US !=
112 		     SOC_FLAGS_LTR_APPLY_DELAY_1820);
113 
114 	if (mvm->trans->trans_cfg->ltr_delay != IWL_CFG_TRANS_LTR_DELAY_NONE &&
115 	    !WARN_ON(!mvm->trans->trans_cfg->integrated))
116 		cmd.flags |= le32_encode_bits(mvm->trans->trans_cfg->ltr_delay,
117 					      SOC_FLAGS_LTR_APPLY_DELAY_MASK);
118 
119 	if (iwl_fw_lookup_cmd_ver(mvm->fw, IWL_ALWAYS_LONG_GROUP,
120 				  SCAN_REQ_UMAC) >= 2 &&
121 	    mvm->trans->trans_cfg->low_latency_xtal)
122 		cmd.flags |= cpu_to_le32(SOC_CONFIG_CMD_FLAGS_LOW_LATENCY);
123 
124 	cmd.latency = cpu_to_le32(mvm->trans->trans_cfg->xtal_latency);
125 
126 	ret = iwl_mvm_send_cmd_pdu(mvm, iwl_cmd_id(SOC_CONFIGURATION_CMD,
127 						   SYSTEM_GROUP, 0), 0,
128 				   sizeof(cmd), &cmd);
129 	if (ret)
130 		IWL_ERR(mvm, "Failed to set soc latency: %d\n", ret);
131 	return ret;
132 }
133 
134 static int iwl_send_tx_ant_cfg(struct iwl_mvm *mvm, u8 valid_tx_ant)
135 {
136 	struct iwl_tx_ant_cfg_cmd tx_ant_cmd = {
137 		.valid = cpu_to_le32(valid_tx_ant),
138 	};
139 
140 	IWL_DEBUG_FW(mvm, "select valid tx ant: %u\n", valid_tx_ant);
141 	return iwl_mvm_send_cmd_pdu(mvm, TX_ANT_CONFIGURATION_CMD, 0,
142 				    sizeof(tx_ant_cmd), &tx_ant_cmd);
143 }
144 
145 static int iwl_send_rss_cfg_cmd(struct iwl_mvm *mvm)
146 {
147 	int i;
148 	struct iwl_rss_config_cmd cmd = {
149 		.flags = cpu_to_le32(IWL_RSS_ENABLE),
150 		.hash_mask = BIT(IWL_RSS_HASH_TYPE_IPV4_TCP) |
151 			     BIT(IWL_RSS_HASH_TYPE_IPV4_UDP) |
152 			     BIT(IWL_RSS_HASH_TYPE_IPV4_PAYLOAD) |
153 			     BIT(IWL_RSS_HASH_TYPE_IPV6_TCP) |
154 			     BIT(IWL_RSS_HASH_TYPE_IPV6_UDP) |
155 			     BIT(IWL_RSS_HASH_TYPE_IPV6_PAYLOAD),
156 	};
157 
158 	if (mvm->trans->num_rx_queues == 1)
159 		return 0;
160 
161 	/* Do not direct RSS traffic to Q 0 which is our fallback queue */
162 	for (i = 0; i < ARRAY_SIZE(cmd.indirection_table); i++)
163 		cmd.indirection_table[i] =
164 			1 + (i % (mvm->trans->num_rx_queues - 1));
165 	netdev_rss_key_fill(cmd.secret_key, sizeof(cmd.secret_key));
166 
167 	return iwl_mvm_send_cmd_pdu(mvm, RSS_CONFIG_CMD, 0, sizeof(cmd), &cmd);
168 }
169 
170 static int iwl_configure_rxq(struct iwl_mvm *mvm)
171 {
172 	int i, num_queues, size, ret;
173 	struct iwl_rfh_queue_config *cmd;
174 	struct iwl_host_cmd hcmd = {
175 		.id = WIDE_ID(DATA_PATH_GROUP, RFH_QUEUE_CONFIG_CMD),
176 		.dataflags[0] = IWL_HCMD_DFL_NOCOPY,
177 	};
178 
179 	/* Do not configure default queue, it is configured via context info */
180 	num_queues = mvm->trans->num_rx_queues - 1;
181 
182 	size = struct_size(cmd, data, num_queues);
183 
184 	cmd = kzalloc(size, GFP_KERNEL);
185 	if (!cmd)
186 		return -ENOMEM;
187 
188 	cmd->num_queues = num_queues;
189 
190 	for (i = 0; i < num_queues; i++) {
191 		struct iwl_trans_rxq_dma_data data;
192 
193 		cmd->data[i].q_num = i + 1;
194 		iwl_trans_get_rxq_dma_data(mvm->trans, i + 1, &data);
195 
196 		cmd->data[i].fr_bd_cb = cpu_to_le64(data.fr_bd_cb);
197 		cmd->data[i].urbd_stts_wrptr =
198 			cpu_to_le64(data.urbd_stts_wrptr);
199 		cmd->data[i].ur_bd_cb = cpu_to_le64(data.ur_bd_cb);
200 		cmd->data[i].fr_bd_wid = cpu_to_le32(data.fr_bd_wid);
201 	}
202 
203 	hcmd.data[0] = cmd;
204 	hcmd.len[0] = size;
205 
206 	ret = iwl_mvm_send_cmd(mvm, &hcmd);
207 
208 	kfree(cmd);
209 
210 	return ret;
211 }
212 
213 static int iwl_mvm_send_dqa_cmd(struct iwl_mvm *mvm)
214 {
215 	struct iwl_dqa_enable_cmd dqa_cmd = {
216 		.cmd_queue = cpu_to_le32(IWL_MVM_DQA_CMD_QUEUE),
217 	};
218 	u32 cmd_id = iwl_cmd_id(DQA_ENABLE_CMD, DATA_PATH_GROUP, 0);
219 	int ret;
220 
221 	ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, sizeof(dqa_cmd), &dqa_cmd);
222 	if (ret)
223 		IWL_ERR(mvm, "Failed to send DQA enabling command: %d\n", ret);
224 	else
225 		IWL_DEBUG_FW(mvm, "Working in DQA mode\n");
226 
227 	return ret;
228 }
229 
230 void iwl_mvm_mfu_assert_dump_notif(struct iwl_mvm *mvm,
231 				   struct iwl_rx_cmd_buffer *rxb)
232 {
233 	struct iwl_rx_packet *pkt = rxb_addr(rxb);
234 	struct iwl_mfu_assert_dump_notif *mfu_dump_notif = (void *)pkt->data;
235 	__le32 *dump_data = mfu_dump_notif->data;
236 	int n_words = le32_to_cpu(mfu_dump_notif->data_size) / sizeof(__le32);
237 	int i;
238 
239 	if (mfu_dump_notif->index_num == 0)
240 		IWL_INFO(mvm, "MFUART assert id 0x%x occurred\n",
241 			 le32_to_cpu(mfu_dump_notif->assert_id));
242 
243 	for (i = 0; i < n_words; i++)
244 		IWL_DEBUG_INFO(mvm,
245 			       "MFUART assert dump, dword %u: 0x%08x\n",
246 			       le16_to_cpu(mfu_dump_notif->index_num) *
247 			       n_words + i,
248 			       le32_to_cpu(dump_data[i]));
249 }
250 
251 static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait,
252 			 struct iwl_rx_packet *pkt, void *data)
253 {
254 	struct iwl_mvm *mvm =
255 		container_of(notif_wait, struct iwl_mvm, notif_wait);
256 	struct iwl_mvm_alive_data *alive_data = data;
257 	struct mvm_alive_resp_v3 *palive3;
258 	struct mvm_alive_resp *palive;
259 	struct iwl_umac_alive *umac;
260 	struct iwl_lmac_alive *lmac1;
261 	struct iwl_lmac_alive *lmac2 = NULL;
262 	u16 status;
263 	u32 lmac_error_event_table, umac_error_event_table;
264 
265 	if (iwl_rx_packet_payload_len(pkt) == sizeof(*palive)) {
266 		palive = (void *)pkt->data;
267 		umac = &palive->umac_data;
268 		lmac1 = &palive->lmac_data[0];
269 		lmac2 = &palive->lmac_data[1];
270 		status = le16_to_cpu(palive->status);
271 	} else {
272 		palive3 = (void *)pkt->data;
273 		umac = &palive3->umac_data;
274 		lmac1 = &palive3->lmac_data;
275 		status = le16_to_cpu(palive3->status);
276 	}
277 
278 	lmac_error_event_table =
279 		le32_to_cpu(lmac1->dbg_ptrs.error_event_table_ptr);
280 	iwl_fw_lmac1_set_alive_err_table(mvm->trans, lmac_error_event_table);
281 
282 	if (lmac2)
283 		mvm->trans->dbg.lmac_error_event_table[1] =
284 			le32_to_cpu(lmac2->dbg_ptrs.error_event_table_ptr);
285 
286 	umac_error_event_table = le32_to_cpu(umac->dbg_ptrs.error_info_addr);
287 
288 	if (!umac_error_event_table) {
289 		mvm->support_umac_log = false;
290 	} else if (umac_error_event_table >=
291 		   mvm->trans->cfg->min_umac_error_event_table) {
292 		mvm->support_umac_log = true;
293 	} else {
294 		IWL_ERR(mvm,
295 			"Not valid error log pointer 0x%08X for %s uCode\n",
296 			umac_error_event_table,
297 			(mvm->fwrt.cur_fw_img == IWL_UCODE_INIT) ?
298 			"Init" : "RT");
299 		mvm->support_umac_log = false;
300 	}
301 
302 	if (mvm->support_umac_log)
303 		iwl_fw_umac_set_alive_err_table(mvm->trans,
304 						umac_error_event_table);
305 
306 	alive_data->scd_base_addr = le32_to_cpu(lmac1->dbg_ptrs.scd_base_ptr);
307 	alive_data->valid = status == IWL_ALIVE_STATUS_OK;
308 
309 	IWL_DEBUG_FW(mvm,
310 		     "Alive ucode status 0x%04x revision 0x%01X 0x%01X\n",
311 		     status, lmac1->ver_type, lmac1->ver_subtype);
312 
313 	if (lmac2)
314 		IWL_DEBUG_FW(mvm, "Alive ucode CDB\n");
315 
316 	IWL_DEBUG_FW(mvm,
317 		     "UMAC version: Major - 0x%x, Minor - 0x%x\n",
318 		     le32_to_cpu(umac->umac_major),
319 		     le32_to_cpu(umac->umac_minor));
320 
321 	iwl_fwrt_update_fw_versions(&mvm->fwrt, lmac1, umac);
322 
323 	return true;
324 }
325 
326 static bool iwl_wait_init_complete(struct iwl_notif_wait_data *notif_wait,
327 				   struct iwl_rx_packet *pkt, void *data)
328 {
329 	WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
330 
331 	return true;
332 }
333 
334 static bool iwl_wait_phy_db_entry(struct iwl_notif_wait_data *notif_wait,
335 				  struct iwl_rx_packet *pkt, void *data)
336 {
337 	struct iwl_phy_db *phy_db = data;
338 
339 	if (pkt->hdr.cmd != CALIB_RES_NOTIF_PHY_DB) {
340 		WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
341 		return true;
342 	}
343 
344 	WARN_ON(iwl_phy_db_set_section(phy_db, pkt));
345 
346 	return false;
347 }
348 
349 static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm,
350 					 enum iwl_ucode_type ucode_type)
351 {
352 	struct iwl_notification_wait alive_wait;
353 	struct iwl_mvm_alive_data alive_data = {};
354 	const struct fw_img *fw;
355 	int ret;
356 	enum iwl_ucode_type old_type = mvm->fwrt.cur_fw_img;
357 	static const u16 alive_cmd[] = { MVM_ALIVE };
358 	bool run_in_rfkill =
359 		ucode_type == IWL_UCODE_INIT || iwl_mvm_has_unified_ucode(mvm);
360 
361 	if (ucode_type == IWL_UCODE_REGULAR &&
362 	    iwl_fw_dbg_conf_usniffer(mvm->fw, FW_DBG_START_FROM_ALIVE) &&
363 	    !(fw_has_capa(&mvm->fw->ucode_capa,
364 			  IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED)))
365 		fw = iwl_get_ucode_image(mvm->fw, IWL_UCODE_REGULAR_USNIFFER);
366 	else
367 		fw = iwl_get_ucode_image(mvm->fw, ucode_type);
368 	if (WARN_ON(!fw))
369 		return -EINVAL;
370 	iwl_fw_set_current_image(&mvm->fwrt, ucode_type);
371 	clear_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status);
372 
373 	iwl_init_notification_wait(&mvm->notif_wait, &alive_wait,
374 				   alive_cmd, ARRAY_SIZE(alive_cmd),
375 				   iwl_alive_fn, &alive_data);
376 
377 	/*
378 	 * We want to load the INIT firmware even in RFKILL
379 	 * For the unified firmware case, the ucode_type is not
380 	 * INIT, but we still need to run it.
381 	 */
382 	ret = iwl_trans_start_fw(mvm->trans, fw, run_in_rfkill);
383 	if (ret) {
384 		iwl_fw_set_current_image(&mvm->fwrt, old_type);
385 		iwl_remove_notification(&mvm->notif_wait, &alive_wait);
386 		return ret;
387 	}
388 
389 	/*
390 	 * Some things may run in the background now, but we
391 	 * just wait for the ALIVE notification here.
392 	 */
393 	ret = iwl_wait_notification(&mvm->notif_wait, &alive_wait,
394 				    MVM_UCODE_ALIVE_TIMEOUT);
395 	if (ret) {
396 		struct iwl_trans *trans = mvm->trans;
397 
398 		if (trans->trans_cfg->device_family >=
399 					IWL_DEVICE_FAMILY_22000) {
400 			IWL_ERR(mvm,
401 				"SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
402 				iwl_read_umac_prph(trans, UMAG_SB_CPU_1_STATUS),
403 				iwl_read_umac_prph(trans,
404 						   UMAG_SB_CPU_2_STATUS));
405 			IWL_ERR(mvm, "UMAC PC: 0x%x\n",
406 				iwl_read_umac_prph(trans,
407 						   UREG_UMAC_CURRENT_PC));
408 			IWL_ERR(mvm, "LMAC PC: 0x%x\n",
409 				iwl_read_umac_prph(trans,
410 						   UREG_LMAC1_CURRENT_PC));
411 			if (iwl_mvm_is_cdb_supported(mvm))
412 				IWL_ERR(mvm, "LMAC2 PC: 0x%x\n",
413 					iwl_read_umac_prph(trans,
414 						UREG_LMAC2_CURRENT_PC));
415 		} else if (trans->trans_cfg->device_family >=
416 			   IWL_DEVICE_FAMILY_8000) {
417 			IWL_ERR(mvm,
418 				"SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
419 				iwl_read_prph(trans, SB_CPU_1_STATUS),
420 				iwl_read_prph(trans, SB_CPU_2_STATUS));
421 		}
422 
423 		if (ret == -ETIMEDOUT)
424 			iwl_fw_dbg_error_collect(&mvm->fwrt,
425 						 FW_DBG_TRIGGER_ALIVE_TIMEOUT);
426 
427 		iwl_fw_set_current_image(&mvm->fwrt, old_type);
428 		return ret;
429 	}
430 
431 	if (!alive_data.valid) {
432 		IWL_ERR(mvm, "Loaded ucode is not valid!\n");
433 		iwl_fw_set_current_image(&mvm->fwrt, old_type);
434 		return -EIO;
435 	}
436 
437 	iwl_trans_fw_alive(mvm->trans, alive_data.scd_base_addr);
438 
439 	/*
440 	 * Note: all the queues are enabled as part of the interface
441 	 * initialization, but in firmware restart scenarios they
442 	 * could be stopped, so wake them up. In firmware restart,
443 	 * mac80211 will have the queues stopped as well until the
444 	 * reconfiguration completes. During normal startup, they
445 	 * will be empty.
446 	 */
447 
448 	memset(&mvm->queue_info, 0, sizeof(mvm->queue_info));
449 	/*
450 	 * Set a 'fake' TID for the command queue, since we use the
451 	 * hweight() of the tid_bitmap as a refcount now. Not that
452 	 * we ever even consider the command queue as one we might
453 	 * want to reuse, but be safe nevertheless.
454 	 */
455 	mvm->queue_info[IWL_MVM_DQA_CMD_QUEUE].tid_bitmap =
456 		BIT(IWL_MAX_TID_COUNT + 2);
457 
458 	set_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status);
459 #ifdef CONFIG_IWLWIFI_DEBUGFS
460 	iwl_fw_set_dbg_rec_on(&mvm->fwrt);
461 #endif
462 
463 	return 0;
464 }
465 
466 static int iwl_run_unified_mvm_ucode(struct iwl_mvm *mvm, bool read_nvm)
467 {
468 	struct iwl_notification_wait init_wait;
469 	struct iwl_nvm_access_complete_cmd nvm_complete = {};
470 	struct iwl_init_extended_cfg_cmd init_cfg = {
471 		.init_flags = cpu_to_le32(BIT(IWL_INIT_NVM)),
472 	};
473 	static const u16 init_complete[] = {
474 		INIT_COMPLETE_NOTIF,
475 	};
476 	int ret;
477 
478 	if (mvm->trans->cfg->tx_with_siso_diversity)
479 		init_cfg.init_flags |= cpu_to_le32(BIT(IWL_INIT_PHY));
480 
481 	lockdep_assert_held(&mvm->mutex);
482 
483 	mvm->rfkill_safe_init_done = false;
484 
485 	iwl_init_notification_wait(&mvm->notif_wait,
486 				   &init_wait,
487 				   init_complete,
488 				   ARRAY_SIZE(init_complete),
489 				   iwl_wait_init_complete,
490 				   NULL);
491 
492 	iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL);
493 
494 	/* Will also start the device */
495 	ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
496 	if (ret) {
497 		IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
498 		goto error;
499 	}
500 	iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE,
501 			       NULL);
502 
503 	/* Send init config command to mark that we are sending NVM access
504 	 * commands
505 	 */
506 	ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(SYSTEM_GROUP,
507 						INIT_EXTENDED_CFG_CMD),
508 				   CMD_SEND_IN_RFKILL,
509 				   sizeof(init_cfg), &init_cfg);
510 	if (ret) {
511 		IWL_ERR(mvm, "Failed to run init config command: %d\n",
512 			ret);
513 		goto error;
514 	}
515 
516 	/* Load NVM to NIC if needed */
517 	if (mvm->nvm_file_name) {
518 		iwl_read_external_nvm(mvm->trans, mvm->nvm_file_name,
519 				      mvm->nvm_sections);
520 		iwl_mvm_load_nvm_to_nic(mvm);
521 	}
522 
523 	if (IWL_MVM_PARSE_NVM && read_nvm) {
524 		ret = iwl_nvm_init(mvm);
525 		if (ret) {
526 			IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
527 			goto error;
528 		}
529 	}
530 
531 	ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(REGULATORY_AND_NVM_GROUP,
532 						NVM_ACCESS_COMPLETE),
533 				   CMD_SEND_IN_RFKILL,
534 				   sizeof(nvm_complete), &nvm_complete);
535 	if (ret) {
536 		IWL_ERR(mvm, "Failed to run complete NVM access: %d\n",
537 			ret);
538 		goto error;
539 	}
540 
541 	/* We wait for the INIT complete notification */
542 	ret = iwl_wait_notification(&mvm->notif_wait, &init_wait,
543 				    MVM_UCODE_ALIVE_TIMEOUT);
544 	if (ret)
545 		return ret;
546 
547 	/* Read the NVM only at driver load time, no need to do this twice */
548 	if (!IWL_MVM_PARSE_NVM && read_nvm) {
549 		mvm->nvm_data = iwl_get_nvm(mvm->trans, mvm->fw);
550 		if (IS_ERR(mvm->nvm_data)) {
551 			ret = PTR_ERR(mvm->nvm_data);
552 			mvm->nvm_data = NULL;
553 			IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
554 			return ret;
555 		}
556 	}
557 
558 	mvm->rfkill_safe_init_done = true;
559 
560 	return 0;
561 
562 error:
563 	iwl_remove_notification(&mvm->notif_wait, &init_wait);
564 	return ret;
565 }
566 
567 #ifdef CONFIG_ACPI
568 static void iwl_mvm_phy_filter_init(struct iwl_mvm *mvm,
569 				    struct iwl_phy_specific_cfg *phy_filters)
570 {
571 	/*
572 	 * TODO: read specific phy config from BIOS
573 	 * ACPI table for this feature has not been defined yet,
574 	 * so for now we use hardcoded values.
575 	 */
576 
577 	if (IWL_MVM_PHY_FILTER_CHAIN_A) {
578 		phy_filters->filter_cfg_chain_a =
579 			cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_A);
580 	}
581 	if (IWL_MVM_PHY_FILTER_CHAIN_B) {
582 		phy_filters->filter_cfg_chain_b =
583 			cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_B);
584 	}
585 	if (IWL_MVM_PHY_FILTER_CHAIN_C) {
586 		phy_filters->filter_cfg_chain_c =
587 			cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_C);
588 	}
589 	if (IWL_MVM_PHY_FILTER_CHAIN_D) {
590 		phy_filters->filter_cfg_chain_d =
591 			cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_D);
592 	}
593 }
594 
595 #else /* CONFIG_ACPI */
596 
597 static void iwl_mvm_phy_filter_init(struct iwl_mvm *mvm,
598 				    struct iwl_phy_specific_cfg *phy_filters)
599 {
600 }
601 #endif /* CONFIG_ACPI */
602 
603 static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm)
604 {
605 	struct iwl_phy_cfg_cmd_v3 phy_cfg_cmd;
606 	enum iwl_ucode_type ucode_type = mvm->fwrt.cur_fw_img;
607 	struct iwl_phy_specific_cfg phy_filters = {};
608 	u8 cmd_ver;
609 	size_t cmd_size;
610 
611 	if (iwl_mvm_has_unified_ucode(mvm) &&
612 	    !mvm->trans->cfg->tx_with_siso_diversity)
613 		return 0;
614 
615 	if (mvm->trans->cfg->tx_with_siso_diversity) {
616 		/*
617 		 * TODO: currently we don't set the antenna but letting the NIC
618 		 * to decide which antenna to use. This should come from BIOS.
619 		 */
620 		phy_cfg_cmd.phy_cfg =
621 			cpu_to_le32(FW_PHY_CFG_CHAIN_SAD_ENABLED);
622 	}
623 
624 	/* Set parameters */
625 	phy_cfg_cmd.phy_cfg = cpu_to_le32(iwl_mvm_get_phy_config(mvm));
626 
627 	/* set flags extra PHY configuration flags from the device's cfg */
628 	phy_cfg_cmd.phy_cfg |=
629 		cpu_to_le32(mvm->trans->trans_cfg->extra_phy_cfg_flags);
630 
631 	phy_cfg_cmd.calib_control.event_trigger =
632 		mvm->fw->default_calib[ucode_type].event_trigger;
633 	phy_cfg_cmd.calib_control.flow_trigger =
634 		mvm->fw->default_calib[ucode_type].flow_trigger;
635 
636 	cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, IWL_ALWAYS_LONG_GROUP,
637 					PHY_CONFIGURATION_CMD);
638 	if (cmd_ver == 3) {
639 		iwl_mvm_phy_filter_init(mvm, &phy_filters);
640 		memcpy(&phy_cfg_cmd.phy_specific_cfg, &phy_filters,
641 		       sizeof(struct iwl_phy_specific_cfg));
642 	}
643 
644 	IWL_DEBUG_INFO(mvm, "Sending Phy CFG command: 0x%x\n",
645 		       phy_cfg_cmd.phy_cfg);
646 	cmd_size = (cmd_ver == 3) ? sizeof(struct iwl_phy_cfg_cmd_v3) :
647 				    sizeof(struct iwl_phy_cfg_cmd_v1);
648 	return iwl_mvm_send_cmd_pdu(mvm, PHY_CONFIGURATION_CMD, 0,
649 				    cmd_size, &phy_cfg_cmd);
650 }
651 
652 int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm, bool read_nvm)
653 {
654 	struct iwl_notification_wait calib_wait;
655 	static const u16 init_complete[] = {
656 		INIT_COMPLETE_NOTIF,
657 		CALIB_RES_NOTIF_PHY_DB
658 	};
659 	int ret;
660 
661 	if (iwl_mvm_has_unified_ucode(mvm))
662 		return iwl_run_unified_mvm_ucode(mvm, true);
663 
664 	lockdep_assert_held(&mvm->mutex);
665 
666 	mvm->rfkill_safe_init_done = false;
667 
668 	iwl_init_notification_wait(&mvm->notif_wait,
669 				   &calib_wait,
670 				   init_complete,
671 				   ARRAY_SIZE(init_complete),
672 				   iwl_wait_phy_db_entry,
673 				   mvm->phy_db);
674 
675 	/* Will also start the device */
676 	ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_INIT);
677 	if (ret) {
678 		IWL_ERR(mvm, "Failed to start INIT ucode: %d\n", ret);
679 		goto remove_notif;
680 	}
681 
682 	if (mvm->trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_8000) {
683 		ret = iwl_mvm_send_bt_init_conf(mvm);
684 		if (ret)
685 			goto remove_notif;
686 	}
687 
688 	/* Read the NVM only at driver load time, no need to do this twice */
689 	if (read_nvm) {
690 		ret = iwl_nvm_init(mvm);
691 		if (ret) {
692 			IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
693 			goto remove_notif;
694 		}
695 	}
696 
697 	/* In case we read the NVM from external file, load it to the NIC */
698 	if (mvm->nvm_file_name)
699 		iwl_mvm_load_nvm_to_nic(mvm);
700 
701 	WARN_ONCE(mvm->nvm_data->nvm_version < mvm->trans->cfg->nvm_ver,
702 		  "Too old NVM version (0x%0x, required = 0x%0x)",
703 		  mvm->nvm_data->nvm_version, mvm->trans->cfg->nvm_ver);
704 
705 	/*
706 	 * abort after reading the nvm in case RF Kill is on, we will complete
707 	 * the init seq later when RF kill will switch to off
708 	 */
709 	if (iwl_mvm_is_radio_hw_killed(mvm)) {
710 		IWL_DEBUG_RF_KILL(mvm,
711 				  "jump over all phy activities due to RF kill\n");
712 		goto remove_notif;
713 	}
714 
715 	mvm->rfkill_safe_init_done = true;
716 
717 	/* Send TX valid antennas before triggering calibrations */
718 	ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
719 	if (ret)
720 		goto remove_notif;
721 
722 	ret = iwl_send_phy_cfg_cmd(mvm);
723 	if (ret) {
724 		IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n",
725 			ret);
726 		goto remove_notif;
727 	}
728 
729 	/*
730 	 * Some things may run in the background now, but we
731 	 * just wait for the calibration complete notification.
732 	 */
733 	ret = iwl_wait_notification(&mvm->notif_wait, &calib_wait,
734 				    MVM_UCODE_CALIB_TIMEOUT);
735 	if (!ret)
736 		goto out;
737 
738 	if (iwl_mvm_is_radio_hw_killed(mvm)) {
739 		IWL_DEBUG_RF_KILL(mvm, "RFKILL while calibrating.\n");
740 		ret = 0;
741 	} else {
742 		IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n",
743 			ret);
744 	}
745 
746 	goto out;
747 
748 remove_notif:
749 	iwl_remove_notification(&mvm->notif_wait, &calib_wait);
750 out:
751 	mvm->rfkill_safe_init_done = false;
752 	if (iwlmvm_mod_params.init_dbg && !mvm->nvm_data) {
753 		/* we want to debug INIT and we have no NVM - fake */
754 		mvm->nvm_data = kzalloc(sizeof(struct iwl_nvm_data) +
755 					sizeof(struct ieee80211_channel) +
756 					sizeof(struct ieee80211_rate),
757 					GFP_KERNEL);
758 		if (!mvm->nvm_data)
759 			return -ENOMEM;
760 		mvm->nvm_data->bands[0].channels = mvm->nvm_data->channels;
761 		mvm->nvm_data->bands[0].n_channels = 1;
762 		mvm->nvm_data->bands[0].n_bitrates = 1;
763 		mvm->nvm_data->bands[0].bitrates =
764 			(void *)mvm->nvm_data->channels + 1;
765 		mvm->nvm_data->bands[0].bitrates->hw_value = 10;
766 	}
767 
768 	return ret;
769 }
770 
771 static int iwl_mvm_config_ltr(struct iwl_mvm *mvm)
772 {
773 	struct iwl_ltr_config_cmd cmd = {
774 		.flags = cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE),
775 	};
776 
777 	if (!mvm->trans->ltr_enabled)
778 		return 0;
779 
780 	return iwl_mvm_send_cmd_pdu(mvm, LTR_CONFIG, 0,
781 				    sizeof(cmd), &cmd);
782 }
783 
784 #ifdef CONFIG_ACPI
785 int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a, int prof_b)
786 {
787 	union {
788 		struct iwl_dev_tx_power_cmd v5;
789 		struct iwl_dev_tx_power_cmd_v4 v4;
790 	} cmd;
791 
792 	int ret;
793 	u16 len = 0;
794 
795 	cmd.v5.v3.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_CHAINS);
796 
797 	if (fw_has_api(&mvm->fw->ucode_capa,
798 		       IWL_UCODE_TLV_API_REDUCE_TX_POWER))
799 		len = sizeof(cmd.v5);
800 	else if (fw_has_capa(&mvm->fw->ucode_capa,
801 			     IWL_UCODE_TLV_CAPA_TX_POWER_ACK))
802 		len = sizeof(struct iwl_dev_tx_power_cmd_v4);
803 	else
804 		len = sizeof(cmd.v4.v3);
805 
806 
807 	ret = iwl_sar_select_profile(&mvm->fwrt,
808 				     cmd.v5.v3.per_chain_restriction,
809 				     prof_a, prof_b);
810 
811 	/* return on error or if the profile is disabled (positive number) */
812 	if (ret)
813 		return ret;
814 
815 	IWL_DEBUG_RADIO(mvm, "Sending REDUCE_TX_POWER_CMD per chain\n");
816 	return iwl_mvm_send_cmd_pdu(mvm, REDUCE_TX_POWER_CMD, 0, len, &cmd);
817 }
818 
819 int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm)
820 {
821 	union geo_tx_power_profiles_cmd geo_tx_cmd;
822 	u16 len;
823 	int ret;
824 	struct iwl_host_cmd cmd;
825 
826 	if (fw_has_api(&mvm->fwrt.fw->ucode_capa,
827 		       IWL_UCODE_TLV_API_SAR_TABLE_VER)) {
828 		geo_tx_cmd.geo_cmd.ops =
829 			cpu_to_le32(IWL_PER_CHAIN_OFFSET_GET_CURRENT_TABLE);
830 		len = sizeof(geo_tx_cmd.geo_cmd);
831 	} else {
832 		geo_tx_cmd.geo_cmd_v1.ops =
833 			cpu_to_le32(IWL_PER_CHAIN_OFFSET_GET_CURRENT_TABLE);
834 		len = sizeof(geo_tx_cmd.geo_cmd_v1);
835 	}
836 
837 	if (!iwl_sar_geo_support(&mvm->fwrt))
838 		return -EOPNOTSUPP;
839 
840 	cmd = (struct iwl_host_cmd){
841 		.id =  WIDE_ID(PHY_OPS_GROUP, GEO_TX_POWER_LIMIT),
842 		.len = { len, },
843 		.flags = CMD_WANT_SKB,
844 		.data = { &geo_tx_cmd },
845 	};
846 
847 	ret = iwl_mvm_send_cmd(mvm, &cmd);
848 	if (ret) {
849 		IWL_ERR(mvm, "Failed to get geographic profile info %d\n", ret);
850 		return ret;
851 	}
852 	ret = iwl_validate_sar_geo_profile(&mvm->fwrt, &cmd);
853 	iwl_free_resp(&cmd);
854 	return ret;
855 }
856 
857 static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm)
858 {
859 	u16 cmd_wide_id =  WIDE_ID(PHY_OPS_GROUP, GEO_TX_POWER_LIMIT);
860 	union geo_tx_power_profiles_cmd cmd;
861 	u16 len;
862 	int ret;
863 
864 	cmd.geo_cmd.ops = cpu_to_le32(IWL_PER_CHAIN_OFFSET_SET_TABLES);
865 
866 	ret = iwl_sar_geo_init(&mvm->fwrt, cmd.geo_cmd.table);
867 	/*
868 	 * It is a valid scenario to not support SAR, or miss wgds table,
869 	 * but in that case there is no need to send the command.
870 	 */
871 	if (ret)
872 		return 0;
873 
874 	cmd.geo_cmd.table_revision = cpu_to_le32(mvm->fwrt.geo_rev);
875 
876 	if (!fw_has_api(&mvm->fwrt.fw->ucode_capa,
877 			IWL_UCODE_TLV_API_SAR_TABLE_VER)) {
878 		len = sizeof(struct iwl_geo_tx_power_profiles_cmd_v1);
879 	} else {
880 		len =  sizeof(cmd.geo_cmd);
881 	}
882 
883 	return iwl_mvm_send_cmd_pdu(mvm, cmd_wide_id, 0, len, &cmd);
884 }
885 
886 static int iwl_mvm_get_ppag_table(struct iwl_mvm *mvm)
887 {
888 	union acpi_object *wifi_pkg, *data, *enabled;
889 	int i, j, ret, tbl_rev;
890 	int idx = 2;
891 
892 	mvm->fwrt.ppag_table.enabled = cpu_to_le32(0);
893 	data = iwl_acpi_get_object(mvm->dev, ACPI_PPAG_METHOD);
894 	if (IS_ERR(data))
895 		return PTR_ERR(data);
896 
897 	wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data,
898 					 ACPI_PPAG_WIFI_DATA_SIZE, &tbl_rev);
899 
900 	if (IS_ERR(wifi_pkg)) {
901 		ret = PTR_ERR(wifi_pkg);
902 		goto out_free;
903 	}
904 
905 	if (tbl_rev != 0) {
906 		ret = -EINVAL;
907 		goto out_free;
908 	}
909 
910 	enabled = &wifi_pkg->package.elements[1];
911 	if (enabled->type != ACPI_TYPE_INTEGER ||
912 	    (enabled->integer.value != 0 && enabled->integer.value != 1)) {
913 		ret = -EINVAL;
914 		goto out_free;
915 	}
916 
917 	mvm->fwrt.ppag_table.enabled = cpu_to_le32(enabled->integer.value);
918 	if (!mvm->fwrt.ppag_table.enabled) {
919 		ret = 0;
920 		goto out_free;
921 	}
922 
923 	/*
924 	 * read, verify gain values and save them into the PPAG table.
925 	 * first sub-band (j=0) corresponds to Low-Band (2.4GHz), and the
926 	 * following sub-bands to High-Band (5GHz).
927 	 */
928 	for (i = 0; i < ACPI_PPAG_NUM_CHAINS; i++) {
929 		for (j = 0; j < ACPI_PPAG_NUM_SUB_BANDS; j++) {
930 			union acpi_object *ent;
931 
932 			ent = &wifi_pkg->package.elements[idx++];
933 			if (ent->type != ACPI_TYPE_INTEGER ||
934 			    (j == 0 && ent->integer.value > ACPI_PPAG_MAX_LB) ||
935 			    (j == 0 && ent->integer.value < ACPI_PPAG_MIN_LB) ||
936 			    (j != 0 && ent->integer.value > ACPI_PPAG_MAX_HB) ||
937 			    (j != 0 && ent->integer.value < ACPI_PPAG_MIN_HB)) {
938 				mvm->fwrt.ppag_table.enabled = cpu_to_le32(0);
939 				ret = -EINVAL;
940 				goto out_free;
941 			}
942 			mvm->fwrt.ppag_table.gain[i][j] = ent->integer.value;
943 		}
944 	}
945 	ret = 0;
946 out_free:
947 	kfree(data);
948 	return ret;
949 }
950 
951 int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm)
952 {
953 	int i, j, ret;
954 
955 	if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_SET_PPAG)) {
956 		IWL_DEBUG_RADIO(mvm,
957 				"PPAG capability not supported by FW, command not sent.\n");
958 		return 0;
959 	}
960 
961 	if (!mvm->fwrt.ppag_table.enabled) {
962 		IWL_DEBUG_RADIO(mvm,
963 				"PPAG not enabled, command not sent.\n");
964 		return 0;
965 	}
966 
967 	IWL_DEBUG_RADIO(mvm, "Sending PER_PLATFORM_ANT_GAIN_CMD\n");
968 
969 	for (i = 0; i < ACPI_PPAG_NUM_CHAINS; i++) {
970 		for (j = 0; j < ACPI_PPAG_NUM_SUB_BANDS; j++) {
971 			IWL_DEBUG_RADIO(mvm,
972 					"PPAG table: chain[%d] band[%d]: gain = %d\n",
973 					i, j, mvm->fwrt.ppag_table.gain[i][j]);
974 		}
975 	}
976 
977 	ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(PHY_OPS_GROUP,
978 						PER_PLATFORM_ANT_GAIN_CMD),
979 				   0, sizeof(mvm->fwrt.ppag_table),
980 				   &mvm->fwrt.ppag_table);
981 	if (ret < 0)
982 		IWL_ERR(mvm, "failed to send PER_PLATFORM_ANT_GAIN_CMD (%d)\n",
983 			ret);
984 
985 	return ret;
986 }
987 
988 static int iwl_mvm_ppag_init(struct iwl_mvm *mvm)
989 {
990 	int ret;
991 
992 	ret = iwl_mvm_get_ppag_table(mvm);
993 	if (ret < 0) {
994 		IWL_DEBUG_RADIO(mvm,
995 				"PPAG BIOS table invalid or unavailable. (%d)\n",
996 				ret);
997 		return 0;
998 	}
999 	return iwl_mvm_ppag_send_cmd(mvm);
1000 }
1001 
1002 static void iwl_mvm_tas_init(struct iwl_mvm *mvm)
1003 {
1004 	int ret;
1005 	struct iwl_tas_config_cmd cmd = {};
1006 	int list_size;
1007 
1008 	BUILD_BUG_ON(ARRAY_SIZE(cmd.black_list_array) <
1009 		     APCI_WTAS_BLACK_LIST_MAX);
1010 
1011 	if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_TAS_CFG)) {
1012 		IWL_DEBUG_RADIO(mvm, "TAS not enabled in FW\n");
1013 		return;
1014 	}
1015 
1016 	ret = iwl_acpi_get_tas(&mvm->fwrt, cmd.black_list_array, &list_size);
1017 	if (ret < 0) {
1018 		IWL_DEBUG_RADIO(mvm,
1019 				"TAS table invalid or unavailable. (%d)\n",
1020 				ret);
1021 		return;
1022 	}
1023 
1024 	if (list_size < 0)
1025 		return;
1026 
1027 	/* list size if TAS enabled can only be non-negative */
1028 	cmd.black_list_size = cpu_to_le32((u32)list_size);
1029 
1030 	ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(REGULATORY_AND_NVM_GROUP,
1031 						TAS_CONFIG),
1032 				   0, sizeof(cmd), &cmd);
1033 	if (ret < 0)
1034 		IWL_DEBUG_RADIO(mvm, "failed to send TAS_CONFIG (%d)\n", ret);
1035 }
1036 #else /* CONFIG_ACPI */
1037 
1038 inline int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm,
1039 				      int prof_a, int prof_b)
1040 {
1041 	return -ENOENT;
1042 }
1043 
1044 inline int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm)
1045 {
1046 	return -ENOENT;
1047 }
1048 
1049 static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm)
1050 {
1051 	return 0;
1052 }
1053 
1054 int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm)
1055 {
1056 	return -ENOENT;
1057 }
1058 
1059 static int iwl_mvm_ppag_init(struct iwl_mvm *mvm)
1060 {
1061 	return 0;
1062 }
1063 
1064 static void iwl_mvm_tas_init(struct iwl_mvm *mvm)
1065 {
1066 }
1067 #endif /* CONFIG_ACPI */
1068 
1069 void iwl_mvm_send_recovery_cmd(struct iwl_mvm *mvm, u32 flags)
1070 {
1071 	u32 error_log_size = mvm->fw->ucode_capa.error_log_size;
1072 	int ret;
1073 	u32 resp;
1074 
1075 	struct iwl_fw_error_recovery_cmd recovery_cmd = {
1076 		.flags = cpu_to_le32(flags),
1077 		.buf_size = 0,
1078 	};
1079 	struct iwl_host_cmd host_cmd = {
1080 		.id = WIDE_ID(SYSTEM_GROUP, FW_ERROR_RECOVERY_CMD),
1081 		.flags = CMD_WANT_SKB,
1082 		.data = {&recovery_cmd, },
1083 		.len = {sizeof(recovery_cmd), },
1084 	};
1085 
1086 	/* no error log was defined in TLV */
1087 	if (!error_log_size)
1088 		return;
1089 
1090 	if (flags & ERROR_RECOVERY_UPDATE_DB) {
1091 		/* no buf was allocated while HW reset */
1092 		if (!mvm->error_recovery_buf)
1093 			return;
1094 
1095 		host_cmd.data[1] = mvm->error_recovery_buf;
1096 		host_cmd.len[1] =  error_log_size;
1097 		host_cmd.dataflags[1] = IWL_HCMD_DFL_NOCOPY;
1098 		recovery_cmd.buf_size = cpu_to_le32(error_log_size);
1099 	}
1100 
1101 	ret = iwl_mvm_send_cmd(mvm, &host_cmd);
1102 	kfree(mvm->error_recovery_buf);
1103 	mvm->error_recovery_buf = NULL;
1104 
1105 	if (ret) {
1106 		IWL_ERR(mvm, "Failed to send recovery cmd %d\n", ret);
1107 		return;
1108 	}
1109 
1110 	/* skb respond is only relevant in ERROR_RECOVERY_UPDATE_DB */
1111 	if (flags & ERROR_RECOVERY_UPDATE_DB) {
1112 		resp = le32_to_cpu(*(__le32 *)host_cmd.resp_pkt->data);
1113 		if (resp)
1114 			IWL_ERR(mvm,
1115 				"Failed to send recovery cmd blob was invalid %d\n",
1116 				resp);
1117 	}
1118 }
1119 
1120 static int iwl_mvm_sar_init(struct iwl_mvm *mvm)
1121 {
1122 	int ret;
1123 
1124 	ret = iwl_sar_get_wrds_table(&mvm->fwrt);
1125 	if (ret < 0) {
1126 		IWL_DEBUG_RADIO(mvm,
1127 				"WRDS SAR BIOS table invalid or unavailable. (%d)\n",
1128 				ret);
1129 		/*
1130 		 * If not available, don't fail and don't bother with EWRD.
1131 		 * Return 1 to tell that we can't use WGDS either.
1132 		 */
1133 		return 1;
1134 	}
1135 
1136 	ret = iwl_sar_get_ewrd_table(&mvm->fwrt);
1137 	/* if EWRD is not available, we can still use WRDS, so don't fail */
1138 	if (ret < 0)
1139 		IWL_DEBUG_RADIO(mvm,
1140 				"EWRD SAR BIOS table invalid or unavailable. (%d)\n",
1141 				ret);
1142 
1143 	return iwl_mvm_sar_select_profile(mvm, 1, 1);
1144 }
1145 
1146 static int iwl_mvm_load_rt_fw(struct iwl_mvm *mvm)
1147 {
1148 	int ret;
1149 
1150 	if (iwl_mvm_has_unified_ucode(mvm))
1151 		return iwl_run_unified_mvm_ucode(mvm, false);
1152 
1153 	ret = iwl_run_init_mvm_ucode(mvm, false);
1154 
1155 	if (ret) {
1156 		IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", ret);
1157 
1158 		if (iwlmvm_mod_params.init_dbg)
1159 			return 0;
1160 		return ret;
1161 	}
1162 
1163 	iwl_fw_dbg_stop_sync(&mvm->fwrt);
1164 	iwl_trans_stop_device(mvm->trans);
1165 	ret = iwl_trans_start_hw(mvm->trans);
1166 	if (ret)
1167 		return ret;
1168 
1169 	iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL);
1170 
1171 	mvm->rfkill_safe_init_done = false;
1172 	ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
1173 	if (ret)
1174 		return ret;
1175 
1176 	mvm->rfkill_safe_init_done = true;
1177 
1178 	iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE,
1179 			       NULL);
1180 
1181 	return iwl_init_paging(&mvm->fwrt, mvm->fwrt.cur_fw_img);
1182 }
1183 
1184 int iwl_mvm_up(struct iwl_mvm *mvm)
1185 {
1186 	int ret, i;
1187 	struct ieee80211_channel *chan;
1188 	struct cfg80211_chan_def chandef;
1189 	struct ieee80211_supported_band *sband = NULL;
1190 
1191 	lockdep_assert_held(&mvm->mutex);
1192 
1193 	ret = iwl_trans_start_hw(mvm->trans);
1194 	if (ret)
1195 		return ret;
1196 
1197 	ret = iwl_mvm_load_rt_fw(mvm);
1198 	if (ret) {
1199 		IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
1200 		if (ret != -ERFKILL)
1201 			iwl_fw_dbg_error_collect(&mvm->fwrt,
1202 						 FW_DBG_TRIGGER_DRIVER);
1203 		goto error;
1204 	}
1205 
1206 	iwl_get_shared_mem_conf(&mvm->fwrt);
1207 
1208 	ret = iwl_mvm_sf_update(mvm, NULL, false);
1209 	if (ret)
1210 		IWL_ERR(mvm, "Failed to initialize Smart Fifo\n");
1211 
1212 	if (!iwl_trans_dbg_ini_valid(mvm->trans)) {
1213 		mvm->fwrt.dump.conf = FW_DBG_INVALID;
1214 		/* if we have a destination, assume EARLY START */
1215 		if (mvm->fw->dbg.dest_tlv)
1216 			mvm->fwrt.dump.conf = FW_DBG_START_FROM_ALIVE;
1217 		iwl_fw_start_dbg_conf(&mvm->fwrt, FW_DBG_START_FROM_ALIVE);
1218 	}
1219 
1220 	ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
1221 	if (ret)
1222 		goto error;
1223 
1224 	if (!iwl_mvm_has_unified_ucode(mvm)) {
1225 		/* Send phy db control command and then phy db calibration */
1226 		ret = iwl_send_phy_db_data(mvm->phy_db);
1227 		if (ret)
1228 			goto error;
1229 	}
1230 
1231 	ret = iwl_send_phy_cfg_cmd(mvm);
1232 	if (ret)
1233 		goto error;
1234 
1235 	ret = iwl_mvm_send_bt_init_conf(mvm);
1236 	if (ret)
1237 		goto error;
1238 
1239 	if (fw_has_capa(&mvm->fw->ucode_capa,
1240 			IWL_UCODE_TLV_CAPA_SOC_LATENCY_SUPPORT)) {
1241 		ret = iwl_set_soc_latency(mvm);
1242 		if (ret)
1243 			goto error;
1244 	}
1245 
1246 	/* Init RSS configuration */
1247 	if (mvm->trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_22000) {
1248 		ret = iwl_configure_rxq(mvm);
1249 		if (ret) {
1250 			IWL_ERR(mvm, "Failed to configure RX queues: %d\n",
1251 				ret);
1252 			goto error;
1253 		}
1254 	}
1255 
1256 	if (iwl_mvm_has_new_rx_api(mvm)) {
1257 		ret = iwl_send_rss_cfg_cmd(mvm);
1258 		if (ret) {
1259 			IWL_ERR(mvm, "Failed to configure RSS queues: %d\n",
1260 				ret);
1261 			goto error;
1262 		}
1263 	}
1264 
1265 	/* init the fw <-> mac80211 STA mapping */
1266 	for (i = 0; i < ARRAY_SIZE(mvm->fw_id_to_mac_id); i++)
1267 		RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
1268 
1269 	mvm->tdls_cs.peer.sta_id = IWL_MVM_INVALID_STA;
1270 
1271 	/* reset quota debouncing buffer - 0xff will yield invalid data */
1272 	memset(&mvm->last_quota_cmd, 0xff, sizeof(mvm->last_quota_cmd));
1273 
1274 	if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_DQA_SUPPORT)) {
1275 		ret = iwl_mvm_send_dqa_cmd(mvm);
1276 		if (ret)
1277 			goto error;
1278 	}
1279 
1280 	/* Add auxiliary station for scanning */
1281 	ret = iwl_mvm_add_aux_sta(mvm);
1282 	if (ret)
1283 		goto error;
1284 
1285 	/* Add all the PHY contexts */
1286 	i = 0;
1287 	while (!sband && i < NUM_NL80211_BANDS)
1288 		sband = mvm->hw->wiphy->bands[i++];
1289 
1290 	if (WARN_ON_ONCE(!sband))
1291 		goto error;
1292 
1293 	chan = &sband->channels[0];
1294 
1295 	cfg80211_chandef_create(&chandef, chan, NL80211_CHAN_NO_HT);
1296 	for (i = 0; i < NUM_PHY_CTX; i++) {
1297 		/*
1298 		 * The channel used here isn't relevant as it's
1299 		 * going to be overwritten in the other flows.
1300 		 * For now use the first channel we have.
1301 		 */
1302 		ret = iwl_mvm_phy_ctxt_add(mvm, &mvm->phy_ctxts[i],
1303 					   &chandef, 1, 1);
1304 		if (ret)
1305 			goto error;
1306 	}
1307 
1308 	if (iwl_mvm_is_tt_in_fw(mvm)) {
1309 		/* in order to give the responsibility of ct-kill and
1310 		 * TX backoff to FW we need to send empty temperature reporting
1311 		 * cmd during init time
1312 		 */
1313 		iwl_mvm_send_temp_report_ths_cmd(mvm);
1314 	} else {
1315 		/* Initialize tx backoffs to the minimal possible */
1316 		iwl_mvm_tt_tx_backoff(mvm, 0);
1317 	}
1318 
1319 #ifdef CONFIG_THERMAL
1320 	/* TODO: read the budget from BIOS / Platform NVM */
1321 
1322 	/*
1323 	 * In case there is no budget from BIOS / Platform NVM the default
1324 	 * budget should be 2000mW (cooling state 0).
1325 	 */
1326 	if (iwl_mvm_is_ctdp_supported(mvm)) {
1327 		ret = iwl_mvm_ctdp_command(mvm, CTDP_CMD_OPERATION_START,
1328 					   mvm->cooling_dev.cur_state);
1329 		if (ret)
1330 			goto error;
1331 	}
1332 #endif
1333 
1334 	if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_SET_LTR_GEN2))
1335 		WARN_ON(iwl_mvm_config_ltr(mvm));
1336 
1337 	ret = iwl_mvm_power_update_device(mvm);
1338 	if (ret)
1339 		goto error;
1340 
1341 	/*
1342 	 * RTNL is not taken during Ct-kill, but we don't need to scan/Tx
1343 	 * anyway, so don't init MCC.
1344 	 */
1345 	if (!test_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status)) {
1346 		ret = iwl_mvm_init_mcc(mvm);
1347 		if (ret)
1348 			goto error;
1349 	}
1350 
1351 	if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_UMAC_SCAN)) {
1352 		mvm->scan_type = IWL_SCAN_TYPE_NOT_SET;
1353 		mvm->hb_scan_type = IWL_SCAN_TYPE_NOT_SET;
1354 		ret = iwl_mvm_config_scan(mvm);
1355 		if (ret)
1356 			goto error;
1357 	}
1358 
1359 	if (test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status))
1360 		iwl_mvm_send_recovery_cmd(mvm, ERROR_RECOVERY_UPDATE_DB);
1361 
1362 	if (iwl_acpi_get_eckv(mvm->dev, &mvm->ext_clock_valid))
1363 		IWL_DEBUG_INFO(mvm, "ECKV table doesn't exist in BIOS\n");
1364 
1365 	ret = iwl_mvm_ppag_init(mvm);
1366 	if (ret)
1367 		goto error;
1368 
1369 	ret = iwl_mvm_sar_init(mvm);
1370 	if (ret == 0) {
1371 		ret = iwl_mvm_sar_geo_init(mvm);
1372 	} else if (ret == -ENOENT && !iwl_sar_get_wgds_table(&mvm->fwrt)) {
1373 		/*
1374 		 * If basic SAR is not available, we check for WGDS,
1375 		 * which should *not* be available either.  If it is
1376 		 * available, issue an error, because we can't use SAR
1377 		 * Geo without basic SAR.
1378 		 */
1379 		IWL_ERR(mvm, "BIOS contains WGDS but no WRDS\n");
1380 	}
1381 
1382 	if (ret < 0)
1383 		goto error;
1384 
1385 	iwl_mvm_tas_init(mvm);
1386 	iwl_mvm_leds_sync(mvm);
1387 
1388 	IWL_DEBUG_INFO(mvm, "RT uCode started.\n");
1389 	return 0;
1390  error:
1391 	if (!iwlmvm_mod_params.init_dbg || !ret)
1392 		iwl_mvm_stop_device(mvm);
1393 	return ret;
1394 }
1395 
1396 int iwl_mvm_load_d3_fw(struct iwl_mvm *mvm)
1397 {
1398 	int ret, i;
1399 
1400 	lockdep_assert_held(&mvm->mutex);
1401 
1402 	ret = iwl_trans_start_hw(mvm->trans);
1403 	if (ret)
1404 		return ret;
1405 
1406 	ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_WOWLAN);
1407 	if (ret) {
1408 		IWL_ERR(mvm, "Failed to start WoWLAN firmware: %d\n", ret);
1409 		goto error;
1410 	}
1411 
1412 	ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
1413 	if (ret)
1414 		goto error;
1415 
1416 	/* Send phy db control command and then phy db calibration*/
1417 	ret = iwl_send_phy_db_data(mvm->phy_db);
1418 	if (ret)
1419 		goto error;
1420 
1421 	ret = iwl_send_phy_cfg_cmd(mvm);
1422 	if (ret)
1423 		goto error;
1424 
1425 	/* init the fw <-> mac80211 STA mapping */
1426 	for (i = 0; i < ARRAY_SIZE(mvm->fw_id_to_mac_id); i++)
1427 		RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
1428 
1429 	/* Add auxiliary station for scanning */
1430 	ret = iwl_mvm_add_aux_sta(mvm);
1431 	if (ret)
1432 		goto error;
1433 
1434 	return 0;
1435  error:
1436 	iwl_mvm_stop_device(mvm);
1437 	return ret;
1438 }
1439 
1440 void iwl_mvm_rx_card_state_notif(struct iwl_mvm *mvm,
1441 				 struct iwl_rx_cmd_buffer *rxb)
1442 {
1443 	struct iwl_rx_packet *pkt = rxb_addr(rxb);
1444 	struct iwl_card_state_notif *card_state_notif = (void *)pkt->data;
1445 	u32 flags = le32_to_cpu(card_state_notif->flags);
1446 
1447 	IWL_DEBUG_RF_KILL(mvm, "Card state received: HW:%s SW:%s CT:%s\n",
1448 			  (flags & HW_CARD_DISABLED) ? "Kill" : "On",
1449 			  (flags & SW_CARD_DISABLED) ? "Kill" : "On",
1450 			  (flags & CT_KILL_CARD_DISABLED) ?
1451 			  "Reached" : "Not reached");
1452 }
1453 
1454 void iwl_mvm_rx_mfuart_notif(struct iwl_mvm *mvm,
1455 			     struct iwl_rx_cmd_buffer *rxb)
1456 {
1457 	struct iwl_rx_packet *pkt = rxb_addr(rxb);
1458 	struct iwl_mfuart_load_notif *mfuart_notif = (void *)pkt->data;
1459 
1460 	IWL_DEBUG_INFO(mvm,
1461 		       "MFUART: installed ver: 0x%08x, external ver: 0x%08x, status: 0x%08x, duration: 0x%08x\n",
1462 		       le32_to_cpu(mfuart_notif->installed_ver),
1463 		       le32_to_cpu(mfuart_notif->external_ver),
1464 		       le32_to_cpu(mfuart_notif->status),
1465 		       le32_to_cpu(mfuart_notif->duration));
1466 
1467 	if (iwl_rx_packet_payload_len(pkt) == sizeof(*mfuart_notif))
1468 		IWL_DEBUG_INFO(mvm,
1469 			       "MFUART: image size: 0x%08x\n",
1470 			       le32_to_cpu(mfuart_notif->image_size));
1471 }
1472