1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause 2 /* 3 * Copyright (C) 2012-2014, 2018-2022 Intel Corporation 4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH 5 * Copyright (C) 2016-2017 Intel Deutschland GmbH 6 */ 7 #include <net/mac80211.h> 8 #include <linux/netdevice.h> 9 #include <linux/dmi.h> 10 11 #include "iwl-trans.h" 12 #include "iwl-op-mode.h" 13 #include "fw/img.h" 14 #include "iwl-debug.h" 15 #include "iwl-prph.h" 16 #include "fw/acpi.h" 17 #include "fw/pnvm.h" 18 19 #include "mvm.h" 20 #include "fw/dbg.h" 21 #include "iwl-phy-db.h" 22 #include "iwl-modparams.h" 23 #include "iwl-nvm-parse.h" 24 25 #define MVM_UCODE_ALIVE_TIMEOUT (HZ) 26 #define MVM_UCODE_CALIB_TIMEOUT (2 * HZ) 27 28 #define IWL_TAS_US_MCC 0x5553 29 #define IWL_TAS_CANADA_MCC 0x4341 30 31 struct iwl_mvm_alive_data { 32 bool valid; 33 u32 scd_base_addr; 34 }; 35 36 static int iwl_send_tx_ant_cfg(struct iwl_mvm *mvm, u8 valid_tx_ant) 37 { 38 struct iwl_tx_ant_cfg_cmd tx_ant_cmd = { 39 .valid = cpu_to_le32(valid_tx_ant), 40 }; 41 42 IWL_DEBUG_FW(mvm, "select valid tx ant: %u\n", valid_tx_ant); 43 return iwl_mvm_send_cmd_pdu(mvm, TX_ANT_CONFIGURATION_CMD, 0, 44 sizeof(tx_ant_cmd), &tx_ant_cmd); 45 } 46 47 static int iwl_send_rss_cfg_cmd(struct iwl_mvm *mvm) 48 { 49 int i; 50 struct iwl_rss_config_cmd cmd = { 51 .flags = cpu_to_le32(IWL_RSS_ENABLE), 52 .hash_mask = BIT(IWL_RSS_HASH_TYPE_IPV4_TCP) | 53 BIT(IWL_RSS_HASH_TYPE_IPV4_UDP) | 54 BIT(IWL_RSS_HASH_TYPE_IPV4_PAYLOAD) | 55 BIT(IWL_RSS_HASH_TYPE_IPV6_TCP) | 56 BIT(IWL_RSS_HASH_TYPE_IPV6_UDP) | 57 BIT(IWL_RSS_HASH_TYPE_IPV6_PAYLOAD), 58 }; 59 60 if (mvm->trans->num_rx_queues == 1) 61 return 0; 62 63 /* Do not direct RSS traffic to Q 0 which is our fallback queue */ 64 for (i = 0; i < ARRAY_SIZE(cmd.indirection_table); i++) 65 cmd.indirection_table[i] = 66 1 + (i % (mvm->trans->num_rx_queues - 1)); 67 netdev_rss_key_fill(cmd.secret_key, sizeof(cmd.secret_key)); 68 69 return iwl_mvm_send_cmd_pdu(mvm, RSS_CONFIG_CMD, 0, sizeof(cmd), &cmd); 70 } 71 72 static int iwl_mvm_send_dqa_cmd(struct iwl_mvm *mvm) 73 { 74 struct iwl_dqa_enable_cmd dqa_cmd = { 75 .cmd_queue = cpu_to_le32(IWL_MVM_DQA_CMD_QUEUE), 76 }; 77 u32 cmd_id = WIDE_ID(DATA_PATH_GROUP, DQA_ENABLE_CMD); 78 int ret; 79 80 ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, sizeof(dqa_cmd), &dqa_cmd); 81 if (ret) 82 IWL_ERR(mvm, "Failed to send DQA enabling command: %d\n", ret); 83 else 84 IWL_DEBUG_FW(mvm, "Working in DQA mode\n"); 85 86 return ret; 87 } 88 89 void iwl_mvm_mfu_assert_dump_notif(struct iwl_mvm *mvm, 90 struct iwl_rx_cmd_buffer *rxb) 91 { 92 struct iwl_rx_packet *pkt = rxb_addr(rxb); 93 struct iwl_mfu_assert_dump_notif *mfu_dump_notif = (void *)pkt->data; 94 __le32 *dump_data = mfu_dump_notif->data; 95 int n_words = le32_to_cpu(mfu_dump_notif->data_size) / sizeof(__le32); 96 int i; 97 98 if (mfu_dump_notif->index_num == 0) 99 IWL_INFO(mvm, "MFUART assert id 0x%x occurred\n", 100 le32_to_cpu(mfu_dump_notif->assert_id)); 101 102 for (i = 0; i < n_words; i++) 103 IWL_DEBUG_INFO(mvm, 104 "MFUART assert dump, dword %u: 0x%08x\n", 105 le16_to_cpu(mfu_dump_notif->index_num) * 106 n_words + i, 107 le32_to_cpu(dump_data[i])); 108 } 109 110 static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait, 111 struct iwl_rx_packet *pkt, void *data) 112 { 113 unsigned int pkt_len = iwl_rx_packet_payload_len(pkt); 114 struct iwl_mvm *mvm = 115 container_of(notif_wait, struct iwl_mvm, notif_wait); 116 struct iwl_mvm_alive_data *alive_data = data; 117 struct iwl_umac_alive *umac; 118 struct iwl_lmac_alive *lmac1; 119 struct iwl_lmac_alive *lmac2 = NULL; 120 u16 status; 121 u32 lmac_error_event_table, umac_error_table; 122 u32 version = iwl_fw_lookup_notif_ver(mvm->fw, LEGACY_GROUP, 123 UCODE_ALIVE_NTFY, 0); 124 u32 i; 125 struct iwl_trans *trans = mvm->trans; 126 enum iwl_device_family device_family = trans->trans_cfg->device_family; 127 128 129 if (version == 6) { 130 struct iwl_alive_ntf_v6 *palive; 131 132 if (pkt_len < sizeof(*palive)) 133 return false; 134 135 palive = (void *)pkt->data; 136 mvm->trans->dbg.imr_data.imr_enable = 137 le32_to_cpu(palive->imr.enabled); 138 mvm->trans->dbg.imr_data.imr_size = 139 le32_to_cpu(palive->imr.size); 140 mvm->trans->dbg.imr_data.imr2sram_remainbyte = 141 mvm->trans->dbg.imr_data.imr_size; 142 mvm->trans->dbg.imr_data.imr_base_addr = 143 palive->imr.base_addr; 144 mvm->trans->dbg.imr_data.imr_curr_addr = 145 le64_to_cpu(mvm->trans->dbg.imr_data.imr_base_addr); 146 IWL_DEBUG_FW(mvm, "IMR Enabled: 0x0%x size 0x0%x Address 0x%016llx\n", 147 mvm->trans->dbg.imr_data.imr_enable, 148 mvm->trans->dbg.imr_data.imr_size, 149 le64_to_cpu(mvm->trans->dbg.imr_data.imr_base_addr)); 150 151 if (!mvm->trans->dbg.imr_data.imr_enable) { 152 for (i = 0; i < ARRAY_SIZE(mvm->trans->dbg.active_regions); i++) { 153 struct iwl_ucode_tlv *reg_tlv; 154 struct iwl_fw_ini_region_tlv *reg; 155 156 reg_tlv = mvm->trans->dbg.active_regions[i]; 157 if (!reg_tlv) 158 continue; 159 160 reg = (void *)reg_tlv->data; 161 /* 162 * We have only one DRAM IMR region, so we 163 * can break as soon as we find the first 164 * one. 165 */ 166 if (reg->type == IWL_FW_INI_REGION_DRAM_IMR) { 167 mvm->trans->dbg.unsupported_region_msk |= BIT(i); 168 break; 169 } 170 } 171 } 172 } 173 174 if (version >= 5) { 175 struct iwl_alive_ntf_v5 *palive; 176 177 if (pkt_len < sizeof(*palive)) 178 return false; 179 180 palive = (void *)pkt->data; 181 umac = &palive->umac_data; 182 lmac1 = &palive->lmac_data[0]; 183 lmac2 = &palive->lmac_data[1]; 184 status = le16_to_cpu(palive->status); 185 186 mvm->trans->sku_id[0] = le32_to_cpu(palive->sku_id.data[0]); 187 mvm->trans->sku_id[1] = le32_to_cpu(palive->sku_id.data[1]); 188 mvm->trans->sku_id[2] = le32_to_cpu(palive->sku_id.data[2]); 189 190 IWL_DEBUG_FW(mvm, "Got sku_id: 0x0%x 0x0%x 0x0%x\n", 191 mvm->trans->sku_id[0], 192 mvm->trans->sku_id[1], 193 mvm->trans->sku_id[2]); 194 } else if (iwl_rx_packet_payload_len(pkt) == sizeof(struct iwl_alive_ntf_v4)) { 195 struct iwl_alive_ntf_v4 *palive; 196 197 if (pkt_len < sizeof(*palive)) 198 return false; 199 200 palive = (void *)pkt->data; 201 umac = &palive->umac_data; 202 lmac1 = &palive->lmac_data[0]; 203 lmac2 = &palive->lmac_data[1]; 204 status = le16_to_cpu(palive->status); 205 } else if (iwl_rx_packet_payload_len(pkt) == 206 sizeof(struct iwl_alive_ntf_v3)) { 207 struct iwl_alive_ntf_v3 *palive3; 208 209 if (pkt_len < sizeof(*palive3)) 210 return false; 211 212 palive3 = (void *)pkt->data; 213 umac = &palive3->umac_data; 214 lmac1 = &palive3->lmac_data; 215 status = le16_to_cpu(palive3->status); 216 } else { 217 WARN(1, "unsupported alive notification (size %d)\n", 218 iwl_rx_packet_payload_len(pkt)); 219 /* get timeout later */ 220 return false; 221 } 222 223 lmac_error_event_table = 224 le32_to_cpu(lmac1->dbg_ptrs.error_event_table_ptr); 225 iwl_fw_lmac1_set_alive_err_table(mvm->trans, lmac_error_event_table); 226 227 if (lmac2) 228 mvm->trans->dbg.lmac_error_event_table[1] = 229 le32_to_cpu(lmac2->dbg_ptrs.error_event_table_ptr); 230 231 umac_error_table = le32_to_cpu(umac->dbg_ptrs.error_info_addr) & 232 ~FW_ADDR_CACHE_CONTROL; 233 234 if (umac_error_table) { 235 if (umac_error_table >= 236 mvm->trans->cfg->min_umac_error_event_table || 237 device_family >= IWL_DEVICE_FAMILY_BZ) { 238 iwl_fw_umac_set_alive_err_table(mvm->trans, 239 umac_error_table); 240 } else { 241 IWL_ERR(mvm, 242 "Not valid error log pointer 0x%08X for %s uCode\n", 243 umac_error_table, 244 (mvm->fwrt.cur_fw_img == IWL_UCODE_INIT) ? 245 "Init" : "RT"); 246 } 247 } 248 249 alive_data->scd_base_addr = le32_to_cpu(lmac1->dbg_ptrs.scd_base_ptr); 250 alive_data->valid = status == IWL_ALIVE_STATUS_OK; 251 252 IWL_DEBUG_FW(mvm, 253 "Alive ucode status 0x%04x revision 0x%01X 0x%01X\n", 254 status, lmac1->ver_type, lmac1->ver_subtype); 255 256 if (lmac2) 257 IWL_DEBUG_FW(mvm, "Alive ucode CDB\n"); 258 259 IWL_DEBUG_FW(mvm, 260 "UMAC version: Major - 0x%x, Minor - 0x%x\n", 261 le32_to_cpu(umac->umac_major), 262 le32_to_cpu(umac->umac_minor)); 263 264 iwl_fwrt_update_fw_versions(&mvm->fwrt, lmac1, umac); 265 266 return true; 267 } 268 269 static bool iwl_wait_init_complete(struct iwl_notif_wait_data *notif_wait, 270 struct iwl_rx_packet *pkt, void *data) 271 { 272 WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF); 273 274 return true; 275 } 276 277 static bool iwl_wait_phy_db_entry(struct iwl_notif_wait_data *notif_wait, 278 struct iwl_rx_packet *pkt, void *data) 279 { 280 struct iwl_phy_db *phy_db = data; 281 282 if (pkt->hdr.cmd != CALIB_RES_NOTIF_PHY_DB) { 283 WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF); 284 return true; 285 } 286 287 WARN_ON(iwl_phy_db_set_section(phy_db, pkt)); 288 289 return false; 290 } 291 292 static void iwl_mvm_print_pd_notification(struct iwl_mvm *mvm) 293 { 294 #define IWL_FW_PRINT_REG_INFO(reg_name) \ 295 IWL_ERR(mvm, #reg_name ": 0x%x\n", iwl_read_umac_prph(trans, reg_name)) 296 297 struct iwl_trans *trans = mvm->trans; 298 enum iwl_device_family device_family = trans->trans_cfg->device_family; 299 300 if (device_family < IWL_DEVICE_FAMILY_8000) 301 return; 302 303 if (device_family <= IWL_DEVICE_FAMILY_9000) 304 IWL_FW_PRINT_REG_INFO(WFPM_ARC1_PD_NOTIFICATION); 305 else 306 IWL_FW_PRINT_REG_INFO(WFPM_LMAC1_PD_NOTIFICATION); 307 308 IWL_FW_PRINT_REG_INFO(HPM_SECONDARY_DEVICE_STATE); 309 310 /* print OPT info */ 311 IWL_FW_PRINT_REG_INFO(WFPM_MAC_OTP_CFG7_ADDR); 312 IWL_FW_PRINT_REG_INFO(WFPM_MAC_OTP_CFG7_DATA); 313 } 314 315 static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm, 316 enum iwl_ucode_type ucode_type) 317 { 318 struct iwl_notification_wait alive_wait; 319 struct iwl_mvm_alive_data alive_data = {}; 320 const struct fw_img *fw; 321 int ret; 322 enum iwl_ucode_type old_type = mvm->fwrt.cur_fw_img; 323 static const u16 alive_cmd[] = { UCODE_ALIVE_NTFY }; 324 bool run_in_rfkill = 325 ucode_type == IWL_UCODE_INIT || iwl_mvm_has_unified_ucode(mvm); 326 327 if (ucode_type == IWL_UCODE_REGULAR && 328 iwl_fw_dbg_conf_usniffer(mvm->fw, FW_DBG_START_FROM_ALIVE) && 329 !(fw_has_capa(&mvm->fw->ucode_capa, 330 IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED))) 331 fw = iwl_get_ucode_image(mvm->fw, IWL_UCODE_REGULAR_USNIFFER); 332 else 333 fw = iwl_get_ucode_image(mvm->fw, ucode_type); 334 if (WARN_ON(!fw)) 335 return -EINVAL; 336 iwl_fw_set_current_image(&mvm->fwrt, ucode_type); 337 clear_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status); 338 339 iwl_init_notification_wait(&mvm->notif_wait, &alive_wait, 340 alive_cmd, ARRAY_SIZE(alive_cmd), 341 iwl_alive_fn, &alive_data); 342 343 /* 344 * We want to load the INIT firmware even in RFKILL 345 * For the unified firmware case, the ucode_type is not 346 * INIT, but we still need to run it. 347 */ 348 ret = iwl_trans_start_fw(mvm->trans, fw, run_in_rfkill); 349 if (ret) { 350 iwl_fw_set_current_image(&mvm->fwrt, old_type); 351 iwl_remove_notification(&mvm->notif_wait, &alive_wait); 352 return ret; 353 } 354 355 /* 356 * Some things may run in the background now, but we 357 * just wait for the ALIVE notification here. 358 */ 359 ret = iwl_wait_notification(&mvm->notif_wait, &alive_wait, 360 MVM_UCODE_ALIVE_TIMEOUT); 361 362 if (mvm->trans->trans_cfg->device_family == 363 IWL_DEVICE_FAMILY_AX210) { 364 /* print these registers regardless of alive fail/success */ 365 IWL_INFO(mvm, "WFPM_UMAC_PD_NOTIFICATION: 0x%x\n", 366 iwl_read_umac_prph(mvm->trans, WFPM_ARC1_PD_NOTIFICATION)); 367 IWL_INFO(mvm, "WFPM_LMAC2_PD_NOTIFICATION: 0x%x\n", 368 iwl_read_umac_prph(mvm->trans, WFPM_LMAC2_PD_NOTIFICATION)); 369 IWL_INFO(mvm, "WFPM_AUTH_KEY_0: 0x%x\n", 370 iwl_read_umac_prph(mvm->trans, SB_MODIFY_CFG_FLAG)); 371 IWL_INFO(mvm, "CNVI_SCU_SEQ_DATA_DW9: 0x%x\n", 372 iwl_read_prph(mvm->trans, CNVI_SCU_SEQ_DATA_DW9)); 373 } 374 375 if (ret) { 376 struct iwl_trans *trans = mvm->trans; 377 378 /* SecBoot info */ 379 if (trans->trans_cfg->device_family >= 380 IWL_DEVICE_FAMILY_22000) { 381 IWL_ERR(mvm, 382 "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n", 383 iwl_read_umac_prph(trans, UMAG_SB_CPU_1_STATUS), 384 iwl_read_umac_prph(trans, 385 UMAG_SB_CPU_2_STATUS)); 386 } else if (trans->trans_cfg->device_family >= 387 IWL_DEVICE_FAMILY_8000) { 388 IWL_ERR(mvm, 389 "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n", 390 iwl_read_prph(trans, SB_CPU_1_STATUS), 391 iwl_read_prph(trans, SB_CPU_2_STATUS)); 392 } 393 394 iwl_mvm_print_pd_notification(mvm); 395 396 /* LMAC/UMAC PC info */ 397 if (trans->trans_cfg->device_family >= 398 IWL_DEVICE_FAMILY_9000) { 399 IWL_ERR(mvm, "UMAC PC: 0x%x\n", 400 iwl_read_umac_prph(trans, 401 UREG_UMAC_CURRENT_PC)); 402 IWL_ERR(mvm, "LMAC PC: 0x%x\n", 403 iwl_read_umac_prph(trans, 404 UREG_LMAC1_CURRENT_PC)); 405 if (iwl_mvm_is_cdb_supported(mvm)) 406 IWL_ERR(mvm, "LMAC2 PC: 0x%x\n", 407 iwl_read_umac_prph(trans, 408 UREG_LMAC2_CURRENT_PC)); 409 } 410 411 if (ret == -ETIMEDOUT && !mvm->pldr_sync) 412 iwl_fw_dbg_error_collect(&mvm->fwrt, 413 FW_DBG_TRIGGER_ALIVE_TIMEOUT); 414 415 iwl_fw_set_current_image(&mvm->fwrt, old_type); 416 return ret; 417 } 418 419 if (!alive_data.valid) { 420 IWL_ERR(mvm, "Loaded ucode is not valid!\n"); 421 iwl_fw_set_current_image(&mvm->fwrt, old_type); 422 return -EIO; 423 } 424 425 /* if reached this point, Alive notification was received */ 426 iwl_mei_alive_notif(true); 427 428 ret = iwl_pnvm_load(mvm->trans, &mvm->notif_wait); 429 if (ret) { 430 IWL_ERR(mvm, "Timeout waiting for PNVM load!\n"); 431 iwl_fw_set_current_image(&mvm->fwrt, old_type); 432 return ret; 433 } 434 435 iwl_trans_fw_alive(mvm->trans, alive_data.scd_base_addr); 436 437 /* 438 * Note: all the queues are enabled as part of the interface 439 * initialization, but in firmware restart scenarios they 440 * could be stopped, so wake them up. In firmware restart, 441 * mac80211 will have the queues stopped as well until the 442 * reconfiguration completes. During normal startup, they 443 * will be empty. 444 */ 445 446 memset(&mvm->queue_info, 0, sizeof(mvm->queue_info)); 447 /* 448 * Set a 'fake' TID for the command queue, since we use the 449 * hweight() of the tid_bitmap as a refcount now. Not that 450 * we ever even consider the command queue as one we might 451 * want to reuse, but be safe nevertheless. 452 */ 453 mvm->queue_info[IWL_MVM_DQA_CMD_QUEUE].tid_bitmap = 454 BIT(IWL_MAX_TID_COUNT + 2); 455 456 set_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status); 457 #ifdef CONFIG_IWLWIFI_DEBUGFS 458 iwl_fw_set_dbg_rec_on(&mvm->fwrt); 459 #endif 460 461 /* 462 * All the BSSes in the BSS table include the GP2 in the system 463 * at the beacon Rx time, this is of course no longer relevant 464 * since we are resetting the firmware. 465 * Purge all the BSS table. 466 */ 467 cfg80211_bss_flush(mvm->hw->wiphy); 468 469 return 0; 470 } 471 472 static int iwl_run_unified_mvm_ucode(struct iwl_mvm *mvm) 473 { 474 struct iwl_notification_wait init_wait; 475 struct iwl_nvm_access_complete_cmd nvm_complete = {}; 476 struct iwl_init_extended_cfg_cmd init_cfg = { 477 .init_flags = cpu_to_le32(BIT(IWL_INIT_NVM)), 478 }; 479 static const u16 init_complete[] = { 480 INIT_COMPLETE_NOTIF, 481 }; 482 int ret; 483 484 if (mvm->trans->cfg->tx_with_siso_diversity) 485 init_cfg.init_flags |= cpu_to_le32(BIT(IWL_INIT_PHY)); 486 487 lockdep_assert_held(&mvm->mutex); 488 489 mvm->rfkill_safe_init_done = false; 490 491 iwl_init_notification_wait(&mvm->notif_wait, 492 &init_wait, 493 init_complete, 494 ARRAY_SIZE(init_complete), 495 iwl_wait_init_complete, 496 NULL); 497 498 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL); 499 500 /* Will also start the device */ 501 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR); 502 if (ret) { 503 IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret); 504 goto error; 505 } 506 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE, 507 NULL); 508 509 /* Send init config command to mark that we are sending NVM access 510 * commands 511 */ 512 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(SYSTEM_GROUP, 513 INIT_EXTENDED_CFG_CMD), 514 CMD_SEND_IN_RFKILL, 515 sizeof(init_cfg), &init_cfg); 516 if (ret) { 517 IWL_ERR(mvm, "Failed to run init config command: %d\n", 518 ret); 519 goto error; 520 } 521 522 /* Load NVM to NIC if needed */ 523 if (mvm->nvm_file_name) { 524 ret = iwl_read_external_nvm(mvm->trans, mvm->nvm_file_name, 525 mvm->nvm_sections); 526 if (ret) 527 goto error; 528 ret = iwl_mvm_load_nvm_to_nic(mvm); 529 if (ret) 530 goto error; 531 } 532 533 if (IWL_MVM_PARSE_NVM && !mvm->nvm_data) { 534 ret = iwl_nvm_init(mvm); 535 if (ret) { 536 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret); 537 goto error; 538 } 539 } 540 541 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(REGULATORY_AND_NVM_GROUP, 542 NVM_ACCESS_COMPLETE), 543 CMD_SEND_IN_RFKILL, 544 sizeof(nvm_complete), &nvm_complete); 545 if (ret) { 546 IWL_ERR(mvm, "Failed to run complete NVM access: %d\n", 547 ret); 548 goto error; 549 } 550 551 /* We wait for the INIT complete notification */ 552 ret = iwl_wait_notification(&mvm->notif_wait, &init_wait, 553 MVM_UCODE_ALIVE_TIMEOUT); 554 if (ret) 555 return ret; 556 557 /* Read the NVM only at driver load time, no need to do this twice */ 558 if (!IWL_MVM_PARSE_NVM && !mvm->nvm_data) { 559 mvm->nvm_data = iwl_get_nvm(mvm->trans, mvm->fw); 560 if (IS_ERR(mvm->nvm_data)) { 561 ret = PTR_ERR(mvm->nvm_data); 562 mvm->nvm_data = NULL; 563 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret); 564 return ret; 565 } 566 } 567 568 mvm->rfkill_safe_init_done = true; 569 570 return 0; 571 572 error: 573 iwl_remove_notification(&mvm->notif_wait, &init_wait); 574 return ret; 575 } 576 577 #ifdef CONFIG_ACPI 578 static void iwl_mvm_phy_filter_init(struct iwl_mvm *mvm, 579 struct iwl_phy_specific_cfg *phy_filters) 580 { 581 /* 582 * TODO: read specific phy config from BIOS 583 * ACPI table for this feature has not been defined yet, 584 * so for now we use hardcoded values. 585 */ 586 587 if (IWL_MVM_PHY_FILTER_CHAIN_A) { 588 phy_filters->filter_cfg_chain_a = 589 cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_A); 590 } 591 if (IWL_MVM_PHY_FILTER_CHAIN_B) { 592 phy_filters->filter_cfg_chain_b = 593 cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_B); 594 } 595 if (IWL_MVM_PHY_FILTER_CHAIN_C) { 596 phy_filters->filter_cfg_chain_c = 597 cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_C); 598 } 599 if (IWL_MVM_PHY_FILTER_CHAIN_D) { 600 phy_filters->filter_cfg_chain_d = 601 cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_D); 602 } 603 } 604 #else /* CONFIG_ACPI */ 605 606 static void iwl_mvm_phy_filter_init(struct iwl_mvm *mvm, 607 struct iwl_phy_specific_cfg *phy_filters) 608 { 609 } 610 #endif /* CONFIG_ACPI */ 611 612 #if defined(CONFIG_ACPI) && defined(CONFIG_EFI) 613 static int iwl_mvm_sgom_init(struct iwl_mvm *mvm) 614 { 615 u8 cmd_ver; 616 int ret; 617 struct iwl_host_cmd cmd = { 618 .id = WIDE_ID(REGULATORY_AND_NVM_GROUP, 619 SAR_OFFSET_MAPPING_TABLE_CMD), 620 .flags = 0, 621 .data[0] = &mvm->fwrt.sgom_table, 622 .len[0] = sizeof(mvm->fwrt.sgom_table), 623 .dataflags[0] = IWL_HCMD_DFL_NOCOPY, 624 }; 625 626 if (!mvm->fwrt.sgom_enabled) { 627 IWL_DEBUG_RADIO(mvm, "SGOM table is disabled\n"); 628 return 0; 629 } 630 631 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd.id, 632 IWL_FW_CMD_VER_UNKNOWN); 633 634 if (cmd_ver != 2) { 635 IWL_DEBUG_RADIO(mvm, "command version is unsupported. version = %d\n", 636 cmd_ver); 637 return 0; 638 } 639 640 ret = iwl_mvm_send_cmd(mvm, &cmd); 641 if (ret < 0) 642 IWL_ERR(mvm, "failed to send SAR_OFFSET_MAPPING_CMD (%d)\n", ret); 643 644 return ret; 645 } 646 #else 647 648 static int iwl_mvm_sgom_init(struct iwl_mvm *mvm) 649 { 650 return 0; 651 } 652 #endif 653 654 static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm) 655 { 656 u32 cmd_id = PHY_CONFIGURATION_CMD; 657 struct iwl_phy_cfg_cmd_v3 phy_cfg_cmd; 658 enum iwl_ucode_type ucode_type = mvm->fwrt.cur_fw_img; 659 struct iwl_phy_specific_cfg phy_filters = {}; 660 u8 cmd_ver; 661 size_t cmd_size; 662 663 if (iwl_mvm_has_unified_ucode(mvm) && 664 !mvm->trans->cfg->tx_with_siso_diversity) 665 return 0; 666 667 if (mvm->trans->cfg->tx_with_siso_diversity) { 668 /* 669 * TODO: currently we don't set the antenna but letting the NIC 670 * to decide which antenna to use. This should come from BIOS. 671 */ 672 phy_cfg_cmd.phy_cfg = 673 cpu_to_le32(FW_PHY_CFG_CHAIN_SAD_ENABLED); 674 } 675 676 /* Set parameters */ 677 phy_cfg_cmd.phy_cfg = cpu_to_le32(iwl_mvm_get_phy_config(mvm)); 678 679 /* set flags extra PHY configuration flags from the device's cfg */ 680 phy_cfg_cmd.phy_cfg |= 681 cpu_to_le32(mvm->trans->trans_cfg->extra_phy_cfg_flags); 682 683 phy_cfg_cmd.calib_control.event_trigger = 684 mvm->fw->default_calib[ucode_type].event_trigger; 685 phy_cfg_cmd.calib_control.flow_trigger = 686 mvm->fw->default_calib[ucode_type].flow_trigger; 687 688 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id, 689 IWL_FW_CMD_VER_UNKNOWN); 690 if (cmd_ver == 3) { 691 iwl_mvm_phy_filter_init(mvm, &phy_filters); 692 memcpy(&phy_cfg_cmd.phy_specific_cfg, &phy_filters, 693 sizeof(struct iwl_phy_specific_cfg)); 694 } 695 696 IWL_DEBUG_INFO(mvm, "Sending Phy CFG command: 0x%x\n", 697 phy_cfg_cmd.phy_cfg); 698 cmd_size = (cmd_ver == 3) ? sizeof(struct iwl_phy_cfg_cmd_v3) : 699 sizeof(struct iwl_phy_cfg_cmd_v1); 700 return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, cmd_size, &phy_cfg_cmd); 701 } 702 703 int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm) 704 { 705 struct iwl_notification_wait calib_wait; 706 static const u16 init_complete[] = { 707 INIT_COMPLETE_NOTIF, 708 CALIB_RES_NOTIF_PHY_DB 709 }; 710 int ret; 711 712 if (iwl_mvm_has_unified_ucode(mvm)) 713 return iwl_run_unified_mvm_ucode(mvm); 714 715 lockdep_assert_held(&mvm->mutex); 716 717 mvm->rfkill_safe_init_done = false; 718 719 iwl_init_notification_wait(&mvm->notif_wait, 720 &calib_wait, 721 init_complete, 722 ARRAY_SIZE(init_complete), 723 iwl_wait_phy_db_entry, 724 mvm->phy_db); 725 726 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL); 727 728 /* Will also start the device */ 729 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_INIT); 730 if (ret) { 731 IWL_ERR(mvm, "Failed to start INIT ucode: %d\n", ret); 732 goto remove_notif; 733 } 734 735 if (mvm->trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_8000) { 736 ret = iwl_mvm_send_bt_init_conf(mvm); 737 if (ret) 738 goto remove_notif; 739 } 740 741 /* Read the NVM only at driver load time, no need to do this twice */ 742 if (!mvm->nvm_data) { 743 ret = iwl_nvm_init(mvm); 744 if (ret) { 745 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret); 746 goto remove_notif; 747 } 748 } 749 750 /* In case we read the NVM from external file, load it to the NIC */ 751 if (mvm->nvm_file_name) { 752 ret = iwl_mvm_load_nvm_to_nic(mvm); 753 if (ret) 754 goto remove_notif; 755 } 756 757 WARN_ONCE(mvm->nvm_data->nvm_version < mvm->trans->cfg->nvm_ver, 758 "Too old NVM version (0x%0x, required = 0x%0x)", 759 mvm->nvm_data->nvm_version, mvm->trans->cfg->nvm_ver); 760 761 /* 762 * abort after reading the nvm in case RF Kill is on, we will complete 763 * the init seq later when RF kill will switch to off 764 */ 765 if (iwl_mvm_is_radio_hw_killed(mvm)) { 766 IWL_DEBUG_RF_KILL(mvm, 767 "jump over all phy activities due to RF kill\n"); 768 goto remove_notif; 769 } 770 771 mvm->rfkill_safe_init_done = true; 772 773 /* Send TX valid antennas before triggering calibrations */ 774 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); 775 if (ret) 776 goto remove_notif; 777 778 ret = iwl_send_phy_cfg_cmd(mvm); 779 if (ret) { 780 IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n", 781 ret); 782 goto remove_notif; 783 } 784 785 /* 786 * Some things may run in the background now, but we 787 * just wait for the calibration complete notification. 788 */ 789 ret = iwl_wait_notification(&mvm->notif_wait, &calib_wait, 790 MVM_UCODE_CALIB_TIMEOUT); 791 if (!ret) 792 goto out; 793 794 if (iwl_mvm_is_radio_hw_killed(mvm)) { 795 IWL_DEBUG_RF_KILL(mvm, "RFKILL while calibrating.\n"); 796 ret = 0; 797 } else { 798 IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n", 799 ret); 800 } 801 802 goto out; 803 804 remove_notif: 805 iwl_remove_notification(&mvm->notif_wait, &calib_wait); 806 out: 807 mvm->rfkill_safe_init_done = false; 808 if (iwlmvm_mod_params.init_dbg && !mvm->nvm_data) { 809 /* we want to debug INIT and we have no NVM - fake */ 810 mvm->nvm_data = kzalloc(sizeof(struct iwl_nvm_data) + 811 sizeof(struct ieee80211_channel) + 812 sizeof(struct ieee80211_rate), 813 GFP_KERNEL); 814 if (!mvm->nvm_data) 815 return -ENOMEM; 816 mvm->nvm_data->bands[0].channels = mvm->nvm_data->channels; 817 mvm->nvm_data->bands[0].n_channels = 1; 818 mvm->nvm_data->bands[0].n_bitrates = 1; 819 mvm->nvm_data->bands[0].bitrates = 820 (void *)((u8 *)mvm->nvm_data->channels + 1); 821 mvm->nvm_data->bands[0].bitrates->hw_value = 10; 822 } 823 824 return ret; 825 } 826 827 static int iwl_mvm_config_ltr(struct iwl_mvm *mvm) 828 { 829 struct iwl_ltr_config_cmd cmd = { 830 .flags = cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE), 831 }; 832 833 if (!mvm->trans->ltr_enabled) 834 return 0; 835 836 return iwl_mvm_send_cmd_pdu(mvm, LTR_CONFIG, 0, 837 sizeof(cmd), &cmd); 838 } 839 840 #ifdef CONFIG_ACPI 841 int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a, int prof_b) 842 { 843 u32 cmd_id = REDUCE_TX_POWER_CMD; 844 struct iwl_dev_tx_power_cmd cmd = { 845 .common.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_CHAINS), 846 }; 847 __le16 *per_chain; 848 int ret; 849 u16 len = 0; 850 u32 n_subbands; 851 u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id, 852 IWL_FW_CMD_VER_UNKNOWN); 853 if (cmd_ver == 7) { 854 len = sizeof(cmd.v7); 855 n_subbands = IWL_NUM_SUB_BANDS_V2; 856 per_chain = cmd.v7.per_chain[0][0]; 857 cmd.v7.flags = cpu_to_le32(mvm->fwrt.reduced_power_flags); 858 } else if (cmd_ver == 6) { 859 len = sizeof(cmd.v6); 860 n_subbands = IWL_NUM_SUB_BANDS_V2; 861 per_chain = cmd.v6.per_chain[0][0]; 862 } else if (fw_has_api(&mvm->fw->ucode_capa, 863 IWL_UCODE_TLV_API_REDUCE_TX_POWER)) { 864 len = sizeof(cmd.v5); 865 n_subbands = IWL_NUM_SUB_BANDS_V1; 866 per_chain = cmd.v5.per_chain[0][0]; 867 } else if (fw_has_capa(&mvm->fw->ucode_capa, 868 IWL_UCODE_TLV_CAPA_TX_POWER_ACK)) { 869 len = sizeof(cmd.v4); 870 n_subbands = IWL_NUM_SUB_BANDS_V1; 871 per_chain = cmd.v4.per_chain[0][0]; 872 } else { 873 len = sizeof(cmd.v3); 874 n_subbands = IWL_NUM_SUB_BANDS_V1; 875 per_chain = cmd.v3.per_chain[0][0]; 876 } 877 878 /* all structs have the same common part, add it */ 879 len += sizeof(cmd.common); 880 881 ret = iwl_sar_select_profile(&mvm->fwrt, per_chain, 882 IWL_NUM_CHAIN_TABLES, 883 n_subbands, prof_a, prof_b); 884 885 /* return on error or if the profile is disabled (positive number) */ 886 if (ret) 887 return ret; 888 889 iwl_mei_set_power_limit(per_chain); 890 891 IWL_DEBUG_RADIO(mvm, "Sending REDUCE_TX_POWER_CMD per chain\n"); 892 return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, len, &cmd); 893 } 894 895 int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm) 896 { 897 union iwl_geo_tx_power_profiles_cmd geo_tx_cmd; 898 struct iwl_geo_tx_power_profiles_resp *resp; 899 u16 len; 900 int ret; 901 struct iwl_host_cmd cmd = { 902 .id = WIDE_ID(PHY_OPS_GROUP, PER_CHAIN_LIMIT_OFFSET_CMD), 903 .flags = CMD_WANT_SKB, 904 .data = { &geo_tx_cmd }, 905 }; 906 u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd.id, 907 IWL_FW_CMD_VER_UNKNOWN); 908 909 /* the ops field is at the same spot for all versions, so set in v1 */ 910 geo_tx_cmd.v1.ops = 911 cpu_to_le32(IWL_PER_CHAIN_OFFSET_GET_CURRENT_TABLE); 912 913 if (cmd_ver == 5) 914 len = sizeof(geo_tx_cmd.v5); 915 else if (cmd_ver == 4) 916 len = sizeof(geo_tx_cmd.v4); 917 else if (cmd_ver == 3) 918 len = sizeof(geo_tx_cmd.v3); 919 else if (fw_has_api(&mvm->fwrt.fw->ucode_capa, 920 IWL_UCODE_TLV_API_SAR_TABLE_VER)) 921 len = sizeof(geo_tx_cmd.v2); 922 else 923 len = sizeof(geo_tx_cmd.v1); 924 925 if (!iwl_sar_geo_support(&mvm->fwrt)) 926 return -EOPNOTSUPP; 927 928 cmd.len[0] = len; 929 930 ret = iwl_mvm_send_cmd(mvm, &cmd); 931 if (ret) { 932 IWL_ERR(mvm, "Failed to get geographic profile info %d\n", ret); 933 return ret; 934 } 935 936 resp = (void *)cmd.resp_pkt->data; 937 ret = le32_to_cpu(resp->profile_idx); 938 939 if (WARN_ON(ret > ACPI_NUM_GEO_PROFILES_REV3)) 940 ret = -EIO; 941 942 iwl_free_resp(&cmd); 943 return ret; 944 } 945 946 static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm) 947 { 948 u32 cmd_id = WIDE_ID(PHY_OPS_GROUP, PER_CHAIN_LIMIT_OFFSET_CMD); 949 union iwl_geo_tx_power_profiles_cmd cmd; 950 u16 len; 951 u32 n_bands; 952 u32 n_profiles; 953 u32 sk = 0; 954 int ret; 955 u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id, 956 IWL_FW_CMD_VER_UNKNOWN); 957 958 BUILD_BUG_ON(offsetof(struct iwl_geo_tx_power_profiles_cmd_v1, ops) != 959 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, ops) || 960 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, ops) != 961 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, ops) || 962 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, ops) != 963 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, ops) || 964 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, ops) != 965 offsetof(struct iwl_geo_tx_power_profiles_cmd_v5, ops)); 966 967 /* the ops field is at the same spot for all versions, so set in v1 */ 968 cmd.v1.ops = cpu_to_le32(IWL_PER_CHAIN_OFFSET_SET_TABLES); 969 970 if (cmd_ver == 5) { 971 len = sizeof(cmd.v5); 972 n_bands = ARRAY_SIZE(cmd.v5.table[0]); 973 n_profiles = ACPI_NUM_GEO_PROFILES_REV3; 974 } else if (cmd_ver == 4) { 975 len = sizeof(cmd.v4); 976 n_bands = ARRAY_SIZE(cmd.v4.table[0]); 977 n_profiles = ACPI_NUM_GEO_PROFILES_REV3; 978 } else if (cmd_ver == 3) { 979 len = sizeof(cmd.v3); 980 n_bands = ARRAY_SIZE(cmd.v3.table[0]); 981 n_profiles = ACPI_NUM_GEO_PROFILES; 982 } else if (fw_has_api(&mvm->fwrt.fw->ucode_capa, 983 IWL_UCODE_TLV_API_SAR_TABLE_VER)) { 984 len = sizeof(cmd.v2); 985 n_bands = ARRAY_SIZE(cmd.v2.table[0]); 986 n_profiles = ACPI_NUM_GEO_PROFILES; 987 } else { 988 len = sizeof(cmd.v1); 989 n_bands = ARRAY_SIZE(cmd.v1.table[0]); 990 n_profiles = ACPI_NUM_GEO_PROFILES; 991 } 992 993 BUILD_BUG_ON(offsetof(struct iwl_geo_tx_power_profiles_cmd_v1, table) != 994 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, table) || 995 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, table) != 996 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, table) || 997 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, table) != 998 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, table) || 999 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, table) != 1000 offsetof(struct iwl_geo_tx_power_profiles_cmd_v5, table)); 1001 /* the table is at the same position for all versions, so set use v1 */ 1002 ret = iwl_sar_geo_init(&mvm->fwrt, &cmd.v1.table[0][0], 1003 n_bands, n_profiles); 1004 1005 /* 1006 * It is a valid scenario to not support SAR, or miss wgds table, 1007 * but in that case there is no need to send the command. 1008 */ 1009 if (ret) 1010 return 0; 1011 1012 /* Only set to South Korea if the table revision is 1 */ 1013 if (mvm->fwrt.geo_rev == 1) 1014 sk = 1; 1015 1016 /* 1017 * Set the table_revision to South Korea (1) or not (0). The 1018 * element name is misleading, as it doesn't contain the table 1019 * revision number, but whether the South Korea variation 1020 * should be used. 1021 * This must be done after calling iwl_sar_geo_init(). 1022 */ 1023 if (cmd_ver == 5) 1024 cmd.v5.table_revision = cpu_to_le32(sk); 1025 else if (cmd_ver == 4) 1026 cmd.v4.table_revision = cpu_to_le32(sk); 1027 else if (cmd_ver == 3) 1028 cmd.v3.table_revision = cpu_to_le32(sk); 1029 else if (fw_has_api(&mvm->fwrt.fw->ucode_capa, 1030 IWL_UCODE_TLV_API_SAR_TABLE_VER)) 1031 cmd.v2.table_revision = cpu_to_le32(sk); 1032 1033 return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, len, &cmd); 1034 } 1035 1036 int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm) 1037 { 1038 union iwl_ppag_table_cmd cmd; 1039 int ret, cmd_size; 1040 1041 ret = iwl_read_ppag_table(&mvm->fwrt, &cmd, &cmd_size); 1042 /* Not supporting PPAG table is a valid scenario */ 1043 if(ret < 0) 1044 return 0; 1045 1046 IWL_DEBUG_RADIO(mvm, "Sending PER_PLATFORM_ANT_GAIN_CMD\n"); 1047 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(PHY_OPS_GROUP, 1048 PER_PLATFORM_ANT_GAIN_CMD), 1049 0, cmd_size, &cmd); 1050 if (ret < 0) 1051 IWL_ERR(mvm, "failed to send PER_PLATFORM_ANT_GAIN_CMD (%d)\n", 1052 ret); 1053 1054 return ret; 1055 } 1056 1057 static int iwl_mvm_ppag_init(struct iwl_mvm *mvm) 1058 { 1059 /* no need to read the table, done in INIT stage */ 1060 if (!(iwl_acpi_is_ppag_approved(&mvm->fwrt))) 1061 return 0; 1062 1063 return iwl_mvm_ppag_send_cmd(mvm); 1064 } 1065 1066 static const struct dmi_system_id dmi_tas_approved_list[] = { 1067 { .ident = "HP", 1068 .matches = { 1069 DMI_MATCH(DMI_SYS_VENDOR, "HP"), 1070 }, 1071 }, 1072 { .ident = "SAMSUNG", 1073 .matches = { 1074 DMI_MATCH(DMI_SYS_VENDOR, "SAMSUNG ELECTRONICS CO., LTD"), 1075 }, 1076 }, 1077 { .ident = "LENOVO", 1078 .matches = { 1079 DMI_MATCH(DMI_SYS_VENDOR, "Lenovo"), 1080 }, 1081 }, 1082 { .ident = "DELL", 1083 .matches = { 1084 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 1085 }, 1086 }, 1087 1088 /* keep last */ 1089 {} 1090 }; 1091 1092 static bool iwl_mvm_add_to_tas_block_list(__le32 *list, __le32 *le_size, unsigned int mcc) 1093 { 1094 int i; 1095 u32 size = le32_to_cpu(*le_size); 1096 1097 /* Verify that there is room for another country */ 1098 if (size >= IWL_TAS_BLOCK_LIST_MAX) 1099 return false; 1100 1101 for (i = 0; i < size; i++) { 1102 if (list[i] == cpu_to_le32(mcc)) 1103 return true; 1104 } 1105 1106 list[size++] = cpu_to_le32(mcc); 1107 *le_size = cpu_to_le32(size); 1108 return true; 1109 } 1110 1111 static void iwl_mvm_tas_init(struct iwl_mvm *mvm) 1112 { 1113 u32 cmd_id = WIDE_ID(REGULATORY_AND_NVM_GROUP, TAS_CONFIG); 1114 int ret; 1115 union iwl_tas_config_cmd cmd = {}; 1116 int cmd_size, fw_ver; 1117 1118 BUILD_BUG_ON(ARRAY_SIZE(cmd.v3.block_list_array) < 1119 APCI_WTAS_BLACK_LIST_MAX); 1120 1121 if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_TAS_CFG)) { 1122 IWL_DEBUG_RADIO(mvm, "TAS not enabled in FW\n"); 1123 return; 1124 } 1125 1126 fw_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id, 1127 IWL_FW_CMD_VER_UNKNOWN); 1128 1129 ret = iwl_acpi_get_tas(&mvm->fwrt, &cmd, fw_ver); 1130 if (ret < 0) { 1131 IWL_DEBUG_RADIO(mvm, 1132 "TAS table invalid or unavailable. (%d)\n", 1133 ret); 1134 return; 1135 } 1136 1137 if (ret == 0) 1138 return; 1139 1140 if (!dmi_check_system(dmi_tas_approved_list)) { 1141 IWL_DEBUG_RADIO(mvm, 1142 "System vendor '%s' is not in the approved list, disabling TAS in US and Canada.\n", 1143 dmi_get_system_info(DMI_SYS_VENDOR)); 1144 if ((!iwl_mvm_add_to_tas_block_list(cmd.v4.block_list_array, 1145 &cmd.v4.block_list_size, 1146 IWL_TAS_US_MCC)) || 1147 (!iwl_mvm_add_to_tas_block_list(cmd.v4.block_list_array, 1148 &cmd.v4.block_list_size, 1149 IWL_TAS_CANADA_MCC))) { 1150 IWL_DEBUG_RADIO(mvm, 1151 "Unable to add US/Canada to TAS block list, disabling TAS\n"); 1152 return; 1153 } 1154 } 1155 1156 /* v4 is the same size as v3, so no need to differentiate here */ 1157 cmd_size = fw_ver < 3 ? 1158 sizeof(struct iwl_tas_config_cmd_v2) : 1159 sizeof(struct iwl_tas_config_cmd_v3); 1160 1161 ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, cmd_size, &cmd); 1162 if (ret < 0) 1163 IWL_DEBUG_RADIO(mvm, "failed to send TAS_CONFIG (%d)\n", ret); 1164 } 1165 1166 static u8 iwl_mvm_eval_dsm_rfi(struct iwl_mvm *mvm) 1167 { 1168 u8 value; 1169 int ret = iwl_acpi_get_dsm_u8(mvm->fwrt.dev, 0, DSM_RFI_FUNC_ENABLE, 1170 &iwl_rfi_guid, &value); 1171 1172 if (ret < 0) { 1173 IWL_DEBUG_RADIO(mvm, "Failed to get DSM RFI, ret=%d\n", ret); 1174 1175 } else if (value >= DSM_VALUE_RFI_MAX) { 1176 IWL_DEBUG_RADIO(mvm, "DSM RFI got invalid value, ret=%d\n", 1177 value); 1178 1179 } else if (value == DSM_VALUE_RFI_ENABLE) { 1180 IWL_DEBUG_RADIO(mvm, "DSM RFI is evaluated to enable\n"); 1181 return DSM_VALUE_RFI_ENABLE; 1182 } 1183 1184 IWL_DEBUG_RADIO(mvm, "DSM RFI is disabled\n"); 1185 1186 /* default behaviour is disabled */ 1187 return DSM_VALUE_RFI_DISABLE; 1188 } 1189 1190 static void iwl_mvm_lari_cfg(struct iwl_mvm *mvm) 1191 { 1192 int ret; 1193 u32 value; 1194 struct iwl_lari_config_change_cmd_v6 cmd = {}; 1195 1196 cmd.config_bitmap = iwl_acpi_get_lari_config_bitmap(&mvm->fwrt); 1197 1198 ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0, DSM_FUNC_11AX_ENABLEMENT, 1199 &iwl_guid, &value); 1200 if (!ret) 1201 cmd.oem_11ax_allow_bitmap = cpu_to_le32(value); 1202 1203 ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0, 1204 DSM_FUNC_ENABLE_UNII4_CHAN, 1205 &iwl_guid, &value); 1206 if (!ret) 1207 cmd.oem_unii4_allow_bitmap = cpu_to_le32(value); 1208 1209 ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0, 1210 DSM_FUNC_ACTIVATE_CHANNEL, 1211 &iwl_guid, &value); 1212 if (!ret) 1213 cmd.chan_state_active_bitmap = cpu_to_le32(value); 1214 1215 ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0, 1216 DSM_FUNC_ENABLE_6E, 1217 &iwl_guid, &value); 1218 if (!ret) 1219 cmd.oem_uhb_allow_bitmap = cpu_to_le32(value); 1220 1221 ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0, 1222 DSM_FUNC_FORCE_DISABLE_CHANNELS, 1223 &iwl_guid, &value); 1224 if (!ret) 1225 cmd.force_disable_channels_bitmap = cpu_to_le32(value); 1226 1227 if (cmd.config_bitmap || 1228 cmd.oem_uhb_allow_bitmap || 1229 cmd.oem_11ax_allow_bitmap || 1230 cmd.oem_unii4_allow_bitmap || 1231 cmd.chan_state_active_bitmap || 1232 cmd.force_disable_channels_bitmap) { 1233 size_t cmd_size; 1234 u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, 1235 WIDE_ID(REGULATORY_AND_NVM_GROUP, 1236 LARI_CONFIG_CHANGE), 1237 1); 1238 switch (cmd_ver) { 1239 case 6: 1240 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v6); 1241 break; 1242 case 5: 1243 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v5); 1244 break; 1245 case 4: 1246 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v4); 1247 break; 1248 case 3: 1249 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v3); 1250 break; 1251 case 2: 1252 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v2); 1253 break; 1254 default: 1255 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v1); 1256 break; 1257 } 1258 1259 IWL_DEBUG_RADIO(mvm, 1260 "sending LARI_CONFIG_CHANGE, config_bitmap=0x%x, oem_11ax_allow_bitmap=0x%x\n", 1261 le32_to_cpu(cmd.config_bitmap), 1262 le32_to_cpu(cmd.oem_11ax_allow_bitmap)); 1263 IWL_DEBUG_RADIO(mvm, 1264 "sending LARI_CONFIG_CHANGE, oem_unii4_allow_bitmap=0x%x, chan_state_active_bitmap=0x%x, cmd_ver=%d\n", 1265 le32_to_cpu(cmd.oem_unii4_allow_bitmap), 1266 le32_to_cpu(cmd.chan_state_active_bitmap), 1267 cmd_ver); 1268 IWL_DEBUG_RADIO(mvm, 1269 "sending LARI_CONFIG_CHANGE, oem_uhb_allow_bitmap=0x%x, force_disable_channels_bitmap=0x%x\n", 1270 le32_to_cpu(cmd.oem_uhb_allow_bitmap), 1271 le32_to_cpu(cmd.force_disable_channels_bitmap)); 1272 ret = iwl_mvm_send_cmd_pdu(mvm, 1273 WIDE_ID(REGULATORY_AND_NVM_GROUP, 1274 LARI_CONFIG_CHANGE), 1275 0, cmd_size, &cmd); 1276 if (ret < 0) 1277 IWL_DEBUG_RADIO(mvm, 1278 "Failed to send LARI_CONFIG_CHANGE (%d)\n", 1279 ret); 1280 } 1281 } 1282 1283 void iwl_mvm_get_acpi_tables(struct iwl_mvm *mvm) 1284 { 1285 int ret; 1286 1287 /* read PPAG table */ 1288 ret = iwl_acpi_get_ppag_table(&mvm->fwrt); 1289 if (ret < 0) { 1290 IWL_DEBUG_RADIO(mvm, 1291 "PPAG BIOS table invalid or unavailable. (%d)\n", 1292 ret); 1293 } 1294 1295 /* read SAR tables */ 1296 ret = iwl_sar_get_wrds_table(&mvm->fwrt); 1297 if (ret < 0) { 1298 IWL_DEBUG_RADIO(mvm, 1299 "WRDS SAR BIOS table invalid or unavailable. (%d)\n", 1300 ret); 1301 /* 1302 * If not available, don't fail and don't bother with EWRD and 1303 * WGDS */ 1304 1305 if (!iwl_sar_get_wgds_table(&mvm->fwrt)) { 1306 /* 1307 * If basic SAR is not available, we check for WGDS, 1308 * which should *not* be available either. If it is 1309 * available, issue an error, because we can't use SAR 1310 * Geo without basic SAR. 1311 */ 1312 IWL_ERR(mvm, "BIOS contains WGDS but no WRDS\n"); 1313 } 1314 1315 } else { 1316 ret = iwl_sar_get_ewrd_table(&mvm->fwrt); 1317 /* if EWRD is not available, we can still use 1318 * WRDS, so don't fail */ 1319 if (ret < 0) 1320 IWL_DEBUG_RADIO(mvm, 1321 "EWRD SAR BIOS table invalid or unavailable. (%d)\n", 1322 ret); 1323 1324 /* read geo SAR table */ 1325 if (iwl_sar_geo_support(&mvm->fwrt)) { 1326 ret = iwl_sar_get_wgds_table(&mvm->fwrt); 1327 if (ret < 0) 1328 IWL_DEBUG_RADIO(mvm, 1329 "Geo SAR BIOS table invalid or unavailable. (%d)\n", 1330 ret); 1331 /* we don't fail if the table is not available */ 1332 } 1333 } 1334 } 1335 #else /* CONFIG_ACPI */ 1336 1337 inline int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, 1338 int prof_a, int prof_b) 1339 { 1340 return 1; 1341 } 1342 1343 inline int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm) 1344 { 1345 return -ENOENT; 1346 } 1347 1348 static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm) 1349 { 1350 return 0; 1351 } 1352 1353 int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm) 1354 { 1355 return -ENOENT; 1356 } 1357 1358 static int iwl_mvm_ppag_init(struct iwl_mvm *mvm) 1359 { 1360 return 0; 1361 } 1362 1363 static void iwl_mvm_tas_init(struct iwl_mvm *mvm) 1364 { 1365 } 1366 1367 static void iwl_mvm_lari_cfg(struct iwl_mvm *mvm) 1368 { 1369 } 1370 1371 static u8 iwl_mvm_eval_dsm_rfi(struct iwl_mvm *mvm) 1372 { 1373 return DSM_VALUE_RFI_DISABLE; 1374 } 1375 1376 void iwl_mvm_get_acpi_tables(struct iwl_mvm *mvm) 1377 { 1378 } 1379 1380 #endif /* CONFIG_ACPI */ 1381 1382 void iwl_mvm_send_recovery_cmd(struct iwl_mvm *mvm, u32 flags) 1383 { 1384 u32 error_log_size = mvm->fw->ucode_capa.error_log_size; 1385 int ret; 1386 u32 resp; 1387 1388 struct iwl_fw_error_recovery_cmd recovery_cmd = { 1389 .flags = cpu_to_le32(flags), 1390 .buf_size = 0, 1391 }; 1392 struct iwl_host_cmd host_cmd = { 1393 .id = WIDE_ID(SYSTEM_GROUP, FW_ERROR_RECOVERY_CMD), 1394 .flags = CMD_WANT_SKB, 1395 .data = {&recovery_cmd, }, 1396 .len = {sizeof(recovery_cmd), }, 1397 }; 1398 1399 /* no error log was defined in TLV */ 1400 if (!error_log_size) 1401 return; 1402 1403 if (flags & ERROR_RECOVERY_UPDATE_DB) { 1404 /* no buf was allocated while HW reset */ 1405 if (!mvm->error_recovery_buf) 1406 return; 1407 1408 host_cmd.data[1] = mvm->error_recovery_buf; 1409 host_cmd.len[1] = error_log_size; 1410 host_cmd.dataflags[1] = IWL_HCMD_DFL_NOCOPY; 1411 recovery_cmd.buf_size = cpu_to_le32(error_log_size); 1412 } 1413 1414 ret = iwl_mvm_send_cmd(mvm, &host_cmd); 1415 kfree(mvm->error_recovery_buf); 1416 mvm->error_recovery_buf = NULL; 1417 1418 if (ret) { 1419 IWL_ERR(mvm, "Failed to send recovery cmd %d\n", ret); 1420 return; 1421 } 1422 1423 /* skb respond is only relevant in ERROR_RECOVERY_UPDATE_DB */ 1424 if (flags & ERROR_RECOVERY_UPDATE_DB) { 1425 resp = le32_to_cpu(*(__le32 *)host_cmd.resp_pkt->data); 1426 if (resp) 1427 IWL_ERR(mvm, 1428 "Failed to send recovery cmd blob was invalid %d\n", 1429 resp); 1430 } 1431 } 1432 1433 static int iwl_mvm_sar_init(struct iwl_mvm *mvm) 1434 { 1435 return iwl_mvm_sar_select_profile(mvm, 1, 1); 1436 } 1437 1438 static int iwl_mvm_load_rt_fw(struct iwl_mvm *mvm) 1439 { 1440 int ret; 1441 1442 if (iwl_mvm_has_unified_ucode(mvm)) 1443 return iwl_run_unified_mvm_ucode(mvm); 1444 1445 ret = iwl_run_init_mvm_ucode(mvm); 1446 1447 if (ret) { 1448 IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", ret); 1449 1450 if (iwlmvm_mod_params.init_dbg) 1451 return 0; 1452 return ret; 1453 } 1454 1455 iwl_fw_dbg_stop_sync(&mvm->fwrt); 1456 iwl_trans_stop_device(mvm->trans); 1457 ret = iwl_trans_start_hw(mvm->trans); 1458 if (ret) 1459 return ret; 1460 1461 mvm->rfkill_safe_init_done = false; 1462 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR); 1463 if (ret) 1464 return ret; 1465 1466 mvm->rfkill_safe_init_done = true; 1467 1468 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE, 1469 NULL); 1470 1471 return iwl_init_paging(&mvm->fwrt, mvm->fwrt.cur_fw_img); 1472 } 1473 1474 int iwl_mvm_up(struct iwl_mvm *mvm) 1475 { 1476 int ret, i; 1477 struct ieee80211_channel *chan; 1478 struct cfg80211_chan_def chandef; 1479 struct ieee80211_supported_band *sband = NULL; 1480 u32 sb_cfg; 1481 1482 lockdep_assert_held(&mvm->mutex); 1483 1484 ret = iwl_trans_start_hw(mvm->trans); 1485 if (ret) 1486 return ret; 1487 1488 sb_cfg = iwl_read_umac_prph(mvm->trans, SB_MODIFY_CFG_FLAG); 1489 mvm->pldr_sync = !(sb_cfg & SB_CFG_RESIDES_IN_OTP_MASK); 1490 if (mvm->pldr_sync && iwl_mei_pldr_req()) 1491 return -EBUSY; 1492 1493 ret = iwl_mvm_load_rt_fw(mvm); 1494 if (ret) { 1495 IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret); 1496 if (ret != -ERFKILL && !mvm->pldr_sync) 1497 iwl_fw_dbg_error_collect(&mvm->fwrt, 1498 FW_DBG_TRIGGER_DRIVER); 1499 goto error; 1500 } 1501 1502 /* FW loaded successfully */ 1503 mvm->pldr_sync = false; 1504 1505 iwl_get_shared_mem_conf(&mvm->fwrt); 1506 1507 ret = iwl_mvm_sf_update(mvm, NULL, false); 1508 if (ret) 1509 IWL_ERR(mvm, "Failed to initialize Smart Fifo\n"); 1510 1511 if (!iwl_trans_dbg_ini_valid(mvm->trans)) { 1512 mvm->fwrt.dump.conf = FW_DBG_INVALID; 1513 /* if we have a destination, assume EARLY START */ 1514 if (mvm->fw->dbg.dest_tlv) 1515 mvm->fwrt.dump.conf = FW_DBG_START_FROM_ALIVE; 1516 iwl_fw_start_dbg_conf(&mvm->fwrt, FW_DBG_START_FROM_ALIVE); 1517 } 1518 1519 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); 1520 if (ret) 1521 goto error; 1522 1523 if (!iwl_mvm_has_unified_ucode(mvm)) { 1524 /* Send phy db control command and then phy db calibration */ 1525 ret = iwl_send_phy_db_data(mvm->phy_db); 1526 if (ret) 1527 goto error; 1528 } 1529 1530 ret = iwl_send_phy_cfg_cmd(mvm); 1531 if (ret) 1532 goto error; 1533 1534 ret = iwl_mvm_send_bt_init_conf(mvm); 1535 if (ret) 1536 goto error; 1537 1538 if (fw_has_capa(&mvm->fw->ucode_capa, 1539 IWL_UCODE_TLV_CAPA_SOC_LATENCY_SUPPORT)) { 1540 ret = iwl_set_soc_latency(&mvm->fwrt); 1541 if (ret) 1542 goto error; 1543 } 1544 1545 /* Init RSS configuration */ 1546 ret = iwl_configure_rxq(&mvm->fwrt); 1547 if (ret) 1548 goto error; 1549 1550 if (iwl_mvm_has_new_rx_api(mvm)) { 1551 ret = iwl_send_rss_cfg_cmd(mvm); 1552 if (ret) { 1553 IWL_ERR(mvm, "Failed to configure RSS queues: %d\n", 1554 ret); 1555 goto error; 1556 } 1557 } 1558 1559 /* init the fw <-> mac80211 STA mapping */ 1560 for (i = 0; i < mvm->fw->ucode_capa.num_stations; i++) 1561 RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL); 1562 1563 mvm->tdls_cs.peer.sta_id = IWL_MVM_INVALID_STA; 1564 1565 /* reset quota debouncing buffer - 0xff will yield invalid data */ 1566 memset(&mvm->last_quota_cmd, 0xff, sizeof(mvm->last_quota_cmd)); 1567 1568 if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_DQA_SUPPORT)) { 1569 ret = iwl_mvm_send_dqa_cmd(mvm); 1570 if (ret) 1571 goto error; 1572 } 1573 1574 /* 1575 * Add auxiliary station for scanning. 1576 * Newer versions of this command implies that the fw uses 1577 * internal aux station for all aux activities that don't 1578 * requires a dedicated data queue. 1579 */ 1580 if (iwl_fw_lookup_cmd_ver(mvm->fw, ADD_STA, 0) < 12) { 1581 /* 1582 * In old version the aux station uses mac id like other 1583 * station and not lmac id 1584 */ 1585 ret = iwl_mvm_add_aux_sta(mvm, MAC_INDEX_AUX); 1586 if (ret) 1587 goto error; 1588 } 1589 1590 /* Add all the PHY contexts */ 1591 i = 0; 1592 while (!sband && i < NUM_NL80211_BANDS) 1593 sband = mvm->hw->wiphy->bands[i++]; 1594 1595 if (WARN_ON_ONCE(!sband)) { 1596 ret = -ENODEV; 1597 goto error; 1598 } 1599 1600 chan = &sband->channels[0]; 1601 1602 cfg80211_chandef_create(&chandef, chan, NL80211_CHAN_NO_HT); 1603 for (i = 0; i < NUM_PHY_CTX; i++) { 1604 /* 1605 * The channel used here isn't relevant as it's 1606 * going to be overwritten in the other flows. 1607 * For now use the first channel we have. 1608 */ 1609 ret = iwl_mvm_phy_ctxt_add(mvm, &mvm->phy_ctxts[i], 1610 &chandef, 1, 1); 1611 if (ret) 1612 goto error; 1613 } 1614 1615 if (iwl_mvm_is_tt_in_fw(mvm)) { 1616 /* in order to give the responsibility of ct-kill and 1617 * TX backoff to FW we need to send empty temperature reporting 1618 * cmd during init time 1619 */ 1620 iwl_mvm_send_temp_report_ths_cmd(mvm); 1621 } else { 1622 /* Initialize tx backoffs to the minimal possible */ 1623 iwl_mvm_tt_tx_backoff(mvm, 0); 1624 } 1625 1626 #ifdef CONFIG_THERMAL 1627 /* TODO: read the budget from BIOS / Platform NVM */ 1628 1629 /* 1630 * In case there is no budget from BIOS / Platform NVM the default 1631 * budget should be 2000mW (cooling state 0). 1632 */ 1633 if (iwl_mvm_is_ctdp_supported(mvm)) { 1634 ret = iwl_mvm_ctdp_command(mvm, CTDP_CMD_OPERATION_START, 1635 mvm->cooling_dev.cur_state); 1636 if (ret) 1637 goto error; 1638 } 1639 #endif 1640 1641 if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_SET_LTR_GEN2)) 1642 WARN_ON(iwl_mvm_config_ltr(mvm)); 1643 1644 ret = iwl_mvm_power_update_device(mvm); 1645 if (ret) 1646 goto error; 1647 1648 iwl_mvm_lari_cfg(mvm); 1649 /* 1650 * RTNL is not taken during Ct-kill, but we don't need to scan/Tx 1651 * anyway, so don't init MCC. 1652 */ 1653 if (!test_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status)) { 1654 ret = iwl_mvm_init_mcc(mvm); 1655 if (ret) 1656 goto error; 1657 } 1658 1659 if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_UMAC_SCAN)) { 1660 mvm->scan_type = IWL_SCAN_TYPE_NOT_SET; 1661 mvm->hb_scan_type = IWL_SCAN_TYPE_NOT_SET; 1662 ret = iwl_mvm_config_scan(mvm); 1663 if (ret) 1664 goto error; 1665 } 1666 1667 if (test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status)) 1668 iwl_mvm_send_recovery_cmd(mvm, ERROR_RECOVERY_UPDATE_DB); 1669 1670 if (iwl_acpi_get_eckv(mvm->dev, &mvm->ext_clock_valid)) 1671 IWL_DEBUG_INFO(mvm, "ECKV table doesn't exist in BIOS\n"); 1672 1673 ret = iwl_mvm_ppag_init(mvm); 1674 if (ret) 1675 goto error; 1676 1677 ret = iwl_mvm_sar_init(mvm); 1678 if (ret == 0) 1679 ret = iwl_mvm_sar_geo_init(mvm); 1680 if (ret < 0) 1681 goto error; 1682 1683 ret = iwl_mvm_sgom_init(mvm); 1684 if (ret) 1685 goto error; 1686 1687 iwl_mvm_tas_init(mvm); 1688 iwl_mvm_leds_sync(mvm); 1689 1690 iwl_mvm_ftm_initiator_smooth_config(mvm); 1691 1692 if (fw_has_capa(&mvm->fw->ucode_capa, 1693 IWL_UCODE_TLV_CAPA_RFIM_SUPPORT)) { 1694 if (iwl_mvm_eval_dsm_rfi(mvm) == DSM_VALUE_RFI_ENABLE) 1695 iwl_rfi_send_config_cmd(mvm, NULL); 1696 } 1697 1698 iwl_mvm_mei_device_state(mvm, true); 1699 1700 IWL_DEBUG_INFO(mvm, "RT uCode started.\n"); 1701 return 0; 1702 error: 1703 if (!iwlmvm_mod_params.init_dbg || !ret) 1704 iwl_mvm_stop_device(mvm); 1705 return ret; 1706 } 1707 1708 int iwl_mvm_load_d3_fw(struct iwl_mvm *mvm) 1709 { 1710 int ret, i; 1711 1712 lockdep_assert_held(&mvm->mutex); 1713 1714 ret = iwl_trans_start_hw(mvm->trans); 1715 if (ret) 1716 return ret; 1717 1718 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_WOWLAN); 1719 if (ret) { 1720 IWL_ERR(mvm, "Failed to start WoWLAN firmware: %d\n", ret); 1721 goto error; 1722 } 1723 1724 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); 1725 if (ret) 1726 goto error; 1727 1728 /* Send phy db control command and then phy db calibration*/ 1729 ret = iwl_send_phy_db_data(mvm->phy_db); 1730 if (ret) 1731 goto error; 1732 1733 ret = iwl_send_phy_cfg_cmd(mvm); 1734 if (ret) 1735 goto error; 1736 1737 /* init the fw <-> mac80211 STA mapping */ 1738 for (i = 0; i < mvm->fw->ucode_capa.num_stations; i++) 1739 RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL); 1740 1741 if (iwl_fw_lookup_cmd_ver(mvm->fw, ADD_STA, 0) < 12) { 1742 /* 1743 * Add auxiliary station for scanning. 1744 * Newer versions of this command implies that the fw uses 1745 * internal aux station for all aux activities that don't 1746 * requires a dedicated data queue. 1747 * In old version the aux station uses mac id like other 1748 * station and not lmac id 1749 */ 1750 ret = iwl_mvm_add_aux_sta(mvm, MAC_INDEX_AUX); 1751 if (ret) 1752 goto error; 1753 } 1754 1755 return 0; 1756 error: 1757 iwl_mvm_stop_device(mvm); 1758 return ret; 1759 } 1760 1761 void iwl_mvm_rx_mfuart_notif(struct iwl_mvm *mvm, 1762 struct iwl_rx_cmd_buffer *rxb) 1763 { 1764 struct iwl_rx_packet *pkt = rxb_addr(rxb); 1765 struct iwl_mfuart_load_notif *mfuart_notif = (void *)pkt->data; 1766 1767 IWL_DEBUG_INFO(mvm, 1768 "MFUART: installed ver: 0x%08x, external ver: 0x%08x, status: 0x%08x, duration: 0x%08x\n", 1769 le32_to_cpu(mfuart_notif->installed_ver), 1770 le32_to_cpu(mfuart_notif->external_ver), 1771 le32_to_cpu(mfuart_notif->status), 1772 le32_to_cpu(mfuart_notif->duration)); 1773 1774 if (iwl_rx_packet_payload_len(pkt) == sizeof(*mfuart_notif)) 1775 IWL_DEBUG_INFO(mvm, 1776 "MFUART: image size: 0x%08x\n", 1777 le32_to_cpu(mfuart_notif->image_size)); 1778 } 1779