1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause 2 /* 3 * Copyright (C) 2012-2014, 2018-2023 Intel Corporation 4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH 5 * Copyright (C) 2016-2017 Intel Deutschland GmbH 6 */ 7 #include <net/mac80211.h> 8 #include <linux/netdevice.h> 9 #include <linux/dmi.h> 10 11 #include "iwl-trans.h" 12 #include "iwl-op-mode.h" 13 #include "fw/img.h" 14 #include "iwl-debug.h" 15 #include "iwl-prph.h" 16 #include "fw/acpi.h" 17 #include "fw/pnvm.h" 18 #include "fw/uefi.h" 19 20 #include "mvm.h" 21 #include "fw/dbg.h" 22 #include "iwl-phy-db.h" 23 #include "iwl-modparams.h" 24 #include "iwl-nvm-parse.h" 25 #include "time-sync.h" 26 27 #define MVM_UCODE_ALIVE_TIMEOUT (2 * HZ) 28 #define MVM_UCODE_CALIB_TIMEOUT (2 * HZ) 29 30 #define IWL_TAS_US_MCC 0x5553 31 #define IWL_TAS_CANADA_MCC 0x4341 32 33 #define IWL_UATS_VLP_AP_SUPPORTED BIT(29) 34 #define IWL_UATS_AFC_AP_SUPPORTED BIT(30) 35 36 struct iwl_mvm_alive_data { 37 bool valid; 38 u32 scd_base_addr; 39 }; 40 41 static int iwl_send_tx_ant_cfg(struct iwl_mvm *mvm, u8 valid_tx_ant) 42 { 43 struct iwl_tx_ant_cfg_cmd tx_ant_cmd = { 44 .valid = cpu_to_le32(valid_tx_ant), 45 }; 46 47 IWL_DEBUG_FW(mvm, "select valid tx ant: %u\n", valid_tx_ant); 48 return iwl_mvm_send_cmd_pdu(mvm, TX_ANT_CONFIGURATION_CMD, 0, 49 sizeof(tx_ant_cmd), &tx_ant_cmd); 50 } 51 52 static int iwl_send_rss_cfg_cmd(struct iwl_mvm *mvm) 53 { 54 int i; 55 struct iwl_rss_config_cmd cmd = { 56 .flags = cpu_to_le32(IWL_RSS_ENABLE), 57 .hash_mask = BIT(IWL_RSS_HASH_TYPE_IPV4_TCP) | 58 BIT(IWL_RSS_HASH_TYPE_IPV4_UDP) | 59 BIT(IWL_RSS_HASH_TYPE_IPV4_PAYLOAD) | 60 BIT(IWL_RSS_HASH_TYPE_IPV6_TCP) | 61 BIT(IWL_RSS_HASH_TYPE_IPV6_UDP) | 62 BIT(IWL_RSS_HASH_TYPE_IPV6_PAYLOAD), 63 }; 64 65 if (mvm->trans->num_rx_queues == 1) 66 return 0; 67 68 /* Do not direct RSS traffic to Q 0 which is our fallback queue */ 69 for (i = 0; i < ARRAY_SIZE(cmd.indirection_table); i++) 70 cmd.indirection_table[i] = 71 1 + (i % (mvm->trans->num_rx_queues - 1)); 72 netdev_rss_key_fill(cmd.secret_key, sizeof(cmd.secret_key)); 73 74 return iwl_mvm_send_cmd_pdu(mvm, RSS_CONFIG_CMD, 0, sizeof(cmd), &cmd); 75 } 76 77 static int iwl_mvm_send_dqa_cmd(struct iwl_mvm *mvm) 78 { 79 struct iwl_dqa_enable_cmd dqa_cmd = { 80 .cmd_queue = cpu_to_le32(IWL_MVM_DQA_CMD_QUEUE), 81 }; 82 u32 cmd_id = WIDE_ID(DATA_PATH_GROUP, DQA_ENABLE_CMD); 83 int ret; 84 85 ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, sizeof(dqa_cmd), &dqa_cmd); 86 if (ret) 87 IWL_ERR(mvm, "Failed to send DQA enabling command: %d\n", ret); 88 else 89 IWL_DEBUG_FW(mvm, "Working in DQA mode\n"); 90 91 return ret; 92 } 93 94 void iwl_mvm_mfu_assert_dump_notif(struct iwl_mvm *mvm, 95 struct iwl_rx_cmd_buffer *rxb) 96 { 97 struct iwl_rx_packet *pkt = rxb_addr(rxb); 98 struct iwl_mfu_assert_dump_notif *mfu_dump_notif = (void *)pkt->data; 99 __le32 *dump_data = mfu_dump_notif->data; 100 int n_words = le32_to_cpu(mfu_dump_notif->data_size) / sizeof(__le32); 101 int i; 102 103 if (mfu_dump_notif->index_num == 0) 104 IWL_INFO(mvm, "MFUART assert id 0x%x occurred\n", 105 le32_to_cpu(mfu_dump_notif->assert_id)); 106 107 for (i = 0; i < n_words; i++) 108 IWL_DEBUG_INFO(mvm, 109 "MFUART assert dump, dword %u: 0x%08x\n", 110 le16_to_cpu(mfu_dump_notif->index_num) * 111 n_words + i, 112 le32_to_cpu(dump_data[i])); 113 } 114 115 static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait, 116 struct iwl_rx_packet *pkt, void *data) 117 { 118 unsigned int pkt_len = iwl_rx_packet_payload_len(pkt); 119 struct iwl_mvm *mvm = 120 container_of(notif_wait, struct iwl_mvm, notif_wait); 121 struct iwl_mvm_alive_data *alive_data = data; 122 struct iwl_umac_alive *umac; 123 struct iwl_lmac_alive *lmac1; 124 struct iwl_lmac_alive *lmac2 = NULL; 125 u16 status; 126 u32 lmac_error_event_table, umac_error_table; 127 u32 version = iwl_fw_lookup_notif_ver(mvm->fw, LEGACY_GROUP, 128 UCODE_ALIVE_NTFY, 0); 129 u32 i; 130 131 132 if (version == 6) { 133 struct iwl_alive_ntf_v6 *palive; 134 135 if (pkt_len < sizeof(*palive)) 136 return false; 137 138 palive = (void *)pkt->data; 139 mvm->trans->dbg.imr_data.imr_enable = 140 le32_to_cpu(palive->imr.enabled); 141 mvm->trans->dbg.imr_data.imr_size = 142 le32_to_cpu(palive->imr.size); 143 mvm->trans->dbg.imr_data.imr2sram_remainbyte = 144 mvm->trans->dbg.imr_data.imr_size; 145 mvm->trans->dbg.imr_data.imr_base_addr = 146 palive->imr.base_addr; 147 mvm->trans->dbg.imr_data.imr_curr_addr = 148 le64_to_cpu(mvm->trans->dbg.imr_data.imr_base_addr); 149 IWL_DEBUG_FW(mvm, "IMR Enabled: 0x0%x size 0x0%x Address 0x%016llx\n", 150 mvm->trans->dbg.imr_data.imr_enable, 151 mvm->trans->dbg.imr_data.imr_size, 152 le64_to_cpu(mvm->trans->dbg.imr_data.imr_base_addr)); 153 154 if (!mvm->trans->dbg.imr_data.imr_enable) { 155 for (i = 0; i < ARRAY_SIZE(mvm->trans->dbg.active_regions); i++) { 156 struct iwl_ucode_tlv *reg_tlv; 157 struct iwl_fw_ini_region_tlv *reg; 158 159 reg_tlv = mvm->trans->dbg.active_regions[i]; 160 if (!reg_tlv) 161 continue; 162 163 reg = (void *)reg_tlv->data; 164 /* 165 * We have only one DRAM IMR region, so we 166 * can break as soon as we find the first 167 * one. 168 */ 169 if (reg->type == IWL_FW_INI_REGION_DRAM_IMR) { 170 mvm->trans->dbg.unsupported_region_msk |= BIT(i); 171 break; 172 } 173 } 174 } 175 } 176 177 if (version >= 5) { 178 struct iwl_alive_ntf_v5 *palive; 179 180 if (pkt_len < sizeof(*palive)) 181 return false; 182 183 palive = (void *)pkt->data; 184 umac = &palive->umac_data; 185 lmac1 = &palive->lmac_data[0]; 186 lmac2 = &palive->lmac_data[1]; 187 status = le16_to_cpu(palive->status); 188 189 mvm->trans->sku_id[0] = le32_to_cpu(palive->sku_id.data[0]); 190 mvm->trans->sku_id[1] = le32_to_cpu(palive->sku_id.data[1]); 191 mvm->trans->sku_id[2] = le32_to_cpu(palive->sku_id.data[2]); 192 193 IWL_DEBUG_FW(mvm, "Got sku_id: 0x0%x 0x0%x 0x0%x\n", 194 mvm->trans->sku_id[0], 195 mvm->trans->sku_id[1], 196 mvm->trans->sku_id[2]); 197 } else if (iwl_rx_packet_payload_len(pkt) == sizeof(struct iwl_alive_ntf_v4)) { 198 struct iwl_alive_ntf_v4 *palive; 199 200 if (pkt_len < sizeof(*palive)) 201 return false; 202 203 palive = (void *)pkt->data; 204 umac = &palive->umac_data; 205 lmac1 = &palive->lmac_data[0]; 206 lmac2 = &palive->lmac_data[1]; 207 status = le16_to_cpu(palive->status); 208 } else if (iwl_rx_packet_payload_len(pkt) == 209 sizeof(struct iwl_alive_ntf_v3)) { 210 struct iwl_alive_ntf_v3 *palive3; 211 212 if (pkt_len < sizeof(*palive3)) 213 return false; 214 215 palive3 = (void *)pkt->data; 216 umac = &palive3->umac_data; 217 lmac1 = &palive3->lmac_data; 218 status = le16_to_cpu(palive3->status); 219 } else { 220 WARN(1, "unsupported alive notification (size %d)\n", 221 iwl_rx_packet_payload_len(pkt)); 222 /* get timeout later */ 223 return false; 224 } 225 226 lmac_error_event_table = 227 le32_to_cpu(lmac1->dbg_ptrs.error_event_table_ptr); 228 iwl_fw_lmac1_set_alive_err_table(mvm->trans, lmac_error_event_table); 229 230 if (lmac2) 231 mvm->trans->dbg.lmac_error_event_table[1] = 232 le32_to_cpu(lmac2->dbg_ptrs.error_event_table_ptr); 233 234 umac_error_table = le32_to_cpu(umac->dbg_ptrs.error_info_addr) & 235 ~FW_ADDR_CACHE_CONTROL; 236 237 if (umac_error_table) { 238 if (umac_error_table >= 239 mvm->trans->cfg->min_umac_error_event_table) { 240 iwl_fw_umac_set_alive_err_table(mvm->trans, 241 umac_error_table); 242 } else { 243 IWL_ERR(mvm, 244 "Not valid error log pointer 0x%08X for %s uCode\n", 245 umac_error_table, 246 (mvm->fwrt.cur_fw_img == IWL_UCODE_INIT) ? 247 "Init" : "RT"); 248 } 249 } 250 251 alive_data->scd_base_addr = le32_to_cpu(lmac1->dbg_ptrs.scd_base_ptr); 252 alive_data->valid = status == IWL_ALIVE_STATUS_OK; 253 254 IWL_DEBUG_FW(mvm, 255 "Alive ucode status 0x%04x revision 0x%01X 0x%01X\n", 256 status, lmac1->ver_type, lmac1->ver_subtype); 257 258 if (lmac2) 259 IWL_DEBUG_FW(mvm, "Alive ucode CDB\n"); 260 261 IWL_DEBUG_FW(mvm, 262 "UMAC version: Major - 0x%x, Minor - 0x%x\n", 263 le32_to_cpu(umac->umac_major), 264 le32_to_cpu(umac->umac_minor)); 265 266 iwl_fwrt_update_fw_versions(&mvm->fwrt, lmac1, umac); 267 268 return true; 269 } 270 271 static bool iwl_wait_init_complete(struct iwl_notif_wait_data *notif_wait, 272 struct iwl_rx_packet *pkt, void *data) 273 { 274 WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF); 275 276 return true; 277 } 278 279 static bool iwl_wait_phy_db_entry(struct iwl_notif_wait_data *notif_wait, 280 struct iwl_rx_packet *pkt, void *data) 281 { 282 struct iwl_phy_db *phy_db = data; 283 284 if (pkt->hdr.cmd != CALIB_RES_NOTIF_PHY_DB) { 285 WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF); 286 return true; 287 } 288 289 WARN_ON(iwl_phy_db_set_section(phy_db, pkt)); 290 291 return false; 292 } 293 294 static void iwl_mvm_print_pd_notification(struct iwl_mvm *mvm) 295 { 296 #define IWL_FW_PRINT_REG_INFO(reg_name) \ 297 IWL_ERR(mvm, #reg_name ": 0x%x\n", iwl_read_umac_prph(trans, reg_name)) 298 299 struct iwl_trans *trans = mvm->trans; 300 enum iwl_device_family device_family = trans->trans_cfg->device_family; 301 302 if (device_family < IWL_DEVICE_FAMILY_8000) 303 return; 304 305 if (device_family <= IWL_DEVICE_FAMILY_9000) 306 IWL_FW_PRINT_REG_INFO(WFPM_ARC1_PD_NOTIFICATION); 307 else 308 IWL_FW_PRINT_REG_INFO(WFPM_LMAC1_PD_NOTIFICATION); 309 310 IWL_FW_PRINT_REG_INFO(HPM_SECONDARY_DEVICE_STATE); 311 312 /* print OPT info */ 313 IWL_FW_PRINT_REG_INFO(WFPM_MAC_OTP_CFG7_ADDR); 314 IWL_FW_PRINT_REG_INFO(WFPM_MAC_OTP_CFG7_DATA); 315 } 316 317 static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm, 318 enum iwl_ucode_type ucode_type) 319 { 320 struct iwl_notification_wait alive_wait; 321 struct iwl_mvm_alive_data alive_data = {}; 322 const struct fw_img *fw; 323 int ret; 324 enum iwl_ucode_type old_type = mvm->fwrt.cur_fw_img; 325 static const u16 alive_cmd[] = { UCODE_ALIVE_NTFY }; 326 bool run_in_rfkill = 327 ucode_type == IWL_UCODE_INIT || iwl_mvm_has_unified_ucode(mvm); 328 u8 count; 329 struct iwl_pc_data *pc_data; 330 331 if (ucode_type == IWL_UCODE_REGULAR && 332 iwl_fw_dbg_conf_usniffer(mvm->fw, FW_DBG_START_FROM_ALIVE) && 333 !(fw_has_capa(&mvm->fw->ucode_capa, 334 IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED))) 335 fw = iwl_get_ucode_image(mvm->fw, IWL_UCODE_REGULAR_USNIFFER); 336 else 337 fw = iwl_get_ucode_image(mvm->fw, ucode_type); 338 if (WARN_ON(!fw)) 339 return -EINVAL; 340 iwl_fw_set_current_image(&mvm->fwrt, ucode_type); 341 clear_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status); 342 343 iwl_init_notification_wait(&mvm->notif_wait, &alive_wait, 344 alive_cmd, ARRAY_SIZE(alive_cmd), 345 iwl_alive_fn, &alive_data); 346 347 /* 348 * We want to load the INIT firmware even in RFKILL 349 * For the unified firmware case, the ucode_type is not 350 * INIT, but we still need to run it. 351 */ 352 ret = iwl_trans_start_fw(mvm->trans, fw, run_in_rfkill); 353 if (ret) { 354 iwl_fw_set_current_image(&mvm->fwrt, old_type); 355 iwl_remove_notification(&mvm->notif_wait, &alive_wait); 356 return ret; 357 } 358 359 /* 360 * Some things may run in the background now, but we 361 * just wait for the ALIVE notification here. 362 */ 363 ret = iwl_wait_notification(&mvm->notif_wait, &alive_wait, 364 MVM_UCODE_ALIVE_TIMEOUT); 365 366 if (mvm->trans->trans_cfg->device_family == 367 IWL_DEVICE_FAMILY_AX210) { 368 /* print these registers regardless of alive fail/success */ 369 IWL_INFO(mvm, "WFPM_UMAC_PD_NOTIFICATION: 0x%x\n", 370 iwl_read_umac_prph(mvm->trans, WFPM_ARC1_PD_NOTIFICATION)); 371 IWL_INFO(mvm, "WFPM_LMAC2_PD_NOTIFICATION: 0x%x\n", 372 iwl_read_umac_prph(mvm->trans, WFPM_LMAC2_PD_NOTIFICATION)); 373 IWL_INFO(mvm, "WFPM_AUTH_KEY_0: 0x%x\n", 374 iwl_read_umac_prph(mvm->trans, SB_MODIFY_CFG_FLAG)); 375 IWL_INFO(mvm, "CNVI_SCU_SEQ_DATA_DW9: 0x%x\n", 376 iwl_read_prph(mvm->trans, CNVI_SCU_SEQ_DATA_DW9)); 377 } 378 379 if (ret) { 380 struct iwl_trans *trans = mvm->trans; 381 382 /* SecBoot info */ 383 if (trans->trans_cfg->device_family >= 384 IWL_DEVICE_FAMILY_22000) { 385 IWL_ERR(mvm, 386 "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n", 387 iwl_read_umac_prph(trans, UMAG_SB_CPU_1_STATUS), 388 iwl_read_umac_prph(trans, 389 UMAG_SB_CPU_2_STATUS)); 390 } else if (trans->trans_cfg->device_family >= 391 IWL_DEVICE_FAMILY_8000) { 392 IWL_ERR(mvm, 393 "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n", 394 iwl_read_prph(trans, SB_CPU_1_STATUS), 395 iwl_read_prph(trans, SB_CPU_2_STATUS)); 396 } 397 398 iwl_mvm_print_pd_notification(mvm); 399 400 /* LMAC/UMAC PC info */ 401 if (trans->trans_cfg->device_family >= 402 IWL_DEVICE_FAMILY_22000) { 403 pc_data = trans->dbg.pc_data; 404 for (count = 0; count < trans->dbg.num_pc; 405 count++, pc_data++) 406 IWL_ERR(mvm, "%s: 0x%x\n", 407 pc_data->pc_name, 408 pc_data->pc_address); 409 } else if (trans->trans_cfg->device_family >= 410 IWL_DEVICE_FAMILY_9000) { 411 IWL_ERR(mvm, "UMAC PC: 0x%x\n", 412 iwl_read_umac_prph(trans, 413 UREG_UMAC_CURRENT_PC)); 414 IWL_ERR(mvm, "LMAC PC: 0x%x\n", 415 iwl_read_umac_prph(trans, 416 UREG_LMAC1_CURRENT_PC)); 417 if (iwl_mvm_is_cdb_supported(mvm)) 418 IWL_ERR(mvm, "LMAC2 PC: 0x%x\n", 419 iwl_read_umac_prph(trans, 420 UREG_LMAC2_CURRENT_PC)); 421 } 422 423 if (ret == -ETIMEDOUT && !mvm->pldr_sync) 424 iwl_fw_dbg_error_collect(&mvm->fwrt, 425 FW_DBG_TRIGGER_ALIVE_TIMEOUT); 426 427 iwl_fw_set_current_image(&mvm->fwrt, old_type); 428 return ret; 429 } 430 431 if (!alive_data.valid) { 432 IWL_ERR(mvm, "Loaded ucode is not valid!\n"); 433 iwl_fw_set_current_image(&mvm->fwrt, old_type); 434 return -EIO; 435 } 436 437 /* if reached this point, Alive notification was received */ 438 iwl_mei_alive_notif(true); 439 440 ret = iwl_pnvm_load(mvm->trans, &mvm->notif_wait, 441 &mvm->fw->ucode_capa); 442 if (ret) { 443 IWL_ERR(mvm, "Timeout waiting for PNVM load!\n"); 444 iwl_fw_set_current_image(&mvm->fwrt, old_type); 445 return ret; 446 } 447 448 iwl_trans_fw_alive(mvm->trans, alive_data.scd_base_addr); 449 450 /* 451 * Note: all the queues are enabled as part of the interface 452 * initialization, but in firmware restart scenarios they 453 * could be stopped, so wake them up. In firmware restart, 454 * mac80211 will have the queues stopped as well until the 455 * reconfiguration completes. During normal startup, they 456 * will be empty. 457 */ 458 459 memset(&mvm->queue_info, 0, sizeof(mvm->queue_info)); 460 /* 461 * Set a 'fake' TID for the command queue, since we use the 462 * hweight() of the tid_bitmap as a refcount now. Not that 463 * we ever even consider the command queue as one we might 464 * want to reuse, but be safe nevertheless. 465 */ 466 mvm->queue_info[IWL_MVM_DQA_CMD_QUEUE].tid_bitmap = 467 BIT(IWL_MAX_TID_COUNT + 2); 468 469 set_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status); 470 #ifdef CONFIG_IWLWIFI_DEBUGFS 471 iwl_fw_set_dbg_rec_on(&mvm->fwrt); 472 #endif 473 474 /* 475 * All the BSSes in the BSS table include the GP2 in the system 476 * at the beacon Rx time, this is of course no longer relevant 477 * since we are resetting the firmware. 478 * Purge all the BSS table. 479 */ 480 cfg80211_bss_flush(mvm->hw->wiphy); 481 482 return 0; 483 } 484 485 static void iwl_mvm_phy_filter_init(struct iwl_mvm *mvm, 486 struct iwl_phy_specific_cfg *phy_filters) 487 { 488 #ifdef CONFIG_ACPI 489 *phy_filters = mvm->phy_filters; 490 #endif /* CONFIG_ACPI */ 491 } 492 493 #if defined(CONFIG_ACPI) && defined(CONFIG_EFI) 494 static void iwl_mvm_uats_init(struct iwl_mvm *mvm) 495 { 496 u8 cmd_ver; 497 int ret; 498 struct iwl_host_cmd cmd = { 499 .id = WIDE_ID(REGULATORY_AND_NVM_GROUP, 500 UATS_TABLE_CMD), 501 .flags = 0, 502 .data[0] = &mvm->fwrt.uats_table, 503 .len[0] = sizeof(mvm->fwrt.uats_table), 504 .dataflags[0] = IWL_HCMD_DFL_NOCOPY, 505 }; 506 507 if (!(mvm->trans->trans_cfg->device_family >= 508 IWL_DEVICE_FAMILY_AX210)) { 509 IWL_DEBUG_RADIO(mvm, "UATS feature is not supported\n"); 510 return; 511 } 512 513 if (!mvm->fwrt.uats_enabled) { 514 IWL_DEBUG_RADIO(mvm, "UATS feature is disabled\n"); 515 return; 516 } 517 518 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd.id, 519 IWL_FW_CMD_VER_UNKNOWN); 520 if (cmd_ver != 1) { 521 IWL_DEBUG_RADIO(mvm, 522 "UATS_TABLE_CMD ver %d not supported\n", 523 cmd_ver); 524 return; 525 } 526 527 ret = iwl_uefi_get_uats_table(mvm->trans, &mvm->fwrt); 528 if (ret < 0) { 529 IWL_ERR(mvm, "failed to read UATS table (%d)\n", ret); 530 return; 531 } 532 533 ret = iwl_mvm_send_cmd(mvm, &cmd); 534 if (ret < 0) 535 IWL_ERR(mvm, "failed to send UATS_TABLE_CMD (%d)\n", ret); 536 else 537 IWL_DEBUG_RADIO(mvm, "UATS_TABLE_CMD sent to FW\n"); 538 } 539 540 static int iwl_mvm_sgom_init(struct iwl_mvm *mvm) 541 { 542 u8 cmd_ver; 543 int ret; 544 struct iwl_host_cmd cmd = { 545 .id = WIDE_ID(REGULATORY_AND_NVM_GROUP, 546 SAR_OFFSET_MAPPING_TABLE_CMD), 547 .flags = 0, 548 .data[0] = &mvm->fwrt.sgom_table, 549 .len[0] = sizeof(mvm->fwrt.sgom_table), 550 .dataflags[0] = IWL_HCMD_DFL_NOCOPY, 551 }; 552 553 if (!mvm->fwrt.sgom_enabled) { 554 IWL_DEBUG_RADIO(mvm, "SGOM table is disabled\n"); 555 return 0; 556 } 557 558 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd.id, 559 IWL_FW_CMD_VER_UNKNOWN); 560 561 if (cmd_ver != 2) { 562 IWL_DEBUG_RADIO(mvm, "command version is unsupported. version = %d\n", 563 cmd_ver); 564 return 0; 565 } 566 567 ret = iwl_mvm_send_cmd(mvm, &cmd); 568 if (ret < 0) 569 IWL_ERR(mvm, "failed to send SAR_OFFSET_MAPPING_CMD (%d)\n", ret); 570 571 return ret; 572 } 573 #else 574 575 static int iwl_mvm_sgom_init(struct iwl_mvm *mvm) 576 { 577 return 0; 578 } 579 580 static void iwl_mvm_uats_init(struct iwl_mvm *mvm) 581 { 582 } 583 #endif 584 585 static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm) 586 { 587 u32 cmd_id = PHY_CONFIGURATION_CMD; 588 struct iwl_phy_cfg_cmd_v3 phy_cfg_cmd; 589 enum iwl_ucode_type ucode_type = mvm->fwrt.cur_fw_img; 590 u8 cmd_ver; 591 size_t cmd_size; 592 593 if (iwl_mvm_has_unified_ucode(mvm) && 594 !mvm->trans->cfg->tx_with_siso_diversity) 595 return 0; 596 597 if (mvm->trans->cfg->tx_with_siso_diversity) { 598 /* 599 * TODO: currently we don't set the antenna but letting the NIC 600 * to decide which antenna to use. This should come from BIOS. 601 */ 602 phy_cfg_cmd.phy_cfg = 603 cpu_to_le32(FW_PHY_CFG_CHAIN_SAD_ENABLED); 604 } 605 606 /* Set parameters */ 607 phy_cfg_cmd.phy_cfg = cpu_to_le32(iwl_mvm_get_phy_config(mvm)); 608 609 /* set flags extra PHY configuration flags from the device's cfg */ 610 phy_cfg_cmd.phy_cfg |= 611 cpu_to_le32(mvm->trans->trans_cfg->extra_phy_cfg_flags); 612 613 phy_cfg_cmd.calib_control.event_trigger = 614 mvm->fw->default_calib[ucode_type].event_trigger; 615 phy_cfg_cmd.calib_control.flow_trigger = 616 mvm->fw->default_calib[ucode_type].flow_trigger; 617 618 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id, 619 IWL_FW_CMD_VER_UNKNOWN); 620 if (cmd_ver >= 3) 621 iwl_mvm_phy_filter_init(mvm, &phy_cfg_cmd.phy_specific_cfg); 622 623 IWL_DEBUG_INFO(mvm, "Sending Phy CFG command: 0x%x\n", 624 phy_cfg_cmd.phy_cfg); 625 cmd_size = (cmd_ver == 3) ? sizeof(struct iwl_phy_cfg_cmd_v3) : 626 sizeof(struct iwl_phy_cfg_cmd_v1); 627 return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, cmd_size, &phy_cfg_cmd); 628 } 629 630 static int iwl_run_unified_mvm_ucode(struct iwl_mvm *mvm) 631 { 632 struct iwl_notification_wait init_wait; 633 struct iwl_nvm_access_complete_cmd nvm_complete = {}; 634 struct iwl_init_extended_cfg_cmd init_cfg = { 635 .init_flags = cpu_to_le32(BIT(IWL_INIT_NVM)), 636 }; 637 static const u16 init_complete[] = { 638 INIT_COMPLETE_NOTIF, 639 }; 640 u32 sb_cfg; 641 int ret; 642 643 if (mvm->trans->cfg->tx_with_siso_diversity) 644 init_cfg.init_flags |= cpu_to_le32(BIT(IWL_INIT_PHY)); 645 646 lockdep_assert_held(&mvm->mutex); 647 648 mvm->rfkill_safe_init_done = false; 649 650 if (mvm->trans->trans_cfg->device_family == IWL_DEVICE_FAMILY_AX210) { 651 sb_cfg = iwl_read_umac_prph(mvm->trans, SB_MODIFY_CFG_FLAG); 652 /* if needed, we'll reset this on our way out later */ 653 mvm->pldr_sync = sb_cfg == SB_CFG_RESIDES_IN_ROM; 654 if (mvm->pldr_sync && iwl_mei_pldr_req()) 655 return -EBUSY; 656 } 657 658 iwl_init_notification_wait(&mvm->notif_wait, 659 &init_wait, 660 init_complete, 661 ARRAY_SIZE(init_complete), 662 iwl_wait_init_complete, 663 NULL); 664 665 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL); 666 667 /* Will also start the device */ 668 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR); 669 if (ret) { 670 IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret); 671 672 /* if we needed reset then fail here, but notify and remove */ 673 if (mvm->pldr_sync) { 674 iwl_mei_alive_notif(false); 675 iwl_trans_pcie_remove(mvm->trans, true); 676 } 677 678 goto error; 679 } 680 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE, 681 NULL); 682 683 /* Send init config command to mark that we are sending NVM access 684 * commands 685 */ 686 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(SYSTEM_GROUP, 687 INIT_EXTENDED_CFG_CMD), 688 CMD_SEND_IN_RFKILL, 689 sizeof(init_cfg), &init_cfg); 690 if (ret) { 691 IWL_ERR(mvm, "Failed to run init config command: %d\n", 692 ret); 693 goto error; 694 } 695 696 /* Load NVM to NIC if needed */ 697 if (mvm->nvm_file_name) { 698 ret = iwl_read_external_nvm(mvm->trans, mvm->nvm_file_name, 699 mvm->nvm_sections); 700 if (ret) 701 goto error; 702 ret = iwl_mvm_load_nvm_to_nic(mvm); 703 if (ret) 704 goto error; 705 } 706 707 if (IWL_MVM_PARSE_NVM && !mvm->nvm_data) { 708 ret = iwl_nvm_init(mvm); 709 if (ret) { 710 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret); 711 goto error; 712 } 713 } 714 715 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(REGULATORY_AND_NVM_GROUP, 716 NVM_ACCESS_COMPLETE), 717 CMD_SEND_IN_RFKILL, 718 sizeof(nvm_complete), &nvm_complete); 719 if (ret) { 720 IWL_ERR(mvm, "Failed to run complete NVM access: %d\n", 721 ret); 722 goto error; 723 } 724 725 ret = iwl_send_phy_cfg_cmd(mvm); 726 if (ret) { 727 IWL_ERR(mvm, "Failed to run PHY configuration: %d\n", 728 ret); 729 goto error; 730 } 731 732 /* We wait for the INIT complete notification */ 733 ret = iwl_wait_notification(&mvm->notif_wait, &init_wait, 734 MVM_UCODE_ALIVE_TIMEOUT); 735 if (ret) 736 return ret; 737 738 /* Read the NVM only at driver load time, no need to do this twice */ 739 if (!IWL_MVM_PARSE_NVM && !mvm->nvm_data) { 740 mvm->nvm_data = iwl_get_nvm(mvm->trans, mvm->fw, 741 mvm->set_tx_ant, mvm->set_rx_ant); 742 if (IS_ERR(mvm->nvm_data)) { 743 ret = PTR_ERR(mvm->nvm_data); 744 mvm->nvm_data = NULL; 745 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret); 746 return ret; 747 } 748 } 749 750 mvm->rfkill_safe_init_done = true; 751 752 return 0; 753 754 error: 755 iwl_remove_notification(&mvm->notif_wait, &init_wait); 756 return ret; 757 } 758 759 int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm) 760 { 761 struct iwl_notification_wait calib_wait; 762 static const u16 init_complete[] = { 763 INIT_COMPLETE_NOTIF, 764 CALIB_RES_NOTIF_PHY_DB 765 }; 766 int ret; 767 768 if (iwl_mvm_has_unified_ucode(mvm)) 769 return iwl_run_unified_mvm_ucode(mvm); 770 771 lockdep_assert_held(&mvm->mutex); 772 773 mvm->rfkill_safe_init_done = false; 774 775 iwl_init_notification_wait(&mvm->notif_wait, 776 &calib_wait, 777 init_complete, 778 ARRAY_SIZE(init_complete), 779 iwl_wait_phy_db_entry, 780 mvm->phy_db); 781 782 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL); 783 784 /* Will also start the device */ 785 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_INIT); 786 if (ret) { 787 IWL_ERR(mvm, "Failed to start INIT ucode: %d\n", ret); 788 goto remove_notif; 789 } 790 791 if (mvm->trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_8000) { 792 ret = iwl_mvm_send_bt_init_conf(mvm); 793 if (ret) 794 goto remove_notif; 795 } 796 797 /* Read the NVM only at driver load time, no need to do this twice */ 798 if (!mvm->nvm_data) { 799 ret = iwl_nvm_init(mvm); 800 if (ret) { 801 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret); 802 goto remove_notif; 803 } 804 } 805 806 /* In case we read the NVM from external file, load it to the NIC */ 807 if (mvm->nvm_file_name) { 808 ret = iwl_mvm_load_nvm_to_nic(mvm); 809 if (ret) 810 goto remove_notif; 811 } 812 813 WARN_ONCE(mvm->nvm_data->nvm_version < mvm->trans->cfg->nvm_ver, 814 "Too old NVM version (0x%0x, required = 0x%0x)", 815 mvm->nvm_data->nvm_version, mvm->trans->cfg->nvm_ver); 816 817 /* 818 * abort after reading the nvm in case RF Kill is on, we will complete 819 * the init seq later when RF kill will switch to off 820 */ 821 if (iwl_mvm_is_radio_hw_killed(mvm)) { 822 IWL_DEBUG_RF_KILL(mvm, 823 "jump over all phy activities due to RF kill\n"); 824 goto remove_notif; 825 } 826 827 mvm->rfkill_safe_init_done = true; 828 829 /* Send TX valid antennas before triggering calibrations */ 830 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); 831 if (ret) 832 goto remove_notif; 833 834 ret = iwl_send_phy_cfg_cmd(mvm); 835 if (ret) { 836 IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n", 837 ret); 838 goto remove_notif; 839 } 840 841 /* 842 * Some things may run in the background now, but we 843 * just wait for the calibration complete notification. 844 */ 845 ret = iwl_wait_notification(&mvm->notif_wait, &calib_wait, 846 MVM_UCODE_CALIB_TIMEOUT); 847 if (!ret) 848 goto out; 849 850 if (iwl_mvm_is_radio_hw_killed(mvm)) { 851 IWL_DEBUG_RF_KILL(mvm, "RFKILL while calibrating.\n"); 852 ret = 0; 853 } else { 854 IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n", 855 ret); 856 } 857 858 goto out; 859 860 remove_notif: 861 iwl_remove_notification(&mvm->notif_wait, &calib_wait); 862 out: 863 mvm->rfkill_safe_init_done = false; 864 if (iwlmvm_mod_params.init_dbg && !mvm->nvm_data) { 865 /* we want to debug INIT and we have no NVM - fake */ 866 mvm->nvm_data = kzalloc(sizeof(struct iwl_nvm_data) + 867 sizeof(struct ieee80211_channel) + 868 sizeof(struct ieee80211_rate), 869 GFP_KERNEL); 870 if (!mvm->nvm_data) 871 return -ENOMEM; 872 mvm->nvm_data->bands[0].channels = mvm->nvm_data->channels; 873 mvm->nvm_data->bands[0].n_channels = 1; 874 mvm->nvm_data->bands[0].n_bitrates = 1; 875 mvm->nvm_data->bands[0].bitrates = 876 (void *)(mvm->nvm_data->channels + 1); 877 mvm->nvm_data->bands[0].bitrates->hw_value = 10; 878 } 879 880 return ret; 881 } 882 883 static int iwl_mvm_config_ltr(struct iwl_mvm *mvm) 884 { 885 struct iwl_ltr_config_cmd cmd = { 886 .flags = cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE), 887 }; 888 889 if (!mvm->trans->ltr_enabled) 890 return 0; 891 892 return iwl_mvm_send_cmd_pdu(mvm, LTR_CONFIG, 0, 893 sizeof(cmd), &cmd); 894 } 895 896 #ifdef CONFIG_ACPI 897 int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a, int prof_b) 898 { 899 u32 cmd_id = REDUCE_TX_POWER_CMD; 900 struct iwl_dev_tx_power_cmd cmd = { 901 .common.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_CHAINS), 902 }; 903 __le16 *per_chain; 904 int ret; 905 u16 len = 0; 906 u32 n_subbands; 907 u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id, 908 IWL_FW_CMD_VER_UNKNOWN); 909 if (cmd_ver == 7) { 910 len = sizeof(cmd.v7); 911 n_subbands = IWL_NUM_SUB_BANDS_V2; 912 per_chain = cmd.v7.per_chain[0][0]; 913 cmd.v7.flags = cpu_to_le32(mvm->fwrt.reduced_power_flags); 914 } else if (cmd_ver == 6) { 915 len = sizeof(cmd.v6); 916 n_subbands = IWL_NUM_SUB_BANDS_V2; 917 per_chain = cmd.v6.per_chain[0][0]; 918 } else if (fw_has_api(&mvm->fw->ucode_capa, 919 IWL_UCODE_TLV_API_REDUCE_TX_POWER)) { 920 len = sizeof(cmd.v5); 921 n_subbands = IWL_NUM_SUB_BANDS_V1; 922 per_chain = cmd.v5.per_chain[0][0]; 923 } else if (fw_has_capa(&mvm->fw->ucode_capa, 924 IWL_UCODE_TLV_CAPA_TX_POWER_ACK)) { 925 len = sizeof(cmd.v4); 926 n_subbands = IWL_NUM_SUB_BANDS_V1; 927 per_chain = cmd.v4.per_chain[0][0]; 928 } else { 929 len = sizeof(cmd.v3); 930 n_subbands = IWL_NUM_SUB_BANDS_V1; 931 per_chain = cmd.v3.per_chain[0][0]; 932 } 933 934 /* all structs have the same common part, add it */ 935 len += sizeof(cmd.common); 936 937 ret = iwl_sar_select_profile(&mvm->fwrt, per_chain, 938 IWL_NUM_CHAIN_TABLES, 939 n_subbands, prof_a, prof_b); 940 941 /* return on error or if the profile is disabled (positive number) */ 942 if (ret) 943 return ret; 944 945 iwl_mei_set_power_limit(per_chain); 946 947 IWL_DEBUG_RADIO(mvm, "Sending REDUCE_TX_POWER_CMD per chain\n"); 948 return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, len, &cmd); 949 } 950 951 int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm) 952 { 953 union iwl_geo_tx_power_profiles_cmd geo_tx_cmd; 954 struct iwl_geo_tx_power_profiles_resp *resp; 955 u16 len; 956 int ret; 957 struct iwl_host_cmd cmd = { 958 .id = WIDE_ID(PHY_OPS_GROUP, PER_CHAIN_LIMIT_OFFSET_CMD), 959 .flags = CMD_WANT_SKB, 960 .data = { &geo_tx_cmd }, 961 }; 962 u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd.id, 963 IWL_FW_CMD_VER_UNKNOWN); 964 965 /* the ops field is at the same spot for all versions, so set in v1 */ 966 geo_tx_cmd.v1.ops = 967 cpu_to_le32(IWL_PER_CHAIN_OFFSET_GET_CURRENT_TABLE); 968 969 if (cmd_ver == 5) 970 len = sizeof(geo_tx_cmd.v5); 971 else if (cmd_ver == 4) 972 len = sizeof(geo_tx_cmd.v4); 973 else if (cmd_ver == 3) 974 len = sizeof(geo_tx_cmd.v3); 975 else if (fw_has_api(&mvm->fwrt.fw->ucode_capa, 976 IWL_UCODE_TLV_API_SAR_TABLE_VER)) 977 len = sizeof(geo_tx_cmd.v2); 978 else 979 len = sizeof(geo_tx_cmd.v1); 980 981 if (!iwl_sar_geo_support(&mvm->fwrt)) 982 return -EOPNOTSUPP; 983 984 cmd.len[0] = len; 985 986 ret = iwl_mvm_send_cmd(mvm, &cmd); 987 if (ret) { 988 IWL_ERR(mvm, "Failed to get geographic profile info %d\n", ret); 989 return ret; 990 } 991 992 resp = (void *)cmd.resp_pkt->data; 993 ret = le32_to_cpu(resp->profile_idx); 994 995 if (WARN_ON(ret > ACPI_NUM_GEO_PROFILES_REV3)) 996 ret = -EIO; 997 998 iwl_free_resp(&cmd); 999 return ret; 1000 } 1001 1002 static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm) 1003 { 1004 u32 cmd_id = WIDE_ID(PHY_OPS_GROUP, PER_CHAIN_LIMIT_OFFSET_CMD); 1005 union iwl_geo_tx_power_profiles_cmd cmd; 1006 u16 len; 1007 u32 n_bands; 1008 u32 n_profiles; 1009 u32 sk = 0; 1010 int ret; 1011 u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id, 1012 IWL_FW_CMD_VER_UNKNOWN); 1013 1014 BUILD_BUG_ON(offsetof(struct iwl_geo_tx_power_profiles_cmd_v1, ops) != 1015 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, ops) || 1016 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, ops) != 1017 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, ops) || 1018 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, ops) != 1019 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, ops) || 1020 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, ops) != 1021 offsetof(struct iwl_geo_tx_power_profiles_cmd_v5, ops)); 1022 1023 /* the ops field is at the same spot for all versions, so set in v1 */ 1024 cmd.v1.ops = cpu_to_le32(IWL_PER_CHAIN_OFFSET_SET_TABLES); 1025 1026 if (cmd_ver == 5) { 1027 len = sizeof(cmd.v5); 1028 n_bands = ARRAY_SIZE(cmd.v5.table[0]); 1029 n_profiles = ACPI_NUM_GEO_PROFILES_REV3; 1030 } else if (cmd_ver == 4) { 1031 len = sizeof(cmd.v4); 1032 n_bands = ARRAY_SIZE(cmd.v4.table[0]); 1033 n_profiles = ACPI_NUM_GEO_PROFILES_REV3; 1034 } else if (cmd_ver == 3) { 1035 len = sizeof(cmd.v3); 1036 n_bands = ARRAY_SIZE(cmd.v3.table[0]); 1037 n_profiles = ACPI_NUM_GEO_PROFILES; 1038 } else if (fw_has_api(&mvm->fwrt.fw->ucode_capa, 1039 IWL_UCODE_TLV_API_SAR_TABLE_VER)) { 1040 len = sizeof(cmd.v2); 1041 n_bands = ARRAY_SIZE(cmd.v2.table[0]); 1042 n_profiles = ACPI_NUM_GEO_PROFILES; 1043 } else { 1044 len = sizeof(cmd.v1); 1045 n_bands = ARRAY_SIZE(cmd.v1.table[0]); 1046 n_profiles = ACPI_NUM_GEO_PROFILES; 1047 } 1048 1049 BUILD_BUG_ON(offsetof(struct iwl_geo_tx_power_profiles_cmd_v1, table) != 1050 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, table) || 1051 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, table) != 1052 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, table) || 1053 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, table) != 1054 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, table) || 1055 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, table) != 1056 offsetof(struct iwl_geo_tx_power_profiles_cmd_v5, table)); 1057 /* the table is at the same position for all versions, so set use v1 */ 1058 ret = iwl_sar_geo_init(&mvm->fwrt, &cmd.v1.table[0][0], 1059 n_bands, n_profiles); 1060 1061 /* 1062 * It is a valid scenario to not support SAR, or miss wgds table, 1063 * but in that case there is no need to send the command. 1064 */ 1065 if (ret) 1066 return 0; 1067 1068 /* Only set to South Korea if the table revision is 1 */ 1069 if (mvm->fwrt.geo_rev == 1) 1070 sk = 1; 1071 1072 /* 1073 * Set the table_revision to South Korea (1) or not (0). The 1074 * element name is misleading, as it doesn't contain the table 1075 * revision number, but whether the South Korea variation 1076 * should be used. 1077 * This must be done after calling iwl_sar_geo_init(). 1078 */ 1079 if (cmd_ver == 5) 1080 cmd.v5.table_revision = cpu_to_le32(sk); 1081 else if (cmd_ver == 4) 1082 cmd.v4.table_revision = cpu_to_le32(sk); 1083 else if (cmd_ver == 3) 1084 cmd.v3.table_revision = cpu_to_le32(sk); 1085 else if (fw_has_api(&mvm->fwrt.fw->ucode_capa, 1086 IWL_UCODE_TLV_API_SAR_TABLE_VER)) 1087 cmd.v2.table_revision = cpu_to_le32(sk); 1088 1089 return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, len, &cmd); 1090 } 1091 1092 int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm) 1093 { 1094 union iwl_ppag_table_cmd cmd; 1095 int ret, cmd_size; 1096 1097 ret = iwl_read_ppag_table(&mvm->fwrt, &cmd, &cmd_size); 1098 /* Not supporting PPAG table is a valid scenario */ 1099 if (ret < 0) 1100 return 0; 1101 1102 IWL_DEBUG_RADIO(mvm, "Sending PER_PLATFORM_ANT_GAIN_CMD\n"); 1103 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(PHY_OPS_GROUP, 1104 PER_PLATFORM_ANT_GAIN_CMD), 1105 0, cmd_size, &cmd); 1106 if (ret < 0) 1107 IWL_ERR(mvm, "failed to send PER_PLATFORM_ANT_GAIN_CMD (%d)\n", 1108 ret); 1109 1110 return ret; 1111 } 1112 1113 static int iwl_mvm_ppag_init(struct iwl_mvm *mvm) 1114 { 1115 /* no need to read the table, done in INIT stage */ 1116 if (!(iwl_acpi_is_ppag_approved(&mvm->fwrt))) 1117 return 0; 1118 1119 return iwl_mvm_ppag_send_cmd(mvm); 1120 } 1121 1122 static const struct dmi_system_id dmi_tas_approved_list[] = { 1123 { .ident = "HP", 1124 .matches = { 1125 DMI_MATCH(DMI_SYS_VENDOR, "HP"), 1126 }, 1127 }, 1128 { .ident = "SAMSUNG", 1129 .matches = { 1130 DMI_MATCH(DMI_SYS_VENDOR, "SAMSUNG ELECTRONICS CO., LTD"), 1131 }, 1132 }, 1133 { .ident = "LENOVO", 1134 .matches = { 1135 DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), 1136 }, 1137 }, 1138 { .ident = "DELL", 1139 .matches = { 1140 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 1141 }, 1142 }, 1143 { .ident = "MSFT", 1144 .matches = { 1145 DMI_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"), 1146 }, 1147 }, 1148 { .ident = "Acer", 1149 .matches = { 1150 DMI_MATCH(DMI_SYS_VENDOR, "Acer"), 1151 }, 1152 }, 1153 { .ident = "ASUS", 1154 .matches = { 1155 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."), 1156 }, 1157 }, 1158 { .ident = "GOOGLE-HP", 1159 .matches = { 1160 DMI_MATCH(DMI_SYS_VENDOR, "Google"), 1161 DMI_MATCH(DMI_BOARD_VENDOR, "HP"), 1162 }, 1163 }, 1164 { .ident = "MSI", 1165 .matches = { 1166 DMI_MATCH(DMI_SYS_VENDOR, "Micro-Star International Co., Ltd."), 1167 }, 1168 }, 1169 { .ident = "Honor", 1170 .matches = { 1171 DMI_MATCH(DMI_SYS_VENDOR, "HONOR"), 1172 }, 1173 }, 1174 /* keep last */ 1175 {} 1176 }; 1177 1178 bool iwl_mvm_is_vendor_in_approved_list(void) 1179 { 1180 return dmi_check_system(dmi_tas_approved_list); 1181 } 1182 1183 static bool iwl_mvm_add_to_tas_block_list(__le32 *list, __le32 *le_size, unsigned int mcc) 1184 { 1185 int i; 1186 u32 size = le32_to_cpu(*le_size); 1187 1188 /* Verify that there is room for another country */ 1189 if (size >= IWL_TAS_BLOCK_LIST_MAX) 1190 return false; 1191 1192 for (i = 0; i < size; i++) { 1193 if (list[i] == cpu_to_le32(mcc)) 1194 return true; 1195 } 1196 1197 list[size++] = cpu_to_le32(mcc); 1198 *le_size = cpu_to_le32(size); 1199 return true; 1200 } 1201 1202 static void iwl_mvm_tas_init(struct iwl_mvm *mvm) 1203 { 1204 u32 cmd_id = WIDE_ID(REGULATORY_AND_NVM_GROUP, TAS_CONFIG); 1205 int ret; 1206 union iwl_tas_config_cmd cmd = {}; 1207 int cmd_size, fw_ver; 1208 1209 BUILD_BUG_ON(ARRAY_SIZE(cmd.v3.block_list_array) < 1210 APCI_WTAS_BLACK_LIST_MAX); 1211 1212 if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_TAS_CFG)) { 1213 IWL_DEBUG_RADIO(mvm, "TAS not enabled in FW\n"); 1214 return; 1215 } 1216 1217 fw_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id, 1218 IWL_FW_CMD_VER_UNKNOWN); 1219 1220 ret = iwl_acpi_get_tas(&mvm->fwrt, &cmd, fw_ver); 1221 if (ret < 0) { 1222 IWL_DEBUG_RADIO(mvm, 1223 "TAS table invalid or unavailable. (%d)\n", 1224 ret); 1225 return; 1226 } 1227 1228 if (ret == 0) 1229 return; 1230 1231 if (!iwl_mvm_is_vendor_in_approved_list()) { 1232 IWL_DEBUG_RADIO(mvm, 1233 "System vendor '%s' is not in the approved list, disabling TAS in US and Canada.\n", 1234 dmi_get_system_info(DMI_SYS_VENDOR)); 1235 if ((!iwl_mvm_add_to_tas_block_list(cmd.v4.block_list_array, 1236 &cmd.v4.block_list_size, 1237 IWL_TAS_US_MCC)) || 1238 (!iwl_mvm_add_to_tas_block_list(cmd.v4.block_list_array, 1239 &cmd.v4.block_list_size, 1240 IWL_TAS_CANADA_MCC))) { 1241 IWL_DEBUG_RADIO(mvm, 1242 "Unable to add US/Canada to TAS block list, disabling TAS\n"); 1243 return; 1244 } 1245 } else { 1246 IWL_DEBUG_RADIO(mvm, 1247 "System vendor '%s' is in the approved list.\n", 1248 dmi_get_system_info(DMI_SYS_VENDOR)); 1249 } 1250 1251 /* v4 is the same size as v3, so no need to differentiate here */ 1252 cmd_size = fw_ver < 3 ? 1253 sizeof(struct iwl_tas_config_cmd_v2) : 1254 sizeof(struct iwl_tas_config_cmd_v3); 1255 1256 ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, cmd_size, &cmd); 1257 if (ret < 0) 1258 IWL_DEBUG_RADIO(mvm, "failed to send TAS_CONFIG (%d)\n", ret); 1259 } 1260 1261 static u8 iwl_mvm_eval_dsm_rfi(struct iwl_mvm *mvm) 1262 { 1263 u8 value; 1264 int ret = iwl_acpi_get_dsm_u8(mvm->fwrt.dev, 0, DSM_RFI_FUNC_ENABLE, 1265 &iwl_rfi_guid, &value); 1266 1267 if (ret < 0) { 1268 IWL_DEBUG_RADIO(mvm, "Failed to get DSM RFI, ret=%d\n", ret); 1269 1270 } else if (value >= DSM_VALUE_RFI_MAX) { 1271 IWL_DEBUG_RADIO(mvm, "DSM RFI got invalid value, ret=%d\n", 1272 value); 1273 1274 } else if (value == DSM_VALUE_RFI_ENABLE) { 1275 IWL_DEBUG_RADIO(mvm, "DSM RFI is evaluated to enable\n"); 1276 return DSM_VALUE_RFI_ENABLE; 1277 } 1278 1279 IWL_DEBUG_RADIO(mvm, "DSM RFI is disabled\n"); 1280 1281 /* default behaviour is disabled */ 1282 return DSM_VALUE_RFI_DISABLE; 1283 } 1284 1285 static void iwl_mvm_lari_cfg(struct iwl_mvm *mvm) 1286 { 1287 int ret; 1288 u32 value; 1289 struct iwl_lari_config_change_cmd_v7 cmd = {}; 1290 u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, 1291 WIDE_ID(REGULATORY_AND_NVM_GROUP, 1292 LARI_CONFIG_CHANGE), 1); 1293 1294 cmd.config_bitmap = iwl_acpi_get_lari_config_bitmap(&mvm->fwrt); 1295 1296 ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0, DSM_FUNC_11AX_ENABLEMENT, 1297 &iwl_guid, &value); 1298 if (!ret) 1299 cmd.oem_11ax_allow_bitmap = cpu_to_le32(value); 1300 1301 ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0, 1302 DSM_FUNC_ENABLE_UNII4_CHAN, 1303 &iwl_guid, &value); 1304 if (!ret) 1305 cmd.oem_unii4_allow_bitmap = cpu_to_le32(value); 1306 1307 ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0, 1308 DSM_FUNC_ACTIVATE_CHANNEL, 1309 &iwl_guid, &value); 1310 if (!ret) { 1311 if (cmd_ver < 8) 1312 value &= ~ACTIVATE_5G2_IN_WW_MASK; 1313 cmd.chan_state_active_bitmap = cpu_to_le32(value); 1314 } 1315 1316 ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0, 1317 DSM_FUNC_ENABLE_6E, 1318 &iwl_guid, &value); 1319 if (!ret) 1320 cmd.oem_uhb_allow_bitmap = cpu_to_le32(value); 1321 1322 ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0, 1323 DSM_FUNC_FORCE_DISABLE_CHANNELS, 1324 &iwl_guid, &value); 1325 if (!ret) 1326 cmd.force_disable_channels_bitmap = cpu_to_le32(value); 1327 1328 ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0, 1329 DSM_FUNC_ENERGY_DETECTION_THRESHOLD, 1330 &iwl_guid, &value); 1331 if (!ret) 1332 cmd.edt_bitmap = cpu_to_le32(value); 1333 1334 if (cmd.config_bitmap || 1335 cmd.oem_uhb_allow_bitmap || 1336 cmd.oem_11ax_allow_bitmap || 1337 cmd.oem_unii4_allow_bitmap || 1338 cmd.chan_state_active_bitmap || 1339 cmd.force_disable_channels_bitmap || 1340 cmd.edt_bitmap) { 1341 size_t cmd_size; 1342 1343 switch (cmd_ver) { 1344 case 8: 1345 case 7: 1346 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v7); 1347 break; 1348 case 6: 1349 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v6); 1350 break; 1351 case 5: 1352 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v5); 1353 break; 1354 case 4: 1355 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v4); 1356 break; 1357 case 3: 1358 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v3); 1359 break; 1360 case 2: 1361 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v2); 1362 break; 1363 default: 1364 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v1); 1365 break; 1366 } 1367 1368 IWL_DEBUG_RADIO(mvm, 1369 "sending LARI_CONFIG_CHANGE, config_bitmap=0x%x, oem_11ax_allow_bitmap=0x%x\n", 1370 le32_to_cpu(cmd.config_bitmap), 1371 le32_to_cpu(cmd.oem_11ax_allow_bitmap)); 1372 IWL_DEBUG_RADIO(mvm, 1373 "sending LARI_CONFIG_CHANGE, oem_unii4_allow_bitmap=0x%x, chan_state_active_bitmap=0x%x, cmd_ver=%d\n", 1374 le32_to_cpu(cmd.oem_unii4_allow_bitmap), 1375 le32_to_cpu(cmd.chan_state_active_bitmap), 1376 cmd_ver); 1377 IWL_DEBUG_RADIO(mvm, 1378 "sending LARI_CONFIG_CHANGE, oem_uhb_allow_bitmap=0x%x, force_disable_channels_bitmap=0x%x\n", 1379 le32_to_cpu(cmd.oem_uhb_allow_bitmap), 1380 le32_to_cpu(cmd.force_disable_channels_bitmap)); 1381 IWL_DEBUG_RADIO(mvm, 1382 "sending LARI_CONFIG_CHANGE, edt_bitmap=0x%x\n", 1383 le32_to_cpu(cmd.edt_bitmap)); 1384 ret = iwl_mvm_send_cmd_pdu(mvm, 1385 WIDE_ID(REGULATORY_AND_NVM_GROUP, 1386 LARI_CONFIG_CHANGE), 1387 0, cmd_size, &cmd); 1388 if (ret < 0) 1389 IWL_DEBUG_RADIO(mvm, 1390 "Failed to send LARI_CONFIG_CHANGE (%d)\n", 1391 ret); 1392 } 1393 1394 if (le32_to_cpu(cmd.oem_uhb_allow_bitmap) & IWL_UATS_VLP_AP_SUPPORTED || 1395 le32_to_cpu(cmd.oem_uhb_allow_bitmap) & IWL_UATS_AFC_AP_SUPPORTED) 1396 mvm->fwrt.uats_enabled = TRUE; 1397 } 1398 1399 void iwl_mvm_get_acpi_tables(struct iwl_mvm *mvm) 1400 { 1401 int ret; 1402 1403 /* read PPAG table */ 1404 ret = iwl_acpi_get_ppag_table(&mvm->fwrt); 1405 if (ret < 0) { 1406 IWL_DEBUG_RADIO(mvm, 1407 "PPAG BIOS table invalid or unavailable. (%d)\n", 1408 ret); 1409 } 1410 1411 /* read SAR tables */ 1412 ret = iwl_sar_get_wrds_table(&mvm->fwrt); 1413 if (ret < 0) { 1414 IWL_DEBUG_RADIO(mvm, 1415 "WRDS SAR BIOS table invalid or unavailable. (%d)\n", 1416 ret); 1417 /* 1418 * If not available, don't fail and don't bother with EWRD and 1419 * WGDS */ 1420 1421 if (!iwl_sar_get_wgds_table(&mvm->fwrt)) { 1422 /* 1423 * If basic SAR is not available, we check for WGDS, 1424 * which should *not* be available either. If it is 1425 * available, issue an error, because we can't use SAR 1426 * Geo without basic SAR. 1427 */ 1428 IWL_ERR(mvm, "BIOS contains WGDS but no WRDS\n"); 1429 } 1430 1431 } else { 1432 ret = iwl_sar_get_ewrd_table(&mvm->fwrt); 1433 /* if EWRD is not available, we can still use 1434 * WRDS, so don't fail */ 1435 if (ret < 0) 1436 IWL_DEBUG_RADIO(mvm, 1437 "EWRD SAR BIOS table invalid or unavailable. (%d)\n", 1438 ret); 1439 1440 /* read geo SAR table */ 1441 if (iwl_sar_geo_support(&mvm->fwrt)) { 1442 ret = iwl_sar_get_wgds_table(&mvm->fwrt); 1443 if (ret < 0) 1444 IWL_DEBUG_RADIO(mvm, 1445 "Geo SAR BIOS table invalid or unavailable. (%d)\n", 1446 ret); 1447 /* we don't fail if the table is not available */ 1448 } 1449 } 1450 1451 iwl_acpi_get_phy_filters(&mvm->fwrt, &mvm->phy_filters); 1452 } 1453 #else /* CONFIG_ACPI */ 1454 1455 inline int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, 1456 int prof_a, int prof_b) 1457 { 1458 return 1; 1459 } 1460 1461 inline int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm) 1462 { 1463 return -ENOENT; 1464 } 1465 1466 static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm) 1467 { 1468 return 0; 1469 } 1470 1471 int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm) 1472 { 1473 return -ENOENT; 1474 } 1475 1476 static int iwl_mvm_ppag_init(struct iwl_mvm *mvm) 1477 { 1478 return 0; 1479 } 1480 1481 static void iwl_mvm_tas_init(struct iwl_mvm *mvm) 1482 { 1483 } 1484 1485 static void iwl_mvm_lari_cfg(struct iwl_mvm *mvm) 1486 { 1487 } 1488 1489 bool iwl_mvm_is_vendor_in_approved_list(void) 1490 { 1491 return false; 1492 } 1493 1494 static u8 iwl_mvm_eval_dsm_rfi(struct iwl_mvm *mvm) 1495 { 1496 return DSM_VALUE_RFI_DISABLE; 1497 } 1498 1499 void iwl_mvm_get_acpi_tables(struct iwl_mvm *mvm) 1500 { 1501 } 1502 1503 #endif /* CONFIG_ACPI */ 1504 1505 void iwl_mvm_send_recovery_cmd(struct iwl_mvm *mvm, u32 flags) 1506 { 1507 u32 error_log_size = mvm->fw->ucode_capa.error_log_size; 1508 int ret; 1509 u32 resp; 1510 1511 struct iwl_fw_error_recovery_cmd recovery_cmd = { 1512 .flags = cpu_to_le32(flags), 1513 .buf_size = 0, 1514 }; 1515 struct iwl_host_cmd host_cmd = { 1516 .id = WIDE_ID(SYSTEM_GROUP, FW_ERROR_RECOVERY_CMD), 1517 .flags = CMD_WANT_SKB, 1518 .data = {&recovery_cmd, }, 1519 .len = {sizeof(recovery_cmd), }, 1520 }; 1521 1522 /* no error log was defined in TLV */ 1523 if (!error_log_size) 1524 return; 1525 1526 if (flags & ERROR_RECOVERY_UPDATE_DB) { 1527 /* no buf was allocated while HW reset */ 1528 if (!mvm->error_recovery_buf) 1529 return; 1530 1531 host_cmd.data[1] = mvm->error_recovery_buf; 1532 host_cmd.len[1] = error_log_size; 1533 host_cmd.dataflags[1] = IWL_HCMD_DFL_NOCOPY; 1534 recovery_cmd.buf_size = cpu_to_le32(error_log_size); 1535 } 1536 1537 ret = iwl_mvm_send_cmd(mvm, &host_cmd); 1538 kfree(mvm->error_recovery_buf); 1539 mvm->error_recovery_buf = NULL; 1540 1541 if (ret) { 1542 IWL_ERR(mvm, "Failed to send recovery cmd %d\n", ret); 1543 return; 1544 } 1545 1546 /* skb respond is only relevant in ERROR_RECOVERY_UPDATE_DB */ 1547 if (flags & ERROR_RECOVERY_UPDATE_DB) { 1548 resp = le32_to_cpu(*(__le32 *)host_cmd.resp_pkt->data); 1549 if (resp) 1550 IWL_ERR(mvm, 1551 "Failed to send recovery cmd blob was invalid %d\n", 1552 resp); 1553 } 1554 } 1555 1556 static int iwl_mvm_sar_init(struct iwl_mvm *mvm) 1557 { 1558 return iwl_mvm_sar_select_profile(mvm, 1, 1); 1559 } 1560 1561 static int iwl_mvm_load_rt_fw(struct iwl_mvm *mvm) 1562 { 1563 int ret; 1564 1565 if (iwl_mvm_has_unified_ucode(mvm)) 1566 return iwl_run_unified_mvm_ucode(mvm); 1567 1568 ret = iwl_run_init_mvm_ucode(mvm); 1569 1570 if (ret) { 1571 IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", ret); 1572 1573 if (iwlmvm_mod_params.init_dbg) 1574 return 0; 1575 return ret; 1576 } 1577 1578 iwl_fw_dbg_stop_sync(&mvm->fwrt); 1579 iwl_trans_stop_device(mvm->trans); 1580 ret = iwl_trans_start_hw(mvm->trans); 1581 if (ret) 1582 return ret; 1583 1584 mvm->rfkill_safe_init_done = false; 1585 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR); 1586 if (ret) 1587 return ret; 1588 1589 mvm->rfkill_safe_init_done = true; 1590 1591 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE, 1592 NULL); 1593 1594 return iwl_init_paging(&mvm->fwrt, mvm->fwrt.cur_fw_img); 1595 } 1596 1597 int iwl_mvm_up(struct iwl_mvm *mvm) 1598 { 1599 int ret, i; 1600 struct ieee80211_supported_band *sband = NULL; 1601 1602 lockdep_assert_held(&mvm->mutex); 1603 1604 ret = iwl_trans_start_hw(mvm->trans); 1605 if (ret) 1606 return ret; 1607 1608 ret = iwl_mvm_load_rt_fw(mvm); 1609 if (ret) { 1610 IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret); 1611 if (ret != -ERFKILL && !mvm->pldr_sync) 1612 iwl_fw_dbg_error_collect(&mvm->fwrt, 1613 FW_DBG_TRIGGER_DRIVER); 1614 goto error; 1615 } 1616 1617 /* FW loaded successfully */ 1618 mvm->pldr_sync = false; 1619 1620 iwl_fw_disable_dbg_asserts(&mvm->fwrt); 1621 iwl_get_shared_mem_conf(&mvm->fwrt); 1622 1623 ret = iwl_mvm_sf_update(mvm, NULL, false); 1624 if (ret) 1625 IWL_ERR(mvm, "Failed to initialize Smart Fifo\n"); 1626 1627 if (!iwl_trans_dbg_ini_valid(mvm->trans)) { 1628 mvm->fwrt.dump.conf = FW_DBG_INVALID; 1629 /* if we have a destination, assume EARLY START */ 1630 if (mvm->fw->dbg.dest_tlv) 1631 mvm->fwrt.dump.conf = FW_DBG_START_FROM_ALIVE; 1632 iwl_fw_start_dbg_conf(&mvm->fwrt, FW_DBG_START_FROM_ALIVE); 1633 } 1634 1635 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); 1636 if (ret) 1637 goto error; 1638 1639 if (!iwl_mvm_has_unified_ucode(mvm)) { 1640 /* Send phy db control command and then phy db calibration */ 1641 ret = iwl_send_phy_db_data(mvm->phy_db); 1642 if (ret) 1643 goto error; 1644 ret = iwl_send_phy_cfg_cmd(mvm); 1645 if (ret) 1646 goto error; 1647 } 1648 1649 ret = iwl_mvm_send_bt_init_conf(mvm); 1650 if (ret) 1651 goto error; 1652 1653 if (fw_has_capa(&mvm->fw->ucode_capa, 1654 IWL_UCODE_TLV_CAPA_SOC_LATENCY_SUPPORT)) { 1655 ret = iwl_set_soc_latency(&mvm->fwrt); 1656 if (ret) 1657 goto error; 1658 } 1659 1660 iwl_mvm_lari_cfg(mvm); 1661 1662 /* Init RSS configuration */ 1663 ret = iwl_configure_rxq(&mvm->fwrt); 1664 if (ret) 1665 goto error; 1666 1667 if (iwl_mvm_has_new_rx_api(mvm)) { 1668 ret = iwl_send_rss_cfg_cmd(mvm); 1669 if (ret) { 1670 IWL_ERR(mvm, "Failed to configure RSS queues: %d\n", 1671 ret); 1672 goto error; 1673 } 1674 } 1675 1676 /* init the fw <-> mac80211 STA mapping */ 1677 for (i = 0; i < mvm->fw->ucode_capa.num_stations; i++) { 1678 RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL); 1679 RCU_INIT_POINTER(mvm->fw_id_to_link_sta[i], NULL); 1680 } 1681 1682 for (i = 0; i < IWL_MVM_FW_MAX_LINK_ID + 1; i++) 1683 RCU_INIT_POINTER(mvm->link_id_to_link_conf[i], NULL); 1684 1685 memset(&mvm->fw_link_ids_map, 0, sizeof(mvm->fw_link_ids_map)); 1686 1687 mvm->tdls_cs.peer.sta_id = IWL_MVM_INVALID_STA; 1688 1689 /* reset quota debouncing buffer - 0xff will yield invalid data */ 1690 memset(&mvm->last_quota_cmd, 0xff, sizeof(mvm->last_quota_cmd)); 1691 1692 if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_DQA_SUPPORT)) { 1693 ret = iwl_mvm_send_dqa_cmd(mvm); 1694 if (ret) 1695 goto error; 1696 } 1697 1698 /* 1699 * Add auxiliary station for scanning. 1700 * Newer versions of this command implies that the fw uses 1701 * internal aux station for all aux activities that don't 1702 * requires a dedicated data queue. 1703 */ 1704 if (!iwl_mvm_has_new_station_api(mvm->fw)) { 1705 /* 1706 * In old version the aux station uses mac id like other 1707 * station and not lmac id 1708 */ 1709 ret = iwl_mvm_add_aux_sta(mvm, MAC_INDEX_AUX); 1710 if (ret) 1711 goto error; 1712 } 1713 1714 /* Add all the PHY contexts */ 1715 i = 0; 1716 while (!sband && i < NUM_NL80211_BANDS) 1717 sband = mvm->hw->wiphy->bands[i++]; 1718 1719 if (WARN_ON_ONCE(!sband)) { 1720 ret = -ENODEV; 1721 goto error; 1722 } 1723 1724 if (iwl_mvm_is_tt_in_fw(mvm)) { 1725 /* in order to give the responsibility of ct-kill and 1726 * TX backoff to FW we need to send empty temperature reporting 1727 * cmd during init time 1728 */ 1729 iwl_mvm_send_temp_report_ths_cmd(mvm); 1730 } else { 1731 /* Initialize tx backoffs to the minimal possible */ 1732 iwl_mvm_tt_tx_backoff(mvm, 0); 1733 } 1734 1735 #ifdef CONFIG_THERMAL 1736 /* TODO: read the budget from BIOS / Platform NVM */ 1737 1738 /* 1739 * In case there is no budget from BIOS / Platform NVM the default 1740 * budget should be 2000mW (cooling state 0). 1741 */ 1742 if (iwl_mvm_is_ctdp_supported(mvm)) { 1743 ret = iwl_mvm_ctdp_command(mvm, CTDP_CMD_OPERATION_START, 1744 mvm->cooling_dev.cur_state); 1745 if (ret) 1746 goto error; 1747 } 1748 #endif 1749 1750 if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_SET_LTR_GEN2)) 1751 WARN_ON(iwl_mvm_config_ltr(mvm)); 1752 1753 ret = iwl_mvm_power_update_device(mvm); 1754 if (ret) 1755 goto error; 1756 1757 /* 1758 * RTNL is not taken during Ct-kill, but we don't need to scan/Tx 1759 * anyway, so don't init MCC. 1760 */ 1761 if (!test_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status)) { 1762 ret = iwl_mvm_init_mcc(mvm); 1763 if (ret) 1764 goto error; 1765 } 1766 1767 if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_UMAC_SCAN)) { 1768 mvm->scan_type = IWL_SCAN_TYPE_NOT_SET; 1769 mvm->hb_scan_type = IWL_SCAN_TYPE_NOT_SET; 1770 ret = iwl_mvm_config_scan(mvm); 1771 if (ret) 1772 goto error; 1773 } 1774 1775 if (test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status)) { 1776 iwl_mvm_send_recovery_cmd(mvm, ERROR_RECOVERY_UPDATE_DB); 1777 1778 if (mvm->time_sync.active) 1779 iwl_mvm_time_sync_config(mvm, mvm->time_sync.peer_addr, 1780 IWL_TIME_SYNC_PROTOCOL_TM | 1781 IWL_TIME_SYNC_PROTOCOL_FTM); 1782 } 1783 1784 if (!mvm->ptp_data.ptp_clock) 1785 iwl_mvm_ptp_init(mvm); 1786 1787 if (iwl_acpi_get_eckv(mvm->dev, &mvm->ext_clock_valid)) 1788 IWL_DEBUG_INFO(mvm, "ECKV table doesn't exist in BIOS\n"); 1789 1790 ret = iwl_mvm_ppag_init(mvm); 1791 if (ret) 1792 goto error; 1793 1794 ret = iwl_mvm_sar_init(mvm); 1795 if (ret == 0) 1796 ret = iwl_mvm_sar_geo_init(mvm); 1797 if (ret < 0) 1798 goto error; 1799 1800 ret = iwl_mvm_sgom_init(mvm); 1801 if (ret) 1802 goto error; 1803 1804 iwl_mvm_tas_init(mvm); 1805 iwl_mvm_leds_sync(mvm); 1806 iwl_mvm_uats_init(mvm); 1807 1808 if (iwl_rfi_supported(mvm)) { 1809 if (iwl_mvm_eval_dsm_rfi(mvm) == DSM_VALUE_RFI_ENABLE) 1810 iwl_rfi_send_config_cmd(mvm, NULL); 1811 } 1812 1813 iwl_mvm_mei_device_state(mvm, true); 1814 1815 IWL_DEBUG_INFO(mvm, "RT uCode started.\n"); 1816 return 0; 1817 error: 1818 if (!iwlmvm_mod_params.init_dbg || !ret) 1819 iwl_mvm_stop_device(mvm); 1820 return ret; 1821 } 1822 1823 int iwl_mvm_load_d3_fw(struct iwl_mvm *mvm) 1824 { 1825 int ret, i; 1826 1827 lockdep_assert_held(&mvm->mutex); 1828 1829 ret = iwl_trans_start_hw(mvm->trans); 1830 if (ret) 1831 return ret; 1832 1833 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_WOWLAN); 1834 if (ret) { 1835 IWL_ERR(mvm, "Failed to start WoWLAN firmware: %d\n", ret); 1836 goto error; 1837 } 1838 1839 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); 1840 if (ret) 1841 goto error; 1842 1843 /* Send phy db control command and then phy db calibration*/ 1844 ret = iwl_send_phy_db_data(mvm->phy_db); 1845 if (ret) 1846 goto error; 1847 1848 ret = iwl_send_phy_cfg_cmd(mvm); 1849 if (ret) 1850 goto error; 1851 1852 /* init the fw <-> mac80211 STA mapping */ 1853 for (i = 0; i < mvm->fw->ucode_capa.num_stations; i++) { 1854 RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL); 1855 RCU_INIT_POINTER(mvm->fw_id_to_link_sta[i], NULL); 1856 } 1857 1858 if (!iwl_mvm_has_new_station_api(mvm->fw)) { 1859 /* 1860 * Add auxiliary station for scanning. 1861 * Newer versions of this command implies that the fw uses 1862 * internal aux station for all aux activities that don't 1863 * requires a dedicated data queue. 1864 * In old version the aux station uses mac id like other 1865 * station and not lmac id 1866 */ 1867 ret = iwl_mvm_add_aux_sta(mvm, MAC_INDEX_AUX); 1868 if (ret) 1869 goto error; 1870 } 1871 1872 return 0; 1873 error: 1874 iwl_mvm_stop_device(mvm); 1875 return ret; 1876 } 1877 1878 void iwl_mvm_rx_mfuart_notif(struct iwl_mvm *mvm, 1879 struct iwl_rx_cmd_buffer *rxb) 1880 { 1881 struct iwl_rx_packet *pkt = rxb_addr(rxb); 1882 struct iwl_mfuart_load_notif *mfuart_notif = (void *)pkt->data; 1883 1884 IWL_DEBUG_INFO(mvm, 1885 "MFUART: installed ver: 0x%08x, external ver: 0x%08x, status: 0x%08x, duration: 0x%08x\n", 1886 le32_to_cpu(mfuart_notif->installed_ver), 1887 le32_to_cpu(mfuart_notif->external_ver), 1888 le32_to_cpu(mfuart_notif->status), 1889 le32_to_cpu(mfuart_notif->duration)); 1890 1891 if (iwl_rx_packet_payload_len(pkt) == sizeof(*mfuart_notif)) 1892 IWL_DEBUG_INFO(mvm, 1893 "MFUART: image size: 0x%08x\n", 1894 le32_to_cpu(mfuart_notif->image_size)); 1895 } 1896