1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause 2 /* 3 * Copyright (C) 2012-2014, 2018-2025 Intel Corporation 4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH 5 * Copyright (C) 2016-2017 Intel Deutschland GmbH 6 */ 7 #include <net/mac80211.h> 8 #include <linux/netdevice.h> 9 #include <linux/dmi.h> 10 11 #include "iwl-trans.h" 12 #include "iwl-op-mode.h" 13 #include "fw/img.h" 14 #include "iwl-debug.h" 15 #include "iwl-prph.h" 16 #include "fw/acpi.h" 17 #include "fw/pnvm.h" 18 #include "fw/uefi.h" 19 #include "fw/regulatory.h" 20 21 #include "mvm.h" 22 #include "fw/dbg.h" 23 #include "iwl-phy-db.h" 24 #include "iwl-modparams.h" 25 #include "iwl-nvm-parse.h" 26 #include "time-sync.h" 27 28 #define MVM_UCODE_ALIVE_TIMEOUT (2 * HZ) 29 #define MVM_UCODE_CALIB_TIMEOUT (2 * HZ) 30 31 struct iwl_mvm_alive_data { 32 bool valid; 33 u32 scd_base_addr; 34 }; 35 36 static int iwl_send_tx_ant_cfg(struct iwl_mvm *mvm, u8 valid_tx_ant) 37 { 38 struct iwl_tx_ant_cfg_cmd tx_ant_cmd = { 39 .valid = cpu_to_le32(valid_tx_ant), 40 }; 41 42 IWL_DEBUG_FW(mvm, "select valid tx ant: %u\n", valid_tx_ant); 43 return iwl_mvm_send_cmd_pdu(mvm, TX_ANT_CONFIGURATION_CMD, 0, 44 sizeof(tx_ant_cmd), &tx_ant_cmd); 45 } 46 47 static int iwl_send_rss_cfg_cmd(struct iwl_mvm *mvm) 48 { 49 int i; 50 struct iwl_rss_config_cmd cmd = { 51 .flags = cpu_to_le32(IWL_RSS_ENABLE), 52 .hash_mask = BIT(IWL_RSS_HASH_TYPE_IPV4_TCP) | 53 BIT(IWL_RSS_HASH_TYPE_IPV4_UDP) | 54 BIT(IWL_RSS_HASH_TYPE_IPV4_PAYLOAD) | 55 BIT(IWL_RSS_HASH_TYPE_IPV6_TCP) | 56 BIT(IWL_RSS_HASH_TYPE_IPV6_UDP) | 57 BIT(IWL_RSS_HASH_TYPE_IPV6_PAYLOAD), 58 }; 59 60 if (mvm->trans->num_rx_queues == 1) 61 return 0; 62 63 /* Do not direct RSS traffic to Q 0 which is our fallback queue */ 64 for (i = 0; i < ARRAY_SIZE(cmd.indirection_table); i++) 65 cmd.indirection_table[i] = 66 1 + (i % (mvm->trans->num_rx_queues - 1)); 67 netdev_rss_key_fill(cmd.secret_key, sizeof(cmd.secret_key)); 68 69 return iwl_mvm_send_cmd_pdu(mvm, RSS_CONFIG_CMD, 0, sizeof(cmd), &cmd); 70 } 71 72 static int iwl_mvm_send_dqa_cmd(struct iwl_mvm *mvm) 73 { 74 struct iwl_dqa_enable_cmd dqa_cmd = { 75 .cmd_queue = cpu_to_le32(IWL_MVM_DQA_CMD_QUEUE), 76 }; 77 u32 cmd_id = WIDE_ID(DATA_PATH_GROUP, DQA_ENABLE_CMD); 78 int ret; 79 80 ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, sizeof(dqa_cmd), &dqa_cmd); 81 if (ret) 82 IWL_ERR(mvm, "Failed to send DQA enabling command: %d\n", ret); 83 else 84 IWL_DEBUG_FW(mvm, "Working in DQA mode\n"); 85 86 return ret; 87 } 88 89 void iwl_mvm_mfu_assert_dump_notif(struct iwl_mvm *mvm, 90 struct iwl_rx_cmd_buffer *rxb) 91 { 92 struct iwl_rx_packet *pkt = rxb_addr(rxb); 93 struct iwl_mfu_assert_dump_notif *mfu_dump_notif = (void *)pkt->data; 94 95 if (mfu_dump_notif->index_num == 0) 96 IWL_INFO(mvm, "MFUART assert id 0x%x occurred\n", 97 le32_to_cpu(mfu_dump_notif->assert_id)); 98 } 99 100 static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait, 101 struct iwl_rx_packet *pkt, void *data) 102 { 103 unsigned int pkt_len = iwl_rx_packet_payload_len(pkt); 104 struct iwl_mvm *mvm = 105 container_of(notif_wait, struct iwl_mvm, notif_wait); 106 struct iwl_mvm_alive_data *alive_data = data; 107 struct iwl_umac_alive *umac; 108 struct iwl_lmac_alive *lmac1; 109 struct iwl_lmac_alive *lmac2 = NULL; 110 u16 status; 111 u32 lmac_error_event_table, umac_error_table; 112 u32 version = iwl_fw_lookup_notif_ver(mvm->fw, LEGACY_GROUP, 113 UCODE_ALIVE_NTFY, 0); 114 u32 i; 115 116 117 if (version >= 6) { 118 struct iwl_alive_ntf_v6 *palive; 119 120 if (pkt_len < sizeof(*palive)) 121 return false; 122 123 palive = (void *)pkt->data; 124 mvm->trans->dbg.imr_data.imr_enable = 125 le32_to_cpu(palive->imr.enabled); 126 mvm->trans->dbg.imr_data.imr_size = 127 le32_to_cpu(palive->imr.size); 128 mvm->trans->dbg.imr_data.imr2sram_remainbyte = 129 mvm->trans->dbg.imr_data.imr_size; 130 mvm->trans->dbg.imr_data.imr_base_addr = 131 palive->imr.base_addr; 132 mvm->trans->dbg.imr_data.imr_curr_addr = 133 le64_to_cpu(mvm->trans->dbg.imr_data.imr_base_addr); 134 IWL_DEBUG_FW(mvm, "IMR Enabled: 0x0%x size 0x0%x Address 0x%016llx\n", 135 mvm->trans->dbg.imr_data.imr_enable, 136 mvm->trans->dbg.imr_data.imr_size, 137 le64_to_cpu(mvm->trans->dbg.imr_data.imr_base_addr)); 138 139 if (!mvm->trans->dbg.imr_data.imr_enable) { 140 for (i = 0; i < ARRAY_SIZE(mvm->trans->dbg.active_regions); i++) { 141 struct iwl_ucode_tlv *reg_tlv; 142 struct iwl_fw_ini_region_tlv *reg; 143 144 reg_tlv = mvm->trans->dbg.active_regions[i]; 145 if (!reg_tlv) 146 continue; 147 148 reg = (void *)reg_tlv->data; 149 /* 150 * We have only one DRAM IMR region, so we 151 * can break as soon as we find the first 152 * one. 153 */ 154 if (reg->type == IWL_FW_INI_REGION_DRAM_IMR) { 155 mvm->trans->dbg.unsupported_region_msk |= BIT(i); 156 break; 157 } 158 } 159 } 160 161 if (version >= 8) { 162 const struct iwl_alive_ntf *palive_v8 = 163 (void *)pkt->data; 164 165 if (pkt_len < sizeof(*palive_v8)) 166 return false; 167 168 IWL_DEBUG_FW(mvm, "platform id: 0x%llx\n", 169 palive_v8->platform_id); 170 } 171 } 172 173 if (version >= 5) { 174 struct iwl_alive_ntf_v5 *palive; 175 176 if (pkt_len < sizeof(*palive)) 177 return false; 178 179 palive = (void *)pkt->data; 180 umac = &palive->umac_data; 181 lmac1 = &palive->lmac_data[0]; 182 lmac2 = &palive->lmac_data[1]; 183 status = le16_to_cpu(palive->status); 184 185 mvm->trans->sku_id[0] = le32_to_cpu(palive->sku_id.data[0]); 186 mvm->trans->sku_id[1] = le32_to_cpu(palive->sku_id.data[1]); 187 mvm->trans->sku_id[2] = le32_to_cpu(palive->sku_id.data[2]); 188 189 IWL_DEBUG_FW(mvm, "Got sku_id: 0x0%x 0x0%x 0x0%x\n", 190 mvm->trans->sku_id[0], 191 mvm->trans->sku_id[1], 192 mvm->trans->sku_id[2]); 193 } else if (iwl_rx_packet_payload_len(pkt) == sizeof(struct iwl_alive_ntf_v4)) { 194 struct iwl_alive_ntf_v4 *palive; 195 196 if (pkt_len < sizeof(*palive)) 197 return false; 198 199 palive = (void *)pkt->data; 200 umac = &palive->umac_data; 201 lmac1 = &palive->lmac_data[0]; 202 lmac2 = &palive->lmac_data[1]; 203 status = le16_to_cpu(palive->status); 204 } else if (iwl_rx_packet_payload_len(pkt) == 205 sizeof(struct iwl_alive_ntf_v3)) { 206 struct iwl_alive_ntf_v3 *palive3; 207 208 if (pkt_len < sizeof(*palive3)) 209 return false; 210 211 palive3 = (void *)pkt->data; 212 umac = &palive3->umac_data; 213 lmac1 = &palive3->lmac_data; 214 status = le16_to_cpu(palive3->status); 215 } else { 216 WARN(1, "unsupported alive notification (size %d)\n", 217 iwl_rx_packet_payload_len(pkt)); 218 /* get timeout later */ 219 return false; 220 } 221 222 lmac_error_event_table = 223 le32_to_cpu(lmac1->dbg_ptrs.error_event_table_ptr); 224 iwl_fw_lmac1_set_alive_err_table(mvm->trans, lmac_error_event_table); 225 226 if (lmac2) 227 mvm->trans->dbg.lmac_error_event_table[1] = 228 le32_to_cpu(lmac2->dbg_ptrs.error_event_table_ptr); 229 230 umac_error_table = le32_to_cpu(umac->dbg_ptrs.error_info_addr) & 231 ~FW_ADDR_CACHE_CONTROL; 232 233 if (umac_error_table) { 234 if (umac_error_table >= 235 mvm->trans->cfg->min_umac_error_event_table) { 236 iwl_fw_umac_set_alive_err_table(mvm->trans, 237 umac_error_table); 238 } else { 239 IWL_ERR(mvm, 240 "Not valid error log pointer 0x%08X for %s uCode\n", 241 umac_error_table, 242 (mvm->fwrt.cur_fw_img == IWL_UCODE_INIT) ? 243 "Init" : "RT"); 244 } 245 } 246 247 alive_data->scd_base_addr = le32_to_cpu(lmac1->dbg_ptrs.scd_base_ptr); 248 alive_data->valid = status == IWL_ALIVE_STATUS_OK; 249 250 IWL_DEBUG_FW(mvm, 251 "Alive ucode status 0x%04x revision 0x%01X 0x%01X\n", 252 status, lmac1->ver_type, lmac1->ver_subtype); 253 254 if (lmac2) 255 IWL_DEBUG_FW(mvm, "Alive ucode CDB\n"); 256 257 IWL_DEBUG_FW(mvm, 258 "UMAC version: Major - 0x%x, Minor - 0x%x\n", 259 le32_to_cpu(umac->umac_major), 260 le32_to_cpu(umac->umac_minor)); 261 262 iwl_fwrt_update_fw_versions(&mvm->fwrt, lmac1, umac); 263 264 return true; 265 } 266 267 static bool iwl_wait_init_complete(struct iwl_notif_wait_data *notif_wait, 268 struct iwl_rx_packet *pkt, void *data) 269 { 270 WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF); 271 272 return true; 273 } 274 275 static bool iwl_wait_phy_db_entry(struct iwl_notif_wait_data *notif_wait, 276 struct iwl_rx_packet *pkt, void *data) 277 { 278 struct iwl_phy_db *phy_db = data; 279 280 if (pkt->hdr.cmd != CALIB_RES_NOTIF_PHY_DB) { 281 WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF); 282 return true; 283 } 284 285 WARN_ON(iwl_phy_db_set_section(phy_db, pkt)); 286 287 return false; 288 } 289 290 static void iwl_mvm_print_pd_notification(struct iwl_mvm *mvm) 291 { 292 #define IWL_FW_PRINT_REG_INFO(reg_name) \ 293 IWL_ERR(mvm, #reg_name ": 0x%x\n", iwl_read_umac_prph(trans, reg_name)) 294 295 struct iwl_trans *trans = mvm->trans; 296 enum iwl_device_family device_family = trans->trans_cfg->device_family; 297 298 if (device_family < IWL_DEVICE_FAMILY_8000) 299 return; 300 301 if (device_family <= IWL_DEVICE_FAMILY_9000) 302 IWL_FW_PRINT_REG_INFO(WFPM_ARC1_PD_NOTIFICATION); 303 else 304 IWL_FW_PRINT_REG_INFO(WFPM_LMAC1_PD_NOTIFICATION); 305 306 IWL_FW_PRINT_REG_INFO(HPM_SECONDARY_DEVICE_STATE); 307 308 /* print OPT info */ 309 IWL_FW_PRINT_REG_INFO(WFPM_MAC_OTP_CFG7_ADDR); 310 IWL_FW_PRINT_REG_INFO(WFPM_MAC_OTP_CFG7_DATA); 311 } 312 313 static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm, 314 enum iwl_ucode_type ucode_type) 315 { 316 struct iwl_notification_wait alive_wait; 317 struct iwl_mvm_alive_data alive_data = {}; 318 const struct fw_img *fw; 319 int ret; 320 enum iwl_ucode_type old_type = mvm->fwrt.cur_fw_img; 321 static const u16 alive_cmd[] = { UCODE_ALIVE_NTFY }; 322 bool run_in_rfkill = 323 ucode_type == IWL_UCODE_INIT || iwl_mvm_has_unified_ucode(mvm); 324 u8 count; 325 struct iwl_pc_data *pc_data; 326 327 if (ucode_type == IWL_UCODE_REGULAR && 328 iwl_fw_dbg_conf_usniffer(mvm->fw, FW_DBG_START_FROM_ALIVE) && 329 !(fw_has_capa(&mvm->fw->ucode_capa, 330 IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED))) 331 fw = iwl_get_ucode_image(mvm->fw, IWL_UCODE_REGULAR_USNIFFER); 332 else 333 fw = iwl_get_ucode_image(mvm->fw, ucode_type); 334 if (WARN_ON(!fw)) 335 return -EINVAL; 336 iwl_fw_set_current_image(&mvm->fwrt, ucode_type); 337 clear_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status); 338 339 iwl_init_notification_wait(&mvm->notif_wait, &alive_wait, 340 alive_cmd, ARRAY_SIZE(alive_cmd), 341 iwl_alive_fn, &alive_data); 342 343 /* 344 * We want to load the INIT firmware even in RFKILL 345 * For the unified firmware case, the ucode_type is not 346 * INIT, but we still need to run it. 347 */ 348 ret = iwl_trans_start_fw(mvm->trans, fw, run_in_rfkill); 349 if (ret) { 350 iwl_fw_set_current_image(&mvm->fwrt, old_type); 351 iwl_remove_notification(&mvm->notif_wait, &alive_wait); 352 return ret; 353 } 354 355 /* 356 * Some things may run in the background now, but we 357 * just wait for the ALIVE notification here. 358 */ 359 ret = iwl_wait_notification(&mvm->notif_wait, &alive_wait, 360 MVM_UCODE_ALIVE_TIMEOUT); 361 362 if (mvm->trans->trans_cfg->device_family == 363 IWL_DEVICE_FAMILY_AX210) { 364 /* print these registers regardless of alive fail/success */ 365 IWL_INFO(mvm, "WFPM_UMAC_PD_NOTIFICATION: 0x%x\n", 366 iwl_read_umac_prph(mvm->trans, WFPM_ARC1_PD_NOTIFICATION)); 367 IWL_INFO(mvm, "WFPM_LMAC2_PD_NOTIFICATION: 0x%x\n", 368 iwl_read_umac_prph(mvm->trans, WFPM_LMAC2_PD_NOTIFICATION)); 369 IWL_INFO(mvm, "WFPM_AUTH_KEY_0: 0x%x\n", 370 iwl_read_umac_prph(mvm->trans, SB_MODIFY_CFG_FLAG)); 371 IWL_INFO(mvm, "CNVI_SCU_SEQ_DATA_DW9: 0x%x\n", 372 iwl_read_prph(mvm->trans, CNVI_SCU_SEQ_DATA_DW9)); 373 } 374 375 if (ret) { 376 struct iwl_trans *trans = mvm->trans; 377 378 /* SecBoot info */ 379 if (trans->trans_cfg->device_family >= 380 IWL_DEVICE_FAMILY_22000) { 381 IWL_ERR(mvm, 382 "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n", 383 iwl_read_umac_prph(trans, UMAG_SB_CPU_1_STATUS), 384 iwl_read_umac_prph(trans, 385 UMAG_SB_CPU_2_STATUS)); 386 } else if (trans->trans_cfg->device_family >= 387 IWL_DEVICE_FAMILY_8000) { 388 IWL_ERR(mvm, 389 "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n", 390 iwl_read_prph(trans, SB_CPU_1_STATUS), 391 iwl_read_prph(trans, SB_CPU_2_STATUS)); 392 } 393 394 iwl_mvm_print_pd_notification(mvm); 395 396 /* LMAC/UMAC PC info */ 397 if (trans->trans_cfg->device_family >= 398 IWL_DEVICE_FAMILY_22000) { 399 pc_data = trans->dbg.pc_data; 400 for (count = 0; count < trans->dbg.num_pc; 401 count++, pc_data++) 402 IWL_ERR(mvm, "%s: 0x%x\n", 403 pc_data->pc_name, 404 pc_data->pc_address); 405 } else if (trans->trans_cfg->device_family >= 406 IWL_DEVICE_FAMILY_9000) { 407 IWL_ERR(mvm, "UMAC PC: 0x%x\n", 408 iwl_read_umac_prph(trans, 409 UREG_UMAC_CURRENT_PC)); 410 IWL_ERR(mvm, "LMAC PC: 0x%x\n", 411 iwl_read_umac_prph(trans, 412 UREG_LMAC1_CURRENT_PC)); 413 if (iwl_mvm_is_cdb_supported(mvm)) 414 IWL_ERR(mvm, "LMAC2 PC: 0x%x\n", 415 iwl_read_umac_prph(trans, 416 UREG_LMAC2_CURRENT_PC)); 417 } 418 419 if (ret == -ETIMEDOUT && !mvm->fw_product_reset) 420 iwl_fw_dbg_error_collect(&mvm->fwrt, 421 FW_DBG_TRIGGER_ALIVE_TIMEOUT); 422 423 iwl_fw_set_current_image(&mvm->fwrt, old_type); 424 return ret; 425 } 426 427 if (!alive_data.valid) { 428 IWL_ERR(mvm, "Loaded ucode is not valid!\n"); 429 iwl_fw_set_current_image(&mvm->fwrt, old_type); 430 return -EIO; 431 } 432 433 /* if reached this point, Alive notification was received */ 434 iwl_mei_alive_notif(true); 435 436 iwl_trans_fw_alive(mvm->trans, alive_data.scd_base_addr); 437 438 ret = iwl_pnvm_load(mvm->trans, &mvm->notif_wait, 439 &mvm->fw->ucode_capa); 440 if (ret) { 441 IWL_ERR(mvm, "Timeout waiting for PNVM load!\n"); 442 iwl_fw_set_current_image(&mvm->fwrt, old_type); 443 return ret; 444 } 445 446 /* 447 * Note: all the queues are enabled as part of the interface 448 * initialization, but in firmware restart scenarios they 449 * could be stopped, so wake them up. In firmware restart, 450 * mac80211 will have the queues stopped as well until the 451 * reconfiguration completes. During normal startup, they 452 * will be empty. 453 */ 454 455 memset(&mvm->queue_info, 0, sizeof(mvm->queue_info)); 456 /* 457 * Set a 'fake' TID for the command queue, since we use the 458 * hweight() of the tid_bitmap as a refcount now. Not that 459 * we ever even consider the command queue as one we might 460 * want to reuse, but be safe nevertheless. 461 */ 462 mvm->queue_info[IWL_MVM_DQA_CMD_QUEUE].tid_bitmap = 463 BIT(IWL_MAX_TID_COUNT + 2); 464 465 set_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status); 466 #ifdef CONFIG_IWLWIFI_DEBUGFS 467 iwl_fw_set_dbg_rec_on(&mvm->fwrt); 468 #endif 469 470 /* 471 * For pre-MLD API (MLD API doesn't use the timestamps): 472 * All the BSSes in the BSS table include the GP2 in the system 473 * at the beacon Rx time, this is of course no longer relevant 474 * since we are resetting the firmware. 475 * Purge all the BSS table. 476 */ 477 if (!mvm->mld_api_is_used) 478 cfg80211_bss_flush(mvm->hw->wiphy); 479 480 return 0; 481 } 482 483 static void iwl_mvm_phy_filter_init(struct iwl_mvm *mvm, 484 struct iwl_phy_specific_cfg *phy_filters) 485 { 486 #ifdef CONFIG_ACPI 487 *phy_filters = mvm->fwrt.phy_filters; 488 #endif /* CONFIG_ACPI */ 489 } 490 491 static void iwl_mvm_uats_init(struct iwl_mvm *mvm) 492 { 493 u8 cmd_ver; 494 int ret; 495 struct iwl_host_cmd cmd = { 496 .id = WIDE_ID(REGULATORY_AND_NVM_GROUP, 497 MCC_ALLOWED_AP_TYPE_CMD), 498 .flags = 0, 499 .data[0] = &mvm->fwrt.uats_table, 500 .len[0] = sizeof(mvm->fwrt.uats_table), 501 .dataflags[0] = IWL_HCMD_DFL_NOCOPY, 502 }; 503 504 if (mvm->trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_AX210) { 505 IWL_DEBUG_RADIO(mvm, "UATS feature is not supported\n"); 506 return; 507 } 508 509 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd.id, 510 IWL_FW_CMD_VER_UNKNOWN); 511 if (cmd_ver != 1) { 512 IWL_DEBUG_RADIO(mvm, 513 "MCC_ALLOWED_AP_TYPE_CMD ver %d not supported\n", 514 cmd_ver); 515 return; 516 } 517 518 ret = iwl_uefi_get_uats_table(mvm->trans, &mvm->fwrt); 519 if (ret < 0) { 520 IWL_DEBUG_FW(mvm, "failed to read UATS table (%d)\n", ret); 521 return; 522 } 523 524 ret = iwl_mvm_send_cmd(mvm, &cmd); 525 if (ret < 0) 526 IWL_ERR(mvm, "failed to send MCC_ALLOWED_AP_TYPE_CMD (%d)\n", 527 ret); 528 else 529 IWL_DEBUG_RADIO(mvm, "MCC_ALLOWED_AP_TYPE_CMD sent to FW\n"); 530 } 531 532 static int iwl_mvm_sgom_init(struct iwl_mvm *mvm) 533 { 534 u8 cmd_ver; 535 int ret; 536 struct iwl_host_cmd cmd = { 537 .id = WIDE_ID(REGULATORY_AND_NVM_GROUP, 538 SAR_OFFSET_MAPPING_TABLE_CMD), 539 .flags = 0, 540 .data[0] = &mvm->fwrt.sgom_table, 541 .len[0] = sizeof(mvm->fwrt.sgom_table), 542 .dataflags[0] = IWL_HCMD_DFL_NOCOPY, 543 }; 544 545 if (!mvm->fwrt.sgom_enabled) { 546 IWL_DEBUG_RADIO(mvm, "SGOM table is disabled\n"); 547 return 0; 548 } 549 550 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd.id, 551 IWL_FW_CMD_VER_UNKNOWN); 552 553 if (cmd_ver != 2) { 554 IWL_DEBUG_RADIO(mvm, "command version is unsupported. version = %d\n", 555 cmd_ver); 556 return 0; 557 } 558 559 ret = iwl_mvm_send_cmd(mvm, &cmd); 560 if (ret < 0) 561 IWL_ERR(mvm, "failed to send SAR_OFFSET_MAPPING_CMD (%d)\n", ret); 562 563 return ret; 564 } 565 566 static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm) 567 { 568 u32 cmd_id = PHY_CONFIGURATION_CMD; 569 struct iwl_phy_cfg_cmd_v3 phy_cfg_cmd; 570 enum iwl_ucode_type ucode_type = mvm->fwrt.cur_fw_img; 571 u8 cmd_ver; 572 size_t cmd_size; 573 574 if (iwl_mvm_has_unified_ucode(mvm) && 575 !mvm->trans->cfg->tx_with_siso_diversity) 576 return 0; 577 578 if (mvm->trans->cfg->tx_with_siso_diversity) { 579 /* 580 * TODO: currently we don't set the antenna but letting the NIC 581 * to decide which antenna to use. This should come from BIOS. 582 */ 583 phy_cfg_cmd.phy_cfg = 584 cpu_to_le32(FW_PHY_CFG_CHAIN_SAD_ENABLED); 585 } 586 587 /* Set parameters */ 588 phy_cfg_cmd.phy_cfg = cpu_to_le32(iwl_mvm_get_phy_config(mvm)); 589 590 /* set flags extra PHY configuration flags from the device's cfg */ 591 phy_cfg_cmd.phy_cfg |= 592 cpu_to_le32(mvm->trans->trans_cfg->extra_phy_cfg_flags); 593 594 phy_cfg_cmd.calib_control.event_trigger = 595 mvm->fw->default_calib[ucode_type].event_trigger; 596 phy_cfg_cmd.calib_control.flow_trigger = 597 mvm->fw->default_calib[ucode_type].flow_trigger; 598 599 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id, 600 IWL_FW_CMD_VER_UNKNOWN); 601 if (cmd_ver >= 3) 602 iwl_mvm_phy_filter_init(mvm, &phy_cfg_cmd.phy_specific_cfg); 603 604 IWL_DEBUG_INFO(mvm, "Sending Phy CFG command: 0x%x\n", 605 phy_cfg_cmd.phy_cfg); 606 cmd_size = (cmd_ver == 3) ? sizeof(struct iwl_phy_cfg_cmd_v3) : 607 sizeof(struct iwl_phy_cfg_cmd_v1); 608 return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, cmd_size, &phy_cfg_cmd); 609 } 610 611 static int iwl_run_unified_mvm_ucode(struct iwl_mvm *mvm) 612 { 613 struct iwl_notification_wait init_wait; 614 struct iwl_nvm_access_complete_cmd nvm_complete = {}; 615 struct iwl_init_extended_cfg_cmd init_cfg = { 616 .init_flags = cpu_to_le32(BIT(IWL_INIT_NVM)), 617 }; 618 static const u16 init_complete[] = { 619 INIT_COMPLETE_NOTIF, 620 }; 621 u32 sb_cfg; 622 int ret; 623 624 if (mvm->trans->cfg->tx_with_siso_diversity) 625 init_cfg.init_flags |= cpu_to_le32(BIT(IWL_INIT_PHY)); 626 627 lockdep_assert_held(&mvm->mutex); 628 629 mvm->rfkill_safe_init_done = false; 630 631 if (mvm->trans->trans_cfg->device_family == IWL_DEVICE_FAMILY_AX210) { 632 sb_cfg = iwl_read_umac_prph(mvm->trans, SB_MODIFY_CFG_FLAG); 633 /* if needed, we'll reset this on our way out later */ 634 mvm->fw_product_reset = sb_cfg == SB_CFG_RESIDES_IN_ROM; 635 if (mvm->fw_product_reset && iwl_mei_pldr_req()) 636 return -EBUSY; 637 } 638 639 iwl_init_notification_wait(&mvm->notif_wait, 640 &init_wait, 641 init_complete, 642 ARRAY_SIZE(init_complete), 643 iwl_wait_init_complete, 644 NULL); 645 646 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL); 647 648 /* Will also start the device */ 649 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR); 650 if (ret) { 651 IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret); 652 653 /* if we needed reset then fail here, but notify and remove */ 654 if (mvm->fw_product_reset) { 655 iwl_mei_alive_notif(false); 656 iwl_trans_pcie_reset(mvm->trans, 657 IWL_RESET_MODE_RESCAN); 658 } 659 660 goto error; 661 } 662 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE, 663 NULL); 664 665 /* Send init config command to mark that we are sending NVM access 666 * commands 667 */ 668 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(SYSTEM_GROUP, 669 INIT_EXTENDED_CFG_CMD), 670 CMD_SEND_IN_RFKILL, 671 sizeof(init_cfg), &init_cfg); 672 if (ret) { 673 IWL_ERR(mvm, "Failed to run init config command: %d\n", 674 ret); 675 goto error; 676 } 677 678 /* Load NVM to NIC if needed */ 679 if (mvm->nvm_file_name) { 680 ret = iwl_read_external_nvm(mvm->trans, mvm->nvm_file_name, 681 mvm->nvm_sections); 682 if (ret) 683 goto error; 684 ret = iwl_mvm_load_nvm_to_nic(mvm); 685 if (ret) 686 goto error; 687 } 688 689 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(REGULATORY_AND_NVM_GROUP, 690 NVM_ACCESS_COMPLETE), 691 CMD_SEND_IN_RFKILL, 692 sizeof(nvm_complete), &nvm_complete); 693 if (ret) { 694 IWL_ERR(mvm, "Failed to run complete NVM access: %d\n", 695 ret); 696 goto error; 697 } 698 699 ret = iwl_send_phy_cfg_cmd(mvm); 700 if (ret) { 701 IWL_ERR(mvm, "Failed to run PHY configuration: %d\n", 702 ret); 703 goto error; 704 } 705 706 /* We wait for the INIT complete notification */ 707 ret = iwl_wait_notification(&mvm->notif_wait, &init_wait, 708 MVM_UCODE_ALIVE_TIMEOUT); 709 if (ret) 710 return ret; 711 712 /* Read the NVM only at driver load time, no need to do this twice */ 713 if (!mvm->nvm_data) { 714 mvm->nvm_data = iwl_get_nvm(mvm->trans, mvm->fw, 715 mvm->set_tx_ant, mvm->set_rx_ant); 716 if (IS_ERR(mvm->nvm_data)) { 717 ret = PTR_ERR(mvm->nvm_data); 718 mvm->nvm_data = NULL; 719 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret); 720 return ret; 721 } 722 } 723 724 mvm->rfkill_safe_init_done = true; 725 726 return 0; 727 728 error: 729 iwl_remove_notification(&mvm->notif_wait, &init_wait); 730 return ret; 731 } 732 733 int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm) 734 { 735 struct iwl_notification_wait calib_wait; 736 static const u16 init_complete[] = { 737 INIT_COMPLETE_NOTIF, 738 CALIB_RES_NOTIF_PHY_DB 739 }; 740 int ret; 741 742 if (iwl_mvm_has_unified_ucode(mvm)) 743 return iwl_run_unified_mvm_ucode(mvm); 744 745 lockdep_assert_held(&mvm->mutex); 746 747 mvm->rfkill_safe_init_done = false; 748 749 iwl_init_notification_wait(&mvm->notif_wait, 750 &calib_wait, 751 init_complete, 752 ARRAY_SIZE(init_complete), 753 iwl_wait_phy_db_entry, 754 mvm->phy_db); 755 756 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL); 757 758 /* Will also start the device */ 759 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_INIT); 760 if (ret) { 761 IWL_ERR(mvm, "Failed to start INIT ucode: %d\n", ret); 762 goto remove_notif; 763 } 764 765 if (mvm->trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_8000) { 766 ret = iwl_mvm_send_bt_init_conf(mvm); 767 if (ret) 768 goto remove_notif; 769 } 770 771 /* Read the NVM only at driver load time, no need to do this twice */ 772 if (!mvm->nvm_data) { 773 ret = iwl_nvm_init(mvm); 774 if (ret) { 775 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret); 776 goto remove_notif; 777 } 778 } 779 780 /* In case we read the NVM from external file, load it to the NIC */ 781 if (mvm->nvm_file_name) { 782 ret = iwl_mvm_load_nvm_to_nic(mvm); 783 if (ret) 784 goto remove_notif; 785 } 786 787 WARN_ONCE(mvm->nvm_data->nvm_version < mvm->trans->cfg->nvm_ver, 788 "Too old NVM version (0x%0x, required = 0x%0x)", 789 mvm->nvm_data->nvm_version, mvm->trans->cfg->nvm_ver); 790 791 /* 792 * abort after reading the nvm in case RF Kill is on, we will complete 793 * the init seq later when RF kill will switch to off 794 */ 795 if (iwl_mvm_is_radio_hw_killed(mvm)) { 796 IWL_DEBUG_RF_KILL(mvm, 797 "jump over all phy activities due to RF kill\n"); 798 goto remove_notif; 799 } 800 801 mvm->rfkill_safe_init_done = true; 802 803 /* Send TX valid antennas before triggering calibrations */ 804 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); 805 if (ret) 806 goto remove_notif; 807 808 ret = iwl_send_phy_cfg_cmd(mvm); 809 if (ret) { 810 IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n", 811 ret); 812 goto remove_notif; 813 } 814 815 /* 816 * Some things may run in the background now, but we 817 * just wait for the calibration complete notification. 818 */ 819 ret = iwl_wait_notification(&mvm->notif_wait, &calib_wait, 820 MVM_UCODE_CALIB_TIMEOUT); 821 if (!ret) 822 goto out; 823 824 if (iwl_mvm_is_radio_hw_killed(mvm)) { 825 IWL_DEBUG_RF_KILL(mvm, "RFKILL while calibrating.\n"); 826 ret = 0; 827 } else { 828 IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n", 829 ret); 830 } 831 832 goto out; 833 834 remove_notif: 835 iwl_remove_notification(&mvm->notif_wait, &calib_wait); 836 out: 837 mvm->rfkill_safe_init_done = false; 838 if (!mvm->nvm_data) { 839 /* we want to debug INIT and we have no NVM - fake */ 840 mvm->nvm_data = kzalloc(sizeof(struct iwl_nvm_data) + 841 sizeof(struct ieee80211_channel) + 842 sizeof(struct ieee80211_rate), 843 GFP_KERNEL); 844 if (!mvm->nvm_data) 845 return -ENOMEM; 846 mvm->nvm_data->bands[0].channels = mvm->nvm_data->channels; 847 mvm->nvm_data->bands[0].n_channels = 1; 848 mvm->nvm_data->bands[0].n_bitrates = 1; 849 mvm->nvm_data->bands[0].bitrates = 850 (void *)(mvm->nvm_data->channels + 1); 851 mvm->nvm_data->bands[0].bitrates->hw_value = 10; 852 } 853 854 return ret; 855 } 856 857 static int iwl_mvm_config_ltr(struct iwl_mvm *mvm) 858 { 859 struct iwl_ltr_config_cmd cmd = { 860 .flags = cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE), 861 }; 862 863 if (!mvm->trans->ltr_enabled) 864 return 0; 865 866 return iwl_mvm_send_cmd_pdu(mvm, LTR_CONFIG, 0, 867 sizeof(cmd), &cmd); 868 } 869 870 int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a, int prof_b) 871 { 872 u32 cmd_id = REDUCE_TX_POWER_CMD; 873 struct iwl_dev_tx_power_cmd_v3_v8 cmd = { 874 .common.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_CHAINS), 875 }; 876 struct iwl_dev_tx_power_cmd cmd_v9_v10 = { 877 .common.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_CHAINS), 878 }; 879 __le16 *per_chain; 880 int ret; 881 u16 len = 0; 882 u32 n_subbands; 883 u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id, 3); 884 void *cmd_data = &cmd; 885 886 if (cmd_ver == 10) { 887 len = sizeof(cmd_v9_v10.v10); 888 n_subbands = IWL_NUM_SUB_BANDS_V2; 889 per_chain = &cmd_v9_v10.v10.per_chain[0][0][0]; 890 cmd_v9_v10.v10.flags = 891 cpu_to_le32(mvm->fwrt.reduced_power_flags); 892 } else if (cmd_ver == 9) { 893 len = sizeof(cmd_v9_v10.v9); 894 n_subbands = IWL_NUM_SUB_BANDS_V1; 895 per_chain = &cmd_v9_v10.v9.per_chain[0][0]; 896 } else if (cmd_ver >= 7) { 897 len = sizeof(cmd.v7); 898 n_subbands = IWL_NUM_SUB_BANDS_V2; 899 per_chain = cmd.v7.per_chain[0][0]; 900 cmd.v7.flags = cpu_to_le32(mvm->fwrt.reduced_power_flags); 901 if (cmd_ver == 8) 902 len = sizeof(cmd.v8); 903 } else if (cmd_ver == 6) { 904 len = sizeof(cmd.v6); 905 n_subbands = IWL_NUM_SUB_BANDS_V2; 906 per_chain = cmd.v6.per_chain[0][0]; 907 } else if (fw_has_api(&mvm->fw->ucode_capa, 908 IWL_UCODE_TLV_API_REDUCE_TX_POWER)) { 909 len = sizeof(cmd.v5); 910 n_subbands = IWL_NUM_SUB_BANDS_V1; 911 per_chain = cmd.v5.per_chain[0][0]; 912 } else if (fw_has_capa(&mvm->fw->ucode_capa, 913 IWL_UCODE_TLV_CAPA_TX_POWER_ACK)) { 914 len = sizeof(cmd.v4); 915 n_subbands = IWL_NUM_SUB_BANDS_V1; 916 per_chain = cmd.v4.per_chain[0][0]; 917 } else { 918 len = sizeof(cmd.v3); 919 n_subbands = IWL_NUM_SUB_BANDS_V1; 920 per_chain = cmd.v3.per_chain[0][0]; 921 } 922 923 /* all structs have the same common part, add its length */ 924 len += sizeof(cmd.common); 925 926 if (cmd_ver < 9) 927 len += sizeof(cmd.per_band); 928 else 929 cmd_data = &cmd_v9_v10; 930 931 ret = iwl_sar_fill_profile(&mvm->fwrt, per_chain, 932 IWL_NUM_CHAIN_TABLES, 933 n_subbands, prof_a, prof_b); 934 935 /* return on error or if the profile is disabled (positive number) */ 936 if (ret) 937 return ret; 938 939 iwl_mei_set_power_limit(per_chain); 940 941 IWL_DEBUG_RADIO(mvm, "Sending REDUCE_TX_POWER_CMD per chain\n"); 942 return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, len, cmd_data); 943 } 944 945 int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm) 946 { 947 union iwl_geo_tx_power_profiles_cmd geo_tx_cmd; 948 struct iwl_geo_tx_power_profiles_resp *resp; 949 u16 len; 950 int ret; 951 struct iwl_host_cmd cmd = { 952 .id = WIDE_ID(PHY_OPS_GROUP, PER_CHAIN_LIMIT_OFFSET_CMD), 953 .flags = CMD_WANT_SKB, 954 .data = { &geo_tx_cmd }, 955 }; 956 u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd.id, 957 IWL_FW_CMD_VER_UNKNOWN); 958 959 /* the ops field is at the same spot for all versions, so set in v1 */ 960 geo_tx_cmd.v1.ops = 961 cpu_to_le32(IWL_PER_CHAIN_OFFSET_GET_CURRENT_TABLE); 962 963 if (cmd_ver == 5) 964 len = sizeof(geo_tx_cmd.v5); 965 else if (cmd_ver == 4) 966 len = sizeof(geo_tx_cmd.v4); 967 else if (cmd_ver == 3) 968 len = sizeof(geo_tx_cmd.v3); 969 else if (fw_has_api(&mvm->fwrt.fw->ucode_capa, 970 IWL_UCODE_TLV_API_SAR_TABLE_VER)) 971 len = sizeof(geo_tx_cmd.v2); 972 else 973 len = sizeof(geo_tx_cmd.v1); 974 975 if (!iwl_sar_geo_support(&mvm->fwrt)) 976 return -EOPNOTSUPP; 977 978 cmd.len[0] = len; 979 980 ret = iwl_mvm_send_cmd(mvm, &cmd); 981 if (ret) { 982 IWL_ERR(mvm, "Failed to get geographic profile info %d\n", ret); 983 return ret; 984 } 985 986 resp = (void *)cmd.resp_pkt->data; 987 ret = le32_to_cpu(resp->profile_idx); 988 989 if (WARN_ON(ret > BIOS_GEO_MAX_PROFILE_NUM)) 990 ret = -EIO; 991 992 iwl_free_resp(&cmd); 993 return ret; 994 } 995 996 static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm) 997 { 998 u32 cmd_id = WIDE_ID(PHY_OPS_GROUP, PER_CHAIN_LIMIT_OFFSET_CMD); 999 union iwl_geo_tx_power_profiles_cmd cmd; 1000 u16 len; 1001 u32 n_bands; 1002 u32 n_profiles; 1003 __le32 sk = cpu_to_le32(0); 1004 int ret; 1005 u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id, 1006 IWL_FW_CMD_VER_UNKNOWN); 1007 1008 BUILD_BUG_ON(offsetof(struct iwl_geo_tx_power_profiles_cmd_v1, ops) != 1009 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, ops) || 1010 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, ops) != 1011 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, ops) || 1012 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, ops) != 1013 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, ops) || 1014 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, ops) != 1015 offsetof(struct iwl_geo_tx_power_profiles_cmd_v5, ops)); 1016 1017 /* the ops field is at the same spot for all versions, so set in v1 */ 1018 cmd.v1.ops = cpu_to_le32(IWL_PER_CHAIN_OFFSET_SET_TABLES); 1019 1020 /* Only set to South Korea if the table revision is 1 */ 1021 if (mvm->fwrt.geo_rev == 1) 1022 sk = cpu_to_le32(1); 1023 1024 if (cmd_ver == 5) { 1025 len = sizeof(cmd.v5); 1026 n_bands = ARRAY_SIZE(cmd.v5.table[0]); 1027 n_profiles = BIOS_GEO_MAX_PROFILE_NUM; 1028 cmd.v5.table_revision = sk; 1029 } else if (cmd_ver == 4) { 1030 len = sizeof(cmd.v4); 1031 n_bands = ARRAY_SIZE(cmd.v4.table[0]); 1032 n_profiles = BIOS_GEO_MAX_PROFILE_NUM; 1033 cmd.v4.table_revision = sk; 1034 } else if (cmd_ver == 3) { 1035 len = sizeof(cmd.v3); 1036 n_bands = ARRAY_SIZE(cmd.v3.table[0]); 1037 n_profiles = BIOS_GEO_MIN_PROFILE_NUM; 1038 cmd.v3.table_revision = sk; 1039 } else if (fw_has_api(&mvm->fwrt.fw->ucode_capa, 1040 IWL_UCODE_TLV_API_SAR_TABLE_VER)) { 1041 len = sizeof(cmd.v2); 1042 n_bands = ARRAY_SIZE(cmd.v2.table[0]); 1043 n_profiles = BIOS_GEO_MIN_PROFILE_NUM; 1044 cmd.v2.table_revision = sk; 1045 } else { 1046 len = sizeof(cmd.v1); 1047 n_bands = ARRAY_SIZE(cmd.v1.table[0]); 1048 n_profiles = BIOS_GEO_MIN_PROFILE_NUM; 1049 } 1050 1051 BUILD_BUG_ON(offsetof(struct iwl_geo_tx_power_profiles_cmd_v1, table) != 1052 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, table) || 1053 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, table) != 1054 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, table) || 1055 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, table) != 1056 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, table) || 1057 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, table) != 1058 offsetof(struct iwl_geo_tx_power_profiles_cmd_v5, table)); 1059 /* the table is at the same position for all versions, so set use v1 */ 1060 ret = iwl_sar_geo_fill_table(&mvm->fwrt, &cmd.v1.table[0][0], 1061 n_bands, n_profiles); 1062 1063 /* 1064 * It is a valid scenario to not support SAR, or miss wgds table, 1065 * but in that case there is no need to send the command. 1066 */ 1067 if (ret) 1068 return 0; 1069 1070 return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, len, &cmd); 1071 } 1072 1073 int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm) 1074 { 1075 union iwl_ppag_table_cmd cmd; 1076 int ret, cmd_size; 1077 1078 ret = iwl_fill_ppag_table(&mvm->fwrt, &cmd, &cmd_size); 1079 /* Not supporting PPAG table is a valid scenario */ 1080 if (ret < 0) 1081 return 0; 1082 1083 IWL_DEBUG_RADIO(mvm, "Sending PER_PLATFORM_ANT_GAIN_CMD\n"); 1084 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(PHY_OPS_GROUP, 1085 PER_PLATFORM_ANT_GAIN_CMD), 1086 0, cmd_size, &cmd); 1087 if (ret < 0) 1088 IWL_ERR(mvm, "failed to send PER_PLATFORM_ANT_GAIN_CMD (%d)\n", 1089 ret); 1090 1091 return ret; 1092 } 1093 1094 static int iwl_mvm_ppag_init(struct iwl_mvm *mvm) 1095 { 1096 /* no need to read the table, done in INIT stage */ 1097 if (!(iwl_is_ppag_approved(&mvm->fwrt))) 1098 return 0; 1099 1100 return iwl_mvm_ppag_send_cmd(mvm); 1101 } 1102 1103 static void iwl_mvm_tas_init(struct iwl_mvm *mvm) 1104 { 1105 u32 cmd_id = WIDE_ID(REGULATORY_AND_NVM_GROUP, TAS_CONFIG); 1106 int fw_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id, 1107 IWL_FW_CMD_VER_UNKNOWN); 1108 struct iwl_tas_selection_data selection_data = {}; 1109 struct iwl_tas_config_cmd_v2_v4 cmd_v2_v4 = {}; 1110 struct iwl_tas_config_cmd cmd_v5 = {}; 1111 struct iwl_tas_data data = {}; 1112 void *cmd_data = &cmd_v2_v4; 1113 int cmd_size; 1114 int ret; 1115 1116 BUILD_BUG_ON(ARRAY_SIZE(data.block_list_array) != 1117 IWL_WTAS_BLACK_LIST_MAX); 1118 BUILD_BUG_ON(ARRAY_SIZE(cmd_v2_v4.common.block_list_array) != 1119 IWL_WTAS_BLACK_LIST_MAX); 1120 BUILD_BUG_ON(ARRAY_SIZE(cmd_v5.block_list_array) != 1121 IWL_WTAS_BLACK_LIST_MAX); 1122 1123 if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_TAS_CFG)) { 1124 IWL_DEBUG_RADIO(mvm, "TAS not enabled in FW\n"); 1125 return; 1126 } 1127 1128 ret = iwl_bios_get_tas_table(&mvm->fwrt, &data); 1129 if (ret < 0) { 1130 IWL_DEBUG_RADIO(mvm, 1131 "TAS table invalid or unavailable. (%d)\n", 1132 ret); 1133 return; 1134 } 1135 1136 if (ret == 0 && fw_ver < 5) 1137 return; 1138 1139 if (!iwl_is_tas_approved()) { 1140 IWL_DEBUG_RADIO(mvm, 1141 "System vendor '%s' is not in the approved list, disabling TAS in US and Canada.\n", 1142 dmi_get_system_info(DMI_SYS_VENDOR) ?: "<unknown>"); 1143 if ((!iwl_add_mcc_to_tas_block_list(data.block_list_array, 1144 &data.block_list_size, 1145 IWL_MCC_US)) || 1146 (!iwl_add_mcc_to_tas_block_list(data.block_list_array, 1147 &data.block_list_size, 1148 IWL_MCC_CANADA))) { 1149 IWL_DEBUG_RADIO(mvm, 1150 "Unable to add US/Canada to TAS block list, disabling TAS\n"); 1151 return; 1152 } 1153 } else { 1154 IWL_DEBUG_RADIO(mvm, 1155 "System vendor '%s' is in the approved list.\n", 1156 dmi_get_system_info(DMI_SYS_VENDOR) ?: "<unknown>"); 1157 } 1158 1159 if (fw_ver < 5) { 1160 selection_data = iwl_parse_tas_selection(data.tas_selection, 1161 data.table_revision); 1162 cmd_v2_v4.common.block_list_size = 1163 cpu_to_le32(data.block_list_size); 1164 for (u8 i = 0; i < data.block_list_size; i++) 1165 cmd_v2_v4.common.block_list_array[i] = 1166 cpu_to_le32(data.block_list_array[i]); 1167 } 1168 1169 if (fw_ver == 5) { 1170 cmd_size = sizeof(cmd_v5); 1171 cmd_data = &cmd_v5; 1172 cmd_v5.block_list_size = cpu_to_le16(data.block_list_size); 1173 for (u16 i = 0; i < data.block_list_size; i++) 1174 cmd_v5.block_list_array[i] = 1175 cpu_to_le16(data.block_list_array[i]); 1176 cmd_v5.tas_config_info.table_source = data.table_source; 1177 cmd_v5.tas_config_info.table_revision = data.table_revision; 1178 cmd_v5.tas_config_info.value = cpu_to_le32(data.tas_selection); 1179 } else if (fw_ver == 4) { 1180 cmd_size = sizeof(cmd_v2_v4.common) + sizeof(cmd_v2_v4.v4); 1181 cmd_v2_v4.v4.override_tas_iec = selection_data.override_tas_iec; 1182 cmd_v2_v4.v4.enable_tas_iec = selection_data.enable_tas_iec; 1183 cmd_v2_v4.v4.usa_tas_uhb_allowed = 1184 selection_data.usa_tas_uhb_allowed; 1185 if (fw_has_capa(&mvm->fw->ucode_capa, 1186 IWL_UCODE_TLV_CAPA_UHB_CANADA_TAS_SUPPORT) && 1187 selection_data.canada_tas_uhb_allowed) 1188 cmd_v2_v4.v4.uhb_allowed_flags = TAS_UHB_ALLOWED_CANADA; 1189 } else if (fw_ver == 3) { 1190 cmd_size = sizeof(cmd_v2_v4.common) + sizeof(cmd_v2_v4.v3); 1191 cmd_v2_v4.v3.override_tas_iec = 1192 cpu_to_le16(selection_data.override_tas_iec); 1193 cmd_v2_v4.v3.enable_tas_iec = 1194 cpu_to_le16(selection_data.enable_tas_iec); 1195 } else if (fw_ver == 2) { 1196 cmd_size = sizeof(cmd_v2_v4.common); 1197 } else { 1198 return; 1199 } 1200 1201 ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, cmd_size, cmd_data); 1202 if (ret < 0) 1203 IWL_DEBUG_RADIO(mvm, "failed to send TAS_CONFIG (%d)\n", ret); 1204 } 1205 1206 static void iwl_mvm_lari_cfg(struct iwl_mvm *mvm) 1207 { 1208 struct iwl_lari_config_change_cmd cmd; 1209 size_t cmd_size; 1210 int ret; 1211 1212 ret = iwl_fill_lari_config(&mvm->fwrt, &cmd, &cmd_size); 1213 if (!ret) { 1214 ret = iwl_mvm_send_cmd_pdu(mvm, 1215 WIDE_ID(REGULATORY_AND_NVM_GROUP, 1216 LARI_CONFIG_CHANGE), 1217 0, cmd_size, &cmd); 1218 if (ret < 0) 1219 IWL_DEBUG_RADIO(mvm, 1220 "Failed to send LARI_CONFIG_CHANGE (%d)\n", 1221 ret); 1222 } 1223 } 1224 1225 void iwl_mvm_get_bios_tables(struct iwl_mvm *mvm) 1226 { 1227 int ret; 1228 1229 iwl_acpi_get_guid_lock_status(&mvm->fwrt); 1230 1231 /* read PPAG table */ 1232 ret = iwl_bios_get_ppag_table(&mvm->fwrt); 1233 if (ret < 0) { 1234 IWL_DEBUG_RADIO(mvm, 1235 "PPAG BIOS table invalid or unavailable. (%d)\n", 1236 ret); 1237 } 1238 1239 /* read SAR tables */ 1240 ret = iwl_bios_get_wrds_table(&mvm->fwrt); 1241 if (ret < 0) { 1242 IWL_DEBUG_RADIO(mvm, 1243 "WRDS SAR BIOS table invalid or unavailable. (%d)\n", 1244 ret); 1245 /* 1246 * If not available, don't fail and don't bother with EWRD and 1247 * WGDS */ 1248 1249 if (!iwl_bios_get_wgds_table(&mvm->fwrt)) { 1250 /* 1251 * If basic SAR is not available, we check for WGDS, 1252 * which should *not* be available either. If it is 1253 * available, issue an error, because we can't use SAR 1254 * Geo without basic SAR. 1255 */ 1256 IWL_ERR(mvm, "BIOS contains WGDS but no WRDS\n"); 1257 } 1258 1259 } else { 1260 ret = iwl_bios_get_ewrd_table(&mvm->fwrt); 1261 /* if EWRD is not available, we can still use 1262 * WRDS, so don't fail */ 1263 if (ret < 0) 1264 IWL_DEBUG_RADIO(mvm, 1265 "EWRD SAR BIOS table invalid or unavailable. (%d)\n", 1266 ret); 1267 1268 /* read geo SAR table */ 1269 if (iwl_sar_geo_support(&mvm->fwrt)) { 1270 ret = iwl_bios_get_wgds_table(&mvm->fwrt); 1271 if (ret < 0) 1272 IWL_DEBUG_RADIO(mvm, 1273 "Geo SAR BIOS table invalid or unavailable. (%d)\n", 1274 ret); 1275 /* we don't fail if the table is not available */ 1276 } 1277 } 1278 1279 iwl_acpi_get_phy_filters(&mvm->fwrt); 1280 1281 if (iwl_bios_get_eckv(&mvm->fwrt, &mvm->ext_clock_valid)) 1282 IWL_DEBUG_RADIO(mvm, "ECKV table doesn't exist in BIOS\n"); 1283 } 1284 1285 static void iwl_mvm_disconnect_iterator(void *data, u8 *mac, 1286 struct ieee80211_vif *vif) 1287 { 1288 if (vif->type == NL80211_IFTYPE_STATION) 1289 ieee80211_hw_restart_disconnect(vif); 1290 } 1291 1292 void iwl_mvm_send_recovery_cmd(struct iwl_mvm *mvm, u32 flags) 1293 { 1294 u32 error_log_size = mvm->fw->ucode_capa.error_log_size; 1295 u32 status = 0; 1296 int ret; 1297 1298 struct iwl_fw_error_recovery_cmd recovery_cmd = { 1299 .flags = cpu_to_le32(flags), 1300 .buf_size = 0, 1301 }; 1302 struct iwl_host_cmd host_cmd = { 1303 .id = WIDE_ID(SYSTEM_GROUP, FW_ERROR_RECOVERY_CMD), 1304 .data = {&recovery_cmd, }, 1305 .len = {sizeof(recovery_cmd), }, 1306 }; 1307 1308 /* no error log was defined in TLV */ 1309 if (!error_log_size) 1310 return; 1311 1312 if (flags & ERROR_RECOVERY_UPDATE_DB) { 1313 /* no buf was allocated while HW reset */ 1314 if (!mvm->error_recovery_buf) 1315 return; 1316 1317 host_cmd.data[1] = mvm->error_recovery_buf; 1318 host_cmd.len[1] = error_log_size; 1319 host_cmd.dataflags[1] = IWL_HCMD_DFL_NOCOPY; 1320 recovery_cmd.buf_size = cpu_to_le32(error_log_size); 1321 } 1322 1323 ret = iwl_mvm_send_cmd_status(mvm, &host_cmd, &status); 1324 kfree(mvm->error_recovery_buf); 1325 mvm->error_recovery_buf = NULL; 1326 1327 if (ret) { 1328 IWL_ERR(mvm, "Failed to send recovery cmd %d\n", ret); 1329 return; 1330 } 1331 1332 /* skb respond is only relevant in ERROR_RECOVERY_UPDATE_DB */ 1333 if (flags & ERROR_RECOVERY_UPDATE_DB) { 1334 if (status) { 1335 IWL_ERR(mvm, 1336 "Failed to send recovery cmd blob was invalid %d\n", 1337 status); 1338 1339 ieee80211_iterate_interfaces(mvm->hw, 0, 1340 iwl_mvm_disconnect_iterator, 1341 mvm); 1342 } 1343 } 1344 } 1345 1346 static int iwl_mvm_sar_init(struct iwl_mvm *mvm) 1347 { 1348 return iwl_mvm_sar_select_profile(mvm, 1, 1); 1349 } 1350 1351 static int iwl_mvm_load_rt_fw(struct iwl_mvm *mvm) 1352 { 1353 int ret; 1354 1355 if (iwl_mvm_has_unified_ucode(mvm)) 1356 return iwl_run_unified_mvm_ucode(mvm); 1357 1358 ret = iwl_run_init_mvm_ucode(mvm); 1359 1360 if (ret) { 1361 IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", ret); 1362 return ret; 1363 } 1364 1365 iwl_fw_dbg_stop_sync(&mvm->fwrt); 1366 iwl_trans_stop_device(mvm->trans); 1367 ret = iwl_trans_start_hw(mvm->trans); 1368 if (ret) 1369 return ret; 1370 1371 mvm->rfkill_safe_init_done = false; 1372 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR); 1373 if (ret) 1374 return ret; 1375 1376 mvm->rfkill_safe_init_done = true; 1377 1378 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE, 1379 NULL); 1380 1381 return iwl_init_paging(&mvm->fwrt, mvm->fwrt.cur_fw_img); 1382 } 1383 1384 int iwl_mvm_up(struct iwl_mvm *mvm) 1385 { 1386 int ret, i; 1387 struct ieee80211_supported_band *sband = NULL; 1388 1389 lockdep_assert_wiphy(mvm->hw->wiphy); 1390 lockdep_assert_held(&mvm->mutex); 1391 1392 ret = iwl_trans_start_hw(mvm->trans); 1393 if (ret) 1394 return ret; 1395 1396 ret = iwl_mvm_load_rt_fw(mvm); 1397 if (ret) { 1398 IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret); 1399 if (ret != -ERFKILL && !mvm->fw_product_reset) 1400 iwl_fw_dbg_error_collect(&mvm->fwrt, 1401 FW_DBG_TRIGGER_DRIVER); 1402 goto error; 1403 } 1404 1405 /* FW loaded successfully */ 1406 mvm->fw_product_reset = false; 1407 1408 iwl_fw_disable_dbg_asserts(&mvm->fwrt); 1409 iwl_get_shared_mem_conf(&mvm->fwrt); 1410 1411 ret = iwl_mvm_sf_update(mvm, NULL, false); 1412 if (ret) 1413 IWL_ERR(mvm, "Failed to initialize Smart Fifo\n"); 1414 1415 if (!iwl_trans_dbg_ini_valid(mvm->trans)) { 1416 mvm->fwrt.dump.conf = FW_DBG_INVALID; 1417 /* if we have a destination, assume EARLY START */ 1418 if (mvm->fw->dbg.dest_tlv) 1419 mvm->fwrt.dump.conf = FW_DBG_START_FROM_ALIVE; 1420 iwl_fw_start_dbg_conf(&mvm->fwrt, FW_DBG_START_FROM_ALIVE); 1421 } 1422 1423 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); 1424 if (ret) 1425 goto error; 1426 1427 if (!iwl_mvm_has_unified_ucode(mvm)) { 1428 /* Send phy db control command and then phy db calibration */ 1429 ret = iwl_send_phy_db_data(mvm->phy_db); 1430 if (ret) 1431 goto error; 1432 ret = iwl_send_phy_cfg_cmd(mvm); 1433 if (ret) 1434 goto error; 1435 } 1436 1437 ret = iwl_mvm_send_bt_init_conf(mvm); 1438 if (ret) 1439 goto error; 1440 1441 if (fw_has_capa(&mvm->fw->ucode_capa, 1442 IWL_UCODE_TLV_CAPA_SOC_LATENCY_SUPPORT)) { 1443 ret = iwl_set_soc_latency(&mvm->fwrt); 1444 if (ret) 1445 goto error; 1446 } 1447 1448 iwl_mvm_lari_cfg(mvm); 1449 1450 /* Init RSS configuration */ 1451 ret = iwl_configure_rxq(&mvm->fwrt); 1452 if (ret) 1453 goto error; 1454 1455 if (iwl_mvm_has_new_rx_api(mvm)) { 1456 ret = iwl_send_rss_cfg_cmd(mvm); 1457 if (ret) { 1458 IWL_ERR(mvm, "Failed to configure RSS queues: %d\n", 1459 ret); 1460 goto error; 1461 } 1462 } 1463 1464 /* init the fw <-> mac80211 STA mapping */ 1465 for (i = 0; i < mvm->fw->ucode_capa.num_stations; i++) { 1466 RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL); 1467 RCU_INIT_POINTER(mvm->fw_id_to_link_sta[i], NULL); 1468 } 1469 1470 for (i = 0; i < IWL_FW_MAX_LINK_ID + 1; i++) 1471 RCU_INIT_POINTER(mvm->link_id_to_link_conf[i], NULL); 1472 1473 mvm->tdls_cs.peer.sta_id = IWL_INVALID_STA; 1474 1475 /* reset quota debouncing buffer - 0xff will yield invalid data */ 1476 memset(&mvm->last_quota_cmd, 0xff, sizeof(mvm->last_quota_cmd)); 1477 1478 if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_DQA_SUPPORT)) { 1479 ret = iwl_mvm_send_dqa_cmd(mvm); 1480 if (ret) 1481 goto error; 1482 } 1483 1484 /* 1485 * Add auxiliary station for scanning. 1486 * Newer versions of this command implies that the fw uses 1487 * internal aux station for all aux activities that don't 1488 * requires a dedicated data queue. 1489 */ 1490 if (!iwl_mvm_has_new_station_api(mvm->fw)) { 1491 /* 1492 * In old version the aux station uses mac id like other 1493 * station and not lmac id 1494 */ 1495 ret = iwl_mvm_add_aux_sta(mvm, MAC_INDEX_AUX); 1496 if (ret) 1497 goto error; 1498 } 1499 1500 /* Add all the PHY contexts */ 1501 i = 0; 1502 while (!sband && i < NUM_NL80211_BANDS) 1503 sband = mvm->hw->wiphy->bands[i++]; 1504 1505 if (WARN_ON_ONCE(!sband)) { 1506 ret = -ENODEV; 1507 goto error; 1508 } 1509 1510 if (iwl_mvm_is_tt_in_fw(mvm)) { 1511 /* in order to give the responsibility of ct-kill and 1512 * TX backoff to FW we need to send empty temperature reporting 1513 * cmd during init time 1514 */ 1515 iwl_mvm_send_temp_report_ths_cmd(mvm); 1516 } else { 1517 /* Initialize tx backoffs to the minimal possible */ 1518 iwl_mvm_tt_tx_backoff(mvm, 0); 1519 } 1520 1521 #ifdef CONFIG_THERMAL 1522 /* TODO: read the budget from BIOS / Platform NVM */ 1523 1524 /* 1525 * In case there is no budget from BIOS / Platform NVM the default 1526 * budget should be 2000mW (cooling state 0). 1527 */ 1528 if (iwl_mvm_is_ctdp_supported(mvm)) { 1529 ret = iwl_mvm_ctdp_command(mvm, CTDP_CMD_OPERATION_START, 1530 mvm->cooling_dev.cur_state); 1531 if (ret) 1532 goto error; 1533 } 1534 #endif 1535 1536 if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_SET_LTR_GEN2)) 1537 WARN_ON(iwl_mvm_config_ltr(mvm)); 1538 1539 ret = iwl_mvm_power_update_device(mvm); 1540 if (ret) 1541 goto error; 1542 1543 /* 1544 * RTNL is not taken during Ct-kill, but we don't need to scan/Tx 1545 * anyway, so don't init MCC. 1546 */ 1547 if (!test_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status)) { 1548 ret = iwl_mvm_init_mcc(mvm); 1549 if (ret) 1550 goto error; 1551 } 1552 1553 if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_UMAC_SCAN)) { 1554 mvm->scan_type = IWL_SCAN_TYPE_NOT_SET; 1555 mvm->hb_scan_type = IWL_SCAN_TYPE_NOT_SET; 1556 ret = iwl_mvm_config_scan(mvm); 1557 if (ret) 1558 goto error; 1559 } 1560 1561 if (test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status)) { 1562 iwl_mvm_send_recovery_cmd(mvm, ERROR_RECOVERY_UPDATE_DB); 1563 1564 if (mvm->time_sync.active) 1565 iwl_mvm_time_sync_config(mvm, mvm->time_sync.peer_addr, 1566 IWL_TIME_SYNC_PROTOCOL_TM | 1567 IWL_TIME_SYNC_PROTOCOL_FTM); 1568 } 1569 1570 if (!mvm->ptp_data.ptp_clock) 1571 iwl_mvm_ptp_init(mvm); 1572 1573 ret = iwl_mvm_ppag_init(mvm); 1574 if (ret) 1575 goto error; 1576 1577 ret = iwl_mvm_sar_init(mvm); 1578 if (ret == 0) 1579 ret = iwl_mvm_sar_geo_init(mvm); 1580 if (ret < 0) 1581 goto error; 1582 1583 ret = iwl_mvm_sgom_init(mvm); 1584 if (ret) 1585 goto error; 1586 1587 iwl_mvm_tas_init(mvm); 1588 iwl_mvm_leds_sync(mvm); 1589 iwl_mvm_uats_init(mvm); 1590 1591 if (iwl_rfi_supported(mvm)) { 1592 if (iwl_rfi_is_enabled_in_bios(&mvm->fwrt)) 1593 iwl_rfi_send_config_cmd(mvm, NULL); 1594 } 1595 1596 iwl_mvm_mei_device_state(mvm, true); 1597 1598 IWL_DEBUG_INFO(mvm, "RT uCode started.\n"); 1599 return 0; 1600 error: 1601 iwl_mvm_stop_device(mvm); 1602 return ret; 1603 } 1604 1605 int iwl_mvm_load_d3_fw(struct iwl_mvm *mvm) 1606 { 1607 int ret, i; 1608 1609 lockdep_assert_wiphy(mvm->hw->wiphy); 1610 lockdep_assert_held(&mvm->mutex); 1611 1612 ret = iwl_trans_start_hw(mvm->trans); 1613 if (ret) 1614 return ret; 1615 1616 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_WOWLAN); 1617 if (ret) { 1618 IWL_ERR(mvm, "Failed to start WoWLAN firmware: %d\n", ret); 1619 goto error; 1620 } 1621 1622 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); 1623 if (ret) 1624 goto error; 1625 1626 /* Send phy db control command and then phy db calibration*/ 1627 ret = iwl_send_phy_db_data(mvm->phy_db); 1628 if (ret) 1629 goto error; 1630 1631 ret = iwl_send_phy_cfg_cmd(mvm); 1632 if (ret) 1633 goto error; 1634 1635 /* init the fw <-> mac80211 STA mapping */ 1636 for (i = 0; i < mvm->fw->ucode_capa.num_stations; i++) { 1637 RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL); 1638 RCU_INIT_POINTER(mvm->fw_id_to_link_sta[i], NULL); 1639 } 1640 1641 if (!iwl_mvm_has_new_station_api(mvm->fw)) { 1642 /* 1643 * Add auxiliary station for scanning. 1644 * Newer versions of this command implies that the fw uses 1645 * internal aux station for all aux activities that don't 1646 * requires a dedicated data queue. 1647 * In old version the aux station uses mac id like other 1648 * station and not lmac id 1649 */ 1650 ret = iwl_mvm_add_aux_sta(mvm, MAC_INDEX_AUX); 1651 if (ret) 1652 goto error; 1653 } 1654 1655 return 0; 1656 error: 1657 iwl_mvm_stop_device(mvm); 1658 return ret; 1659 } 1660 1661 void iwl_mvm_rx_mfuart_notif(struct iwl_mvm *mvm, 1662 struct iwl_rx_cmd_buffer *rxb) 1663 { 1664 struct iwl_rx_packet *pkt = rxb_addr(rxb); 1665 struct iwl_mfuart_load_notif *mfuart_notif = (void *)pkt->data; 1666 1667 IWL_DEBUG_INFO(mvm, 1668 "MFUART: installed ver: 0x%08x, external ver: 0x%08x, status: 0x%08x, duration: 0x%08x\n", 1669 le32_to_cpu(mfuart_notif->installed_ver), 1670 le32_to_cpu(mfuart_notif->external_ver), 1671 le32_to_cpu(mfuart_notif->status), 1672 le32_to_cpu(mfuart_notif->duration)); 1673 1674 if (iwl_rx_packet_payload_len(pkt) == sizeof(*mfuart_notif)) 1675 IWL_DEBUG_INFO(mvm, 1676 "MFUART: image size: 0x%08x\n", 1677 le32_to_cpu(mfuart_notif->image_size)); 1678 } 1679