1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause 2 /* 3 * Copyright (C) 2012-2014, 2018-2023 Intel Corporation 4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH 5 * Copyright (C) 2016-2017 Intel Deutschland GmbH 6 */ 7 #include <net/mac80211.h> 8 #include <linux/netdevice.h> 9 #include <linux/dmi.h> 10 11 #include "iwl-trans.h" 12 #include "iwl-op-mode.h" 13 #include "fw/img.h" 14 #include "iwl-debug.h" 15 #include "iwl-prph.h" 16 #include "fw/acpi.h" 17 #include "fw/pnvm.h" 18 19 #include "mvm.h" 20 #include "fw/dbg.h" 21 #include "iwl-phy-db.h" 22 #include "iwl-modparams.h" 23 #include "iwl-nvm-parse.h" 24 #include "time-sync.h" 25 26 #define MVM_UCODE_ALIVE_TIMEOUT (HZ) 27 #define MVM_UCODE_CALIB_TIMEOUT (2 * HZ) 28 29 #define IWL_TAS_US_MCC 0x5553 30 #define IWL_TAS_CANADA_MCC 0x4341 31 32 struct iwl_mvm_alive_data { 33 bool valid; 34 u32 scd_base_addr; 35 }; 36 37 static int iwl_send_tx_ant_cfg(struct iwl_mvm *mvm, u8 valid_tx_ant) 38 { 39 struct iwl_tx_ant_cfg_cmd tx_ant_cmd = { 40 .valid = cpu_to_le32(valid_tx_ant), 41 }; 42 43 IWL_DEBUG_FW(mvm, "select valid tx ant: %u\n", valid_tx_ant); 44 return iwl_mvm_send_cmd_pdu(mvm, TX_ANT_CONFIGURATION_CMD, 0, 45 sizeof(tx_ant_cmd), &tx_ant_cmd); 46 } 47 48 static int iwl_send_rss_cfg_cmd(struct iwl_mvm *mvm) 49 { 50 int i; 51 struct iwl_rss_config_cmd cmd = { 52 .flags = cpu_to_le32(IWL_RSS_ENABLE), 53 .hash_mask = BIT(IWL_RSS_HASH_TYPE_IPV4_TCP) | 54 BIT(IWL_RSS_HASH_TYPE_IPV4_UDP) | 55 BIT(IWL_RSS_HASH_TYPE_IPV4_PAYLOAD) | 56 BIT(IWL_RSS_HASH_TYPE_IPV6_TCP) | 57 BIT(IWL_RSS_HASH_TYPE_IPV6_UDP) | 58 BIT(IWL_RSS_HASH_TYPE_IPV6_PAYLOAD), 59 }; 60 61 if (mvm->trans->num_rx_queues == 1) 62 return 0; 63 64 /* Do not direct RSS traffic to Q 0 which is our fallback queue */ 65 for (i = 0; i < ARRAY_SIZE(cmd.indirection_table); i++) 66 cmd.indirection_table[i] = 67 1 + (i % (mvm->trans->num_rx_queues - 1)); 68 netdev_rss_key_fill(cmd.secret_key, sizeof(cmd.secret_key)); 69 70 return iwl_mvm_send_cmd_pdu(mvm, RSS_CONFIG_CMD, 0, sizeof(cmd), &cmd); 71 } 72 73 static int iwl_mvm_send_dqa_cmd(struct iwl_mvm *mvm) 74 { 75 struct iwl_dqa_enable_cmd dqa_cmd = { 76 .cmd_queue = cpu_to_le32(IWL_MVM_DQA_CMD_QUEUE), 77 }; 78 u32 cmd_id = WIDE_ID(DATA_PATH_GROUP, DQA_ENABLE_CMD); 79 int ret; 80 81 ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, sizeof(dqa_cmd), &dqa_cmd); 82 if (ret) 83 IWL_ERR(mvm, "Failed to send DQA enabling command: %d\n", ret); 84 else 85 IWL_DEBUG_FW(mvm, "Working in DQA mode\n"); 86 87 return ret; 88 } 89 90 void iwl_mvm_mfu_assert_dump_notif(struct iwl_mvm *mvm, 91 struct iwl_rx_cmd_buffer *rxb) 92 { 93 struct iwl_rx_packet *pkt = rxb_addr(rxb); 94 struct iwl_mfu_assert_dump_notif *mfu_dump_notif = (void *)pkt->data; 95 __le32 *dump_data = mfu_dump_notif->data; 96 int n_words = le32_to_cpu(mfu_dump_notif->data_size) / sizeof(__le32); 97 int i; 98 99 if (mfu_dump_notif->index_num == 0) 100 IWL_INFO(mvm, "MFUART assert id 0x%x occurred\n", 101 le32_to_cpu(mfu_dump_notif->assert_id)); 102 103 for (i = 0; i < n_words; i++) 104 IWL_DEBUG_INFO(mvm, 105 "MFUART assert dump, dword %u: 0x%08x\n", 106 le16_to_cpu(mfu_dump_notif->index_num) * 107 n_words + i, 108 le32_to_cpu(dump_data[i])); 109 } 110 111 static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait, 112 struct iwl_rx_packet *pkt, void *data) 113 { 114 unsigned int pkt_len = iwl_rx_packet_payload_len(pkt); 115 struct iwl_mvm *mvm = 116 container_of(notif_wait, struct iwl_mvm, notif_wait); 117 struct iwl_mvm_alive_data *alive_data = data; 118 struct iwl_umac_alive *umac; 119 struct iwl_lmac_alive *lmac1; 120 struct iwl_lmac_alive *lmac2 = NULL; 121 u16 status; 122 u32 lmac_error_event_table, umac_error_table; 123 u32 version = iwl_fw_lookup_notif_ver(mvm->fw, LEGACY_GROUP, 124 UCODE_ALIVE_NTFY, 0); 125 u32 i; 126 127 128 if (version == 6) { 129 struct iwl_alive_ntf_v6 *palive; 130 131 if (pkt_len < sizeof(*palive)) 132 return false; 133 134 palive = (void *)pkt->data; 135 mvm->trans->dbg.imr_data.imr_enable = 136 le32_to_cpu(palive->imr.enabled); 137 mvm->trans->dbg.imr_data.imr_size = 138 le32_to_cpu(palive->imr.size); 139 mvm->trans->dbg.imr_data.imr2sram_remainbyte = 140 mvm->trans->dbg.imr_data.imr_size; 141 mvm->trans->dbg.imr_data.imr_base_addr = 142 palive->imr.base_addr; 143 mvm->trans->dbg.imr_data.imr_curr_addr = 144 le64_to_cpu(mvm->trans->dbg.imr_data.imr_base_addr); 145 IWL_DEBUG_FW(mvm, "IMR Enabled: 0x0%x size 0x0%x Address 0x%016llx\n", 146 mvm->trans->dbg.imr_data.imr_enable, 147 mvm->trans->dbg.imr_data.imr_size, 148 le64_to_cpu(mvm->trans->dbg.imr_data.imr_base_addr)); 149 150 if (!mvm->trans->dbg.imr_data.imr_enable) { 151 for (i = 0; i < ARRAY_SIZE(mvm->trans->dbg.active_regions); i++) { 152 struct iwl_ucode_tlv *reg_tlv; 153 struct iwl_fw_ini_region_tlv *reg; 154 155 reg_tlv = mvm->trans->dbg.active_regions[i]; 156 if (!reg_tlv) 157 continue; 158 159 reg = (void *)reg_tlv->data; 160 /* 161 * We have only one DRAM IMR region, so we 162 * can break as soon as we find the first 163 * one. 164 */ 165 if (reg->type == IWL_FW_INI_REGION_DRAM_IMR) { 166 mvm->trans->dbg.unsupported_region_msk |= BIT(i); 167 break; 168 } 169 } 170 } 171 } 172 173 if (version >= 5) { 174 struct iwl_alive_ntf_v5 *palive; 175 176 if (pkt_len < sizeof(*palive)) 177 return false; 178 179 palive = (void *)pkt->data; 180 umac = &palive->umac_data; 181 lmac1 = &palive->lmac_data[0]; 182 lmac2 = &palive->lmac_data[1]; 183 status = le16_to_cpu(palive->status); 184 185 mvm->trans->sku_id[0] = le32_to_cpu(palive->sku_id.data[0]); 186 mvm->trans->sku_id[1] = le32_to_cpu(palive->sku_id.data[1]); 187 mvm->trans->sku_id[2] = le32_to_cpu(palive->sku_id.data[2]); 188 189 IWL_DEBUG_FW(mvm, "Got sku_id: 0x0%x 0x0%x 0x0%x\n", 190 mvm->trans->sku_id[0], 191 mvm->trans->sku_id[1], 192 mvm->trans->sku_id[2]); 193 } else if (iwl_rx_packet_payload_len(pkt) == sizeof(struct iwl_alive_ntf_v4)) { 194 struct iwl_alive_ntf_v4 *palive; 195 196 if (pkt_len < sizeof(*palive)) 197 return false; 198 199 palive = (void *)pkt->data; 200 umac = &palive->umac_data; 201 lmac1 = &palive->lmac_data[0]; 202 lmac2 = &palive->lmac_data[1]; 203 status = le16_to_cpu(palive->status); 204 } else if (iwl_rx_packet_payload_len(pkt) == 205 sizeof(struct iwl_alive_ntf_v3)) { 206 struct iwl_alive_ntf_v3 *palive3; 207 208 if (pkt_len < sizeof(*palive3)) 209 return false; 210 211 palive3 = (void *)pkt->data; 212 umac = &palive3->umac_data; 213 lmac1 = &palive3->lmac_data; 214 status = le16_to_cpu(palive3->status); 215 } else { 216 WARN(1, "unsupported alive notification (size %d)\n", 217 iwl_rx_packet_payload_len(pkt)); 218 /* get timeout later */ 219 return false; 220 } 221 222 lmac_error_event_table = 223 le32_to_cpu(lmac1->dbg_ptrs.error_event_table_ptr); 224 iwl_fw_lmac1_set_alive_err_table(mvm->trans, lmac_error_event_table); 225 226 if (lmac2) 227 mvm->trans->dbg.lmac_error_event_table[1] = 228 le32_to_cpu(lmac2->dbg_ptrs.error_event_table_ptr); 229 230 umac_error_table = le32_to_cpu(umac->dbg_ptrs.error_info_addr) & 231 ~FW_ADDR_CACHE_CONTROL; 232 233 if (umac_error_table) { 234 if (umac_error_table >= 235 mvm->trans->cfg->min_umac_error_event_table) { 236 iwl_fw_umac_set_alive_err_table(mvm->trans, 237 umac_error_table); 238 } else { 239 IWL_ERR(mvm, 240 "Not valid error log pointer 0x%08X for %s uCode\n", 241 umac_error_table, 242 (mvm->fwrt.cur_fw_img == IWL_UCODE_INIT) ? 243 "Init" : "RT"); 244 } 245 } 246 247 alive_data->scd_base_addr = le32_to_cpu(lmac1->dbg_ptrs.scd_base_ptr); 248 alive_data->valid = status == IWL_ALIVE_STATUS_OK; 249 250 IWL_DEBUG_FW(mvm, 251 "Alive ucode status 0x%04x revision 0x%01X 0x%01X\n", 252 status, lmac1->ver_type, lmac1->ver_subtype); 253 254 if (lmac2) 255 IWL_DEBUG_FW(mvm, "Alive ucode CDB\n"); 256 257 IWL_DEBUG_FW(mvm, 258 "UMAC version: Major - 0x%x, Minor - 0x%x\n", 259 le32_to_cpu(umac->umac_major), 260 le32_to_cpu(umac->umac_minor)); 261 262 iwl_fwrt_update_fw_versions(&mvm->fwrt, lmac1, umac); 263 264 return true; 265 } 266 267 static bool iwl_wait_init_complete(struct iwl_notif_wait_data *notif_wait, 268 struct iwl_rx_packet *pkt, void *data) 269 { 270 WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF); 271 272 return true; 273 } 274 275 static bool iwl_wait_phy_db_entry(struct iwl_notif_wait_data *notif_wait, 276 struct iwl_rx_packet *pkt, void *data) 277 { 278 struct iwl_phy_db *phy_db = data; 279 280 if (pkt->hdr.cmd != CALIB_RES_NOTIF_PHY_DB) { 281 WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF); 282 return true; 283 } 284 285 WARN_ON(iwl_phy_db_set_section(phy_db, pkt)); 286 287 return false; 288 } 289 290 static void iwl_mvm_print_pd_notification(struct iwl_mvm *mvm) 291 { 292 #define IWL_FW_PRINT_REG_INFO(reg_name) \ 293 IWL_ERR(mvm, #reg_name ": 0x%x\n", iwl_read_umac_prph(trans, reg_name)) 294 295 struct iwl_trans *trans = mvm->trans; 296 enum iwl_device_family device_family = trans->trans_cfg->device_family; 297 298 if (device_family < IWL_DEVICE_FAMILY_8000) 299 return; 300 301 if (device_family <= IWL_DEVICE_FAMILY_9000) 302 IWL_FW_PRINT_REG_INFO(WFPM_ARC1_PD_NOTIFICATION); 303 else 304 IWL_FW_PRINT_REG_INFO(WFPM_LMAC1_PD_NOTIFICATION); 305 306 IWL_FW_PRINT_REG_INFO(HPM_SECONDARY_DEVICE_STATE); 307 308 /* print OPT info */ 309 IWL_FW_PRINT_REG_INFO(WFPM_MAC_OTP_CFG7_ADDR); 310 IWL_FW_PRINT_REG_INFO(WFPM_MAC_OTP_CFG7_DATA); 311 } 312 313 static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm, 314 enum iwl_ucode_type ucode_type) 315 { 316 struct iwl_notification_wait alive_wait; 317 struct iwl_mvm_alive_data alive_data = {}; 318 const struct fw_img *fw; 319 int ret; 320 enum iwl_ucode_type old_type = mvm->fwrt.cur_fw_img; 321 static const u16 alive_cmd[] = { UCODE_ALIVE_NTFY }; 322 bool run_in_rfkill = 323 ucode_type == IWL_UCODE_INIT || iwl_mvm_has_unified_ucode(mvm); 324 u8 count; 325 struct iwl_pc_data *pc_data; 326 327 if (ucode_type == IWL_UCODE_REGULAR && 328 iwl_fw_dbg_conf_usniffer(mvm->fw, FW_DBG_START_FROM_ALIVE) && 329 !(fw_has_capa(&mvm->fw->ucode_capa, 330 IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED))) 331 fw = iwl_get_ucode_image(mvm->fw, IWL_UCODE_REGULAR_USNIFFER); 332 else 333 fw = iwl_get_ucode_image(mvm->fw, ucode_type); 334 if (WARN_ON(!fw)) 335 return -EINVAL; 336 iwl_fw_set_current_image(&mvm->fwrt, ucode_type); 337 clear_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status); 338 339 iwl_init_notification_wait(&mvm->notif_wait, &alive_wait, 340 alive_cmd, ARRAY_SIZE(alive_cmd), 341 iwl_alive_fn, &alive_data); 342 343 /* 344 * We want to load the INIT firmware even in RFKILL 345 * For the unified firmware case, the ucode_type is not 346 * INIT, but we still need to run it. 347 */ 348 ret = iwl_trans_start_fw(mvm->trans, fw, run_in_rfkill); 349 if (ret) { 350 iwl_fw_set_current_image(&mvm->fwrt, old_type); 351 iwl_remove_notification(&mvm->notif_wait, &alive_wait); 352 return ret; 353 } 354 355 /* 356 * Some things may run in the background now, but we 357 * just wait for the ALIVE notification here. 358 */ 359 ret = iwl_wait_notification(&mvm->notif_wait, &alive_wait, 360 MVM_UCODE_ALIVE_TIMEOUT); 361 362 if (mvm->trans->trans_cfg->device_family == 363 IWL_DEVICE_FAMILY_AX210) { 364 /* print these registers regardless of alive fail/success */ 365 IWL_INFO(mvm, "WFPM_UMAC_PD_NOTIFICATION: 0x%x\n", 366 iwl_read_umac_prph(mvm->trans, WFPM_ARC1_PD_NOTIFICATION)); 367 IWL_INFO(mvm, "WFPM_LMAC2_PD_NOTIFICATION: 0x%x\n", 368 iwl_read_umac_prph(mvm->trans, WFPM_LMAC2_PD_NOTIFICATION)); 369 IWL_INFO(mvm, "WFPM_AUTH_KEY_0: 0x%x\n", 370 iwl_read_umac_prph(mvm->trans, SB_MODIFY_CFG_FLAG)); 371 IWL_INFO(mvm, "CNVI_SCU_SEQ_DATA_DW9: 0x%x\n", 372 iwl_read_prph(mvm->trans, CNVI_SCU_SEQ_DATA_DW9)); 373 } 374 375 if (ret) { 376 struct iwl_trans *trans = mvm->trans; 377 378 /* SecBoot info */ 379 if (trans->trans_cfg->device_family >= 380 IWL_DEVICE_FAMILY_22000) { 381 IWL_ERR(mvm, 382 "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n", 383 iwl_read_umac_prph(trans, UMAG_SB_CPU_1_STATUS), 384 iwl_read_umac_prph(trans, 385 UMAG_SB_CPU_2_STATUS)); 386 } else if (trans->trans_cfg->device_family >= 387 IWL_DEVICE_FAMILY_8000) { 388 IWL_ERR(mvm, 389 "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n", 390 iwl_read_prph(trans, SB_CPU_1_STATUS), 391 iwl_read_prph(trans, SB_CPU_2_STATUS)); 392 } 393 394 iwl_mvm_print_pd_notification(mvm); 395 396 /* LMAC/UMAC PC info */ 397 if (trans->trans_cfg->device_family >= 398 IWL_DEVICE_FAMILY_22000) { 399 pc_data = trans->dbg.pc_data; 400 for (count = 0; count < trans->dbg.num_pc; 401 count++, pc_data++) 402 IWL_ERR(mvm, "%s: 0x%x\n", 403 pc_data->pc_name, 404 pc_data->pc_address); 405 } else if (trans->trans_cfg->device_family >= 406 IWL_DEVICE_FAMILY_9000) { 407 IWL_ERR(mvm, "UMAC PC: 0x%x\n", 408 iwl_read_umac_prph(trans, 409 UREG_UMAC_CURRENT_PC)); 410 IWL_ERR(mvm, "LMAC PC: 0x%x\n", 411 iwl_read_umac_prph(trans, 412 UREG_LMAC1_CURRENT_PC)); 413 if (iwl_mvm_is_cdb_supported(mvm)) 414 IWL_ERR(mvm, "LMAC2 PC: 0x%x\n", 415 iwl_read_umac_prph(trans, 416 UREG_LMAC2_CURRENT_PC)); 417 } 418 419 if (ret == -ETIMEDOUT && !mvm->pldr_sync) 420 iwl_fw_dbg_error_collect(&mvm->fwrt, 421 FW_DBG_TRIGGER_ALIVE_TIMEOUT); 422 423 iwl_fw_set_current_image(&mvm->fwrt, old_type); 424 return ret; 425 } 426 427 if (!alive_data.valid) { 428 IWL_ERR(mvm, "Loaded ucode is not valid!\n"); 429 iwl_fw_set_current_image(&mvm->fwrt, old_type); 430 return -EIO; 431 } 432 433 /* if reached this point, Alive notification was received */ 434 iwl_mei_alive_notif(true); 435 436 ret = iwl_pnvm_load(mvm->trans, &mvm->notif_wait, 437 &mvm->fw->ucode_capa); 438 if (ret) { 439 IWL_ERR(mvm, "Timeout waiting for PNVM load!\n"); 440 iwl_fw_set_current_image(&mvm->fwrt, old_type); 441 return ret; 442 } 443 444 iwl_trans_fw_alive(mvm->trans, alive_data.scd_base_addr); 445 446 /* 447 * Note: all the queues are enabled as part of the interface 448 * initialization, but in firmware restart scenarios they 449 * could be stopped, so wake them up. In firmware restart, 450 * mac80211 will have the queues stopped as well until the 451 * reconfiguration completes. During normal startup, they 452 * will be empty. 453 */ 454 455 memset(&mvm->queue_info, 0, sizeof(mvm->queue_info)); 456 /* 457 * Set a 'fake' TID for the command queue, since we use the 458 * hweight() of the tid_bitmap as a refcount now. Not that 459 * we ever even consider the command queue as one we might 460 * want to reuse, but be safe nevertheless. 461 */ 462 mvm->queue_info[IWL_MVM_DQA_CMD_QUEUE].tid_bitmap = 463 BIT(IWL_MAX_TID_COUNT + 2); 464 465 set_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status); 466 #ifdef CONFIG_IWLWIFI_DEBUGFS 467 iwl_fw_set_dbg_rec_on(&mvm->fwrt); 468 #endif 469 470 /* 471 * All the BSSes in the BSS table include the GP2 in the system 472 * at the beacon Rx time, this is of course no longer relevant 473 * since we are resetting the firmware. 474 * Purge all the BSS table. 475 */ 476 cfg80211_bss_flush(mvm->hw->wiphy); 477 478 return 0; 479 } 480 481 static void iwl_mvm_phy_filter_init(struct iwl_mvm *mvm, 482 struct iwl_phy_specific_cfg *phy_filters) 483 { 484 #ifdef CONFIG_ACPI 485 *phy_filters = mvm->phy_filters; 486 #endif /* CONFIG_ACPI */ 487 } 488 489 #if defined(CONFIG_ACPI) && defined(CONFIG_EFI) 490 static int iwl_mvm_sgom_init(struct iwl_mvm *mvm) 491 { 492 u8 cmd_ver; 493 int ret; 494 struct iwl_host_cmd cmd = { 495 .id = WIDE_ID(REGULATORY_AND_NVM_GROUP, 496 SAR_OFFSET_MAPPING_TABLE_CMD), 497 .flags = 0, 498 .data[0] = &mvm->fwrt.sgom_table, 499 .len[0] = sizeof(mvm->fwrt.sgom_table), 500 .dataflags[0] = IWL_HCMD_DFL_NOCOPY, 501 }; 502 503 if (!mvm->fwrt.sgom_enabled) { 504 IWL_DEBUG_RADIO(mvm, "SGOM table is disabled\n"); 505 return 0; 506 } 507 508 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd.id, 509 IWL_FW_CMD_VER_UNKNOWN); 510 511 if (cmd_ver != 2) { 512 IWL_DEBUG_RADIO(mvm, "command version is unsupported. version = %d\n", 513 cmd_ver); 514 return 0; 515 } 516 517 ret = iwl_mvm_send_cmd(mvm, &cmd); 518 if (ret < 0) 519 IWL_ERR(mvm, "failed to send SAR_OFFSET_MAPPING_CMD (%d)\n", ret); 520 521 return ret; 522 } 523 #else 524 525 static int iwl_mvm_sgom_init(struct iwl_mvm *mvm) 526 { 527 return 0; 528 } 529 #endif 530 531 static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm) 532 { 533 u32 cmd_id = PHY_CONFIGURATION_CMD; 534 struct iwl_phy_cfg_cmd_v3 phy_cfg_cmd; 535 enum iwl_ucode_type ucode_type = mvm->fwrt.cur_fw_img; 536 u8 cmd_ver; 537 size_t cmd_size; 538 539 if (iwl_mvm_has_unified_ucode(mvm) && 540 !mvm->trans->cfg->tx_with_siso_diversity) 541 return 0; 542 543 if (mvm->trans->cfg->tx_with_siso_diversity) { 544 /* 545 * TODO: currently we don't set the antenna but letting the NIC 546 * to decide which antenna to use. This should come from BIOS. 547 */ 548 phy_cfg_cmd.phy_cfg = 549 cpu_to_le32(FW_PHY_CFG_CHAIN_SAD_ENABLED); 550 } 551 552 /* Set parameters */ 553 phy_cfg_cmd.phy_cfg = cpu_to_le32(iwl_mvm_get_phy_config(mvm)); 554 555 /* set flags extra PHY configuration flags from the device's cfg */ 556 phy_cfg_cmd.phy_cfg |= 557 cpu_to_le32(mvm->trans->trans_cfg->extra_phy_cfg_flags); 558 559 phy_cfg_cmd.calib_control.event_trigger = 560 mvm->fw->default_calib[ucode_type].event_trigger; 561 phy_cfg_cmd.calib_control.flow_trigger = 562 mvm->fw->default_calib[ucode_type].flow_trigger; 563 564 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id, 565 IWL_FW_CMD_VER_UNKNOWN); 566 if (cmd_ver >= 3) 567 iwl_mvm_phy_filter_init(mvm, &phy_cfg_cmd.phy_specific_cfg); 568 569 IWL_DEBUG_INFO(mvm, "Sending Phy CFG command: 0x%x\n", 570 phy_cfg_cmd.phy_cfg); 571 cmd_size = (cmd_ver == 3) ? sizeof(struct iwl_phy_cfg_cmd_v3) : 572 sizeof(struct iwl_phy_cfg_cmd_v1); 573 return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, cmd_size, &phy_cfg_cmd); 574 } 575 576 static int iwl_run_unified_mvm_ucode(struct iwl_mvm *mvm) 577 { 578 struct iwl_notification_wait init_wait; 579 struct iwl_nvm_access_complete_cmd nvm_complete = {}; 580 struct iwl_init_extended_cfg_cmd init_cfg = { 581 .init_flags = cpu_to_le32(BIT(IWL_INIT_NVM)), 582 }; 583 static const u16 init_complete[] = { 584 INIT_COMPLETE_NOTIF, 585 }; 586 u32 sb_cfg; 587 int ret; 588 589 if (mvm->trans->cfg->tx_with_siso_diversity) 590 init_cfg.init_flags |= cpu_to_le32(BIT(IWL_INIT_PHY)); 591 592 lockdep_assert_held(&mvm->mutex); 593 594 mvm->rfkill_safe_init_done = false; 595 596 if (mvm->trans->trans_cfg->device_family == IWL_DEVICE_FAMILY_AX210) { 597 sb_cfg = iwl_read_umac_prph(mvm->trans, SB_MODIFY_CFG_FLAG); 598 /* if needed, we'll reset this on our way out later */ 599 mvm->pldr_sync = !(sb_cfg & SB_CFG_RESIDES_IN_OTP_MASK); 600 if (mvm->pldr_sync && iwl_mei_pldr_req()) 601 return -EBUSY; 602 } 603 604 iwl_init_notification_wait(&mvm->notif_wait, 605 &init_wait, 606 init_complete, 607 ARRAY_SIZE(init_complete), 608 iwl_wait_init_complete, 609 NULL); 610 611 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL); 612 613 /* Will also start the device */ 614 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR); 615 if (ret) { 616 IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret); 617 618 /* if we needed reset then fail here, but notify and remove */ 619 if (mvm->pldr_sync) { 620 iwl_mei_alive_notif(false); 621 iwl_trans_pcie_remove(mvm->trans, true); 622 } 623 624 goto error; 625 } 626 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE, 627 NULL); 628 629 /* Send init config command to mark that we are sending NVM access 630 * commands 631 */ 632 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(SYSTEM_GROUP, 633 INIT_EXTENDED_CFG_CMD), 634 CMD_SEND_IN_RFKILL, 635 sizeof(init_cfg), &init_cfg); 636 if (ret) { 637 IWL_ERR(mvm, "Failed to run init config command: %d\n", 638 ret); 639 goto error; 640 } 641 642 /* Load NVM to NIC if needed */ 643 if (mvm->nvm_file_name) { 644 ret = iwl_read_external_nvm(mvm->trans, mvm->nvm_file_name, 645 mvm->nvm_sections); 646 if (ret) 647 goto error; 648 ret = iwl_mvm_load_nvm_to_nic(mvm); 649 if (ret) 650 goto error; 651 } 652 653 if (IWL_MVM_PARSE_NVM && !mvm->nvm_data) { 654 ret = iwl_nvm_init(mvm); 655 if (ret) { 656 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret); 657 goto error; 658 } 659 } 660 661 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(REGULATORY_AND_NVM_GROUP, 662 NVM_ACCESS_COMPLETE), 663 CMD_SEND_IN_RFKILL, 664 sizeof(nvm_complete), &nvm_complete); 665 if (ret) { 666 IWL_ERR(mvm, "Failed to run complete NVM access: %d\n", 667 ret); 668 goto error; 669 } 670 671 ret = iwl_send_phy_cfg_cmd(mvm); 672 if (ret) { 673 IWL_ERR(mvm, "Failed to run PHY configuration: %d\n", 674 ret); 675 goto error; 676 } 677 678 /* We wait for the INIT complete notification */ 679 ret = iwl_wait_notification(&mvm->notif_wait, &init_wait, 680 MVM_UCODE_ALIVE_TIMEOUT); 681 if (ret) 682 return ret; 683 684 /* Read the NVM only at driver load time, no need to do this twice */ 685 if (!IWL_MVM_PARSE_NVM && !mvm->nvm_data) { 686 mvm->nvm_data = iwl_get_nvm(mvm->trans, mvm->fw, 687 mvm->set_tx_ant, mvm->set_rx_ant); 688 if (IS_ERR(mvm->nvm_data)) { 689 ret = PTR_ERR(mvm->nvm_data); 690 mvm->nvm_data = NULL; 691 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret); 692 return ret; 693 } 694 } 695 696 mvm->rfkill_safe_init_done = true; 697 698 return 0; 699 700 error: 701 iwl_remove_notification(&mvm->notif_wait, &init_wait); 702 return ret; 703 } 704 705 int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm) 706 { 707 struct iwl_notification_wait calib_wait; 708 static const u16 init_complete[] = { 709 INIT_COMPLETE_NOTIF, 710 CALIB_RES_NOTIF_PHY_DB 711 }; 712 int ret; 713 714 if (iwl_mvm_has_unified_ucode(mvm)) 715 return iwl_run_unified_mvm_ucode(mvm); 716 717 lockdep_assert_held(&mvm->mutex); 718 719 mvm->rfkill_safe_init_done = false; 720 721 iwl_init_notification_wait(&mvm->notif_wait, 722 &calib_wait, 723 init_complete, 724 ARRAY_SIZE(init_complete), 725 iwl_wait_phy_db_entry, 726 mvm->phy_db); 727 728 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL); 729 730 /* Will also start the device */ 731 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_INIT); 732 if (ret) { 733 IWL_ERR(mvm, "Failed to start INIT ucode: %d\n", ret); 734 goto remove_notif; 735 } 736 737 if (mvm->trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_8000) { 738 ret = iwl_mvm_send_bt_init_conf(mvm); 739 if (ret) 740 goto remove_notif; 741 } 742 743 /* Read the NVM only at driver load time, no need to do this twice */ 744 if (!mvm->nvm_data) { 745 ret = iwl_nvm_init(mvm); 746 if (ret) { 747 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret); 748 goto remove_notif; 749 } 750 } 751 752 /* In case we read the NVM from external file, load it to the NIC */ 753 if (mvm->nvm_file_name) { 754 ret = iwl_mvm_load_nvm_to_nic(mvm); 755 if (ret) 756 goto remove_notif; 757 } 758 759 WARN_ONCE(mvm->nvm_data->nvm_version < mvm->trans->cfg->nvm_ver, 760 "Too old NVM version (0x%0x, required = 0x%0x)", 761 mvm->nvm_data->nvm_version, mvm->trans->cfg->nvm_ver); 762 763 /* 764 * abort after reading the nvm in case RF Kill is on, we will complete 765 * the init seq later when RF kill will switch to off 766 */ 767 if (iwl_mvm_is_radio_hw_killed(mvm)) { 768 IWL_DEBUG_RF_KILL(mvm, 769 "jump over all phy activities due to RF kill\n"); 770 goto remove_notif; 771 } 772 773 mvm->rfkill_safe_init_done = true; 774 775 /* Send TX valid antennas before triggering calibrations */ 776 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); 777 if (ret) 778 goto remove_notif; 779 780 ret = iwl_send_phy_cfg_cmd(mvm); 781 if (ret) { 782 IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n", 783 ret); 784 goto remove_notif; 785 } 786 787 /* 788 * Some things may run in the background now, but we 789 * just wait for the calibration complete notification. 790 */ 791 ret = iwl_wait_notification(&mvm->notif_wait, &calib_wait, 792 MVM_UCODE_CALIB_TIMEOUT); 793 if (!ret) 794 goto out; 795 796 if (iwl_mvm_is_radio_hw_killed(mvm)) { 797 IWL_DEBUG_RF_KILL(mvm, "RFKILL while calibrating.\n"); 798 ret = 0; 799 } else { 800 IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n", 801 ret); 802 } 803 804 goto out; 805 806 remove_notif: 807 iwl_remove_notification(&mvm->notif_wait, &calib_wait); 808 out: 809 mvm->rfkill_safe_init_done = false; 810 if (iwlmvm_mod_params.init_dbg && !mvm->nvm_data) { 811 /* we want to debug INIT and we have no NVM - fake */ 812 mvm->nvm_data = kzalloc(sizeof(struct iwl_nvm_data) + 813 sizeof(struct ieee80211_channel) + 814 sizeof(struct ieee80211_rate), 815 GFP_KERNEL); 816 if (!mvm->nvm_data) 817 return -ENOMEM; 818 mvm->nvm_data->bands[0].channels = mvm->nvm_data->channels; 819 mvm->nvm_data->bands[0].n_channels = 1; 820 mvm->nvm_data->bands[0].n_bitrates = 1; 821 mvm->nvm_data->bands[0].bitrates = 822 (void *)(mvm->nvm_data->channels + 1); 823 mvm->nvm_data->bands[0].bitrates->hw_value = 10; 824 } 825 826 return ret; 827 } 828 829 static int iwl_mvm_config_ltr(struct iwl_mvm *mvm) 830 { 831 struct iwl_ltr_config_cmd cmd = { 832 .flags = cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE), 833 }; 834 835 if (!mvm->trans->ltr_enabled) 836 return 0; 837 838 return iwl_mvm_send_cmd_pdu(mvm, LTR_CONFIG, 0, 839 sizeof(cmd), &cmd); 840 } 841 842 #ifdef CONFIG_ACPI 843 int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a, int prof_b) 844 { 845 u32 cmd_id = REDUCE_TX_POWER_CMD; 846 struct iwl_dev_tx_power_cmd cmd = { 847 .common.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_CHAINS), 848 }; 849 __le16 *per_chain; 850 int ret; 851 u16 len = 0; 852 u32 n_subbands; 853 u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id, 854 IWL_FW_CMD_VER_UNKNOWN); 855 if (cmd_ver == 7) { 856 len = sizeof(cmd.v7); 857 n_subbands = IWL_NUM_SUB_BANDS_V2; 858 per_chain = cmd.v7.per_chain[0][0]; 859 cmd.v7.flags = cpu_to_le32(mvm->fwrt.reduced_power_flags); 860 } else if (cmd_ver == 6) { 861 len = sizeof(cmd.v6); 862 n_subbands = IWL_NUM_SUB_BANDS_V2; 863 per_chain = cmd.v6.per_chain[0][0]; 864 } else if (fw_has_api(&mvm->fw->ucode_capa, 865 IWL_UCODE_TLV_API_REDUCE_TX_POWER)) { 866 len = sizeof(cmd.v5); 867 n_subbands = IWL_NUM_SUB_BANDS_V1; 868 per_chain = cmd.v5.per_chain[0][0]; 869 } else if (fw_has_capa(&mvm->fw->ucode_capa, 870 IWL_UCODE_TLV_CAPA_TX_POWER_ACK)) { 871 len = sizeof(cmd.v4); 872 n_subbands = IWL_NUM_SUB_BANDS_V1; 873 per_chain = cmd.v4.per_chain[0][0]; 874 } else { 875 len = sizeof(cmd.v3); 876 n_subbands = IWL_NUM_SUB_BANDS_V1; 877 per_chain = cmd.v3.per_chain[0][0]; 878 } 879 880 /* all structs have the same common part, add it */ 881 len += sizeof(cmd.common); 882 883 ret = iwl_sar_select_profile(&mvm->fwrt, per_chain, 884 IWL_NUM_CHAIN_TABLES, 885 n_subbands, prof_a, prof_b); 886 887 /* return on error or if the profile is disabled (positive number) */ 888 if (ret) 889 return ret; 890 891 iwl_mei_set_power_limit(per_chain); 892 893 IWL_DEBUG_RADIO(mvm, "Sending REDUCE_TX_POWER_CMD per chain\n"); 894 return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, len, &cmd); 895 } 896 897 int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm) 898 { 899 union iwl_geo_tx_power_profiles_cmd geo_tx_cmd; 900 struct iwl_geo_tx_power_profiles_resp *resp; 901 u16 len; 902 int ret; 903 struct iwl_host_cmd cmd = { 904 .id = WIDE_ID(PHY_OPS_GROUP, PER_CHAIN_LIMIT_OFFSET_CMD), 905 .flags = CMD_WANT_SKB, 906 .data = { &geo_tx_cmd }, 907 }; 908 u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd.id, 909 IWL_FW_CMD_VER_UNKNOWN); 910 911 /* the ops field is at the same spot for all versions, so set in v1 */ 912 geo_tx_cmd.v1.ops = 913 cpu_to_le32(IWL_PER_CHAIN_OFFSET_GET_CURRENT_TABLE); 914 915 if (cmd_ver == 5) 916 len = sizeof(geo_tx_cmd.v5); 917 else if (cmd_ver == 4) 918 len = sizeof(geo_tx_cmd.v4); 919 else if (cmd_ver == 3) 920 len = sizeof(geo_tx_cmd.v3); 921 else if (fw_has_api(&mvm->fwrt.fw->ucode_capa, 922 IWL_UCODE_TLV_API_SAR_TABLE_VER)) 923 len = sizeof(geo_tx_cmd.v2); 924 else 925 len = sizeof(geo_tx_cmd.v1); 926 927 if (!iwl_sar_geo_support(&mvm->fwrt)) 928 return -EOPNOTSUPP; 929 930 cmd.len[0] = len; 931 932 ret = iwl_mvm_send_cmd(mvm, &cmd); 933 if (ret) { 934 IWL_ERR(mvm, "Failed to get geographic profile info %d\n", ret); 935 return ret; 936 } 937 938 resp = (void *)cmd.resp_pkt->data; 939 ret = le32_to_cpu(resp->profile_idx); 940 941 if (WARN_ON(ret > ACPI_NUM_GEO_PROFILES_REV3)) 942 ret = -EIO; 943 944 iwl_free_resp(&cmd); 945 return ret; 946 } 947 948 static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm) 949 { 950 u32 cmd_id = WIDE_ID(PHY_OPS_GROUP, PER_CHAIN_LIMIT_OFFSET_CMD); 951 union iwl_geo_tx_power_profiles_cmd cmd; 952 u16 len; 953 u32 n_bands; 954 u32 n_profiles; 955 u32 sk = 0; 956 int ret; 957 u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id, 958 IWL_FW_CMD_VER_UNKNOWN); 959 960 BUILD_BUG_ON(offsetof(struct iwl_geo_tx_power_profiles_cmd_v1, ops) != 961 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, ops) || 962 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, ops) != 963 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, ops) || 964 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, ops) != 965 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, ops) || 966 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, ops) != 967 offsetof(struct iwl_geo_tx_power_profiles_cmd_v5, ops)); 968 969 /* the ops field is at the same spot for all versions, so set in v1 */ 970 cmd.v1.ops = cpu_to_le32(IWL_PER_CHAIN_OFFSET_SET_TABLES); 971 972 if (cmd_ver == 5) { 973 len = sizeof(cmd.v5); 974 n_bands = ARRAY_SIZE(cmd.v5.table[0]); 975 n_profiles = ACPI_NUM_GEO_PROFILES_REV3; 976 } else if (cmd_ver == 4) { 977 len = sizeof(cmd.v4); 978 n_bands = ARRAY_SIZE(cmd.v4.table[0]); 979 n_profiles = ACPI_NUM_GEO_PROFILES_REV3; 980 } else if (cmd_ver == 3) { 981 len = sizeof(cmd.v3); 982 n_bands = ARRAY_SIZE(cmd.v3.table[0]); 983 n_profiles = ACPI_NUM_GEO_PROFILES; 984 } else if (fw_has_api(&mvm->fwrt.fw->ucode_capa, 985 IWL_UCODE_TLV_API_SAR_TABLE_VER)) { 986 len = sizeof(cmd.v2); 987 n_bands = ARRAY_SIZE(cmd.v2.table[0]); 988 n_profiles = ACPI_NUM_GEO_PROFILES; 989 } else { 990 len = sizeof(cmd.v1); 991 n_bands = ARRAY_SIZE(cmd.v1.table[0]); 992 n_profiles = ACPI_NUM_GEO_PROFILES; 993 } 994 995 BUILD_BUG_ON(offsetof(struct iwl_geo_tx_power_profiles_cmd_v1, table) != 996 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, table) || 997 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, table) != 998 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, table) || 999 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, table) != 1000 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, table) || 1001 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, table) != 1002 offsetof(struct iwl_geo_tx_power_profiles_cmd_v5, table)); 1003 /* the table is at the same position for all versions, so set use v1 */ 1004 ret = iwl_sar_geo_init(&mvm->fwrt, &cmd.v1.table[0][0], 1005 n_bands, n_profiles); 1006 1007 /* 1008 * It is a valid scenario to not support SAR, or miss wgds table, 1009 * but in that case there is no need to send the command. 1010 */ 1011 if (ret) 1012 return 0; 1013 1014 /* Only set to South Korea if the table revision is 1 */ 1015 if (mvm->fwrt.geo_rev == 1) 1016 sk = 1; 1017 1018 /* 1019 * Set the table_revision to South Korea (1) or not (0). The 1020 * element name is misleading, as it doesn't contain the table 1021 * revision number, but whether the South Korea variation 1022 * should be used. 1023 * This must be done after calling iwl_sar_geo_init(). 1024 */ 1025 if (cmd_ver == 5) 1026 cmd.v5.table_revision = cpu_to_le32(sk); 1027 else if (cmd_ver == 4) 1028 cmd.v4.table_revision = cpu_to_le32(sk); 1029 else if (cmd_ver == 3) 1030 cmd.v3.table_revision = cpu_to_le32(sk); 1031 else if (fw_has_api(&mvm->fwrt.fw->ucode_capa, 1032 IWL_UCODE_TLV_API_SAR_TABLE_VER)) 1033 cmd.v2.table_revision = cpu_to_le32(sk); 1034 1035 return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, len, &cmd); 1036 } 1037 1038 int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm) 1039 { 1040 union iwl_ppag_table_cmd cmd; 1041 int ret, cmd_size; 1042 1043 ret = iwl_read_ppag_table(&mvm->fwrt, &cmd, &cmd_size); 1044 /* Not supporting PPAG table is a valid scenario */ 1045 if (ret < 0) 1046 return 0; 1047 1048 IWL_DEBUG_RADIO(mvm, "Sending PER_PLATFORM_ANT_GAIN_CMD\n"); 1049 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(PHY_OPS_GROUP, 1050 PER_PLATFORM_ANT_GAIN_CMD), 1051 0, cmd_size, &cmd); 1052 if (ret < 0) 1053 IWL_ERR(mvm, "failed to send PER_PLATFORM_ANT_GAIN_CMD (%d)\n", 1054 ret); 1055 1056 return ret; 1057 } 1058 1059 static int iwl_mvm_ppag_init(struct iwl_mvm *mvm) 1060 { 1061 /* no need to read the table, done in INIT stage */ 1062 if (!(iwl_acpi_is_ppag_approved(&mvm->fwrt))) 1063 return 0; 1064 1065 return iwl_mvm_ppag_send_cmd(mvm); 1066 } 1067 1068 static const struct dmi_system_id dmi_tas_approved_list[] = { 1069 { .ident = "HP", 1070 .matches = { 1071 DMI_MATCH(DMI_SYS_VENDOR, "HP"), 1072 }, 1073 }, 1074 { .ident = "SAMSUNG", 1075 .matches = { 1076 DMI_MATCH(DMI_SYS_VENDOR, "SAMSUNG ELECTRONICS CO., LTD"), 1077 }, 1078 }, 1079 { .ident = "LENOVO", 1080 .matches = { 1081 DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), 1082 }, 1083 }, 1084 { .ident = "DELL", 1085 .matches = { 1086 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 1087 }, 1088 }, 1089 { .ident = "MSFT", 1090 .matches = { 1091 DMI_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"), 1092 }, 1093 }, 1094 { .ident = "Acer", 1095 .matches = { 1096 DMI_MATCH(DMI_SYS_VENDOR, "Acer"), 1097 }, 1098 }, 1099 { .ident = "ASUS", 1100 .matches = { 1101 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."), 1102 }, 1103 }, 1104 { .ident = "MSI", 1105 .matches = { 1106 DMI_MATCH(DMI_SYS_VENDOR, "Micro-Star International Co., Ltd."), 1107 }, 1108 }, 1109 { .ident = "Honor", 1110 .matches = { 1111 DMI_MATCH(DMI_SYS_VENDOR, "HONOR"), 1112 }, 1113 }, 1114 /* keep last */ 1115 {} 1116 }; 1117 1118 bool iwl_mvm_is_vendor_in_approved_list(void) 1119 { 1120 return dmi_check_system(dmi_tas_approved_list); 1121 } 1122 1123 static bool iwl_mvm_add_to_tas_block_list(__le32 *list, __le32 *le_size, unsigned int mcc) 1124 { 1125 int i; 1126 u32 size = le32_to_cpu(*le_size); 1127 1128 /* Verify that there is room for another country */ 1129 if (size >= IWL_TAS_BLOCK_LIST_MAX) 1130 return false; 1131 1132 for (i = 0; i < size; i++) { 1133 if (list[i] == cpu_to_le32(mcc)) 1134 return true; 1135 } 1136 1137 list[size++] = cpu_to_le32(mcc); 1138 *le_size = cpu_to_le32(size); 1139 return true; 1140 } 1141 1142 static void iwl_mvm_tas_init(struct iwl_mvm *mvm) 1143 { 1144 u32 cmd_id = WIDE_ID(REGULATORY_AND_NVM_GROUP, TAS_CONFIG); 1145 int ret; 1146 union iwl_tas_config_cmd cmd = {}; 1147 int cmd_size, fw_ver; 1148 1149 BUILD_BUG_ON(ARRAY_SIZE(cmd.v3.block_list_array) < 1150 APCI_WTAS_BLACK_LIST_MAX); 1151 1152 if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_TAS_CFG)) { 1153 IWL_DEBUG_RADIO(mvm, "TAS not enabled in FW\n"); 1154 return; 1155 } 1156 1157 fw_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id, 1158 IWL_FW_CMD_VER_UNKNOWN); 1159 1160 ret = iwl_acpi_get_tas(&mvm->fwrt, &cmd, fw_ver); 1161 if (ret < 0) { 1162 IWL_DEBUG_RADIO(mvm, 1163 "TAS table invalid or unavailable. (%d)\n", 1164 ret); 1165 return; 1166 } 1167 1168 if (ret == 0) 1169 return; 1170 1171 if (!iwl_mvm_is_vendor_in_approved_list()) { 1172 IWL_DEBUG_RADIO(mvm, 1173 "System vendor '%s' is not in the approved list, disabling TAS in US and Canada.\n", 1174 dmi_get_system_info(DMI_SYS_VENDOR)); 1175 if ((!iwl_mvm_add_to_tas_block_list(cmd.v4.block_list_array, 1176 &cmd.v4.block_list_size, 1177 IWL_TAS_US_MCC)) || 1178 (!iwl_mvm_add_to_tas_block_list(cmd.v4.block_list_array, 1179 &cmd.v4.block_list_size, 1180 IWL_TAS_CANADA_MCC))) { 1181 IWL_DEBUG_RADIO(mvm, 1182 "Unable to add US/Canada to TAS block list, disabling TAS\n"); 1183 return; 1184 } 1185 } else { 1186 IWL_DEBUG_RADIO(mvm, 1187 "System vendor '%s' is in the approved list.\n", 1188 dmi_get_system_info(DMI_SYS_VENDOR)); 1189 } 1190 1191 /* v4 is the same size as v3, so no need to differentiate here */ 1192 cmd_size = fw_ver < 3 ? 1193 sizeof(struct iwl_tas_config_cmd_v2) : 1194 sizeof(struct iwl_tas_config_cmd_v3); 1195 1196 ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, cmd_size, &cmd); 1197 if (ret < 0) 1198 IWL_DEBUG_RADIO(mvm, "failed to send TAS_CONFIG (%d)\n", ret); 1199 } 1200 1201 static u8 iwl_mvm_eval_dsm_rfi(struct iwl_mvm *mvm) 1202 { 1203 u8 value; 1204 int ret = iwl_acpi_get_dsm_u8(mvm->fwrt.dev, 0, DSM_RFI_FUNC_ENABLE, 1205 &iwl_rfi_guid, &value); 1206 1207 if (ret < 0) { 1208 IWL_DEBUG_RADIO(mvm, "Failed to get DSM RFI, ret=%d\n", ret); 1209 1210 } else if (value >= DSM_VALUE_RFI_MAX) { 1211 IWL_DEBUG_RADIO(mvm, "DSM RFI got invalid value, ret=%d\n", 1212 value); 1213 1214 } else if (value == DSM_VALUE_RFI_ENABLE) { 1215 IWL_DEBUG_RADIO(mvm, "DSM RFI is evaluated to enable\n"); 1216 return DSM_VALUE_RFI_ENABLE; 1217 } 1218 1219 IWL_DEBUG_RADIO(mvm, "DSM RFI is disabled\n"); 1220 1221 /* default behaviour is disabled */ 1222 return DSM_VALUE_RFI_DISABLE; 1223 } 1224 1225 static void iwl_mvm_lari_cfg(struct iwl_mvm *mvm) 1226 { 1227 int ret; 1228 u32 value; 1229 struct iwl_lari_config_change_cmd_v6 cmd = {}; 1230 1231 cmd.config_bitmap = iwl_acpi_get_lari_config_bitmap(&mvm->fwrt); 1232 1233 ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0, DSM_FUNC_11AX_ENABLEMENT, 1234 &iwl_guid, &value); 1235 if (!ret) 1236 cmd.oem_11ax_allow_bitmap = cpu_to_le32(value); 1237 1238 ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0, 1239 DSM_FUNC_ENABLE_UNII4_CHAN, 1240 &iwl_guid, &value); 1241 if (!ret) 1242 cmd.oem_unii4_allow_bitmap = cpu_to_le32(value); 1243 1244 ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0, 1245 DSM_FUNC_ACTIVATE_CHANNEL, 1246 &iwl_guid, &value); 1247 if (!ret) 1248 cmd.chan_state_active_bitmap = cpu_to_le32(value); 1249 1250 ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0, 1251 DSM_FUNC_ENABLE_6E, 1252 &iwl_guid, &value); 1253 if (!ret) 1254 cmd.oem_uhb_allow_bitmap = cpu_to_le32(value); 1255 1256 ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0, 1257 DSM_FUNC_FORCE_DISABLE_CHANNELS, 1258 &iwl_guid, &value); 1259 if (!ret) 1260 cmd.force_disable_channels_bitmap = cpu_to_le32(value); 1261 1262 if (cmd.config_bitmap || 1263 cmd.oem_uhb_allow_bitmap || 1264 cmd.oem_11ax_allow_bitmap || 1265 cmd.oem_unii4_allow_bitmap || 1266 cmd.chan_state_active_bitmap || 1267 cmd.force_disable_channels_bitmap) { 1268 size_t cmd_size; 1269 u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, 1270 WIDE_ID(REGULATORY_AND_NVM_GROUP, 1271 LARI_CONFIG_CHANGE), 1272 1); 1273 switch (cmd_ver) { 1274 case 6: 1275 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v6); 1276 break; 1277 case 5: 1278 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v5); 1279 break; 1280 case 4: 1281 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v4); 1282 break; 1283 case 3: 1284 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v3); 1285 break; 1286 case 2: 1287 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v2); 1288 break; 1289 default: 1290 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v1); 1291 break; 1292 } 1293 1294 IWL_DEBUG_RADIO(mvm, 1295 "sending LARI_CONFIG_CHANGE, config_bitmap=0x%x, oem_11ax_allow_bitmap=0x%x\n", 1296 le32_to_cpu(cmd.config_bitmap), 1297 le32_to_cpu(cmd.oem_11ax_allow_bitmap)); 1298 IWL_DEBUG_RADIO(mvm, 1299 "sending LARI_CONFIG_CHANGE, oem_unii4_allow_bitmap=0x%x, chan_state_active_bitmap=0x%x, cmd_ver=%d\n", 1300 le32_to_cpu(cmd.oem_unii4_allow_bitmap), 1301 le32_to_cpu(cmd.chan_state_active_bitmap), 1302 cmd_ver); 1303 IWL_DEBUG_RADIO(mvm, 1304 "sending LARI_CONFIG_CHANGE, oem_uhb_allow_bitmap=0x%x, force_disable_channels_bitmap=0x%x\n", 1305 le32_to_cpu(cmd.oem_uhb_allow_bitmap), 1306 le32_to_cpu(cmd.force_disable_channels_bitmap)); 1307 ret = iwl_mvm_send_cmd_pdu(mvm, 1308 WIDE_ID(REGULATORY_AND_NVM_GROUP, 1309 LARI_CONFIG_CHANGE), 1310 0, cmd_size, &cmd); 1311 if (ret < 0) 1312 IWL_DEBUG_RADIO(mvm, 1313 "Failed to send LARI_CONFIG_CHANGE (%d)\n", 1314 ret); 1315 } 1316 } 1317 1318 void iwl_mvm_get_acpi_tables(struct iwl_mvm *mvm) 1319 { 1320 int ret; 1321 1322 /* read PPAG table */ 1323 ret = iwl_acpi_get_ppag_table(&mvm->fwrt); 1324 if (ret < 0) { 1325 IWL_DEBUG_RADIO(mvm, 1326 "PPAG BIOS table invalid or unavailable. (%d)\n", 1327 ret); 1328 } 1329 1330 /* read SAR tables */ 1331 ret = iwl_sar_get_wrds_table(&mvm->fwrt); 1332 if (ret < 0) { 1333 IWL_DEBUG_RADIO(mvm, 1334 "WRDS SAR BIOS table invalid or unavailable. (%d)\n", 1335 ret); 1336 /* 1337 * If not available, don't fail and don't bother with EWRD and 1338 * WGDS */ 1339 1340 if (!iwl_sar_get_wgds_table(&mvm->fwrt)) { 1341 /* 1342 * If basic SAR is not available, we check for WGDS, 1343 * which should *not* be available either. If it is 1344 * available, issue an error, because we can't use SAR 1345 * Geo without basic SAR. 1346 */ 1347 IWL_ERR(mvm, "BIOS contains WGDS but no WRDS\n"); 1348 } 1349 1350 } else { 1351 ret = iwl_sar_get_ewrd_table(&mvm->fwrt); 1352 /* if EWRD is not available, we can still use 1353 * WRDS, so don't fail */ 1354 if (ret < 0) 1355 IWL_DEBUG_RADIO(mvm, 1356 "EWRD SAR BIOS table invalid or unavailable. (%d)\n", 1357 ret); 1358 1359 /* read geo SAR table */ 1360 if (iwl_sar_geo_support(&mvm->fwrt)) { 1361 ret = iwl_sar_get_wgds_table(&mvm->fwrt); 1362 if (ret < 0) 1363 IWL_DEBUG_RADIO(mvm, 1364 "Geo SAR BIOS table invalid or unavailable. (%d)\n", 1365 ret); 1366 /* we don't fail if the table is not available */ 1367 } 1368 } 1369 1370 iwl_acpi_get_phy_filters(&mvm->fwrt, &mvm->phy_filters); 1371 } 1372 #else /* CONFIG_ACPI */ 1373 1374 inline int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, 1375 int prof_a, int prof_b) 1376 { 1377 return 1; 1378 } 1379 1380 inline int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm) 1381 { 1382 return -ENOENT; 1383 } 1384 1385 static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm) 1386 { 1387 return 0; 1388 } 1389 1390 int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm) 1391 { 1392 return -ENOENT; 1393 } 1394 1395 static int iwl_mvm_ppag_init(struct iwl_mvm *mvm) 1396 { 1397 return 0; 1398 } 1399 1400 static void iwl_mvm_tas_init(struct iwl_mvm *mvm) 1401 { 1402 } 1403 1404 static void iwl_mvm_lari_cfg(struct iwl_mvm *mvm) 1405 { 1406 } 1407 1408 bool iwl_mvm_is_vendor_in_approved_list(void) 1409 { 1410 return false; 1411 } 1412 1413 static u8 iwl_mvm_eval_dsm_rfi(struct iwl_mvm *mvm) 1414 { 1415 return DSM_VALUE_RFI_DISABLE; 1416 } 1417 1418 void iwl_mvm_get_acpi_tables(struct iwl_mvm *mvm) 1419 { 1420 } 1421 1422 #endif /* CONFIG_ACPI */ 1423 1424 void iwl_mvm_send_recovery_cmd(struct iwl_mvm *mvm, u32 flags) 1425 { 1426 u32 error_log_size = mvm->fw->ucode_capa.error_log_size; 1427 int ret; 1428 u32 resp; 1429 1430 struct iwl_fw_error_recovery_cmd recovery_cmd = { 1431 .flags = cpu_to_le32(flags), 1432 .buf_size = 0, 1433 }; 1434 struct iwl_host_cmd host_cmd = { 1435 .id = WIDE_ID(SYSTEM_GROUP, FW_ERROR_RECOVERY_CMD), 1436 .flags = CMD_WANT_SKB, 1437 .data = {&recovery_cmd, }, 1438 .len = {sizeof(recovery_cmd), }, 1439 }; 1440 1441 /* no error log was defined in TLV */ 1442 if (!error_log_size) 1443 return; 1444 1445 if (flags & ERROR_RECOVERY_UPDATE_DB) { 1446 /* no buf was allocated while HW reset */ 1447 if (!mvm->error_recovery_buf) 1448 return; 1449 1450 host_cmd.data[1] = mvm->error_recovery_buf; 1451 host_cmd.len[1] = error_log_size; 1452 host_cmd.dataflags[1] = IWL_HCMD_DFL_NOCOPY; 1453 recovery_cmd.buf_size = cpu_to_le32(error_log_size); 1454 } 1455 1456 ret = iwl_mvm_send_cmd(mvm, &host_cmd); 1457 kfree(mvm->error_recovery_buf); 1458 mvm->error_recovery_buf = NULL; 1459 1460 if (ret) { 1461 IWL_ERR(mvm, "Failed to send recovery cmd %d\n", ret); 1462 return; 1463 } 1464 1465 /* skb respond is only relevant in ERROR_RECOVERY_UPDATE_DB */ 1466 if (flags & ERROR_RECOVERY_UPDATE_DB) { 1467 resp = le32_to_cpu(*(__le32 *)host_cmd.resp_pkt->data); 1468 if (resp) 1469 IWL_ERR(mvm, 1470 "Failed to send recovery cmd blob was invalid %d\n", 1471 resp); 1472 } 1473 } 1474 1475 static int iwl_mvm_sar_init(struct iwl_mvm *mvm) 1476 { 1477 return iwl_mvm_sar_select_profile(mvm, 1, 1); 1478 } 1479 1480 static int iwl_mvm_load_rt_fw(struct iwl_mvm *mvm) 1481 { 1482 int ret; 1483 1484 if (iwl_mvm_has_unified_ucode(mvm)) 1485 return iwl_run_unified_mvm_ucode(mvm); 1486 1487 ret = iwl_run_init_mvm_ucode(mvm); 1488 1489 if (ret) { 1490 IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", ret); 1491 1492 if (iwlmvm_mod_params.init_dbg) 1493 return 0; 1494 return ret; 1495 } 1496 1497 iwl_fw_dbg_stop_sync(&mvm->fwrt); 1498 iwl_trans_stop_device(mvm->trans); 1499 ret = iwl_trans_start_hw(mvm->trans); 1500 if (ret) 1501 return ret; 1502 1503 mvm->rfkill_safe_init_done = false; 1504 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR); 1505 if (ret) 1506 return ret; 1507 1508 mvm->rfkill_safe_init_done = true; 1509 1510 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE, 1511 NULL); 1512 1513 return iwl_init_paging(&mvm->fwrt, mvm->fwrt.cur_fw_img); 1514 } 1515 1516 int iwl_mvm_up(struct iwl_mvm *mvm) 1517 { 1518 int ret, i; 1519 struct ieee80211_channel *chan; 1520 struct cfg80211_chan_def chandef; 1521 struct ieee80211_supported_band *sband = NULL; 1522 1523 lockdep_assert_held(&mvm->mutex); 1524 1525 ret = iwl_trans_start_hw(mvm->trans); 1526 if (ret) 1527 return ret; 1528 1529 ret = iwl_mvm_load_rt_fw(mvm); 1530 if (ret) { 1531 IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret); 1532 if (ret != -ERFKILL && !mvm->pldr_sync) 1533 iwl_fw_dbg_error_collect(&mvm->fwrt, 1534 FW_DBG_TRIGGER_DRIVER); 1535 goto error; 1536 } 1537 1538 /* FW loaded successfully */ 1539 mvm->pldr_sync = false; 1540 1541 iwl_fw_disable_dbg_asserts(&mvm->fwrt); 1542 iwl_get_shared_mem_conf(&mvm->fwrt); 1543 1544 ret = iwl_mvm_sf_update(mvm, NULL, false); 1545 if (ret) 1546 IWL_ERR(mvm, "Failed to initialize Smart Fifo\n"); 1547 1548 if (!iwl_trans_dbg_ini_valid(mvm->trans)) { 1549 mvm->fwrt.dump.conf = FW_DBG_INVALID; 1550 /* if we have a destination, assume EARLY START */ 1551 if (mvm->fw->dbg.dest_tlv) 1552 mvm->fwrt.dump.conf = FW_DBG_START_FROM_ALIVE; 1553 iwl_fw_start_dbg_conf(&mvm->fwrt, FW_DBG_START_FROM_ALIVE); 1554 } 1555 1556 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); 1557 if (ret) 1558 goto error; 1559 1560 if (!iwl_mvm_has_unified_ucode(mvm)) { 1561 /* Send phy db control command and then phy db calibration */ 1562 ret = iwl_send_phy_db_data(mvm->phy_db); 1563 if (ret) 1564 goto error; 1565 ret = iwl_send_phy_cfg_cmd(mvm); 1566 if (ret) 1567 goto error; 1568 } 1569 1570 ret = iwl_mvm_send_bt_init_conf(mvm); 1571 if (ret) 1572 goto error; 1573 1574 if (fw_has_capa(&mvm->fw->ucode_capa, 1575 IWL_UCODE_TLV_CAPA_SOC_LATENCY_SUPPORT)) { 1576 ret = iwl_set_soc_latency(&mvm->fwrt); 1577 if (ret) 1578 goto error; 1579 } 1580 1581 iwl_mvm_lari_cfg(mvm); 1582 1583 /* Init RSS configuration */ 1584 ret = iwl_configure_rxq(&mvm->fwrt); 1585 if (ret) 1586 goto error; 1587 1588 if (iwl_mvm_has_new_rx_api(mvm)) { 1589 ret = iwl_send_rss_cfg_cmd(mvm); 1590 if (ret) { 1591 IWL_ERR(mvm, "Failed to configure RSS queues: %d\n", 1592 ret); 1593 goto error; 1594 } 1595 } 1596 1597 /* init the fw <-> mac80211 STA mapping */ 1598 for (i = 0; i < mvm->fw->ucode_capa.num_stations; i++) { 1599 RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL); 1600 RCU_INIT_POINTER(mvm->fw_id_to_link_sta[i], NULL); 1601 } 1602 1603 for (i = 0; i < IWL_MVM_FW_MAX_LINK_ID + 1; i++) 1604 RCU_INIT_POINTER(mvm->link_id_to_link_conf[i], NULL); 1605 1606 memset(&mvm->fw_link_ids_map, 0, sizeof(mvm->fw_link_ids_map)); 1607 1608 mvm->tdls_cs.peer.sta_id = IWL_MVM_INVALID_STA; 1609 1610 /* reset quota debouncing buffer - 0xff will yield invalid data */ 1611 memset(&mvm->last_quota_cmd, 0xff, sizeof(mvm->last_quota_cmd)); 1612 1613 if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_DQA_SUPPORT)) { 1614 ret = iwl_mvm_send_dqa_cmd(mvm); 1615 if (ret) 1616 goto error; 1617 } 1618 1619 /* 1620 * Add auxiliary station for scanning. 1621 * Newer versions of this command implies that the fw uses 1622 * internal aux station for all aux activities that don't 1623 * requires a dedicated data queue. 1624 */ 1625 if (!iwl_mvm_has_new_station_api(mvm->fw)) { 1626 /* 1627 * In old version the aux station uses mac id like other 1628 * station and not lmac id 1629 */ 1630 ret = iwl_mvm_add_aux_sta(mvm, MAC_INDEX_AUX); 1631 if (ret) 1632 goto error; 1633 } 1634 1635 /* Add all the PHY contexts */ 1636 i = 0; 1637 while (!sband && i < NUM_NL80211_BANDS) 1638 sband = mvm->hw->wiphy->bands[i++]; 1639 1640 if (WARN_ON_ONCE(!sband)) { 1641 ret = -ENODEV; 1642 goto error; 1643 } 1644 1645 chan = &sband->channels[0]; 1646 1647 cfg80211_chandef_create(&chandef, chan, NL80211_CHAN_NO_HT); 1648 for (i = 0; i < NUM_PHY_CTX; i++) { 1649 /* 1650 * The channel used here isn't relevant as it's 1651 * going to be overwritten in the other flows. 1652 * For now use the first channel we have. 1653 */ 1654 ret = iwl_mvm_phy_ctxt_add(mvm, &mvm->phy_ctxts[i], 1655 &chandef, 1, 1); 1656 if (ret) 1657 goto error; 1658 } 1659 1660 if (iwl_mvm_is_tt_in_fw(mvm)) { 1661 /* in order to give the responsibility of ct-kill and 1662 * TX backoff to FW we need to send empty temperature reporting 1663 * cmd during init time 1664 */ 1665 iwl_mvm_send_temp_report_ths_cmd(mvm); 1666 } else { 1667 /* Initialize tx backoffs to the minimal possible */ 1668 iwl_mvm_tt_tx_backoff(mvm, 0); 1669 } 1670 1671 #ifdef CONFIG_THERMAL 1672 /* TODO: read the budget from BIOS / Platform NVM */ 1673 1674 /* 1675 * In case there is no budget from BIOS / Platform NVM the default 1676 * budget should be 2000mW (cooling state 0). 1677 */ 1678 if (iwl_mvm_is_ctdp_supported(mvm)) { 1679 ret = iwl_mvm_ctdp_command(mvm, CTDP_CMD_OPERATION_START, 1680 mvm->cooling_dev.cur_state); 1681 if (ret) 1682 goto error; 1683 } 1684 #endif 1685 1686 if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_SET_LTR_GEN2)) 1687 WARN_ON(iwl_mvm_config_ltr(mvm)); 1688 1689 ret = iwl_mvm_power_update_device(mvm); 1690 if (ret) 1691 goto error; 1692 1693 /* 1694 * RTNL is not taken during Ct-kill, but we don't need to scan/Tx 1695 * anyway, so don't init MCC. 1696 */ 1697 if (!test_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status)) { 1698 ret = iwl_mvm_init_mcc(mvm); 1699 if (ret) 1700 goto error; 1701 } 1702 1703 if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_UMAC_SCAN)) { 1704 mvm->scan_type = IWL_SCAN_TYPE_NOT_SET; 1705 mvm->hb_scan_type = IWL_SCAN_TYPE_NOT_SET; 1706 ret = iwl_mvm_config_scan(mvm); 1707 if (ret) 1708 goto error; 1709 } 1710 1711 if (test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status)) { 1712 iwl_mvm_send_recovery_cmd(mvm, ERROR_RECOVERY_UPDATE_DB); 1713 1714 if (mvm->time_sync.active) 1715 iwl_mvm_time_sync_config(mvm, mvm->time_sync.peer_addr, 1716 IWL_TIME_SYNC_PROTOCOL_TM | 1717 IWL_TIME_SYNC_PROTOCOL_FTM); 1718 } 1719 1720 if (!mvm->ptp_data.ptp_clock) 1721 iwl_mvm_ptp_init(mvm); 1722 1723 if (iwl_acpi_get_eckv(mvm->dev, &mvm->ext_clock_valid)) 1724 IWL_DEBUG_INFO(mvm, "ECKV table doesn't exist in BIOS\n"); 1725 1726 ret = iwl_mvm_ppag_init(mvm); 1727 if (ret) 1728 goto error; 1729 1730 ret = iwl_mvm_sar_init(mvm); 1731 if (ret == 0) 1732 ret = iwl_mvm_sar_geo_init(mvm); 1733 if (ret < 0) 1734 goto error; 1735 1736 ret = iwl_mvm_sgom_init(mvm); 1737 if (ret) 1738 goto error; 1739 1740 iwl_mvm_tas_init(mvm); 1741 iwl_mvm_leds_sync(mvm); 1742 1743 if (iwl_rfi_supported(mvm)) { 1744 if (iwl_mvm_eval_dsm_rfi(mvm) == DSM_VALUE_RFI_ENABLE) 1745 iwl_rfi_send_config_cmd(mvm, NULL); 1746 } 1747 1748 iwl_mvm_mei_device_state(mvm, true); 1749 1750 IWL_DEBUG_INFO(mvm, "RT uCode started.\n"); 1751 return 0; 1752 error: 1753 if (!iwlmvm_mod_params.init_dbg || !ret) 1754 iwl_mvm_stop_device(mvm); 1755 return ret; 1756 } 1757 1758 int iwl_mvm_load_d3_fw(struct iwl_mvm *mvm) 1759 { 1760 int ret, i; 1761 1762 lockdep_assert_held(&mvm->mutex); 1763 1764 ret = iwl_trans_start_hw(mvm->trans); 1765 if (ret) 1766 return ret; 1767 1768 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_WOWLAN); 1769 if (ret) { 1770 IWL_ERR(mvm, "Failed to start WoWLAN firmware: %d\n", ret); 1771 goto error; 1772 } 1773 1774 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); 1775 if (ret) 1776 goto error; 1777 1778 /* Send phy db control command and then phy db calibration*/ 1779 ret = iwl_send_phy_db_data(mvm->phy_db); 1780 if (ret) 1781 goto error; 1782 1783 ret = iwl_send_phy_cfg_cmd(mvm); 1784 if (ret) 1785 goto error; 1786 1787 /* init the fw <-> mac80211 STA mapping */ 1788 for (i = 0; i < mvm->fw->ucode_capa.num_stations; i++) { 1789 RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL); 1790 RCU_INIT_POINTER(mvm->fw_id_to_link_sta[i], NULL); 1791 } 1792 1793 if (!iwl_mvm_has_new_station_api(mvm->fw)) { 1794 /* 1795 * Add auxiliary station for scanning. 1796 * Newer versions of this command implies that the fw uses 1797 * internal aux station for all aux activities that don't 1798 * requires a dedicated data queue. 1799 * In old version the aux station uses mac id like other 1800 * station and not lmac id 1801 */ 1802 ret = iwl_mvm_add_aux_sta(mvm, MAC_INDEX_AUX); 1803 if (ret) 1804 goto error; 1805 } 1806 1807 return 0; 1808 error: 1809 iwl_mvm_stop_device(mvm); 1810 return ret; 1811 } 1812 1813 void iwl_mvm_rx_mfuart_notif(struct iwl_mvm *mvm, 1814 struct iwl_rx_cmd_buffer *rxb) 1815 { 1816 struct iwl_rx_packet *pkt = rxb_addr(rxb); 1817 struct iwl_mfuart_load_notif *mfuart_notif = (void *)pkt->data; 1818 1819 IWL_DEBUG_INFO(mvm, 1820 "MFUART: installed ver: 0x%08x, external ver: 0x%08x, status: 0x%08x, duration: 0x%08x\n", 1821 le32_to_cpu(mfuart_notif->installed_ver), 1822 le32_to_cpu(mfuart_notif->external_ver), 1823 le32_to_cpu(mfuart_notif->status), 1824 le32_to_cpu(mfuart_notif->duration)); 1825 1826 if (iwl_rx_packet_payload_len(pkt) == sizeof(*mfuart_notif)) 1827 IWL_DEBUG_INFO(mvm, 1828 "MFUART: image size: 0x%08x\n", 1829 le32_to_cpu(mfuart_notif->image_size)); 1830 } 1831