1 /****************************************************************************** 2 * 3 * This file is provided under a dual BSD/GPLv2 license. When using or 4 * redistributing this file, you may do so under either license. 5 * 6 * GPL LICENSE SUMMARY 7 * 8 * Copyright(c) 2007 - 2014 Intel Corporation. All rights reserved. 9 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH 10 * Copyright(c) 2016 - 2017 Intel Deutschland GmbH 11 * Copyright(c) 2018 - 2019 Intel Corporation 12 * 13 * This program is free software; you can redistribute it and/or modify 14 * it under the terms of version 2 of the GNU General Public License as 15 * published by the Free Software Foundation. 16 * 17 * This program is distributed in the hope that it will be useful, but 18 * WITHOUT ANY WARRANTY; without even the implied warranty of 19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 20 * General Public License for more details. 21 * 22 * The full GNU General Public License is included in this distribution 23 * in the file called COPYING. 24 * 25 * Contact Information: 26 * Intel Linux Wireless <linuxwifi@intel.com> 27 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 28 * 29 * BSD LICENSE 30 * 31 * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved. 32 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH 33 * Copyright(c) 2016 - 2017 Intel Deutschland GmbH 34 * Copyright(c) 2018 - 2019 Intel Corporation 35 * All rights reserved. 36 * 37 * Redistribution and use in source and binary forms, with or without 38 * modification, are permitted provided that the following conditions 39 * are met: 40 * 41 * * Redistributions of source code must retain the above copyright 42 * notice, this list of conditions and the following disclaimer. 43 * * Redistributions in binary form must reproduce the above copyright 44 * notice, this list of conditions and the following disclaimer in 45 * the documentation and/or other materials provided with the 46 * distribution. 47 * * Neither the name Intel Corporation nor the names of its 48 * contributors may be used to endorse or promote products derived 49 * from this software without specific prior written permission. 50 * 51 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 52 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 53 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 54 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 55 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 56 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 57 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 58 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 59 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 60 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 61 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 62 * 63 *****************************************************************************/ 64 #ifndef __iwl_trans_h__ 65 #define __iwl_trans_h__ 66 67 #include <linux/ieee80211.h> 68 #include <linux/mm.h> /* for page_address */ 69 #include <linux/lockdep.h> 70 #include <linux/kernel.h> 71 72 #include "iwl-debug.h" 73 #include "iwl-config.h" 74 #include "fw/img.h" 75 #include "iwl-op-mode.h" 76 #include "fw/api/cmdhdr.h" 77 #include "fw/api/txq.h" 78 #include "fw/api/dbg-tlv.h" 79 #include "iwl-dbg-tlv.h" 80 81 /** 82 * DOC: Transport layer - what is it ? 83 * 84 * The transport layer is the layer that deals with the HW directly. It provides 85 * an abstraction of the underlying HW to the upper layer. The transport layer 86 * doesn't provide any policy, algorithm or anything of this kind, but only 87 * mechanisms to make the HW do something. It is not completely stateless but 88 * close to it. 89 * We will have an implementation for each different supported bus. 90 */ 91 92 /** 93 * DOC: Life cycle of the transport layer 94 * 95 * The transport layer has a very precise life cycle. 96 * 97 * 1) A helper function is called during the module initialization and 98 * registers the bus driver's ops with the transport's alloc function. 99 * 2) Bus's probe calls to the transport layer's allocation functions. 100 * Of course this function is bus specific. 101 * 3) This allocation functions will spawn the upper layer which will 102 * register mac80211. 103 * 104 * 4) At some point (i.e. mac80211's start call), the op_mode will call 105 * the following sequence: 106 * start_hw 107 * start_fw 108 * 109 * 5) Then when finished (or reset): 110 * stop_device 111 * 112 * 6) Eventually, the free function will be called. 113 */ 114 115 #define FH_RSCSR_FRAME_SIZE_MSK 0x00003FFF /* bits 0-13 */ 116 #define FH_RSCSR_FRAME_INVALID 0x55550000 117 #define FH_RSCSR_FRAME_ALIGN 0x40 118 #define FH_RSCSR_RPA_EN BIT(25) 119 #define FH_RSCSR_RADA_EN BIT(26) 120 #define FH_RSCSR_RXQ_POS 16 121 #define FH_RSCSR_RXQ_MASK 0x3F0000 122 123 struct iwl_rx_packet { 124 /* 125 * The first 4 bytes of the RX frame header contain both the RX frame 126 * size and some flags. 127 * Bit fields: 128 * 31: flag flush RB request 129 * 30: flag ignore TC (terminal counter) request 130 * 29: flag fast IRQ request 131 * 28-27: Reserved 132 * 26: RADA enabled 133 * 25: Offload enabled 134 * 24: RPF enabled 135 * 23: RSS enabled 136 * 22: Checksum enabled 137 * 21-16: RX queue 138 * 15-14: Reserved 139 * 13-00: RX frame size 140 */ 141 __le32 len_n_flags; 142 struct iwl_cmd_header hdr; 143 u8 data[]; 144 } __packed; 145 146 static inline u32 iwl_rx_packet_len(const struct iwl_rx_packet *pkt) 147 { 148 return le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK; 149 } 150 151 static inline u32 iwl_rx_packet_payload_len(const struct iwl_rx_packet *pkt) 152 { 153 return iwl_rx_packet_len(pkt) - sizeof(pkt->hdr); 154 } 155 156 /** 157 * enum CMD_MODE - how to send the host commands ? 158 * 159 * @CMD_ASYNC: Return right away and don't wait for the response 160 * @CMD_WANT_SKB: Not valid with CMD_ASYNC. The caller needs the buffer of 161 * the response. The caller needs to call iwl_free_resp when done. 162 * @CMD_HIGH_PRIO: The command is high priority - it goes to the front of the 163 * command queue, but after other high priority commands. Valid only 164 * with CMD_ASYNC. 165 * @CMD_SEND_IN_IDLE: The command should be sent even when the trans is idle. 166 * @CMD_MAKE_TRANS_IDLE: The command response should mark the trans as idle. 167 * @CMD_WAKE_UP_TRANS: The command response should wake up the trans 168 * (i.e. mark it as non-idle). 169 * @CMD_WANT_ASYNC_CALLBACK: the op_mode's async callback function must be 170 * called after this command completes. Valid only with CMD_ASYNC. 171 */ 172 enum CMD_MODE { 173 CMD_ASYNC = BIT(0), 174 CMD_WANT_SKB = BIT(1), 175 CMD_SEND_IN_RFKILL = BIT(2), 176 CMD_HIGH_PRIO = BIT(3), 177 CMD_SEND_IN_IDLE = BIT(4), 178 CMD_MAKE_TRANS_IDLE = BIT(5), 179 CMD_WAKE_UP_TRANS = BIT(6), 180 CMD_WANT_ASYNC_CALLBACK = BIT(7), 181 }; 182 183 #define DEF_CMD_PAYLOAD_SIZE 320 184 185 /** 186 * struct iwl_device_cmd 187 * 188 * For allocation of the command and tx queues, this establishes the overall 189 * size of the largest command we send to uCode, except for commands that 190 * aren't fully copied and use other TFD space. 191 */ 192 struct iwl_device_cmd { 193 union { 194 struct { 195 struct iwl_cmd_header hdr; /* uCode API */ 196 u8 payload[DEF_CMD_PAYLOAD_SIZE]; 197 }; 198 struct { 199 struct iwl_cmd_header_wide hdr_wide; 200 u8 payload_wide[DEF_CMD_PAYLOAD_SIZE - 201 sizeof(struct iwl_cmd_header_wide) + 202 sizeof(struct iwl_cmd_header)]; 203 }; 204 }; 205 } __packed; 206 207 #define TFD_MAX_PAYLOAD_SIZE (sizeof(struct iwl_device_cmd)) 208 209 /* 210 * number of transfer buffers (fragments) per transmit frame descriptor; 211 * this is just the driver's idea, the hardware supports 20 212 */ 213 #define IWL_MAX_CMD_TBS_PER_TFD 2 214 215 /** 216 * enum iwl_hcmd_dataflag - flag for each one of the chunks of the command 217 * 218 * @IWL_HCMD_DFL_NOCOPY: By default, the command is copied to the host command's 219 * ring. The transport layer doesn't map the command's buffer to DMA, but 220 * rather copies it to a previously allocated DMA buffer. This flag tells 221 * the transport layer not to copy the command, but to map the existing 222 * buffer (that is passed in) instead. This saves the memcpy and allows 223 * commands that are bigger than the fixed buffer to be submitted. 224 * Note that a TFD entry after a NOCOPY one cannot be a normal copied one. 225 * @IWL_HCMD_DFL_DUP: Only valid without NOCOPY, duplicate the memory for this 226 * chunk internally and free it again after the command completes. This 227 * can (currently) be used only once per command. 228 * Note that a TFD entry after a DUP one cannot be a normal copied one. 229 */ 230 enum iwl_hcmd_dataflag { 231 IWL_HCMD_DFL_NOCOPY = BIT(0), 232 IWL_HCMD_DFL_DUP = BIT(1), 233 }; 234 235 enum iwl_error_event_table_status { 236 IWL_ERROR_EVENT_TABLE_LMAC1 = BIT(0), 237 IWL_ERROR_EVENT_TABLE_LMAC2 = BIT(1), 238 IWL_ERROR_EVENT_TABLE_UMAC = BIT(2), 239 }; 240 241 /** 242 * struct iwl_host_cmd - Host command to the uCode 243 * 244 * @data: array of chunks that composes the data of the host command 245 * @resp_pkt: response packet, if %CMD_WANT_SKB was set 246 * @_rx_page_order: (internally used to free response packet) 247 * @_rx_page_addr: (internally used to free response packet) 248 * @flags: can be CMD_* 249 * @len: array of the lengths of the chunks in data 250 * @dataflags: IWL_HCMD_DFL_* 251 * @id: command id of the host command, for wide commands encoding the 252 * version and group as well 253 */ 254 struct iwl_host_cmd { 255 const void *data[IWL_MAX_CMD_TBS_PER_TFD]; 256 struct iwl_rx_packet *resp_pkt; 257 unsigned long _rx_page_addr; 258 u32 _rx_page_order; 259 260 u32 flags; 261 u32 id; 262 u16 len[IWL_MAX_CMD_TBS_PER_TFD]; 263 u8 dataflags[IWL_MAX_CMD_TBS_PER_TFD]; 264 }; 265 266 static inline void iwl_free_resp(struct iwl_host_cmd *cmd) 267 { 268 free_pages(cmd->_rx_page_addr, cmd->_rx_page_order); 269 } 270 271 struct iwl_rx_cmd_buffer { 272 struct page *_page; 273 int _offset; 274 bool _page_stolen; 275 u32 _rx_page_order; 276 unsigned int truesize; 277 }; 278 279 static inline void *rxb_addr(struct iwl_rx_cmd_buffer *r) 280 { 281 return (void *)((unsigned long)page_address(r->_page) + r->_offset); 282 } 283 284 static inline int rxb_offset(struct iwl_rx_cmd_buffer *r) 285 { 286 return r->_offset; 287 } 288 289 static inline struct page *rxb_steal_page(struct iwl_rx_cmd_buffer *r) 290 { 291 r->_page_stolen = true; 292 get_page(r->_page); 293 return r->_page; 294 } 295 296 static inline void iwl_free_rxb(struct iwl_rx_cmd_buffer *r) 297 { 298 __free_pages(r->_page, r->_rx_page_order); 299 } 300 301 #define MAX_NO_RECLAIM_CMDS 6 302 303 #define IWL_MASK(lo, hi) ((1 << (hi)) | ((1 << (hi)) - (1 << (lo)))) 304 305 /* 306 * Maximum number of HW queues the transport layer 307 * currently supports 308 */ 309 #define IWL_MAX_HW_QUEUES 32 310 #define IWL_MAX_TVQM_QUEUES 512 311 312 #define IWL_MAX_TID_COUNT 8 313 #define IWL_MGMT_TID 15 314 #define IWL_FRAME_LIMIT 64 315 #define IWL_MAX_RX_HW_QUEUES 16 316 317 /** 318 * enum iwl_wowlan_status - WoWLAN image/device status 319 * @IWL_D3_STATUS_ALIVE: firmware is still running after resume 320 * @IWL_D3_STATUS_RESET: device was reset while suspended 321 */ 322 enum iwl_d3_status { 323 IWL_D3_STATUS_ALIVE, 324 IWL_D3_STATUS_RESET, 325 }; 326 327 /** 328 * enum iwl_trans_status: transport status flags 329 * @STATUS_SYNC_HCMD_ACTIVE: a SYNC command is being processed 330 * @STATUS_DEVICE_ENABLED: APM is enabled 331 * @STATUS_TPOWER_PMI: the device might be asleep (need to wake it up) 332 * @STATUS_INT_ENABLED: interrupts are enabled 333 * @STATUS_RFKILL_HW: the actual HW state of the RF-kill switch 334 * @STATUS_RFKILL_OPMODE: RF-kill state reported to opmode 335 * @STATUS_FW_ERROR: the fw is in error state 336 * @STATUS_TRANS_GOING_IDLE: shutting down the trans, only special commands 337 * are sent 338 * @STATUS_TRANS_IDLE: the trans is idle - general commands are not to be sent 339 * @STATUS_TRANS_DEAD: trans is dead - avoid any read/write operation 340 */ 341 enum iwl_trans_status { 342 STATUS_SYNC_HCMD_ACTIVE, 343 STATUS_DEVICE_ENABLED, 344 STATUS_TPOWER_PMI, 345 STATUS_INT_ENABLED, 346 STATUS_RFKILL_HW, 347 STATUS_RFKILL_OPMODE, 348 STATUS_FW_ERROR, 349 STATUS_TRANS_GOING_IDLE, 350 STATUS_TRANS_IDLE, 351 STATUS_TRANS_DEAD, 352 }; 353 354 static inline int 355 iwl_trans_get_rb_size_order(enum iwl_amsdu_size rb_size) 356 { 357 switch (rb_size) { 358 case IWL_AMSDU_2K: 359 return get_order(2 * 1024); 360 case IWL_AMSDU_4K: 361 return get_order(4 * 1024); 362 case IWL_AMSDU_8K: 363 return get_order(8 * 1024); 364 case IWL_AMSDU_12K: 365 return get_order(12 * 1024); 366 default: 367 WARN_ON(1); 368 return -1; 369 } 370 } 371 372 struct iwl_hcmd_names { 373 u8 cmd_id; 374 const char *const cmd_name; 375 }; 376 377 #define HCMD_NAME(x) \ 378 { .cmd_id = x, .cmd_name = #x } 379 380 struct iwl_hcmd_arr { 381 const struct iwl_hcmd_names *arr; 382 int size; 383 }; 384 385 #define HCMD_ARR(x) \ 386 { .arr = x, .size = ARRAY_SIZE(x) } 387 388 /** 389 * struct iwl_trans_config - transport configuration 390 * 391 * @op_mode: pointer to the upper layer. 392 * @cmd_queue: the index of the command queue. 393 * Must be set before start_fw. 394 * @cmd_fifo: the fifo for host commands 395 * @cmd_q_wdg_timeout: the timeout of the watchdog timer for the command queue. 396 * @no_reclaim_cmds: Some devices erroneously don't set the 397 * SEQ_RX_FRAME bit on some notifications, this is the 398 * list of such notifications to filter. Max length is 399 * %MAX_NO_RECLAIM_CMDS. 400 * @n_no_reclaim_cmds: # of commands in list 401 * @rx_buf_size: RX buffer size needed for A-MSDUs 402 * if unset 4k will be the RX buffer size 403 * @bc_table_dword: set to true if the BC table expects the byte count to be 404 * in DWORD (as opposed to bytes) 405 * @scd_set_active: should the transport configure the SCD for HCMD queue 406 * @sw_csum_tx: transport should compute the TCP checksum 407 * @command_groups: array of command groups, each member is an array of the 408 * commands in the group; for debugging only 409 * @command_groups_size: number of command groups, to avoid illegal access 410 * @cb_data_offs: offset inside skb->cb to store transport data at, must have 411 * space for at least two pointers 412 */ 413 struct iwl_trans_config { 414 struct iwl_op_mode *op_mode; 415 416 u8 cmd_queue; 417 u8 cmd_fifo; 418 unsigned int cmd_q_wdg_timeout; 419 const u8 *no_reclaim_cmds; 420 unsigned int n_no_reclaim_cmds; 421 422 enum iwl_amsdu_size rx_buf_size; 423 bool bc_table_dword; 424 bool scd_set_active; 425 bool sw_csum_tx; 426 const struct iwl_hcmd_arr *command_groups; 427 int command_groups_size; 428 429 u8 cb_data_offs; 430 }; 431 432 struct iwl_trans_dump_data { 433 u32 len; 434 u8 data[]; 435 }; 436 437 struct iwl_trans; 438 439 struct iwl_trans_txq_scd_cfg { 440 u8 fifo; 441 u8 sta_id; 442 u8 tid; 443 bool aggregate; 444 int frame_limit; 445 }; 446 447 /** 448 * struct iwl_trans_rxq_dma_data - RX queue DMA data 449 * @fr_bd_cb: DMA address of free BD cyclic buffer 450 * @fr_bd_wid: Initial write index of the free BD cyclic buffer 451 * @urbd_stts_wrptr: DMA address of urbd_stts_wrptr 452 * @ur_bd_cb: DMA address of used BD cyclic buffer 453 */ 454 struct iwl_trans_rxq_dma_data { 455 u64 fr_bd_cb; 456 u32 fr_bd_wid; 457 u64 urbd_stts_wrptr; 458 u64 ur_bd_cb; 459 }; 460 461 /** 462 * struct iwl_trans_ops - transport specific operations 463 * 464 * All the handlers MUST be implemented 465 * 466 * @start_hw: starts the HW. If low_power is true, the NIC needs to be taken 467 * out of a low power state. From that point on, the HW can send 468 * interrupts. May sleep. 469 * @op_mode_leave: Turn off the HW RF kill indication if on 470 * May sleep 471 * @start_fw: allocates and inits all the resources for the transport 472 * layer. Also kick a fw image. 473 * May sleep 474 * @fw_alive: called when the fw sends alive notification. If the fw provides 475 * the SCD base address in SRAM, then provide it here, or 0 otherwise. 476 * May sleep 477 * @stop_device: stops the whole device (embedded CPU put to reset) and stops 478 * the HW. If low_power is true, the NIC will be put in low power state. 479 * From that point on, the HW will be stopped but will still issue an 480 * interrupt if the HW RF kill switch is triggered. 481 * This callback must do the right thing and not crash even if %start_hw() 482 * was called but not &start_fw(). May sleep. 483 * @d3_suspend: put the device into the correct mode for WoWLAN during 484 * suspend. This is optional, if not implemented WoWLAN will not be 485 * supported. This callback may sleep. 486 * @d3_resume: resume the device after WoWLAN, enabling the opmode to 487 * talk to the WoWLAN image to get its status. This is optional, if not 488 * implemented WoWLAN will not be supported. This callback may sleep. 489 * @send_cmd:send a host command. Must return -ERFKILL if RFkill is asserted. 490 * If RFkill is asserted in the middle of a SYNC host command, it must 491 * return -ERFKILL straight away. 492 * May sleep only if CMD_ASYNC is not set 493 * @tx: send an skb. The transport relies on the op_mode to zero the 494 * the ieee80211_tx_info->driver_data. If the MPDU is an A-MSDU, all 495 * the CSUM will be taken care of (TCP CSUM and IP header in case of 496 * IPv4). If the MPDU is a single MSDU, the op_mode must compute the IP 497 * header if it is IPv4. 498 * Must be atomic 499 * @reclaim: free packet until ssn. Returns a list of freed packets. 500 * Must be atomic 501 * @txq_enable: setup a queue. To setup an AC queue, use the 502 * iwl_trans_ac_txq_enable wrapper. fw_alive must have been called before 503 * this one. The op_mode must not configure the HCMD queue. The scheduler 504 * configuration may be %NULL, in which case the hardware will not be 505 * configured. If true is returned, the operation mode needs to increment 506 * the sequence number of the packets routed to this queue because of a 507 * hardware scheduler bug. May sleep. 508 * @txq_disable: de-configure a Tx queue to send AMPDUs 509 * Must be atomic 510 * @txq_set_shared_mode: change Tx queue shared/unshared marking 511 * @wait_tx_queues_empty: wait until tx queues are empty. May sleep. 512 * @wait_txq_empty: wait until specific tx queue is empty. May sleep. 513 * @freeze_txq_timer: prevents the timer of the queue from firing until the 514 * queue is set to awake. Must be atomic. 515 * @block_txq_ptrs: stop updating the write pointers of the Tx queues. Note 516 * that the transport needs to refcount the calls since this function 517 * will be called several times with block = true, and then the queues 518 * need to be unblocked only after the same number of calls with 519 * block = false. 520 * @write8: write a u8 to a register at offset ofs from the BAR 521 * @write32: write a u32 to a register at offset ofs from the BAR 522 * @read32: read a u32 register at offset ofs from the BAR 523 * @read_prph: read a DWORD from a periphery register 524 * @write_prph: write a DWORD to a periphery register 525 * @read_mem: read device's SRAM in DWORD 526 * @write_mem: write device's SRAM in DWORD. If %buf is %NULL, then the memory 527 * will be zeroed. 528 * @configure: configure parameters required by the transport layer from 529 * the op_mode. May be called several times before start_fw, can't be 530 * called after that. 531 * @set_pmi: set the power pmi state 532 * @grab_nic_access: wake the NIC to be able to access non-HBUS regs. 533 * Sleeping is not allowed between grab_nic_access and 534 * release_nic_access. 535 * @release_nic_access: let the NIC go to sleep. The "flags" parameter 536 * must be the same one that was sent before to the grab_nic_access. 537 * @set_bits_mask - set SRAM register according to value and mask. 538 * @ref: grab a reference to the transport/FW layers, disallowing 539 * certain low power states 540 * @unref: release a reference previously taken with @ref. Note that 541 * initially the reference count is 1, making an initial @unref 542 * necessary to allow low power states. 543 * @dump_data: return a vmalloc'ed buffer with debug data, maybe containing last 544 * TX'ed commands and similar. The buffer will be vfree'd by the caller. 545 * Note that the transport must fill in the proper file headers. 546 * @debugfs_cleanup: used in the driver unload flow to make a proper cleanup 547 * of the trans debugfs 548 */ 549 struct iwl_trans_ops { 550 551 int (*start_hw)(struct iwl_trans *iwl_trans, bool low_power); 552 void (*op_mode_leave)(struct iwl_trans *iwl_trans); 553 int (*start_fw)(struct iwl_trans *trans, const struct fw_img *fw, 554 bool run_in_rfkill); 555 void (*fw_alive)(struct iwl_trans *trans, u32 scd_addr); 556 void (*stop_device)(struct iwl_trans *trans, bool low_power); 557 558 void (*d3_suspend)(struct iwl_trans *trans, bool test, bool reset); 559 int (*d3_resume)(struct iwl_trans *trans, enum iwl_d3_status *status, 560 bool test, bool reset); 561 562 int (*send_cmd)(struct iwl_trans *trans, struct iwl_host_cmd *cmd); 563 564 int (*tx)(struct iwl_trans *trans, struct sk_buff *skb, 565 struct iwl_device_cmd *dev_cmd, int queue); 566 void (*reclaim)(struct iwl_trans *trans, int queue, int ssn, 567 struct sk_buff_head *skbs); 568 569 bool (*txq_enable)(struct iwl_trans *trans, int queue, u16 ssn, 570 const struct iwl_trans_txq_scd_cfg *cfg, 571 unsigned int queue_wdg_timeout); 572 void (*txq_disable)(struct iwl_trans *trans, int queue, 573 bool configure_scd); 574 /* 22000 functions */ 575 int (*txq_alloc)(struct iwl_trans *trans, 576 __le16 flags, u8 sta_id, u8 tid, 577 int cmd_id, int size, 578 unsigned int queue_wdg_timeout); 579 void (*txq_free)(struct iwl_trans *trans, int queue); 580 int (*rxq_dma_data)(struct iwl_trans *trans, int queue, 581 struct iwl_trans_rxq_dma_data *data); 582 583 void (*txq_set_shared_mode)(struct iwl_trans *trans, u32 txq_id, 584 bool shared); 585 586 int (*wait_tx_queues_empty)(struct iwl_trans *trans, u32 txq_bm); 587 int (*wait_txq_empty)(struct iwl_trans *trans, int queue); 588 void (*freeze_txq_timer)(struct iwl_trans *trans, unsigned long txqs, 589 bool freeze); 590 void (*block_txq_ptrs)(struct iwl_trans *trans, bool block); 591 592 void (*write8)(struct iwl_trans *trans, u32 ofs, u8 val); 593 void (*write32)(struct iwl_trans *trans, u32 ofs, u32 val); 594 u32 (*read32)(struct iwl_trans *trans, u32 ofs); 595 u32 (*read_prph)(struct iwl_trans *trans, u32 ofs); 596 void (*write_prph)(struct iwl_trans *trans, u32 ofs, u32 val); 597 int (*read_mem)(struct iwl_trans *trans, u32 addr, 598 void *buf, int dwords); 599 int (*write_mem)(struct iwl_trans *trans, u32 addr, 600 const void *buf, int dwords); 601 void (*configure)(struct iwl_trans *trans, 602 const struct iwl_trans_config *trans_cfg); 603 void (*set_pmi)(struct iwl_trans *trans, bool state); 604 void (*sw_reset)(struct iwl_trans *trans); 605 bool (*grab_nic_access)(struct iwl_trans *trans, unsigned long *flags); 606 void (*release_nic_access)(struct iwl_trans *trans, 607 unsigned long *flags); 608 void (*set_bits_mask)(struct iwl_trans *trans, u32 reg, u32 mask, 609 u32 value); 610 void (*ref)(struct iwl_trans *trans); 611 void (*unref)(struct iwl_trans *trans); 612 int (*suspend)(struct iwl_trans *trans); 613 void (*resume)(struct iwl_trans *trans); 614 615 struct iwl_trans_dump_data *(*dump_data)(struct iwl_trans *trans, 616 u32 dump_mask); 617 void (*debugfs_cleanup)(struct iwl_trans *trans); 618 void (*sync_nmi)(struct iwl_trans *trans); 619 }; 620 621 /** 622 * enum iwl_trans_state - state of the transport layer 623 * 624 * @IWL_TRANS_NO_FW: no fw has sent an alive response 625 * @IWL_TRANS_FW_ALIVE: a fw has sent an alive response 626 */ 627 enum iwl_trans_state { 628 IWL_TRANS_NO_FW = 0, 629 IWL_TRANS_FW_ALIVE = 1, 630 }; 631 632 /** 633 * DOC: Platform power management 634 * 635 * There are two types of platform power management: system-wide 636 * (WoWLAN) and runtime. 637 * 638 * In system-wide power management the entire platform goes into a low 639 * power state (e.g. idle or suspend to RAM) at the same time and the 640 * device is configured as a wakeup source for the entire platform. 641 * This is usually triggered by userspace activity (e.g. the user 642 * presses the suspend button or a power management daemon decides to 643 * put the platform in low power mode). The device's behavior in this 644 * mode is dictated by the wake-on-WLAN configuration. 645 * 646 * In runtime power management, only the devices which are themselves 647 * idle enter a low power state. This is done at runtime, which means 648 * that the entire system is still running normally. This mode is 649 * usually triggered automatically by the device driver and requires 650 * the ability to enter and exit the low power modes in a very short 651 * time, so there is not much impact in usability. 652 * 653 * The terms used for the device's behavior are as follows: 654 * 655 * - D0: the device is fully powered and the host is awake; 656 * - D3: the device is in low power mode and only reacts to 657 * specific events (e.g. magic-packet received or scan 658 * results found); 659 * - D0I3: the device is in low power mode and reacts to any 660 * activity (e.g. RX); 661 * 662 * These terms reflect the power modes in the firmware and are not to 663 * be confused with the physical device power state. The NIC can be 664 * in D0I3 mode even if, for instance, the PCI device is in D3 state. 665 */ 666 667 /** 668 * enum iwl_plat_pm_mode - platform power management mode 669 * 670 * This enumeration describes the device's platform power management 671 * behavior when in idle mode (i.e. runtime power management) or when 672 * in system-wide suspend (i.e WoWLAN). 673 * 674 * @IWL_PLAT_PM_MODE_DISABLED: power management is disabled for this 675 * device. At runtime, this means that nothing happens and the 676 * device always remains in active. In system-wide suspend mode, 677 * it means that the all connections will be closed automatically 678 * by mac80211 before the platform is suspended. 679 * @IWL_PLAT_PM_MODE_D3: the device goes into D3 mode (i.e. WoWLAN). 680 * For runtime power management, this mode is not officially 681 * supported. 682 * @IWL_PLAT_PM_MODE_D0I3: the device goes into D0I3 mode. 683 */ 684 enum iwl_plat_pm_mode { 685 IWL_PLAT_PM_MODE_DISABLED, 686 IWL_PLAT_PM_MODE_D3, 687 IWL_PLAT_PM_MODE_D0I3, 688 }; 689 690 /* Max time to wait for trans to become idle/non-idle on d0i3 691 * enter/exit (in msecs). 692 */ 693 #define IWL_TRANS_IDLE_TIMEOUT 2000 694 695 /* Max time to wait for nmi interrupt */ 696 #define IWL_TRANS_NMI_TIMEOUT (HZ / 4) 697 698 /** 699 * struct iwl_dram_data 700 * @physical: page phy pointer 701 * @block: pointer to the allocated block/page 702 * @size: size of the block/page 703 */ 704 struct iwl_dram_data { 705 dma_addr_t physical; 706 void *block; 707 int size; 708 }; 709 710 /** 711 * struct iwl_self_init_dram - dram data used by self init process 712 * @fw: lmac and umac dram data 713 * @fw_cnt: total number of items in array 714 * @paging: paging dram data 715 * @paging_cnt: total number of items in array 716 */ 717 struct iwl_self_init_dram { 718 struct iwl_dram_data *fw; 719 int fw_cnt; 720 struct iwl_dram_data *paging; 721 int paging_cnt; 722 }; 723 724 /** 725 * struct iwl_trans - transport common data 726 * 727 * @ops - pointer to iwl_trans_ops 728 * @op_mode - pointer to the op_mode 729 * @cfg - pointer to the configuration 730 * @drv - pointer to iwl_drv 731 * @status: a bit-mask of transport status flags 732 * @dev - pointer to struct device * that represents the device 733 * @max_skb_frags: maximum number of fragments an SKB can have when transmitted. 734 * 0 indicates that frag SKBs (NETIF_F_SG) aren't supported. 735 * @hw_rf_id a u32 with the device RF ID 736 * @hw_id: a u32 with the ID of the device / sub-device. 737 * Set during transport allocation. 738 * @hw_id_str: a string with info about HW ID. Set during transport allocation. 739 * @pm_support: set to true in start_hw if link pm is supported 740 * @ltr_enabled: set to true if the LTR is enabled 741 * @wide_cmd_header: true when ucode supports wide command header format 742 * @num_rx_queues: number of RX queues allocated by the transport; 743 * the transport must set this before calling iwl_drv_start() 744 * @iml_len: the length of the image loader 745 * @iml: a pointer to the image loader itself 746 * @dev_cmd_pool: pool for Tx cmd allocation - for internal use only. 747 * The user should use iwl_trans_{alloc,free}_tx_cmd. 748 * @rx_mpdu_cmd: MPDU RX command ID, must be assigned by opmode before 749 * starting the firmware, used for tracing 750 * @rx_mpdu_cmd_hdr_size: used for tracing, amount of data before the 751 * start of the 802.11 header in the @rx_mpdu_cmd 752 * @dflt_pwr_limit: default power limit fetched from the platform (ACPI) 753 * @dbg_dest_tlv: points to the destination TLV for debug 754 * @dbg_conf_tlv: array of pointers to configuration TLVs for debug 755 * @dbg_trigger_tlv: array of pointers to triggers TLVs for debug 756 * @dbg_n_dest_reg: num of reg_ops in %dbg_dest_tlv 757 * @num_blocks: number of blocks in fw_mon 758 * @fw_mon: address of the buffers for firmware monitor 759 * @system_pm_mode: the system-wide power management mode in use. 760 * This mode is set dynamically, depending on the WoWLAN values 761 * configured from the userspace at runtime. 762 * @runtime_pm_mode: the runtime power management mode in use. This 763 * mode is set during the initialization phase and is not 764 * supposed to change during runtime. 765 * @dbg_rec_on: true iff there is a fw debug recording currently active 766 * @lmac_error_event_table: addrs of lmacs error tables 767 * @umac_error_event_table: addr of umac error table 768 * @error_event_table_tlv_status: bitmap that indicates what error table 769 * pointers was recevied via TLV. use enum &iwl_error_event_table_status 770 * @hw_error: equals true if hw error interrupt was received from the FW 771 */ 772 struct iwl_trans { 773 const struct iwl_trans_ops *ops; 774 struct iwl_op_mode *op_mode; 775 const struct iwl_cfg *cfg; 776 struct iwl_drv *drv; 777 enum iwl_trans_state state; 778 unsigned long status; 779 780 struct device *dev; 781 u32 max_skb_frags; 782 u32 hw_rev; 783 u32 hw_rf_id; 784 u32 hw_id; 785 char hw_id_str[52]; 786 787 u8 rx_mpdu_cmd, rx_mpdu_cmd_hdr_size; 788 789 bool pm_support; 790 bool ltr_enabled; 791 792 const struct iwl_hcmd_arr *command_groups; 793 int command_groups_size; 794 bool wide_cmd_header; 795 796 u8 num_rx_queues; 797 798 size_t iml_len; 799 u8 *iml; 800 801 /* The following fields are internal only */ 802 struct kmem_cache *dev_cmd_pool; 803 char dev_cmd_pool_name[50]; 804 805 struct dentry *dbgfs_dir; 806 807 #ifdef CONFIG_LOCKDEP 808 struct lockdep_map sync_cmd_lockdep_map; 809 #endif 810 811 struct iwl_apply_point_data apply_points[IWL_FW_INI_APPLY_NUM]; 812 struct iwl_apply_point_data apply_points_ext[IWL_FW_INI_APPLY_NUM]; 813 814 bool external_ini_loaded; 815 bool ini_valid; 816 817 const struct iwl_fw_dbg_dest_tlv_v1 *dbg_dest_tlv; 818 const struct iwl_fw_dbg_conf_tlv *dbg_conf_tlv[FW_DBG_CONF_MAX]; 819 struct iwl_fw_dbg_trigger_tlv * const *dbg_trigger_tlv; 820 u8 dbg_n_dest_reg; 821 int num_blocks; 822 struct iwl_dram_data fw_mon[IWL_FW_INI_APPLY_NUM]; 823 struct iwl_self_init_dram init_dram; 824 825 enum iwl_plat_pm_mode system_pm_mode; 826 enum iwl_plat_pm_mode runtime_pm_mode; 827 bool suspending; 828 bool dbg_rec_on; 829 830 u32 lmac_error_event_table[2]; 831 u32 umac_error_event_table; 832 unsigned int error_event_table_tlv_status; 833 bool hw_error; 834 835 /* pointer to trans specific struct */ 836 /*Ensure that this pointer will always be aligned to sizeof pointer */ 837 char trans_specific[0] __aligned(sizeof(void *)); 838 }; 839 840 const char *iwl_get_cmd_string(struct iwl_trans *trans, u32 id); 841 int iwl_cmd_groups_verify_sorted(const struct iwl_trans_config *trans); 842 843 static inline void iwl_trans_configure(struct iwl_trans *trans, 844 const struct iwl_trans_config *trans_cfg) 845 { 846 trans->op_mode = trans_cfg->op_mode; 847 848 trans->ops->configure(trans, trans_cfg); 849 WARN_ON(iwl_cmd_groups_verify_sorted(trans_cfg)); 850 } 851 852 static inline int _iwl_trans_start_hw(struct iwl_trans *trans, bool low_power) 853 { 854 might_sleep(); 855 856 return trans->ops->start_hw(trans, low_power); 857 } 858 859 static inline int iwl_trans_start_hw(struct iwl_trans *trans) 860 { 861 return trans->ops->start_hw(trans, true); 862 } 863 864 static inline void iwl_trans_op_mode_leave(struct iwl_trans *trans) 865 { 866 might_sleep(); 867 868 if (trans->ops->op_mode_leave) 869 trans->ops->op_mode_leave(trans); 870 871 trans->op_mode = NULL; 872 873 trans->state = IWL_TRANS_NO_FW; 874 } 875 876 static inline void iwl_trans_fw_alive(struct iwl_trans *trans, u32 scd_addr) 877 { 878 might_sleep(); 879 880 trans->state = IWL_TRANS_FW_ALIVE; 881 882 trans->ops->fw_alive(trans, scd_addr); 883 } 884 885 static inline int iwl_trans_start_fw(struct iwl_trans *trans, 886 const struct fw_img *fw, 887 bool run_in_rfkill) 888 { 889 might_sleep(); 890 891 WARN_ON_ONCE(!trans->rx_mpdu_cmd); 892 893 clear_bit(STATUS_FW_ERROR, &trans->status); 894 return trans->ops->start_fw(trans, fw, run_in_rfkill); 895 } 896 897 static inline void _iwl_trans_stop_device(struct iwl_trans *trans, 898 bool low_power) 899 { 900 might_sleep(); 901 902 trans->ops->stop_device(trans, low_power); 903 904 trans->state = IWL_TRANS_NO_FW; 905 } 906 907 static inline void iwl_trans_stop_device(struct iwl_trans *trans) 908 { 909 _iwl_trans_stop_device(trans, true); 910 } 911 912 static inline void iwl_trans_d3_suspend(struct iwl_trans *trans, bool test, 913 bool reset) 914 { 915 might_sleep(); 916 if (trans->ops->d3_suspend) 917 trans->ops->d3_suspend(trans, test, reset); 918 } 919 920 static inline int iwl_trans_d3_resume(struct iwl_trans *trans, 921 enum iwl_d3_status *status, 922 bool test, bool reset) 923 { 924 might_sleep(); 925 if (!trans->ops->d3_resume) 926 return 0; 927 928 return trans->ops->d3_resume(trans, status, test, reset); 929 } 930 931 static inline int iwl_trans_suspend(struct iwl_trans *trans) 932 { 933 if (!trans->ops->suspend) 934 return 0; 935 936 return trans->ops->suspend(trans); 937 } 938 939 static inline void iwl_trans_resume(struct iwl_trans *trans) 940 { 941 if (trans->ops->resume) 942 trans->ops->resume(trans); 943 } 944 945 static inline struct iwl_trans_dump_data * 946 iwl_trans_dump_data(struct iwl_trans *trans, u32 dump_mask) 947 { 948 if (!trans->ops->dump_data) 949 return NULL; 950 return trans->ops->dump_data(trans, dump_mask); 951 } 952 953 static inline struct iwl_device_cmd * 954 iwl_trans_alloc_tx_cmd(struct iwl_trans *trans) 955 { 956 return kmem_cache_alloc(trans->dev_cmd_pool, GFP_ATOMIC); 957 } 958 959 int iwl_trans_send_cmd(struct iwl_trans *trans, struct iwl_host_cmd *cmd); 960 961 static inline void iwl_trans_free_tx_cmd(struct iwl_trans *trans, 962 struct iwl_device_cmd *dev_cmd) 963 { 964 kmem_cache_free(trans->dev_cmd_pool, dev_cmd); 965 } 966 967 static inline int iwl_trans_tx(struct iwl_trans *trans, struct sk_buff *skb, 968 struct iwl_device_cmd *dev_cmd, int queue) 969 { 970 if (unlikely(test_bit(STATUS_FW_ERROR, &trans->status))) 971 return -EIO; 972 973 if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) { 974 IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state); 975 return -EIO; 976 } 977 978 return trans->ops->tx(trans, skb, dev_cmd, queue); 979 } 980 981 static inline void iwl_trans_reclaim(struct iwl_trans *trans, int queue, 982 int ssn, struct sk_buff_head *skbs) 983 { 984 if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) { 985 IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state); 986 return; 987 } 988 989 trans->ops->reclaim(trans, queue, ssn, skbs); 990 } 991 992 static inline void iwl_trans_txq_disable(struct iwl_trans *trans, int queue, 993 bool configure_scd) 994 { 995 trans->ops->txq_disable(trans, queue, configure_scd); 996 } 997 998 static inline bool 999 iwl_trans_txq_enable_cfg(struct iwl_trans *trans, int queue, u16 ssn, 1000 const struct iwl_trans_txq_scd_cfg *cfg, 1001 unsigned int queue_wdg_timeout) 1002 { 1003 might_sleep(); 1004 1005 if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) { 1006 IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state); 1007 return false; 1008 } 1009 1010 return trans->ops->txq_enable(trans, queue, ssn, 1011 cfg, queue_wdg_timeout); 1012 } 1013 1014 static inline int 1015 iwl_trans_get_rxq_dma_data(struct iwl_trans *trans, int queue, 1016 struct iwl_trans_rxq_dma_data *data) 1017 { 1018 if (WARN_ON_ONCE(!trans->ops->rxq_dma_data)) 1019 return -ENOTSUPP; 1020 1021 return trans->ops->rxq_dma_data(trans, queue, data); 1022 } 1023 1024 static inline void 1025 iwl_trans_txq_free(struct iwl_trans *trans, int queue) 1026 { 1027 if (WARN_ON_ONCE(!trans->ops->txq_free)) 1028 return; 1029 1030 trans->ops->txq_free(trans, queue); 1031 } 1032 1033 static inline int 1034 iwl_trans_txq_alloc(struct iwl_trans *trans, 1035 __le16 flags, u8 sta_id, u8 tid, 1036 int cmd_id, int size, 1037 unsigned int wdg_timeout) 1038 { 1039 might_sleep(); 1040 1041 if (WARN_ON_ONCE(!trans->ops->txq_alloc)) 1042 return -ENOTSUPP; 1043 1044 if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) { 1045 IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state); 1046 return -EIO; 1047 } 1048 1049 return trans->ops->txq_alloc(trans, flags, sta_id, tid, 1050 cmd_id, size, wdg_timeout); 1051 } 1052 1053 static inline void iwl_trans_txq_set_shared_mode(struct iwl_trans *trans, 1054 int queue, bool shared_mode) 1055 { 1056 if (trans->ops->txq_set_shared_mode) 1057 trans->ops->txq_set_shared_mode(trans, queue, shared_mode); 1058 } 1059 1060 static inline void iwl_trans_txq_enable(struct iwl_trans *trans, int queue, 1061 int fifo, int sta_id, int tid, 1062 int frame_limit, u16 ssn, 1063 unsigned int queue_wdg_timeout) 1064 { 1065 struct iwl_trans_txq_scd_cfg cfg = { 1066 .fifo = fifo, 1067 .sta_id = sta_id, 1068 .tid = tid, 1069 .frame_limit = frame_limit, 1070 .aggregate = sta_id >= 0, 1071 }; 1072 1073 iwl_trans_txq_enable_cfg(trans, queue, ssn, &cfg, queue_wdg_timeout); 1074 } 1075 1076 static inline 1077 void iwl_trans_ac_txq_enable(struct iwl_trans *trans, int queue, int fifo, 1078 unsigned int queue_wdg_timeout) 1079 { 1080 struct iwl_trans_txq_scd_cfg cfg = { 1081 .fifo = fifo, 1082 .sta_id = -1, 1083 .tid = IWL_MAX_TID_COUNT, 1084 .frame_limit = IWL_FRAME_LIMIT, 1085 .aggregate = false, 1086 }; 1087 1088 iwl_trans_txq_enable_cfg(trans, queue, 0, &cfg, queue_wdg_timeout); 1089 } 1090 1091 static inline void iwl_trans_freeze_txq_timer(struct iwl_trans *trans, 1092 unsigned long txqs, 1093 bool freeze) 1094 { 1095 if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) { 1096 IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state); 1097 return; 1098 } 1099 1100 if (trans->ops->freeze_txq_timer) 1101 trans->ops->freeze_txq_timer(trans, txqs, freeze); 1102 } 1103 1104 static inline void iwl_trans_block_txq_ptrs(struct iwl_trans *trans, 1105 bool block) 1106 { 1107 if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) { 1108 IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state); 1109 return; 1110 } 1111 1112 if (trans->ops->block_txq_ptrs) 1113 trans->ops->block_txq_ptrs(trans, block); 1114 } 1115 1116 static inline int iwl_trans_wait_tx_queues_empty(struct iwl_trans *trans, 1117 u32 txqs) 1118 { 1119 if (WARN_ON_ONCE(!trans->ops->wait_tx_queues_empty)) 1120 return -ENOTSUPP; 1121 1122 if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) { 1123 IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state); 1124 return -EIO; 1125 } 1126 1127 return trans->ops->wait_tx_queues_empty(trans, txqs); 1128 } 1129 1130 static inline int iwl_trans_wait_txq_empty(struct iwl_trans *trans, int queue) 1131 { 1132 if (WARN_ON_ONCE(!trans->ops->wait_txq_empty)) 1133 return -ENOTSUPP; 1134 1135 if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) { 1136 IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state); 1137 return -EIO; 1138 } 1139 1140 return trans->ops->wait_txq_empty(trans, queue); 1141 } 1142 1143 static inline void iwl_trans_write8(struct iwl_trans *trans, u32 ofs, u8 val) 1144 { 1145 trans->ops->write8(trans, ofs, val); 1146 } 1147 1148 static inline void iwl_trans_write32(struct iwl_trans *trans, u32 ofs, u32 val) 1149 { 1150 trans->ops->write32(trans, ofs, val); 1151 } 1152 1153 static inline u32 iwl_trans_read32(struct iwl_trans *trans, u32 ofs) 1154 { 1155 return trans->ops->read32(trans, ofs); 1156 } 1157 1158 static inline u32 iwl_trans_read_prph(struct iwl_trans *trans, u32 ofs) 1159 { 1160 return trans->ops->read_prph(trans, ofs); 1161 } 1162 1163 static inline void iwl_trans_write_prph(struct iwl_trans *trans, u32 ofs, 1164 u32 val) 1165 { 1166 return trans->ops->write_prph(trans, ofs, val); 1167 } 1168 1169 static inline int iwl_trans_read_mem(struct iwl_trans *trans, u32 addr, 1170 void *buf, int dwords) 1171 { 1172 return trans->ops->read_mem(trans, addr, buf, dwords); 1173 } 1174 1175 #define iwl_trans_read_mem_bytes(trans, addr, buf, bufsize) \ 1176 do { \ 1177 if (__builtin_constant_p(bufsize)) \ 1178 BUILD_BUG_ON((bufsize) % sizeof(u32)); \ 1179 iwl_trans_read_mem(trans, addr, buf, (bufsize) / sizeof(u32));\ 1180 } while (0) 1181 1182 static inline u32 iwl_trans_read_mem32(struct iwl_trans *trans, u32 addr) 1183 { 1184 u32 value; 1185 1186 if (WARN_ON(iwl_trans_read_mem(trans, addr, &value, 1))) 1187 return 0xa5a5a5a5; 1188 1189 return value; 1190 } 1191 1192 static inline int iwl_trans_write_mem(struct iwl_trans *trans, u32 addr, 1193 const void *buf, int dwords) 1194 { 1195 return trans->ops->write_mem(trans, addr, buf, dwords); 1196 } 1197 1198 static inline u32 iwl_trans_write_mem32(struct iwl_trans *trans, u32 addr, 1199 u32 val) 1200 { 1201 return iwl_trans_write_mem(trans, addr, &val, 1); 1202 } 1203 1204 static inline void iwl_trans_set_pmi(struct iwl_trans *trans, bool state) 1205 { 1206 if (trans->ops->set_pmi) 1207 trans->ops->set_pmi(trans, state); 1208 } 1209 1210 static inline void iwl_trans_sw_reset(struct iwl_trans *trans) 1211 { 1212 if (trans->ops->sw_reset) 1213 trans->ops->sw_reset(trans); 1214 } 1215 1216 static inline void 1217 iwl_trans_set_bits_mask(struct iwl_trans *trans, u32 reg, u32 mask, u32 value) 1218 { 1219 trans->ops->set_bits_mask(trans, reg, mask, value); 1220 } 1221 1222 #define iwl_trans_grab_nic_access(trans, flags) \ 1223 __cond_lock(nic_access, \ 1224 likely((trans)->ops->grab_nic_access(trans, flags))) 1225 1226 static inline void __releases(nic_access) 1227 iwl_trans_release_nic_access(struct iwl_trans *trans, unsigned long *flags) 1228 { 1229 trans->ops->release_nic_access(trans, flags); 1230 __release(nic_access); 1231 } 1232 1233 static inline void iwl_trans_fw_error(struct iwl_trans *trans) 1234 { 1235 if (WARN_ON_ONCE(!trans->op_mode)) 1236 return; 1237 1238 /* prevent double restarts due to the same erroneous FW */ 1239 if (!test_and_set_bit(STATUS_FW_ERROR, &trans->status)) 1240 iwl_op_mode_nic_error(trans->op_mode); 1241 } 1242 1243 static inline void iwl_trans_sync_nmi(struct iwl_trans *trans) 1244 { 1245 if (trans->ops->sync_nmi) 1246 trans->ops->sync_nmi(trans); 1247 } 1248 1249 /***************************************************** 1250 * transport helper functions 1251 *****************************************************/ 1252 struct iwl_trans *iwl_trans_alloc(unsigned int priv_size, 1253 struct device *dev, 1254 const struct iwl_cfg *cfg, 1255 const struct iwl_trans_ops *ops); 1256 void iwl_trans_free(struct iwl_trans *trans); 1257 void iwl_trans_ref(struct iwl_trans *trans); 1258 void iwl_trans_unref(struct iwl_trans *trans); 1259 1260 /***************************************************** 1261 * driver (transport) register/unregister functions 1262 ******************************************************/ 1263 int __must_check iwl_pci_register_driver(void); 1264 void iwl_pci_unregister_driver(void); 1265 1266 #endif /* __iwl_trans_h__ */ 1267