1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause 2 /* 3 * Copyright (C) 2005-2014, 2018-2023 Intel Corporation 4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH 5 * Copyright (C) 2016-2017 Intel Deutschland GmbH 6 */ 7 #include <linux/types.h> 8 #include <linux/slab.h> 9 #include <linux/export.h> 10 #include <linux/etherdevice.h> 11 #include <linux/pci.h> 12 #include <linux/firmware.h> 13 14 #include "iwl-drv.h" 15 #include "iwl-modparams.h" 16 #include "iwl-nvm-parse.h" 17 #include "iwl-prph.h" 18 #include "iwl-io.h" 19 #include "iwl-csr.h" 20 #include "fw/acpi.h" 21 #include "fw/api/nvm-reg.h" 22 #include "fw/api/commands.h" 23 #include "fw/api/cmdhdr.h" 24 #include "fw/img.h" 25 #include "mei/iwl-mei.h" 26 27 /* NVM offsets (in words) definitions */ 28 enum nvm_offsets { 29 /* NVM HW-Section offset (in words) definitions */ 30 SUBSYSTEM_ID = 0x0A, 31 HW_ADDR = 0x15, 32 33 /* NVM SW-Section offset (in words) definitions */ 34 NVM_SW_SECTION = 0x1C0, 35 NVM_VERSION = 0, 36 RADIO_CFG = 1, 37 SKU = 2, 38 N_HW_ADDRS = 3, 39 NVM_CHANNELS = 0x1E0 - NVM_SW_SECTION, 40 41 /* NVM REGULATORY -Section offset (in words) definitions */ 42 NVM_CHANNELS_SDP = 0, 43 }; 44 45 enum ext_nvm_offsets { 46 /* NVM HW-Section offset (in words) definitions */ 47 48 MAC_ADDRESS_OVERRIDE_EXT_NVM = 1, 49 50 /* NVM SW-Section offset (in words) definitions */ 51 NVM_VERSION_EXT_NVM = 0, 52 N_HW_ADDRS_FAMILY_8000 = 3, 53 54 /* NVM PHY_SKU-Section offset (in words) definitions */ 55 RADIO_CFG_FAMILY_EXT_NVM = 0, 56 SKU_FAMILY_8000 = 2, 57 58 /* NVM REGULATORY -Section offset (in words) definitions */ 59 NVM_CHANNELS_EXTENDED = 0, 60 NVM_LAR_OFFSET_OLD = 0x4C7, 61 NVM_LAR_OFFSET = 0x507, 62 NVM_LAR_ENABLED = 0x7, 63 }; 64 65 /* SKU Capabilities (actual values from NVM definition) */ 66 enum nvm_sku_bits { 67 NVM_SKU_CAP_BAND_24GHZ = BIT(0), 68 NVM_SKU_CAP_BAND_52GHZ = BIT(1), 69 NVM_SKU_CAP_11N_ENABLE = BIT(2), 70 NVM_SKU_CAP_11AC_ENABLE = BIT(3), 71 NVM_SKU_CAP_MIMO_DISABLE = BIT(5), 72 }; 73 74 /* 75 * These are the channel numbers in the order that they are stored in the NVM 76 */ 77 static const u16 iwl_nvm_channels[] = { 78 /* 2.4 GHz */ 79 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 80 /* 5 GHz */ 81 36, 40, 44, 48, 52, 56, 60, 64, 82 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144, 83 149, 153, 157, 161, 165 84 }; 85 86 static const u16 iwl_ext_nvm_channels[] = { 87 /* 2.4 GHz */ 88 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 89 /* 5 GHz */ 90 36, 40, 44, 48, 52, 56, 60, 64, 68, 72, 76, 80, 84, 88, 92, 91 96, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144, 92 149, 153, 157, 161, 165, 169, 173, 177, 181 93 }; 94 95 static const u16 iwl_uhb_nvm_channels[] = { 96 /* 2.4 GHz */ 97 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 98 /* 5 GHz */ 99 36, 40, 44, 48, 52, 56, 60, 64, 68, 72, 76, 80, 84, 88, 92, 100 96, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144, 101 149, 153, 157, 161, 165, 169, 173, 177, 181, 102 /* 6-7 GHz */ 103 1, 5, 9, 13, 17, 21, 25, 29, 33, 37, 41, 45, 49, 53, 57, 61, 65, 69, 104 73, 77, 81, 85, 89, 93, 97, 101, 105, 109, 113, 117, 121, 125, 129, 105 133, 137, 141, 145, 149, 153, 157, 161, 165, 169, 173, 177, 181, 185, 106 189, 193, 197, 201, 205, 209, 213, 217, 221, 225, 229, 233 107 }; 108 109 #define IWL_NVM_NUM_CHANNELS ARRAY_SIZE(iwl_nvm_channels) 110 #define IWL_NVM_NUM_CHANNELS_EXT ARRAY_SIZE(iwl_ext_nvm_channels) 111 #define IWL_NVM_NUM_CHANNELS_UHB ARRAY_SIZE(iwl_uhb_nvm_channels) 112 #define NUM_2GHZ_CHANNELS 14 113 #define NUM_5GHZ_CHANNELS 37 114 #define FIRST_2GHZ_HT_MINUS 5 115 #define LAST_2GHZ_HT_PLUS 9 116 #define N_HW_ADDR_MASK 0xF 117 118 /* rate data (static) */ 119 static struct ieee80211_rate iwl_cfg80211_rates[] = { 120 { .bitrate = 1 * 10, .hw_value = 0, .hw_value_short = 0, }, 121 { .bitrate = 2 * 10, .hw_value = 1, .hw_value_short = 1, 122 .flags = IEEE80211_RATE_SHORT_PREAMBLE, }, 123 { .bitrate = 5.5 * 10, .hw_value = 2, .hw_value_short = 2, 124 .flags = IEEE80211_RATE_SHORT_PREAMBLE, }, 125 { .bitrate = 11 * 10, .hw_value = 3, .hw_value_short = 3, 126 .flags = IEEE80211_RATE_SHORT_PREAMBLE, }, 127 { .bitrate = 6 * 10, .hw_value = 4, .hw_value_short = 4, }, 128 { .bitrate = 9 * 10, .hw_value = 5, .hw_value_short = 5, }, 129 { .bitrate = 12 * 10, .hw_value = 6, .hw_value_short = 6, }, 130 { .bitrate = 18 * 10, .hw_value = 7, .hw_value_short = 7, }, 131 { .bitrate = 24 * 10, .hw_value = 8, .hw_value_short = 8, }, 132 { .bitrate = 36 * 10, .hw_value = 9, .hw_value_short = 9, }, 133 { .bitrate = 48 * 10, .hw_value = 10, .hw_value_short = 10, }, 134 { .bitrate = 54 * 10, .hw_value = 11, .hw_value_short = 11, }, 135 }; 136 #define RATES_24_OFFS 0 137 #define N_RATES_24 ARRAY_SIZE(iwl_cfg80211_rates) 138 #define RATES_52_OFFS 4 139 #define N_RATES_52 (N_RATES_24 - RATES_52_OFFS) 140 141 /** 142 * enum iwl_nvm_channel_flags - channel flags in NVM 143 * @NVM_CHANNEL_VALID: channel is usable for this SKU/geo 144 * @NVM_CHANNEL_IBSS: usable as an IBSS channel 145 * @NVM_CHANNEL_ACTIVE: active scanning allowed 146 * @NVM_CHANNEL_RADAR: radar detection required 147 * @NVM_CHANNEL_INDOOR_ONLY: only indoor use is allowed 148 * @NVM_CHANNEL_GO_CONCURRENT: GO operation is allowed when connected to BSS 149 * on same channel on 2.4 or same UNII band on 5.2 150 * @NVM_CHANNEL_UNIFORM: uniform spreading required 151 * @NVM_CHANNEL_20MHZ: 20 MHz channel okay 152 * @NVM_CHANNEL_40MHZ: 40 MHz channel okay 153 * @NVM_CHANNEL_80MHZ: 80 MHz channel okay 154 * @NVM_CHANNEL_160MHZ: 160 MHz channel okay 155 * @NVM_CHANNEL_DC_HIGH: DC HIGH required/allowed (?) 156 * @NVM_CHANNEL_VLP: client support connection to UHB VLP AP 157 * @NVM_CHANNEL_AFC: client support connection to UHB AFC AP 158 */ 159 enum iwl_nvm_channel_flags { 160 NVM_CHANNEL_VALID = BIT(0), 161 NVM_CHANNEL_IBSS = BIT(1), 162 NVM_CHANNEL_ACTIVE = BIT(3), 163 NVM_CHANNEL_RADAR = BIT(4), 164 NVM_CHANNEL_INDOOR_ONLY = BIT(5), 165 NVM_CHANNEL_GO_CONCURRENT = BIT(6), 166 NVM_CHANNEL_UNIFORM = BIT(7), 167 NVM_CHANNEL_20MHZ = BIT(8), 168 NVM_CHANNEL_40MHZ = BIT(9), 169 NVM_CHANNEL_80MHZ = BIT(10), 170 NVM_CHANNEL_160MHZ = BIT(11), 171 NVM_CHANNEL_DC_HIGH = BIT(12), 172 NVM_CHANNEL_VLP = BIT(13), 173 NVM_CHANNEL_AFC = BIT(14), 174 }; 175 176 /** 177 * enum iwl_reg_capa_flags_v1 - global flags applied for the whole regulatory 178 * domain. 179 * @REG_CAPA_V1_BF_CCD_LOW_BAND: Beam-forming or Cyclic Delay Diversity in the 180 * 2.4Ghz band is allowed. 181 * @REG_CAPA_V1_BF_CCD_HIGH_BAND: Beam-forming or Cyclic Delay Diversity in the 182 * 5Ghz band is allowed. 183 * @REG_CAPA_V1_160MHZ_ALLOWED: 11ac channel with a width of 160Mhz is allowed 184 * for this regulatory domain (valid only in 5Ghz). 185 * @REG_CAPA_V1_80MHZ_ALLOWED: 11ac channel with a width of 80Mhz is allowed 186 * for this regulatory domain (valid only in 5Ghz). 187 * @REG_CAPA_V1_MCS_8_ALLOWED: 11ac with MCS 8 is allowed. 188 * @REG_CAPA_V1_MCS_9_ALLOWED: 11ac with MCS 9 is allowed. 189 * @REG_CAPA_V1_40MHZ_FORBIDDEN: 11n channel with a width of 40Mhz is forbidden 190 * for this regulatory domain (valid only in 5Ghz). 191 * @REG_CAPA_V1_DC_HIGH_ENABLED: DC HIGH allowed. 192 * @REG_CAPA_V1_11AX_DISABLED: 11ax is forbidden for this regulatory domain. 193 */ 194 enum iwl_reg_capa_flags_v1 { 195 REG_CAPA_V1_BF_CCD_LOW_BAND = BIT(0), 196 REG_CAPA_V1_BF_CCD_HIGH_BAND = BIT(1), 197 REG_CAPA_V1_160MHZ_ALLOWED = BIT(2), 198 REG_CAPA_V1_80MHZ_ALLOWED = BIT(3), 199 REG_CAPA_V1_MCS_8_ALLOWED = BIT(4), 200 REG_CAPA_V1_MCS_9_ALLOWED = BIT(5), 201 REG_CAPA_V1_40MHZ_FORBIDDEN = BIT(7), 202 REG_CAPA_V1_DC_HIGH_ENABLED = BIT(9), 203 REG_CAPA_V1_11AX_DISABLED = BIT(10), 204 }; /* GEO_CHANNEL_CAPABILITIES_API_S_VER_1 */ 205 206 /** 207 * enum iwl_reg_capa_flags_v2 - global flags applied for the whole regulatory 208 * domain (version 2). 209 * @REG_CAPA_V2_STRADDLE_DISABLED: Straddle channels (144, 142, 138) are 210 * disabled. 211 * @REG_CAPA_V2_BF_CCD_LOW_BAND: Beam-forming or Cyclic Delay Diversity in the 212 * 2.4Ghz band is allowed. 213 * @REG_CAPA_V2_BF_CCD_HIGH_BAND: Beam-forming or Cyclic Delay Diversity in the 214 * 5Ghz band is allowed. 215 * @REG_CAPA_V2_160MHZ_ALLOWED: 11ac channel with a width of 160Mhz is allowed 216 * for this regulatory domain (valid only in 5Ghz). 217 * @REG_CAPA_V2_80MHZ_ALLOWED: 11ac channel with a width of 80Mhz is allowed 218 * for this regulatory domain (valid only in 5Ghz). 219 * @REG_CAPA_V2_MCS_8_ALLOWED: 11ac with MCS 8 is allowed. 220 * @REG_CAPA_V2_MCS_9_ALLOWED: 11ac with MCS 9 is allowed. 221 * @REG_CAPA_V2_WEATHER_DISABLED: Weather radar channels (120, 124, 128, 118, 222 * 126, 122) are disabled. 223 * @REG_CAPA_V2_40MHZ_ALLOWED: 11n channel with a width of 40Mhz is allowed 224 * for this regulatory domain (uvalid only in 5Ghz). 225 * @REG_CAPA_V2_11AX_DISABLED: 11ax is forbidden for this regulatory domain. 226 */ 227 enum iwl_reg_capa_flags_v2 { 228 REG_CAPA_V2_STRADDLE_DISABLED = BIT(0), 229 REG_CAPA_V2_BF_CCD_LOW_BAND = BIT(1), 230 REG_CAPA_V2_BF_CCD_HIGH_BAND = BIT(2), 231 REG_CAPA_V2_160MHZ_ALLOWED = BIT(3), 232 REG_CAPA_V2_80MHZ_ALLOWED = BIT(4), 233 REG_CAPA_V2_MCS_8_ALLOWED = BIT(5), 234 REG_CAPA_V2_MCS_9_ALLOWED = BIT(6), 235 REG_CAPA_V2_WEATHER_DISABLED = BIT(7), 236 REG_CAPA_V2_40MHZ_ALLOWED = BIT(8), 237 REG_CAPA_V2_11AX_DISABLED = BIT(10), 238 }; /* GEO_CHANNEL_CAPABILITIES_API_S_VER_2 */ 239 240 /** 241 * enum iwl_reg_capa_flags_v4 - global flags applied for the whole regulatory 242 * domain. 243 * @REG_CAPA_V4_160MHZ_ALLOWED: 11ac channel with a width of 160Mhz is allowed 244 * for this regulatory domain (valid only in 5Ghz). 245 * @REG_CAPA_V4_80MHZ_ALLOWED: 11ac channel with a width of 80Mhz is allowed 246 * for this regulatory domain (valid only in 5Ghz). 247 * @REG_CAPA_V4_MCS_12_ALLOWED: 11ac with MCS 12 is allowed. 248 * @REG_CAPA_V4_MCS_13_ALLOWED: 11ac with MCS 13 is allowed. 249 * @REG_CAPA_V4_11BE_DISABLED: 11be is forbidden for this regulatory domain. 250 * @REG_CAPA_V4_11AX_DISABLED: 11ax is forbidden for this regulatory domain. 251 * @REG_CAPA_V4_320MHZ_ALLOWED: 11be channel with a width of 320Mhz is allowed 252 * for this regulatory domain (valid only in 5GHz). 253 */ 254 enum iwl_reg_capa_flags_v4 { 255 REG_CAPA_V4_160MHZ_ALLOWED = BIT(3), 256 REG_CAPA_V4_80MHZ_ALLOWED = BIT(4), 257 REG_CAPA_V4_MCS_12_ALLOWED = BIT(5), 258 REG_CAPA_V4_MCS_13_ALLOWED = BIT(6), 259 REG_CAPA_V4_11BE_DISABLED = BIT(8), 260 REG_CAPA_V4_11AX_DISABLED = BIT(13), 261 REG_CAPA_V4_320MHZ_ALLOWED = BIT(16), 262 }; /* GEO_CHANNEL_CAPABILITIES_API_S_VER_4 */ 263 264 /* 265 * API v2 for reg_capa_flags is relevant from version 6 and onwards of the 266 * MCC update command response. 267 */ 268 #define REG_CAPA_V2_RESP_VER 6 269 270 /* API v4 for reg_capa_flags is relevant from version 8 and onwards of the 271 * MCC update command response. 272 */ 273 #define REG_CAPA_V4_RESP_VER 8 274 275 /** 276 * struct iwl_reg_capa - struct for global regulatory capabilities, Used for 277 * handling the different APIs of reg_capa_flags. 278 * 279 * @allow_40mhz: 11n channel with a width of 40Mhz is allowed 280 * for this regulatory domain. 281 * @allow_80mhz: 11ac channel with a width of 80Mhz is allowed 282 * for this regulatory domain (valid only in 5 and 6 Ghz). 283 * @allow_160mhz: 11ac channel with a width of 160Mhz is allowed 284 * for this regulatory domain (valid only in 5 and 6 Ghz). 285 * @allow_320mhz: 11be channel with a width of 320Mhz is allowed 286 * for this regulatory domain (valid only in 6 Ghz). 287 * @disable_11ax: 11ax is forbidden for this regulatory domain. 288 * @disable_11be: 11be is forbidden for this regulatory domain. 289 */ 290 struct iwl_reg_capa { 291 bool allow_40mhz; 292 bool allow_80mhz; 293 bool allow_160mhz; 294 bool allow_320mhz; 295 bool disable_11ax; 296 bool disable_11be; 297 }; 298 299 static inline void iwl_nvm_print_channel_flags(struct device *dev, u32 level, 300 int chan, u32 flags) 301 { 302 #define CHECK_AND_PRINT_I(x) \ 303 ((flags & NVM_CHANNEL_##x) ? " " #x : "") 304 305 if (!(flags & NVM_CHANNEL_VALID)) { 306 IWL_DEBUG_DEV(dev, level, "Ch. %d: 0x%x: No traffic\n", 307 chan, flags); 308 return; 309 } 310 311 /* Note: already can print up to 101 characters, 110 is the limit! */ 312 IWL_DEBUG_DEV(dev, level, 313 "Ch. %d: 0x%x:%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n", 314 chan, flags, 315 CHECK_AND_PRINT_I(VALID), 316 CHECK_AND_PRINT_I(IBSS), 317 CHECK_AND_PRINT_I(ACTIVE), 318 CHECK_AND_PRINT_I(RADAR), 319 CHECK_AND_PRINT_I(INDOOR_ONLY), 320 CHECK_AND_PRINT_I(GO_CONCURRENT), 321 CHECK_AND_PRINT_I(UNIFORM), 322 CHECK_AND_PRINT_I(20MHZ), 323 CHECK_AND_PRINT_I(40MHZ), 324 CHECK_AND_PRINT_I(80MHZ), 325 CHECK_AND_PRINT_I(160MHZ), 326 CHECK_AND_PRINT_I(DC_HIGH), 327 CHECK_AND_PRINT_I(VLP), 328 CHECK_AND_PRINT_I(AFC)); 329 #undef CHECK_AND_PRINT_I 330 } 331 332 static u32 iwl_get_channel_flags(u8 ch_num, int ch_idx, enum nl80211_band band, 333 u32 nvm_flags, const struct iwl_cfg *cfg) 334 { 335 u32 flags = IEEE80211_CHAN_NO_HT40; 336 337 if (band == NL80211_BAND_2GHZ && (nvm_flags & NVM_CHANNEL_40MHZ)) { 338 if (ch_num <= LAST_2GHZ_HT_PLUS) 339 flags &= ~IEEE80211_CHAN_NO_HT40PLUS; 340 if (ch_num >= FIRST_2GHZ_HT_MINUS) 341 flags &= ~IEEE80211_CHAN_NO_HT40MINUS; 342 } else if (nvm_flags & NVM_CHANNEL_40MHZ) { 343 if ((ch_idx - NUM_2GHZ_CHANNELS) % 2 == 0) 344 flags &= ~IEEE80211_CHAN_NO_HT40PLUS; 345 else 346 flags &= ~IEEE80211_CHAN_NO_HT40MINUS; 347 } 348 if (!(nvm_flags & NVM_CHANNEL_80MHZ)) 349 flags |= IEEE80211_CHAN_NO_80MHZ; 350 if (!(nvm_flags & NVM_CHANNEL_160MHZ)) 351 flags |= IEEE80211_CHAN_NO_160MHZ; 352 353 if (!(nvm_flags & NVM_CHANNEL_IBSS)) 354 flags |= IEEE80211_CHAN_NO_IR; 355 356 if (!(nvm_flags & NVM_CHANNEL_ACTIVE)) 357 flags |= IEEE80211_CHAN_NO_IR; 358 359 if (nvm_flags & NVM_CHANNEL_RADAR) 360 flags |= IEEE80211_CHAN_RADAR; 361 362 if (nvm_flags & NVM_CHANNEL_INDOOR_ONLY) 363 flags |= IEEE80211_CHAN_INDOOR_ONLY; 364 365 /* Set the GO concurrent flag only in case that NO_IR is set. 366 * Otherwise it is meaningless 367 */ 368 if ((nvm_flags & NVM_CHANNEL_GO_CONCURRENT) && 369 (flags & IEEE80211_CHAN_NO_IR)) 370 flags |= IEEE80211_CHAN_IR_CONCURRENT; 371 372 /* Set the AP type for the UHB case. */ 373 if (!(nvm_flags & NVM_CHANNEL_VLP)) 374 flags |= IEEE80211_CHAN_NO_6GHZ_VLP_CLIENT; 375 if (!(nvm_flags & NVM_CHANNEL_AFC)) 376 flags |= IEEE80211_CHAN_NO_6GHZ_AFC_CLIENT; 377 378 return flags; 379 } 380 381 static enum nl80211_band iwl_nl80211_band_from_channel_idx(int ch_idx) 382 { 383 if (ch_idx >= NUM_2GHZ_CHANNELS + NUM_5GHZ_CHANNELS) { 384 return NL80211_BAND_6GHZ; 385 } 386 387 if (ch_idx >= NUM_2GHZ_CHANNELS) 388 return NL80211_BAND_5GHZ; 389 return NL80211_BAND_2GHZ; 390 } 391 392 static int iwl_init_channel_map(struct iwl_trans *trans, 393 const struct iwl_fw *fw, 394 struct iwl_nvm_data *data, 395 const void * const nvm_ch_flags, 396 u32 sbands_flags, bool v4) 397 { 398 const struct iwl_cfg *cfg = trans->cfg; 399 struct device *dev = trans->dev; 400 int ch_idx; 401 int n_channels = 0; 402 struct ieee80211_channel *channel; 403 u32 ch_flags; 404 int num_of_ch; 405 const u16 *nvm_chan; 406 407 if (cfg->uhb_supported) { 408 num_of_ch = IWL_NVM_NUM_CHANNELS_UHB; 409 nvm_chan = iwl_uhb_nvm_channels; 410 } else if (cfg->nvm_type == IWL_NVM_EXT) { 411 num_of_ch = IWL_NVM_NUM_CHANNELS_EXT; 412 nvm_chan = iwl_ext_nvm_channels; 413 } else { 414 num_of_ch = IWL_NVM_NUM_CHANNELS; 415 nvm_chan = iwl_nvm_channels; 416 } 417 418 for (ch_idx = 0; ch_idx < num_of_ch; ch_idx++) { 419 enum nl80211_band band = 420 iwl_nl80211_band_from_channel_idx(ch_idx); 421 422 if (v4) 423 ch_flags = 424 __le32_to_cpup((const __le32 *)nvm_ch_flags + ch_idx); 425 else 426 ch_flags = 427 __le16_to_cpup((const __le16 *)nvm_ch_flags + ch_idx); 428 429 if (band == NL80211_BAND_5GHZ && 430 !data->sku_cap_band_52ghz_enable) 431 continue; 432 433 /* workaround to disable wide channels in 5GHz */ 434 if ((sbands_flags & IWL_NVM_SBANDS_FLAGS_NO_WIDE_IN_5GHZ) && 435 band == NL80211_BAND_5GHZ) { 436 ch_flags &= ~(NVM_CHANNEL_40MHZ | 437 NVM_CHANNEL_80MHZ | 438 NVM_CHANNEL_160MHZ); 439 } 440 441 if (ch_flags & NVM_CHANNEL_160MHZ) 442 data->vht160_supported = true; 443 444 if (!(sbands_flags & IWL_NVM_SBANDS_FLAGS_LAR) && 445 !(ch_flags & NVM_CHANNEL_VALID)) { 446 /* 447 * Channels might become valid later if lar is 448 * supported, hence we still want to add them to 449 * the list of supported channels to cfg80211. 450 */ 451 iwl_nvm_print_channel_flags(dev, IWL_DL_EEPROM, 452 nvm_chan[ch_idx], ch_flags); 453 continue; 454 } 455 456 channel = &data->channels[n_channels]; 457 n_channels++; 458 459 channel->hw_value = nvm_chan[ch_idx]; 460 channel->band = band; 461 channel->center_freq = 462 ieee80211_channel_to_frequency( 463 channel->hw_value, channel->band); 464 465 /* Initialize regulatory-based run-time data */ 466 467 /* 468 * Default value - highest tx power value. max_power 469 * is not used in mvm, and is used for backwards compatibility 470 */ 471 channel->max_power = IWL_DEFAULT_MAX_TX_POWER; 472 473 /* don't put limitations in case we're using LAR */ 474 if (!(sbands_flags & IWL_NVM_SBANDS_FLAGS_LAR)) 475 channel->flags = iwl_get_channel_flags(nvm_chan[ch_idx], 476 ch_idx, band, 477 ch_flags, cfg); 478 else 479 channel->flags = 0; 480 481 if (fw_has_capa(&fw->ucode_capa, 482 IWL_UCODE_TLV_CAPA_MONITOR_PASSIVE_CHANS)) 483 channel->flags |= IEEE80211_CHAN_CAN_MONITOR; 484 485 iwl_nvm_print_channel_flags(dev, IWL_DL_EEPROM, 486 channel->hw_value, ch_flags); 487 IWL_DEBUG_EEPROM(dev, "Ch. %d: %ddBm\n", 488 channel->hw_value, channel->max_power); 489 } 490 491 return n_channels; 492 } 493 494 static void iwl_init_vht_hw_capab(struct iwl_trans *trans, 495 struct iwl_nvm_data *data, 496 struct ieee80211_sta_vht_cap *vht_cap, 497 u8 tx_chains, u8 rx_chains) 498 { 499 const struct iwl_cfg *cfg = trans->cfg; 500 int num_rx_ants = num_of_ant(rx_chains); 501 int num_tx_ants = num_of_ant(tx_chains); 502 503 vht_cap->vht_supported = true; 504 505 vht_cap->cap = IEEE80211_VHT_CAP_SHORT_GI_80 | 506 IEEE80211_VHT_CAP_RXSTBC_1 | 507 IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE | 508 3 << IEEE80211_VHT_CAP_BEAMFORMEE_STS_SHIFT | 509 IEEE80211_VHT_MAX_AMPDU_1024K << 510 IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_SHIFT; 511 512 if (!trans->cfg->ht_params->stbc) 513 vht_cap->cap &= ~IEEE80211_VHT_CAP_RXSTBC_MASK; 514 515 if (data->vht160_supported) 516 vht_cap->cap |= IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160MHZ | 517 IEEE80211_VHT_CAP_SHORT_GI_160; 518 519 if (cfg->vht_mu_mimo_supported) 520 vht_cap->cap |= IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE; 521 522 if (cfg->ht_params->ldpc) 523 vht_cap->cap |= IEEE80211_VHT_CAP_RXLDPC; 524 525 if (data->sku_cap_mimo_disabled) { 526 num_rx_ants = 1; 527 num_tx_ants = 1; 528 } 529 530 if (trans->cfg->ht_params->stbc && num_tx_ants > 1) 531 vht_cap->cap |= IEEE80211_VHT_CAP_TXSTBC; 532 else 533 vht_cap->cap |= IEEE80211_VHT_CAP_TX_ANTENNA_PATTERN; 534 535 switch (iwlwifi_mod_params.amsdu_size) { 536 case IWL_AMSDU_DEF: 537 if (trans->trans_cfg->mq_rx_supported) 538 vht_cap->cap |= 539 IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454; 540 else 541 vht_cap->cap |= IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_3895; 542 break; 543 case IWL_AMSDU_2K: 544 if (trans->trans_cfg->mq_rx_supported) 545 vht_cap->cap |= 546 IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454; 547 else 548 WARN(1, "RB size of 2K is not supported by this device\n"); 549 break; 550 case IWL_AMSDU_4K: 551 vht_cap->cap |= IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_3895; 552 break; 553 case IWL_AMSDU_8K: 554 vht_cap->cap |= IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_7991; 555 break; 556 case IWL_AMSDU_12K: 557 vht_cap->cap |= IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454; 558 break; 559 default: 560 break; 561 } 562 563 vht_cap->vht_mcs.rx_mcs_map = 564 cpu_to_le16(IEEE80211_VHT_MCS_SUPPORT_0_9 << 0 | 565 IEEE80211_VHT_MCS_SUPPORT_0_9 << 2 | 566 IEEE80211_VHT_MCS_NOT_SUPPORTED << 4 | 567 IEEE80211_VHT_MCS_NOT_SUPPORTED << 6 | 568 IEEE80211_VHT_MCS_NOT_SUPPORTED << 8 | 569 IEEE80211_VHT_MCS_NOT_SUPPORTED << 10 | 570 IEEE80211_VHT_MCS_NOT_SUPPORTED << 12 | 571 IEEE80211_VHT_MCS_NOT_SUPPORTED << 14); 572 573 if (num_rx_ants == 1 || cfg->rx_with_siso_diversity) { 574 vht_cap->cap |= IEEE80211_VHT_CAP_RX_ANTENNA_PATTERN; 575 /* this works because NOT_SUPPORTED == 3 */ 576 vht_cap->vht_mcs.rx_mcs_map |= 577 cpu_to_le16(IEEE80211_VHT_MCS_NOT_SUPPORTED << 2); 578 } 579 580 vht_cap->vht_mcs.tx_mcs_map = vht_cap->vht_mcs.rx_mcs_map; 581 582 vht_cap->vht_mcs.tx_highest |= 583 cpu_to_le16(IEEE80211_VHT_EXT_NSS_BW_CAPABLE); 584 } 585 586 static const u8 iwl_vendor_caps[] = { 587 0xdd, /* vendor element */ 588 0x06, /* length */ 589 0x00, 0x17, 0x35, /* Intel OUI */ 590 0x08, /* type (Intel Capabilities) */ 591 /* followed by 16 bits of capabilities */ 592 #define IWL_VENDOR_CAP_IMPROVED_BF_FDBK_HE BIT(0) 593 IWL_VENDOR_CAP_IMPROVED_BF_FDBK_HE, 594 0x00 595 }; 596 597 static const struct ieee80211_sband_iftype_data iwl_he_eht_capa[] = { 598 { 599 .types_mask = BIT(NL80211_IFTYPE_STATION) | 600 BIT(NL80211_IFTYPE_P2P_CLIENT), 601 .he_cap = { 602 .has_he = true, 603 .he_cap_elem = { 604 .mac_cap_info[0] = 605 IEEE80211_HE_MAC_CAP0_HTC_HE, 606 .mac_cap_info[1] = 607 IEEE80211_HE_MAC_CAP1_TF_MAC_PAD_DUR_16US | 608 IEEE80211_HE_MAC_CAP1_MULTI_TID_AGG_RX_QOS_8, 609 .mac_cap_info[2] = 610 IEEE80211_HE_MAC_CAP2_32BIT_BA_BITMAP, 611 .mac_cap_info[3] = 612 IEEE80211_HE_MAC_CAP3_OMI_CONTROL | 613 IEEE80211_HE_MAC_CAP3_RX_CTRL_FRAME_TO_MULTIBSS, 614 .mac_cap_info[4] = 615 IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU | 616 IEEE80211_HE_MAC_CAP4_MULTI_TID_AGG_TX_QOS_B39, 617 .mac_cap_info[5] = 618 IEEE80211_HE_MAC_CAP5_MULTI_TID_AGG_TX_QOS_B40 | 619 IEEE80211_HE_MAC_CAP5_MULTI_TID_AGG_TX_QOS_B41 | 620 IEEE80211_HE_MAC_CAP5_UL_2x996_TONE_RU | 621 IEEE80211_HE_MAC_CAP5_HE_DYNAMIC_SM_PS | 622 IEEE80211_HE_MAC_CAP5_HT_VHT_TRIG_FRAME_RX, 623 .phy_cap_info[1] = 624 IEEE80211_HE_PHY_CAP1_PREAMBLE_PUNC_RX_MASK | 625 IEEE80211_HE_PHY_CAP1_DEVICE_CLASS_A | 626 IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD, 627 .phy_cap_info[2] = 628 IEEE80211_HE_PHY_CAP2_NDP_4x_LTF_AND_3_2US | 629 IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ, 630 .phy_cap_info[3] = 631 IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_TX_BPSK | 632 IEEE80211_HE_PHY_CAP3_DCM_MAX_TX_NSS_1 | 633 IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_BPSK | 634 IEEE80211_HE_PHY_CAP3_DCM_MAX_RX_NSS_1, 635 .phy_cap_info[4] = 636 IEEE80211_HE_PHY_CAP4_SU_BEAMFORMEE | 637 IEEE80211_HE_PHY_CAP4_BEAMFORMEE_MAX_STS_ABOVE_80MHZ_8 | 638 IEEE80211_HE_PHY_CAP4_BEAMFORMEE_MAX_STS_UNDER_80MHZ_8, 639 .phy_cap_info[6] = 640 IEEE80211_HE_PHY_CAP6_TRIG_SU_BEAMFORMING_FB | 641 IEEE80211_HE_PHY_CAP6_TRIG_MU_BEAMFORMING_PARTIAL_BW_FB | 642 IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT, 643 .phy_cap_info[7] = 644 IEEE80211_HE_PHY_CAP7_POWER_BOOST_FACTOR_SUPP | 645 IEEE80211_HE_PHY_CAP7_HE_SU_MU_PPDU_4XLTF_AND_08_US_GI, 646 .phy_cap_info[8] = 647 IEEE80211_HE_PHY_CAP8_HE_ER_SU_PPDU_4XLTF_AND_08_US_GI | 648 IEEE80211_HE_PHY_CAP8_20MHZ_IN_40MHZ_HE_PPDU_IN_2G | 649 IEEE80211_HE_PHY_CAP8_20MHZ_IN_160MHZ_HE_PPDU | 650 IEEE80211_HE_PHY_CAP8_80MHZ_IN_160MHZ_HE_PPDU | 651 IEEE80211_HE_PHY_CAP8_DCM_MAX_RU_242, 652 .phy_cap_info[9] = 653 IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_COMP_SIGB | 654 IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_NON_COMP_SIGB | 655 (IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_RESERVED << 656 IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_POS), 657 .phy_cap_info[10] = 658 IEEE80211_HE_PHY_CAP10_HE_MU_M1RU_MAX_LTF, 659 }, 660 /* 661 * Set default Tx/Rx HE MCS NSS Support field. 662 * Indicate support for up to 2 spatial streams and all 663 * MCS, without any special cases 664 */ 665 .he_mcs_nss_supp = { 666 .rx_mcs_80 = cpu_to_le16(0xfffa), 667 .tx_mcs_80 = cpu_to_le16(0xfffa), 668 .rx_mcs_160 = cpu_to_le16(0xfffa), 669 .tx_mcs_160 = cpu_to_le16(0xfffa), 670 .rx_mcs_80p80 = cpu_to_le16(0xffff), 671 .tx_mcs_80p80 = cpu_to_le16(0xffff), 672 }, 673 /* 674 * Set default PPE thresholds, with PPET16 set to 0, 675 * PPET8 set to 7 676 */ 677 .ppe_thres = {0x61, 0x1c, 0xc7, 0x71}, 678 }, 679 .eht_cap = { 680 .has_eht = true, 681 .eht_cap_elem = { 682 .mac_cap_info[0] = 683 IEEE80211_EHT_MAC_CAP0_OM_CONTROL | 684 IEEE80211_EHT_MAC_CAP0_TRIG_TXOP_SHARING_MODE1 | 685 IEEE80211_EHT_MAC_CAP0_TRIG_TXOP_SHARING_MODE2 | 686 IEEE80211_EHT_MAC_CAP0_SCS_TRAFFIC_DESC, 687 .phy_cap_info[0] = 688 IEEE80211_EHT_PHY_CAP0_242_TONE_RU_GT20MHZ | 689 IEEE80211_EHT_PHY_CAP0_NDP_4_EHT_LFT_32_GI | 690 IEEE80211_EHT_PHY_CAP0_PARTIAL_BW_UL_MU_MIMO | 691 IEEE80211_EHT_PHY_CAP0_SU_BEAMFORMEE | 692 IEEE80211_EHT_PHY_CAP0_BEAMFORMEE_SS_80MHZ_MASK, 693 .phy_cap_info[1] = 694 IEEE80211_EHT_PHY_CAP1_BEAMFORMEE_SS_80MHZ_MASK | 695 IEEE80211_EHT_PHY_CAP1_BEAMFORMEE_SS_160MHZ_MASK, 696 .phy_cap_info[3] = 697 IEEE80211_EHT_PHY_CAP3_NG_16_SU_FEEDBACK | 698 IEEE80211_EHT_PHY_CAP3_NG_16_MU_FEEDBACK | 699 IEEE80211_EHT_PHY_CAP3_CODEBOOK_4_2_SU_FDBK | 700 IEEE80211_EHT_PHY_CAP3_CODEBOOK_7_5_MU_FDBK | 701 IEEE80211_EHT_PHY_CAP3_TRIG_SU_BF_FDBK | 702 IEEE80211_EHT_PHY_CAP3_TRIG_MU_BF_PART_BW_FDBK | 703 IEEE80211_EHT_PHY_CAP3_TRIG_CQI_FDBK, 704 705 .phy_cap_info[4] = 706 IEEE80211_EHT_PHY_CAP4_PART_BW_DL_MU_MIMO | 707 IEEE80211_EHT_PHY_CAP4_POWER_BOOST_FACT_SUPP | 708 IEEE80211_EHT_PHY_CAP4_EHT_MU_PPDU_4_EHT_LTF_08_GI, 709 .phy_cap_info[5] = 710 FIELD_PREP_CONST(IEEE80211_EHT_PHY_CAP5_COMMON_NOMINAL_PKT_PAD_MASK, 711 IEEE80211_EHT_PHY_CAP5_COMMON_NOMINAL_PKT_PAD_16US) | 712 IEEE80211_EHT_PHY_CAP5_NON_TRIG_CQI_FEEDBACK | 713 IEEE80211_EHT_PHY_CAP5_TX_LESS_242_TONE_RU_SUPP | 714 IEEE80211_EHT_PHY_CAP5_RX_LESS_242_TONE_RU_SUPP, 715 .phy_cap_info[6] = 716 IEEE80211_EHT_PHY_CAP6_MCS15_SUPP_MASK | 717 IEEE80211_EHT_PHY_CAP6_EHT_DUP_6GHZ_SUPP, 718 .phy_cap_info[8] = 719 IEEE80211_EHT_PHY_CAP8_RX_1024QAM_WIDER_BW_DL_OFDMA | 720 IEEE80211_EHT_PHY_CAP8_RX_4096QAM_WIDER_BW_DL_OFDMA, 721 }, 722 723 /* For all MCS and bandwidth, set 2 NSS for both Tx and 724 * Rx - note we don't set the only_20mhz, but due to this 725 * being a union, it gets set correctly anyway. 726 */ 727 .eht_mcs_nss_supp = { 728 .bw._80 = { 729 .rx_tx_mcs9_max_nss = 0x22, 730 .rx_tx_mcs11_max_nss = 0x22, 731 .rx_tx_mcs13_max_nss = 0x22, 732 }, 733 .bw._160 = { 734 .rx_tx_mcs9_max_nss = 0x22, 735 .rx_tx_mcs11_max_nss = 0x22, 736 .rx_tx_mcs13_max_nss = 0x22, 737 }, 738 .bw._320 = { 739 .rx_tx_mcs9_max_nss = 0x22, 740 .rx_tx_mcs11_max_nss = 0x22, 741 .rx_tx_mcs13_max_nss = 0x22, 742 }, 743 }, 744 745 /* 746 * PPE thresholds for NSS = 2, and RU index bitmap set 747 * to 0xc. 748 * Note: just for stating what we want, not present in 749 * the transmitted data due to not including 750 * IEEE80211_EHT_PHY_CAP5_PPE_THRESHOLD_PRESENT. 751 */ 752 .eht_ppe_thres = {0xc1, 0x0e, 0xe0 } 753 }, 754 }, 755 { 756 .types_mask = BIT(NL80211_IFTYPE_AP) | 757 BIT(NL80211_IFTYPE_P2P_GO), 758 .he_cap = { 759 .has_he = true, 760 .he_cap_elem = { 761 .mac_cap_info[0] = 762 IEEE80211_HE_MAC_CAP0_HTC_HE, 763 .mac_cap_info[1] = 764 IEEE80211_HE_MAC_CAP1_MULTI_TID_AGG_RX_QOS_8, 765 .mac_cap_info[3] = 766 IEEE80211_HE_MAC_CAP3_OMI_CONTROL, 767 .phy_cap_info[1] = 768 IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD, 769 .phy_cap_info[2] = 770 IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ | 771 IEEE80211_HE_PHY_CAP2_NDP_4x_LTF_AND_3_2US, 772 .phy_cap_info[3] = 773 IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_TX_BPSK | 774 IEEE80211_HE_PHY_CAP3_DCM_MAX_TX_NSS_1 | 775 IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_BPSK | 776 IEEE80211_HE_PHY_CAP3_DCM_MAX_RX_NSS_1, 777 .phy_cap_info[6] = 778 IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT, 779 .phy_cap_info[7] = 780 IEEE80211_HE_PHY_CAP7_HE_SU_MU_PPDU_4XLTF_AND_08_US_GI, 781 .phy_cap_info[8] = 782 IEEE80211_HE_PHY_CAP8_HE_ER_SU_PPDU_4XLTF_AND_08_US_GI | 783 IEEE80211_HE_PHY_CAP8_DCM_MAX_RU_242, 784 .phy_cap_info[9] = 785 IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_RESERVED 786 << IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_POS, 787 }, 788 /* 789 * Set default Tx/Rx HE MCS NSS Support field. 790 * Indicate support for up to 2 spatial streams and all 791 * MCS, without any special cases 792 */ 793 .he_mcs_nss_supp = { 794 .rx_mcs_80 = cpu_to_le16(0xfffa), 795 .tx_mcs_80 = cpu_to_le16(0xfffa), 796 .rx_mcs_160 = cpu_to_le16(0xfffa), 797 .tx_mcs_160 = cpu_to_le16(0xfffa), 798 .rx_mcs_80p80 = cpu_to_le16(0xffff), 799 .tx_mcs_80p80 = cpu_to_le16(0xffff), 800 }, 801 /* 802 * Set default PPE thresholds, with PPET16 set to 0, 803 * PPET8 set to 7 804 */ 805 .ppe_thres = {0x61, 0x1c, 0xc7, 0x71}, 806 }, 807 .eht_cap = { 808 .has_eht = true, 809 .eht_cap_elem = { 810 .mac_cap_info[0] = 811 IEEE80211_EHT_MAC_CAP0_OM_CONTROL | 812 IEEE80211_EHT_MAC_CAP0_TRIG_TXOP_SHARING_MODE1 | 813 IEEE80211_EHT_MAC_CAP0_TRIG_TXOP_SHARING_MODE2, 814 .phy_cap_info[0] = 815 IEEE80211_EHT_PHY_CAP0_242_TONE_RU_GT20MHZ | 816 IEEE80211_EHT_PHY_CAP0_NDP_4_EHT_LFT_32_GI, 817 .phy_cap_info[5] = 818 FIELD_PREP_CONST(IEEE80211_EHT_PHY_CAP5_COMMON_NOMINAL_PKT_PAD_MASK, 819 IEEE80211_EHT_PHY_CAP5_COMMON_NOMINAL_PKT_PAD_16US), 820 }, 821 822 /* For all MCS and bandwidth, set 2 NSS for both Tx and 823 * Rx - note we don't set the only_20mhz, but due to this 824 * being a union, it gets set correctly anyway. 825 */ 826 .eht_mcs_nss_supp = { 827 .bw._80 = { 828 .rx_tx_mcs9_max_nss = 0x22, 829 .rx_tx_mcs11_max_nss = 0x22, 830 .rx_tx_mcs13_max_nss = 0x22, 831 }, 832 .bw._160 = { 833 .rx_tx_mcs9_max_nss = 0x22, 834 .rx_tx_mcs11_max_nss = 0x22, 835 .rx_tx_mcs13_max_nss = 0x22, 836 }, 837 .bw._320 = { 838 .rx_tx_mcs9_max_nss = 0x22, 839 .rx_tx_mcs11_max_nss = 0x22, 840 .rx_tx_mcs13_max_nss = 0x22, 841 }, 842 }, 843 844 /* 845 * PPE thresholds for NSS = 2, and RU index bitmap set 846 * to 0xc. 847 * Note: just for stating what we want, not present in 848 * the transmitted data due to not including 849 * IEEE80211_EHT_PHY_CAP5_PPE_THRESHOLD_PRESENT. 850 */ 851 .eht_ppe_thres = {0xc1, 0x0e, 0xe0 } 852 }, 853 }, 854 }; 855 856 static void iwl_init_he_6ghz_capa(struct iwl_trans *trans, 857 struct iwl_nvm_data *data, 858 struct ieee80211_supported_band *sband, 859 u8 tx_chains, u8 rx_chains) 860 { 861 struct ieee80211_sta_ht_cap ht_cap; 862 struct ieee80211_sta_vht_cap vht_cap = {}; 863 struct ieee80211_sband_iftype_data *iftype_data; 864 u16 he_6ghz_capa = 0; 865 u32 exp; 866 int i; 867 868 if (sband->band != NL80211_BAND_6GHZ) 869 return; 870 871 /* grab HT/VHT capabilities and calculate HE 6 GHz capabilities */ 872 iwl_init_ht_hw_capab(trans, data, &ht_cap, NL80211_BAND_5GHZ, 873 tx_chains, rx_chains); 874 WARN_ON(!ht_cap.ht_supported); 875 iwl_init_vht_hw_capab(trans, data, &vht_cap, tx_chains, rx_chains); 876 WARN_ON(!vht_cap.vht_supported); 877 878 he_6ghz_capa |= 879 u16_encode_bits(ht_cap.ampdu_density, 880 IEEE80211_HE_6GHZ_CAP_MIN_MPDU_START); 881 exp = u32_get_bits(vht_cap.cap, 882 IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK); 883 he_6ghz_capa |= 884 u16_encode_bits(exp, IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP); 885 exp = u32_get_bits(vht_cap.cap, IEEE80211_VHT_CAP_MAX_MPDU_MASK); 886 he_6ghz_capa |= 887 u16_encode_bits(exp, IEEE80211_HE_6GHZ_CAP_MAX_MPDU_LEN); 888 /* we don't support extended_ht_cap_info anywhere, so no RD_RESPONDER */ 889 if (vht_cap.cap & IEEE80211_VHT_CAP_TX_ANTENNA_PATTERN) 890 he_6ghz_capa |= IEEE80211_HE_6GHZ_CAP_TX_ANTPAT_CONS; 891 if (vht_cap.cap & IEEE80211_VHT_CAP_RX_ANTENNA_PATTERN) 892 he_6ghz_capa |= IEEE80211_HE_6GHZ_CAP_RX_ANTPAT_CONS; 893 894 IWL_DEBUG_EEPROM(trans->dev, "he_6ghz_capa=0x%x\n", he_6ghz_capa); 895 896 /* we know it's writable - we set it before ourselves */ 897 iftype_data = (void *)(uintptr_t)sband->iftype_data; 898 for (i = 0; i < sband->n_iftype_data; i++) 899 iftype_data[i].he_6ghz_capa.capa = cpu_to_le16(he_6ghz_capa); 900 } 901 902 static void 903 iwl_nvm_fixup_sband_iftd(struct iwl_trans *trans, 904 struct iwl_nvm_data *data, 905 struct ieee80211_supported_band *sband, 906 struct ieee80211_sband_iftype_data *iftype_data, 907 u8 tx_chains, u8 rx_chains, 908 const struct iwl_fw *fw) 909 { 910 bool is_ap = iftype_data->types_mask & (BIT(NL80211_IFTYPE_AP) | 911 BIT(NL80211_IFTYPE_P2P_GO)); 912 bool no_320; 913 914 no_320 = (!trans->trans_cfg->integrated && 915 trans->pcie_link_speed < PCI_EXP_LNKSTA_CLS_8_0GB) || 916 trans->reduced_cap_sku; 917 918 if (!data->sku_cap_11be_enable || iwlwifi_mod_params.disable_11be) 919 iftype_data->eht_cap.has_eht = false; 920 921 /* Advertise an A-MPDU exponent extension based on 922 * operating band 923 */ 924 if (sband->band == NL80211_BAND_6GHZ && iftype_data->eht_cap.has_eht) 925 iftype_data->he_cap.he_cap_elem.mac_cap_info[3] |= 926 IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_EXT_2; 927 else if (sband->band != NL80211_BAND_2GHZ) 928 iftype_data->he_cap.he_cap_elem.mac_cap_info[3] |= 929 IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_EXT_1; 930 else 931 iftype_data->he_cap.he_cap_elem.mac_cap_info[3] |= 932 IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_EXT_3; 933 934 switch (sband->band) { 935 case NL80211_BAND_2GHZ: 936 iftype_data->he_cap.he_cap_elem.phy_cap_info[0] |= 937 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_IN_2G; 938 iftype_data->eht_cap.eht_cap_elem.mac_cap_info[0] |= 939 u8_encode_bits(IEEE80211_EHT_MAC_CAP0_MAX_MPDU_LEN_11454, 940 IEEE80211_EHT_MAC_CAP0_MAX_MPDU_LEN_MASK); 941 break; 942 case NL80211_BAND_6GHZ: 943 if (!no_320) { 944 iftype_data->eht_cap.eht_cap_elem.phy_cap_info[0] |= 945 IEEE80211_EHT_PHY_CAP0_320MHZ_IN_6GHZ; 946 iftype_data->eht_cap.eht_cap_elem.phy_cap_info[1] |= 947 IEEE80211_EHT_PHY_CAP1_BEAMFORMEE_SS_320MHZ_MASK; 948 } 949 fallthrough; 950 case NL80211_BAND_5GHZ: 951 iftype_data->he_cap.he_cap_elem.phy_cap_info[0] |= 952 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_80MHZ_IN_5G | 953 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G; 954 break; 955 default: 956 WARN_ON(1); 957 break; 958 } 959 960 if ((tx_chains & rx_chains) == ANT_AB) { 961 iftype_data->he_cap.he_cap_elem.phy_cap_info[2] |= 962 IEEE80211_HE_PHY_CAP2_STBC_TX_UNDER_80MHZ; 963 iftype_data->he_cap.he_cap_elem.phy_cap_info[5] |= 964 IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_2 | 965 IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_ABOVE_80MHZ_2; 966 if (!is_ap) { 967 iftype_data->he_cap.he_cap_elem.phy_cap_info[7] |= 968 IEEE80211_HE_PHY_CAP7_MAX_NC_2; 969 970 if (iftype_data->eht_cap.has_eht) { 971 /* 972 * Set the number of sounding dimensions for each 973 * bandwidth to 1 to indicate the maximal supported 974 * value of TXVECTOR parameter NUM_STS of 2 975 */ 976 iftype_data->eht_cap.eht_cap_elem.phy_cap_info[2] |= 0x49; 977 978 /* 979 * Set the MAX NC to 1 to indicate sounding feedback of 980 * 2 supported by the beamfomee. 981 */ 982 iftype_data->eht_cap.eht_cap_elem.phy_cap_info[4] |= 0x10; 983 } 984 } 985 } else { 986 struct ieee80211_he_mcs_nss_supp *he_mcs_nss_supp = 987 &iftype_data->he_cap.he_mcs_nss_supp; 988 989 if (iftype_data->eht_cap.has_eht) { 990 struct ieee80211_eht_mcs_nss_supp *mcs_nss = 991 &iftype_data->eht_cap.eht_mcs_nss_supp; 992 993 memset(mcs_nss, 0x11, sizeof(*mcs_nss)); 994 } 995 996 if (!is_ap) { 997 /* If not 2x2, we need to indicate 1x1 in the 998 * Midamble RX Max NSTS - but not for AP mode 999 */ 1000 iftype_data->he_cap.he_cap_elem.phy_cap_info[1] &= 1001 ~IEEE80211_HE_PHY_CAP1_MIDAMBLE_RX_TX_MAX_NSTS; 1002 iftype_data->he_cap.he_cap_elem.phy_cap_info[2] &= 1003 ~IEEE80211_HE_PHY_CAP2_MIDAMBLE_RX_TX_MAX_NSTS; 1004 iftype_data->he_cap.he_cap_elem.phy_cap_info[7] |= 1005 IEEE80211_HE_PHY_CAP7_MAX_NC_1; 1006 } 1007 1008 he_mcs_nss_supp->rx_mcs_80 |= 1009 cpu_to_le16(IEEE80211_HE_MCS_NOT_SUPPORTED << 2); 1010 he_mcs_nss_supp->tx_mcs_80 |= 1011 cpu_to_le16(IEEE80211_HE_MCS_NOT_SUPPORTED << 2); 1012 he_mcs_nss_supp->rx_mcs_160 |= 1013 cpu_to_le16(IEEE80211_HE_MCS_NOT_SUPPORTED << 2); 1014 he_mcs_nss_supp->tx_mcs_160 |= 1015 cpu_to_le16(IEEE80211_HE_MCS_NOT_SUPPORTED << 2); 1016 he_mcs_nss_supp->rx_mcs_80p80 |= 1017 cpu_to_le16(IEEE80211_HE_MCS_NOT_SUPPORTED << 2); 1018 he_mcs_nss_supp->tx_mcs_80p80 |= 1019 cpu_to_le16(IEEE80211_HE_MCS_NOT_SUPPORTED << 2); 1020 } 1021 1022 if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_AX210 && !is_ap) 1023 iftype_data->he_cap.he_cap_elem.phy_cap_info[2] |= 1024 IEEE80211_HE_PHY_CAP2_UL_MU_FULL_MU_MIMO; 1025 1026 switch (CSR_HW_RFID_TYPE(trans->hw_rf_id)) { 1027 case IWL_CFG_RF_TYPE_GF: 1028 case IWL_CFG_RF_TYPE_FM: 1029 case IWL_CFG_RF_TYPE_WH: 1030 iftype_data->he_cap.he_cap_elem.phy_cap_info[9] |= 1031 IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU; 1032 if (!is_ap) 1033 iftype_data->he_cap.he_cap_elem.phy_cap_info[9] |= 1034 IEEE80211_HE_PHY_CAP9_RX_1024_QAM_LESS_THAN_242_TONE_RU; 1035 break; 1036 } 1037 1038 if (CSR_HW_REV_TYPE(trans->hw_rev) == IWL_CFG_MAC_TYPE_GL && 1039 iftype_data->eht_cap.has_eht) { 1040 iftype_data->eht_cap.eht_cap_elem.mac_cap_info[0] &= 1041 ~(IEEE80211_EHT_MAC_CAP0_TRIG_TXOP_SHARING_MODE1 | 1042 IEEE80211_EHT_MAC_CAP0_TRIG_TXOP_SHARING_MODE2); 1043 iftype_data->eht_cap.eht_cap_elem.phy_cap_info[3] &= 1044 ~(IEEE80211_EHT_PHY_CAP0_PARTIAL_BW_UL_MU_MIMO | 1045 IEEE80211_EHT_PHY_CAP3_NG_16_SU_FEEDBACK | 1046 IEEE80211_EHT_PHY_CAP3_NG_16_MU_FEEDBACK | 1047 IEEE80211_EHT_PHY_CAP3_CODEBOOK_4_2_SU_FDBK | 1048 IEEE80211_EHT_PHY_CAP3_CODEBOOK_7_5_MU_FDBK | 1049 IEEE80211_EHT_PHY_CAP3_TRIG_MU_BF_PART_BW_FDBK | 1050 IEEE80211_EHT_PHY_CAP3_TRIG_CQI_FDBK); 1051 iftype_data->eht_cap.eht_cap_elem.phy_cap_info[4] &= 1052 ~(IEEE80211_EHT_PHY_CAP4_PART_BW_DL_MU_MIMO | 1053 IEEE80211_EHT_PHY_CAP4_POWER_BOOST_FACT_SUPP); 1054 iftype_data->eht_cap.eht_cap_elem.phy_cap_info[5] &= 1055 ~IEEE80211_EHT_PHY_CAP5_NON_TRIG_CQI_FEEDBACK; 1056 iftype_data->eht_cap.eht_cap_elem.phy_cap_info[6] &= 1057 ~(IEEE80211_EHT_PHY_CAP6_MCS15_SUPP_MASK | 1058 IEEE80211_EHT_PHY_CAP6_EHT_DUP_6GHZ_SUPP); 1059 iftype_data->eht_cap.eht_cap_elem.phy_cap_info[5] |= 1060 IEEE80211_EHT_PHY_CAP5_SUPP_EXTRA_EHT_LTF; 1061 } 1062 1063 if (fw_has_capa(&fw->ucode_capa, IWL_UCODE_TLV_CAPA_BROADCAST_TWT)) 1064 iftype_data->he_cap.he_cap_elem.mac_cap_info[2] |= 1065 IEEE80211_HE_MAC_CAP2_BCAST_TWT; 1066 1067 if (trans->trans_cfg->device_family == IWL_DEVICE_FAMILY_22000 && 1068 !is_ap) { 1069 iftype_data->vendor_elems.data = iwl_vendor_caps; 1070 iftype_data->vendor_elems.len = ARRAY_SIZE(iwl_vendor_caps); 1071 } 1072 1073 if (!trans->cfg->ht_params->stbc) { 1074 iftype_data->he_cap.he_cap_elem.phy_cap_info[2] &= 1075 ~IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ; 1076 iftype_data->he_cap.he_cap_elem.phy_cap_info[7] &= 1077 ~IEEE80211_HE_PHY_CAP7_STBC_RX_ABOVE_80MHZ; 1078 } 1079 1080 if (trans->step_urm) { 1081 iftype_data->eht_cap.eht_mcs_nss_supp.bw._320.rx_tx_mcs11_max_nss = 0; 1082 iftype_data->eht_cap.eht_mcs_nss_supp.bw._320.rx_tx_mcs13_max_nss = 0; 1083 } 1084 1085 if (trans->no_160) 1086 iftype_data->he_cap.he_cap_elem.phy_cap_info[0] &= 1087 ~IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G; 1088 1089 if (trans->reduced_cap_sku) { 1090 memset(&iftype_data->eht_cap.eht_mcs_nss_supp.bw._320, 0, 1091 sizeof(iftype_data->eht_cap.eht_mcs_nss_supp.bw._320)); 1092 iftype_data->eht_cap.eht_mcs_nss_supp.bw._80.rx_tx_mcs13_max_nss = 0; 1093 iftype_data->eht_cap.eht_mcs_nss_supp.bw._160.rx_tx_mcs13_max_nss = 0; 1094 iftype_data->eht_cap.eht_cap_elem.phy_cap_info[8] &= 1095 ~IEEE80211_EHT_PHY_CAP8_RX_4096QAM_WIDER_BW_DL_OFDMA; 1096 iftype_data->eht_cap.eht_cap_elem.phy_cap_info[2] &= 1097 ~IEEE80211_EHT_PHY_CAP2_SOUNDING_DIM_320MHZ_MASK; 1098 } 1099 } 1100 1101 static void iwl_init_he_hw_capab(struct iwl_trans *trans, 1102 struct iwl_nvm_data *data, 1103 struct ieee80211_supported_band *sband, 1104 u8 tx_chains, u8 rx_chains, 1105 const struct iwl_fw *fw) 1106 { 1107 struct ieee80211_sband_iftype_data *iftype_data; 1108 int i; 1109 1110 BUILD_BUG_ON(sizeof(data->iftd.low) != sizeof(iwl_he_eht_capa)); 1111 BUILD_BUG_ON(sizeof(data->iftd.high) != sizeof(iwl_he_eht_capa)); 1112 BUILD_BUG_ON(sizeof(data->iftd.uhb) != sizeof(iwl_he_eht_capa)); 1113 1114 switch (sband->band) { 1115 case NL80211_BAND_2GHZ: 1116 iftype_data = data->iftd.low; 1117 break; 1118 case NL80211_BAND_5GHZ: 1119 iftype_data = data->iftd.high; 1120 break; 1121 case NL80211_BAND_6GHZ: 1122 iftype_data = data->iftd.uhb; 1123 break; 1124 default: 1125 WARN_ON(1); 1126 return; 1127 } 1128 1129 memcpy(iftype_data, iwl_he_eht_capa, sizeof(iwl_he_eht_capa)); 1130 1131 _ieee80211_set_sband_iftype_data(sband, iftype_data, 1132 ARRAY_SIZE(iwl_he_eht_capa)); 1133 1134 for (i = 0; i < sband->n_iftype_data; i++) 1135 iwl_nvm_fixup_sband_iftd(trans, data, sband, &iftype_data[i], 1136 tx_chains, rx_chains, fw); 1137 1138 iwl_init_he_6ghz_capa(trans, data, sband, tx_chains, rx_chains); 1139 } 1140 1141 void iwl_reinit_cab(struct iwl_trans *trans, struct iwl_nvm_data *data, 1142 u8 tx_chains, u8 rx_chains, const struct iwl_fw *fw) 1143 { 1144 struct ieee80211_supported_band *sband; 1145 1146 sband = &data->bands[NL80211_BAND_2GHZ]; 1147 iwl_init_ht_hw_capab(trans, data, &sband->ht_cap, NL80211_BAND_2GHZ, 1148 tx_chains, rx_chains); 1149 1150 if (data->sku_cap_11ax_enable && !iwlwifi_mod_params.disable_11ax) 1151 iwl_init_he_hw_capab(trans, data, sband, tx_chains, rx_chains, 1152 fw); 1153 1154 sband = &data->bands[NL80211_BAND_5GHZ]; 1155 iwl_init_ht_hw_capab(trans, data, &sband->ht_cap, NL80211_BAND_5GHZ, 1156 tx_chains, rx_chains); 1157 if (data->sku_cap_11ac_enable && !iwlwifi_mod_params.disable_11ac) 1158 iwl_init_vht_hw_capab(trans, data, &sband->vht_cap, 1159 tx_chains, rx_chains); 1160 1161 if (data->sku_cap_11ax_enable && !iwlwifi_mod_params.disable_11ax) 1162 iwl_init_he_hw_capab(trans, data, sband, tx_chains, rx_chains, 1163 fw); 1164 1165 sband = &data->bands[NL80211_BAND_6GHZ]; 1166 if (data->sku_cap_11ax_enable && !iwlwifi_mod_params.disable_11ax) 1167 iwl_init_he_hw_capab(trans, data, sband, tx_chains, rx_chains, 1168 fw); 1169 } 1170 IWL_EXPORT_SYMBOL(iwl_reinit_cab); 1171 1172 static void iwl_init_sbands(struct iwl_trans *trans, 1173 struct iwl_nvm_data *data, 1174 const void *nvm_ch_flags, u8 tx_chains, 1175 u8 rx_chains, u32 sbands_flags, bool v4, 1176 const struct iwl_fw *fw) 1177 { 1178 struct device *dev = trans->dev; 1179 int n_channels; 1180 int n_used = 0; 1181 struct ieee80211_supported_band *sband; 1182 1183 n_channels = iwl_init_channel_map(trans, fw, data, nvm_ch_flags, 1184 sbands_flags, v4); 1185 sband = &data->bands[NL80211_BAND_2GHZ]; 1186 sband->band = NL80211_BAND_2GHZ; 1187 sband->bitrates = &iwl_cfg80211_rates[RATES_24_OFFS]; 1188 sband->n_bitrates = N_RATES_24; 1189 n_used += iwl_init_sband_channels(data, sband, n_channels, 1190 NL80211_BAND_2GHZ); 1191 iwl_init_ht_hw_capab(trans, data, &sband->ht_cap, NL80211_BAND_2GHZ, 1192 tx_chains, rx_chains); 1193 1194 if (data->sku_cap_11ax_enable && !iwlwifi_mod_params.disable_11ax) 1195 iwl_init_he_hw_capab(trans, data, sband, tx_chains, rx_chains, 1196 fw); 1197 1198 sband = &data->bands[NL80211_BAND_5GHZ]; 1199 sband->band = NL80211_BAND_5GHZ; 1200 sband->bitrates = &iwl_cfg80211_rates[RATES_52_OFFS]; 1201 sband->n_bitrates = N_RATES_52; 1202 n_used += iwl_init_sband_channels(data, sband, n_channels, 1203 NL80211_BAND_5GHZ); 1204 iwl_init_ht_hw_capab(trans, data, &sband->ht_cap, NL80211_BAND_5GHZ, 1205 tx_chains, rx_chains); 1206 if (data->sku_cap_11ac_enable && !iwlwifi_mod_params.disable_11ac) 1207 iwl_init_vht_hw_capab(trans, data, &sband->vht_cap, 1208 tx_chains, rx_chains); 1209 1210 if (data->sku_cap_11ax_enable && !iwlwifi_mod_params.disable_11ax) 1211 iwl_init_he_hw_capab(trans, data, sband, tx_chains, rx_chains, 1212 fw); 1213 1214 /* 6GHz band. */ 1215 sband = &data->bands[NL80211_BAND_6GHZ]; 1216 sband->band = NL80211_BAND_6GHZ; 1217 /* use the same rates as 5GHz band */ 1218 sband->bitrates = &iwl_cfg80211_rates[RATES_52_OFFS]; 1219 sband->n_bitrates = N_RATES_52; 1220 n_used += iwl_init_sband_channels(data, sband, n_channels, 1221 NL80211_BAND_6GHZ); 1222 1223 if (data->sku_cap_11ax_enable && !iwlwifi_mod_params.disable_11ax) 1224 iwl_init_he_hw_capab(trans, data, sband, tx_chains, rx_chains, 1225 fw); 1226 else 1227 sband->n_channels = 0; 1228 if (n_channels != n_used) 1229 IWL_ERR_DEV(dev, "NVM: used only %d of %d channels\n", 1230 n_used, n_channels); 1231 } 1232 1233 static int iwl_get_sku(const struct iwl_cfg *cfg, const __le16 *nvm_sw, 1234 const __le16 *phy_sku) 1235 { 1236 if (cfg->nvm_type != IWL_NVM_EXT) 1237 return le16_to_cpup(nvm_sw + SKU); 1238 1239 return le32_to_cpup((const __le32 *)(phy_sku + SKU_FAMILY_8000)); 1240 } 1241 1242 static int iwl_get_nvm_version(const struct iwl_cfg *cfg, const __le16 *nvm_sw) 1243 { 1244 if (cfg->nvm_type != IWL_NVM_EXT) 1245 return le16_to_cpup(nvm_sw + NVM_VERSION); 1246 else 1247 return le32_to_cpup((const __le32 *)(nvm_sw + 1248 NVM_VERSION_EXT_NVM)); 1249 } 1250 1251 static int iwl_get_radio_cfg(const struct iwl_cfg *cfg, const __le16 *nvm_sw, 1252 const __le16 *phy_sku) 1253 { 1254 if (cfg->nvm_type != IWL_NVM_EXT) 1255 return le16_to_cpup(nvm_sw + RADIO_CFG); 1256 1257 return le32_to_cpup((const __le32 *)(phy_sku + RADIO_CFG_FAMILY_EXT_NVM)); 1258 1259 } 1260 1261 static int iwl_get_n_hw_addrs(const struct iwl_cfg *cfg, const __le16 *nvm_sw) 1262 { 1263 int n_hw_addr; 1264 1265 if (cfg->nvm_type != IWL_NVM_EXT) 1266 return le16_to_cpup(nvm_sw + N_HW_ADDRS); 1267 1268 n_hw_addr = le32_to_cpup((const __le32 *)(nvm_sw + N_HW_ADDRS_FAMILY_8000)); 1269 1270 return n_hw_addr & N_HW_ADDR_MASK; 1271 } 1272 1273 static void iwl_set_radio_cfg(const struct iwl_cfg *cfg, 1274 struct iwl_nvm_data *data, 1275 u32 radio_cfg) 1276 { 1277 if (cfg->nvm_type != IWL_NVM_EXT) { 1278 data->radio_cfg_type = NVM_RF_CFG_TYPE_MSK(radio_cfg); 1279 data->radio_cfg_step = NVM_RF_CFG_STEP_MSK(radio_cfg); 1280 data->radio_cfg_dash = NVM_RF_CFG_DASH_MSK(radio_cfg); 1281 data->radio_cfg_pnum = NVM_RF_CFG_PNUM_MSK(radio_cfg); 1282 return; 1283 } 1284 1285 /* set the radio configuration for family 8000 */ 1286 data->radio_cfg_type = EXT_NVM_RF_CFG_TYPE_MSK(radio_cfg); 1287 data->radio_cfg_step = EXT_NVM_RF_CFG_STEP_MSK(radio_cfg); 1288 data->radio_cfg_dash = EXT_NVM_RF_CFG_DASH_MSK(radio_cfg); 1289 data->radio_cfg_pnum = EXT_NVM_RF_CFG_FLAVOR_MSK(radio_cfg); 1290 data->valid_tx_ant = EXT_NVM_RF_CFG_TX_ANT_MSK(radio_cfg); 1291 data->valid_rx_ant = EXT_NVM_RF_CFG_RX_ANT_MSK(radio_cfg); 1292 } 1293 1294 static void iwl_flip_hw_address(__le32 mac_addr0, __le32 mac_addr1, u8 *dest) 1295 { 1296 const u8 *hw_addr; 1297 1298 hw_addr = (const u8 *)&mac_addr0; 1299 dest[0] = hw_addr[3]; 1300 dest[1] = hw_addr[2]; 1301 dest[2] = hw_addr[1]; 1302 dest[3] = hw_addr[0]; 1303 1304 hw_addr = (const u8 *)&mac_addr1; 1305 dest[4] = hw_addr[1]; 1306 dest[5] = hw_addr[0]; 1307 } 1308 1309 static void iwl_set_hw_address_from_csr(struct iwl_trans *trans, 1310 struct iwl_nvm_data *data) 1311 { 1312 __le32 mac_addr0 = cpu_to_le32(iwl_read32(trans, 1313 CSR_MAC_ADDR0_STRAP(trans))); 1314 __le32 mac_addr1 = cpu_to_le32(iwl_read32(trans, 1315 CSR_MAC_ADDR1_STRAP(trans))); 1316 1317 iwl_flip_hw_address(mac_addr0, mac_addr1, data->hw_addr); 1318 /* 1319 * If the OEM fused a valid address, use it instead of the one in the 1320 * OTP 1321 */ 1322 if (is_valid_ether_addr(data->hw_addr)) 1323 return; 1324 1325 mac_addr0 = cpu_to_le32(iwl_read32(trans, CSR_MAC_ADDR0_OTP(trans))); 1326 mac_addr1 = cpu_to_le32(iwl_read32(trans, CSR_MAC_ADDR1_OTP(trans))); 1327 1328 iwl_flip_hw_address(mac_addr0, mac_addr1, data->hw_addr); 1329 } 1330 1331 static void iwl_set_hw_address_family_8000(struct iwl_trans *trans, 1332 const struct iwl_cfg *cfg, 1333 struct iwl_nvm_data *data, 1334 const __le16 *mac_override, 1335 const __be16 *nvm_hw) 1336 { 1337 const u8 *hw_addr; 1338 1339 if (mac_override) { 1340 static const u8 reserved_mac[] = { 1341 0x02, 0xcc, 0xaa, 0xff, 0xee, 0x00 1342 }; 1343 1344 hw_addr = (const u8 *)(mac_override + 1345 MAC_ADDRESS_OVERRIDE_EXT_NVM); 1346 1347 /* 1348 * Store the MAC address from MAO section. 1349 * No byte swapping is required in MAO section 1350 */ 1351 memcpy(data->hw_addr, hw_addr, ETH_ALEN); 1352 1353 /* 1354 * Force the use of the OTP MAC address in case of reserved MAC 1355 * address in the NVM, or if address is given but invalid. 1356 */ 1357 if (is_valid_ether_addr(data->hw_addr) && 1358 memcmp(reserved_mac, hw_addr, ETH_ALEN) != 0) 1359 return; 1360 1361 IWL_ERR(trans, 1362 "mac address from nvm override section is not valid\n"); 1363 } 1364 1365 if (nvm_hw) { 1366 /* read the mac address from WFMP registers */ 1367 __le32 mac_addr0 = cpu_to_le32(iwl_trans_read_prph(trans, 1368 WFMP_MAC_ADDR_0)); 1369 __le32 mac_addr1 = cpu_to_le32(iwl_trans_read_prph(trans, 1370 WFMP_MAC_ADDR_1)); 1371 1372 iwl_flip_hw_address(mac_addr0, mac_addr1, data->hw_addr); 1373 1374 return; 1375 } 1376 1377 IWL_ERR(trans, "mac address is not found\n"); 1378 } 1379 1380 static int iwl_set_hw_address(struct iwl_trans *trans, 1381 const struct iwl_cfg *cfg, 1382 struct iwl_nvm_data *data, const __be16 *nvm_hw, 1383 const __le16 *mac_override) 1384 { 1385 if (cfg->mac_addr_from_csr) { 1386 iwl_set_hw_address_from_csr(trans, data); 1387 } else if (cfg->nvm_type != IWL_NVM_EXT) { 1388 const u8 *hw_addr = (const u8 *)(nvm_hw + HW_ADDR); 1389 1390 /* The byte order is little endian 16 bit, meaning 214365 */ 1391 data->hw_addr[0] = hw_addr[1]; 1392 data->hw_addr[1] = hw_addr[0]; 1393 data->hw_addr[2] = hw_addr[3]; 1394 data->hw_addr[3] = hw_addr[2]; 1395 data->hw_addr[4] = hw_addr[5]; 1396 data->hw_addr[5] = hw_addr[4]; 1397 } else { 1398 iwl_set_hw_address_family_8000(trans, cfg, data, 1399 mac_override, nvm_hw); 1400 } 1401 1402 if (!is_valid_ether_addr(data->hw_addr)) { 1403 IWL_ERR(trans, "no valid mac address was found\n"); 1404 return -EINVAL; 1405 } 1406 1407 if (!trans->csme_own) 1408 IWL_INFO(trans, "base HW address: %pM, OTP minor version: 0x%x\n", 1409 data->hw_addr, iwl_read_prph(trans, REG_OTP_MINOR)); 1410 1411 return 0; 1412 } 1413 1414 static bool 1415 iwl_nvm_no_wide_in_5ghz(struct iwl_trans *trans, const struct iwl_cfg *cfg, 1416 const __be16 *nvm_hw) 1417 { 1418 /* 1419 * Workaround a bug in Indonesia SKUs where the regulatory in 1420 * some 7000-family OTPs erroneously allow wide channels in 1421 * 5GHz. To check for Indonesia, we take the SKU value from 1422 * bits 1-4 in the subsystem ID and check if it is either 5 or 1423 * 9. In those cases, we need to force-disable wide channels 1424 * in 5GHz otherwise the FW will throw a sysassert when we try 1425 * to use them. 1426 */ 1427 if (trans->trans_cfg->device_family == IWL_DEVICE_FAMILY_7000) { 1428 /* 1429 * Unlike the other sections in the NVM, the hw 1430 * section uses big-endian. 1431 */ 1432 u16 subsystem_id = be16_to_cpup(nvm_hw + SUBSYSTEM_ID); 1433 u8 sku = (subsystem_id & 0x1e) >> 1; 1434 1435 if (sku == 5 || sku == 9) { 1436 IWL_DEBUG_EEPROM(trans->dev, 1437 "disabling wide channels in 5GHz (0x%0x %d)\n", 1438 subsystem_id, sku); 1439 return true; 1440 } 1441 } 1442 1443 return false; 1444 } 1445 1446 struct iwl_nvm_data * 1447 iwl_parse_mei_nvm_data(struct iwl_trans *trans, const struct iwl_cfg *cfg, 1448 const struct iwl_mei_nvm *mei_nvm, 1449 const struct iwl_fw *fw, u8 tx_ant, u8 rx_ant) 1450 { 1451 struct iwl_nvm_data *data; 1452 u32 sbands_flags = 0; 1453 u8 rx_chains = fw->valid_rx_ant; 1454 u8 tx_chains = fw->valid_rx_ant; 1455 1456 if (cfg->uhb_supported) 1457 data = kzalloc(struct_size(data, channels, 1458 IWL_NVM_NUM_CHANNELS_UHB), 1459 GFP_KERNEL); 1460 else 1461 data = kzalloc(struct_size(data, channels, 1462 IWL_NVM_NUM_CHANNELS_EXT), 1463 GFP_KERNEL); 1464 if (!data) 1465 return NULL; 1466 1467 BUILD_BUG_ON(ARRAY_SIZE(mei_nvm->channels) != 1468 IWL_NVM_NUM_CHANNELS_UHB); 1469 data->nvm_version = mei_nvm->nvm_version; 1470 1471 iwl_set_radio_cfg(cfg, data, mei_nvm->radio_cfg); 1472 if (data->valid_tx_ant) 1473 tx_chains &= data->valid_tx_ant; 1474 if (data->valid_rx_ant) 1475 rx_chains &= data->valid_rx_ant; 1476 if (tx_ant) 1477 tx_chains &= tx_ant; 1478 if (rx_ant) 1479 rx_chains &= rx_ant; 1480 1481 data->sku_cap_mimo_disabled = false; 1482 data->sku_cap_band_24ghz_enable = true; 1483 data->sku_cap_band_52ghz_enable = true; 1484 data->sku_cap_11n_enable = 1485 !(iwlwifi_mod_params.disable_11n & IWL_DISABLE_HT_ALL); 1486 data->sku_cap_11ac_enable = true; 1487 data->sku_cap_11ax_enable = 1488 mei_nvm->caps & MEI_NVM_CAPS_11AX_SUPPORT; 1489 1490 data->lar_enabled = mei_nvm->caps & MEI_NVM_CAPS_LARI_SUPPORT; 1491 1492 data->n_hw_addrs = mei_nvm->n_hw_addrs; 1493 /* If no valid mac address was found - bail out */ 1494 if (iwl_set_hw_address(trans, cfg, data, NULL, NULL)) { 1495 kfree(data); 1496 return NULL; 1497 } 1498 1499 if (data->lar_enabled && 1500 fw_has_capa(&fw->ucode_capa, IWL_UCODE_TLV_CAPA_LAR_SUPPORT)) 1501 sbands_flags |= IWL_NVM_SBANDS_FLAGS_LAR; 1502 1503 iwl_init_sbands(trans, data, mei_nvm->channels, tx_chains, rx_chains, 1504 sbands_flags, true, fw); 1505 1506 return data; 1507 } 1508 IWL_EXPORT_SYMBOL(iwl_parse_mei_nvm_data); 1509 1510 struct iwl_nvm_data * 1511 iwl_parse_nvm_data(struct iwl_trans *trans, const struct iwl_cfg *cfg, 1512 const struct iwl_fw *fw, 1513 const __be16 *nvm_hw, const __le16 *nvm_sw, 1514 const __le16 *nvm_calib, const __le16 *regulatory, 1515 const __le16 *mac_override, const __le16 *phy_sku, 1516 u8 tx_chains, u8 rx_chains) 1517 { 1518 struct iwl_nvm_data *data; 1519 bool lar_enabled; 1520 u32 sku, radio_cfg; 1521 u32 sbands_flags = 0; 1522 u16 lar_config; 1523 const __le16 *ch_section; 1524 1525 if (cfg->uhb_supported) 1526 data = kzalloc(struct_size(data, channels, 1527 IWL_NVM_NUM_CHANNELS_UHB), 1528 GFP_KERNEL); 1529 else if (cfg->nvm_type != IWL_NVM_EXT) 1530 data = kzalloc(struct_size(data, channels, 1531 IWL_NVM_NUM_CHANNELS), 1532 GFP_KERNEL); 1533 else 1534 data = kzalloc(struct_size(data, channels, 1535 IWL_NVM_NUM_CHANNELS_EXT), 1536 GFP_KERNEL); 1537 if (!data) 1538 return NULL; 1539 1540 data->nvm_version = iwl_get_nvm_version(cfg, nvm_sw); 1541 1542 radio_cfg = iwl_get_radio_cfg(cfg, nvm_sw, phy_sku); 1543 iwl_set_radio_cfg(cfg, data, radio_cfg); 1544 if (data->valid_tx_ant) 1545 tx_chains &= data->valid_tx_ant; 1546 if (data->valid_rx_ant) 1547 rx_chains &= data->valid_rx_ant; 1548 1549 sku = iwl_get_sku(cfg, nvm_sw, phy_sku); 1550 data->sku_cap_band_24ghz_enable = sku & NVM_SKU_CAP_BAND_24GHZ; 1551 data->sku_cap_band_52ghz_enable = sku & NVM_SKU_CAP_BAND_52GHZ; 1552 data->sku_cap_11n_enable = sku & NVM_SKU_CAP_11N_ENABLE; 1553 if (iwlwifi_mod_params.disable_11n & IWL_DISABLE_HT_ALL) 1554 data->sku_cap_11n_enable = false; 1555 data->sku_cap_11ac_enable = data->sku_cap_11n_enable && 1556 (sku & NVM_SKU_CAP_11AC_ENABLE); 1557 data->sku_cap_mimo_disabled = sku & NVM_SKU_CAP_MIMO_DISABLE; 1558 1559 data->n_hw_addrs = iwl_get_n_hw_addrs(cfg, nvm_sw); 1560 1561 if (cfg->nvm_type != IWL_NVM_EXT) { 1562 /* Checking for required sections */ 1563 if (!nvm_calib) { 1564 IWL_ERR(trans, 1565 "Can't parse empty Calib NVM sections\n"); 1566 kfree(data); 1567 return NULL; 1568 } 1569 1570 ch_section = cfg->nvm_type == IWL_NVM_SDP ? 1571 ®ulatory[NVM_CHANNELS_SDP] : 1572 &nvm_sw[NVM_CHANNELS]; 1573 1574 lar_enabled = true; 1575 } else { 1576 u16 lar_offset = data->nvm_version < 0xE39 ? 1577 NVM_LAR_OFFSET_OLD : 1578 NVM_LAR_OFFSET; 1579 1580 lar_config = le16_to_cpup(regulatory + lar_offset); 1581 data->lar_enabled = !!(lar_config & 1582 NVM_LAR_ENABLED); 1583 lar_enabled = data->lar_enabled; 1584 ch_section = ®ulatory[NVM_CHANNELS_EXTENDED]; 1585 } 1586 1587 /* If no valid mac address was found - bail out */ 1588 if (iwl_set_hw_address(trans, cfg, data, nvm_hw, mac_override)) { 1589 kfree(data); 1590 return NULL; 1591 } 1592 1593 if (lar_enabled && 1594 fw_has_capa(&fw->ucode_capa, IWL_UCODE_TLV_CAPA_LAR_SUPPORT)) 1595 sbands_flags |= IWL_NVM_SBANDS_FLAGS_LAR; 1596 1597 if (iwl_nvm_no_wide_in_5ghz(trans, cfg, nvm_hw)) 1598 sbands_flags |= IWL_NVM_SBANDS_FLAGS_NO_WIDE_IN_5GHZ; 1599 1600 iwl_init_sbands(trans, data, ch_section, tx_chains, rx_chains, 1601 sbands_flags, false, fw); 1602 data->calib_version = 255; 1603 1604 return data; 1605 } 1606 IWL_EXPORT_SYMBOL(iwl_parse_nvm_data); 1607 1608 static u32 iwl_nvm_get_regdom_bw_flags(const u16 *nvm_chan, 1609 int ch_idx, u16 nvm_flags, 1610 struct iwl_reg_capa reg_capa, 1611 const struct iwl_cfg *cfg, 1612 bool uats_enabled) 1613 { 1614 u32 flags = NL80211_RRF_NO_HT40; 1615 1616 if (ch_idx < NUM_2GHZ_CHANNELS && 1617 (nvm_flags & NVM_CHANNEL_40MHZ)) { 1618 if (nvm_chan[ch_idx] <= LAST_2GHZ_HT_PLUS) 1619 flags &= ~NL80211_RRF_NO_HT40PLUS; 1620 if (nvm_chan[ch_idx] >= FIRST_2GHZ_HT_MINUS) 1621 flags &= ~NL80211_RRF_NO_HT40MINUS; 1622 } else if (ch_idx < NUM_2GHZ_CHANNELS + NUM_5GHZ_CHANNELS && 1623 nvm_flags & NVM_CHANNEL_40MHZ) { 1624 if ((ch_idx - NUM_2GHZ_CHANNELS) % 2 == 0) 1625 flags &= ~NL80211_RRF_NO_HT40PLUS; 1626 else 1627 flags &= ~NL80211_RRF_NO_HT40MINUS; 1628 } else if (nvm_flags & NVM_CHANNEL_40MHZ) { 1629 flags &= ~NL80211_RRF_NO_HT40PLUS; 1630 flags &= ~NL80211_RRF_NO_HT40MINUS; 1631 } 1632 1633 if (!(nvm_flags & NVM_CHANNEL_80MHZ)) 1634 flags |= NL80211_RRF_NO_80MHZ; 1635 if (!(nvm_flags & NVM_CHANNEL_160MHZ)) 1636 flags |= NL80211_RRF_NO_160MHZ; 1637 1638 if (!(nvm_flags & NVM_CHANNEL_ACTIVE)) 1639 flags |= NL80211_RRF_NO_IR; 1640 1641 if (nvm_flags & NVM_CHANNEL_RADAR) 1642 flags |= NL80211_RRF_DFS; 1643 1644 if (nvm_flags & NVM_CHANNEL_INDOOR_ONLY) 1645 flags |= NL80211_RRF_NO_OUTDOOR; 1646 1647 /* Set the GO concurrent flag only in case that NO_IR is set. 1648 * Otherwise it is meaningless 1649 */ 1650 if ((nvm_flags & NVM_CHANNEL_GO_CONCURRENT)) { 1651 if (flags & NL80211_RRF_NO_IR) 1652 flags |= NL80211_RRF_GO_CONCURRENT; 1653 if (flags & NL80211_RRF_DFS) { 1654 flags |= NL80211_RRF_DFS_CONCURRENT; 1655 /* Our device doesn't set active bit for DFS channels 1656 * however, once marked as DFS no-ir is not needed. 1657 */ 1658 flags &= ~NL80211_RRF_NO_IR; 1659 } 1660 } 1661 1662 /* Set the AP type for the UHB case. */ 1663 if (uats_enabled) { 1664 if (!(nvm_flags & NVM_CHANNEL_VLP)) 1665 flags |= NL80211_RRF_NO_6GHZ_VLP_CLIENT; 1666 1667 if (!(nvm_flags & NVM_CHANNEL_AFC)) 1668 flags |= NL80211_RRF_NO_6GHZ_AFC_CLIENT; 1669 } 1670 1671 /* 1672 * reg_capa is per regulatory domain so apply it for every channel 1673 */ 1674 if (ch_idx >= NUM_2GHZ_CHANNELS) { 1675 if (!reg_capa.allow_40mhz) 1676 flags |= NL80211_RRF_NO_HT40; 1677 1678 if (!reg_capa.allow_80mhz) 1679 flags |= NL80211_RRF_NO_80MHZ; 1680 1681 if (!reg_capa.allow_160mhz) 1682 flags |= NL80211_RRF_NO_160MHZ; 1683 1684 if (!reg_capa.allow_320mhz) 1685 flags |= NL80211_RRF_NO_320MHZ; 1686 } 1687 1688 if (reg_capa.disable_11ax) 1689 flags |= NL80211_RRF_NO_HE; 1690 1691 if (reg_capa.disable_11be) 1692 flags |= NL80211_RRF_NO_EHT; 1693 1694 return flags; 1695 } 1696 1697 static struct iwl_reg_capa iwl_get_reg_capa(u32 flags, u8 resp_ver) 1698 { 1699 struct iwl_reg_capa reg_capa = {}; 1700 1701 if (resp_ver >= REG_CAPA_V4_RESP_VER) { 1702 reg_capa.allow_40mhz = true; 1703 reg_capa.allow_80mhz = flags & REG_CAPA_V4_80MHZ_ALLOWED; 1704 reg_capa.allow_160mhz = flags & REG_CAPA_V4_160MHZ_ALLOWED; 1705 reg_capa.allow_320mhz = flags & REG_CAPA_V4_320MHZ_ALLOWED; 1706 reg_capa.disable_11ax = flags & REG_CAPA_V4_11AX_DISABLED; 1707 reg_capa.disable_11be = flags & REG_CAPA_V4_11BE_DISABLED; 1708 } else if (resp_ver >= REG_CAPA_V2_RESP_VER) { 1709 reg_capa.allow_40mhz = flags & REG_CAPA_V2_40MHZ_ALLOWED; 1710 reg_capa.allow_80mhz = flags & REG_CAPA_V2_80MHZ_ALLOWED; 1711 reg_capa.allow_160mhz = flags & REG_CAPA_V2_160MHZ_ALLOWED; 1712 reg_capa.disable_11ax = flags & REG_CAPA_V2_11AX_DISABLED; 1713 } else { 1714 reg_capa.allow_40mhz = !(flags & REG_CAPA_V1_40MHZ_FORBIDDEN); 1715 reg_capa.allow_80mhz = flags & REG_CAPA_V1_80MHZ_ALLOWED; 1716 reg_capa.allow_160mhz = flags & REG_CAPA_V1_160MHZ_ALLOWED; 1717 reg_capa.disable_11ax = flags & REG_CAPA_V1_11AX_DISABLED; 1718 } 1719 return reg_capa; 1720 } 1721 1722 struct ieee80211_regdomain * 1723 iwl_parse_nvm_mcc_info(struct device *dev, const struct iwl_cfg *cfg, 1724 int num_of_ch, __le32 *channels, u16 fw_mcc, 1725 u16 geo_info, u32 cap, u8 resp_ver, bool uats_enabled) 1726 { 1727 int ch_idx; 1728 u16 ch_flags; 1729 u32 reg_rule_flags, prev_reg_rule_flags = 0; 1730 const u16 *nvm_chan; 1731 struct ieee80211_regdomain *regd, *copy_rd; 1732 struct ieee80211_reg_rule *rule; 1733 int center_freq, prev_center_freq = 0; 1734 int valid_rules = 0; 1735 bool new_rule; 1736 int max_num_ch; 1737 struct iwl_reg_capa reg_capa; 1738 1739 if (cfg->uhb_supported) { 1740 max_num_ch = IWL_NVM_NUM_CHANNELS_UHB; 1741 nvm_chan = iwl_uhb_nvm_channels; 1742 } else if (cfg->nvm_type == IWL_NVM_EXT) { 1743 max_num_ch = IWL_NVM_NUM_CHANNELS_EXT; 1744 nvm_chan = iwl_ext_nvm_channels; 1745 } else { 1746 max_num_ch = IWL_NVM_NUM_CHANNELS; 1747 nvm_chan = iwl_nvm_channels; 1748 } 1749 1750 if (num_of_ch > max_num_ch) { 1751 IWL_DEBUG_DEV(dev, IWL_DL_LAR, 1752 "Num of channels (%d) is greater than expected. Truncating to %d\n", 1753 num_of_ch, max_num_ch); 1754 num_of_ch = max_num_ch; 1755 } 1756 1757 if (WARN_ON_ONCE(num_of_ch > NL80211_MAX_SUPP_REG_RULES)) 1758 return ERR_PTR(-EINVAL); 1759 1760 IWL_DEBUG_DEV(dev, IWL_DL_LAR, "building regdom for %d channels\n", 1761 num_of_ch); 1762 1763 /* build a regdomain rule for every valid channel */ 1764 regd = kzalloc(struct_size(regd, reg_rules, num_of_ch), GFP_KERNEL); 1765 if (!regd) 1766 return ERR_PTR(-ENOMEM); 1767 1768 /* set alpha2 from FW. */ 1769 regd->alpha2[0] = fw_mcc >> 8; 1770 regd->alpha2[1] = fw_mcc & 0xff; 1771 1772 /* parse regulatory capability flags */ 1773 reg_capa = iwl_get_reg_capa(cap, resp_ver); 1774 1775 for (ch_idx = 0; ch_idx < num_of_ch; ch_idx++) { 1776 enum nl80211_band band = 1777 iwl_nl80211_band_from_channel_idx(ch_idx); 1778 1779 ch_flags = (u16)__le32_to_cpup(channels + ch_idx); 1780 center_freq = ieee80211_channel_to_frequency(nvm_chan[ch_idx], 1781 band); 1782 new_rule = false; 1783 1784 if (!(ch_flags & NVM_CHANNEL_VALID)) { 1785 iwl_nvm_print_channel_flags(dev, IWL_DL_LAR, 1786 nvm_chan[ch_idx], ch_flags); 1787 continue; 1788 } 1789 1790 reg_rule_flags = iwl_nvm_get_regdom_bw_flags(nvm_chan, ch_idx, 1791 ch_flags, reg_capa, 1792 cfg, uats_enabled); 1793 1794 /* we can't continue the same rule */ 1795 if (ch_idx == 0 || prev_reg_rule_flags != reg_rule_flags || 1796 center_freq - prev_center_freq > 20) { 1797 valid_rules++; 1798 new_rule = true; 1799 } 1800 1801 rule = ®d->reg_rules[valid_rules - 1]; 1802 1803 if (new_rule) 1804 rule->freq_range.start_freq_khz = 1805 MHZ_TO_KHZ(center_freq - 10); 1806 1807 rule->freq_range.end_freq_khz = MHZ_TO_KHZ(center_freq + 10); 1808 1809 /* this doesn't matter - not used by FW */ 1810 rule->power_rule.max_antenna_gain = DBI_TO_MBI(6); 1811 rule->power_rule.max_eirp = 1812 DBM_TO_MBM(IWL_DEFAULT_MAX_TX_POWER); 1813 1814 rule->flags = reg_rule_flags; 1815 1816 /* rely on auto-calculation to merge BW of contiguous chans */ 1817 rule->flags |= NL80211_RRF_AUTO_BW; 1818 rule->freq_range.max_bandwidth_khz = 0; 1819 1820 prev_center_freq = center_freq; 1821 prev_reg_rule_flags = reg_rule_flags; 1822 1823 iwl_nvm_print_channel_flags(dev, IWL_DL_LAR, 1824 nvm_chan[ch_idx], ch_flags); 1825 1826 if (!(geo_info & GEO_WMM_ETSI_5GHZ_INFO) || 1827 band == NL80211_BAND_2GHZ) 1828 continue; 1829 1830 reg_query_regdb_wmm(regd->alpha2, center_freq, rule); 1831 } 1832 1833 /* 1834 * Certain firmware versions might report no valid channels 1835 * if booted in RF-kill, i.e. not all calibrations etc. are 1836 * running. We'll get out of this situation later when the 1837 * rfkill is removed and we update the regdomain again, but 1838 * since cfg80211 doesn't accept an empty regdomain, add a 1839 * dummy (unusable) rule here in this case so we can init. 1840 */ 1841 if (!valid_rules) { 1842 valid_rules = 1; 1843 rule = ®d->reg_rules[valid_rules - 1]; 1844 rule->freq_range.start_freq_khz = MHZ_TO_KHZ(2412); 1845 rule->freq_range.end_freq_khz = MHZ_TO_KHZ(2413); 1846 rule->freq_range.max_bandwidth_khz = MHZ_TO_KHZ(1); 1847 rule->power_rule.max_antenna_gain = DBI_TO_MBI(6); 1848 rule->power_rule.max_eirp = 1849 DBM_TO_MBM(IWL_DEFAULT_MAX_TX_POWER); 1850 } 1851 1852 regd->n_reg_rules = valid_rules; 1853 1854 /* 1855 * Narrow down regdom for unused regulatory rules to prevent hole 1856 * between reg rules to wmm rules. 1857 */ 1858 copy_rd = kmemdup(regd, struct_size(regd, reg_rules, valid_rules), 1859 GFP_KERNEL); 1860 if (!copy_rd) 1861 copy_rd = ERR_PTR(-ENOMEM); 1862 1863 kfree(regd); 1864 return copy_rd; 1865 } 1866 IWL_EXPORT_SYMBOL(iwl_parse_nvm_mcc_info); 1867 1868 #define IWL_MAX_NVM_SECTION_SIZE 0x1b58 1869 #define IWL_MAX_EXT_NVM_SECTION_SIZE 0x1ffc 1870 #define MAX_NVM_FILE_LEN 16384 1871 1872 void iwl_nvm_fixups(u32 hw_id, unsigned int section, u8 *data, 1873 unsigned int len) 1874 { 1875 #define IWL_4165_DEVICE_ID 0x5501 1876 #define NVM_SKU_CAP_MIMO_DISABLE BIT(5) 1877 1878 if (section == NVM_SECTION_TYPE_PHY_SKU && 1879 hw_id == IWL_4165_DEVICE_ID && data && len >= 5 && 1880 (data[4] & NVM_SKU_CAP_MIMO_DISABLE)) 1881 /* OTP 0x52 bug work around: it's a 1x1 device */ 1882 data[3] = ANT_B | (ANT_B << 4); 1883 } 1884 IWL_EXPORT_SYMBOL(iwl_nvm_fixups); 1885 1886 /* 1887 * Reads external NVM from a file into mvm->nvm_sections 1888 * 1889 * HOW TO CREATE THE NVM FILE FORMAT: 1890 * ------------------------------ 1891 * 1. create hex file, format: 1892 * 3800 -> header 1893 * 0000 -> header 1894 * 5a40 -> data 1895 * 1896 * rev - 6 bit (word1) 1897 * len - 10 bit (word1) 1898 * id - 4 bit (word2) 1899 * rsv - 12 bit (word2) 1900 * 1901 * 2. flip 8bits with 8 bits per line to get the right NVM file format 1902 * 1903 * 3. create binary file from the hex file 1904 * 1905 * 4. save as "iNVM_xxx.bin" under /lib/firmware 1906 */ 1907 int iwl_read_external_nvm(struct iwl_trans *trans, 1908 const char *nvm_file_name, 1909 struct iwl_nvm_section *nvm_sections) 1910 { 1911 int ret, section_size; 1912 u16 section_id; 1913 const struct firmware *fw_entry; 1914 const struct { 1915 __le16 word1; 1916 __le16 word2; 1917 u8 data[]; 1918 } *file_sec; 1919 const u8 *eof; 1920 u8 *temp; 1921 int max_section_size; 1922 const __le32 *dword_buff; 1923 1924 #define NVM_WORD1_LEN(x) (8 * (x & 0x03FF)) 1925 #define NVM_WORD2_ID(x) (x >> 12) 1926 #define EXT_NVM_WORD2_LEN(x) (2 * (((x) & 0xFF) << 8 | (x) >> 8)) 1927 #define EXT_NVM_WORD1_ID(x) ((x) >> 4) 1928 #define NVM_HEADER_0 (0x2A504C54) 1929 #define NVM_HEADER_1 (0x4E564D2A) 1930 #define NVM_HEADER_SIZE (4 * sizeof(u32)) 1931 1932 IWL_DEBUG_EEPROM(trans->dev, "Read from external NVM\n"); 1933 1934 /* Maximal size depends on NVM version */ 1935 if (trans->cfg->nvm_type != IWL_NVM_EXT) 1936 max_section_size = IWL_MAX_NVM_SECTION_SIZE; 1937 else 1938 max_section_size = IWL_MAX_EXT_NVM_SECTION_SIZE; 1939 1940 /* 1941 * Obtain NVM image via request_firmware. Since we already used 1942 * request_firmware_nowait() for the firmware binary load and only 1943 * get here after that we assume the NVM request can be satisfied 1944 * synchronously. 1945 */ 1946 ret = request_firmware(&fw_entry, nvm_file_name, trans->dev); 1947 if (ret) { 1948 IWL_ERR(trans, "ERROR: %s isn't available %d\n", 1949 nvm_file_name, ret); 1950 return ret; 1951 } 1952 1953 IWL_INFO(trans, "Loaded NVM file %s (%zu bytes)\n", 1954 nvm_file_name, fw_entry->size); 1955 1956 if (fw_entry->size > MAX_NVM_FILE_LEN) { 1957 IWL_ERR(trans, "NVM file too large\n"); 1958 ret = -EINVAL; 1959 goto out; 1960 } 1961 1962 eof = fw_entry->data + fw_entry->size; 1963 dword_buff = (const __le32 *)fw_entry->data; 1964 1965 /* some NVM file will contain a header. 1966 * The header is identified by 2 dwords header as follow: 1967 * dword[0] = 0x2A504C54 1968 * dword[1] = 0x4E564D2A 1969 * 1970 * This header must be skipped when providing the NVM data to the FW. 1971 */ 1972 if (fw_entry->size > NVM_HEADER_SIZE && 1973 dword_buff[0] == cpu_to_le32(NVM_HEADER_0) && 1974 dword_buff[1] == cpu_to_le32(NVM_HEADER_1)) { 1975 file_sec = (const void *)(fw_entry->data + NVM_HEADER_SIZE); 1976 IWL_INFO(trans, "NVM Version %08X\n", le32_to_cpu(dword_buff[2])); 1977 IWL_INFO(trans, "NVM Manufacturing date %08X\n", 1978 le32_to_cpu(dword_buff[3])); 1979 1980 /* nvm file validation, dword_buff[2] holds the file version */ 1981 if (trans->trans_cfg->device_family == IWL_DEVICE_FAMILY_8000 && 1982 trans->hw_rev_step == SILICON_C_STEP && 1983 le32_to_cpu(dword_buff[2]) < 0xE4A) { 1984 ret = -EFAULT; 1985 goto out; 1986 } 1987 } else { 1988 file_sec = (const void *)fw_entry->data; 1989 } 1990 1991 while (true) { 1992 if (file_sec->data > eof) { 1993 IWL_ERR(trans, 1994 "ERROR - NVM file too short for section header\n"); 1995 ret = -EINVAL; 1996 break; 1997 } 1998 1999 /* check for EOF marker */ 2000 if (!file_sec->word1 && !file_sec->word2) { 2001 ret = 0; 2002 break; 2003 } 2004 2005 if (trans->cfg->nvm_type != IWL_NVM_EXT) { 2006 section_size = 2007 2 * NVM_WORD1_LEN(le16_to_cpu(file_sec->word1)); 2008 section_id = NVM_WORD2_ID(le16_to_cpu(file_sec->word2)); 2009 } else { 2010 section_size = 2 * EXT_NVM_WORD2_LEN( 2011 le16_to_cpu(file_sec->word2)); 2012 section_id = EXT_NVM_WORD1_ID( 2013 le16_to_cpu(file_sec->word1)); 2014 } 2015 2016 if (section_size > max_section_size) { 2017 IWL_ERR(trans, "ERROR - section too large (%d)\n", 2018 section_size); 2019 ret = -EINVAL; 2020 break; 2021 } 2022 2023 if (!section_size) { 2024 IWL_ERR(trans, "ERROR - section empty\n"); 2025 ret = -EINVAL; 2026 break; 2027 } 2028 2029 if (file_sec->data + section_size > eof) { 2030 IWL_ERR(trans, 2031 "ERROR - NVM file too short for section (%d bytes)\n", 2032 section_size); 2033 ret = -EINVAL; 2034 break; 2035 } 2036 2037 if (WARN(section_id >= NVM_MAX_NUM_SECTIONS, 2038 "Invalid NVM section ID %d\n", section_id)) { 2039 ret = -EINVAL; 2040 break; 2041 } 2042 2043 temp = kmemdup(file_sec->data, section_size, GFP_KERNEL); 2044 if (!temp) { 2045 ret = -ENOMEM; 2046 break; 2047 } 2048 2049 iwl_nvm_fixups(trans->hw_id, section_id, temp, section_size); 2050 2051 kfree(nvm_sections[section_id].data); 2052 nvm_sections[section_id].data = temp; 2053 nvm_sections[section_id].length = section_size; 2054 2055 /* advance to the next section */ 2056 file_sec = (const void *)(file_sec->data + section_size); 2057 } 2058 out: 2059 release_firmware(fw_entry); 2060 return ret; 2061 } 2062 IWL_EXPORT_SYMBOL(iwl_read_external_nvm); 2063 2064 struct iwl_nvm_data *iwl_get_nvm(struct iwl_trans *trans, 2065 const struct iwl_fw *fw, 2066 u8 set_tx_ant, u8 set_rx_ant) 2067 { 2068 struct iwl_nvm_get_info cmd = {}; 2069 struct iwl_nvm_data *nvm; 2070 struct iwl_host_cmd hcmd = { 2071 .flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL, 2072 .data = { &cmd, }, 2073 .len = { sizeof(cmd) }, 2074 .id = WIDE_ID(REGULATORY_AND_NVM_GROUP, NVM_GET_INFO) 2075 }; 2076 int ret; 2077 bool empty_otp; 2078 u32 mac_flags; 2079 u32 sbands_flags = 0; 2080 u8 tx_ant; 2081 u8 rx_ant; 2082 2083 /* 2084 * All the values in iwl_nvm_get_info_rsp v4 are the same as 2085 * in v3, except for the channel profile part of the 2086 * regulatory. So we can just access the new struct, with the 2087 * exception of the latter. 2088 */ 2089 struct iwl_nvm_get_info_rsp *rsp; 2090 struct iwl_nvm_get_info_rsp_v3 *rsp_v3; 2091 bool v4 = fw_has_api(&fw->ucode_capa, 2092 IWL_UCODE_TLV_API_REGULATORY_NVM_INFO); 2093 size_t rsp_size = v4 ? sizeof(*rsp) : sizeof(*rsp_v3); 2094 void *channel_profile; 2095 2096 ret = iwl_trans_send_cmd(trans, &hcmd); 2097 if (ret) 2098 return ERR_PTR(ret); 2099 2100 if (WARN(iwl_rx_packet_payload_len(hcmd.resp_pkt) != rsp_size, 2101 "Invalid payload len in NVM response from FW %d", 2102 iwl_rx_packet_payload_len(hcmd.resp_pkt))) { 2103 ret = -EINVAL; 2104 goto out; 2105 } 2106 2107 rsp = (void *)hcmd.resp_pkt->data; 2108 empty_otp = !!(le32_to_cpu(rsp->general.flags) & 2109 NVM_GENERAL_FLAGS_EMPTY_OTP); 2110 if (empty_otp) 2111 IWL_INFO(trans, "OTP is empty\n"); 2112 2113 nvm = kzalloc(struct_size(nvm, channels, IWL_NUM_CHANNELS), GFP_KERNEL); 2114 if (!nvm) { 2115 ret = -ENOMEM; 2116 goto out; 2117 } 2118 2119 iwl_set_hw_address_from_csr(trans, nvm); 2120 /* TODO: if platform NVM has MAC address - override it here */ 2121 2122 if (!is_valid_ether_addr(nvm->hw_addr)) { 2123 IWL_ERR(trans, "no valid mac address was found\n"); 2124 ret = -EINVAL; 2125 goto err_free; 2126 } 2127 2128 IWL_INFO(trans, "base HW address: %pM\n", nvm->hw_addr); 2129 2130 /* Initialize general data */ 2131 nvm->nvm_version = le16_to_cpu(rsp->general.nvm_version); 2132 nvm->n_hw_addrs = rsp->general.n_hw_addrs; 2133 if (nvm->n_hw_addrs == 0) 2134 IWL_WARN(trans, 2135 "Firmware declares no reserved mac addresses. OTP is empty: %d\n", 2136 empty_otp); 2137 2138 /* Initialize MAC sku data */ 2139 mac_flags = le32_to_cpu(rsp->mac_sku.mac_sku_flags); 2140 nvm->sku_cap_11ac_enable = 2141 !!(mac_flags & NVM_MAC_SKU_FLAGS_802_11AC_ENABLED); 2142 nvm->sku_cap_11n_enable = 2143 !!(mac_flags & NVM_MAC_SKU_FLAGS_802_11N_ENABLED); 2144 nvm->sku_cap_11ax_enable = 2145 !!(mac_flags & NVM_MAC_SKU_FLAGS_802_11AX_ENABLED); 2146 nvm->sku_cap_band_24ghz_enable = 2147 !!(mac_flags & NVM_MAC_SKU_FLAGS_BAND_2_4_ENABLED); 2148 nvm->sku_cap_band_52ghz_enable = 2149 !!(mac_flags & NVM_MAC_SKU_FLAGS_BAND_5_2_ENABLED); 2150 nvm->sku_cap_mimo_disabled = 2151 !!(mac_flags & NVM_MAC_SKU_FLAGS_MIMO_DISABLED); 2152 if (CSR_HW_RFID_TYPE(trans->hw_rf_id) >= IWL_CFG_RF_TYPE_FM) 2153 nvm->sku_cap_11be_enable = true; 2154 2155 /* Initialize PHY sku data */ 2156 nvm->valid_tx_ant = (u8)le32_to_cpu(rsp->phy_sku.tx_chains); 2157 nvm->valid_rx_ant = (u8)le32_to_cpu(rsp->phy_sku.rx_chains); 2158 2159 if (le32_to_cpu(rsp->regulatory.lar_enabled) && 2160 fw_has_capa(&fw->ucode_capa, 2161 IWL_UCODE_TLV_CAPA_LAR_SUPPORT)) { 2162 nvm->lar_enabled = true; 2163 sbands_flags |= IWL_NVM_SBANDS_FLAGS_LAR; 2164 } 2165 2166 rsp_v3 = (void *)rsp; 2167 channel_profile = v4 ? (void *)rsp->regulatory.channel_profile : 2168 (void *)rsp_v3->regulatory.channel_profile; 2169 2170 tx_ant = nvm->valid_tx_ant & fw->valid_tx_ant; 2171 rx_ant = nvm->valid_rx_ant & fw->valid_rx_ant; 2172 2173 if (set_tx_ant) 2174 tx_ant &= set_tx_ant; 2175 if (set_rx_ant) 2176 rx_ant &= set_rx_ant; 2177 2178 iwl_init_sbands(trans, nvm, channel_profile, tx_ant, rx_ant, 2179 sbands_flags, v4, fw); 2180 2181 iwl_free_resp(&hcmd); 2182 return nvm; 2183 2184 err_free: 2185 kfree(nvm); 2186 out: 2187 iwl_free_resp(&hcmd); 2188 return ERR_PTR(ret); 2189 } 2190 IWL_EXPORT_SYMBOL(iwl_get_nvm); 2191