1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause 2 /* 3 * Copyright (C) 2005-2014, 2018-2023, 2025 Intel Corporation 4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH 5 * Copyright (C) 2016-2017 Intel Deutschland GmbH 6 */ 7 #include <linux/types.h> 8 #include <linux/slab.h> 9 #include <linux/export.h> 10 #include <linux/etherdevice.h> 11 #include <linux/pci.h> 12 #include <linux/firmware.h> 13 14 #include "iwl-drv.h" 15 #include "iwl-modparams.h" 16 #include "iwl-nvm-parse.h" 17 #include "iwl-prph.h" 18 #include "iwl-io.h" 19 #include "iwl-csr.h" 20 #include "fw/acpi.h" 21 #include "fw/api/nvm-reg.h" 22 #include "fw/api/commands.h" 23 #include "fw/api/cmdhdr.h" 24 #include "fw/img.h" 25 #include "mei/iwl-mei.h" 26 27 /* NVM offsets (in words) definitions */ 28 enum nvm_offsets { 29 /* NVM HW-Section offset (in words) definitions */ 30 SUBSYSTEM_ID = 0x0A, 31 HW_ADDR = 0x15, 32 33 /* NVM SW-Section offset (in words) definitions */ 34 NVM_SW_SECTION = 0x1C0, 35 NVM_VERSION = 0, 36 RADIO_CFG = 1, 37 SKU = 2, 38 N_HW_ADDRS = 3, 39 NVM_CHANNELS = 0x1E0 - NVM_SW_SECTION, 40 41 /* NVM REGULATORY -Section offset (in words) definitions */ 42 NVM_CHANNELS_SDP = 0, 43 }; 44 45 enum ext_nvm_offsets { 46 /* NVM HW-Section offset (in words) definitions */ 47 48 MAC_ADDRESS_OVERRIDE_EXT_NVM = 1, 49 50 /* NVM SW-Section offset (in words) definitions */ 51 NVM_VERSION_EXT_NVM = 0, 52 N_HW_ADDRS_FAMILY_8000 = 3, 53 54 /* NVM PHY_SKU-Section offset (in words) definitions */ 55 RADIO_CFG_FAMILY_EXT_NVM = 0, 56 SKU_FAMILY_8000 = 2, 57 58 /* NVM REGULATORY -Section offset (in words) definitions */ 59 NVM_CHANNELS_EXTENDED = 0, 60 NVM_LAR_OFFSET_OLD = 0x4C7, 61 NVM_LAR_OFFSET = 0x507, 62 NVM_LAR_ENABLED = 0x7, 63 }; 64 65 /* SKU Capabilities (actual values from NVM definition) */ 66 enum nvm_sku_bits { 67 NVM_SKU_CAP_BAND_24GHZ = BIT(0), 68 NVM_SKU_CAP_BAND_52GHZ = BIT(1), 69 NVM_SKU_CAP_11N_ENABLE = BIT(2), 70 NVM_SKU_CAP_11AC_ENABLE = BIT(3), 71 NVM_SKU_CAP_MIMO_DISABLE = BIT(5), 72 }; 73 74 /* 75 * These are the channel numbers in the order that they are stored in the NVM 76 */ 77 static const u16 iwl_nvm_channels[] = { 78 /* 2.4 GHz */ 79 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 80 /* 5 GHz */ 81 36, 40, 44, 48, 52, 56, 60, 64, 82 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144, 83 149, 153, 157, 161, 165 84 }; 85 86 static const u16 iwl_ext_nvm_channels[] = { 87 /* 2.4 GHz */ 88 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 89 /* 5 GHz */ 90 36, 40, 44, 48, 52, 56, 60, 64, 68, 72, 76, 80, 84, 88, 92, 91 96, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144, 92 149, 153, 157, 161, 165, 169, 173, 177, 181 93 }; 94 95 static const u16 iwl_uhb_nvm_channels[] = { 96 /* 2.4 GHz */ 97 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 98 /* 5 GHz */ 99 36, 40, 44, 48, 52, 56, 60, 64, 68, 72, 76, 80, 84, 88, 92, 100 96, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144, 101 149, 153, 157, 161, 165, 169, 173, 177, 181, 102 /* 6-7 GHz */ 103 1, 5, 9, 13, 17, 21, 25, 29, 33, 37, 41, 45, 49, 53, 57, 61, 65, 69, 104 73, 77, 81, 85, 89, 93, 97, 101, 105, 109, 113, 117, 121, 125, 129, 105 133, 137, 141, 145, 149, 153, 157, 161, 165, 169, 173, 177, 181, 185, 106 189, 193, 197, 201, 205, 209, 213, 217, 221, 225, 229, 233 107 }; 108 109 #define IWL_NVM_NUM_CHANNELS ARRAY_SIZE(iwl_nvm_channels) 110 #define IWL_NVM_NUM_CHANNELS_EXT ARRAY_SIZE(iwl_ext_nvm_channels) 111 #define IWL_NVM_NUM_CHANNELS_UHB ARRAY_SIZE(iwl_uhb_nvm_channels) 112 #define NUM_2GHZ_CHANNELS 14 113 #define NUM_5GHZ_CHANNELS 37 114 #define FIRST_2GHZ_HT_MINUS 5 115 #define LAST_2GHZ_HT_PLUS 9 116 #define N_HW_ADDR_MASK 0xF 117 118 /* rate data (static) */ 119 static struct ieee80211_rate iwl_cfg80211_rates[] = { 120 { .bitrate = 1 * 10, .hw_value = 0, .hw_value_short = 0, }, 121 { .bitrate = 2 * 10, .hw_value = 1, .hw_value_short = 1, 122 .flags = IEEE80211_RATE_SHORT_PREAMBLE, }, 123 { .bitrate = 5.5 * 10, .hw_value = 2, .hw_value_short = 2, 124 .flags = IEEE80211_RATE_SHORT_PREAMBLE, }, 125 { .bitrate = 11 * 10, .hw_value = 3, .hw_value_short = 3, 126 .flags = IEEE80211_RATE_SHORT_PREAMBLE, }, 127 { .bitrate = 6 * 10, .hw_value = 4, .hw_value_short = 4, }, 128 { .bitrate = 9 * 10, .hw_value = 5, .hw_value_short = 5, }, 129 { .bitrate = 12 * 10, .hw_value = 6, .hw_value_short = 6, }, 130 { .bitrate = 18 * 10, .hw_value = 7, .hw_value_short = 7, }, 131 { .bitrate = 24 * 10, .hw_value = 8, .hw_value_short = 8, }, 132 { .bitrate = 36 * 10, .hw_value = 9, .hw_value_short = 9, }, 133 { .bitrate = 48 * 10, .hw_value = 10, .hw_value_short = 10, }, 134 { .bitrate = 54 * 10, .hw_value = 11, .hw_value_short = 11, }, 135 }; 136 #define RATES_24_OFFS 0 137 #define N_RATES_24 ARRAY_SIZE(iwl_cfg80211_rates) 138 #define RATES_52_OFFS 4 139 #define N_RATES_52 (N_RATES_24 - RATES_52_OFFS) 140 141 /** 142 * enum iwl_nvm_channel_flags - channel flags in NVM 143 * @NVM_CHANNEL_VALID: channel is usable for this SKU/geo 144 * @NVM_CHANNEL_IBSS: usable as an IBSS channel and deprecated 145 * when %IWL_NVM_SBANDS_FLAGS_LAR enabled. 146 * @NVM_CHANNEL_ALLOW_20MHZ_ACTIVITY: active scanning allowed and 147 * AP allowed only in 20 MHz. Valid only 148 * when %IWL_NVM_SBANDS_FLAGS_LAR enabled. 149 * @NVM_CHANNEL_ACTIVE: active scanning allowed and allows IBSS 150 * when %IWL_NVM_SBANDS_FLAGS_LAR enabled. 151 * @NVM_CHANNEL_RADAR: radar detection required 152 * @NVM_CHANNEL_INDOOR_ONLY: only indoor use is allowed 153 * @NVM_CHANNEL_GO_CONCURRENT: GO operation is allowed when connected to BSS 154 * on same channel on 2.4 or same UNII band on 5.2 155 * @NVM_CHANNEL_UNIFORM: uniform spreading required 156 * @NVM_CHANNEL_20MHZ: 20 MHz channel okay 157 * @NVM_CHANNEL_40MHZ: 40 MHz channel okay 158 * @NVM_CHANNEL_80MHZ: 80 MHz channel okay 159 * @NVM_CHANNEL_160MHZ: 160 MHz channel okay 160 * @NVM_CHANNEL_DC_HIGH: DC HIGH required/allowed (?) 161 * @NVM_CHANNEL_VLP: client support connection to UHB VLP AP 162 * @NVM_CHANNEL_AFC: client support connection to UHB AFC AP 163 * @NVM_CHANNEL_VLP_AP_NOT_ALLOWED: UHB VLP AP not allowed, 164 * Valid only when %NVM_CHANNEL_VLP is enabled. 165 */ 166 enum iwl_nvm_channel_flags { 167 NVM_CHANNEL_VALID = BIT(0), 168 NVM_CHANNEL_IBSS = BIT(1), 169 NVM_CHANNEL_ALLOW_20MHZ_ACTIVITY = BIT(2), 170 NVM_CHANNEL_ACTIVE = BIT(3), 171 NVM_CHANNEL_RADAR = BIT(4), 172 NVM_CHANNEL_INDOOR_ONLY = BIT(5), 173 NVM_CHANNEL_GO_CONCURRENT = BIT(6), 174 NVM_CHANNEL_UNIFORM = BIT(7), 175 NVM_CHANNEL_20MHZ = BIT(8), 176 NVM_CHANNEL_40MHZ = BIT(9), 177 NVM_CHANNEL_80MHZ = BIT(10), 178 NVM_CHANNEL_160MHZ = BIT(11), 179 NVM_CHANNEL_DC_HIGH = BIT(12), 180 NVM_CHANNEL_VLP = BIT(13), 181 NVM_CHANNEL_AFC = BIT(14), 182 NVM_CHANNEL_VLP_AP_NOT_ALLOWED = BIT(15), 183 }; 184 185 /** 186 * enum iwl_reg_capa_flags_v1 - global flags applied for the whole regulatory 187 * domain. 188 * @REG_CAPA_V1_BF_CCD_LOW_BAND: Beam-forming or Cyclic Delay Diversity in the 189 * 2.4Ghz band is allowed. 190 * @REG_CAPA_V1_BF_CCD_HIGH_BAND: Beam-forming or Cyclic Delay Diversity in the 191 * 5Ghz band is allowed. 192 * @REG_CAPA_V1_160MHZ_ALLOWED: 11ac channel with a width of 160Mhz is allowed 193 * for this regulatory domain (valid only in 5Ghz). 194 * @REG_CAPA_V1_80MHZ_ALLOWED: 11ac channel with a width of 80Mhz is allowed 195 * for this regulatory domain (valid only in 5Ghz). 196 * @REG_CAPA_V1_MCS_8_ALLOWED: 11ac with MCS 8 is allowed. 197 * @REG_CAPA_V1_MCS_9_ALLOWED: 11ac with MCS 9 is allowed. 198 * @REG_CAPA_V1_40MHZ_FORBIDDEN: 11n channel with a width of 40Mhz is forbidden 199 * for this regulatory domain (valid only in 5Ghz). 200 * @REG_CAPA_V1_DC_HIGH_ENABLED: DC HIGH allowed. 201 * @REG_CAPA_V1_11AX_DISABLED: 11ax is forbidden for this regulatory domain. 202 */ 203 enum iwl_reg_capa_flags_v1 { 204 REG_CAPA_V1_BF_CCD_LOW_BAND = BIT(0), 205 REG_CAPA_V1_BF_CCD_HIGH_BAND = BIT(1), 206 REG_CAPA_V1_160MHZ_ALLOWED = BIT(2), 207 REG_CAPA_V1_80MHZ_ALLOWED = BIT(3), 208 REG_CAPA_V1_MCS_8_ALLOWED = BIT(4), 209 REG_CAPA_V1_MCS_9_ALLOWED = BIT(5), 210 REG_CAPA_V1_40MHZ_FORBIDDEN = BIT(7), 211 REG_CAPA_V1_DC_HIGH_ENABLED = BIT(9), 212 REG_CAPA_V1_11AX_DISABLED = BIT(10), 213 }; /* GEO_CHANNEL_CAPABILITIES_API_S_VER_1 */ 214 215 /** 216 * enum iwl_reg_capa_flags_v2 - global flags applied for the whole regulatory 217 * domain (version 2). 218 * @REG_CAPA_V2_STRADDLE_DISABLED: Straddle channels (144, 142, 138) are 219 * disabled. 220 * @REG_CAPA_V2_BF_CCD_LOW_BAND: Beam-forming or Cyclic Delay Diversity in the 221 * 2.4Ghz band is allowed. 222 * @REG_CAPA_V2_BF_CCD_HIGH_BAND: Beam-forming or Cyclic Delay Diversity in the 223 * 5Ghz band is allowed. 224 * @REG_CAPA_V2_160MHZ_ALLOWED: 11ac channel with a width of 160Mhz is allowed 225 * for this regulatory domain (valid only in 5Ghz). 226 * @REG_CAPA_V2_80MHZ_ALLOWED: 11ac channel with a width of 80Mhz is allowed 227 * for this regulatory domain (valid only in 5Ghz). 228 * @REG_CAPA_V2_MCS_8_ALLOWED: 11ac with MCS 8 is allowed. 229 * @REG_CAPA_V2_MCS_9_ALLOWED: 11ac with MCS 9 is allowed. 230 * @REG_CAPA_V2_WEATHER_DISABLED: Weather radar channels (120, 124, 128, 118, 231 * 126, 122) are disabled. 232 * @REG_CAPA_V2_40MHZ_ALLOWED: 11n channel with a width of 40Mhz is allowed 233 * for this regulatory domain (uvalid only in 5Ghz). 234 * @REG_CAPA_V2_11AX_DISABLED: 11ax is forbidden for this regulatory domain. 235 */ 236 enum iwl_reg_capa_flags_v2 { 237 REG_CAPA_V2_STRADDLE_DISABLED = BIT(0), 238 REG_CAPA_V2_BF_CCD_LOW_BAND = BIT(1), 239 REG_CAPA_V2_BF_CCD_HIGH_BAND = BIT(2), 240 REG_CAPA_V2_160MHZ_ALLOWED = BIT(3), 241 REG_CAPA_V2_80MHZ_ALLOWED = BIT(4), 242 REG_CAPA_V2_MCS_8_ALLOWED = BIT(5), 243 REG_CAPA_V2_MCS_9_ALLOWED = BIT(6), 244 REG_CAPA_V2_WEATHER_DISABLED = BIT(7), 245 REG_CAPA_V2_40MHZ_ALLOWED = BIT(8), 246 REG_CAPA_V2_11AX_DISABLED = BIT(10), 247 }; /* GEO_CHANNEL_CAPABILITIES_API_S_VER_2 */ 248 249 /** 250 * enum iwl_reg_capa_flags_v4 - global flags applied for the whole regulatory 251 * domain. 252 * @REG_CAPA_V4_160MHZ_ALLOWED: 11ac channel with a width of 160Mhz is allowed 253 * for this regulatory domain (valid only in 5Ghz). 254 * @REG_CAPA_V4_80MHZ_ALLOWED: 11ac channel with a width of 80Mhz is allowed 255 * for this regulatory domain (valid only in 5Ghz). 256 * @REG_CAPA_V4_MCS_12_ALLOWED: 11ac with MCS 12 is allowed. 257 * @REG_CAPA_V4_MCS_13_ALLOWED: 11ac with MCS 13 is allowed. 258 * @REG_CAPA_V4_11BE_DISABLED: 11be is forbidden for this regulatory domain. 259 * @REG_CAPA_V4_11AX_DISABLED: 11ax is forbidden for this regulatory domain. 260 * @REG_CAPA_V4_320MHZ_ALLOWED: 11be channel with a width of 320Mhz is allowed 261 * for this regulatory domain (valid only in 5GHz). 262 */ 263 enum iwl_reg_capa_flags_v4 { 264 REG_CAPA_V4_160MHZ_ALLOWED = BIT(3), 265 REG_CAPA_V4_80MHZ_ALLOWED = BIT(4), 266 REG_CAPA_V4_MCS_12_ALLOWED = BIT(5), 267 REG_CAPA_V4_MCS_13_ALLOWED = BIT(6), 268 REG_CAPA_V4_11BE_DISABLED = BIT(8), 269 REG_CAPA_V4_11AX_DISABLED = BIT(13), 270 REG_CAPA_V4_320MHZ_ALLOWED = BIT(16), 271 }; /* GEO_CHANNEL_CAPABILITIES_API_S_VER_4 */ 272 273 /* 274 * API v2 for reg_capa_flags is relevant from version 6 and onwards of the 275 * MCC update command response. 276 */ 277 #define REG_CAPA_V2_RESP_VER 6 278 279 /* API v4 for reg_capa_flags is relevant from version 8 and onwards of the 280 * MCC update command response. 281 */ 282 #define REG_CAPA_V4_RESP_VER 8 283 284 /** 285 * struct iwl_reg_capa - struct for global regulatory capabilities, Used for 286 * handling the different APIs of reg_capa_flags. 287 * 288 * @allow_40mhz: 11n channel with a width of 40Mhz is allowed 289 * for this regulatory domain. 290 * @allow_80mhz: 11ac channel with a width of 80Mhz is allowed 291 * for this regulatory domain (valid only in 5 and 6 Ghz). 292 * @allow_160mhz: 11ac channel with a width of 160Mhz is allowed 293 * for this regulatory domain (valid only in 5 and 6 Ghz). 294 * @allow_320mhz: 11be channel with a width of 320Mhz is allowed 295 * for this regulatory domain (valid only in 6 Ghz). 296 * @disable_11ax: 11ax is forbidden for this regulatory domain. 297 * @disable_11be: 11be is forbidden for this regulatory domain. 298 */ 299 struct iwl_reg_capa { 300 bool allow_40mhz; 301 bool allow_80mhz; 302 bool allow_160mhz; 303 bool allow_320mhz; 304 bool disable_11ax; 305 bool disable_11be; 306 }; 307 308 static inline void iwl_nvm_print_channel_flags(struct device *dev, u32 level, 309 int chan, u32 flags) 310 { 311 #define CHECK_AND_PRINT_I(x) \ 312 ((flags & NVM_CHANNEL_##x) ? " " #x : "") 313 314 if (!(flags & NVM_CHANNEL_VALID)) { 315 IWL_DEBUG_DEV(dev, level, "Ch. %d: 0x%x: No traffic\n", 316 chan, flags); 317 return; 318 } 319 320 /* Note: already can print up to 101 characters, 110 is the limit! */ 321 IWL_DEBUG_DEV(dev, level, 322 "Ch. %d: 0x%x:%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n", 323 chan, flags, 324 CHECK_AND_PRINT_I(VALID), 325 CHECK_AND_PRINT_I(IBSS), 326 CHECK_AND_PRINT_I(ACTIVE), 327 CHECK_AND_PRINT_I(RADAR), 328 CHECK_AND_PRINT_I(INDOOR_ONLY), 329 CHECK_AND_PRINT_I(GO_CONCURRENT), 330 CHECK_AND_PRINT_I(UNIFORM), 331 CHECK_AND_PRINT_I(20MHZ), 332 CHECK_AND_PRINT_I(40MHZ), 333 CHECK_AND_PRINT_I(80MHZ), 334 CHECK_AND_PRINT_I(160MHZ), 335 CHECK_AND_PRINT_I(DC_HIGH), 336 CHECK_AND_PRINT_I(VLP), 337 CHECK_AND_PRINT_I(AFC)); 338 #undef CHECK_AND_PRINT_I 339 } 340 341 static u32 iwl_get_channel_flags(u8 ch_num, int ch_idx, enum nl80211_band band, 342 u32 nvm_flags, const struct iwl_rf_cfg *cfg) 343 { 344 u32 flags = IEEE80211_CHAN_NO_HT40; 345 346 if (band == NL80211_BAND_2GHZ && (nvm_flags & NVM_CHANNEL_40MHZ)) { 347 if (ch_num <= LAST_2GHZ_HT_PLUS) 348 flags &= ~IEEE80211_CHAN_NO_HT40PLUS; 349 if (ch_num >= FIRST_2GHZ_HT_MINUS) 350 flags &= ~IEEE80211_CHAN_NO_HT40MINUS; 351 } else if (nvm_flags & NVM_CHANNEL_40MHZ) { 352 if ((ch_idx - NUM_2GHZ_CHANNELS) % 2 == 0) 353 flags &= ~IEEE80211_CHAN_NO_HT40PLUS; 354 else 355 flags &= ~IEEE80211_CHAN_NO_HT40MINUS; 356 } 357 if (!(nvm_flags & NVM_CHANNEL_80MHZ)) 358 flags |= IEEE80211_CHAN_NO_80MHZ; 359 if (!(nvm_flags & NVM_CHANNEL_160MHZ)) 360 flags |= IEEE80211_CHAN_NO_160MHZ; 361 362 if (!(nvm_flags & NVM_CHANNEL_IBSS)) 363 flags |= IEEE80211_CHAN_NO_IR; 364 365 if (!(nvm_flags & NVM_CHANNEL_ACTIVE)) 366 flags |= IEEE80211_CHAN_NO_IR; 367 368 if (nvm_flags & NVM_CHANNEL_RADAR) 369 flags |= IEEE80211_CHAN_RADAR; 370 371 if (nvm_flags & NVM_CHANNEL_INDOOR_ONLY) 372 flags |= IEEE80211_CHAN_INDOOR_ONLY; 373 374 /* Set the GO concurrent flag only in case that NO_IR is set. 375 * Otherwise it is meaningless 376 */ 377 if ((nvm_flags & NVM_CHANNEL_GO_CONCURRENT) && 378 (flags & IEEE80211_CHAN_NO_IR)) 379 flags |= IEEE80211_CHAN_IR_CONCURRENT; 380 381 /* Set the AP type for the UHB case. */ 382 if (nvm_flags & NVM_CHANNEL_VLP) 383 flags |= IEEE80211_CHAN_ALLOW_6GHZ_VLP_AP; 384 else 385 flags |= IEEE80211_CHAN_NO_6GHZ_VLP_CLIENT; 386 if (!(nvm_flags & NVM_CHANNEL_AFC)) 387 flags |= IEEE80211_CHAN_NO_6GHZ_AFC_CLIENT; 388 389 return flags; 390 } 391 392 static enum nl80211_band iwl_nl80211_band_from_channel_idx(int ch_idx) 393 { 394 if (ch_idx >= NUM_2GHZ_CHANNELS + NUM_5GHZ_CHANNELS) { 395 return NL80211_BAND_6GHZ; 396 } 397 398 if (ch_idx >= NUM_2GHZ_CHANNELS) 399 return NL80211_BAND_5GHZ; 400 return NL80211_BAND_2GHZ; 401 } 402 403 static int iwl_init_channel_map(struct iwl_trans *trans, 404 const struct iwl_fw *fw, 405 struct iwl_nvm_data *data, 406 const void * const nvm_ch_flags, 407 u32 sbands_flags, bool v4) 408 { 409 const struct iwl_rf_cfg *cfg = trans->cfg; 410 struct device *dev = trans->dev; 411 int ch_idx; 412 int n_channels = 0; 413 struct ieee80211_channel *channel; 414 u32 ch_flags; 415 int num_of_ch; 416 const u16 *nvm_chan; 417 418 if (cfg->uhb_supported) { 419 num_of_ch = IWL_NVM_NUM_CHANNELS_UHB; 420 nvm_chan = iwl_uhb_nvm_channels; 421 } else if (cfg->nvm_type == IWL_NVM_EXT) { 422 num_of_ch = IWL_NVM_NUM_CHANNELS_EXT; 423 nvm_chan = iwl_ext_nvm_channels; 424 } else { 425 num_of_ch = IWL_NVM_NUM_CHANNELS; 426 nvm_chan = iwl_nvm_channels; 427 } 428 429 for (ch_idx = 0; ch_idx < num_of_ch; ch_idx++) { 430 enum nl80211_band band = 431 iwl_nl80211_band_from_channel_idx(ch_idx); 432 433 if (v4) 434 ch_flags = 435 __le32_to_cpup((const __le32 *)nvm_ch_flags + ch_idx); 436 else 437 ch_flags = 438 __le16_to_cpup((const __le16 *)nvm_ch_flags + ch_idx); 439 440 if (band == NL80211_BAND_5GHZ && 441 !data->sku_cap_band_52ghz_enable) 442 continue; 443 444 /* workaround to disable wide channels in 5GHz */ 445 if ((sbands_flags & IWL_NVM_SBANDS_FLAGS_NO_WIDE_IN_5GHZ) && 446 band == NL80211_BAND_5GHZ) { 447 ch_flags &= ~(NVM_CHANNEL_40MHZ | 448 NVM_CHANNEL_80MHZ | 449 NVM_CHANNEL_160MHZ); 450 } 451 452 if (ch_flags & NVM_CHANNEL_160MHZ) 453 data->vht160_supported = true; 454 455 if (!(sbands_flags & IWL_NVM_SBANDS_FLAGS_LAR) && 456 !(ch_flags & NVM_CHANNEL_VALID)) { 457 /* 458 * Channels might become valid later if lar is 459 * supported, hence we still want to add them to 460 * the list of supported channels to cfg80211. 461 */ 462 iwl_nvm_print_channel_flags(dev, IWL_DL_EEPROM, 463 nvm_chan[ch_idx], ch_flags); 464 continue; 465 } 466 467 channel = &data->channels[n_channels]; 468 n_channels++; 469 470 channel->hw_value = nvm_chan[ch_idx]; 471 channel->band = band; 472 channel->center_freq = 473 ieee80211_channel_to_frequency( 474 channel->hw_value, channel->band); 475 476 /* Initialize regulatory-based run-time data */ 477 478 /* 479 * Default value - highest tx power value. max_power 480 * is not used in mvm, and is used for backwards compatibility 481 */ 482 channel->max_power = IWL_DEFAULT_MAX_TX_POWER; 483 484 /* don't put limitations in case we're using LAR */ 485 if (!(sbands_flags & IWL_NVM_SBANDS_FLAGS_LAR)) 486 channel->flags = iwl_get_channel_flags(nvm_chan[ch_idx], 487 ch_idx, band, 488 ch_flags, cfg); 489 else 490 channel->flags = 0; 491 492 if (fw_has_capa(&fw->ucode_capa, 493 IWL_UCODE_TLV_CAPA_MONITOR_PASSIVE_CHANS)) 494 channel->flags |= IEEE80211_CHAN_CAN_MONITOR; 495 496 iwl_nvm_print_channel_flags(dev, IWL_DL_EEPROM, 497 channel->hw_value, ch_flags); 498 IWL_DEBUG_EEPROM(dev, "Ch. %d: %ddBm\n", 499 channel->hw_value, channel->max_power); 500 } 501 502 return n_channels; 503 } 504 505 static void iwl_init_vht_hw_capab(struct iwl_trans *trans, 506 struct iwl_nvm_data *data, 507 struct ieee80211_sta_vht_cap *vht_cap, 508 u8 tx_chains, u8 rx_chains) 509 { 510 const struct iwl_rf_cfg *cfg = trans->cfg; 511 int num_rx_ants = num_of_ant(rx_chains); 512 int num_tx_ants = num_of_ant(tx_chains); 513 514 vht_cap->vht_supported = true; 515 516 vht_cap->cap = IEEE80211_VHT_CAP_SHORT_GI_80 | 517 IEEE80211_VHT_CAP_RXSTBC_1 | 518 IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE | 519 3 << IEEE80211_VHT_CAP_BEAMFORMEE_STS_SHIFT | 520 IEEE80211_VHT_MAX_AMPDU_1024K << 521 IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_SHIFT; 522 523 if (!trans->cfg->ht_params.stbc) 524 vht_cap->cap &= ~IEEE80211_VHT_CAP_RXSTBC_MASK; 525 526 if (data->vht160_supported) 527 vht_cap->cap |= IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160MHZ | 528 IEEE80211_VHT_CAP_SHORT_GI_160; 529 530 if (cfg->vht_mu_mimo_supported) 531 vht_cap->cap |= IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE; 532 533 if (cfg->ht_params.ldpc) 534 vht_cap->cap |= IEEE80211_VHT_CAP_RXLDPC; 535 536 if (data->sku_cap_mimo_disabled) { 537 num_rx_ants = 1; 538 num_tx_ants = 1; 539 } 540 541 if (trans->cfg->ht_params.stbc && num_tx_ants > 1) 542 vht_cap->cap |= IEEE80211_VHT_CAP_TXSTBC; 543 else 544 vht_cap->cap |= IEEE80211_VHT_CAP_TX_ANTENNA_PATTERN; 545 546 switch (iwlwifi_mod_params.amsdu_size) { 547 case IWL_AMSDU_DEF: 548 if (trans->mac_cfg->mq_rx_supported) 549 vht_cap->cap |= 550 IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454; 551 else 552 vht_cap->cap |= IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_3895; 553 break; 554 case IWL_AMSDU_2K: 555 if (trans->mac_cfg->mq_rx_supported) 556 vht_cap->cap |= 557 IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454; 558 else 559 WARN(1, "RB size of 2K is not supported by this device\n"); 560 break; 561 case IWL_AMSDU_4K: 562 vht_cap->cap |= IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_3895; 563 break; 564 case IWL_AMSDU_8K: 565 vht_cap->cap |= IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_7991; 566 break; 567 case IWL_AMSDU_12K: 568 vht_cap->cap |= IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454; 569 break; 570 default: 571 break; 572 } 573 574 vht_cap->vht_mcs.rx_mcs_map = 575 cpu_to_le16(IEEE80211_VHT_MCS_SUPPORT_0_9 << 0 | 576 IEEE80211_VHT_MCS_SUPPORT_0_9 << 2 | 577 IEEE80211_VHT_MCS_NOT_SUPPORTED << 4 | 578 IEEE80211_VHT_MCS_NOT_SUPPORTED << 6 | 579 IEEE80211_VHT_MCS_NOT_SUPPORTED << 8 | 580 IEEE80211_VHT_MCS_NOT_SUPPORTED << 10 | 581 IEEE80211_VHT_MCS_NOT_SUPPORTED << 12 | 582 IEEE80211_VHT_MCS_NOT_SUPPORTED << 14); 583 584 if (num_rx_ants == 1 || cfg->rx_with_siso_diversity) { 585 vht_cap->cap |= IEEE80211_VHT_CAP_RX_ANTENNA_PATTERN; 586 /* this works because NOT_SUPPORTED == 3 */ 587 vht_cap->vht_mcs.rx_mcs_map |= 588 cpu_to_le16(IEEE80211_VHT_MCS_NOT_SUPPORTED << 2); 589 } 590 591 vht_cap->vht_mcs.tx_mcs_map = vht_cap->vht_mcs.rx_mcs_map; 592 593 vht_cap->vht_mcs.tx_highest |= 594 cpu_to_le16(IEEE80211_VHT_EXT_NSS_BW_CAPABLE); 595 } 596 597 static const u8 iwl_vendor_caps[] = { 598 0xdd, /* vendor element */ 599 0x06, /* length */ 600 0x00, 0x17, 0x35, /* Intel OUI */ 601 0x08, /* type (Intel Capabilities) */ 602 /* followed by 16 bits of capabilities */ 603 #define IWL_VENDOR_CAP_IMPROVED_BF_FDBK_HE BIT(0) 604 IWL_VENDOR_CAP_IMPROVED_BF_FDBK_HE, 605 0x00 606 }; 607 608 static const struct ieee80211_sband_iftype_data iwl_he_eht_capa[] = { 609 { 610 .types_mask = BIT(NL80211_IFTYPE_STATION) | 611 BIT(NL80211_IFTYPE_P2P_CLIENT), 612 .he_cap = { 613 .has_he = true, 614 .he_cap_elem = { 615 .mac_cap_info[0] = 616 IEEE80211_HE_MAC_CAP0_HTC_HE, 617 .mac_cap_info[1] = 618 IEEE80211_HE_MAC_CAP1_TF_MAC_PAD_DUR_16US | 619 IEEE80211_HE_MAC_CAP1_MULTI_TID_AGG_RX_QOS_8, 620 .mac_cap_info[2] = 621 IEEE80211_HE_MAC_CAP2_32BIT_BA_BITMAP, 622 .mac_cap_info[3] = 623 IEEE80211_HE_MAC_CAP3_OMI_CONTROL | 624 IEEE80211_HE_MAC_CAP3_RX_CTRL_FRAME_TO_MULTIBSS, 625 .mac_cap_info[4] = 626 IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU | 627 IEEE80211_HE_MAC_CAP4_MULTI_TID_AGG_TX_QOS_B39, 628 .mac_cap_info[5] = 629 IEEE80211_HE_MAC_CAP5_MULTI_TID_AGG_TX_QOS_B40 | 630 IEEE80211_HE_MAC_CAP5_MULTI_TID_AGG_TX_QOS_B41 | 631 IEEE80211_HE_MAC_CAP5_UL_2x996_TONE_RU | 632 IEEE80211_HE_MAC_CAP5_HE_DYNAMIC_SM_PS | 633 IEEE80211_HE_MAC_CAP5_HT_VHT_TRIG_FRAME_RX, 634 .phy_cap_info[1] = 635 IEEE80211_HE_PHY_CAP1_PREAMBLE_PUNC_RX_MASK | 636 IEEE80211_HE_PHY_CAP1_DEVICE_CLASS_A | 637 IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD, 638 .phy_cap_info[2] = 639 IEEE80211_HE_PHY_CAP2_NDP_4x_LTF_AND_3_2US | 640 IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ, 641 .phy_cap_info[3] = 642 IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_TX_BPSK | 643 IEEE80211_HE_PHY_CAP3_DCM_MAX_TX_NSS_1 | 644 IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_BPSK | 645 IEEE80211_HE_PHY_CAP3_DCM_MAX_RX_NSS_1, 646 .phy_cap_info[4] = 647 IEEE80211_HE_PHY_CAP4_SU_BEAMFORMEE | 648 IEEE80211_HE_PHY_CAP4_BEAMFORMEE_MAX_STS_ABOVE_80MHZ_8 | 649 IEEE80211_HE_PHY_CAP4_BEAMFORMEE_MAX_STS_UNDER_80MHZ_8, 650 .phy_cap_info[6] = 651 IEEE80211_HE_PHY_CAP6_TRIG_SU_BEAMFORMING_FB | 652 IEEE80211_HE_PHY_CAP6_TRIG_MU_BEAMFORMING_PARTIAL_BW_FB | 653 IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT, 654 .phy_cap_info[7] = 655 IEEE80211_HE_PHY_CAP7_POWER_BOOST_FACTOR_SUPP | 656 IEEE80211_HE_PHY_CAP7_HE_SU_MU_PPDU_4XLTF_AND_08_US_GI, 657 .phy_cap_info[8] = 658 IEEE80211_HE_PHY_CAP8_HE_ER_SU_PPDU_4XLTF_AND_08_US_GI | 659 IEEE80211_HE_PHY_CAP8_20MHZ_IN_40MHZ_HE_PPDU_IN_2G | 660 IEEE80211_HE_PHY_CAP8_20MHZ_IN_160MHZ_HE_PPDU | 661 IEEE80211_HE_PHY_CAP8_80MHZ_IN_160MHZ_HE_PPDU | 662 IEEE80211_HE_PHY_CAP8_DCM_MAX_RU_242, 663 .phy_cap_info[9] = 664 IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_COMP_SIGB | 665 IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_NON_COMP_SIGB | 666 (IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_RESERVED << 667 IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_POS), 668 .phy_cap_info[10] = 669 IEEE80211_HE_PHY_CAP10_HE_MU_M1RU_MAX_LTF, 670 }, 671 /* 672 * Set default Tx/Rx HE MCS NSS Support field. 673 * Indicate support for up to 2 spatial streams and all 674 * MCS, without any special cases 675 */ 676 .he_mcs_nss_supp = { 677 .rx_mcs_80 = cpu_to_le16(0xfffa), 678 .tx_mcs_80 = cpu_to_le16(0xfffa), 679 .rx_mcs_160 = cpu_to_le16(0xfffa), 680 .tx_mcs_160 = cpu_to_le16(0xfffa), 681 .rx_mcs_80p80 = cpu_to_le16(0xffff), 682 .tx_mcs_80p80 = cpu_to_le16(0xffff), 683 }, 684 /* 685 * Set default PPE thresholds, with PPET16 set to 0, 686 * PPET8 set to 7 687 */ 688 .ppe_thres = {0x61, 0x1c, 0xc7, 0x71}, 689 }, 690 .eht_cap = { 691 .has_eht = true, 692 .eht_cap_elem = { 693 .mac_cap_info[0] = 694 IEEE80211_EHT_MAC_CAP0_EPCS_PRIO_ACCESS | 695 IEEE80211_EHT_MAC_CAP0_OM_CONTROL | 696 IEEE80211_EHT_MAC_CAP0_TRIG_TXOP_SHARING_MODE1 | 697 IEEE80211_EHT_MAC_CAP0_TRIG_TXOP_SHARING_MODE2 | 698 IEEE80211_EHT_MAC_CAP0_SCS_TRAFFIC_DESC, 699 .mac_cap_info[1] = 700 IEEE80211_EHT_MAC_CAP1_UNSOL_EPCS_PRIO_ACCESS, 701 .phy_cap_info[0] = 702 IEEE80211_EHT_PHY_CAP0_242_TONE_RU_GT20MHZ | 703 IEEE80211_EHT_PHY_CAP0_NDP_4_EHT_LFT_32_GI | 704 IEEE80211_EHT_PHY_CAP0_PARTIAL_BW_UL_MU_MIMO | 705 IEEE80211_EHT_PHY_CAP0_SU_BEAMFORMEE | 706 IEEE80211_EHT_PHY_CAP0_BEAMFORMEE_SS_80MHZ_MASK, 707 .phy_cap_info[1] = 708 IEEE80211_EHT_PHY_CAP1_BEAMFORMEE_SS_80MHZ_MASK | 709 IEEE80211_EHT_PHY_CAP1_BEAMFORMEE_SS_160MHZ_MASK, 710 .phy_cap_info[3] = 711 IEEE80211_EHT_PHY_CAP3_NG_16_SU_FEEDBACK | 712 IEEE80211_EHT_PHY_CAP3_NG_16_MU_FEEDBACK | 713 IEEE80211_EHT_PHY_CAP3_CODEBOOK_4_2_SU_FDBK | 714 IEEE80211_EHT_PHY_CAP3_CODEBOOK_7_5_MU_FDBK | 715 IEEE80211_EHT_PHY_CAP3_TRIG_SU_BF_FDBK | 716 IEEE80211_EHT_PHY_CAP3_TRIG_MU_BF_PART_BW_FDBK | 717 IEEE80211_EHT_PHY_CAP3_TRIG_CQI_FDBK, 718 719 .phy_cap_info[4] = 720 IEEE80211_EHT_PHY_CAP4_PART_BW_DL_MU_MIMO | 721 IEEE80211_EHT_PHY_CAP4_POWER_BOOST_FACT_SUPP | 722 IEEE80211_EHT_PHY_CAP4_EHT_MU_PPDU_4_EHT_LTF_08_GI, 723 .phy_cap_info[5] = 724 FIELD_PREP_CONST(IEEE80211_EHT_PHY_CAP5_COMMON_NOMINAL_PKT_PAD_MASK, 725 IEEE80211_EHT_PHY_CAP5_COMMON_NOMINAL_PKT_PAD_16US) | 726 IEEE80211_EHT_PHY_CAP5_NON_TRIG_CQI_FEEDBACK | 727 IEEE80211_EHT_PHY_CAP5_TX_LESS_242_TONE_RU_SUPP | 728 IEEE80211_EHT_PHY_CAP5_RX_LESS_242_TONE_RU_SUPP, 729 .phy_cap_info[6] = 730 IEEE80211_EHT_PHY_CAP6_MCS15_SUPP_MASK | 731 IEEE80211_EHT_PHY_CAP6_EHT_DUP_6GHZ_SUPP, 732 .phy_cap_info[8] = 733 IEEE80211_EHT_PHY_CAP8_RX_1024QAM_WIDER_BW_DL_OFDMA | 734 IEEE80211_EHT_PHY_CAP8_RX_4096QAM_WIDER_BW_DL_OFDMA, 735 }, 736 737 /* For all MCS and bandwidth, set 2 NSS for both Tx and 738 * Rx - note we don't set the only_20mhz, but due to this 739 * being a union, it gets set correctly anyway. 740 */ 741 .eht_mcs_nss_supp = { 742 .bw._80 = { 743 .rx_tx_mcs9_max_nss = 0x22, 744 .rx_tx_mcs11_max_nss = 0x22, 745 .rx_tx_mcs13_max_nss = 0x22, 746 }, 747 .bw._160 = { 748 .rx_tx_mcs9_max_nss = 0x22, 749 .rx_tx_mcs11_max_nss = 0x22, 750 .rx_tx_mcs13_max_nss = 0x22, 751 }, 752 .bw._320 = { 753 .rx_tx_mcs9_max_nss = 0x22, 754 .rx_tx_mcs11_max_nss = 0x22, 755 .rx_tx_mcs13_max_nss = 0x22, 756 }, 757 }, 758 759 /* 760 * PPE thresholds for NSS = 2, and RU index bitmap set 761 * to 0xc. 762 * Note: just for stating what we want, not present in 763 * the transmitted data due to not including 764 * IEEE80211_EHT_PHY_CAP5_PPE_THRESHOLD_PRESENT. 765 */ 766 .eht_ppe_thres = {0xc1, 0x0e, 0xe0 } 767 }, 768 }, 769 { 770 .types_mask = BIT(NL80211_IFTYPE_AP) | 771 BIT(NL80211_IFTYPE_P2P_GO), 772 .he_cap = { 773 .has_he = true, 774 .he_cap_elem = { 775 .mac_cap_info[0] = 776 IEEE80211_HE_MAC_CAP0_HTC_HE, 777 .mac_cap_info[1] = 778 IEEE80211_HE_MAC_CAP1_MULTI_TID_AGG_RX_QOS_8, 779 .mac_cap_info[3] = 780 IEEE80211_HE_MAC_CAP3_OMI_CONTROL, 781 .phy_cap_info[1] = 782 IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD, 783 .phy_cap_info[2] = 784 IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ | 785 IEEE80211_HE_PHY_CAP2_NDP_4x_LTF_AND_3_2US, 786 .phy_cap_info[3] = 787 IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_TX_BPSK | 788 IEEE80211_HE_PHY_CAP3_DCM_MAX_TX_NSS_1 | 789 IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_BPSK | 790 IEEE80211_HE_PHY_CAP3_DCM_MAX_RX_NSS_1, 791 .phy_cap_info[6] = 792 IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT, 793 .phy_cap_info[7] = 794 IEEE80211_HE_PHY_CAP7_HE_SU_MU_PPDU_4XLTF_AND_08_US_GI, 795 .phy_cap_info[8] = 796 IEEE80211_HE_PHY_CAP8_HE_ER_SU_PPDU_4XLTF_AND_08_US_GI | 797 IEEE80211_HE_PHY_CAP8_DCM_MAX_RU_242, 798 .phy_cap_info[9] = 799 IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_RESERVED 800 << IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_POS, 801 }, 802 /* 803 * Set default Tx/Rx HE MCS NSS Support field. 804 * Indicate support for up to 2 spatial streams and all 805 * MCS, without any special cases 806 */ 807 .he_mcs_nss_supp = { 808 .rx_mcs_80 = cpu_to_le16(0xfffa), 809 .tx_mcs_80 = cpu_to_le16(0xfffa), 810 .rx_mcs_160 = cpu_to_le16(0xfffa), 811 .tx_mcs_160 = cpu_to_le16(0xfffa), 812 .rx_mcs_80p80 = cpu_to_le16(0xffff), 813 .tx_mcs_80p80 = cpu_to_le16(0xffff), 814 }, 815 /* 816 * Set default PPE thresholds, with PPET16 set to 0, 817 * PPET8 set to 7 818 */ 819 .ppe_thres = {0x61, 0x1c, 0xc7, 0x71}, 820 }, 821 .eht_cap = { 822 .has_eht = true, 823 .eht_cap_elem = { 824 .mac_cap_info[0] = 825 IEEE80211_EHT_MAC_CAP0_OM_CONTROL | 826 IEEE80211_EHT_MAC_CAP0_TRIG_TXOP_SHARING_MODE1 | 827 IEEE80211_EHT_MAC_CAP0_TRIG_TXOP_SHARING_MODE2, 828 .phy_cap_info[0] = 829 IEEE80211_EHT_PHY_CAP0_242_TONE_RU_GT20MHZ | 830 IEEE80211_EHT_PHY_CAP0_NDP_4_EHT_LFT_32_GI, 831 .phy_cap_info[5] = 832 FIELD_PREP_CONST(IEEE80211_EHT_PHY_CAP5_COMMON_NOMINAL_PKT_PAD_MASK, 833 IEEE80211_EHT_PHY_CAP5_COMMON_NOMINAL_PKT_PAD_16US), 834 }, 835 836 /* For all MCS and bandwidth, set 2 NSS for both Tx and 837 * Rx - note we don't set the only_20mhz, but due to this 838 * being a union, it gets set correctly anyway. 839 */ 840 .eht_mcs_nss_supp = { 841 .bw._80 = { 842 .rx_tx_mcs9_max_nss = 0x22, 843 .rx_tx_mcs11_max_nss = 0x22, 844 .rx_tx_mcs13_max_nss = 0x22, 845 }, 846 .bw._160 = { 847 .rx_tx_mcs9_max_nss = 0x22, 848 .rx_tx_mcs11_max_nss = 0x22, 849 .rx_tx_mcs13_max_nss = 0x22, 850 }, 851 .bw._320 = { 852 .rx_tx_mcs9_max_nss = 0x22, 853 .rx_tx_mcs11_max_nss = 0x22, 854 .rx_tx_mcs13_max_nss = 0x22, 855 }, 856 }, 857 858 /* 859 * PPE thresholds for NSS = 2, and RU index bitmap set 860 * to 0xc. 861 * Note: just for stating what we want, not present in 862 * the transmitted data due to not including 863 * IEEE80211_EHT_PHY_CAP5_PPE_THRESHOLD_PRESENT. 864 */ 865 .eht_ppe_thres = {0xc1, 0x0e, 0xe0 } 866 }, 867 }, 868 }; 869 870 static void iwl_init_he_6ghz_capa(struct iwl_trans *trans, 871 struct iwl_nvm_data *data, 872 struct ieee80211_supported_band *sband, 873 u8 tx_chains, u8 rx_chains) 874 { 875 struct ieee80211_sta_ht_cap ht_cap; 876 struct ieee80211_sta_vht_cap vht_cap = {}; 877 struct ieee80211_sband_iftype_data *iftype_data; 878 u16 he_6ghz_capa = 0; 879 u32 exp; 880 int i; 881 882 if (sband->band != NL80211_BAND_6GHZ) 883 return; 884 885 /* grab HT/VHT capabilities and calculate HE 6 GHz capabilities */ 886 iwl_init_ht_hw_capab(trans, data, &ht_cap, NL80211_BAND_5GHZ, 887 tx_chains, rx_chains); 888 WARN_ON(!ht_cap.ht_supported); 889 iwl_init_vht_hw_capab(trans, data, &vht_cap, tx_chains, rx_chains); 890 WARN_ON(!vht_cap.vht_supported); 891 892 he_6ghz_capa |= 893 u16_encode_bits(ht_cap.ampdu_density, 894 IEEE80211_HE_6GHZ_CAP_MIN_MPDU_START); 895 exp = u32_get_bits(vht_cap.cap, 896 IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK); 897 he_6ghz_capa |= 898 u16_encode_bits(exp, IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP); 899 exp = u32_get_bits(vht_cap.cap, IEEE80211_VHT_CAP_MAX_MPDU_MASK); 900 he_6ghz_capa |= 901 u16_encode_bits(exp, IEEE80211_HE_6GHZ_CAP_MAX_MPDU_LEN); 902 /* we don't support extended_ht_cap_info anywhere, so no RD_RESPONDER */ 903 if (vht_cap.cap & IEEE80211_VHT_CAP_TX_ANTENNA_PATTERN) 904 he_6ghz_capa |= IEEE80211_HE_6GHZ_CAP_TX_ANTPAT_CONS; 905 if (vht_cap.cap & IEEE80211_VHT_CAP_RX_ANTENNA_PATTERN) 906 he_6ghz_capa |= IEEE80211_HE_6GHZ_CAP_RX_ANTPAT_CONS; 907 908 IWL_DEBUG_EEPROM(trans->dev, "he_6ghz_capa=0x%x\n", he_6ghz_capa); 909 910 /* we know it's writable - we set it before ourselves */ 911 iftype_data = (void *)(uintptr_t)sband->iftype_data; 912 for (i = 0; i < sband->n_iftype_data; i++) 913 iftype_data[i].he_6ghz_capa.capa = cpu_to_le16(he_6ghz_capa); 914 } 915 916 static void 917 iwl_nvm_fixup_sband_iftd(struct iwl_trans *trans, 918 struct iwl_nvm_data *data, 919 struct ieee80211_supported_band *sband, 920 struct ieee80211_sband_iftype_data *iftype_data, 921 u8 tx_chains, u8 rx_chains, 922 const struct iwl_fw *fw) 923 { 924 bool is_ap = iftype_data->types_mask & (BIT(NL80211_IFTYPE_AP) | 925 BIT(NL80211_IFTYPE_P2P_GO)); 926 bool slow_pcie = (!trans->mac_cfg->integrated && 927 trans->info.pcie_link_speed < PCI_EXP_LNKSTA_CLS_8_0GB); 928 929 if (!data->sku_cap_11be_enable || iwlwifi_mod_params.disable_11be) 930 iftype_data->eht_cap.has_eht = false; 931 932 /* Advertise an A-MPDU exponent extension based on 933 * operating band 934 */ 935 if (sband->band == NL80211_BAND_6GHZ && iftype_data->eht_cap.has_eht) 936 iftype_data->he_cap.he_cap_elem.mac_cap_info[3] |= 937 IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_EXT_2; 938 else if (sband->band != NL80211_BAND_2GHZ) 939 iftype_data->he_cap.he_cap_elem.mac_cap_info[3] |= 940 IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_EXT_1; 941 else 942 iftype_data->he_cap.he_cap_elem.mac_cap_info[3] |= 943 IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_EXT_3; 944 945 switch (sband->band) { 946 case NL80211_BAND_2GHZ: 947 iftype_data->he_cap.he_cap_elem.phy_cap_info[0] |= 948 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_IN_2G; 949 iftype_data->eht_cap.eht_cap_elem.mac_cap_info[0] |= 950 u8_encode_bits(IEEE80211_EHT_MAC_CAP0_MAX_MPDU_LEN_11454, 951 IEEE80211_EHT_MAC_CAP0_MAX_MPDU_LEN_MASK); 952 break; 953 case NL80211_BAND_6GHZ: 954 if (!trans->reduced_cap_sku && 955 (!trans->cfg->bw_limit || trans->cfg->bw_limit >= 320)) { 956 iftype_data->eht_cap.eht_cap_elem.phy_cap_info[0] |= 957 IEEE80211_EHT_PHY_CAP0_320MHZ_IN_6GHZ; 958 iftype_data->eht_cap.eht_cap_elem.phy_cap_info[1] |= 959 IEEE80211_EHT_PHY_CAP1_BEAMFORMEE_SS_320MHZ_MASK; 960 } 961 fallthrough; 962 case NL80211_BAND_5GHZ: 963 iftype_data->he_cap.he_cap_elem.phy_cap_info[0] |= 964 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_80MHZ_IN_5G | 965 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G; 966 break; 967 default: 968 WARN_ON(1); 969 break; 970 } 971 972 if ((tx_chains & rx_chains) == ANT_AB) { 973 iftype_data->he_cap.he_cap_elem.phy_cap_info[2] |= 974 IEEE80211_HE_PHY_CAP2_STBC_TX_UNDER_80MHZ; 975 iftype_data->he_cap.he_cap_elem.phy_cap_info[5] |= 976 IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_2 | 977 IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_ABOVE_80MHZ_2; 978 if (!is_ap) { 979 iftype_data->he_cap.he_cap_elem.phy_cap_info[7] |= 980 IEEE80211_HE_PHY_CAP7_MAX_NC_2; 981 982 if (iftype_data->eht_cap.has_eht) { 983 /* 984 * Set the number of sounding dimensions for each 985 * bandwidth to 1 to indicate the maximal supported 986 * value of TXVECTOR parameter NUM_STS of 2 987 */ 988 iftype_data->eht_cap.eht_cap_elem.phy_cap_info[2] |= 0x49; 989 990 /* 991 * Set the MAX NC to 1 to indicate sounding feedback of 992 * 2 supported by the beamfomee. 993 */ 994 iftype_data->eht_cap.eht_cap_elem.phy_cap_info[4] |= 0x10; 995 } 996 } 997 998 if (slow_pcie) { 999 struct ieee80211_eht_mcs_nss_supp *mcs_nss = 1000 &iftype_data->eht_cap.eht_mcs_nss_supp; 1001 1002 mcs_nss->bw._320.rx_tx_mcs11_max_nss = 0; 1003 mcs_nss->bw._320.rx_tx_mcs13_max_nss = 0; 1004 } 1005 } else { 1006 struct ieee80211_he_mcs_nss_supp *he_mcs_nss_supp = 1007 &iftype_data->he_cap.he_mcs_nss_supp; 1008 1009 if (iftype_data->eht_cap.has_eht) { 1010 struct ieee80211_eht_mcs_nss_supp *mcs_nss = 1011 &iftype_data->eht_cap.eht_mcs_nss_supp; 1012 1013 memset(mcs_nss, 0x11, sizeof(*mcs_nss)); 1014 } 1015 1016 if (!is_ap) { 1017 /* If not 2x2, we need to indicate 1x1 in the 1018 * Midamble RX Max NSTS - but not for AP mode 1019 */ 1020 iftype_data->he_cap.he_cap_elem.phy_cap_info[1] &= 1021 ~IEEE80211_HE_PHY_CAP1_MIDAMBLE_RX_TX_MAX_NSTS; 1022 iftype_data->he_cap.he_cap_elem.phy_cap_info[2] &= 1023 ~IEEE80211_HE_PHY_CAP2_MIDAMBLE_RX_TX_MAX_NSTS; 1024 iftype_data->he_cap.he_cap_elem.phy_cap_info[7] |= 1025 IEEE80211_HE_PHY_CAP7_MAX_NC_1; 1026 } 1027 1028 he_mcs_nss_supp->rx_mcs_80 |= 1029 cpu_to_le16(IEEE80211_HE_MCS_NOT_SUPPORTED << 2); 1030 he_mcs_nss_supp->tx_mcs_80 |= 1031 cpu_to_le16(IEEE80211_HE_MCS_NOT_SUPPORTED << 2); 1032 he_mcs_nss_supp->rx_mcs_160 |= 1033 cpu_to_le16(IEEE80211_HE_MCS_NOT_SUPPORTED << 2); 1034 he_mcs_nss_supp->tx_mcs_160 |= 1035 cpu_to_le16(IEEE80211_HE_MCS_NOT_SUPPORTED << 2); 1036 he_mcs_nss_supp->rx_mcs_80p80 |= 1037 cpu_to_le16(IEEE80211_HE_MCS_NOT_SUPPORTED << 2); 1038 he_mcs_nss_supp->tx_mcs_80p80 |= 1039 cpu_to_le16(IEEE80211_HE_MCS_NOT_SUPPORTED << 2); 1040 } 1041 1042 if (trans->mac_cfg->device_family >= IWL_DEVICE_FAMILY_AX210 && !is_ap) 1043 iftype_data->he_cap.he_cap_elem.phy_cap_info[2] |= 1044 IEEE80211_HE_PHY_CAP2_UL_MU_FULL_MU_MIMO; 1045 1046 switch (CSR_HW_RFID_TYPE(trans->info.hw_rf_id)) { 1047 case IWL_CFG_RF_TYPE_GF: 1048 case IWL_CFG_RF_TYPE_FM: 1049 case IWL_CFG_RF_TYPE_WH: 1050 case IWL_CFG_RF_TYPE_PE: 1051 iftype_data->he_cap.he_cap_elem.phy_cap_info[9] |= 1052 IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU; 1053 if (!is_ap) 1054 iftype_data->he_cap.he_cap_elem.phy_cap_info[9] |= 1055 IEEE80211_HE_PHY_CAP9_RX_1024_QAM_LESS_THAN_242_TONE_RU; 1056 break; 1057 } 1058 1059 if (CSR_HW_REV_TYPE(trans->info.hw_rev) == IWL_CFG_MAC_TYPE_GL && 1060 iftype_data->eht_cap.has_eht) { 1061 iftype_data->eht_cap.eht_cap_elem.mac_cap_info[0] &= 1062 ~(IEEE80211_EHT_MAC_CAP0_TRIG_TXOP_SHARING_MODE1 | 1063 IEEE80211_EHT_MAC_CAP0_TRIG_TXOP_SHARING_MODE2); 1064 iftype_data->eht_cap.eht_cap_elem.phy_cap_info[3] &= 1065 ~(IEEE80211_EHT_PHY_CAP0_PARTIAL_BW_UL_MU_MIMO | 1066 IEEE80211_EHT_PHY_CAP3_NG_16_SU_FEEDBACK | 1067 IEEE80211_EHT_PHY_CAP3_NG_16_MU_FEEDBACK | 1068 IEEE80211_EHT_PHY_CAP3_CODEBOOK_4_2_SU_FDBK | 1069 IEEE80211_EHT_PHY_CAP3_CODEBOOK_7_5_MU_FDBK | 1070 IEEE80211_EHT_PHY_CAP3_TRIG_MU_BF_PART_BW_FDBK | 1071 IEEE80211_EHT_PHY_CAP3_TRIG_CQI_FDBK); 1072 iftype_data->eht_cap.eht_cap_elem.phy_cap_info[4] &= 1073 ~(IEEE80211_EHT_PHY_CAP4_PART_BW_DL_MU_MIMO | 1074 IEEE80211_EHT_PHY_CAP4_POWER_BOOST_FACT_SUPP); 1075 iftype_data->eht_cap.eht_cap_elem.phy_cap_info[5] &= 1076 ~IEEE80211_EHT_PHY_CAP5_NON_TRIG_CQI_FEEDBACK; 1077 iftype_data->eht_cap.eht_cap_elem.phy_cap_info[6] &= 1078 ~(IEEE80211_EHT_PHY_CAP6_MCS15_SUPP_MASK | 1079 IEEE80211_EHT_PHY_CAP6_EHT_DUP_6GHZ_SUPP); 1080 iftype_data->eht_cap.eht_cap_elem.phy_cap_info[5] |= 1081 IEEE80211_EHT_PHY_CAP5_SUPP_EXTRA_EHT_LTF; 1082 } 1083 1084 if (fw_has_capa(&fw->ucode_capa, IWL_UCODE_TLV_CAPA_BROADCAST_TWT)) 1085 iftype_data->he_cap.he_cap_elem.mac_cap_info[2] |= 1086 IEEE80211_HE_MAC_CAP2_BCAST_TWT; 1087 1088 if (trans->mac_cfg->device_family == IWL_DEVICE_FAMILY_22000 && 1089 !is_ap) { 1090 iftype_data->vendor_elems.data = iwl_vendor_caps; 1091 iftype_data->vendor_elems.len = ARRAY_SIZE(iwl_vendor_caps); 1092 } 1093 1094 if (!trans->cfg->ht_params.stbc) { 1095 iftype_data->he_cap.he_cap_elem.phy_cap_info[2] &= 1096 ~IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ; 1097 iftype_data->he_cap.he_cap_elem.phy_cap_info[7] &= 1098 ~IEEE80211_HE_PHY_CAP7_STBC_RX_ABOVE_80MHZ; 1099 } 1100 1101 if (trans->step_urm) { 1102 iftype_data->eht_cap.eht_mcs_nss_supp.bw._320.rx_tx_mcs11_max_nss = 0; 1103 iftype_data->eht_cap.eht_mcs_nss_supp.bw._320.rx_tx_mcs13_max_nss = 0; 1104 } 1105 1106 if (trans->cfg->bw_limit && trans->cfg->bw_limit < 160) 1107 iftype_data->he_cap.he_cap_elem.phy_cap_info[0] &= 1108 ~IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G; 1109 1110 if ((trans->cfg->bw_limit && trans->cfg->bw_limit < 320) || 1111 trans->reduced_cap_sku) { 1112 memset(&iftype_data->eht_cap.eht_mcs_nss_supp.bw._320, 0, 1113 sizeof(iftype_data->eht_cap.eht_mcs_nss_supp.bw._320)); 1114 iftype_data->eht_cap.eht_cap_elem.phy_cap_info[2] &= 1115 ~IEEE80211_EHT_PHY_CAP2_SOUNDING_DIM_320MHZ_MASK; 1116 } 1117 1118 if (trans->reduced_cap_sku) { 1119 iftype_data->eht_cap.eht_mcs_nss_supp.bw._80.rx_tx_mcs13_max_nss = 0; 1120 iftype_data->eht_cap.eht_mcs_nss_supp.bw._160.rx_tx_mcs13_max_nss = 0; 1121 iftype_data->eht_cap.eht_cap_elem.phy_cap_info[8] &= 1122 ~IEEE80211_EHT_PHY_CAP8_RX_4096QAM_WIDER_BW_DL_OFDMA; 1123 } 1124 } 1125 1126 static void iwl_init_he_hw_capab(struct iwl_trans *trans, 1127 struct iwl_nvm_data *data, 1128 struct ieee80211_supported_band *sband, 1129 u8 tx_chains, u8 rx_chains, 1130 const struct iwl_fw *fw) 1131 { 1132 struct ieee80211_sband_iftype_data *iftype_data; 1133 int i; 1134 1135 BUILD_BUG_ON(sizeof(data->iftd.low) != sizeof(iwl_he_eht_capa)); 1136 BUILD_BUG_ON(sizeof(data->iftd.high) != sizeof(iwl_he_eht_capa)); 1137 BUILD_BUG_ON(sizeof(data->iftd.uhb) != sizeof(iwl_he_eht_capa)); 1138 1139 switch (sband->band) { 1140 case NL80211_BAND_2GHZ: 1141 iftype_data = data->iftd.low; 1142 break; 1143 case NL80211_BAND_5GHZ: 1144 iftype_data = data->iftd.high; 1145 break; 1146 case NL80211_BAND_6GHZ: 1147 iftype_data = data->iftd.uhb; 1148 break; 1149 default: 1150 WARN_ON(1); 1151 return; 1152 } 1153 1154 memcpy(iftype_data, iwl_he_eht_capa, sizeof(iwl_he_eht_capa)); 1155 1156 _ieee80211_set_sband_iftype_data(sband, iftype_data, 1157 ARRAY_SIZE(iwl_he_eht_capa)); 1158 1159 for (i = 0; i < sband->n_iftype_data; i++) 1160 iwl_nvm_fixup_sband_iftd(trans, data, sband, &iftype_data[i], 1161 tx_chains, rx_chains, fw); 1162 1163 iwl_init_he_6ghz_capa(trans, data, sband, tx_chains, rx_chains); 1164 } 1165 1166 void iwl_reinit_cab(struct iwl_trans *trans, struct iwl_nvm_data *data, 1167 u8 tx_chains, u8 rx_chains, const struct iwl_fw *fw) 1168 { 1169 struct ieee80211_supported_band *sband; 1170 1171 sband = &data->bands[NL80211_BAND_2GHZ]; 1172 iwl_init_ht_hw_capab(trans, data, &sband->ht_cap, NL80211_BAND_2GHZ, 1173 tx_chains, rx_chains); 1174 1175 if (data->sku_cap_11ax_enable && !iwlwifi_mod_params.disable_11ax) 1176 iwl_init_he_hw_capab(trans, data, sband, tx_chains, rx_chains, 1177 fw); 1178 1179 sband = &data->bands[NL80211_BAND_5GHZ]; 1180 iwl_init_ht_hw_capab(trans, data, &sband->ht_cap, NL80211_BAND_5GHZ, 1181 tx_chains, rx_chains); 1182 if (data->sku_cap_11ac_enable && !iwlwifi_mod_params.disable_11ac) 1183 iwl_init_vht_hw_capab(trans, data, &sband->vht_cap, 1184 tx_chains, rx_chains); 1185 1186 if (data->sku_cap_11ax_enable && !iwlwifi_mod_params.disable_11ax) 1187 iwl_init_he_hw_capab(trans, data, sband, tx_chains, rx_chains, 1188 fw); 1189 1190 sband = &data->bands[NL80211_BAND_6GHZ]; 1191 if (data->sku_cap_11ax_enable && !iwlwifi_mod_params.disable_11ax) 1192 iwl_init_he_hw_capab(trans, data, sband, tx_chains, rx_chains, 1193 fw); 1194 } 1195 IWL_EXPORT_SYMBOL(iwl_reinit_cab); 1196 1197 static void iwl_init_sbands(struct iwl_trans *trans, 1198 struct iwl_nvm_data *data, 1199 const void *nvm_ch_flags, u8 tx_chains, 1200 u8 rx_chains, u32 sbands_flags, bool v4, 1201 const struct iwl_fw *fw) 1202 { 1203 struct device *dev = trans->dev; 1204 int n_channels; 1205 int n_used = 0; 1206 struct ieee80211_supported_band *sband; 1207 1208 n_channels = iwl_init_channel_map(trans, fw, data, nvm_ch_flags, 1209 sbands_flags, v4); 1210 sband = &data->bands[NL80211_BAND_2GHZ]; 1211 sband->band = NL80211_BAND_2GHZ; 1212 sband->bitrates = &iwl_cfg80211_rates[RATES_24_OFFS]; 1213 sband->n_bitrates = N_RATES_24; 1214 n_used += iwl_init_sband_channels(data, sband, n_channels, 1215 NL80211_BAND_2GHZ); 1216 iwl_init_ht_hw_capab(trans, data, &sband->ht_cap, NL80211_BAND_2GHZ, 1217 tx_chains, rx_chains); 1218 1219 if (data->sku_cap_11ax_enable && !iwlwifi_mod_params.disable_11ax) 1220 iwl_init_he_hw_capab(trans, data, sband, tx_chains, rx_chains, 1221 fw); 1222 1223 sband = &data->bands[NL80211_BAND_5GHZ]; 1224 sband->band = NL80211_BAND_5GHZ; 1225 sband->bitrates = &iwl_cfg80211_rates[RATES_52_OFFS]; 1226 sband->n_bitrates = N_RATES_52; 1227 n_used += iwl_init_sband_channels(data, sband, n_channels, 1228 NL80211_BAND_5GHZ); 1229 iwl_init_ht_hw_capab(trans, data, &sband->ht_cap, NL80211_BAND_5GHZ, 1230 tx_chains, rx_chains); 1231 if (data->sku_cap_11ac_enable && !iwlwifi_mod_params.disable_11ac) 1232 iwl_init_vht_hw_capab(trans, data, &sband->vht_cap, 1233 tx_chains, rx_chains); 1234 1235 if (data->sku_cap_11ax_enable && !iwlwifi_mod_params.disable_11ax) 1236 iwl_init_he_hw_capab(trans, data, sband, tx_chains, rx_chains, 1237 fw); 1238 1239 /* 6GHz band. */ 1240 sband = &data->bands[NL80211_BAND_6GHZ]; 1241 sband->band = NL80211_BAND_6GHZ; 1242 /* use the same rates as 5GHz band */ 1243 sband->bitrates = &iwl_cfg80211_rates[RATES_52_OFFS]; 1244 sband->n_bitrates = N_RATES_52; 1245 n_used += iwl_init_sband_channels(data, sband, n_channels, 1246 NL80211_BAND_6GHZ); 1247 1248 if (data->sku_cap_11ax_enable && !iwlwifi_mod_params.disable_11ax) 1249 iwl_init_he_hw_capab(trans, data, sband, tx_chains, rx_chains, 1250 fw); 1251 else 1252 sband->n_channels = 0; 1253 if (n_channels != n_used) 1254 IWL_ERR_DEV(dev, "NVM: used only %d of %d channels\n", 1255 n_used, n_channels); 1256 } 1257 1258 static int iwl_get_sku(const struct iwl_rf_cfg *cfg, const __le16 *nvm_sw, 1259 const __le16 *phy_sku) 1260 { 1261 if (cfg->nvm_type != IWL_NVM_EXT) 1262 return le16_to_cpup(nvm_sw + SKU); 1263 1264 return le32_to_cpup((const __le32 *)(phy_sku + SKU_FAMILY_8000)); 1265 } 1266 1267 static int iwl_get_nvm_version(const struct iwl_rf_cfg *cfg, const __le16 *nvm_sw) 1268 { 1269 if (cfg->nvm_type != IWL_NVM_EXT) 1270 return le16_to_cpup(nvm_sw + NVM_VERSION); 1271 else 1272 return le32_to_cpup((const __le32 *)(nvm_sw + 1273 NVM_VERSION_EXT_NVM)); 1274 } 1275 1276 static int iwl_get_radio_cfg(const struct iwl_rf_cfg *cfg, const __le16 *nvm_sw, 1277 const __le16 *phy_sku) 1278 { 1279 if (cfg->nvm_type != IWL_NVM_EXT) 1280 return le16_to_cpup(nvm_sw + RADIO_CFG); 1281 1282 return le32_to_cpup((const __le32 *)(phy_sku + RADIO_CFG_FAMILY_EXT_NVM)); 1283 1284 } 1285 1286 static int iwl_get_n_hw_addrs(const struct iwl_rf_cfg *cfg, const __le16 *nvm_sw) 1287 { 1288 int n_hw_addr; 1289 1290 if (cfg->nvm_type != IWL_NVM_EXT) 1291 return le16_to_cpup(nvm_sw + N_HW_ADDRS); 1292 1293 n_hw_addr = le32_to_cpup((const __le32 *)(nvm_sw + N_HW_ADDRS_FAMILY_8000)); 1294 1295 return n_hw_addr & N_HW_ADDR_MASK; 1296 } 1297 1298 static void iwl_set_radio_cfg(const struct iwl_rf_cfg *cfg, 1299 struct iwl_nvm_data *data, 1300 u32 radio_cfg) 1301 { 1302 if (cfg->nvm_type != IWL_NVM_EXT) { 1303 data->radio_cfg_type = NVM_RF_CFG_TYPE_MSK(radio_cfg); 1304 data->radio_cfg_step = NVM_RF_CFG_STEP_MSK(radio_cfg); 1305 data->radio_cfg_dash = NVM_RF_CFG_DASH_MSK(radio_cfg); 1306 data->radio_cfg_pnum = NVM_RF_CFG_PNUM_MSK(radio_cfg); 1307 return; 1308 } 1309 1310 /* set the radio configuration for family 8000 */ 1311 data->radio_cfg_type = EXT_NVM_RF_CFG_TYPE_MSK(radio_cfg); 1312 data->radio_cfg_step = EXT_NVM_RF_CFG_STEP_MSK(radio_cfg); 1313 data->radio_cfg_dash = EXT_NVM_RF_CFG_DASH_MSK(radio_cfg); 1314 data->radio_cfg_pnum = EXT_NVM_RF_CFG_FLAVOR_MSK(radio_cfg); 1315 data->valid_tx_ant = EXT_NVM_RF_CFG_TX_ANT_MSK(radio_cfg); 1316 data->valid_rx_ant = EXT_NVM_RF_CFG_RX_ANT_MSK(radio_cfg); 1317 } 1318 1319 static void iwl_flip_hw_address(__le32 mac_addr0, __le32 mac_addr1, u8 *dest) 1320 { 1321 const u8 *hw_addr; 1322 1323 hw_addr = (const u8 *)&mac_addr0; 1324 dest[0] = hw_addr[3]; 1325 dest[1] = hw_addr[2]; 1326 dest[2] = hw_addr[1]; 1327 dest[3] = hw_addr[0]; 1328 1329 hw_addr = (const u8 *)&mac_addr1; 1330 dest[4] = hw_addr[1]; 1331 dest[5] = hw_addr[0]; 1332 } 1333 1334 static void iwl_set_hw_address_from_csr(struct iwl_trans *trans, 1335 struct iwl_nvm_data *data) 1336 { 1337 __le32 mac_addr0 = cpu_to_le32(iwl_read32(trans, 1338 CSR_MAC_ADDR0_STRAP(trans))); 1339 __le32 mac_addr1 = cpu_to_le32(iwl_read32(trans, 1340 CSR_MAC_ADDR1_STRAP(trans))); 1341 1342 iwl_flip_hw_address(mac_addr0, mac_addr1, data->hw_addr); 1343 /* 1344 * If the OEM fused a valid address, use it instead of the one in the 1345 * OTP 1346 */ 1347 if (is_valid_ether_addr(data->hw_addr)) 1348 return; 1349 1350 mac_addr0 = cpu_to_le32(iwl_read32(trans, CSR_MAC_ADDR0_OTP(trans))); 1351 mac_addr1 = cpu_to_le32(iwl_read32(trans, CSR_MAC_ADDR1_OTP(trans))); 1352 1353 iwl_flip_hw_address(mac_addr0, mac_addr1, data->hw_addr); 1354 } 1355 1356 static void iwl_set_hw_address_family_8000(struct iwl_trans *trans, 1357 const struct iwl_rf_cfg *cfg, 1358 struct iwl_nvm_data *data, 1359 const __le16 *mac_override, 1360 const __be16 *nvm_hw) 1361 { 1362 const u8 *hw_addr; 1363 1364 if (mac_override) { 1365 static const u8 reserved_mac[] = { 1366 0x02, 0xcc, 0xaa, 0xff, 0xee, 0x00 1367 }; 1368 1369 hw_addr = (const u8 *)(mac_override + 1370 MAC_ADDRESS_OVERRIDE_EXT_NVM); 1371 1372 /* 1373 * Store the MAC address from MAO section. 1374 * No byte swapping is required in MAO section 1375 */ 1376 memcpy(data->hw_addr, hw_addr, ETH_ALEN); 1377 1378 /* 1379 * Force the use of the OTP MAC address in case of reserved MAC 1380 * address in the NVM, or if address is given but invalid. 1381 */ 1382 if (is_valid_ether_addr(data->hw_addr) && 1383 memcmp(reserved_mac, hw_addr, ETH_ALEN) != 0) 1384 return; 1385 1386 IWL_ERR(trans, 1387 "mac address from nvm override section is not valid\n"); 1388 } 1389 1390 if (nvm_hw) { 1391 /* read the mac address from WFMP registers */ 1392 __le32 mac_addr0 = cpu_to_le32(iwl_trans_read_prph(trans, 1393 WFMP_MAC_ADDR_0)); 1394 __le32 mac_addr1 = cpu_to_le32(iwl_trans_read_prph(trans, 1395 WFMP_MAC_ADDR_1)); 1396 1397 iwl_flip_hw_address(mac_addr0, mac_addr1, data->hw_addr); 1398 1399 return; 1400 } 1401 1402 IWL_ERR(trans, "mac address is not found\n"); 1403 } 1404 1405 static int iwl_set_hw_address(struct iwl_trans *trans, 1406 const struct iwl_rf_cfg *cfg, 1407 struct iwl_nvm_data *data, const __be16 *nvm_hw, 1408 const __le16 *mac_override) 1409 { 1410 const struct iwl_mac_cfg *mac_cfg = trans->mac_cfg; 1411 if (mac_cfg->base->mac_addr_from_csr) { 1412 iwl_set_hw_address_from_csr(trans, data); 1413 } else if (cfg->nvm_type != IWL_NVM_EXT) { 1414 const u8 *hw_addr = (const u8 *)(nvm_hw + HW_ADDR); 1415 1416 /* The byte order is little endian 16 bit, meaning 214365 */ 1417 data->hw_addr[0] = hw_addr[1]; 1418 data->hw_addr[1] = hw_addr[0]; 1419 data->hw_addr[2] = hw_addr[3]; 1420 data->hw_addr[3] = hw_addr[2]; 1421 data->hw_addr[4] = hw_addr[5]; 1422 data->hw_addr[5] = hw_addr[4]; 1423 } else { 1424 iwl_set_hw_address_family_8000(trans, cfg, data, 1425 mac_override, nvm_hw); 1426 } 1427 1428 if (!is_valid_ether_addr(data->hw_addr)) { 1429 IWL_ERR(trans, "no valid mac address was found\n"); 1430 return -EINVAL; 1431 } 1432 1433 if (!trans->csme_own) 1434 IWL_INFO(trans, "base HW address: %pM, OTP minor version: 0x%x\n", 1435 data->hw_addr, iwl_read_prph(trans, REG_OTP_MINOR)); 1436 1437 return 0; 1438 } 1439 1440 static bool 1441 iwl_nvm_no_wide_in_5ghz(struct iwl_trans *trans, const struct iwl_rf_cfg *cfg, 1442 const __be16 *nvm_hw) 1443 { 1444 /* 1445 * Workaround a bug in Indonesia SKUs where the regulatory in 1446 * some 7000-family OTPs erroneously allow wide channels in 1447 * 5GHz. To check for Indonesia, we take the SKU value from 1448 * bits 1-4 in the subsystem ID and check if it is either 5 or 1449 * 9. In those cases, we need to force-disable wide channels 1450 * in 5GHz otherwise the FW will throw a sysassert when we try 1451 * to use them. 1452 */ 1453 if (trans->mac_cfg->device_family == IWL_DEVICE_FAMILY_7000) { 1454 /* 1455 * Unlike the other sections in the NVM, the hw 1456 * section uses big-endian. 1457 */ 1458 u16 subsystem_id = be16_to_cpup(nvm_hw + SUBSYSTEM_ID); 1459 u8 sku = (subsystem_id & 0x1e) >> 1; 1460 1461 if (sku == 5 || sku == 9) { 1462 IWL_DEBUG_EEPROM(trans->dev, 1463 "disabling wide channels in 5GHz (0x%0x %d)\n", 1464 subsystem_id, sku); 1465 return true; 1466 } 1467 } 1468 1469 return false; 1470 } 1471 1472 struct iwl_nvm_data * 1473 iwl_parse_mei_nvm_data(struct iwl_trans *trans, const struct iwl_rf_cfg *cfg, 1474 const struct iwl_mei_nvm *mei_nvm, 1475 const struct iwl_fw *fw, u8 tx_ant, u8 rx_ant) 1476 { 1477 struct iwl_nvm_data *data; 1478 u32 sbands_flags = 0; 1479 u8 rx_chains = fw->valid_rx_ant; 1480 u8 tx_chains = fw->valid_rx_ant; 1481 1482 if (cfg->uhb_supported) 1483 data = kzalloc(struct_size(data, channels, 1484 IWL_NVM_NUM_CHANNELS_UHB), 1485 GFP_KERNEL); 1486 else 1487 data = kzalloc(struct_size(data, channels, 1488 IWL_NVM_NUM_CHANNELS_EXT), 1489 GFP_KERNEL); 1490 if (!data) 1491 return NULL; 1492 1493 BUILD_BUG_ON(ARRAY_SIZE(mei_nvm->channels) != 1494 IWL_NVM_NUM_CHANNELS_UHB); 1495 data->nvm_version = mei_nvm->nvm_version; 1496 1497 iwl_set_radio_cfg(cfg, data, mei_nvm->radio_cfg); 1498 if (data->valid_tx_ant) 1499 tx_chains &= data->valid_tx_ant; 1500 if (data->valid_rx_ant) 1501 rx_chains &= data->valid_rx_ant; 1502 if (tx_ant) 1503 tx_chains &= tx_ant; 1504 if (rx_ant) 1505 rx_chains &= rx_ant; 1506 1507 data->sku_cap_mimo_disabled = false; 1508 data->sku_cap_band_24ghz_enable = true; 1509 data->sku_cap_band_52ghz_enable = true; 1510 data->sku_cap_11n_enable = 1511 !(iwlwifi_mod_params.disable_11n & IWL_DISABLE_HT_ALL); 1512 data->sku_cap_11ac_enable = true; 1513 data->sku_cap_11ax_enable = 1514 mei_nvm->caps & MEI_NVM_CAPS_11AX_SUPPORT; 1515 1516 data->lar_enabled = mei_nvm->caps & MEI_NVM_CAPS_LARI_SUPPORT; 1517 1518 data->n_hw_addrs = mei_nvm->n_hw_addrs; 1519 /* If no valid mac address was found - bail out */ 1520 if (iwl_set_hw_address(trans, cfg, data, NULL, NULL)) { 1521 kfree(data); 1522 return NULL; 1523 } 1524 1525 if (data->lar_enabled && 1526 fw_has_capa(&fw->ucode_capa, IWL_UCODE_TLV_CAPA_LAR_SUPPORT)) 1527 sbands_flags |= IWL_NVM_SBANDS_FLAGS_LAR; 1528 1529 iwl_init_sbands(trans, data, mei_nvm->channels, tx_chains, rx_chains, 1530 sbands_flags, true, fw); 1531 1532 return data; 1533 } 1534 IWL_EXPORT_SYMBOL(iwl_parse_mei_nvm_data); 1535 1536 struct iwl_nvm_data * 1537 iwl_parse_nvm_data(struct iwl_trans *trans, const struct iwl_rf_cfg *cfg, 1538 const struct iwl_fw *fw, 1539 const __be16 *nvm_hw, const __le16 *nvm_sw, 1540 const __le16 *nvm_calib, const __le16 *regulatory, 1541 const __le16 *mac_override, const __le16 *phy_sku, 1542 u8 tx_chains, u8 rx_chains) 1543 { 1544 struct iwl_nvm_data *data; 1545 bool lar_enabled; 1546 u32 sku, radio_cfg; 1547 u32 sbands_flags = 0; 1548 u16 lar_config; 1549 const __le16 *ch_section; 1550 1551 if (cfg->uhb_supported) 1552 data = kzalloc(struct_size(data, channels, 1553 IWL_NVM_NUM_CHANNELS_UHB), 1554 GFP_KERNEL); 1555 else if (cfg->nvm_type != IWL_NVM_EXT) 1556 data = kzalloc(struct_size(data, channels, 1557 IWL_NVM_NUM_CHANNELS), 1558 GFP_KERNEL); 1559 else 1560 data = kzalloc(struct_size(data, channels, 1561 IWL_NVM_NUM_CHANNELS_EXT), 1562 GFP_KERNEL); 1563 if (!data) 1564 return NULL; 1565 1566 data->nvm_version = iwl_get_nvm_version(cfg, nvm_sw); 1567 1568 radio_cfg = iwl_get_radio_cfg(cfg, nvm_sw, phy_sku); 1569 iwl_set_radio_cfg(cfg, data, radio_cfg); 1570 if (data->valid_tx_ant) 1571 tx_chains &= data->valid_tx_ant; 1572 if (data->valid_rx_ant) 1573 rx_chains &= data->valid_rx_ant; 1574 1575 sku = iwl_get_sku(cfg, nvm_sw, phy_sku); 1576 data->sku_cap_band_24ghz_enable = sku & NVM_SKU_CAP_BAND_24GHZ; 1577 data->sku_cap_band_52ghz_enable = sku & NVM_SKU_CAP_BAND_52GHZ; 1578 data->sku_cap_11n_enable = sku & NVM_SKU_CAP_11N_ENABLE; 1579 if (iwlwifi_mod_params.disable_11n & IWL_DISABLE_HT_ALL) 1580 data->sku_cap_11n_enable = false; 1581 data->sku_cap_11ac_enable = data->sku_cap_11n_enable && 1582 (sku & NVM_SKU_CAP_11AC_ENABLE); 1583 data->sku_cap_mimo_disabled = sku & NVM_SKU_CAP_MIMO_DISABLE; 1584 1585 data->n_hw_addrs = iwl_get_n_hw_addrs(cfg, nvm_sw); 1586 1587 if (cfg->nvm_type != IWL_NVM_EXT) { 1588 /* Checking for required sections */ 1589 if (!nvm_calib) { 1590 IWL_ERR(trans, 1591 "Can't parse empty Calib NVM sections\n"); 1592 kfree(data); 1593 return NULL; 1594 } 1595 1596 ch_section = cfg->nvm_type == IWL_NVM_SDP ? 1597 ®ulatory[NVM_CHANNELS_SDP] : 1598 &nvm_sw[NVM_CHANNELS]; 1599 1600 lar_enabled = true; 1601 } else { 1602 u16 lar_offset = data->nvm_version < 0xE39 ? 1603 NVM_LAR_OFFSET_OLD : 1604 NVM_LAR_OFFSET; 1605 1606 lar_config = le16_to_cpup(regulatory + lar_offset); 1607 data->lar_enabled = !!(lar_config & 1608 NVM_LAR_ENABLED); 1609 lar_enabled = data->lar_enabled; 1610 ch_section = ®ulatory[NVM_CHANNELS_EXTENDED]; 1611 } 1612 1613 /* If no valid mac address was found - bail out */ 1614 if (iwl_set_hw_address(trans, cfg, data, nvm_hw, mac_override)) { 1615 kfree(data); 1616 return NULL; 1617 } 1618 1619 if (lar_enabled && 1620 fw_has_capa(&fw->ucode_capa, IWL_UCODE_TLV_CAPA_LAR_SUPPORT)) 1621 sbands_flags |= IWL_NVM_SBANDS_FLAGS_LAR; 1622 1623 if (iwl_nvm_no_wide_in_5ghz(trans, cfg, nvm_hw)) 1624 sbands_flags |= IWL_NVM_SBANDS_FLAGS_NO_WIDE_IN_5GHZ; 1625 1626 iwl_init_sbands(trans, data, ch_section, tx_chains, rx_chains, 1627 sbands_flags, false, fw); 1628 data->calib_version = 255; 1629 1630 return data; 1631 } 1632 IWL_EXPORT_SYMBOL(iwl_parse_nvm_data); 1633 1634 static u32 iwl_nvm_get_regdom_bw_flags(const u16 *nvm_chan, 1635 int ch_idx, u16 nvm_flags, 1636 struct iwl_reg_capa reg_capa) 1637 { 1638 u32 flags = NL80211_RRF_NO_HT40; 1639 1640 if (ch_idx < NUM_2GHZ_CHANNELS && 1641 (nvm_flags & NVM_CHANNEL_40MHZ)) { 1642 if (nvm_chan[ch_idx] <= LAST_2GHZ_HT_PLUS) 1643 flags &= ~NL80211_RRF_NO_HT40PLUS; 1644 if (nvm_chan[ch_idx] >= FIRST_2GHZ_HT_MINUS) 1645 flags &= ~NL80211_RRF_NO_HT40MINUS; 1646 } else if (ch_idx < NUM_2GHZ_CHANNELS + NUM_5GHZ_CHANNELS && 1647 nvm_flags & NVM_CHANNEL_40MHZ) { 1648 if ((ch_idx - NUM_2GHZ_CHANNELS) % 2 == 0) 1649 flags &= ~NL80211_RRF_NO_HT40PLUS; 1650 else 1651 flags &= ~NL80211_RRF_NO_HT40MINUS; 1652 } else if (nvm_flags & NVM_CHANNEL_40MHZ) { 1653 flags &= ~NL80211_RRF_NO_HT40PLUS; 1654 flags &= ~NL80211_RRF_NO_HT40MINUS; 1655 } 1656 1657 if (!(nvm_flags & NVM_CHANNEL_80MHZ)) 1658 flags |= NL80211_RRF_NO_80MHZ; 1659 if (!(nvm_flags & NVM_CHANNEL_160MHZ)) 1660 flags |= NL80211_RRF_NO_160MHZ; 1661 1662 if (!(nvm_flags & NVM_CHANNEL_ACTIVE)) 1663 flags |= NL80211_RRF_NO_IR; 1664 1665 if (nvm_flags & NVM_CHANNEL_RADAR) 1666 flags |= NL80211_RRF_DFS; 1667 1668 if (nvm_flags & NVM_CHANNEL_INDOOR_ONLY) 1669 flags |= NL80211_RRF_NO_OUTDOOR; 1670 1671 if (nvm_flags & NVM_CHANNEL_ALLOW_20MHZ_ACTIVITY && 1672 flags & NL80211_RRF_NO_IR) 1673 flags |= NL80211_RRF_ALLOW_20MHZ_ACTIVITY; 1674 1675 /* Set the GO concurrent flag only in case that NO_IR is set. 1676 * Otherwise it is meaningless 1677 */ 1678 if ((nvm_flags & NVM_CHANNEL_GO_CONCURRENT)) { 1679 if (flags & NL80211_RRF_NO_IR) 1680 flags |= NL80211_RRF_GO_CONCURRENT; 1681 if (flags & NL80211_RRF_DFS) { 1682 flags |= NL80211_RRF_DFS_CONCURRENT; 1683 /* Our device doesn't set active bit for DFS channels 1684 * however, once marked as DFS no-ir is not needed. 1685 */ 1686 flags &= ~NL80211_RRF_NO_IR; 1687 } 1688 } 1689 1690 /* Set the AP type for the UHB case. */ 1691 if (nvm_flags & NVM_CHANNEL_VLP) { 1692 if (!(nvm_flags & NVM_CHANNEL_VLP_AP_NOT_ALLOWED)) 1693 flags |= NL80211_RRF_ALLOW_6GHZ_VLP_AP; 1694 } else { 1695 flags |= NL80211_RRF_NO_6GHZ_VLP_CLIENT; 1696 } 1697 1698 if (!(nvm_flags & NVM_CHANNEL_AFC)) 1699 flags |= NL80211_RRF_NO_6GHZ_AFC_CLIENT; 1700 1701 /* 1702 * reg_capa is per regulatory domain so apply it for every channel 1703 */ 1704 if (ch_idx >= NUM_2GHZ_CHANNELS) { 1705 if (!reg_capa.allow_40mhz) 1706 flags |= NL80211_RRF_NO_HT40; 1707 1708 if (!reg_capa.allow_80mhz) 1709 flags |= NL80211_RRF_NO_80MHZ; 1710 1711 if (!reg_capa.allow_160mhz) 1712 flags |= NL80211_RRF_NO_160MHZ; 1713 1714 if (!reg_capa.allow_320mhz) 1715 flags |= NL80211_RRF_NO_320MHZ; 1716 } 1717 1718 if (reg_capa.disable_11ax) 1719 flags |= NL80211_RRF_NO_HE; 1720 1721 if (reg_capa.disable_11be) 1722 flags |= NL80211_RRF_NO_EHT; 1723 1724 return flags; 1725 } 1726 1727 static struct iwl_reg_capa iwl_get_reg_capa(u32 flags, u8 resp_ver) 1728 { 1729 struct iwl_reg_capa reg_capa = {}; 1730 1731 if (resp_ver >= REG_CAPA_V4_RESP_VER) { 1732 reg_capa.allow_40mhz = true; 1733 reg_capa.allow_80mhz = flags & REG_CAPA_V4_80MHZ_ALLOWED; 1734 reg_capa.allow_160mhz = flags & REG_CAPA_V4_160MHZ_ALLOWED; 1735 reg_capa.allow_320mhz = flags & REG_CAPA_V4_320MHZ_ALLOWED; 1736 reg_capa.disable_11ax = flags & REG_CAPA_V4_11AX_DISABLED; 1737 reg_capa.disable_11be = flags & REG_CAPA_V4_11BE_DISABLED; 1738 } else if (resp_ver >= REG_CAPA_V2_RESP_VER) { 1739 reg_capa.allow_40mhz = flags & REG_CAPA_V2_40MHZ_ALLOWED; 1740 reg_capa.allow_80mhz = flags & REG_CAPA_V2_80MHZ_ALLOWED; 1741 reg_capa.allow_160mhz = flags & REG_CAPA_V2_160MHZ_ALLOWED; 1742 reg_capa.disable_11ax = flags & REG_CAPA_V2_11AX_DISABLED; 1743 } else { 1744 reg_capa.allow_40mhz = !(flags & REG_CAPA_V1_40MHZ_FORBIDDEN); 1745 reg_capa.allow_80mhz = flags & REG_CAPA_V1_80MHZ_ALLOWED; 1746 reg_capa.allow_160mhz = flags & REG_CAPA_V1_160MHZ_ALLOWED; 1747 reg_capa.disable_11ax = flags & REG_CAPA_V1_11AX_DISABLED; 1748 } 1749 return reg_capa; 1750 } 1751 1752 struct ieee80211_regdomain * 1753 iwl_parse_nvm_mcc_info(struct iwl_trans *trans, 1754 int num_of_ch, __le32 *channels, u16 fw_mcc, 1755 u16 geo_info, u32 cap, u8 resp_ver) 1756 { 1757 const struct iwl_rf_cfg *cfg = trans->cfg; 1758 struct device *dev = trans->dev; 1759 int ch_idx; 1760 u16 ch_flags; 1761 u32 reg_rule_flags, prev_reg_rule_flags = 0; 1762 const u16 *nvm_chan; 1763 struct ieee80211_regdomain *regd, *copy_rd; 1764 struct ieee80211_reg_rule *rule; 1765 int center_freq, prev_center_freq = 0; 1766 int valid_rules = 0; 1767 bool new_rule; 1768 int max_num_ch; 1769 struct iwl_reg_capa reg_capa; 1770 1771 if (cfg->uhb_supported) { 1772 max_num_ch = IWL_NVM_NUM_CHANNELS_UHB; 1773 nvm_chan = iwl_uhb_nvm_channels; 1774 } else if (cfg->nvm_type == IWL_NVM_EXT) { 1775 max_num_ch = IWL_NVM_NUM_CHANNELS_EXT; 1776 nvm_chan = iwl_ext_nvm_channels; 1777 } else { 1778 max_num_ch = IWL_NVM_NUM_CHANNELS; 1779 nvm_chan = iwl_nvm_channels; 1780 } 1781 1782 if (num_of_ch > max_num_ch) { 1783 IWL_DEBUG_DEV(dev, IWL_DL_LAR, 1784 "Num of channels (%d) is greater than expected. Truncating to %d\n", 1785 num_of_ch, max_num_ch); 1786 num_of_ch = max_num_ch; 1787 } 1788 1789 if (WARN_ON_ONCE(num_of_ch > NL80211_MAX_SUPP_REG_RULES)) 1790 return ERR_PTR(-EINVAL); 1791 1792 IWL_DEBUG_DEV(dev, IWL_DL_LAR, "building regdom for %d channels\n", 1793 num_of_ch); 1794 1795 /* build a regdomain rule for every valid channel */ 1796 regd = kzalloc(struct_size(regd, reg_rules, num_of_ch), GFP_KERNEL); 1797 if (!regd) 1798 return ERR_PTR(-ENOMEM); 1799 1800 /* set alpha2 from FW. */ 1801 regd->alpha2[0] = fw_mcc >> 8; 1802 regd->alpha2[1] = fw_mcc & 0xff; 1803 1804 /* parse regulatory capability flags */ 1805 reg_capa = iwl_get_reg_capa(cap, resp_ver); 1806 1807 for (ch_idx = 0; ch_idx < num_of_ch; ch_idx++) { 1808 enum nl80211_band band = 1809 iwl_nl80211_band_from_channel_idx(ch_idx); 1810 1811 ch_flags = (u16)__le32_to_cpup(channels + ch_idx); 1812 center_freq = ieee80211_channel_to_frequency(nvm_chan[ch_idx], 1813 band); 1814 new_rule = false; 1815 1816 if (!(ch_flags & NVM_CHANNEL_VALID)) { 1817 iwl_nvm_print_channel_flags(dev, IWL_DL_LAR, 1818 nvm_chan[ch_idx], ch_flags); 1819 continue; 1820 } 1821 1822 reg_rule_flags = iwl_nvm_get_regdom_bw_flags(nvm_chan, ch_idx, 1823 ch_flags, 1824 reg_capa); 1825 1826 /* we can't continue the same rule */ 1827 if (ch_idx == 0 || prev_reg_rule_flags != reg_rule_flags || 1828 center_freq - prev_center_freq > 20) { 1829 valid_rules++; 1830 new_rule = true; 1831 } 1832 1833 rule = ®d->reg_rules[valid_rules - 1]; 1834 1835 if (new_rule) 1836 rule->freq_range.start_freq_khz = 1837 MHZ_TO_KHZ(center_freq - 10); 1838 1839 rule->freq_range.end_freq_khz = MHZ_TO_KHZ(center_freq + 10); 1840 1841 /* this doesn't matter - not used by FW */ 1842 rule->power_rule.max_antenna_gain = DBI_TO_MBI(6); 1843 rule->power_rule.max_eirp = 1844 DBM_TO_MBM(IWL_DEFAULT_MAX_TX_POWER); 1845 1846 rule->flags = reg_rule_flags; 1847 1848 /* rely on auto-calculation to merge BW of contiguous chans */ 1849 rule->flags |= NL80211_RRF_AUTO_BW; 1850 rule->freq_range.max_bandwidth_khz = 0; 1851 1852 prev_center_freq = center_freq; 1853 prev_reg_rule_flags = reg_rule_flags; 1854 1855 iwl_nvm_print_channel_flags(dev, IWL_DL_LAR, 1856 nvm_chan[ch_idx], ch_flags); 1857 1858 if (!(geo_info & GEO_WMM_ETSI_5GHZ_INFO) || 1859 band == NL80211_BAND_2GHZ) 1860 continue; 1861 1862 reg_query_regdb_wmm(regd->alpha2, center_freq, rule); 1863 } 1864 1865 /* 1866 * Certain firmware versions might report no valid channels 1867 * if booted in RF-kill, i.e. not all calibrations etc. are 1868 * running. We'll get out of this situation later when the 1869 * rfkill is removed and we update the regdomain again, but 1870 * since cfg80211 doesn't accept an empty regdomain, add a 1871 * dummy (unusable) rule here in this case so we can init. 1872 */ 1873 if (!valid_rules) { 1874 valid_rules = 1; 1875 rule = ®d->reg_rules[valid_rules - 1]; 1876 rule->freq_range.start_freq_khz = MHZ_TO_KHZ(2412); 1877 rule->freq_range.end_freq_khz = MHZ_TO_KHZ(2413); 1878 rule->freq_range.max_bandwidth_khz = MHZ_TO_KHZ(1); 1879 rule->power_rule.max_antenna_gain = DBI_TO_MBI(6); 1880 rule->power_rule.max_eirp = 1881 DBM_TO_MBM(IWL_DEFAULT_MAX_TX_POWER); 1882 } 1883 1884 regd->n_reg_rules = valid_rules; 1885 1886 /* 1887 * Narrow down regdom for unused regulatory rules to prevent hole 1888 * between reg rules to wmm rules. 1889 */ 1890 copy_rd = kmemdup(regd, struct_size(regd, reg_rules, valid_rules), 1891 GFP_KERNEL); 1892 if (!copy_rd) 1893 copy_rd = ERR_PTR(-ENOMEM); 1894 1895 kfree(regd); 1896 return copy_rd; 1897 } 1898 IWL_EXPORT_SYMBOL(iwl_parse_nvm_mcc_info); 1899 1900 #define IWL_MAX_NVM_SECTION_SIZE 0x1b58 1901 #define IWL_MAX_EXT_NVM_SECTION_SIZE 0x1ffc 1902 #define MAX_NVM_FILE_LEN 16384 1903 1904 void iwl_nvm_fixups(u32 hw_id, unsigned int section, u8 *data, 1905 unsigned int len) 1906 { 1907 #define IWL_4165_DEVICE_ID 0x5501 1908 #define NVM_SKU_CAP_MIMO_DISABLE BIT(5) 1909 1910 if (section == NVM_SECTION_TYPE_PHY_SKU && 1911 hw_id == IWL_4165_DEVICE_ID && data && len >= 5 && 1912 (data[4] & NVM_SKU_CAP_MIMO_DISABLE)) 1913 /* OTP 0x52 bug work around: it's a 1x1 device */ 1914 data[3] = ANT_B | (ANT_B << 4); 1915 } 1916 IWL_EXPORT_SYMBOL(iwl_nvm_fixups); 1917 1918 /* 1919 * Reads external NVM from a file into mvm->nvm_sections 1920 * 1921 * HOW TO CREATE THE NVM FILE FORMAT: 1922 * ------------------------------ 1923 * 1. create hex file, format: 1924 * 3800 -> header 1925 * 0000 -> header 1926 * 5a40 -> data 1927 * 1928 * rev - 6 bit (word1) 1929 * len - 10 bit (word1) 1930 * id - 4 bit (word2) 1931 * rsv - 12 bit (word2) 1932 * 1933 * 2. flip 8bits with 8 bits per line to get the right NVM file format 1934 * 1935 * 3. create binary file from the hex file 1936 * 1937 * 4. save as "iNVM_xxx.bin" under /lib/firmware 1938 */ 1939 int iwl_read_external_nvm(struct iwl_trans *trans, 1940 const char *nvm_file_name, 1941 struct iwl_nvm_section *nvm_sections) 1942 { 1943 int ret, section_size; 1944 u16 section_id; 1945 const struct firmware *fw_entry; 1946 const struct { 1947 __le16 word1; 1948 __le16 word2; 1949 u8 data[]; 1950 } *file_sec; 1951 const u8 *eof; 1952 u8 *temp; 1953 int max_section_size; 1954 const __le32 *dword_buff; 1955 1956 #define NVM_WORD1_LEN(x) (8 * (x & 0x03FF)) 1957 #define NVM_WORD2_ID(x) (x >> 12) 1958 #define EXT_NVM_WORD2_LEN(x) (2 * (((x) & 0xFF) << 8 | (x) >> 8)) 1959 #define EXT_NVM_WORD1_ID(x) ((x) >> 4) 1960 #define NVM_HEADER_0 (0x2A504C54) 1961 #define NVM_HEADER_1 (0x4E564D2A) 1962 #define NVM_HEADER_SIZE (4 * sizeof(u32)) 1963 1964 IWL_DEBUG_EEPROM(trans->dev, "Read from external NVM\n"); 1965 1966 /* Maximal size depends on NVM version */ 1967 if (trans->cfg->nvm_type != IWL_NVM_EXT) 1968 max_section_size = IWL_MAX_NVM_SECTION_SIZE; 1969 else 1970 max_section_size = IWL_MAX_EXT_NVM_SECTION_SIZE; 1971 1972 /* 1973 * Obtain NVM image via request_firmware. Since we already used 1974 * request_firmware_nowait() for the firmware binary load and only 1975 * get here after that we assume the NVM request can be satisfied 1976 * synchronously. 1977 */ 1978 ret = request_firmware(&fw_entry, nvm_file_name, trans->dev); 1979 if (ret) { 1980 IWL_ERR(trans, "ERROR: %s isn't available %d\n", 1981 nvm_file_name, ret); 1982 return ret; 1983 } 1984 1985 IWL_INFO(trans, "Loaded NVM file %s (%zu bytes)\n", 1986 nvm_file_name, fw_entry->size); 1987 1988 if (fw_entry->size > MAX_NVM_FILE_LEN) { 1989 IWL_ERR(trans, "NVM file too large\n"); 1990 ret = -EINVAL; 1991 goto out; 1992 } 1993 1994 eof = fw_entry->data + fw_entry->size; 1995 dword_buff = (const __le32 *)fw_entry->data; 1996 1997 /* some NVM file will contain a header. 1998 * The header is identified by 2 dwords header as follow: 1999 * dword[0] = 0x2A504C54 2000 * dword[1] = 0x4E564D2A 2001 * 2002 * This header must be skipped when providing the NVM data to the FW. 2003 */ 2004 if (fw_entry->size > NVM_HEADER_SIZE && 2005 dword_buff[0] == cpu_to_le32(NVM_HEADER_0) && 2006 dword_buff[1] == cpu_to_le32(NVM_HEADER_1)) { 2007 file_sec = (const void *)(fw_entry->data + NVM_HEADER_SIZE); 2008 IWL_INFO(trans, "NVM Version %08X\n", le32_to_cpu(dword_buff[2])); 2009 IWL_INFO(trans, "NVM Manufacturing date %08X\n", 2010 le32_to_cpu(dword_buff[3])); 2011 2012 /* nvm file validation, dword_buff[2] holds the file version */ 2013 if (trans->mac_cfg->device_family == IWL_DEVICE_FAMILY_8000 && 2014 trans->info.hw_rev_step == SILICON_C_STEP && 2015 le32_to_cpu(dword_buff[2]) < 0xE4A) { 2016 ret = -EFAULT; 2017 goto out; 2018 } 2019 } else { 2020 file_sec = (const void *)fw_entry->data; 2021 } 2022 2023 while (true) { 2024 if (file_sec->data > eof) { 2025 IWL_ERR(trans, 2026 "ERROR - NVM file too short for section header\n"); 2027 ret = -EINVAL; 2028 break; 2029 } 2030 2031 /* check for EOF marker */ 2032 if (!file_sec->word1 && !file_sec->word2) { 2033 ret = 0; 2034 break; 2035 } 2036 2037 if (trans->cfg->nvm_type != IWL_NVM_EXT) { 2038 section_size = 2039 2 * NVM_WORD1_LEN(le16_to_cpu(file_sec->word1)); 2040 section_id = NVM_WORD2_ID(le16_to_cpu(file_sec->word2)); 2041 } else { 2042 section_size = 2 * EXT_NVM_WORD2_LEN( 2043 le16_to_cpu(file_sec->word2)); 2044 section_id = EXT_NVM_WORD1_ID( 2045 le16_to_cpu(file_sec->word1)); 2046 } 2047 2048 if (section_size > max_section_size) { 2049 IWL_ERR(trans, "ERROR - section too large (%d)\n", 2050 section_size); 2051 ret = -EINVAL; 2052 break; 2053 } 2054 2055 if (!section_size) { 2056 IWL_ERR(trans, "ERROR - section empty\n"); 2057 ret = -EINVAL; 2058 break; 2059 } 2060 2061 if (file_sec->data + section_size > eof) { 2062 IWL_ERR(trans, 2063 "ERROR - NVM file too short for section (%d bytes)\n", 2064 section_size); 2065 ret = -EINVAL; 2066 break; 2067 } 2068 2069 if (WARN(section_id >= NVM_MAX_NUM_SECTIONS, 2070 "Invalid NVM section ID %d\n", section_id)) { 2071 ret = -EINVAL; 2072 break; 2073 } 2074 2075 temp = kmemdup(file_sec->data, section_size, GFP_KERNEL); 2076 if (!temp) { 2077 ret = -ENOMEM; 2078 break; 2079 } 2080 2081 iwl_nvm_fixups(trans->info.hw_id, section_id, temp, section_size); 2082 2083 kfree(nvm_sections[section_id].data); 2084 nvm_sections[section_id].data = temp; 2085 nvm_sections[section_id].length = section_size; 2086 2087 /* advance to the next section */ 2088 file_sec = (const void *)(file_sec->data + section_size); 2089 } 2090 out: 2091 release_firmware(fw_entry); 2092 return ret; 2093 } 2094 IWL_EXPORT_SYMBOL(iwl_read_external_nvm); 2095 2096 struct iwl_nvm_data *iwl_get_nvm(struct iwl_trans *trans, 2097 const struct iwl_fw *fw, 2098 u8 set_tx_ant, u8 set_rx_ant) 2099 { 2100 struct iwl_nvm_get_info cmd = {}; 2101 struct iwl_nvm_data *nvm; 2102 struct iwl_host_cmd hcmd = { 2103 .flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL, 2104 .data = { &cmd, }, 2105 .len = { sizeof(cmd) }, 2106 .id = WIDE_ID(REGULATORY_AND_NVM_GROUP, NVM_GET_INFO) 2107 }; 2108 int ret; 2109 bool empty_otp; 2110 u32 mac_flags; 2111 u32 sbands_flags = 0; 2112 u8 tx_ant; 2113 u8 rx_ant; 2114 2115 /* 2116 * All the values in iwl_nvm_get_info_rsp v4 are the same as 2117 * in v3, except for the channel profile part of the 2118 * regulatory. So we can just access the new struct, with the 2119 * exception of the latter. 2120 */ 2121 struct iwl_nvm_get_info_rsp *rsp; 2122 struct iwl_nvm_get_info_rsp_v3 *rsp_v3; 2123 bool v4 = fw_has_api(&fw->ucode_capa, 2124 IWL_UCODE_TLV_API_REGULATORY_NVM_INFO); 2125 size_t rsp_size = v4 ? sizeof(*rsp) : sizeof(*rsp_v3); 2126 void *channel_profile; 2127 2128 ret = iwl_trans_send_cmd(trans, &hcmd); 2129 if (ret) 2130 return ERR_PTR(ret); 2131 2132 if (WARN(iwl_rx_packet_payload_len(hcmd.resp_pkt) != rsp_size, 2133 "Invalid payload len in NVM response from FW %d", 2134 iwl_rx_packet_payload_len(hcmd.resp_pkt))) { 2135 ret = -EINVAL; 2136 goto out; 2137 } 2138 2139 rsp = (void *)hcmd.resp_pkt->data; 2140 empty_otp = !!(le32_to_cpu(rsp->general.flags) & 2141 NVM_GENERAL_FLAGS_EMPTY_OTP); 2142 if (empty_otp) 2143 IWL_INFO(trans, "OTP is empty\n"); 2144 2145 nvm = kzalloc(struct_size(nvm, channels, IWL_NUM_CHANNELS), GFP_KERNEL); 2146 if (!nvm) { 2147 ret = -ENOMEM; 2148 goto out; 2149 } 2150 2151 iwl_set_hw_address_from_csr(trans, nvm); 2152 /* TODO: if platform NVM has MAC address - override it here */ 2153 2154 if (!is_valid_ether_addr(nvm->hw_addr)) { 2155 IWL_ERR(trans, "no valid mac address was found\n"); 2156 ret = -EINVAL; 2157 goto err_free; 2158 } 2159 2160 IWL_INFO(trans, "base HW address: %pM\n", nvm->hw_addr); 2161 2162 /* Initialize general data */ 2163 nvm->nvm_version = le16_to_cpu(rsp->general.nvm_version); 2164 nvm->n_hw_addrs = rsp->general.n_hw_addrs; 2165 if (nvm->n_hw_addrs == 0) 2166 IWL_WARN(trans, 2167 "Firmware declares no reserved mac addresses. OTP is empty: %d\n", 2168 empty_otp); 2169 2170 /* Initialize MAC sku data */ 2171 mac_flags = le32_to_cpu(rsp->mac_sku.mac_sku_flags); 2172 nvm->sku_cap_11ac_enable = 2173 !!(mac_flags & NVM_MAC_SKU_FLAGS_802_11AC_ENABLED); 2174 nvm->sku_cap_11n_enable = 2175 !!(mac_flags & NVM_MAC_SKU_FLAGS_802_11N_ENABLED); 2176 nvm->sku_cap_11ax_enable = 2177 !!(mac_flags & NVM_MAC_SKU_FLAGS_802_11AX_ENABLED); 2178 nvm->sku_cap_band_24ghz_enable = 2179 !!(mac_flags & NVM_MAC_SKU_FLAGS_BAND_2_4_ENABLED); 2180 nvm->sku_cap_band_52ghz_enable = 2181 !!(mac_flags & NVM_MAC_SKU_FLAGS_BAND_5_2_ENABLED); 2182 nvm->sku_cap_mimo_disabled = 2183 !!(mac_flags & NVM_MAC_SKU_FLAGS_MIMO_DISABLED); 2184 if (CSR_HW_RFID_TYPE(trans->info.hw_rf_id) >= IWL_CFG_RF_TYPE_FM) 2185 nvm->sku_cap_11be_enable = true; 2186 2187 /* Initialize PHY sku data */ 2188 nvm->valid_tx_ant = (u8)le32_to_cpu(rsp->phy_sku.tx_chains); 2189 nvm->valid_rx_ant = (u8)le32_to_cpu(rsp->phy_sku.rx_chains); 2190 2191 if (le32_to_cpu(rsp->regulatory.lar_enabled) && 2192 fw_has_capa(&fw->ucode_capa, 2193 IWL_UCODE_TLV_CAPA_LAR_SUPPORT)) { 2194 nvm->lar_enabled = true; 2195 sbands_flags |= IWL_NVM_SBANDS_FLAGS_LAR; 2196 } 2197 2198 rsp_v3 = (void *)rsp; 2199 channel_profile = v4 ? (void *)rsp->regulatory.channel_profile : 2200 (void *)rsp_v3->regulatory.channel_profile; 2201 2202 tx_ant = nvm->valid_tx_ant & fw->valid_tx_ant; 2203 rx_ant = nvm->valid_rx_ant & fw->valid_rx_ant; 2204 2205 if (set_tx_ant) 2206 tx_ant &= set_tx_ant; 2207 if (set_rx_ant) 2208 rx_ant &= set_rx_ant; 2209 2210 iwl_init_sbands(trans, nvm, channel_profile, tx_ant, rx_ant, 2211 sbands_flags, v4, fw); 2212 2213 iwl_free_resp(&hcmd); 2214 return nvm; 2215 2216 err_free: 2217 kfree(nvm); 2218 out: 2219 iwl_free_resp(&hcmd); 2220 return ERR_PTR(ret); 2221 } 2222 IWL_EXPORT_SYMBOL(iwl_get_nvm); 2223