1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause 2 /* 3 * Copyright (C) 2005-2014, 2018-2023, 2025 Intel Corporation 4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH 5 * Copyright (C) 2016-2017 Intel Deutschland GmbH 6 */ 7 #include <linux/types.h> 8 #include <linux/fips.h> 9 #include <linux/slab.h> 10 #include <linux/export.h> 11 #include <linux/etherdevice.h> 12 #include <linux/pci.h> 13 #include <linux/firmware.h> 14 15 #include "iwl-drv.h" 16 #include "iwl-modparams.h" 17 #include "iwl-nvm-parse.h" 18 #include "iwl-prph.h" 19 #include "iwl-io.h" 20 #include "iwl-csr.h" 21 #include "fw/acpi.h" 22 #include "fw/api/nvm-reg.h" 23 #include "fw/api/commands.h" 24 #include "fw/api/cmdhdr.h" 25 #include "fw/img.h" 26 #include "mei/iwl-mei.h" 27 28 /* NVM offsets (in words) definitions */ 29 enum nvm_offsets { 30 /* NVM HW-Section offset (in words) definitions */ 31 SUBSYSTEM_ID = 0x0A, 32 HW_ADDR = 0x15, 33 34 /* NVM SW-Section offset (in words) definitions */ 35 NVM_SW_SECTION = 0x1C0, 36 NVM_VERSION = 0, 37 RADIO_CFG = 1, 38 SKU = 2, 39 N_HW_ADDRS = 3, 40 NVM_CHANNELS = 0x1E0 - NVM_SW_SECTION, 41 42 /* NVM REGULATORY -Section offset (in words) definitions */ 43 NVM_CHANNELS_SDP = 0, 44 }; 45 46 enum ext_nvm_offsets { 47 /* NVM HW-Section offset (in words) definitions */ 48 49 MAC_ADDRESS_OVERRIDE_EXT_NVM = 1, 50 51 /* NVM SW-Section offset (in words) definitions */ 52 NVM_VERSION_EXT_NVM = 0, 53 N_HW_ADDRS_FAMILY_8000 = 3, 54 55 /* NVM PHY_SKU-Section offset (in words) definitions */ 56 RADIO_CFG_FAMILY_EXT_NVM = 0, 57 SKU_FAMILY_8000 = 2, 58 59 /* NVM REGULATORY -Section offset (in words) definitions */ 60 NVM_CHANNELS_EXTENDED = 0, 61 NVM_LAR_OFFSET_OLD = 0x4C7, 62 NVM_LAR_OFFSET = 0x507, 63 NVM_LAR_ENABLED = 0x7, 64 }; 65 66 /* SKU Capabilities (actual values from NVM definition) */ 67 enum nvm_sku_bits { 68 NVM_SKU_CAP_BAND_24GHZ = BIT(0), 69 NVM_SKU_CAP_BAND_52GHZ = BIT(1), 70 NVM_SKU_CAP_11N_ENABLE = BIT(2), 71 NVM_SKU_CAP_11AC_ENABLE = BIT(3), 72 NVM_SKU_CAP_MIMO_DISABLE = BIT(5), 73 }; 74 75 /* 76 * These are the channel numbers in the order that they are stored in the NVM 77 */ 78 static const u16 iwl_nvm_channels[] = { 79 /* 2.4 GHz */ 80 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 81 /* 5 GHz */ 82 36, 40, 44, 48, 52, 56, 60, 64, 83 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144, 84 149, 153, 157, 161, 165 85 }; 86 87 static const u16 iwl_ext_nvm_channels[] = { 88 /* 2.4 GHz */ 89 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 90 /* 5 GHz */ 91 36, 40, 44, 48, 52, 56, 60, 64, 68, 72, 76, 80, 84, 88, 92, 92 96, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144, 93 149, 153, 157, 161, 165, 169, 173, 177, 181 94 }; 95 96 static const u16 iwl_uhb_nvm_channels[] = { 97 /* 2.4 GHz */ 98 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 99 /* 5 GHz */ 100 36, 40, 44, 48, 52, 56, 60, 64, 68, 72, 76, 80, 84, 88, 92, 101 96, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144, 102 149, 153, 157, 161, 165, 169, 173, 177, 181, 103 /* 6-7 GHz */ 104 1, 5, 9, 13, 17, 21, 25, 29, 33, 37, 41, 45, 49, 53, 57, 61, 65, 69, 105 73, 77, 81, 85, 89, 93, 97, 101, 105, 109, 113, 117, 121, 125, 129, 106 133, 137, 141, 145, 149, 153, 157, 161, 165, 169, 173, 177, 181, 185, 107 189, 193, 197, 201, 205, 209, 213, 217, 221, 225, 229, 233 108 }; 109 110 #define IWL_NVM_NUM_CHANNELS ARRAY_SIZE(iwl_nvm_channels) 111 #define IWL_NVM_NUM_CHANNELS_EXT ARRAY_SIZE(iwl_ext_nvm_channels) 112 #define IWL_NVM_NUM_CHANNELS_UHB ARRAY_SIZE(iwl_uhb_nvm_channels) 113 #define NUM_2GHZ_CHANNELS 14 114 #define NUM_5GHZ_CHANNELS 37 115 #define FIRST_2GHZ_HT_MINUS 5 116 #define LAST_2GHZ_HT_PLUS 9 117 #define N_HW_ADDR_MASK 0xF 118 119 /* rate data (static) */ 120 static struct ieee80211_rate iwl_cfg80211_rates[] = { 121 { .bitrate = 1 * 10, .hw_value = 0, .hw_value_short = 0, }, 122 { .bitrate = 2 * 10, .hw_value = 1, .hw_value_short = 1, 123 .flags = IEEE80211_RATE_SHORT_PREAMBLE, }, 124 { .bitrate = 5.5 * 10, .hw_value = 2, .hw_value_short = 2, 125 .flags = IEEE80211_RATE_SHORT_PREAMBLE, }, 126 { .bitrate = 11 * 10, .hw_value = 3, .hw_value_short = 3, 127 .flags = IEEE80211_RATE_SHORT_PREAMBLE, }, 128 { .bitrate = 6 * 10, .hw_value = 4, .hw_value_short = 4, }, 129 { .bitrate = 9 * 10, .hw_value = 5, .hw_value_short = 5, }, 130 { .bitrate = 12 * 10, .hw_value = 6, .hw_value_short = 6, }, 131 { .bitrate = 18 * 10, .hw_value = 7, .hw_value_short = 7, }, 132 { .bitrate = 24 * 10, .hw_value = 8, .hw_value_short = 8, }, 133 { .bitrate = 36 * 10, .hw_value = 9, .hw_value_short = 9, }, 134 { .bitrate = 48 * 10, .hw_value = 10, .hw_value_short = 10, }, 135 { .bitrate = 54 * 10, .hw_value = 11, .hw_value_short = 11, }, 136 }; 137 #define RATES_24_OFFS 0 138 #define N_RATES_24 ARRAY_SIZE(iwl_cfg80211_rates) 139 #define RATES_52_OFFS 4 140 #define N_RATES_52 (N_RATES_24 - RATES_52_OFFS) 141 142 /** 143 * enum iwl_reg_capa_flags_v1 - global flags applied for the whole regulatory 144 * domain. 145 * @REG_CAPA_V1_BF_CCD_LOW_BAND: Beam-forming or Cyclic Delay Diversity in the 146 * 2.4Ghz band is allowed. 147 * @REG_CAPA_V1_BF_CCD_HIGH_BAND: Beam-forming or Cyclic Delay Diversity in the 148 * 5Ghz band is allowed. 149 * @REG_CAPA_V1_160MHZ_ALLOWED: 11ac channel with a width of 160Mhz is allowed 150 * for this regulatory domain (valid only in 5Ghz). 151 * @REG_CAPA_V1_80MHZ_ALLOWED: 11ac channel with a width of 80Mhz is allowed 152 * for this regulatory domain (valid only in 5Ghz). 153 * @REG_CAPA_V1_MCS_8_ALLOWED: 11ac with MCS 8 is allowed. 154 * @REG_CAPA_V1_MCS_9_ALLOWED: 11ac with MCS 9 is allowed. 155 * @REG_CAPA_V1_40MHZ_FORBIDDEN: 11n channel with a width of 40Mhz is forbidden 156 * for this regulatory domain (valid only in 5Ghz). 157 * @REG_CAPA_V1_DC_HIGH_ENABLED: DC HIGH allowed. 158 * @REG_CAPA_V1_11AX_DISABLED: 11ax is forbidden for this regulatory domain. 159 */ 160 enum iwl_reg_capa_flags_v1 { 161 REG_CAPA_V1_BF_CCD_LOW_BAND = BIT(0), 162 REG_CAPA_V1_BF_CCD_HIGH_BAND = BIT(1), 163 REG_CAPA_V1_160MHZ_ALLOWED = BIT(2), 164 REG_CAPA_V1_80MHZ_ALLOWED = BIT(3), 165 REG_CAPA_V1_MCS_8_ALLOWED = BIT(4), 166 REG_CAPA_V1_MCS_9_ALLOWED = BIT(5), 167 REG_CAPA_V1_40MHZ_FORBIDDEN = BIT(7), 168 REG_CAPA_V1_DC_HIGH_ENABLED = BIT(9), 169 REG_CAPA_V1_11AX_DISABLED = BIT(10), 170 }; /* GEO_CHANNEL_CAPABILITIES_API_S_VER_1 */ 171 172 /** 173 * enum iwl_reg_capa_flags_v2 - global flags applied for the whole regulatory 174 * domain (version 2). 175 * @REG_CAPA_V2_STRADDLE_DISABLED: Straddle channels (144, 142, 138) are 176 * disabled. 177 * @REG_CAPA_V2_BF_CCD_LOW_BAND: Beam-forming or Cyclic Delay Diversity in the 178 * 2.4Ghz band is allowed. 179 * @REG_CAPA_V2_BF_CCD_HIGH_BAND: Beam-forming or Cyclic Delay Diversity in the 180 * 5Ghz band is allowed. 181 * @REG_CAPA_V2_160MHZ_ALLOWED: 11ac channel with a width of 160Mhz is allowed 182 * for this regulatory domain (valid only in 5Ghz). 183 * @REG_CAPA_V2_80MHZ_ALLOWED: 11ac channel with a width of 80Mhz is allowed 184 * for this regulatory domain (valid only in 5Ghz). 185 * @REG_CAPA_V2_MCS_8_ALLOWED: 11ac with MCS 8 is allowed. 186 * @REG_CAPA_V2_MCS_9_ALLOWED: 11ac with MCS 9 is allowed. 187 * @REG_CAPA_V2_WEATHER_DISABLED: Weather radar channels (120, 124, 128, 118, 188 * 126, 122) are disabled. 189 * @REG_CAPA_V2_40MHZ_ALLOWED: 11n channel with a width of 40Mhz is allowed 190 * for this regulatory domain (uvalid only in 5Ghz). 191 * @REG_CAPA_V2_11AX_DISABLED: 11ax is forbidden for this regulatory domain. 192 */ 193 enum iwl_reg_capa_flags_v2 { 194 REG_CAPA_V2_STRADDLE_DISABLED = BIT(0), 195 REG_CAPA_V2_BF_CCD_LOW_BAND = BIT(1), 196 REG_CAPA_V2_BF_CCD_HIGH_BAND = BIT(2), 197 REG_CAPA_V2_160MHZ_ALLOWED = BIT(3), 198 REG_CAPA_V2_80MHZ_ALLOWED = BIT(4), 199 REG_CAPA_V2_MCS_8_ALLOWED = BIT(5), 200 REG_CAPA_V2_MCS_9_ALLOWED = BIT(6), 201 REG_CAPA_V2_WEATHER_DISABLED = BIT(7), 202 REG_CAPA_V2_40MHZ_ALLOWED = BIT(8), 203 REG_CAPA_V2_11AX_DISABLED = BIT(10), 204 }; /* GEO_CHANNEL_CAPABILITIES_API_S_VER_2 */ 205 206 /** 207 * enum iwl_reg_capa_flags_v4 - global flags applied for the whole regulatory 208 * domain. 209 * @REG_CAPA_V4_160MHZ_ALLOWED: 11ac channel with a width of 160Mhz is allowed 210 * for this regulatory domain (valid only in 5Ghz). 211 * @REG_CAPA_V4_80MHZ_ALLOWED: 11ac channel with a width of 80Mhz is allowed 212 * for this regulatory domain (valid only in 5Ghz). 213 * @REG_CAPA_V4_MCS_12_ALLOWED: 11ac with MCS 12 is allowed. 214 * @REG_CAPA_V4_MCS_13_ALLOWED: 11ac with MCS 13 is allowed. 215 * @REG_CAPA_V4_11BE_DISABLED: 11be is forbidden for this regulatory domain. 216 * @REG_CAPA_V4_11AX_DISABLED: 11ax is forbidden for this regulatory domain. 217 * @REG_CAPA_V4_320MHZ_ALLOWED: 11be channel with a width of 320Mhz is allowed 218 * for this regulatory domain (valid only in 5GHz). 219 */ 220 enum iwl_reg_capa_flags_v4 { 221 REG_CAPA_V4_160MHZ_ALLOWED = BIT(3), 222 REG_CAPA_V4_80MHZ_ALLOWED = BIT(4), 223 REG_CAPA_V4_MCS_12_ALLOWED = BIT(5), 224 REG_CAPA_V4_MCS_13_ALLOWED = BIT(6), 225 REG_CAPA_V4_11BE_DISABLED = BIT(8), 226 REG_CAPA_V4_11AX_DISABLED = BIT(13), 227 REG_CAPA_V4_320MHZ_ALLOWED = BIT(16), 228 }; /* GEO_CHANNEL_CAPABILITIES_API_S_VER_4 */ 229 230 /* 231 * API v2 for reg_capa_flags is relevant from version 6 and onwards of the 232 * MCC update command response. 233 */ 234 #define REG_CAPA_V2_RESP_VER 6 235 236 /* API v4 for reg_capa_flags is relevant from version 8 and onwards of the 237 * MCC update command response. 238 */ 239 #define REG_CAPA_V4_RESP_VER 8 240 241 static inline void iwl_nvm_print_channel_flags(struct device *dev, u32 level, 242 int chan, u32 flags) 243 { 244 #define CHECK_AND_PRINT_I(x) \ 245 ((flags & NVM_CHANNEL_##x) ? " " #x : "") 246 247 if (!(flags & NVM_CHANNEL_VALID)) { 248 IWL_DEBUG_DEV(dev, level, "Ch. %d: 0x%x: No traffic\n", 249 chan, flags); 250 return; 251 } 252 253 /* Note: already can print up to 101 characters, 110 is the limit! */ 254 IWL_DEBUG_DEV(dev, level, 255 "Ch. %d: 0x%x:%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n", 256 chan, flags, 257 CHECK_AND_PRINT_I(VALID), 258 CHECK_AND_PRINT_I(IBSS), 259 CHECK_AND_PRINT_I(ACTIVE), 260 CHECK_AND_PRINT_I(RADAR), 261 CHECK_AND_PRINT_I(INDOOR_ONLY), 262 CHECK_AND_PRINT_I(GO_CONCURRENT), 263 CHECK_AND_PRINT_I(UNIFORM), 264 CHECK_AND_PRINT_I(20MHZ), 265 CHECK_AND_PRINT_I(40MHZ), 266 CHECK_AND_PRINT_I(80MHZ), 267 CHECK_AND_PRINT_I(160MHZ), 268 CHECK_AND_PRINT_I(DC_HIGH), 269 CHECK_AND_PRINT_I(VLP), 270 CHECK_AND_PRINT_I(AFC)); 271 #undef CHECK_AND_PRINT_I 272 } 273 274 static u32 iwl_get_channel_flags(u8 ch_num, int ch_idx, enum nl80211_band band, 275 u32 nvm_flags, const struct iwl_rf_cfg *cfg) 276 { 277 u32 flags = IEEE80211_CHAN_NO_HT40; 278 279 if (band == NL80211_BAND_2GHZ && (nvm_flags & NVM_CHANNEL_40MHZ)) { 280 if (ch_num <= LAST_2GHZ_HT_PLUS) 281 flags &= ~IEEE80211_CHAN_NO_HT40PLUS; 282 if (ch_num >= FIRST_2GHZ_HT_MINUS) 283 flags &= ~IEEE80211_CHAN_NO_HT40MINUS; 284 } else if (nvm_flags & NVM_CHANNEL_40MHZ) { 285 if ((ch_idx - NUM_2GHZ_CHANNELS) % 2 == 0) 286 flags &= ~IEEE80211_CHAN_NO_HT40PLUS; 287 else 288 flags &= ~IEEE80211_CHAN_NO_HT40MINUS; 289 } 290 if (!(nvm_flags & NVM_CHANNEL_80MHZ)) 291 flags |= IEEE80211_CHAN_NO_80MHZ; 292 if (!(nvm_flags & NVM_CHANNEL_160MHZ)) 293 flags |= IEEE80211_CHAN_NO_160MHZ; 294 295 if (!(nvm_flags & NVM_CHANNEL_IBSS)) 296 flags |= IEEE80211_CHAN_NO_IR; 297 298 if (!(nvm_flags & NVM_CHANNEL_ACTIVE)) 299 flags |= IEEE80211_CHAN_NO_IR; 300 301 if (nvm_flags & NVM_CHANNEL_RADAR) 302 flags |= IEEE80211_CHAN_RADAR; 303 304 if (nvm_flags & NVM_CHANNEL_INDOOR_ONLY) 305 flags |= IEEE80211_CHAN_INDOOR_ONLY; 306 307 /* Set the GO concurrent flag only in case that NO_IR is set. 308 * Otherwise it is meaningless 309 */ 310 if ((nvm_flags & NVM_CHANNEL_GO_CONCURRENT) && 311 (flags & IEEE80211_CHAN_NO_IR)) 312 flags |= IEEE80211_CHAN_IR_CONCURRENT; 313 314 /* Set the AP type for the UHB case. */ 315 if (nvm_flags & NVM_CHANNEL_VLP) 316 flags |= IEEE80211_CHAN_ALLOW_6GHZ_VLP_AP; 317 else 318 flags |= IEEE80211_CHAN_NO_6GHZ_VLP_CLIENT; 319 if (!(nvm_flags & NVM_CHANNEL_AFC)) 320 flags |= IEEE80211_CHAN_NO_6GHZ_AFC_CLIENT; 321 322 return flags; 323 } 324 325 static enum nl80211_band iwl_nl80211_band_from_channel_idx(int ch_idx) 326 { 327 if (ch_idx >= NUM_2GHZ_CHANNELS + NUM_5GHZ_CHANNELS) { 328 return NL80211_BAND_6GHZ; 329 } 330 331 if (ch_idx >= NUM_2GHZ_CHANNELS) 332 return NL80211_BAND_5GHZ; 333 return NL80211_BAND_2GHZ; 334 } 335 336 static int iwl_init_channel_map(struct iwl_trans *trans, 337 const struct iwl_fw *fw, 338 struct iwl_nvm_data *data, 339 const void * const nvm_ch_flags, 340 u32 sbands_flags, bool v4) 341 { 342 const struct iwl_rf_cfg *cfg = trans->cfg; 343 struct device *dev = trans->dev; 344 int ch_idx; 345 int n_channels = 0; 346 struct ieee80211_channel *channel; 347 u32 ch_flags; 348 int num_of_ch; 349 const u16 *nvm_chan; 350 351 if (cfg->uhb_supported) { 352 num_of_ch = IWL_NVM_NUM_CHANNELS_UHB; 353 nvm_chan = iwl_uhb_nvm_channels; 354 } else if (cfg->nvm_type == IWL_NVM_EXT) { 355 num_of_ch = IWL_NVM_NUM_CHANNELS_EXT; 356 nvm_chan = iwl_ext_nvm_channels; 357 } else { 358 num_of_ch = IWL_NVM_NUM_CHANNELS; 359 nvm_chan = iwl_nvm_channels; 360 } 361 362 for (ch_idx = 0; ch_idx < num_of_ch; ch_idx++) { 363 enum nl80211_band band = 364 iwl_nl80211_band_from_channel_idx(ch_idx); 365 366 if (v4) 367 ch_flags = 368 __le32_to_cpup((const __le32 *)nvm_ch_flags + ch_idx); 369 else 370 ch_flags = 371 __le16_to_cpup((const __le16 *)nvm_ch_flags + ch_idx); 372 373 if (band == NL80211_BAND_5GHZ && 374 !data->sku_cap_band_52ghz_enable) 375 continue; 376 377 /* workaround to disable wide channels in 5GHz */ 378 if ((sbands_flags & IWL_NVM_SBANDS_FLAGS_NO_WIDE_IN_5GHZ) && 379 band == NL80211_BAND_5GHZ) { 380 ch_flags &= ~(NVM_CHANNEL_40MHZ | 381 NVM_CHANNEL_80MHZ | 382 NVM_CHANNEL_160MHZ); 383 } 384 385 if (ch_flags & NVM_CHANNEL_160MHZ) 386 data->vht160_supported = true; 387 388 if (!(sbands_flags & IWL_NVM_SBANDS_FLAGS_LAR) && 389 !(ch_flags & NVM_CHANNEL_VALID)) { 390 /* 391 * Channels might become valid later if lar is 392 * supported, hence we still want to add them to 393 * the list of supported channels to cfg80211. 394 */ 395 iwl_nvm_print_channel_flags(dev, IWL_DL_EEPROM, 396 nvm_chan[ch_idx], ch_flags); 397 continue; 398 } 399 400 channel = &data->channels[n_channels]; 401 n_channels++; 402 403 channel->hw_value = nvm_chan[ch_idx]; 404 channel->band = band; 405 channel->center_freq = 406 ieee80211_channel_to_frequency( 407 channel->hw_value, channel->band); 408 409 /* Initialize regulatory-based run-time data */ 410 411 /* 412 * Default value - highest tx power value. max_power 413 * is not used in mvm, and is used for backwards compatibility 414 */ 415 channel->max_power = IWL_DEFAULT_MAX_TX_POWER; 416 417 /* don't put limitations in case we're using LAR */ 418 if (!(sbands_flags & IWL_NVM_SBANDS_FLAGS_LAR)) 419 channel->flags = iwl_get_channel_flags(nvm_chan[ch_idx], 420 ch_idx, band, 421 ch_flags, cfg); 422 else 423 channel->flags = 0; 424 425 if (fw_has_capa(&fw->ucode_capa, 426 IWL_UCODE_TLV_CAPA_MONITOR_PASSIVE_CHANS)) 427 channel->flags |= IEEE80211_CHAN_CAN_MONITOR; 428 429 iwl_nvm_print_channel_flags(dev, IWL_DL_EEPROM, 430 channel->hw_value, ch_flags); 431 IWL_DEBUG_EEPROM(dev, "Ch. %d: %ddBm\n", 432 channel->hw_value, channel->max_power); 433 } 434 435 return n_channels; 436 } 437 438 static void iwl_init_vht_hw_capab(struct iwl_trans *trans, 439 struct iwl_nvm_data *data, 440 struct ieee80211_sta_vht_cap *vht_cap, 441 u8 tx_chains, u8 rx_chains) 442 { 443 const struct iwl_rf_cfg *cfg = trans->cfg; 444 int num_rx_ants = num_of_ant(rx_chains); 445 int num_tx_ants = num_of_ant(tx_chains); 446 447 vht_cap->vht_supported = true; 448 449 vht_cap->cap = IEEE80211_VHT_CAP_SHORT_GI_80 | 450 IEEE80211_VHT_CAP_RXSTBC_1 | 451 IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE | 452 3 << IEEE80211_VHT_CAP_BEAMFORMEE_STS_SHIFT | 453 IEEE80211_VHT_MAX_AMPDU_1024K << 454 IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_SHIFT; 455 456 if (!trans->cfg->ht_params.stbc) 457 vht_cap->cap &= ~IEEE80211_VHT_CAP_RXSTBC_MASK; 458 459 if (data->vht160_supported) 460 vht_cap->cap |= IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160MHZ | 461 IEEE80211_VHT_CAP_SHORT_GI_160; 462 463 if (cfg->vht_mu_mimo_supported) 464 vht_cap->cap |= IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE; 465 466 if (cfg->ht_params.ldpc) 467 vht_cap->cap |= IEEE80211_VHT_CAP_RXLDPC; 468 469 if (data->sku_cap_mimo_disabled) { 470 num_rx_ants = 1; 471 num_tx_ants = 1; 472 } 473 474 if (trans->cfg->ht_params.stbc && num_tx_ants > 1) 475 vht_cap->cap |= IEEE80211_VHT_CAP_TXSTBC; 476 else 477 vht_cap->cap |= IEEE80211_VHT_CAP_TX_ANTENNA_PATTERN; 478 479 /* 480 * With fips_enabled crypto is done by software, so the HW cannot 481 * split up A-MSDUs and the real limit that was set applies. 482 * Note that EHT doesn't honour this (HE copies the VHT value), 483 * but EHT is also entirely disabled for fips_enabled. 484 */ 485 switch (iwlwifi_mod_params.amsdu_size) { 486 case IWL_AMSDU_DEF: 487 if (trans->mac_cfg->mq_rx_supported && !fips_enabled) 488 vht_cap->cap |= 489 IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454; 490 else 491 vht_cap->cap |= IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_3895; 492 break; 493 case IWL_AMSDU_2K: 494 if (trans->mac_cfg->mq_rx_supported && !fips_enabled) 495 vht_cap->cap |= 496 IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454; 497 else 498 WARN(1, "RB size of 2K is not supported by this device\n"); 499 break; 500 case IWL_AMSDU_4K: 501 vht_cap->cap |= IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_3895; 502 break; 503 case IWL_AMSDU_8K: 504 vht_cap->cap |= IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_7991; 505 break; 506 case IWL_AMSDU_12K: 507 vht_cap->cap |= IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454; 508 break; 509 default: 510 break; 511 } 512 513 vht_cap->vht_mcs.rx_mcs_map = 514 cpu_to_le16(IEEE80211_VHT_MCS_SUPPORT_0_9 << 0 | 515 IEEE80211_VHT_MCS_SUPPORT_0_9 << 2 | 516 IEEE80211_VHT_MCS_NOT_SUPPORTED << 4 | 517 IEEE80211_VHT_MCS_NOT_SUPPORTED << 6 | 518 IEEE80211_VHT_MCS_NOT_SUPPORTED << 8 | 519 IEEE80211_VHT_MCS_NOT_SUPPORTED << 10 | 520 IEEE80211_VHT_MCS_NOT_SUPPORTED << 12 | 521 IEEE80211_VHT_MCS_NOT_SUPPORTED << 14); 522 523 if (num_rx_ants == 1 || cfg->rx_with_siso_diversity) { 524 vht_cap->cap |= IEEE80211_VHT_CAP_RX_ANTENNA_PATTERN; 525 /* this works because NOT_SUPPORTED == 3 */ 526 vht_cap->vht_mcs.rx_mcs_map |= 527 cpu_to_le16(IEEE80211_VHT_MCS_NOT_SUPPORTED << 2); 528 } 529 530 vht_cap->vht_mcs.tx_mcs_map = vht_cap->vht_mcs.rx_mcs_map; 531 532 vht_cap->vht_mcs.tx_highest |= 533 cpu_to_le16(IEEE80211_VHT_EXT_NSS_BW_CAPABLE); 534 } 535 536 static const u8 iwl_vendor_caps[] = { 537 0xdd, /* vendor element */ 538 0x06, /* length */ 539 0x00, 0x17, 0x35, /* Intel OUI */ 540 0x08, /* type (Intel Capabilities) */ 541 /* followed by 16 bits of capabilities */ 542 #define IWL_VENDOR_CAP_IMPROVED_BF_FDBK_HE BIT(0) 543 IWL_VENDOR_CAP_IMPROVED_BF_FDBK_HE, 544 0x00 545 }; 546 547 static const struct ieee80211_sband_iftype_data iwl_he_eht_capa[] = { 548 { 549 .types_mask = BIT(NL80211_IFTYPE_STATION) | 550 BIT(NL80211_IFTYPE_P2P_CLIENT), 551 .he_cap = { 552 .has_he = true, 553 .he_cap_elem = { 554 .mac_cap_info[0] = 555 IEEE80211_HE_MAC_CAP0_HTC_HE, 556 .mac_cap_info[1] = 557 IEEE80211_HE_MAC_CAP1_TF_MAC_PAD_DUR_16US | 558 IEEE80211_HE_MAC_CAP1_MULTI_TID_AGG_RX_QOS_8, 559 .mac_cap_info[2] = 560 IEEE80211_HE_MAC_CAP2_32BIT_BA_BITMAP, 561 .mac_cap_info[3] = 562 IEEE80211_HE_MAC_CAP3_OMI_CONTROL | 563 IEEE80211_HE_MAC_CAP3_RX_CTRL_FRAME_TO_MULTIBSS, 564 .mac_cap_info[4] = 565 IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU | 566 IEEE80211_HE_MAC_CAP4_MULTI_TID_AGG_TX_QOS_B39, 567 .mac_cap_info[5] = 568 IEEE80211_HE_MAC_CAP5_MULTI_TID_AGG_TX_QOS_B40 | 569 IEEE80211_HE_MAC_CAP5_MULTI_TID_AGG_TX_QOS_B41 | 570 IEEE80211_HE_MAC_CAP5_UL_2x996_TONE_RU | 571 IEEE80211_HE_MAC_CAP5_HE_DYNAMIC_SM_PS | 572 IEEE80211_HE_MAC_CAP5_HT_VHT_TRIG_FRAME_RX, 573 .phy_cap_info[1] = 574 IEEE80211_HE_PHY_CAP1_PREAMBLE_PUNC_RX_MASK | 575 IEEE80211_HE_PHY_CAP1_DEVICE_CLASS_A | 576 IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD, 577 .phy_cap_info[2] = 578 IEEE80211_HE_PHY_CAP2_NDP_4x_LTF_AND_3_2US | 579 IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ, 580 .phy_cap_info[3] = 581 IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_TX_BPSK | 582 IEEE80211_HE_PHY_CAP3_DCM_MAX_TX_NSS_1 | 583 IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_BPSK | 584 IEEE80211_HE_PHY_CAP3_DCM_MAX_RX_NSS_1, 585 .phy_cap_info[4] = 586 IEEE80211_HE_PHY_CAP4_SU_BEAMFORMEE | 587 IEEE80211_HE_PHY_CAP4_BEAMFORMEE_MAX_STS_ABOVE_80MHZ_8 | 588 IEEE80211_HE_PHY_CAP4_BEAMFORMEE_MAX_STS_UNDER_80MHZ_8, 589 .phy_cap_info[6] = 590 IEEE80211_HE_PHY_CAP6_TRIG_SU_BEAMFORMING_FB | 591 IEEE80211_HE_PHY_CAP6_TRIG_MU_BEAMFORMING_PARTIAL_BW_FB | 592 IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT, 593 .phy_cap_info[7] = 594 IEEE80211_HE_PHY_CAP7_POWER_BOOST_FACTOR_SUPP | 595 IEEE80211_HE_PHY_CAP7_HE_SU_MU_PPDU_4XLTF_AND_08_US_GI, 596 .phy_cap_info[8] = 597 IEEE80211_HE_PHY_CAP8_HE_ER_SU_PPDU_4XLTF_AND_08_US_GI | 598 IEEE80211_HE_PHY_CAP8_20MHZ_IN_40MHZ_HE_PPDU_IN_2G | 599 IEEE80211_HE_PHY_CAP8_20MHZ_IN_160MHZ_HE_PPDU | 600 IEEE80211_HE_PHY_CAP8_80MHZ_IN_160MHZ_HE_PPDU | 601 IEEE80211_HE_PHY_CAP8_DCM_MAX_RU_242, 602 .phy_cap_info[9] = 603 IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_COMP_SIGB | 604 IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_NON_COMP_SIGB | 605 IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU | 606 IEEE80211_HE_PHY_CAP9_RX_1024_QAM_LESS_THAN_242_TONE_RU | 607 (IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_RESERVED << 608 IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_POS), 609 .phy_cap_info[10] = 610 IEEE80211_HE_PHY_CAP10_HE_MU_M1RU_MAX_LTF, 611 }, 612 /* 613 * Set default Tx/Rx HE MCS NSS Support field. 614 * Indicate support for up to 2 spatial streams and all 615 * MCS, without any special cases 616 */ 617 .he_mcs_nss_supp = { 618 .rx_mcs_80 = cpu_to_le16(0xfffa), 619 .tx_mcs_80 = cpu_to_le16(0xfffa), 620 .rx_mcs_160 = cpu_to_le16(0xfffa), 621 .tx_mcs_160 = cpu_to_le16(0xfffa), 622 .rx_mcs_80p80 = cpu_to_le16(0xffff), 623 .tx_mcs_80p80 = cpu_to_le16(0xffff), 624 }, 625 /* 626 * Set default PPE thresholds, with PPET16 set to 0, 627 * PPET8 set to 7 628 */ 629 .ppe_thres = {0x61, 0x1c, 0xc7, 0x71}, 630 }, 631 .eht_cap = { 632 .has_eht = true, 633 .eht_cap_elem = { 634 .mac_cap_info[0] = 635 IEEE80211_EHT_MAC_CAP0_OM_CONTROL, 636 .phy_cap_info[0] = 637 IEEE80211_EHT_PHY_CAP0_242_TONE_RU_GT20MHZ | 638 IEEE80211_EHT_PHY_CAP0_NDP_4_EHT_LFT_32_GI | 639 IEEE80211_EHT_PHY_CAP0_SU_BEAMFORMEE | 640 IEEE80211_EHT_PHY_CAP0_BEAMFORMEE_SS_80MHZ_MASK, 641 .phy_cap_info[1] = 642 IEEE80211_EHT_PHY_CAP1_BEAMFORMEE_SS_80MHZ_MASK | 643 IEEE80211_EHT_PHY_CAP1_BEAMFORMEE_SS_160MHZ_MASK, 644 .phy_cap_info[3] = 645 IEEE80211_EHT_PHY_CAP3_TRIG_SU_BF_FDBK, 646 647 .phy_cap_info[4] = 648 IEEE80211_EHT_PHY_CAP4_EHT_MU_PPDU_4_EHT_LTF_08_GI, 649 .phy_cap_info[5] = 650 FIELD_PREP_CONST(IEEE80211_EHT_PHY_CAP5_COMMON_NOMINAL_PKT_PAD_MASK, 651 IEEE80211_EHT_PHY_CAP5_COMMON_NOMINAL_PKT_PAD_16US) | 652 IEEE80211_EHT_PHY_CAP5_TX_LESS_242_TONE_RU_SUPP | 653 IEEE80211_EHT_PHY_CAP5_RX_LESS_242_TONE_RU_SUPP | 654 IEEE80211_EHT_PHY_CAP5_SUPP_EXTRA_EHT_LTF, 655 .phy_cap_info[8] = 656 IEEE80211_EHT_PHY_CAP8_RX_1024QAM_WIDER_BW_DL_OFDMA | 657 IEEE80211_EHT_PHY_CAP8_RX_4096QAM_WIDER_BW_DL_OFDMA, 658 }, 659 660 /* For all MCS and bandwidth, set 2 NSS for both Tx and 661 * Rx - note we don't set the only_20mhz, but due to this 662 * being a union, it gets set correctly anyway. 663 */ 664 .eht_mcs_nss_supp = { 665 .bw._80 = { 666 .rx_tx_mcs9_max_nss = 0x22, 667 .rx_tx_mcs11_max_nss = 0x22, 668 .rx_tx_mcs13_max_nss = 0x22, 669 }, 670 .bw._160 = { 671 .rx_tx_mcs9_max_nss = 0x22, 672 .rx_tx_mcs11_max_nss = 0x22, 673 .rx_tx_mcs13_max_nss = 0x22, 674 }, 675 .bw._320 = { 676 .rx_tx_mcs9_max_nss = 0x22, 677 .rx_tx_mcs11_max_nss = 0x22, 678 .rx_tx_mcs13_max_nss = 0x22, 679 }, 680 }, 681 682 /* 683 * PPE thresholds for NSS = 2, and RU index bitmap set 684 * to 0xc. 685 * Note: just for stating what we want, not present in 686 * the transmitted data due to not including 687 * IEEE80211_EHT_PHY_CAP5_PPE_THRESHOLD_PRESENT. 688 */ 689 .eht_ppe_thres = {0xc1, 0x0e, 0xe0 } 690 }, 691 }, 692 { 693 .types_mask = BIT(NL80211_IFTYPE_AP) | 694 BIT(NL80211_IFTYPE_P2P_GO), 695 .he_cap = { 696 .has_he = true, 697 .he_cap_elem = { 698 .mac_cap_info[0] = 699 IEEE80211_HE_MAC_CAP0_HTC_HE, 700 .mac_cap_info[1] = 701 IEEE80211_HE_MAC_CAP1_MULTI_TID_AGG_RX_QOS_8, 702 .mac_cap_info[3] = 703 IEEE80211_HE_MAC_CAP3_OMI_CONTROL, 704 .phy_cap_info[1] = 705 IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD, 706 .phy_cap_info[2] = 707 IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ | 708 IEEE80211_HE_PHY_CAP2_NDP_4x_LTF_AND_3_2US, 709 .phy_cap_info[3] = 710 IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_TX_BPSK | 711 IEEE80211_HE_PHY_CAP3_DCM_MAX_TX_NSS_1 | 712 IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_BPSK | 713 IEEE80211_HE_PHY_CAP3_DCM_MAX_RX_NSS_1, 714 .phy_cap_info[6] = 715 IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT, 716 .phy_cap_info[7] = 717 IEEE80211_HE_PHY_CAP7_HE_SU_MU_PPDU_4XLTF_AND_08_US_GI, 718 .phy_cap_info[8] = 719 IEEE80211_HE_PHY_CAP8_HE_ER_SU_PPDU_4XLTF_AND_08_US_GI | 720 IEEE80211_HE_PHY_CAP8_DCM_MAX_RU_242, 721 .phy_cap_info[9] = 722 IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU | 723 IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_RESERVED 724 << IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_POS, 725 }, 726 /* 727 * Set default Tx/Rx HE MCS NSS Support field. 728 * Indicate support for up to 2 spatial streams and all 729 * MCS, without any special cases 730 */ 731 .he_mcs_nss_supp = { 732 .rx_mcs_80 = cpu_to_le16(0xfffa), 733 .tx_mcs_80 = cpu_to_le16(0xfffa), 734 .rx_mcs_160 = cpu_to_le16(0xfffa), 735 .tx_mcs_160 = cpu_to_le16(0xfffa), 736 .rx_mcs_80p80 = cpu_to_le16(0xffff), 737 .tx_mcs_80p80 = cpu_to_le16(0xffff), 738 }, 739 /* 740 * Set default PPE thresholds, with PPET16 set to 0, 741 * PPET8 set to 7 742 */ 743 .ppe_thres = {0x61, 0x1c, 0xc7, 0x71}, 744 }, 745 .eht_cap = { 746 .has_eht = true, 747 .eht_cap_elem = { 748 .mac_cap_info[0] = 749 IEEE80211_EHT_MAC_CAP0_OM_CONTROL, 750 .phy_cap_info[0] = 751 IEEE80211_EHT_PHY_CAP0_242_TONE_RU_GT20MHZ | 752 IEEE80211_EHT_PHY_CAP0_NDP_4_EHT_LFT_32_GI, 753 .phy_cap_info[5] = 754 FIELD_PREP_CONST(IEEE80211_EHT_PHY_CAP5_COMMON_NOMINAL_PKT_PAD_MASK, 755 IEEE80211_EHT_PHY_CAP5_COMMON_NOMINAL_PKT_PAD_16US), 756 }, 757 758 /* For all MCS and bandwidth, set 2 NSS for both Tx and 759 * Rx - note we don't set the only_20mhz, but due to this 760 * being a union, it gets set correctly anyway. 761 */ 762 .eht_mcs_nss_supp = { 763 .bw._80 = { 764 .rx_tx_mcs9_max_nss = 0x22, 765 .rx_tx_mcs11_max_nss = 0x22, 766 .rx_tx_mcs13_max_nss = 0x22, 767 }, 768 .bw._160 = { 769 .rx_tx_mcs9_max_nss = 0x22, 770 .rx_tx_mcs11_max_nss = 0x22, 771 .rx_tx_mcs13_max_nss = 0x22, 772 }, 773 .bw._320 = { 774 .rx_tx_mcs9_max_nss = 0x22, 775 .rx_tx_mcs11_max_nss = 0x22, 776 .rx_tx_mcs13_max_nss = 0x22, 777 }, 778 }, 779 780 /* 781 * PPE thresholds for NSS = 2, and RU index bitmap set 782 * to 0xc. 783 * Note: just for stating what we want, not present in 784 * the transmitted data due to not including 785 * IEEE80211_EHT_PHY_CAP5_PPE_THRESHOLD_PRESENT. 786 */ 787 .eht_ppe_thres = {0xc1, 0x0e, 0xe0 } 788 }, 789 }, 790 }; 791 792 static void iwl_init_he_6ghz_capa(struct iwl_trans *trans, 793 struct iwl_nvm_data *data, 794 struct ieee80211_supported_band *sband, 795 u8 tx_chains, u8 rx_chains) 796 { 797 struct ieee80211_sta_ht_cap ht_cap; 798 struct ieee80211_sta_vht_cap vht_cap = {}; 799 struct ieee80211_sband_iftype_data *iftype_data; 800 u16 he_6ghz_capa = 0; 801 u32 exp; 802 int i; 803 804 if (sband->band != NL80211_BAND_6GHZ) 805 return; 806 807 /* grab HT/VHT capabilities and calculate HE 6 GHz capabilities */ 808 iwl_init_ht_hw_capab(trans, data, &ht_cap, NL80211_BAND_5GHZ, 809 tx_chains, rx_chains); 810 WARN_ON(!ht_cap.ht_supported); 811 iwl_init_vht_hw_capab(trans, data, &vht_cap, tx_chains, rx_chains); 812 WARN_ON(!vht_cap.vht_supported); 813 814 he_6ghz_capa |= 815 u16_encode_bits(ht_cap.ampdu_density, 816 IEEE80211_HE_6GHZ_CAP_MIN_MPDU_START); 817 exp = u32_get_bits(vht_cap.cap, 818 IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK); 819 he_6ghz_capa |= 820 u16_encode_bits(exp, IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP); 821 exp = u32_get_bits(vht_cap.cap, IEEE80211_VHT_CAP_MAX_MPDU_MASK); 822 he_6ghz_capa |= 823 u16_encode_bits(exp, IEEE80211_HE_6GHZ_CAP_MAX_MPDU_LEN); 824 /* we don't support extended_ht_cap_info anywhere, so no RD_RESPONDER */ 825 if (vht_cap.cap & IEEE80211_VHT_CAP_TX_ANTENNA_PATTERN) 826 he_6ghz_capa |= IEEE80211_HE_6GHZ_CAP_TX_ANTPAT_CONS; 827 if (vht_cap.cap & IEEE80211_VHT_CAP_RX_ANTENNA_PATTERN) 828 he_6ghz_capa |= IEEE80211_HE_6GHZ_CAP_RX_ANTPAT_CONS; 829 830 IWL_DEBUG_EEPROM(trans->dev, "he_6ghz_capa=0x%x\n", he_6ghz_capa); 831 832 /* we know it's writable - we set it before ourselves */ 833 iftype_data = (void *)(uintptr_t)sband->iftype_data; 834 for (i = 0; i < sband->n_iftype_data; i++) 835 iftype_data[i].he_6ghz_capa.capa = cpu_to_le16(he_6ghz_capa); 836 } 837 838 static void 839 iwl_nvm_fixup_sband_iftd(struct iwl_trans *trans, 840 struct iwl_nvm_data *data, 841 struct ieee80211_supported_band *sband, 842 struct ieee80211_sband_iftype_data *iftype_data, 843 u8 tx_chains, u8 rx_chains, 844 const struct iwl_fw *fw) 845 { 846 bool is_ap = iftype_data->types_mask & (BIT(NL80211_IFTYPE_AP) | 847 BIT(NL80211_IFTYPE_P2P_GO)); 848 bool slow_pcie = (!trans->mac_cfg->integrated && 849 trans->info.pcie_link_speed < PCI_EXP_LNKSTA_CLS_8_0GB); 850 851 /* EHT needs WPA3/MFP so cannot do it for fips_enabled */ 852 if (!data->sku_cap_11be_enable || iwlwifi_mod_params.disable_11be || 853 fips_enabled) 854 iftype_data->eht_cap.has_eht = false; 855 856 /* Advertise an A-MPDU exponent extension based on 857 * operating band 858 */ 859 if (sband->band == NL80211_BAND_6GHZ && iftype_data->eht_cap.has_eht) 860 iftype_data->he_cap.he_cap_elem.mac_cap_info[3] |= 861 IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_EXT_2; 862 else if (sband->band != NL80211_BAND_2GHZ) 863 iftype_data->he_cap.he_cap_elem.mac_cap_info[3] |= 864 IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_EXT_1; 865 else 866 iftype_data->he_cap.he_cap_elem.mac_cap_info[3] |= 867 IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_EXT_3; 868 869 switch (sband->band) { 870 case NL80211_BAND_2GHZ: 871 iftype_data->he_cap.he_cap_elem.phy_cap_info[0] |= 872 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_IN_2G; 873 iftype_data->eht_cap.eht_cap_elem.mac_cap_info[0] |= 874 u8_encode_bits(IEEE80211_EHT_MAC_CAP0_MAX_MPDU_LEN_11454, 875 IEEE80211_EHT_MAC_CAP0_MAX_MPDU_LEN_MASK); 876 break; 877 case NL80211_BAND_6GHZ: 878 if (!trans->reduced_cap_sku && 879 (!trans->cfg->bw_limit || trans->cfg->bw_limit >= 320)) { 880 iftype_data->eht_cap.eht_cap_elem.phy_cap_info[0] |= 881 IEEE80211_EHT_PHY_CAP0_320MHZ_IN_6GHZ; 882 iftype_data->eht_cap.eht_cap_elem.phy_cap_info[1] |= 883 IEEE80211_EHT_PHY_CAP1_BEAMFORMEE_SS_320MHZ_MASK; 884 } 885 fallthrough; 886 case NL80211_BAND_5GHZ: 887 iftype_data->he_cap.he_cap_elem.phy_cap_info[0] |= 888 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_80MHZ_IN_5G | 889 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G; 890 break; 891 default: 892 WARN_ON(1); 893 break; 894 } 895 896 if ((tx_chains & rx_chains) == ANT_AB) { 897 iftype_data->he_cap.he_cap_elem.phy_cap_info[2] |= 898 IEEE80211_HE_PHY_CAP2_STBC_TX_UNDER_80MHZ; 899 iftype_data->he_cap.he_cap_elem.phy_cap_info[5] |= 900 IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_2 | 901 IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_ABOVE_80MHZ_2; 902 if (!is_ap) { 903 iftype_data->he_cap.he_cap_elem.phy_cap_info[7] |= 904 IEEE80211_HE_PHY_CAP7_MAX_NC_2; 905 906 if (iftype_data->eht_cap.has_eht) { 907 /* 908 * Set the number of sounding dimensions for each 909 * bandwidth to 1 to indicate the maximal supported 910 * value of TXVECTOR parameter NUM_STS of 2 911 */ 912 iftype_data->eht_cap.eht_cap_elem.phy_cap_info[2] |= 0x49; 913 914 /* 915 * Set the MAX NC to 1 to indicate sounding feedback of 916 * 2 supported by the beamfomee. 917 */ 918 iftype_data->eht_cap.eht_cap_elem.phy_cap_info[4] |= 0x10; 919 } 920 } 921 922 if (slow_pcie) { 923 struct ieee80211_eht_mcs_nss_supp *mcs_nss = 924 &iftype_data->eht_cap.eht_mcs_nss_supp; 925 926 mcs_nss->bw._320.rx_tx_mcs11_max_nss = 0; 927 mcs_nss->bw._320.rx_tx_mcs13_max_nss = 0; 928 } 929 } else { 930 struct ieee80211_he_mcs_nss_supp *he_mcs_nss_supp = 931 &iftype_data->he_cap.he_mcs_nss_supp; 932 933 if (iftype_data->eht_cap.has_eht) { 934 struct ieee80211_eht_mcs_nss_supp *mcs_nss = 935 &iftype_data->eht_cap.eht_mcs_nss_supp; 936 937 memset(mcs_nss, 0x11, sizeof(*mcs_nss)); 938 } 939 940 if (!is_ap) { 941 /* If not 2x2, we need to indicate 1x1 in the 942 * Midamble RX Max NSTS - but not for AP mode 943 */ 944 iftype_data->he_cap.he_cap_elem.phy_cap_info[1] &= 945 ~IEEE80211_HE_PHY_CAP1_MIDAMBLE_RX_TX_MAX_NSTS; 946 iftype_data->he_cap.he_cap_elem.phy_cap_info[2] &= 947 ~IEEE80211_HE_PHY_CAP2_MIDAMBLE_RX_TX_MAX_NSTS; 948 iftype_data->he_cap.he_cap_elem.phy_cap_info[7] |= 949 IEEE80211_HE_PHY_CAP7_MAX_NC_1; 950 } 951 952 he_mcs_nss_supp->rx_mcs_80 |= 953 cpu_to_le16(IEEE80211_HE_MCS_NOT_SUPPORTED << 2); 954 he_mcs_nss_supp->tx_mcs_80 |= 955 cpu_to_le16(IEEE80211_HE_MCS_NOT_SUPPORTED << 2); 956 he_mcs_nss_supp->rx_mcs_160 |= 957 cpu_to_le16(IEEE80211_HE_MCS_NOT_SUPPORTED << 2); 958 he_mcs_nss_supp->tx_mcs_160 |= 959 cpu_to_le16(IEEE80211_HE_MCS_NOT_SUPPORTED << 2); 960 he_mcs_nss_supp->rx_mcs_80p80 |= 961 cpu_to_le16(IEEE80211_HE_MCS_NOT_SUPPORTED << 2); 962 he_mcs_nss_supp->tx_mcs_80p80 |= 963 cpu_to_le16(IEEE80211_HE_MCS_NOT_SUPPORTED << 2); 964 } 965 966 /* prior RFs don't have HE, HR RF doesn't have this, later have it */ 967 if (CSR_HW_RFID_TYPE(trans->info.hw_rf_id) == IWL_CFG_RF_TYPE_HR1 || 968 CSR_HW_RFID_TYPE(trans->info.hw_rf_id) == IWL_CFG_RF_TYPE_HR2) 969 iftype_data->he_cap.he_cap_elem.phy_cap_info[9] &= 970 ~(IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU | 971 IEEE80211_HE_PHY_CAP9_RX_1024_QAM_LESS_THAN_242_TONE_RU); 972 973 if (trans->mac_cfg->device_family >= IWL_DEVICE_FAMILY_AX210 && !is_ap) 974 iftype_data->he_cap.he_cap_elem.phy_cap_info[2] |= 975 IEEE80211_HE_PHY_CAP2_UL_MU_FULL_MU_MIMO; 976 977 if (trans->mac_cfg->device_family == IWL_DEVICE_FAMILY_22000 && 978 !is_ap) { 979 iftype_data->vendor_elems.data = iwl_vendor_caps; 980 iftype_data->vendor_elems.len = ARRAY_SIZE(iwl_vendor_caps); 981 } 982 983 if (!trans->cfg->ht_params.stbc) { 984 iftype_data->he_cap.he_cap_elem.phy_cap_info[2] &= 985 ~IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ; 986 iftype_data->he_cap.he_cap_elem.phy_cap_info[7] &= 987 ~IEEE80211_HE_PHY_CAP7_STBC_RX_ABOVE_80MHZ; 988 } 989 990 if (trans->step_urm) { 991 iftype_data->eht_cap.eht_mcs_nss_supp.bw._320.rx_tx_mcs11_max_nss = 0; 992 iftype_data->eht_cap.eht_mcs_nss_supp.bw._320.rx_tx_mcs13_max_nss = 0; 993 } 994 995 if (trans->cfg->bw_limit && trans->cfg->bw_limit < 160) 996 iftype_data->he_cap.he_cap_elem.phy_cap_info[0] &= 997 ~IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G; 998 999 if ((trans->cfg->bw_limit && trans->cfg->bw_limit < 320) || 1000 trans->reduced_cap_sku) { 1001 memset(&iftype_data->eht_cap.eht_mcs_nss_supp.bw._320, 0, 1002 sizeof(iftype_data->eht_cap.eht_mcs_nss_supp.bw._320)); 1003 iftype_data->eht_cap.eht_cap_elem.phy_cap_info[2] &= 1004 ~IEEE80211_EHT_PHY_CAP2_SOUNDING_DIM_320MHZ_MASK; 1005 } 1006 1007 if (trans->reduced_cap_sku) { 1008 iftype_data->eht_cap.eht_mcs_nss_supp.bw._80.rx_tx_mcs13_max_nss = 0; 1009 iftype_data->eht_cap.eht_mcs_nss_supp.bw._160.rx_tx_mcs13_max_nss = 0; 1010 iftype_data->eht_cap.eht_cap_elem.phy_cap_info[8] &= 1011 ~IEEE80211_EHT_PHY_CAP8_RX_4096QAM_WIDER_BW_DL_OFDMA; 1012 } 1013 } 1014 1015 static void iwl_init_he_hw_capab(struct iwl_trans *trans, 1016 struct iwl_nvm_data *data, 1017 struct ieee80211_supported_band *sband, 1018 u8 tx_chains, u8 rx_chains, 1019 const struct iwl_fw *fw) 1020 { 1021 struct ieee80211_sband_iftype_data *iftype_data; 1022 int i; 1023 1024 BUILD_BUG_ON(sizeof(data->iftd.low) != sizeof(iwl_he_eht_capa)); 1025 BUILD_BUG_ON(sizeof(data->iftd.high) != sizeof(iwl_he_eht_capa)); 1026 BUILD_BUG_ON(sizeof(data->iftd.uhb) != sizeof(iwl_he_eht_capa)); 1027 1028 switch (sband->band) { 1029 case NL80211_BAND_2GHZ: 1030 iftype_data = data->iftd.low; 1031 break; 1032 case NL80211_BAND_5GHZ: 1033 iftype_data = data->iftd.high; 1034 break; 1035 case NL80211_BAND_6GHZ: 1036 iftype_data = data->iftd.uhb; 1037 break; 1038 default: 1039 WARN_ON(1); 1040 return; 1041 } 1042 1043 memcpy(iftype_data, iwl_he_eht_capa, sizeof(iwl_he_eht_capa)); 1044 1045 _ieee80211_set_sband_iftype_data(sband, iftype_data, 1046 ARRAY_SIZE(iwl_he_eht_capa)); 1047 1048 for (i = 0; i < sband->n_iftype_data; i++) 1049 iwl_nvm_fixup_sband_iftd(trans, data, sband, &iftype_data[i], 1050 tx_chains, rx_chains, fw); 1051 1052 iwl_init_he_6ghz_capa(trans, data, sband, tx_chains, rx_chains); 1053 } 1054 1055 void iwl_reinit_cab(struct iwl_trans *trans, struct iwl_nvm_data *data, 1056 u8 tx_chains, u8 rx_chains, const struct iwl_fw *fw) 1057 { 1058 struct ieee80211_supported_band *sband; 1059 1060 sband = &data->bands[NL80211_BAND_2GHZ]; 1061 iwl_init_ht_hw_capab(trans, data, &sband->ht_cap, NL80211_BAND_2GHZ, 1062 tx_chains, rx_chains); 1063 1064 if (data->sku_cap_11ax_enable && !iwlwifi_mod_params.disable_11ax) 1065 iwl_init_he_hw_capab(trans, data, sband, tx_chains, rx_chains, 1066 fw); 1067 1068 sband = &data->bands[NL80211_BAND_5GHZ]; 1069 iwl_init_ht_hw_capab(trans, data, &sband->ht_cap, NL80211_BAND_5GHZ, 1070 tx_chains, rx_chains); 1071 if (data->sku_cap_11ac_enable && !iwlwifi_mod_params.disable_11ac) 1072 iwl_init_vht_hw_capab(trans, data, &sband->vht_cap, 1073 tx_chains, rx_chains); 1074 1075 if (data->sku_cap_11ax_enable && !iwlwifi_mod_params.disable_11ax) 1076 iwl_init_he_hw_capab(trans, data, sband, tx_chains, rx_chains, 1077 fw); 1078 1079 sband = &data->bands[NL80211_BAND_6GHZ]; 1080 if (data->sku_cap_11ax_enable && !iwlwifi_mod_params.disable_11ax) 1081 iwl_init_he_hw_capab(trans, data, sband, tx_chains, rx_chains, 1082 fw); 1083 } 1084 IWL_EXPORT_SYMBOL(iwl_reinit_cab); 1085 1086 static void iwl_init_sbands(struct iwl_trans *trans, 1087 struct iwl_nvm_data *data, 1088 const void *nvm_ch_flags, u8 tx_chains, 1089 u8 rx_chains, u32 sbands_flags, bool v4, 1090 const struct iwl_fw *fw) 1091 { 1092 struct device *dev = trans->dev; 1093 int n_channels; 1094 int n_used = 0; 1095 struct ieee80211_supported_band *sband; 1096 1097 n_channels = iwl_init_channel_map(trans, fw, data, nvm_ch_flags, 1098 sbands_flags, v4); 1099 sband = &data->bands[NL80211_BAND_2GHZ]; 1100 sband->band = NL80211_BAND_2GHZ; 1101 sband->bitrates = &iwl_cfg80211_rates[RATES_24_OFFS]; 1102 sband->n_bitrates = N_RATES_24; 1103 n_used += iwl_init_sband_channels(data, sband, n_channels, 1104 NL80211_BAND_2GHZ); 1105 iwl_init_ht_hw_capab(trans, data, &sband->ht_cap, NL80211_BAND_2GHZ, 1106 tx_chains, rx_chains); 1107 1108 if (data->sku_cap_11ax_enable && !iwlwifi_mod_params.disable_11ax) 1109 iwl_init_he_hw_capab(trans, data, sband, tx_chains, rx_chains, 1110 fw); 1111 1112 sband = &data->bands[NL80211_BAND_5GHZ]; 1113 sband->band = NL80211_BAND_5GHZ; 1114 sband->bitrates = &iwl_cfg80211_rates[RATES_52_OFFS]; 1115 sband->n_bitrates = N_RATES_52; 1116 n_used += iwl_init_sband_channels(data, sband, n_channels, 1117 NL80211_BAND_5GHZ); 1118 iwl_init_ht_hw_capab(trans, data, &sband->ht_cap, NL80211_BAND_5GHZ, 1119 tx_chains, rx_chains); 1120 if (data->sku_cap_11ac_enable && !iwlwifi_mod_params.disable_11ac) 1121 iwl_init_vht_hw_capab(trans, data, &sband->vht_cap, 1122 tx_chains, rx_chains); 1123 1124 if (data->sku_cap_11ax_enable && !iwlwifi_mod_params.disable_11ax) 1125 iwl_init_he_hw_capab(trans, data, sband, tx_chains, rx_chains, 1126 fw); 1127 1128 /* 6GHz band. */ 1129 sband = &data->bands[NL80211_BAND_6GHZ]; 1130 sband->band = NL80211_BAND_6GHZ; 1131 /* use the same rates as 5GHz band */ 1132 sband->bitrates = &iwl_cfg80211_rates[RATES_52_OFFS]; 1133 sband->n_bitrates = N_RATES_52; 1134 n_used += iwl_init_sband_channels(data, sband, n_channels, 1135 NL80211_BAND_6GHZ); 1136 1137 /* 1138 * 6 GHz requires WPA3 which requires MFP, which FW cannot do 1139 * when fips_enabled, so don't advertise any 6 GHz channels to 1140 * avoid spending time on scanning those channels and perhaps 1141 * even finding APs there that cannot be used. 1142 */ 1143 if (!fips_enabled && data->sku_cap_11ax_enable && 1144 !iwlwifi_mod_params.disable_11ax) 1145 iwl_init_he_hw_capab(trans, data, sband, tx_chains, rx_chains, 1146 fw); 1147 else 1148 sband->n_channels = 0; 1149 1150 if (n_channels != n_used) 1151 IWL_ERR_DEV(dev, "NVM: used only %d of %d channels\n", 1152 n_used, n_channels); 1153 } 1154 1155 static int iwl_get_sku(const struct iwl_rf_cfg *cfg, const __le16 *nvm_sw, 1156 const __le16 *phy_sku) 1157 { 1158 if (cfg->nvm_type != IWL_NVM_EXT) 1159 return le16_to_cpup(nvm_sw + SKU); 1160 1161 return le32_to_cpup((const __le32 *)(phy_sku + SKU_FAMILY_8000)); 1162 } 1163 1164 static int iwl_get_nvm_version(const struct iwl_rf_cfg *cfg, const __le16 *nvm_sw) 1165 { 1166 if (cfg->nvm_type != IWL_NVM_EXT) 1167 return le16_to_cpup(nvm_sw + NVM_VERSION); 1168 else 1169 return le32_to_cpup((const __le32 *)(nvm_sw + 1170 NVM_VERSION_EXT_NVM)); 1171 } 1172 1173 static int iwl_get_radio_cfg(const struct iwl_rf_cfg *cfg, const __le16 *nvm_sw, 1174 const __le16 *phy_sku) 1175 { 1176 if (cfg->nvm_type != IWL_NVM_EXT) 1177 return le16_to_cpup(nvm_sw + RADIO_CFG); 1178 1179 return le32_to_cpup((const __le32 *)(phy_sku + RADIO_CFG_FAMILY_EXT_NVM)); 1180 1181 } 1182 1183 static int iwl_get_n_hw_addrs(const struct iwl_rf_cfg *cfg, const __le16 *nvm_sw) 1184 { 1185 int n_hw_addr; 1186 1187 if (cfg->nvm_type != IWL_NVM_EXT) 1188 return le16_to_cpup(nvm_sw + N_HW_ADDRS); 1189 1190 n_hw_addr = le32_to_cpup((const __le32 *)(nvm_sw + N_HW_ADDRS_FAMILY_8000)); 1191 1192 return n_hw_addr & N_HW_ADDR_MASK; 1193 } 1194 1195 static void iwl_set_radio_cfg(const struct iwl_rf_cfg *cfg, 1196 struct iwl_nvm_data *data, 1197 u32 radio_cfg) 1198 { 1199 if (cfg->nvm_type != IWL_NVM_EXT) { 1200 data->radio_cfg_type = NVM_RF_CFG_TYPE_MSK(radio_cfg); 1201 data->radio_cfg_step = NVM_RF_CFG_STEP_MSK(radio_cfg); 1202 data->radio_cfg_dash = NVM_RF_CFG_DASH_MSK(radio_cfg); 1203 data->radio_cfg_pnum = NVM_RF_CFG_PNUM_MSK(radio_cfg); 1204 return; 1205 } 1206 1207 /* set the radio configuration for family 8000 */ 1208 data->radio_cfg_type = EXT_NVM_RF_CFG_TYPE_MSK(radio_cfg); 1209 data->radio_cfg_step = EXT_NVM_RF_CFG_STEP_MSK(radio_cfg); 1210 data->radio_cfg_dash = EXT_NVM_RF_CFG_DASH_MSK(radio_cfg); 1211 data->radio_cfg_pnum = EXT_NVM_RF_CFG_FLAVOR_MSK(radio_cfg); 1212 data->valid_tx_ant = EXT_NVM_RF_CFG_TX_ANT_MSK(radio_cfg); 1213 data->valid_rx_ant = EXT_NVM_RF_CFG_RX_ANT_MSK(radio_cfg); 1214 } 1215 1216 static void iwl_flip_hw_address(__le32 mac_addr0, __le32 mac_addr1, u8 *dest) 1217 { 1218 const u8 *hw_addr; 1219 1220 hw_addr = (const u8 *)&mac_addr0; 1221 dest[0] = hw_addr[3]; 1222 dest[1] = hw_addr[2]; 1223 dest[2] = hw_addr[1]; 1224 dest[3] = hw_addr[0]; 1225 1226 hw_addr = (const u8 *)&mac_addr1; 1227 dest[4] = hw_addr[1]; 1228 dest[5] = hw_addr[0]; 1229 } 1230 1231 static void iwl_set_hw_address_from_csr(struct iwl_trans *trans, 1232 struct iwl_nvm_data *data) 1233 { 1234 __le32 mac_addr0 = cpu_to_le32(iwl_read32(trans, 1235 CSR_MAC_ADDR0_STRAP(trans))); 1236 __le32 mac_addr1 = cpu_to_le32(iwl_read32(trans, 1237 CSR_MAC_ADDR1_STRAP(trans))); 1238 1239 iwl_flip_hw_address(mac_addr0, mac_addr1, data->hw_addr); 1240 /* 1241 * If the OEM fused a valid address, use it instead of the one in the 1242 * OTP 1243 */ 1244 if (is_valid_ether_addr(data->hw_addr)) 1245 return; 1246 1247 mac_addr0 = cpu_to_le32(iwl_read32(trans, CSR_MAC_ADDR0_OTP(trans))); 1248 mac_addr1 = cpu_to_le32(iwl_read32(trans, CSR_MAC_ADDR1_OTP(trans))); 1249 1250 iwl_flip_hw_address(mac_addr0, mac_addr1, data->hw_addr); 1251 } 1252 1253 static void iwl_set_hw_address_family_8000(struct iwl_trans *trans, 1254 const struct iwl_rf_cfg *cfg, 1255 struct iwl_nvm_data *data, 1256 const __le16 *mac_override, 1257 const __be16 *nvm_hw) 1258 { 1259 const u8 *hw_addr; 1260 1261 if (mac_override) { 1262 static const u8 reserved_mac[] = { 1263 0x02, 0xcc, 0xaa, 0xff, 0xee, 0x00 1264 }; 1265 1266 hw_addr = (const u8 *)(mac_override + 1267 MAC_ADDRESS_OVERRIDE_EXT_NVM); 1268 1269 /* 1270 * Store the MAC address from MAO section. 1271 * No byte swapping is required in MAO section 1272 */ 1273 memcpy(data->hw_addr, hw_addr, ETH_ALEN); 1274 1275 /* 1276 * Force the use of the OTP MAC address in case of reserved MAC 1277 * address in the NVM, or if address is given but invalid. 1278 */ 1279 if (is_valid_ether_addr(data->hw_addr) && 1280 memcmp(reserved_mac, hw_addr, ETH_ALEN) != 0) 1281 return; 1282 1283 IWL_ERR(trans, 1284 "mac address from nvm override section is not valid\n"); 1285 } 1286 1287 if (nvm_hw) { 1288 /* read the mac address from WFMP registers */ 1289 __le32 mac_addr0 = cpu_to_le32(iwl_trans_read_prph(trans, 1290 WFMP_MAC_ADDR_0)); 1291 __le32 mac_addr1 = cpu_to_le32(iwl_trans_read_prph(trans, 1292 WFMP_MAC_ADDR_1)); 1293 1294 iwl_flip_hw_address(mac_addr0, mac_addr1, data->hw_addr); 1295 1296 return; 1297 } 1298 1299 IWL_ERR(trans, "mac address is not found\n"); 1300 } 1301 1302 static int iwl_set_hw_address(struct iwl_trans *trans, 1303 const struct iwl_rf_cfg *cfg, 1304 struct iwl_nvm_data *data, const __be16 *nvm_hw, 1305 const __le16 *mac_override) 1306 { 1307 const struct iwl_mac_cfg *mac_cfg = trans->mac_cfg; 1308 if (mac_cfg->base->mac_addr_from_csr) { 1309 iwl_set_hw_address_from_csr(trans, data); 1310 } else if (cfg->nvm_type != IWL_NVM_EXT) { 1311 const u8 *hw_addr = (const u8 *)(nvm_hw + HW_ADDR); 1312 1313 /* The byte order is little endian 16 bit, meaning 214365 */ 1314 data->hw_addr[0] = hw_addr[1]; 1315 data->hw_addr[1] = hw_addr[0]; 1316 data->hw_addr[2] = hw_addr[3]; 1317 data->hw_addr[3] = hw_addr[2]; 1318 data->hw_addr[4] = hw_addr[5]; 1319 data->hw_addr[5] = hw_addr[4]; 1320 } else { 1321 iwl_set_hw_address_family_8000(trans, cfg, data, 1322 mac_override, nvm_hw); 1323 } 1324 1325 if (!is_valid_ether_addr(data->hw_addr)) { 1326 IWL_ERR(trans, "no valid mac address was found\n"); 1327 return -EINVAL; 1328 } 1329 1330 if (!trans->csme_own) 1331 IWL_INFO(trans, "base HW address: %pM, OTP minor version: 0x%x\n", 1332 data->hw_addr, iwl_read_prph(trans, REG_OTP_MINOR)); 1333 1334 return 0; 1335 } 1336 1337 static bool 1338 iwl_nvm_no_wide_in_5ghz(struct iwl_trans *trans, const struct iwl_rf_cfg *cfg, 1339 const __be16 *nvm_hw) 1340 { 1341 /* 1342 * Workaround a bug in Indonesia SKUs where the regulatory in 1343 * some 7000-family OTPs erroneously allow wide channels in 1344 * 5GHz. To check for Indonesia, we take the SKU value from 1345 * bits 1-4 in the subsystem ID and check if it is either 5 or 1346 * 9. In those cases, we need to force-disable wide channels 1347 * in 5GHz otherwise the FW will throw a sysassert when we try 1348 * to use them. 1349 */ 1350 if (trans->mac_cfg->device_family == IWL_DEVICE_FAMILY_7000) { 1351 /* 1352 * Unlike the other sections in the NVM, the hw 1353 * section uses big-endian. 1354 */ 1355 u16 subsystem_id = be16_to_cpup(nvm_hw + SUBSYSTEM_ID); 1356 u8 sku = (subsystem_id & 0x1e) >> 1; 1357 1358 if (sku == 5 || sku == 9) { 1359 IWL_DEBUG_EEPROM(trans->dev, 1360 "disabling wide channels in 5GHz (0x%0x %d)\n", 1361 subsystem_id, sku); 1362 return true; 1363 } 1364 } 1365 1366 return false; 1367 } 1368 1369 struct iwl_nvm_data * 1370 iwl_parse_mei_nvm_data(struct iwl_trans *trans, const struct iwl_rf_cfg *cfg, 1371 const struct iwl_mei_nvm *mei_nvm, 1372 const struct iwl_fw *fw, u8 tx_ant, u8 rx_ant) 1373 { 1374 struct iwl_nvm_data *data; 1375 u32 sbands_flags = 0; 1376 u8 rx_chains = fw->valid_rx_ant; 1377 u8 tx_chains = fw->valid_rx_ant; 1378 1379 if (cfg->uhb_supported) 1380 data = kzalloc(struct_size(data, channels, 1381 IWL_NVM_NUM_CHANNELS_UHB), 1382 GFP_KERNEL); 1383 else 1384 data = kzalloc(struct_size(data, channels, 1385 IWL_NVM_NUM_CHANNELS_EXT), 1386 GFP_KERNEL); 1387 if (!data) 1388 return NULL; 1389 1390 BUILD_BUG_ON(ARRAY_SIZE(mei_nvm->channels) != 1391 IWL_NVM_NUM_CHANNELS_UHB); 1392 data->nvm_version = mei_nvm->nvm_version; 1393 1394 iwl_set_radio_cfg(cfg, data, mei_nvm->radio_cfg); 1395 if (data->valid_tx_ant) 1396 tx_chains &= data->valid_tx_ant; 1397 if (data->valid_rx_ant) 1398 rx_chains &= data->valid_rx_ant; 1399 if (tx_ant) 1400 tx_chains &= tx_ant; 1401 if (rx_ant) 1402 rx_chains &= rx_ant; 1403 1404 data->sku_cap_mimo_disabled = false; 1405 data->sku_cap_band_24ghz_enable = true; 1406 data->sku_cap_band_52ghz_enable = true; 1407 data->sku_cap_11n_enable = 1408 !(iwlwifi_mod_params.disable_11n & IWL_DISABLE_HT_ALL); 1409 data->sku_cap_11ac_enable = true; 1410 data->sku_cap_11ax_enable = 1411 mei_nvm->caps & MEI_NVM_CAPS_11AX_SUPPORT; 1412 1413 data->lar_enabled = mei_nvm->caps & MEI_NVM_CAPS_LARI_SUPPORT; 1414 1415 data->n_hw_addrs = mei_nvm->n_hw_addrs; 1416 /* If no valid mac address was found - bail out */ 1417 if (iwl_set_hw_address(trans, cfg, data, NULL, NULL)) { 1418 kfree(data); 1419 return NULL; 1420 } 1421 1422 if (data->lar_enabled && 1423 fw_has_capa(&fw->ucode_capa, IWL_UCODE_TLV_CAPA_LAR_SUPPORT)) 1424 sbands_flags |= IWL_NVM_SBANDS_FLAGS_LAR; 1425 1426 iwl_init_sbands(trans, data, mei_nvm->channels, tx_chains, rx_chains, 1427 sbands_flags, true, fw); 1428 1429 return data; 1430 } 1431 IWL_EXPORT_SYMBOL(iwl_parse_mei_nvm_data); 1432 1433 struct iwl_nvm_data * 1434 iwl_parse_nvm_data(struct iwl_trans *trans, const struct iwl_rf_cfg *cfg, 1435 const struct iwl_fw *fw, 1436 const __be16 *nvm_hw, const __le16 *nvm_sw, 1437 const __le16 *nvm_calib, const __le16 *regulatory, 1438 const __le16 *mac_override, const __le16 *phy_sku, 1439 u8 tx_chains, u8 rx_chains) 1440 { 1441 struct iwl_nvm_data *data; 1442 bool lar_enabled; 1443 u32 sku, radio_cfg; 1444 u32 sbands_flags = 0; 1445 u16 lar_config; 1446 const __le16 *ch_section; 1447 1448 if (cfg->uhb_supported) 1449 data = kzalloc(struct_size(data, channels, 1450 IWL_NVM_NUM_CHANNELS_UHB), 1451 GFP_KERNEL); 1452 else if (cfg->nvm_type != IWL_NVM_EXT) 1453 data = kzalloc(struct_size(data, channels, 1454 IWL_NVM_NUM_CHANNELS), 1455 GFP_KERNEL); 1456 else 1457 data = kzalloc(struct_size(data, channels, 1458 IWL_NVM_NUM_CHANNELS_EXT), 1459 GFP_KERNEL); 1460 if (!data) 1461 return NULL; 1462 1463 data->nvm_version = iwl_get_nvm_version(cfg, nvm_sw); 1464 1465 radio_cfg = iwl_get_radio_cfg(cfg, nvm_sw, phy_sku); 1466 iwl_set_radio_cfg(cfg, data, radio_cfg); 1467 if (data->valid_tx_ant) 1468 tx_chains &= data->valid_tx_ant; 1469 if (data->valid_rx_ant) 1470 rx_chains &= data->valid_rx_ant; 1471 1472 sku = iwl_get_sku(cfg, nvm_sw, phy_sku); 1473 data->sku_cap_band_24ghz_enable = sku & NVM_SKU_CAP_BAND_24GHZ; 1474 data->sku_cap_band_52ghz_enable = sku & NVM_SKU_CAP_BAND_52GHZ; 1475 data->sku_cap_11n_enable = sku & NVM_SKU_CAP_11N_ENABLE; 1476 if (iwlwifi_mod_params.disable_11n & IWL_DISABLE_HT_ALL) 1477 data->sku_cap_11n_enable = false; 1478 data->sku_cap_11ac_enable = data->sku_cap_11n_enable && 1479 (sku & NVM_SKU_CAP_11AC_ENABLE); 1480 data->sku_cap_mimo_disabled = sku & NVM_SKU_CAP_MIMO_DISABLE; 1481 1482 data->n_hw_addrs = iwl_get_n_hw_addrs(cfg, nvm_sw); 1483 1484 if (cfg->nvm_type != IWL_NVM_EXT) { 1485 /* Checking for required sections */ 1486 if (!nvm_calib) { 1487 IWL_ERR(trans, 1488 "Can't parse empty Calib NVM sections\n"); 1489 kfree(data); 1490 return NULL; 1491 } 1492 1493 ch_section = cfg->nvm_type == IWL_NVM_SDP ? 1494 ®ulatory[NVM_CHANNELS_SDP] : 1495 &nvm_sw[NVM_CHANNELS]; 1496 1497 lar_enabled = true; 1498 } else { 1499 u16 lar_offset = data->nvm_version < 0xE39 ? 1500 NVM_LAR_OFFSET_OLD : 1501 NVM_LAR_OFFSET; 1502 1503 lar_config = le16_to_cpup(regulatory + lar_offset); 1504 data->lar_enabled = !!(lar_config & 1505 NVM_LAR_ENABLED); 1506 lar_enabled = data->lar_enabled; 1507 ch_section = ®ulatory[NVM_CHANNELS_EXTENDED]; 1508 } 1509 1510 /* If no valid mac address was found - bail out */ 1511 if (iwl_set_hw_address(trans, cfg, data, nvm_hw, mac_override)) { 1512 kfree(data); 1513 return NULL; 1514 } 1515 1516 if (lar_enabled && 1517 fw_has_capa(&fw->ucode_capa, IWL_UCODE_TLV_CAPA_LAR_SUPPORT)) 1518 sbands_flags |= IWL_NVM_SBANDS_FLAGS_LAR; 1519 1520 if (iwl_nvm_no_wide_in_5ghz(trans, cfg, nvm_hw)) 1521 sbands_flags |= IWL_NVM_SBANDS_FLAGS_NO_WIDE_IN_5GHZ; 1522 1523 iwl_init_sbands(trans, data, ch_section, tx_chains, rx_chains, 1524 sbands_flags, false, fw); 1525 data->calib_version = 255; 1526 1527 return data; 1528 } 1529 IWL_EXPORT_SYMBOL(iwl_parse_nvm_data); 1530 1531 VISIBLE_IF_IWLWIFI_KUNIT 1532 u32 iwl_nvm_get_regdom_bw_flags(const u16 *nvm_chan, 1533 int ch_idx, u16 nvm_flags, 1534 struct iwl_reg_capa reg_capa) 1535 { 1536 u32 flags = NL80211_RRF_NO_HT40; 1537 1538 if (ch_idx < NUM_2GHZ_CHANNELS && 1539 (nvm_flags & NVM_CHANNEL_40MHZ)) { 1540 if (nvm_chan[ch_idx] <= LAST_2GHZ_HT_PLUS) 1541 flags &= ~NL80211_RRF_NO_HT40PLUS; 1542 if (nvm_chan[ch_idx] >= FIRST_2GHZ_HT_MINUS) 1543 flags &= ~NL80211_RRF_NO_HT40MINUS; 1544 } else if (ch_idx < NUM_2GHZ_CHANNELS + NUM_5GHZ_CHANNELS && 1545 nvm_flags & NVM_CHANNEL_40MHZ) { 1546 if ((ch_idx - NUM_2GHZ_CHANNELS) % 2 == 0) 1547 flags &= ~NL80211_RRF_NO_HT40PLUS; 1548 else 1549 flags &= ~NL80211_RRF_NO_HT40MINUS; 1550 } else if (nvm_flags & NVM_CHANNEL_40MHZ) { 1551 flags &= ~NL80211_RRF_NO_HT40PLUS; 1552 flags &= ~NL80211_RRF_NO_HT40MINUS; 1553 } 1554 1555 if (!(nvm_flags & NVM_CHANNEL_80MHZ)) 1556 flags |= NL80211_RRF_NO_80MHZ; 1557 if (!(nvm_flags & NVM_CHANNEL_160MHZ)) 1558 flags |= NL80211_RRF_NO_160MHZ; 1559 1560 if (!(nvm_flags & NVM_CHANNEL_ACTIVE)) 1561 flags |= NL80211_RRF_NO_IR; 1562 1563 if (nvm_flags & NVM_CHANNEL_RADAR) 1564 flags |= NL80211_RRF_DFS; 1565 1566 if (nvm_flags & NVM_CHANNEL_INDOOR_ONLY) 1567 flags |= NL80211_RRF_NO_OUTDOOR; 1568 1569 if (nvm_flags & NVM_CHANNEL_ALLOW_20MHZ_ACTIVITY && 1570 flags & NL80211_RRF_NO_IR) 1571 flags |= NL80211_RRF_ALLOW_20MHZ_ACTIVITY; 1572 1573 /* Set the GO concurrent flag only in case that NO_IR is set. 1574 * Otherwise it is meaningless 1575 */ 1576 if ((nvm_flags & NVM_CHANNEL_GO_CONCURRENT)) { 1577 if (flags & NL80211_RRF_NO_IR) 1578 flags |= NL80211_RRF_GO_CONCURRENT; 1579 if (flags & NL80211_RRF_DFS) { 1580 flags |= NL80211_RRF_DFS_CONCURRENT; 1581 /* Our device doesn't set active bit for DFS channels 1582 * however, once marked as DFS no-ir is not needed. 1583 */ 1584 flags &= ~NL80211_RRF_NO_IR; 1585 } 1586 } 1587 1588 /* Set the AP type for the UHB case. */ 1589 if (nvm_flags & NVM_CHANNEL_VLP) { 1590 if (!(nvm_flags & NVM_CHANNEL_VLP_AP_NOT_ALLOWED)) 1591 flags |= NL80211_RRF_ALLOW_6GHZ_VLP_AP; 1592 } else { 1593 flags |= NL80211_RRF_NO_6GHZ_VLP_CLIENT; 1594 } 1595 1596 if (!(nvm_flags & NVM_CHANNEL_AFC)) 1597 flags |= NL80211_RRF_NO_6GHZ_AFC_CLIENT; 1598 1599 /* 1600 * reg_capa is per regulatory domain so apply it for every channel 1601 */ 1602 if (ch_idx >= NUM_2GHZ_CHANNELS) { 1603 if (!reg_capa.allow_40mhz) 1604 flags |= NL80211_RRF_NO_HT40; 1605 1606 if (!reg_capa.allow_80mhz) 1607 flags |= NL80211_RRF_NO_80MHZ; 1608 1609 if (!reg_capa.allow_160mhz) 1610 flags |= NL80211_RRF_NO_160MHZ; 1611 1612 if (!reg_capa.allow_320mhz) 1613 flags |= NL80211_RRF_NO_320MHZ; 1614 } 1615 1616 if (reg_capa.disable_11ax) 1617 flags |= NL80211_RRF_NO_HE; 1618 1619 if (reg_capa.disable_11be) 1620 flags |= NL80211_RRF_NO_EHT; 1621 1622 return flags; 1623 } 1624 EXPORT_SYMBOL_IF_IWLWIFI_KUNIT(iwl_nvm_get_regdom_bw_flags); 1625 1626 static struct iwl_reg_capa iwl_get_reg_capa(u32 flags, u8 resp_ver) 1627 { 1628 struct iwl_reg_capa reg_capa = {}; 1629 1630 if (resp_ver >= REG_CAPA_V4_RESP_VER) { 1631 reg_capa.allow_40mhz = true; 1632 reg_capa.allow_80mhz = flags & REG_CAPA_V4_80MHZ_ALLOWED; 1633 reg_capa.allow_160mhz = flags & REG_CAPA_V4_160MHZ_ALLOWED; 1634 reg_capa.allow_320mhz = flags & REG_CAPA_V4_320MHZ_ALLOWED; 1635 reg_capa.disable_11ax = flags & REG_CAPA_V4_11AX_DISABLED; 1636 reg_capa.disable_11be = flags & REG_CAPA_V4_11BE_DISABLED; 1637 } else if (resp_ver >= REG_CAPA_V2_RESP_VER) { 1638 reg_capa.allow_40mhz = flags & REG_CAPA_V2_40MHZ_ALLOWED; 1639 reg_capa.allow_80mhz = flags & REG_CAPA_V2_80MHZ_ALLOWED; 1640 reg_capa.allow_160mhz = flags & REG_CAPA_V2_160MHZ_ALLOWED; 1641 reg_capa.disable_11ax = flags & REG_CAPA_V2_11AX_DISABLED; 1642 } else { 1643 reg_capa.allow_40mhz = !(flags & REG_CAPA_V1_40MHZ_FORBIDDEN); 1644 reg_capa.allow_80mhz = flags & REG_CAPA_V1_80MHZ_ALLOWED; 1645 reg_capa.allow_160mhz = flags & REG_CAPA_V1_160MHZ_ALLOWED; 1646 reg_capa.disable_11ax = flags & REG_CAPA_V1_11AX_DISABLED; 1647 } 1648 return reg_capa; 1649 } 1650 1651 struct ieee80211_regdomain * 1652 iwl_parse_nvm_mcc_info(struct iwl_trans *trans, 1653 int num_of_ch, __le32 *channels, u16 fw_mcc, 1654 u16 geo_info, u32 cap, u8 resp_ver) 1655 { 1656 const struct iwl_rf_cfg *cfg = trans->cfg; 1657 struct device *dev = trans->dev; 1658 int ch_idx; 1659 u16 ch_flags; 1660 u32 reg_rule_flags, prev_reg_rule_flags = 0; 1661 const u16 *nvm_chan; 1662 struct ieee80211_regdomain *regd, *copy_rd; 1663 struct ieee80211_reg_rule *rule; 1664 int center_freq, prev_center_freq = 0; 1665 int valid_rules = 0; 1666 bool new_rule; 1667 int max_num_ch; 1668 struct iwl_reg_capa reg_capa; 1669 1670 if (cfg->uhb_supported) { 1671 max_num_ch = IWL_NVM_NUM_CHANNELS_UHB; 1672 nvm_chan = iwl_uhb_nvm_channels; 1673 } else if (cfg->nvm_type == IWL_NVM_EXT) { 1674 max_num_ch = IWL_NVM_NUM_CHANNELS_EXT; 1675 nvm_chan = iwl_ext_nvm_channels; 1676 } else { 1677 max_num_ch = IWL_NVM_NUM_CHANNELS; 1678 nvm_chan = iwl_nvm_channels; 1679 } 1680 1681 if (num_of_ch > max_num_ch) { 1682 IWL_DEBUG_DEV(dev, IWL_DL_LAR, 1683 "Num of channels (%d) is greater than expected. Truncating to %d\n", 1684 num_of_ch, max_num_ch); 1685 num_of_ch = max_num_ch; 1686 } 1687 1688 if (WARN_ON_ONCE(num_of_ch > NL80211_MAX_SUPP_REG_RULES)) 1689 return ERR_PTR(-EINVAL); 1690 1691 IWL_DEBUG_DEV(dev, IWL_DL_LAR, "building regdom for %d channels\n", 1692 num_of_ch); 1693 1694 /* build a regdomain rule for every valid channel */ 1695 regd = kzalloc(struct_size(regd, reg_rules, num_of_ch), GFP_KERNEL); 1696 if (!regd) 1697 return ERR_PTR(-ENOMEM); 1698 1699 /* set alpha2 from FW. */ 1700 regd->alpha2[0] = fw_mcc >> 8; 1701 regd->alpha2[1] = fw_mcc & 0xff; 1702 1703 /* parse regulatory capability flags */ 1704 reg_capa = iwl_get_reg_capa(cap, resp_ver); 1705 1706 for (ch_idx = 0; ch_idx < num_of_ch; ch_idx++) { 1707 enum nl80211_band band = 1708 iwl_nl80211_band_from_channel_idx(ch_idx); 1709 1710 ch_flags = (u16)__le32_to_cpup(channels + ch_idx); 1711 center_freq = ieee80211_channel_to_frequency(nvm_chan[ch_idx], 1712 band); 1713 new_rule = false; 1714 1715 if (!(ch_flags & NVM_CHANNEL_VALID)) { 1716 iwl_nvm_print_channel_flags(dev, IWL_DL_LAR, 1717 nvm_chan[ch_idx], ch_flags); 1718 continue; 1719 } 1720 1721 reg_rule_flags = iwl_nvm_get_regdom_bw_flags(nvm_chan, ch_idx, 1722 ch_flags, 1723 reg_capa); 1724 1725 /* we can't continue the same rule */ 1726 if (ch_idx == 0 || prev_reg_rule_flags != reg_rule_flags || 1727 center_freq - prev_center_freq > 20) { 1728 valid_rules++; 1729 new_rule = true; 1730 } 1731 1732 rule = ®d->reg_rules[valid_rules - 1]; 1733 1734 if (new_rule) 1735 rule->freq_range.start_freq_khz = 1736 MHZ_TO_KHZ(center_freq - 10); 1737 1738 rule->freq_range.end_freq_khz = MHZ_TO_KHZ(center_freq + 10); 1739 1740 /* this doesn't matter - not used by FW */ 1741 rule->power_rule.max_antenna_gain = DBI_TO_MBI(6); 1742 rule->power_rule.max_eirp = 1743 DBM_TO_MBM(IWL_DEFAULT_MAX_TX_POWER); 1744 1745 rule->flags = reg_rule_flags; 1746 1747 /* rely on auto-calculation to merge BW of contiguous chans */ 1748 rule->flags |= NL80211_RRF_AUTO_BW; 1749 rule->freq_range.max_bandwidth_khz = 0; 1750 1751 prev_center_freq = center_freq; 1752 prev_reg_rule_flags = reg_rule_flags; 1753 1754 iwl_nvm_print_channel_flags(dev, IWL_DL_LAR, 1755 nvm_chan[ch_idx], ch_flags); 1756 1757 if (!(geo_info & GEO_WMM_ETSI_5GHZ_INFO) || 1758 band == NL80211_BAND_2GHZ) 1759 continue; 1760 1761 reg_query_regdb_wmm(regd->alpha2, center_freq, rule); 1762 } 1763 1764 /* 1765 * Certain firmware versions might report no valid channels 1766 * if booted in RF-kill, i.e. not all calibrations etc. are 1767 * running. We'll get out of this situation later when the 1768 * rfkill is removed and we update the regdomain again, but 1769 * since cfg80211 doesn't accept an empty regdomain, add a 1770 * dummy (unusable) rule here in this case so we can init. 1771 */ 1772 if (!valid_rules) { 1773 valid_rules = 1; 1774 rule = ®d->reg_rules[valid_rules - 1]; 1775 rule->freq_range.start_freq_khz = MHZ_TO_KHZ(2412); 1776 rule->freq_range.end_freq_khz = MHZ_TO_KHZ(2413); 1777 rule->freq_range.max_bandwidth_khz = MHZ_TO_KHZ(1); 1778 rule->power_rule.max_antenna_gain = DBI_TO_MBI(6); 1779 rule->power_rule.max_eirp = 1780 DBM_TO_MBM(IWL_DEFAULT_MAX_TX_POWER); 1781 } 1782 1783 regd->n_reg_rules = valid_rules; 1784 1785 /* 1786 * Narrow down regdom for unused regulatory rules to prevent hole 1787 * between reg rules to wmm rules. 1788 */ 1789 copy_rd = kmemdup(regd, struct_size(regd, reg_rules, valid_rules), 1790 GFP_KERNEL); 1791 if (!copy_rd) 1792 copy_rd = ERR_PTR(-ENOMEM); 1793 1794 kfree(regd); 1795 return copy_rd; 1796 } 1797 IWL_EXPORT_SYMBOL(iwl_parse_nvm_mcc_info); 1798 1799 #define IWL_MAX_NVM_SECTION_SIZE 0x1b58 1800 #define IWL_MAX_EXT_NVM_SECTION_SIZE 0x1ffc 1801 #define MAX_NVM_FILE_LEN 16384 1802 1803 void iwl_nvm_fixups(u32 hw_id, unsigned int section, u8 *data, 1804 unsigned int len) 1805 { 1806 #define IWL_4165_DEVICE_ID 0x5501 1807 #define NVM_SKU_CAP_MIMO_DISABLE BIT(5) 1808 1809 if (section == NVM_SECTION_TYPE_PHY_SKU && 1810 hw_id == IWL_4165_DEVICE_ID && data && len >= 5 && 1811 (data[4] & NVM_SKU_CAP_MIMO_DISABLE)) 1812 /* OTP 0x52 bug work around: it's a 1x1 device */ 1813 data[3] = ANT_B | (ANT_B << 4); 1814 } 1815 IWL_EXPORT_SYMBOL(iwl_nvm_fixups); 1816 1817 /* 1818 * Reads external NVM from a file into mvm->nvm_sections 1819 * 1820 * HOW TO CREATE THE NVM FILE FORMAT: 1821 * ------------------------------ 1822 * 1. create hex file, format: 1823 * 3800 -> header 1824 * 0000 -> header 1825 * 5a40 -> data 1826 * 1827 * rev - 6 bit (word1) 1828 * len - 10 bit (word1) 1829 * id - 4 bit (word2) 1830 * rsv - 12 bit (word2) 1831 * 1832 * 2. flip 8bits with 8 bits per line to get the right NVM file format 1833 * 1834 * 3. create binary file from the hex file 1835 * 1836 * 4. save as "iNVM_xxx.bin" under /lib/firmware 1837 */ 1838 int iwl_read_external_nvm(struct iwl_trans *trans, 1839 const char *nvm_file_name, 1840 struct iwl_nvm_section *nvm_sections) 1841 { 1842 int ret, section_size; 1843 u16 section_id; 1844 const struct firmware *fw_entry; 1845 const struct { 1846 __le16 word1; 1847 __le16 word2; 1848 u8 data[]; 1849 } *file_sec; 1850 const u8 *eof; 1851 u8 *temp; 1852 int max_section_size; 1853 const __le32 *dword_buff; 1854 1855 #define NVM_WORD1_LEN(x) (8 * (x & 0x03FF)) 1856 #define NVM_WORD2_ID(x) (x >> 12) 1857 #define EXT_NVM_WORD2_LEN(x) (2 * (((x) & 0xFF) << 8 | (x) >> 8)) 1858 #define EXT_NVM_WORD1_ID(x) ((x) >> 4) 1859 #define NVM_HEADER_0 (0x2A504C54) 1860 #define NVM_HEADER_1 (0x4E564D2A) 1861 #define NVM_HEADER_SIZE (4 * sizeof(u32)) 1862 1863 IWL_DEBUG_EEPROM(trans->dev, "Read from external NVM\n"); 1864 1865 /* Maximal size depends on NVM version */ 1866 if (trans->cfg->nvm_type != IWL_NVM_EXT) 1867 max_section_size = IWL_MAX_NVM_SECTION_SIZE; 1868 else 1869 max_section_size = IWL_MAX_EXT_NVM_SECTION_SIZE; 1870 1871 /* 1872 * Obtain NVM image via request_firmware. Since we already used 1873 * request_firmware_nowait() for the firmware binary load and only 1874 * get here after that we assume the NVM request can be satisfied 1875 * synchronously. 1876 */ 1877 ret = request_firmware(&fw_entry, nvm_file_name, trans->dev); 1878 if (ret) { 1879 IWL_ERR(trans, "ERROR: %s isn't available %d\n", 1880 nvm_file_name, ret); 1881 return ret; 1882 } 1883 1884 IWL_INFO(trans, "Loaded NVM file %s (%zu bytes)\n", 1885 nvm_file_name, fw_entry->size); 1886 1887 if (fw_entry->size > MAX_NVM_FILE_LEN) { 1888 IWL_ERR(trans, "NVM file too large\n"); 1889 ret = -EINVAL; 1890 goto out; 1891 } 1892 1893 eof = fw_entry->data + fw_entry->size; 1894 dword_buff = (const __le32 *)fw_entry->data; 1895 1896 /* some NVM file will contain a header. 1897 * The header is identified by 2 dwords header as follow: 1898 * dword[0] = 0x2A504C54 1899 * dword[1] = 0x4E564D2A 1900 * 1901 * This header must be skipped when providing the NVM data to the FW. 1902 */ 1903 if (fw_entry->size > NVM_HEADER_SIZE && 1904 dword_buff[0] == cpu_to_le32(NVM_HEADER_0) && 1905 dword_buff[1] == cpu_to_le32(NVM_HEADER_1)) { 1906 file_sec = (const void *)(fw_entry->data + NVM_HEADER_SIZE); 1907 IWL_INFO(trans, "NVM Version %08X\n", le32_to_cpu(dword_buff[2])); 1908 IWL_INFO(trans, "NVM Manufacturing date %08X\n", 1909 le32_to_cpu(dword_buff[3])); 1910 1911 /* nvm file validation, dword_buff[2] holds the file version */ 1912 if (trans->mac_cfg->device_family == IWL_DEVICE_FAMILY_8000 && 1913 trans->info.hw_rev_step == SILICON_C_STEP && 1914 le32_to_cpu(dword_buff[2]) < 0xE4A) { 1915 ret = -EFAULT; 1916 goto out; 1917 } 1918 } else { 1919 file_sec = (const void *)fw_entry->data; 1920 } 1921 1922 while (true) { 1923 if (file_sec->data > eof) { 1924 IWL_ERR(trans, 1925 "ERROR - NVM file too short for section header\n"); 1926 ret = -EINVAL; 1927 break; 1928 } 1929 1930 /* check for EOF marker */ 1931 if (!file_sec->word1 && !file_sec->word2) { 1932 ret = 0; 1933 break; 1934 } 1935 1936 if (trans->cfg->nvm_type != IWL_NVM_EXT) { 1937 section_size = 1938 2 * NVM_WORD1_LEN(le16_to_cpu(file_sec->word1)); 1939 section_id = NVM_WORD2_ID(le16_to_cpu(file_sec->word2)); 1940 } else { 1941 section_size = 2 * EXT_NVM_WORD2_LEN( 1942 le16_to_cpu(file_sec->word2)); 1943 section_id = EXT_NVM_WORD1_ID( 1944 le16_to_cpu(file_sec->word1)); 1945 } 1946 1947 if (section_size > max_section_size) { 1948 IWL_ERR(trans, "ERROR - section too large (%d)\n", 1949 section_size); 1950 ret = -EINVAL; 1951 break; 1952 } 1953 1954 if (!section_size) { 1955 IWL_ERR(trans, "ERROR - section empty\n"); 1956 ret = -EINVAL; 1957 break; 1958 } 1959 1960 if (file_sec->data + section_size > eof) { 1961 IWL_ERR(trans, 1962 "ERROR - NVM file too short for section (%d bytes)\n", 1963 section_size); 1964 ret = -EINVAL; 1965 break; 1966 } 1967 1968 if (WARN(section_id >= NVM_MAX_NUM_SECTIONS, 1969 "Invalid NVM section ID %d\n", section_id)) { 1970 ret = -EINVAL; 1971 break; 1972 } 1973 1974 temp = kmemdup(file_sec->data, section_size, GFP_KERNEL); 1975 if (!temp) { 1976 ret = -ENOMEM; 1977 break; 1978 } 1979 1980 iwl_nvm_fixups(trans->info.hw_id, section_id, temp, section_size); 1981 1982 kfree(nvm_sections[section_id].data); 1983 nvm_sections[section_id].data = temp; 1984 nvm_sections[section_id].length = section_size; 1985 1986 /* advance to the next section */ 1987 file_sec = (const void *)(file_sec->data + section_size); 1988 } 1989 out: 1990 release_firmware(fw_entry); 1991 return ret; 1992 } 1993 IWL_EXPORT_SYMBOL(iwl_read_external_nvm); 1994 1995 struct iwl_nvm_data *iwl_get_nvm(struct iwl_trans *trans, 1996 const struct iwl_fw *fw, 1997 u8 set_tx_ant, u8 set_rx_ant) 1998 { 1999 struct iwl_nvm_get_info cmd = {}; 2000 struct iwl_nvm_data *nvm; 2001 struct iwl_host_cmd hcmd = { 2002 .flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL, 2003 .data = { &cmd, }, 2004 .len = { sizeof(cmd) }, 2005 .id = WIDE_ID(REGULATORY_AND_NVM_GROUP, NVM_GET_INFO) 2006 }; 2007 int ret; 2008 bool empty_otp; 2009 u32 mac_flags; 2010 u32 sbands_flags = 0; 2011 u8 tx_ant; 2012 u8 rx_ant; 2013 2014 /* 2015 * All the values in iwl_nvm_get_info_rsp v4 are the same as 2016 * in v3, except for the channel profile part of the 2017 * regulatory. So we can just access the new struct, with the 2018 * exception of the latter. 2019 */ 2020 struct iwl_nvm_get_info_rsp *rsp; 2021 struct iwl_nvm_get_info_rsp_v3 *rsp_v3; 2022 bool v4 = fw_has_api(&fw->ucode_capa, 2023 IWL_UCODE_TLV_API_REGULATORY_NVM_INFO); 2024 size_t rsp_size = v4 ? sizeof(*rsp) : sizeof(*rsp_v3); 2025 void *channel_profile; 2026 2027 ret = iwl_trans_send_cmd(trans, &hcmd); 2028 if (ret) 2029 return ERR_PTR(ret); 2030 2031 if (WARN(iwl_rx_packet_payload_len(hcmd.resp_pkt) != rsp_size, 2032 "Invalid payload len in NVM response from FW %d", 2033 iwl_rx_packet_payload_len(hcmd.resp_pkt))) { 2034 ret = -EINVAL; 2035 goto out; 2036 } 2037 2038 rsp = (void *)hcmd.resp_pkt->data; 2039 empty_otp = !!(le32_to_cpu(rsp->general.flags) & 2040 NVM_GENERAL_FLAGS_EMPTY_OTP); 2041 if (empty_otp) 2042 IWL_INFO(trans, "OTP is empty\n"); 2043 2044 nvm = kzalloc(struct_size(nvm, channels, IWL_NUM_CHANNELS), GFP_KERNEL); 2045 if (!nvm) { 2046 ret = -ENOMEM; 2047 goto out; 2048 } 2049 2050 iwl_set_hw_address_from_csr(trans, nvm); 2051 /* TODO: if platform NVM has MAC address - override it here */ 2052 2053 if (!is_valid_ether_addr(nvm->hw_addr)) { 2054 IWL_ERR(trans, "no valid mac address was found\n"); 2055 ret = -EINVAL; 2056 goto err_free; 2057 } 2058 2059 IWL_INFO(trans, "base HW address: %pM\n", nvm->hw_addr); 2060 2061 /* Initialize general data */ 2062 nvm->nvm_version = le16_to_cpu(rsp->general.nvm_version); 2063 nvm->n_hw_addrs = rsp->general.n_hw_addrs; 2064 if (nvm->n_hw_addrs == 0) 2065 IWL_WARN(trans, 2066 "Firmware declares no reserved mac addresses. OTP is empty: %d\n", 2067 empty_otp); 2068 2069 /* Initialize MAC sku data */ 2070 mac_flags = le32_to_cpu(rsp->mac_sku.mac_sku_flags); 2071 nvm->sku_cap_11ac_enable = 2072 !!(mac_flags & NVM_MAC_SKU_FLAGS_802_11AC_ENABLED); 2073 nvm->sku_cap_11n_enable = 2074 !!(mac_flags & NVM_MAC_SKU_FLAGS_802_11N_ENABLED); 2075 nvm->sku_cap_11ax_enable = 2076 !!(mac_flags & NVM_MAC_SKU_FLAGS_802_11AX_ENABLED); 2077 nvm->sku_cap_band_24ghz_enable = 2078 !!(mac_flags & NVM_MAC_SKU_FLAGS_BAND_2_4_ENABLED); 2079 nvm->sku_cap_band_52ghz_enable = 2080 !!(mac_flags & NVM_MAC_SKU_FLAGS_BAND_5_2_ENABLED); 2081 nvm->sku_cap_mimo_disabled = 2082 !!(mac_flags & NVM_MAC_SKU_FLAGS_MIMO_DISABLED); 2083 if (CSR_HW_RFID_TYPE(trans->info.hw_rf_id) >= IWL_CFG_RF_TYPE_FM) 2084 nvm->sku_cap_11be_enable = true; 2085 2086 /* Initialize PHY sku data */ 2087 nvm->valid_tx_ant = (u8)le32_to_cpu(rsp->phy_sku.tx_chains); 2088 nvm->valid_rx_ant = (u8)le32_to_cpu(rsp->phy_sku.rx_chains); 2089 2090 if (le32_to_cpu(rsp->regulatory.lar_enabled) && 2091 fw_has_capa(&fw->ucode_capa, 2092 IWL_UCODE_TLV_CAPA_LAR_SUPPORT)) { 2093 nvm->lar_enabled = true; 2094 sbands_flags |= IWL_NVM_SBANDS_FLAGS_LAR; 2095 } 2096 2097 rsp_v3 = (void *)rsp; 2098 channel_profile = v4 ? (void *)rsp->regulatory.channel_profile : 2099 (void *)rsp_v3->regulatory.channel_profile; 2100 2101 tx_ant = nvm->valid_tx_ant & fw->valid_tx_ant; 2102 rx_ant = nvm->valid_rx_ant & fw->valid_rx_ant; 2103 2104 if (set_tx_ant) 2105 tx_ant &= set_tx_ant; 2106 if (set_rx_ant) 2107 rx_ant &= set_rx_ant; 2108 2109 iwl_init_sbands(trans, nvm, channel_profile, tx_ant, rx_ant, 2110 sbands_flags, v4, fw); 2111 2112 iwl_free_resp(&hcmd); 2113 return nvm; 2114 2115 err_free: 2116 kfree(nvm); 2117 out: 2118 iwl_free_resp(&hcmd); 2119 return ERR_PTR(ret); 2120 } 2121 IWL_EXPORT_SYMBOL(iwl_get_nvm); 2122