1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ 2 /* 3 * Copyright (C) 2005-2014, 2018-2021 Intel Corporation 4 * Copyright (C) 2016-2017 Intel Deutschland GmbH 5 * Copyright (C) 2018-2025 Intel Corporation 6 */ 7 #ifndef __IWL_CONFIG_H__ 8 #define __IWL_CONFIG_H__ 9 10 #include <linux/types.h> 11 #include <linux/netdevice.h> 12 #include <linux/ieee80211.h> 13 #include <linux/nl80211.h> 14 #include <linux/mod_devicetable.h> 15 #include "iwl-csr.h" 16 #include "iwl-drv.h" 17 18 enum iwl_device_family { 19 IWL_DEVICE_FAMILY_UNDEFINED, 20 IWL_DEVICE_FAMILY_1000, 21 IWL_DEVICE_FAMILY_100, 22 IWL_DEVICE_FAMILY_2000, 23 IWL_DEVICE_FAMILY_2030, 24 IWL_DEVICE_FAMILY_105, 25 IWL_DEVICE_FAMILY_135, 26 IWL_DEVICE_FAMILY_5000, 27 IWL_DEVICE_FAMILY_5150, 28 IWL_DEVICE_FAMILY_6000, 29 IWL_DEVICE_FAMILY_6000i, 30 IWL_DEVICE_FAMILY_6005, 31 IWL_DEVICE_FAMILY_6030, 32 IWL_DEVICE_FAMILY_6050, 33 IWL_DEVICE_FAMILY_6150, 34 IWL_DEVICE_FAMILY_7000, 35 IWL_DEVICE_FAMILY_8000, 36 IWL_DEVICE_FAMILY_9000, 37 IWL_DEVICE_FAMILY_22000, 38 IWL_DEVICE_FAMILY_AX210, 39 IWL_DEVICE_FAMILY_BZ, 40 IWL_DEVICE_FAMILY_SC, 41 IWL_DEVICE_FAMILY_DR, 42 }; 43 44 /* 45 * LED mode 46 * IWL_LED_DEFAULT: use device default 47 * IWL_LED_RF_STATE: turn LED on/off based on RF state 48 * LED ON = RF ON 49 * LED OFF = RF OFF 50 * IWL_LED_BLINK: adjust led blink rate based on blink table 51 * IWL_LED_DISABLE: led disabled 52 */ 53 enum iwl_led_mode { 54 IWL_LED_DEFAULT, 55 IWL_LED_RF_STATE, 56 IWL_LED_BLINK, 57 IWL_LED_DISABLE, 58 }; 59 60 /** 61 * enum iwl_nvm_type - nvm formats 62 * @IWL_NVM: the regular format 63 * @IWL_NVM_EXT: extended NVM format 64 * @IWL_NVM_SDP: NVM format used by 3168 series 65 */ 66 enum iwl_nvm_type { 67 IWL_NVM, 68 IWL_NVM_EXT, 69 IWL_NVM_SDP, 70 }; 71 72 /* 73 * This is the threshold value of plcp error rate per 100mSecs. It is 74 * used to set and check for the validity of plcp_delta. 75 */ 76 #define IWL_MAX_PLCP_ERR_THRESHOLD_MIN 1 77 #define IWL_MAX_PLCP_ERR_THRESHOLD_DEF 50 78 #define IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF 100 79 #define IWL_MAX_PLCP_ERR_EXT_LONG_THRESHOLD_DEF 200 80 #define IWL_MAX_PLCP_ERR_THRESHOLD_MAX 255 81 #define IWL_MAX_PLCP_ERR_THRESHOLD_DISABLE 0 82 83 /* TX queue watchdog timeouts in mSecs */ 84 #define IWL_WATCHDOG_DISABLED 0 85 #define IWL_DEF_WD_TIMEOUT 2500 86 #define IWL_LONG_WD_TIMEOUT 10000 87 #define IWL_MAX_WD_TIMEOUT 120000 88 89 #define IWL_DEFAULT_MAX_TX_POWER 22 90 #define IWL_TX_CSUM_NETIF_FLAGS (NETIF_F_IPV6_CSUM | NETIF_F_IP_CSUM |\ 91 NETIF_F_TSO | NETIF_F_TSO6) 92 #define IWL_CSUM_NETIF_FLAGS_MASK (IWL_TX_CSUM_NETIF_FLAGS | NETIF_F_RXCSUM) 93 94 /* Antenna presence definitions */ 95 #define ANT_NONE 0x0 96 #define ANT_INVALID 0xff 97 #define ANT_A BIT(0) 98 #define ANT_B BIT(1) 99 #define ANT_C BIT(2) 100 #define ANT_AB (ANT_A | ANT_B) 101 #define ANT_AC (ANT_A | ANT_C) 102 #define ANT_BC (ANT_B | ANT_C) 103 #define ANT_ABC (ANT_A | ANT_B | ANT_C) 104 105 106 #define IWL_FW_AND_PNVM(pfx, api) \ 107 MODULE_FIRMWARE(pfx "-" __stringify(api) ".ucode"); \ 108 MODULE_FIRMWARE(pfx ".pnvm") 109 110 static inline u8 num_of_ant(u8 mask) 111 { 112 return !!((mask) & ANT_A) + 113 !!((mask) & ANT_B) + 114 !!((mask) & ANT_C); 115 } 116 117 /** 118 * struct iwl_fw_mon_reg - FW monitor register info 119 * @addr: register address 120 * @mask: register mask 121 */ 122 struct iwl_fw_mon_reg { 123 u32 addr; 124 u32 mask; 125 }; 126 127 /** 128 * struct iwl_fw_mon_regs - FW monitor registers 129 * @write_ptr: write pointer register 130 * @cycle_cnt: cycle count register 131 * @cur_frag: current fragment in use 132 */ 133 struct iwl_fw_mon_regs { 134 struct iwl_fw_mon_reg write_ptr; 135 struct iwl_fw_mon_reg cycle_cnt; 136 struct iwl_fw_mon_reg cur_frag; 137 }; 138 139 /** 140 * struct iwl_family_base_params - base parameters for an entire family 141 * @max_ll_items: max number of OTP blocks 142 * @shadow_ram_support: shadow support for OTP memory 143 * @led_compensation: compensate on the led on/off time per HW according 144 * to the deviation to achieve the desired led frequency. 145 * The detail algorithm is described in iwl-led.c 146 * @wd_timeout: TX queues watchdog timeout 147 * @max_event_log_size: size of event log buffer size for ucode event logging 148 * @shadow_reg_enable: HW shadow register support 149 * @apmg_not_supported: there's no APMG 150 * @apmg_wake_up_wa: should the MAC access REQ be asserted when a command 151 * is in flight. This is due to a HW bug in 7260, 3160 and 7265. 152 * @scd_chain_ext_wa: should the chain extension feature in SCD be disabled. 153 * @max_tfd_queue_size: max number of entries in tfd queue. 154 * @eeprom_size: EEPROM size 155 * @num_of_queues: number of HW TX queues supported 156 * @pcie_l1_allowed: PCIe L1 state is allowed 157 * @pll_cfg: PLL configuration needed 158 * @nvm_hw_section_num: the ID of the HW NVM section 159 * @features: hw features, any combination of feature_passlist 160 * @smem_offset: offset from which the SMEM begins 161 * @smem_len: the length of SMEM 162 * @mac_addr_from_csr: read HW address from CSR registers at this offset 163 * @d3_debug_data_base_addr: base address where D3 debug data is stored 164 * @d3_debug_data_length: length of the D3 debug data 165 * @min_ba_txq_size: minimum number of slots required in a TX queue used 166 * for aggregation 167 * @min_txq_size: minimum number of slots required in a TX queue 168 * @gp2_reg_addr: GP2 (timer) register address 169 * @min_umac_error_event_table: minimum SMEM location of UMAC error table 170 * @mon_dbgi_regs: monitor DBGI registers 171 * @mon_dram_regs: monitor DRAM registers 172 * @mon_smem_regs: monitor SMEM registers 173 * @ucode_api_max: Highest version of uCode API supported by driver. 174 * @ucode_api_min: Lowest version of uCode API supported by driver. 175 */ 176 struct iwl_family_base_params { 177 unsigned int wd_timeout; 178 179 u16 eeprom_size; 180 u16 max_event_log_size; 181 182 u8 pll_cfg:1, /* for iwl_pcie_apm_init() */ 183 shadow_ram_support:1, 184 shadow_reg_enable:1, 185 pcie_l1_allowed:1, 186 apmg_wake_up_wa:1, 187 apmg_not_supported:1, 188 scd_chain_ext_wa:1; 189 190 u16 num_of_queues; /* def: HW dependent */ 191 u32 max_tfd_queue_size; /* def: HW dependent */ 192 193 u8 max_ll_items; 194 u8 led_compensation; 195 u8 ucode_api_max; 196 u8 ucode_api_min; 197 u32 mac_addr_from_csr:10; 198 u8 nvm_hw_section_num; 199 netdev_features_t features; 200 u32 smem_offset; 201 u32 smem_len; 202 u32 min_umac_error_event_table; 203 u32 d3_debug_data_base_addr; 204 u32 d3_debug_data_length; 205 u32 min_txq_size; 206 u32 gp2_reg_addr; 207 u32 min_ba_txq_size; 208 const struct iwl_fw_mon_regs mon_dram_regs; 209 const struct iwl_fw_mon_regs mon_smem_regs; 210 const struct iwl_fw_mon_regs mon_dbgi_regs; 211 }; 212 213 /* 214 * @stbc: support Tx STBC and 1*SS Rx STBC 215 * @ldpc: support Tx/Rx with LDPC 216 * @use_rts_for_aggregation: use rts/cts protection for HT traffic 217 * @ht40_bands: bitmap of bands (using %NL80211_BAND_*) that support HT40 218 */ 219 struct iwl_ht_params { 220 u8 ht_greenfield_support:1, 221 stbc:1, 222 ldpc:1, 223 use_rts_for_aggregation:1; 224 u8 ht40_bands; 225 }; 226 227 /* 228 * Tx-backoff threshold 229 * @temperature: The threshold in Celsius 230 * @backoff: The tx-backoff in uSec 231 */ 232 struct iwl_tt_tx_backoff { 233 s32 temperature; 234 u32 backoff; 235 }; 236 237 #define TT_TX_BACKOFF_SIZE 6 238 239 /** 240 * struct iwl_tt_params - thermal throttling parameters 241 * @ct_kill_entry: CT Kill entry threshold 242 * @ct_kill_exit: CT Kill exit threshold 243 * @ct_kill_duration: The time intervals (in uSec) in which the driver needs 244 * to checks whether to exit CT Kill. 245 * @dynamic_smps_entry: Dynamic SMPS entry threshold 246 * @dynamic_smps_exit: Dynamic SMPS exit threshold 247 * @tx_protection_entry: TX protection entry threshold 248 * @tx_protection_exit: TX protection exit threshold 249 * @tx_backoff: Array of thresholds for tx-backoff , in ascending order. 250 * @support_ct_kill: Support CT Kill? 251 * @support_dynamic_smps: Support dynamic SMPS? 252 * @support_tx_protection: Support tx protection? 253 * @support_tx_backoff: Support tx-backoff? 254 */ 255 struct iwl_tt_params { 256 u32 ct_kill_entry; 257 u32 ct_kill_exit; 258 u32 ct_kill_duration; 259 u32 dynamic_smps_entry; 260 u32 dynamic_smps_exit; 261 u32 tx_protection_entry; 262 u32 tx_protection_exit; 263 struct iwl_tt_tx_backoff tx_backoff[TT_TX_BACKOFF_SIZE]; 264 u8 support_ct_kill:1, 265 support_dynamic_smps:1, 266 support_tx_protection:1, 267 support_tx_backoff:1; 268 }; 269 270 /* 271 * information on how to parse the EEPROM 272 */ 273 #define EEPROM_REG_BAND_1_CHANNELS 0x08 274 #define EEPROM_REG_BAND_2_CHANNELS 0x26 275 #define EEPROM_REG_BAND_3_CHANNELS 0x42 276 #define EEPROM_REG_BAND_4_CHANNELS 0x5C 277 #define EEPROM_REG_BAND_5_CHANNELS 0x74 278 #define EEPROM_REG_BAND_24_HT40_CHANNELS 0x82 279 #define EEPROM_REG_BAND_52_HT40_CHANNELS 0x92 280 #define EEPROM_6000_REG_BAND_24_HT40_CHANNELS 0x80 281 #define EEPROM_REGULATORY_BAND_NO_HT40 0 282 283 /* lower blocks contain EEPROM image and calibration data */ 284 #define OTP_LOW_IMAGE_SIZE_2K (2 * 512 * sizeof(u16)) /* 2 KB */ 285 #define OTP_LOW_IMAGE_SIZE_16K (16 * 512 * sizeof(u16)) /* 16 KB */ 286 #define OTP_LOW_IMAGE_SIZE_32K (32 * 512 * sizeof(u16)) /* 32 KB */ 287 288 struct iwl_eeprom_params { 289 const u8 regulatory_bands[7]; 290 bool enhanced_txpower; 291 }; 292 293 /* Tx-backoff power threshold 294 * @pwr: The power limit in mw 295 * @backoff: The tx-backoff in uSec 296 */ 297 struct iwl_pwr_tx_backoff { 298 u32 pwr; 299 u32 backoff; 300 }; 301 302 enum iwl_mac_cfg_ltr_delay { 303 IWL_CFG_TRANS_LTR_DELAY_NONE = 0, 304 IWL_CFG_TRANS_LTR_DELAY_200US = 1, 305 IWL_CFG_TRANS_LTR_DELAY_2500US = 2, 306 IWL_CFG_TRANS_LTR_DELAY_1820US = 3, 307 }; 308 309 /** 310 * struct iwl_mac_cfg - information about the MAC-specific device part 311 * 312 * These values are specific to the device ID and do not change when 313 * multiple configs are used for a single device ID. They values are 314 * used, among other things, to boot the NIC so that the HW REV or 315 * RFID can be read before deciding the remaining parameters to use. 316 * 317 * @base: pointer to basic parameters 318 * @device_family: the device family 319 * @umac_prph_offset: offset to add to UMAC periphery address 320 * @xtal_latency: power up latency to get the xtal stabilized 321 * @extra_phy_cfg_flags: extra configuration flags to pass to the PHY 322 * @gen2: 22000 and on transport operation 323 * @mq_rx_supported: multi-queue rx support 324 * @integrated: discrete or integrated 325 * @low_latency_xtal: use the low latency xtal if supported 326 * @bisr_workaround: BISR hardware workaround (for 22260 series devices) 327 * @ltr_delay: LTR delay parameter, &enum iwl_mac_cfg_ltr_delay. 328 * @imr_enabled: use the IMR if supported. 329 */ 330 struct iwl_mac_cfg { 331 const struct iwl_family_base_params *base; 332 enum iwl_device_family device_family; 333 u32 umac_prph_offset; 334 u32 xtal_latency; 335 u32 extra_phy_cfg_flags; 336 u32 gen2:1, 337 mq_rx_supported:1, 338 integrated:1, 339 low_latency_xtal:1, 340 bisr_workaround:1, 341 ltr_delay:2, 342 imr_enabled:1; 343 }; 344 345 /* 346 * These sizes were picked according to 8 MSDUs inside 64/256/612 A-MSDUs 347 * in an A-MPDU, with additional overhead to account for processing time. 348 * They will be doubled for MACs starting from So/Ty that don't support 349 * putting multiple frames into a single buffer. 350 */ 351 #define IWL_NUM_RBDS_NON_HE (64 * 8) 352 #define IWL_NUM_RBDS_HE (256 * 8) 353 #define IWL_NUM_RBDS_EHT (512 * 8) 354 355 /** 356 * struct iwl_rf_cfg 357 * @fw_name_pre: Firmware filename prefix. The api version and extension 358 * (.ucode) will be added to filename before loading from disk. The 359 * filename is constructed as <fw_name_pre>-<api>.ucode. 360 * name will be generated dynamically 361 * @ucode_api_max: Highest version of uCode API supported by driver. 362 * @ucode_api_min: Lowest version of uCode API supported by driver. 363 * @max_inst_size: The maximal length of the fw inst section (only DVM) 364 * @max_data_size: The maximal length of the fw data section (only DVM) 365 * @valid_tx_ant: valid transmit antenna 366 * @valid_rx_ant: valid receive antenna 367 * @non_shared_ant: the antenna that is for WiFi only 368 * @nvm_ver: NVM version 369 * @nvm_calib_ver: NVM calibration version 370 * @bw_limit: bandwidth limit for this device, if non-zero 371 * @ht_params: point to ht parameters 372 * @eeprom_params: EEPROM parameters (old devices) 373 * @thermal_params: Thermal throttling parameters 374 * @lp_xtal_workaround: low-power crystal workaround needed 375 * @led_mode: 0=blinking, 1=On(RF On)/Off(RF Off) 376 * @rx_with_siso_diversity: 1x1 device with rx antenna diversity 377 * @tx_with_siso_diversity: 1x1 device with tx antenna diversity 378 * @internal_wimax_coex: internal wifi/wimax combo device 379 * @host_interrupt_operation_mode: device needs host interrupt operation 380 * mode set 381 * @pwr_tx_backoffs: translation table between power limits and backoffs 382 * @dccm_offset: offset from which DCCM begins 383 * @dccm_len: length of DCCM (including runtime stack CCM) 384 * @dccm2_offset: offset from which the second DCCM begins 385 * @dccm2_len: length of the second DCCM 386 * @vht_mu_mimo_supported: VHT MU-MIMO support 387 * @nvm_type: see &enum iwl_nvm_type 388 * @uhb_supported: ultra high band channels supported 389 * @num_rbds: number of receive buffer descriptors to use 390 * (only used for multi-queue capable devices) 391 * 392 * We enable the driver to be backward compatible wrt. hardware features. 393 * API differences in uCode shouldn't be handled here but through TLVs 394 * and/or the uCode API version instead. 395 */ 396 struct iwl_rf_cfg { 397 /* params specific to an individual device within a device family */ 398 const char *fw_name_pre; 399 /* params likely to change within a device family */ 400 const struct iwl_ht_params ht_params; 401 const struct iwl_eeprom_params *eeprom_params; 402 const struct iwl_pwr_tx_backoff *pwr_tx_backoffs; 403 const struct iwl_tt_params *thermal_params; 404 enum iwl_led_mode led_mode; 405 enum iwl_nvm_type nvm_type; 406 u32 max_data_size; 407 u32 max_inst_size; 408 u32 dccm_offset; 409 u32 dccm_len; 410 u32 dccm2_offset; 411 u32 dccm2_len; 412 u16 nvm_ver; 413 u16 nvm_calib_ver; 414 u16 bw_limit; 415 u32 rx_with_siso_diversity:1, 416 tx_with_siso_diversity:1, 417 internal_wimax_coex:1, 418 host_interrupt_operation_mode:1, 419 lp_xtal_workaround:1, 420 vht_mu_mimo_supported:1, 421 uhb_supported:1; 422 u8 valid_tx_ant; 423 u8 valid_rx_ant; 424 u8 non_shared_ant; 425 u8 ucode_api_max; 426 u8 ucode_api_min; 427 u16 num_rbds; 428 }; 429 430 #define IWL_CFG_ANY (~0) 431 432 #define IWL_CFG_MAC_TYPE_PU 0x31 433 #define IWL_CFG_MAC_TYPE_TH 0x32 434 #define IWL_CFG_MAC_TYPE_QU 0x33 435 #define IWL_CFG_MAC_TYPE_CC 0x34 436 #define IWL_CFG_MAC_TYPE_QUZ 0x35 437 #define IWL_CFG_MAC_TYPE_SO 0x37 438 #define IWL_CFG_MAC_TYPE_TY 0x42 439 #define IWL_CFG_MAC_TYPE_SOF 0x43 440 #define IWL_CFG_MAC_TYPE_MA 0x44 441 #define IWL_CFG_MAC_TYPE_BZ 0x46 442 #define IWL_CFG_MAC_TYPE_GL 0x47 443 #define IWL_CFG_MAC_TYPE_SC 0x48 444 #define IWL_CFG_MAC_TYPE_SC2 0x49 445 #define IWL_CFG_MAC_TYPE_SC2F 0x4A 446 #define IWL_CFG_MAC_TYPE_BZ_W 0x4B 447 #define IWL_CFG_MAC_TYPE_BR 0x4C 448 #define IWL_CFG_MAC_TYPE_DR 0x4D 449 450 #define IWL_CFG_RF_TYPE_JF2 0x105 451 #define IWL_CFG_RF_TYPE_JF1 0x108 452 #define IWL_CFG_RF_TYPE_HR2 0x10A 453 #define IWL_CFG_RF_TYPE_HR1 0x10C 454 #define IWL_CFG_RF_TYPE_GF 0x10D 455 #define IWL_CFG_RF_TYPE_FM 0x112 456 #define IWL_CFG_RF_TYPE_WH 0x113 457 #define IWL_CFG_RF_TYPE_PE 0x114 458 459 #define IWL_CFG_RF_ID_TH 0x1 460 #define IWL_CFG_RF_ID_TH1 0x1 461 #define IWL_CFG_RF_ID_JF 0x3 462 #define IWL_CFG_RF_ID_JF1 0x6 463 #define IWL_CFG_RF_ID_JF1_DIV 0xA 464 #define IWL_CFG_RF_ID_HR 0x7 465 #define IWL_CFG_RF_ID_HR1 0x4 466 467 #define IWL_CFG_CORES_BT 0x0 468 #define IWL_CFG_CORES_BT_GNSS 0x5 469 470 #define IWL_CFG_NO_CDB 0x0 471 #define IWL_CFG_CDB 0x1 472 473 #define IWL_CFG_NO_JACKET 0x0 474 #define IWL_CFG_IS_JACKET 0x1 475 476 #define IWL_SUBDEVICE_RF_ID(subdevice) ((u16)((subdevice) & 0x00F0) >> 4) 477 #define IWL_SUBDEVICE_BW_LIM(subdevice) ((u16)((subdevice) & 0x0200) >> 9) 478 #define IWL_SUBDEVICE_CORES(subdevice) ((u16)((subdevice) & 0x1C00) >> 10) 479 480 struct iwl_dev_info { 481 const struct iwl_rf_cfg *cfg; 482 const char *name; 483 u16 device; 484 u16 subdevice; 485 u32 subdevice_m_l:4, 486 subdevice_m_h:4, 487 match_rf_type:1, 488 rf_type:9, 489 match_bw_limit:1, 490 bw_limit:1, 491 match_rf_step:1, 492 rf_step:4, 493 match_rf_id:1, 494 rf_id:4, 495 match_cdb:1, 496 cdb:1; 497 }; 498 499 #if IS_ENABLED(CONFIG_IWLWIFI_KUNIT_TESTS) 500 extern const struct iwl_dev_info iwl_dev_info_table[]; 501 extern const unsigned int iwl_dev_info_table_size; 502 const struct iwl_dev_info * 503 iwl_pci_find_dev_info(u16 device, u16 subsystem_device, u16 rf_type, u8 cdb, 504 u8 rf_id, u8 bw_limit, u8 rf_step); 505 extern const struct pci_device_id iwl_hw_card_ids[]; 506 #endif 507 508 /* 509 * This list declares the config structures for all devices. 510 */ 511 extern const struct iwl_mac_cfg iwl1000_mac_cfg; 512 extern const struct iwl_mac_cfg iwl5000_mac_cfg; 513 extern const struct iwl_mac_cfg iwl2000_mac_cfg; 514 extern const struct iwl_mac_cfg iwl2030_mac_cfg; 515 extern const struct iwl_mac_cfg iwl105_mac_cfg; 516 extern const struct iwl_mac_cfg iwl135_mac_cfg; 517 extern const struct iwl_mac_cfg iwl5150_mac_cfg; 518 extern const struct iwl_mac_cfg iwl6005_mac_cfg; 519 extern const struct iwl_mac_cfg iwl6030_mac_cfg; 520 extern const struct iwl_mac_cfg iwl6000i_mac_cfg; 521 extern const struct iwl_mac_cfg iwl6050_mac_cfg; 522 extern const struct iwl_mac_cfg iwl6150_mac_cfg; 523 extern const struct iwl_mac_cfg iwl6000_mac_cfg; 524 extern const struct iwl_mac_cfg iwl7000_mac_cfg; 525 extern const struct iwl_mac_cfg iwl8000_mac_cfg; 526 extern const struct iwl_mac_cfg iwl9000_mac_cfg; 527 extern const struct iwl_mac_cfg iwl9560_mac_cfg; 528 extern const struct iwl_mac_cfg iwl9560_long_latency_mac_cfg; 529 extern const struct iwl_mac_cfg iwl9560_shared_clk_mac_cfg; 530 extern const struct iwl_mac_cfg iwl_qu_mac_cfg; 531 extern const struct iwl_mac_cfg iwl_qu_medium_latency_mac_cfg; 532 extern const struct iwl_mac_cfg iwl_qu_long_latency_mac_cfg; 533 extern const struct iwl_mac_cfg iwl_ax200_mac_cfg; 534 extern const struct iwl_mac_cfg iwl_ty_mac_cfg; 535 extern const struct iwl_mac_cfg iwl_so_mac_cfg; 536 extern const struct iwl_mac_cfg iwl_so_long_latency_mac_cfg; 537 extern const struct iwl_mac_cfg iwl_so_long_latency_imr_mac_cfg; 538 extern const struct iwl_mac_cfg iwl_ma_mac_cfg; 539 extern const struct iwl_mac_cfg iwl_bz_mac_cfg; 540 extern const struct iwl_mac_cfg iwl_gl_mac_cfg; 541 extern const struct iwl_mac_cfg iwl_sc_mac_cfg; 542 extern const struct iwl_mac_cfg iwl_dr_mac_cfg; 543 544 extern const char iwl1000_bgn_name[]; 545 extern const char iwl1000_bg_name[]; 546 extern const char iwl100_bgn_name[]; 547 extern const char iwl100_bg_name[]; 548 extern const char iwl2000_2bgn_name[]; 549 extern const char iwl2000_2bgn_d_name[]; 550 extern const char iwl2030_2bgn_name[]; 551 extern const char iwl105_bgn_name[]; 552 extern const char iwl105_bgn_d_name[]; 553 extern const char iwl135_bgn_name[]; 554 extern const char iwl5300_agn_name[]; 555 extern const char iwl5100_bgn_name[]; 556 extern const char iwl5100_abg_name[]; 557 extern const char iwl5100_agn_name[]; 558 extern const char iwl5350_agn_name[]; 559 extern const char iwl5150_agn_name[]; 560 extern const char iwl5150_abg_name[]; 561 extern const char iwl6005_2agn_name[]; 562 extern const char iwl6005_2abg_name[]; 563 extern const char iwl6005_2bg_name[]; 564 extern const char iwl6005_2agn_sff_name[]; 565 extern const char iwl6005_2agn_d_name[]; 566 extern const char iwl6005_2agn_mow1_name[]; 567 extern const char iwl6005_2agn_mow2_name[]; 568 extern const char iwl6030_2agn_name[]; 569 extern const char iwl6030_2abg_name[]; 570 extern const char iwl6030_2bgn_name[]; 571 extern const char iwl6030_2bg_name[]; 572 extern const char iwl6035_2agn_name[]; 573 extern const char iwl6035_2agn_sff_name[]; 574 extern const char iwl1030_bgn_name[]; 575 extern const char iwl1030_bg_name[]; 576 extern const char iwl130_bgn_name[]; 577 extern const char iwl130_bg_name[]; 578 extern const char iwl6000i_2agn_name[]; 579 extern const char iwl6000i_2abg_name[]; 580 extern const char iwl6000i_2bg_name[]; 581 extern const char iwl6050_2agn_name[]; 582 extern const char iwl6050_2abg_name[]; 583 extern const char iwl6150_bgn_name[]; 584 extern const char iwl6150_bg_name[]; 585 extern const char iwl6000_3agn_name[]; 586 extern const char iwl7260_2ac_name[]; 587 extern const char iwl7260_2n_name[]; 588 extern const char iwl7260_n_name[]; 589 extern const char iwl3160_2ac_name[]; 590 extern const char iwl3160_2n_name[]; 591 extern const char iwl3160_n_name[]; 592 extern const char iwl3165_2ac_name[]; 593 extern const char iwl3168_2ac_name[]; 594 extern const char iwl7265_2ac_name[]; 595 extern const char iwl7265_2n_name[]; 596 extern const char iwl7265_n_name[]; 597 extern const char iwl8260_2n_name[]; 598 extern const char iwl8260_2ac_name[]; 599 extern const char iwl8265_2ac_name[]; 600 extern const char iwl8275_2ac_name[]; 601 extern const char iwl4165_2ac_name[]; 602 extern const char iwl_killer_1435i_name[]; 603 extern const char iwl_killer_1434_kix_name[]; 604 extern const char iwl9162_name[]; 605 extern const char iwl9260_name[]; 606 extern const char iwl9260_1_name[]; 607 extern const char iwl9270_name[]; 608 extern const char iwl9461_name[]; 609 extern const char iwl9462_name[]; 610 extern const char iwl9560_name[]; 611 extern const char iwl9162_160_name[]; 612 extern const char iwl9260_160_name[]; 613 extern const char iwl9270_160_name[]; 614 extern const char iwl9461_160_name[]; 615 extern const char iwl9462_160_name[]; 616 extern const char iwl9560_160_name[]; 617 extern const char iwl9260_killer_1550_name[]; 618 extern const char iwl9560_killer_1550i_name[]; 619 extern const char iwl9560_killer_1550s_name[]; 620 extern const char iwl_ax200_name[]; 621 extern const char iwl_ax203_name[]; 622 extern const char iwl_ax201_name[]; 623 extern const char iwl_ax101_name[]; 624 extern const char iwl_ax200_killer_1650w_name[]; 625 extern const char iwl_ax200_killer_1650x_name[]; 626 extern const char iwl_ax201_killer_1650s_name[]; 627 extern const char iwl_ax201_killer_1650i_name[]; 628 extern const char iwl_ax210_killer_1675w_name[]; 629 extern const char iwl_ax210_killer_1675x_name[]; 630 extern const char iwl9560_killer_1550i_160_name[]; 631 extern const char iwl9560_killer_1550s_160_name[]; 632 extern const char iwl_ax211_killer_1675s_name[]; 633 extern const char iwl_ax211_killer_1675i_name[]; 634 extern const char iwl_ax411_killer_1690s_name[]; 635 extern const char iwl_ax411_killer_1690i_name[]; 636 extern const char iwl_ax210_name[]; 637 extern const char iwl_ax211_name[]; 638 extern const char iwl_ax411_name[]; 639 extern const char iwl_killer_be1750s_name[]; 640 extern const char iwl_killer_be1750i_name[]; 641 extern const char iwl_killer_be1750w_name[]; 642 extern const char iwl_killer_be1750x_name[]; 643 extern const char iwl_killer_be1790s_name[]; 644 extern const char iwl_killer_be1790i_name[]; 645 extern const char iwl_be201_name[]; 646 extern const char iwl_be200_name[]; 647 extern const char iwl_be202_name[]; 648 extern const char iwl_be401_name[]; 649 extern const char iwl_be213_name[]; 650 extern const char iwl_killer_be1775s_name[]; 651 extern const char iwl_killer_be1775i_name[]; 652 extern const char iwl_be211_name[]; 653 extern const char iwl_killer_bn1850w2_name[]; 654 extern const char iwl_killer_bn1850i_name[]; 655 extern const char iwl_bn201_name[]; 656 extern const char iwl_be221_name[]; 657 extern const char iwl_be223_name[]; 658 #if IS_ENABLED(CONFIG_IWLDVM) 659 extern const struct iwl_rf_cfg iwl5300_agn_cfg; 660 extern const struct iwl_rf_cfg iwl5350_agn_cfg; 661 extern const struct iwl_rf_cfg iwl5100_n_cfg; 662 extern const struct iwl_rf_cfg iwl5100_abg_cfg; 663 extern const struct iwl_rf_cfg iwl5150_agn_cfg; 664 extern const struct iwl_rf_cfg iwl5150_abg_cfg; 665 extern const struct iwl_rf_cfg iwl6005_non_n_cfg; 666 extern const struct iwl_rf_cfg iwl6005_n_cfg; 667 extern const struct iwl_rf_cfg iwl6030_n_cfg; 668 extern const struct iwl_rf_cfg iwl6030_non_n_cfg; 669 extern const struct iwl_rf_cfg iwl6000i_2agn_cfg; 670 extern const struct iwl_rf_cfg iwl6000i_non_n_cfg; 671 extern const struct iwl_rf_cfg iwl6000i_non_n_cfg; 672 extern const struct iwl_rf_cfg iwl6000_3agn_cfg; 673 extern const struct iwl_rf_cfg iwl6050_2agn_cfg; 674 extern const struct iwl_rf_cfg iwl6050_2abg_cfg; 675 extern const struct iwl_rf_cfg iwl6150_bgn_cfg; 676 extern const struct iwl_rf_cfg iwl6150_bg_cfg; 677 extern const struct iwl_rf_cfg iwl1000_bgn_cfg; 678 extern const struct iwl_rf_cfg iwl1000_bg_cfg; 679 extern const struct iwl_rf_cfg iwl100_bgn_cfg; 680 extern const struct iwl_rf_cfg iwl100_bg_cfg; 681 extern const struct iwl_rf_cfg iwl130_bgn_cfg; 682 extern const struct iwl_rf_cfg iwl130_bg_cfg; 683 extern const struct iwl_rf_cfg iwl2000_2bgn_cfg; 684 extern const struct iwl_rf_cfg iwl2030_2bgn_cfg; 685 extern const struct iwl_rf_cfg iwl6035_2agn_cfg; 686 extern const struct iwl_rf_cfg iwl105_bgn_cfg; 687 extern const struct iwl_rf_cfg iwl135_bgn_cfg; 688 #endif /* CONFIG_IWLDVM */ 689 #if IS_ENABLED(CONFIG_IWLMVM) 690 extern const struct iwl_rf_cfg iwl7260_cfg; 691 extern const struct iwl_rf_cfg iwl7260_high_temp_cfg; 692 extern const struct iwl_rf_cfg iwl3160_cfg; 693 extern const struct iwl_rf_cfg iwl3165_2ac_cfg; 694 extern const struct iwl_rf_cfg iwl3168_2ac_cfg; 695 extern const struct iwl_rf_cfg iwl7265_cfg; 696 extern const struct iwl_rf_cfg iwl7265d_cfg; 697 extern const struct iwl_rf_cfg iwl8260_cfg; 698 extern const struct iwl_rf_cfg iwl8265_cfg; 699 extern const struct iwl_rf_cfg iwl_rf_jf; 700 extern const struct iwl_rf_cfg iwl_rf_jf_80mhz; 701 extern const struct iwl_rf_cfg iwl_rf_hr1; 702 extern const struct iwl_rf_cfg iwl_rf_hr; 703 extern const struct iwl_rf_cfg iwl_rf_hr_80mhz; 704 705 extern const struct iwl_rf_cfg iwl_rf_gf; 706 #endif /* CONFIG_IWLMVM */ 707 708 #if IS_ENABLED(CONFIG_IWLMLD) 709 extern const struct iwl_rf_cfg iwl_rf_fm; 710 extern const struct iwl_rf_cfg iwl_rf_fm_160mhz; 711 #define iwl_rf_wh iwl_rf_fm 712 #define iwl_rf_wh_160mhz iwl_rf_fm_160mhz 713 #define iwl_rf_pe iwl_rf_fm 714 #endif /* CONFIG_IWLMLD */ 715 716 #endif /* __IWL_CONFIG_H__ */ 717