1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ 2 /* 3 * Copyright (C) 2005-2014, 2018-2021 Intel Corporation 4 * Copyright (C) 2016-2017 Intel Deutschland GmbH 5 * Copyright (C) 2018-2025 Intel Corporation 6 */ 7 #ifndef __IWL_CONFIG_H__ 8 #define __IWL_CONFIG_H__ 9 10 #include <linux/types.h> 11 #include <linux/netdevice.h> 12 #include <linux/ieee80211.h> 13 #include <linux/nl80211.h> 14 #include <linux/mod_devicetable.h> 15 #include "iwl-csr.h" 16 #include "iwl-drv.h" 17 18 enum iwl_device_family { 19 IWL_DEVICE_FAMILY_UNDEFINED, 20 IWL_DEVICE_FAMILY_1000, 21 IWL_DEVICE_FAMILY_100, 22 IWL_DEVICE_FAMILY_2000, 23 IWL_DEVICE_FAMILY_2030, 24 IWL_DEVICE_FAMILY_105, 25 IWL_DEVICE_FAMILY_135, 26 IWL_DEVICE_FAMILY_5000, 27 IWL_DEVICE_FAMILY_5150, 28 IWL_DEVICE_FAMILY_6000, 29 IWL_DEVICE_FAMILY_6000i, 30 IWL_DEVICE_FAMILY_6005, 31 IWL_DEVICE_FAMILY_6030, 32 IWL_DEVICE_FAMILY_6050, 33 IWL_DEVICE_FAMILY_6150, 34 IWL_DEVICE_FAMILY_7000, 35 IWL_DEVICE_FAMILY_8000, 36 IWL_DEVICE_FAMILY_9000, 37 IWL_DEVICE_FAMILY_22000, 38 IWL_DEVICE_FAMILY_AX210, 39 IWL_DEVICE_FAMILY_BZ, 40 IWL_DEVICE_FAMILY_SC, 41 IWL_DEVICE_FAMILY_DR, 42 }; 43 44 /* 45 * LED mode 46 * IWL_LED_DEFAULT: use device default 47 * IWL_LED_RF_STATE: turn LED on/off based on RF state 48 * LED ON = RF ON 49 * LED OFF = RF OFF 50 * IWL_LED_BLINK: adjust led blink rate based on blink table 51 * IWL_LED_DISABLE: led disabled 52 */ 53 enum iwl_led_mode { 54 IWL_LED_DEFAULT, 55 IWL_LED_RF_STATE, 56 IWL_LED_BLINK, 57 IWL_LED_DISABLE, 58 }; 59 60 /** 61 * enum iwl_nvm_type - nvm formats 62 * @IWL_NVM: the regular format 63 * @IWL_NVM_EXT: extended NVM format 64 * @IWL_NVM_SDP: NVM format used by 3168 series 65 */ 66 enum iwl_nvm_type { 67 IWL_NVM, 68 IWL_NVM_EXT, 69 IWL_NVM_SDP, 70 }; 71 72 /* 73 * This is the threshold value of plcp error rate per 100mSecs. It is 74 * used to set and check for the validity of plcp_delta. 75 */ 76 #define IWL_MAX_PLCP_ERR_THRESHOLD_MIN 1 77 #define IWL_MAX_PLCP_ERR_THRESHOLD_DEF 50 78 #define IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF 100 79 #define IWL_MAX_PLCP_ERR_EXT_LONG_THRESHOLD_DEF 200 80 #define IWL_MAX_PLCP_ERR_THRESHOLD_MAX 255 81 #define IWL_MAX_PLCP_ERR_THRESHOLD_DISABLE 0 82 83 /* TX queue watchdog timeouts in mSecs */ 84 #define IWL_WATCHDOG_DISABLED 0 85 #define IWL_DEF_WD_TIMEOUT 2500 86 #define IWL_LONG_WD_TIMEOUT 10000 87 #define IWL_MAX_WD_TIMEOUT 120000 88 89 #define IWL_DEFAULT_MAX_TX_POWER 22 90 #define IWL_TX_CSUM_NETIF_FLAGS (NETIF_F_IPV6_CSUM | NETIF_F_IP_CSUM |\ 91 NETIF_F_TSO | NETIF_F_TSO6) 92 #define IWL_CSUM_NETIF_FLAGS_MASK (IWL_TX_CSUM_NETIF_FLAGS | NETIF_F_RXCSUM) 93 94 /* Antenna presence definitions */ 95 #define ANT_NONE 0x0 96 #define ANT_INVALID 0xff 97 #define ANT_A BIT(0) 98 #define ANT_B BIT(1) 99 #define ANT_C BIT(2) 100 #define ANT_AB (ANT_A | ANT_B) 101 #define ANT_AC (ANT_A | ANT_C) 102 #define ANT_BC (ANT_B | ANT_C) 103 #define ANT_ABC (ANT_A | ANT_B | ANT_C) 104 105 106 #define IWL_FW_AND_PNVM(pfx, api) \ 107 MODULE_FIRMWARE(pfx "-" __stringify(api) ".ucode"); \ 108 MODULE_FIRMWARE(pfx ".pnvm") 109 110 static inline u8 num_of_ant(u8 mask) 111 { 112 return !!((mask) & ANT_A) + 113 !!((mask) & ANT_B) + 114 !!((mask) & ANT_C); 115 } 116 117 /** 118 * struct iwl_base_params - params not likely to change within a device family 119 * @max_ll_items: max number of OTP blocks 120 * @shadow_ram_support: shadow support for OTP memory 121 * @led_compensation: compensate on the led on/off time per HW according 122 * to the deviation to achieve the desired led frequency. 123 * The detail algorithm is described in iwl-led.c 124 * @wd_timeout: TX queues watchdog timeout 125 * @max_event_log_size: size of event log buffer size for ucode event logging 126 * @shadow_reg_enable: HW shadow register support 127 * @apmg_wake_up_wa: should the MAC access REQ be asserted when a command 128 * is in flight. This is due to a HW bug in 7260, 3160 and 7265. 129 * @scd_chain_ext_wa: should the chain extension feature in SCD be disabled. 130 * @max_tfd_queue_size: max number of entries in tfd queue. 131 */ 132 struct iwl_base_params { 133 unsigned int wd_timeout; 134 135 u16 eeprom_size; 136 u16 max_event_log_size; 137 138 u8 pll_cfg:1, /* for iwl_pcie_apm_init() */ 139 shadow_ram_support:1, 140 shadow_reg_enable:1, 141 pcie_l1_allowed:1, 142 apmg_wake_up_wa:1, 143 scd_chain_ext_wa:1; 144 145 u16 num_of_queues; /* def: HW dependent */ 146 u32 max_tfd_queue_size; /* def: HW dependent */ 147 148 u8 max_ll_items; 149 u8 led_compensation; 150 }; 151 152 /* 153 * @stbc: support Tx STBC and 1*SS Rx STBC 154 * @ldpc: support Tx/Rx with LDPC 155 * @use_rts_for_aggregation: use rts/cts protection for HT traffic 156 * @ht40_bands: bitmap of bands (using %NL80211_BAND_*) that support HT40 157 */ 158 struct iwl_ht_params { 159 u8 ht_greenfield_support:1, 160 stbc:1, 161 ldpc:1, 162 use_rts_for_aggregation:1; 163 u8 ht40_bands; 164 }; 165 166 /* 167 * Tx-backoff threshold 168 * @temperature: The threshold in Celsius 169 * @backoff: The tx-backoff in uSec 170 */ 171 struct iwl_tt_tx_backoff { 172 s32 temperature; 173 u32 backoff; 174 }; 175 176 #define TT_TX_BACKOFF_SIZE 6 177 178 /** 179 * struct iwl_tt_params - thermal throttling parameters 180 * @ct_kill_entry: CT Kill entry threshold 181 * @ct_kill_exit: CT Kill exit threshold 182 * @ct_kill_duration: The time intervals (in uSec) in which the driver needs 183 * to checks whether to exit CT Kill. 184 * @dynamic_smps_entry: Dynamic SMPS entry threshold 185 * @dynamic_smps_exit: Dynamic SMPS exit threshold 186 * @tx_protection_entry: TX protection entry threshold 187 * @tx_protection_exit: TX protection exit threshold 188 * @tx_backoff: Array of thresholds for tx-backoff , in ascending order. 189 * @support_ct_kill: Support CT Kill? 190 * @support_dynamic_smps: Support dynamic SMPS? 191 * @support_tx_protection: Support tx protection? 192 * @support_tx_backoff: Support tx-backoff? 193 */ 194 struct iwl_tt_params { 195 u32 ct_kill_entry; 196 u32 ct_kill_exit; 197 u32 ct_kill_duration; 198 u32 dynamic_smps_entry; 199 u32 dynamic_smps_exit; 200 u32 tx_protection_entry; 201 u32 tx_protection_exit; 202 struct iwl_tt_tx_backoff tx_backoff[TT_TX_BACKOFF_SIZE]; 203 u8 support_ct_kill:1, 204 support_dynamic_smps:1, 205 support_tx_protection:1, 206 support_tx_backoff:1; 207 }; 208 209 /* 210 * information on how to parse the EEPROM 211 */ 212 #define EEPROM_REG_BAND_1_CHANNELS 0x08 213 #define EEPROM_REG_BAND_2_CHANNELS 0x26 214 #define EEPROM_REG_BAND_3_CHANNELS 0x42 215 #define EEPROM_REG_BAND_4_CHANNELS 0x5C 216 #define EEPROM_REG_BAND_5_CHANNELS 0x74 217 #define EEPROM_REG_BAND_24_HT40_CHANNELS 0x82 218 #define EEPROM_REG_BAND_52_HT40_CHANNELS 0x92 219 #define EEPROM_6000_REG_BAND_24_HT40_CHANNELS 0x80 220 #define EEPROM_REGULATORY_BAND_NO_HT40 0 221 222 /* lower blocks contain EEPROM image and calibration data */ 223 #define OTP_LOW_IMAGE_SIZE_2K (2 * 512 * sizeof(u16)) /* 2 KB */ 224 #define OTP_LOW_IMAGE_SIZE_16K (16 * 512 * sizeof(u16)) /* 16 KB */ 225 #define OTP_LOW_IMAGE_SIZE_32K (32 * 512 * sizeof(u16)) /* 32 KB */ 226 227 struct iwl_eeprom_params { 228 const u8 regulatory_bands[7]; 229 bool enhanced_txpower; 230 }; 231 232 /* Tx-backoff power threshold 233 * @pwr: The power limit in mw 234 * @backoff: The tx-backoff in uSec 235 */ 236 struct iwl_pwr_tx_backoff { 237 u32 pwr; 238 u32 backoff; 239 }; 240 241 enum iwl_cfg_trans_ltr_delay { 242 IWL_CFG_TRANS_LTR_DELAY_NONE = 0, 243 IWL_CFG_TRANS_LTR_DELAY_200US = 1, 244 IWL_CFG_TRANS_LTR_DELAY_2500US = 2, 245 IWL_CFG_TRANS_LTR_DELAY_1820US = 3, 246 }; 247 248 /** 249 * struct iwl_cfg_trans_params - information needed to start the trans 250 * 251 * These values are specific to the device ID and do not change when 252 * multiple configs are used for a single device ID. They values are 253 * used, among other things, to boot the NIC so that the HW REV or 254 * RFID can be read before deciding the remaining parameters to use. 255 * 256 * @base_params: pointer to basic parameters 257 * @device_family: the device family 258 * @umac_prph_offset: offset to add to UMAC periphery address 259 * @xtal_latency: power up latency to get the xtal stabilized 260 * @extra_phy_cfg_flags: extra configuration flags to pass to the PHY 261 * @rf_id: need to read rf_id to determine the firmware image 262 * @gen2: 22000 and on transport operation 263 * @mq_rx_supported: multi-queue rx support 264 * @integrated: discrete or integrated 265 * @low_latency_xtal: use the low latency xtal if supported 266 * @bisr_workaround: BISR hardware workaround (for 22260 series devices) 267 * @ltr_delay: LTR delay parameter, &enum iwl_cfg_trans_ltr_delay. 268 * @imr_enabled: use the IMR if supported. 269 */ 270 struct iwl_cfg_trans_params { 271 const struct iwl_base_params *base_params; 272 enum iwl_device_family device_family; 273 u32 umac_prph_offset; 274 u32 xtal_latency; 275 u32 extra_phy_cfg_flags; 276 u32 rf_id:1, 277 gen2:1, 278 mq_rx_supported:1, 279 integrated:1, 280 low_latency_xtal:1, 281 bisr_workaround:1, 282 ltr_delay:2, 283 imr_enabled:1; 284 }; 285 286 /** 287 * struct iwl_fw_mon_reg - FW monitor register info 288 * @addr: register address 289 * @mask: register mask 290 */ 291 struct iwl_fw_mon_reg { 292 u32 addr; 293 u32 mask; 294 }; 295 296 /** 297 * struct iwl_fw_mon_regs - FW monitor registers 298 * @write_ptr: write pointer register 299 * @cycle_cnt: cycle count register 300 * @cur_frag: current fragment in use 301 */ 302 struct iwl_fw_mon_regs { 303 struct iwl_fw_mon_reg write_ptr; 304 struct iwl_fw_mon_reg cycle_cnt; 305 struct iwl_fw_mon_reg cur_frag; 306 }; 307 308 /** 309 * struct iwl_cfg 310 * @fw_name_pre: Firmware filename prefix. The api version and extension 311 * (.ucode) will be added to filename before loading from disk. The 312 * filename is constructed as <fw_name_pre>-<api>.ucode. 313 * name will be generated dynamically 314 * @ucode_api_max: Highest version of uCode API supported by driver. 315 * @ucode_api_min: Lowest version of uCode API supported by driver. 316 * @max_inst_size: The maximal length of the fw inst section (only DVM) 317 * @max_data_size: The maximal length of the fw data section (only DVM) 318 * @valid_tx_ant: valid transmit antenna 319 * @valid_rx_ant: valid receive antenna 320 * @non_shared_ant: the antenna that is for WiFi only 321 * @nvm_ver: NVM version 322 * @nvm_calib_ver: NVM calibration version 323 * @bw_limit: bandwidth limit for this device, if non-zero 324 * @ht_params: point to ht parameters 325 * @led_mode: 0=blinking, 1=On(RF On)/Off(RF Off) 326 * @rx_with_siso_diversity: 1x1 device with rx antenna diversity 327 * @tx_with_siso_diversity: 1x1 device with tx antenna diversity 328 * @internal_wimax_coex: internal wifi/wimax combo device 329 * @high_temp: Is this NIC is designated to be in high temperature. 330 * @host_interrupt_operation_mode: device needs host interrupt operation 331 * mode set 332 * @nvm_hw_section_num: the ID of the HW NVM section 333 * @mac_addr_from_csr: read HW address from CSR registers at this offset 334 * @features: hw features, any combination of feature_passlist 335 * @pwr_tx_backoffs: translation table between power limits and backoffs 336 * @dccm_offset: offset from which DCCM begins 337 * @dccm_len: length of DCCM (including runtime stack CCM) 338 * @dccm2_offset: offset from which the second DCCM begins 339 * @dccm2_len: length of the second DCCM 340 * @smem_offset: offset from which the SMEM begins 341 * @smem_len: the length of SMEM 342 * @vht_mu_mimo_supported: VHT MU-MIMO support 343 * @cdb: CDB support 344 * @nvm_type: see &enum iwl_nvm_type 345 * @d3_debug_data_base_addr: base address where D3 debug data is stored 346 * @d3_debug_data_length: length of the D3 debug data 347 * @min_txq_size: minimum number of slots required in a TX queue 348 * @uhb_supported: ultra high band channels supported 349 * @min_ba_txq_size: minimum number of slots required in a TX queue which 350 * based on hardware support (HE - 256, EHT - 1K). 351 * @num_rbds: number of receive buffer descriptors to use 352 * (only used for multi-queue capable devices) 353 * 354 * We enable the driver to be backward compatible wrt. hardware features. 355 * API differences in uCode shouldn't be handled here but through TLVs 356 * and/or the uCode API version instead. 357 */ 358 struct iwl_cfg { 359 /* params specific to an individual device within a device family */ 360 const char *fw_name_pre; 361 /* params likely to change within a device family */ 362 const struct iwl_ht_params *ht_params; 363 const struct iwl_eeprom_params *eeprom_params; 364 const struct iwl_pwr_tx_backoff *pwr_tx_backoffs; 365 const char *default_nvm_file_C_step; 366 const struct iwl_tt_params *thermal_params; 367 enum iwl_led_mode led_mode; 368 enum iwl_nvm_type nvm_type; 369 u32 max_data_size; 370 u32 max_inst_size; 371 netdev_features_t features; 372 u32 dccm_offset; 373 u32 dccm_len; 374 u32 dccm2_offset; 375 u32 dccm2_len; 376 u32 smem_offset; 377 u32 smem_len; 378 u16 nvm_ver; 379 u16 nvm_calib_ver; 380 u16 bw_limit; 381 u32 rx_with_siso_diversity:1, 382 tx_with_siso_diversity:1, 383 internal_wimax_coex:1, 384 host_interrupt_operation_mode:1, 385 high_temp:1, 386 mac_addr_from_csr:10, 387 lp_xtal_workaround:1, 388 apmg_not_supported:1, 389 vht_mu_mimo_supported:1, 390 cdb:1, 391 dbgc_supported:1, 392 uhb_supported:1; 393 u8 valid_tx_ant; 394 u8 valid_rx_ant; 395 u8 non_shared_ant; 396 u8 nvm_hw_section_num; 397 u8 ucode_api_max; 398 u8 ucode_api_min; 399 u16 num_rbds; 400 u32 min_umac_error_event_table; 401 u32 d3_debug_data_base_addr; 402 u32 d3_debug_data_length; 403 u32 min_txq_size; 404 u32 gp2_reg_addr; 405 u32 min_ba_txq_size; 406 const struct iwl_fw_mon_regs mon_dram_regs; 407 const struct iwl_fw_mon_regs mon_smem_regs; 408 const struct iwl_fw_mon_regs mon_dbgi_regs; 409 }; 410 411 #define IWL_CFG_ANY (~0) 412 413 #define IWL_CFG_MAC_TYPE_PU 0x31 414 #define IWL_CFG_MAC_TYPE_TH 0x32 415 #define IWL_CFG_MAC_TYPE_QU 0x33 416 #define IWL_CFG_MAC_TYPE_QUZ 0x35 417 #define IWL_CFG_MAC_TYPE_SO 0x37 418 #define IWL_CFG_MAC_TYPE_SOF 0x43 419 #define IWL_CFG_MAC_TYPE_MA 0x44 420 #define IWL_CFG_MAC_TYPE_BZ 0x46 421 #define IWL_CFG_MAC_TYPE_GL 0x47 422 #define IWL_CFG_MAC_TYPE_SC 0x48 423 #define IWL_CFG_MAC_TYPE_SC2 0x49 424 #define IWL_CFG_MAC_TYPE_SC2F 0x4A 425 #define IWL_CFG_MAC_TYPE_BZ_W 0x4B 426 #define IWL_CFG_MAC_TYPE_BR 0x4C 427 #define IWL_CFG_MAC_TYPE_DR 0x4D 428 429 #define IWL_CFG_RF_TYPE_JF2 0x105 430 #define IWL_CFG_RF_TYPE_JF1 0x108 431 #define IWL_CFG_RF_TYPE_HR2 0x10A 432 #define IWL_CFG_RF_TYPE_HR1 0x10C 433 #define IWL_CFG_RF_TYPE_GF 0x10D 434 #define IWL_CFG_RF_TYPE_FM 0x112 435 #define IWL_CFG_RF_TYPE_WH 0x113 436 #define IWL_CFG_RF_TYPE_PE 0x114 437 438 #define IWL_CFG_RF_ID_TH 0x1 439 #define IWL_CFG_RF_ID_TH1 0x1 440 #define IWL_CFG_RF_ID_JF 0x3 441 #define IWL_CFG_RF_ID_JF1 0x6 442 #define IWL_CFG_RF_ID_JF1_DIV 0xA 443 #define IWL_CFG_RF_ID_HR 0x7 444 #define IWL_CFG_RF_ID_HR1 0x4 445 446 #define IWL_CFG_CORES_BT 0x0 447 #define IWL_CFG_CORES_BT_GNSS 0x5 448 449 #define IWL_CFG_NO_CDB 0x0 450 #define IWL_CFG_CDB 0x1 451 452 #define IWL_CFG_NO_JACKET 0x0 453 #define IWL_CFG_IS_JACKET 0x1 454 455 #define IWL_SUBDEVICE_RF_ID(subdevice) ((u16)((subdevice) & 0x00F0) >> 4) 456 #define IWL_SUBDEVICE_BW_LIM(subdevice) ((u16)((subdevice) & 0x0200) >> 9) 457 #define IWL_SUBDEVICE_CORES(subdevice) ((u16)((subdevice) & 0x1C00) >> 10) 458 459 struct iwl_dev_info { 460 u16 device; 461 u16 subdevice; 462 u16 subdevice_mask; 463 u16 rf_type; 464 u8 mac_type; 465 u8 bw_limit; 466 u8 mac_step; 467 u8 rf_step; 468 u8 rf_id; 469 u8 cores; 470 u8 cdb; 471 u8 jacket; 472 const struct iwl_cfg *cfg; 473 const char *name; 474 }; 475 476 #if IS_ENABLED(CONFIG_IWLWIFI_KUNIT_TESTS) 477 extern const struct iwl_dev_info iwl_dev_info_table[]; 478 extern const unsigned int iwl_dev_info_table_size; 479 const struct iwl_dev_info * 480 iwl_pci_find_dev_info(u16 device, u16 subsystem_device, 481 u8 mac_type, u8 mac_step, u16 rf_type, u8 cdb, 482 u8 jacket, u8 rf_id, u8 bw_limit, u8 cores, u8 rf_step); 483 extern const struct pci_device_id iwl_hw_card_ids[]; 484 #endif 485 486 /* 487 * This list declares the config structures for all devices. 488 */ 489 extern const struct iwl_cfg_trans_params iwl1000_trans_cfg; 490 extern const struct iwl_cfg_trans_params iwl5000_trans_cfg; 491 extern const struct iwl_cfg_trans_params iwl2000_trans_cfg; 492 extern const struct iwl_cfg_trans_params iwl2030_trans_cfg; 493 extern const struct iwl_cfg_trans_params iwl105_trans_cfg; 494 extern const struct iwl_cfg_trans_params iwl135_trans_cfg; 495 extern const struct iwl_cfg_trans_params iwl5150_trans_cfg; 496 extern const struct iwl_cfg_trans_params iwl6005_trans_cfg; 497 extern const struct iwl_cfg_trans_params iwl6030_trans_cfg; 498 extern const struct iwl_cfg_trans_params iwl6000i_trans_cfg; 499 extern const struct iwl_cfg_trans_params iwl6050_trans_cfg; 500 extern const struct iwl_cfg_trans_params iwl6150_trans_cfg; 501 extern const struct iwl_cfg_trans_params iwl6000_trans_cfg; 502 extern const struct iwl_cfg_trans_params iwl7000_trans_cfg; 503 extern const struct iwl_cfg_trans_params iwl8000_trans_cfg; 504 extern const struct iwl_cfg_trans_params iwl9000_trans_cfg; 505 extern const struct iwl_cfg_trans_params iwl9560_trans_cfg; 506 extern const struct iwl_cfg_trans_params iwl9560_long_latency_trans_cfg; 507 extern const struct iwl_cfg_trans_params iwl9560_shared_clk_trans_cfg; 508 extern const struct iwl_cfg_trans_params iwl_qu_trans_cfg; 509 extern const struct iwl_cfg_trans_params iwl_qu_medium_latency_trans_cfg; 510 extern const struct iwl_cfg_trans_params iwl_qu_long_latency_trans_cfg; 511 extern const struct iwl_cfg_trans_params iwl_ax200_trans_cfg; 512 extern const struct iwl_cfg_trans_params iwl_so_trans_cfg; 513 extern const struct iwl_cfg_trans_params iwl_so_long_latency_trans_cfg; 514 extern const struct iwl_cfg_trans_params iwl_so_long_latency_imr_trans_cfg; 515 extern const struct iwl_cfg_trans_params iwl_ma_trans_cfg; 516 extern const struct iwl_cfg_trans_params iwl_bz_trans_cfg; 517 extern const struct iwl_cfg_trans_params iwl_gl_trans_cfg; 518 extern const struct iwl_cfg_trans_params iwl_sc_trans_cfg; 519 extern const struct iwl_cfg_trans_params iwl_dr_trans_cfg; 520 extern const struct iwl_cfg_trans_params iwl_br_trans_cfg; 521 522 extern const char iwl1000_bgn_name[]; 523 extern const char iwl1000_bg_name[]; 524 extern const char iwl100_bgn_name[]; 525 extern const char iwl100_bg_name[]; 526 extern const char iwl2000_2bgn_name[]; 527 extern const char iwl2000_2bgn_d_name[]; 528 extern const char iwl2030_2bgn_name[]; 529 extern const char iwl105_bgn_name[]; 530 extern const char iwl105_bgn_d_name[]; 531 extern const char iwl135_bgn_name[]; 532 extern const char iwl5300_agn_name[]; 533 extern const char iwl5100_bgn_name[]; 534 extern const char iwl5100_abg_name[]; 535 extern const char iwl5100_agn_name[]; 536 extern const char iwl5350_agn_name[]; 537 extern const char iwl5150_agn_name[]; 538 extern const char iwl5150_abg_name[]; 539 extern const char iwl6005_2agn_name[]; 540 extern const char iwl6005_2abg_name[]; 541 extern const char iwl6005_2bg_name[]; 542 extern const char iwl6005_2agn_sff_name[]; 543 extern const char iwl6005_2agn_d_name[]; 544 extern const char iwl6005_2agn_mow1_name[]; 545 extern const char iwl6005_2agn_mow2_name[]; 546 extern const char iwl6030_2agn_name[]; 547 extern const char iwl6030_2abg_name[]; 548 extern const char iwl6030_2bgn_name[]; 549 extern const char iwl6030_2bg_name[]; 550 extern const char iwl6035_2agn_name[]; 551 extern const char iwl6035_2agn_sff_name[]; 552 extern const char iwl1030_bgn_name[]; 553 extern const char iwl1030_bg_name[]; 554 extern const char iwl130_bgn_name[]; 555 extern const char iwl130_bg_name[]; 556 extern const char iwl6000i_2agn_name[]; 557 extern const char iwl6000i_2abg_name[]; 558 extern const char iwl6000i_2bg_name[]; 559 extern const char iwl6050_2agn_name[]; 560 extern const char iwl6050_2abg_name[]; 561 extern const char iwl6150_bgn_name[]; 562 extern const char iwl6150_bg_name[]; 563 extern const char iwl6000_3agn_name[]; 564 extern const char iwl7260_2ac_name[]; 565 extern const char iwl7260_2n_name[]; 566 extern const char iwl7260_n_name[]; 567 extern const char iwl3160_2ac_name[]; 568 extern const char iwl3160_2n_name[]; 569 extern const char iwl3160_n_name[]; 570 extern const char iwl3165_2ac_name[]; 571 extern const char iwl3168_2ac_name[]; 572 extern const char iwl7265_2ac_name[]; 573 extern const char iwl7265_2n_name[]; 574 extern const char iwl7265_n_name[]; 575 extern const char iwl7265d_2ac_name[]; 576 extern const char iwl7265d_2n_name[]; 577 extern const char iwl7265d_n_name[]; 578 extern const char iwl8260_2n_name[]; 579 extern const char iwl8260_2ac_name[]; 580 extern const char iwl8265_2ac_name[]; 581 extern const char iwl8275_2ac_name[]; 582 extern const char iwl4165_2ac_name[]; 583 extern const char iwl9162_name[]; 584 extern const char iwl9260_name[]; 585 extern const char iwl9260_1_name[]; 586 extern const char iwl9270_name[]; 587 extern const char iwl9461_name[]; 588 extern const char iwl9462_name[]; 589 extern const char iwl9560_name[]; 590 extern const char iwl9162_160_name[]; 591 extern const char iwl9260_160_name[]; 592 extern const char iwl9270_160_name[]; 593 extern const char iwl9461_160_name[]; 594 extern const char iwl9462_160_name[]; 595 extern const char iwl9560_160_name[]; 596 extern const char iwl9260_killer_1550_name[]; 597 extern const char iwl9560_killer_1550i_name[]; 598 extern const char iwl9560_killer_1550s_name[]; 599 extern const char iwl_ax200_name[]; 600 extern const char iwl_ax203_name[]; 601 extern const char iwl_ax201_name[]; 602 extern const char iwl_ax101_name[]; 603 extern const char iwl_ax200_killer_1650w_name[]; 604 extern const char iwl_ax200_killer_1650x_name[]; 605 extern const char iwl_ax201_killer_1650s_name[]; 606 extern const char iwl_ax201_killer_1650i_name[]; 607 extern const char iwl_ax210_killer_1675w_name[]; 608 extern const char iwl_ax210_killer_1675x_name[]; 609 extern const char iwl9560_killer_1550i_160_name[]; 610 extern const char iwl9560_killer_1550s_160_name[]; 611 extern const char iwl_ax211_killer_1675s_name[]; 612 extern const char iwl_ax211_killer_1675i_name[]; 613 extern const char iwl_ax411_killer_1690s_name[]; 614 extern const char iwl_ax411_killer_1690i_name[]; 615 extern const char iwl_ax210_name[]; 616 extern const char iwl_ax211_name[]; 617 extern const char iwl_ax231_name[]; 618 extern const char iwl_ax411_name[]; 619 extern const char iwl_fm_name[]; 620 extern const char iwl_wh_name[]; 621 extern const char iwl_sp_name[]; 622 extern const char iwl_pe_name[]; 623 extern const char iwl_gl_name[]; 624 extern const char iwl_mtp_name[]; 625 extern const char iwl_dr_name[]; 626 extern const char iwl_br_name[]; 627 #if IS_ENABLED(CONFIG_IWLDVM) 628 extern const struct iwl_cfg iwl5300_agn_cfg; 629 extern const struct iwl_cfg iwl5350_agn_cfg; 630 extern const struct iwl_cfg iwl5100_n_cfg; 631 extern const struct iwl_cfg iwl5100_abg_cfg; 632 extern const struct iwl_cfg iwl5150_agn_cfg; 633 extern const struct iwl_cfg iwl5150_abg_cfg; 634 extern const struct iwl_cfg iwl6005_non_n_cfg; 635 extern const struct iwl_cfg iwl6005_n_cfg; 636 extern const struct iwl_cfg iwl6030_n_cfg; 637 extern const struct iwl_cfg iwl6030_non_n_cfg; 638 extern const struct iwl_cfg iwl6000i_2agn_cfg; 639 extern const struct iwl_cfg iwl6000i_non_n_cfg; 640 extern const struct iwl_cfg iwl6000i_non_n_cfg; 641 extern const struct iwl_cfg iwl6000_3agn_cfg; 642 extern const struct iwl_cfg iwl6050_2agn_cfg; 643 extern const struct iwl_cfg iwl6050_2abg_cfg; 644 extern const struct iwl_cfg iwl6150_bgn_cfg; 645 extern const struct iwl_cfg iwl6150_bg_cfg; 646 extern const struct iwl_cfg iwl1000_bgn_cfg; 647 extern const struct iwl_cfg iwl1000_bg_cfg; 648 extern const struct iwl_cfg iwl100_bgn_cfg; 649 extern const struct iwl_cfg iwl100_bg_cfg; 650 extern const struct iwl_cfg iwl130_bgn_cfg; 651 extern const struct iwl_cfg iwl130_bg_cfg; 652 extern const struct iwl_cfg iwl2000_2bgn_cfg; 653 extern const struct iwl_cfg iwl2030_2bgn_cfg; 654 extern const struct iwl_cfg iwl6035_2agn_cfg; 655 extern const struct iwl_cfg iwl105_bgn_cfg; 656 extern const struct iwl_cfg iwl135_bgn_cfg; 657 #endif /* CONFIG_IWLDVM */ 658 #if IS_ENABLED(CONFIG_IWLMVM) 659 extern const struct iwl_ht_params iwl_22000_ht_params; 660 661 extern const struct iwl_cfg iwl7260_cfg; 662 extern const struct iwl_cfg iwl7260_high_temp_cfg; 663 extern const struct iwl_cfg iwl3160_cfg; 664 extern const struct iwl_cfg iwl3165_2ac_cfg; 665 extern const struct iwl_cfg iwl3168_2ac_cfg; 666 extern const struct iwl_cfg iwl7265_cfg; 667 extern const struct iwl_cfg iwl7265d_cfg; 668 extern const struct iwl_cfg iwl8260_cfg; 669 extern const struct iwl_cfg iwl8265_cfg; 670 extern const struct iwl_cfg iwl9260_2ac_cfg; 671 extern const struct iwl_cfg iwl9260_2ac_cfg_80mhz; 672 extern const struct iwl_cfg iwl9560_qu_jf_cfg; 673 extern const struct iwl_cfg iwl9560_qu_jf_cfg_80mhz; 674 extern const struct iwl_cfg iwl9560_quz_a0_jf_b0_cfg; 675 extern const struct iwl_cfg iwl9560_quz_a0_jf_b0_cfg_80mhz; 676 extern const struct iwl_cfg iwl9560_2ac_cfg_soc; 677 extern const struct iwl_cfg iwl9560_2ac_cfg_soc_80mhz; 678 extern const struct iwl_cfg iwl_qu_hr1; 679 extern const struct iwl_cfg iwl_qu_hr; 680 extern const struct iwl_cfg iwl_qu_hr_80mhz; 681 extern const struct iwl_cfg iwl_ax200_cfg_cc; 682 extern const struct iwl_cfg iwlax210_2ax_cfg_so_jf_b0; 683 extern const struct iwl_cfg iwlax210_2ax_cfg_so_jf_b0_80mhz; 684 extern const struct iwl_cfg iwlax211_2ax_cfg_so_gf_a0; 685 extern const struct iwl_cfg iwlax210_2ax_cfg_ty_gf_a0; 686 extern const struct iwl_cfg iwlax411_2ax_cfg_so_gf4_a0; 687 688 extern const struct iwl_cfg iwl_cfg_ma; 689 690 extern const struct iwl_cfg iwl_cfg_so_a0_hr_a0; 691 extern const struct iwl_cfg iwl_cfg_so_a0_hr_a0_80mhz; 692 #endif /* CONFIG_IWLMVM */ 693 694 #if IS_ENABLED(CONFIG_IWLMLD) 695 extern const struct iwl_ht_params iwl_bz_ht_params; 696 697 extern const struct iwl_cfg iwl_cfg_bz; 698 extern const struct iwl_cfg iwl_cfg_bz_160mhz; 699 700 extern const struct iwl_cfg iwl_cfg_sc; 701 extern const struct iwl_cfg iwl_cfg_sc_160mhz; 702 extern const struct iwl_cfg iwl_cfg_dr; 703 #endif /* CONFIG_IWLMLD */ 704 705 #endif /* __IWL_CONFIG_H__ */ 706