1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ 2 /* 3 * Copyright (C) 2008-2014, 2018-2024 Intel Corporation 4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH 5 * Copyright (C) 2016-2017 Intel Deutschland GmbH 6 */ 7 #ifndef __iwl_fw_file_h__ 8 #define __iwl_fw_file_h__ 9 10 #include <linux/netdevice.h> 11 #include <linux/nl80211.h> 12 13 /* v1/v2 uCode file layout */ 14 struct iwl_ucode_header { 15 __le32 ver; /* major/minor/API/serial */ 16 union { 17 struct { 18 __le32 inst_size; /* bytes of runtime code */ 19 __le32 data_size; /* bytes of runtime data */ 20 __le32 init_size; /* bytes of init code */ 21 __le32 init_data_size; /* bytes of init data */ 22 __le32 boot_size; /* bytes of bootstrap code */ 23 u8 data[]; /* in same order as sizes */ 24 } v1; 25 struct { 26 __le32 build; /* build number */ 27 __le32 inst_size; /* bytes of runtime code */ 28 __le32 data_size; /* bytes of runtime data */ 29 __le32 init_size; /* bytes of init code */ 30 __le32 init_data_size; /* bytes of init data */ 31 __le32 boot_size; /* bytes of bootstrap code */ 32 u8 data[]; /* in same order as sizes */ 33 } v2; 34 } u; 35 }; 36 37 #define IWL_UCODE_TLV_DEBUG_BASE 0x1000005 38 #define IWL_UCODE_TLV_CONST_BASE 0x100 39 40 /* 41 * new TLV uCode file layout 42 * 43 * The new TLV file format contains TLVs, that each specify 44 * some piece of data. 45 */ 46 47 enum iwl_ucode_tlv_type { 48 IWL_UCODE_TLV_INVALID = 0, /* unused */ 49 IWL_UCODE_TLV_INST = 1, 50 IWL_UCODE_TLV_DATA = 2, 51 IWL_UCODE_TLV_INIT = 3, 52 IWL_UCODE_TLV_INIT_DATA = 4, 53 IWL_UCODE_TLV_BOOT = 5, 54 IWL_UCODE_TLV_PROBE_MAX_LEN = 6, /* a u32 value */ 55 IWL_UCODE_TLV_PAN = 7, /* deprecated -- only used in DVM */ 56 IWL_UCODE_TLV_MEM_DESC = 7, /* replaces PAN in non-DVM */ 57 IWL_UCODE_TLV_RUNT_EVTLOG_PTR = 8, 58 IWL_UCODE_TLV_RUNT_EVTLOG_SIZE = 9, 59 IWL_UCODE_TLV_RUNT_ERRLOG_PTR = 10, 60 IWL_UCODE_TLV_INIT_EVTLOG_PTR = 11, 61 IWL_UCODE_TLV_INIT_EVTLOG_SIZE = 12, 62 IWL_UCODE_TLV_INIT_ERRLOG_PTR = 13, 63 IWL_UCODE_TLV_ENHANCE_SENS_TBL = 14, 64 IWL_UCODE_TLV_PHY_CALIBRATION_SIZE = 15, 65 IWL_UCODE_TLV_WOWLAN_INST = 16, 66 IWL_UCODE_TLV_WOWLAN_DATA = 17, 67 IWL_UCODE_TLV_FLAGS = 18, 68 IWL_UCODE_TLV_SEC_RT = 19, 69 IWL_UCODE_TLV_SEC_INIT = 20, 70 IWL_UCODE_TLV_SEC_WOWLAN = 21, 71 IWL_UCODE_TLV_DEF_CALIB = 22, 72 IWL_UCODE_TLV_PHY_SKU = 23, 73 IWL_UCODE_TLV_SECURE_SEC_RT = 24, 74 IWL_UCODE_TLV_SECURE_SEC_INIT = 25, 75 IWL_UCODE_TLV_SECURE_SEC_WOWLAN = 26, 76 IWL_UCODE_TLV_NUM_OF_CPU = 27, 77 IWL_UCODE_TLV_CSCHEME = 28, 78 IWL_UCODE_TLV_API_CHANGES_SET = 29, 79 IWL_UCODE_TLV_ENABLED_CAPABILITIES = 30, 80 IWL_UCODE_TLV_N_SCAN_CHANNELS = 31, 81 IWL_UCODE_TLV_PAGING = 32, 82 IWL_UCODE_TLV_SEC_RT_USNIFFER = 34, 83 /* 35 is unused */ 84 IWL_UCODE_TLV_FW_VERSION = 36, 85 IWL_UCODE_TLV_FW_DBG_DEST = 38, 86 IWL_UCODE_TLV_FW_DBG_CONF = 39, 87 IWL_UCODE_TLV_FW_DBG_TRIGGER = 40, 88 IWL_UCODE_TLV_CMD_VERSIONS = 48, 89 IWL_UCODE_TLV_FW_GSCAN_CAPA = 50, 90 IWL_UCODE_TLV_FW_MEM_SEG = 51, 91 IWL_UCODE_TLV_IML = 52, 92 IWL_UCODE_TLV_UMAC_DEBUG_ADDRS = 54, 93 IWL_UCODE_TLV_LMAC_DEBUG_ADDRS = 55, 94 IWL_UCODE_TLV_FW_RECOVERY_INFO = 57, 95 IWL_UCODE_TLV_HW_TYPE = 58, 96 IWL_UCODE_TLV_FW_FSEQ_VERSION = 60, 97 IWL_UCODE_TLV_PHY_INTEGRATION_VERSION = 61, 98 99 IWL_UCODE_TLV_PNVM_VERSION = 62, 100 IWL_UCODE_TLV_PNVM_SKU = 64, 101 102 IWL_UCODE_TLV_SEC_TABLE_ADDR = 66, 103 IWL_UCODE_TLV_D3_KEK_KCK_ADDR = 67, 104 IWL_UCODE_TLV_CURRENT_PC = 68, 105 IWL_UCODE_TLV_FSEQ_BIN_VERSION = 72, 106 107 /* contains sub-sections like PNVM file does (did) */ 108 IWL_UCODE_TLV_PNVM_DATA = 74, 109 110 IWL_UCODE_TLV_FW_NUM_STATIONS = IWL_UCODE_TLV_CONST_BASE + 0, 111 IWL_UCODE_TLV_FW_NUM_LINKS = IWL_UCODE_TLV_CONST_BASE + 1, 112 IWL_UCODE_TLV_FW_NUM_BEACONS = IWL_UCODE_TLV_CONST_BASE + 2, 113 114 IWL_UCODE_TLV_TYPE_DEBUG_INFO = IWL_UCODE_TLV_DEBUG_BASE + 0, 115 IWL_UCODE_TLV_TYPE_BUFFER_ALLOCATION = IWL_UCODE_TLV_DEBUG_BASE + 1, 116 IWL_UCODE_TLV_TYPE_HCMD = IWL_UCODE_TLV_DEBUG_BASE + 2, 117 IWL_UCODE_TLV_TYPE_REGIONS = IWL_UCODE_TLV_DEBUG_BASE + 3, 118 IWL_UCODE_TLV_TYPE_TRIGGERS = IWL_UCODE_TLV_DEBUG_BASE + 4, 119 IWL_UCODE_TLV_TYPE_CONF_SET = IWL_UCODE_TLV_DEBUG_BASE + 5, 120 IWL_UCODE_TLV_DEBUG_MAX = IWL_UCODE_TLV_TYPE_TRIGGERS, 121 122 /* TLVs 0x1000-0x2000 are for internal driver usage */ 123 IWL_UCODE_TLV_FW_DBG_DUMP_LST = 0x1000, 124 }; 125 126 struct iwl_ucode_tlv { 127 __le32 type; /* see above */ 128 __le32 length; /* not including type/length fields */ 129 u8 data[]; 130 }; 131 132 #define IWL_TLV_UCODE_MAGIC 0x0a4c5749 133 #define FW_VER_HUMAN_READABLE_SZ 64 134 135 struct iwl_tlv_ucode_header { 136 /* 137 * The TLV style ucode header is distinguished from 138 * the v1/v2 style header by first four bytes being 139 * zero, as such is an invalid combination of 140 * major/minor/API/serial versions. 141 */ 142 __le32 zero; 143 __le32 magic; 144 u8 human_readable[FW_VER_HUMAN_READABLE_SZ]; 145 /* major/minor/API/serial or major in new format */ 146 __le32 ver; 147 __le32 build; 148 __le64 ignore; 149 /* 150 * The data contained herein has a TLV layout, 151 * see above for the TLV header and types. 152 * Note that each TLV is padded to a length 153 * that is a multiple of 4 for alignment. 154 */ 155 u8 data[]; 156 }; 157 158 /* 159 * ucode TLVs 160 * 161 * ability to get extension for: flags & capabilities from ucode binaries files 162 */ 163 struct iwl_ucode_api { 164 __le32 api_index; 165 __le32 api_flags; 166 } __packed; 167 168 struct iwl_ucode_capa { 169 __le32 api_index; 170 __le32 api_capa; 171 } __packed; 172 173 /** 174 * enum iwl_ucode_tlv_flag - ucode API flags 175 * @IWL_UCODE_TLV_FLAGS_PAN: This is PAN capable microcode; this previously 176 * was a separate TLV but moved here to save space. 177 * @IWL_UCODE_TLV_FLAGS_NEWSCAN: new uCode scan behavior on hidden SSID, 178 * treats good CRC threshold as a boolean 179 * @IWL_UCODE_TLV_FLAGS_MFP: This uCode image supports MFP (802.11w). 180 * @IWL_UCODE_TLV_FLAGS_UAPSD_SUPPORT: This uCode image supports uAPSD 181 * @IWL_UCODE_TLV_FLAGS_SHORT_BL: 16 entries of block list instead of 64 in scan 182 * offload profile config command. 183 * @IWL_UCODE_TLV_FLAGS_D3_6_IPV6_ADDRS: D3 image supports up to six 184 * (rather than two) IPv6 addresses 185 * @IWL_UCODE_TLV_FLAGS_NO_BASIC_SSID: not sending a probe with the SSID element 186 * from the probe request template. 187 * @IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_SMALL: new NS offload (small version) 188 * @IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_LARGE: new NS offload (large version) 189 * @IWL_UCODE_TLV_FLAGS_UAPSD_SUPPORT: General support for uAPSD 190 * @IWL_UCODE_TLV_FLAGS_P2P_PS_UAPSD: P2P client supports uAPSD power save 191 * @IWL_UCODE_TLV_FLAGS_EBS_SUPPORT: this uCode image supports EBS. 192 */ 193 enum iwl_ucode_tlv_flag { 194 IWL_UCODE_TLV_FLAGS_PAN = BIT(0), 195 IWL_UCODE_TLV_FLAGS_NEWSCAN = BIT(1), 196 IWL_UCODE_TLV_FLAGS_MFP = BIT(2), 197 IWL_UCODE_TLV_FLAGS_SHORT_BL = BIT(7), 198 IWL_UCODE_TLV_FLAGS_D3_6_IPV6_ADDRS = BIT(10), 199 IWL_UCODE_TLV_FLAGS_NO_BASIC_SSID = BIT(12), 200 IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_SMALL = BIT(15), 201 IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_LARGE = BIT(16), 202 IWL_UCODE_TLV_FLAGS_UAPSD_SUPPORT = BIT(24), 203 IWL_UCODE_TLV_FLAGS_EBS_SUPPORT = BIT(25), 204 IWL_UCODE_TLV_FLAGS_P2P_PS_UAPSD = BIT(26), 205 }; 206 207 typedef unsigned int __bitwise iwl_ucode_tlv_api_t; 208 209 /** 210 * enum iwl_ucode_tlv_api - ucode api 211 * @IWL_UCODE_TLV_API_FRAGMENTED_SCAN: This ucode supports active dwell time 212 * longer than the passive one, which is essential for fragmented scan. 213 * @IWL_UCODE_TLV_API_WIFI_MCC_UPDATE: ucode supports MCC updates with source. 214 * @IWL_UCODE_TLV_API_LQ_SS_PARAMS: Configure STBC/BFER via LQ CMD ss_params 215 * @IWL_UCODE_TLV_API_NEW_VERSION: new versioning format 216 * @IWL_UCODE_TLV_API_SCAN_TSF_REPORT: Scan start time reported in scan 217 * iteration complete notification, and the timestamp reported for RX 218 * received during scan, are reported in TSF of the mac specified in the 219 * scan request. 220 * @IWL_UCODE_TLV_API_TKIP_MIC_KEYS: This ucode supports version 2 of 221 * ADD_MODIFY_STA_KEY_API_S_VER_2. 222 * @IWL_UCODE_TLV_API_STA_TYPE: This ucode supports station type assignement. 223 * @IWL_UCODE_TLV_API_NAN2_VER2: This ucode supports NAN API version 2 224 * @IWL_UCODE_TLV_API_ADAPTIVE_DWELL: support for adaptive dwell in scanning 225 * @IWL_UCODE_TLV_API_NEW_RX_STATS: should new RX STATISTICS API be used 226 * @IWL_UCODE_TLV_API_QUOTA_LOW_LATENCY: Quota command includes a field 227 * indicating low latency direction. 228 * @IWL_UCODE_TLV_API_DEPRECATE_TTAK: RX status flag TTAK ok (bit 7) is 229 * deprecated. 230 * @IWL_UCODE_TLV_API_ADAPTIVE_DWELL_V2: This ucode supports version 8 231 * of scan request: SCAN_REQUEST_CMD_UMAC_API_S_VER_8 232 * @IWL_UCODE_TLV_API_FRAG_EBS: This ucode supports fragmented EBS 233 * @IWL_UCODE_TLV_API_REDUCE_TX_POWER: This ucode supports v5 of 234 * the REDUCE_TX_POWER_CMD. 235 * @IWL_UCODE_TLV_API_SHORT_BEACON_NOTIF: This ucode supports the short 236 * version of the beacon notification. 237 * @IWL_UCODE_TLV_API_BEACON_FILTER_V4: This ucode supports v4 of 238 * BEACON_FILTER_CONFIG_API_S_VER_4. 239 * @IWL_UCODE_TLV_API_REGULATORY_NVM_INFO: This ucode supports v4 of 240 * REGULATORY_NVM_GET_INFO_RSP_API_S. 241 * @IWL_UCODE_TLV_API_FTM_NEW_RANGE_REQ: This ucode supports v7 of 242 * LOCATION_RANGE_REQ_CMD_API_S and v6 of LOCATION_RANGE_RESP_NTFY_API_S. 243 * @IWL_UCODE_TLV_API_SCAN_OFFLOAD_CHANS: This ucode supports v2 of 244 * SCAN_OFFLOAD_PROFILE_MATCH_RESULTS_S and v3 of 245 * SCAN_OFFLOAD_PROFILES_QUERY_RSP_S. 246 * @IWL_UCODE_TLV_API_MBSSID_HE: This ucode supports v2 of 247 * STA_CONTEXT_DOT11AX_API_S 248 * @IWL_UCODE_TLV_API_FTM_RTT_ACCURACY: version 7 of the range response API 249 * is supported by FW, this indicates the RTT confidence value 250 * @IWL_UCODE_TLV_API_SAR_TABLE_VER: This ucode supports different sar 251 * version tables. 252 * @IWL_UCODE_TLV_API_REDUCED_SCAN_CONFIG: This ucode supports v3 of 253 * SCAN_CONFIG_DB_CMD_API_S. 254 * @IWL_UCODE_TLV_API_ADWELL_HB_DEF_N_AP: support for setting adaptive dwell 255 * number of APs in the 5 GHz band 256 * @IWL_UCODE_TLV_API_BAND_IN_RX_DATA: FW reports band number in RX notification 257 * @IWL_UCODE_TLV_API_NO_HOST_DISABLE_TX: Firmware offloaded the station disable tx 258 * logic. 259 * @IWL_UCODE_TLV_API_INT_DBG_BUF_CLEAR: Firmware supports clearing the debug 260 * internal buffer 261 * @IWL_UCODE_TLV_API_SMART_FIFO_OFFLOAD: Firmware doesn't need the host to 262 * configure the smart fifo 263 * 264 * @NUM_IWL_UCODE_TLV_API: number of bits used 265 */ 266 enum iwl_ucode_tlv_api { 267 /* API Set 0 */ 268 IWL_UCODE_TLV_API_FRAGMENTED_SCAN = (__force iwl_ucode_tlv_api_t)8, 269 IWL_UCODE_TLV_API_WIFI_MCC_UPDATE = (__force iwl_ucode_tlv_api_t)9, 270 IWL_UCODE_TLV_API_LQ_SS_PARAMS = (__force iwl_ucode_tlv_api_t)18, 271 IWL_UCODE_TLV_API_NEW_VERSION = (__force iwl_ucode_tlv_api_t)20, 272 IWL_UCODE_TLV_API_SCAN_TSF_REPORT = (__force iwl_ucode_tlv_api_t)28, 273 IWL_UCODE_TLV_API_TKIP_MIC_KEYS = (__force iwl_ucode_tlv_api_t)29, 274 IWL_UCODE_TLV_API_STA_TYPE = (__force iwl_ucode_tlv_api_t)30, 275 IWL_UCODE_TLV_API_NAN2_VER2 = (__force iwl_ucode_tlv_api_t)31, 276 /* API Set 1 */ 277 IWL_UCODE_TLV_API_ADAPTIVE_DWELL = (__force iwl_ucode_tlv_api_t)32, 278 IWL_UCODE_TLV_API_OCE = (__force iwl_ucode_tlv_api_t)33, 279 IWL_UCODE_TLV_API_NEW_BEACON_TEMPLATE = (__force iwl_ucode_tlv_api_t)34, 280 IWL_UCODE_TLV_API_NEW_RX_STATS = (__force iwl_ucode_tlv_api_t)35, 281 IWL_UCODE_TLV_API_WOWLAN_KEY_MATERIAL = (__force iwl_ucode_tlv_api_t)36, 282 IWL_UCODE_TLV_API_QUOTA_LOW_LATENCY = (__force iwl_ucode_tlv_api_t)38, 283 IWL_UCODE_TLV_API_DEPRECATE_TTAK = (__force iwl_ucode_tlv_api_t)41, 284 IWL_UCODE_TLV_API_ADAPTIVE_DWELL_V2 = (__force iwl_ucode_tlv_api_t)42, 285 IWL_UCODE_TLV_API_FRAG_EBS = (__force iwl_ucode_tlv_api_t)44, 286 IWL_UCODE_TLV_API_REDUCE_TX_POWER = (__force iwl_ucode_tlv_api_t)45, 287 IWL_UCODE_TLV_API_SHORT_BEACON_NOTIF = (__force iwl_ucode_tlv_api_t)46, 288 IWL_UCODE_TLV_API_BEACON_FILTER_V4 = (__force iwl_ucode_tlv_api_t)47, 289 IWL_UCODE_TLV_API_REGULATORY_NVM_INFO = (__force iwl_ucode_tlv_api_t)48, 290 IWL_UCODE_TLV_API_FTM_NEW_RANGE_REQ = (__force iwl_ucode_tlv_api_t)49, 291 IWL_UCODE_TLV_API_SCAN_OFFLOAD_CHANS = (__force iwl_ucode_tlv_api_t)50, 292 IWL_UCODE_TLV_API_MBSSID_HE = (__force iwl_ucode_tlv_api_t)52, 293 IWL_UCODE_TLV_API_WOWLAN_TCP_SYN_WAKE = (__force iwl_ucode_tlv_api_t)53, 294 IWL_UCODE_TLV_API_FTM_RTT_ACCURACY = (__force iwl_ucode_tlv_api_t)54, 295 IWL_UCODE_TLV_API_SAR_TABLE_VER = (__force iwl_ucode_tlv_api_t)55, 296 IWL_UCODE_TLV_API_REDUCED_SCAN_CONFIG = (__force iwl_ucode_tlv_api_t)56, 297 IWL_UCODE_TLV_API_ADWELL_HB_DEF_N_AP = (__force iwl_ucode_tlv_api_t)57, 298 IWL_UCODE_TLV_API_SCAN_EXT_CHAN_VER = (__force iwl_ucode_tlv_api_t)58, 299 IWL_UCODE_TLV_API_BAND_IN_RX_DATA = (__force iwl_ucode_tlv_api_t)59, 300 /* API Set 2 */ 301 IWL_UCODE_TLV_API_NO_HOST_DISABLE_TX = (__force iwl_ucode_tlv_api_t)66, 302 IWL_UCODE_TLV_API_INT_DBG_BUF_CLEAR = (__force iwl_ucode_tlv_api_t)67, 303 IWL_UCODE_TLV_API_SMART_FIFO_OFFLOAD = (__force iwl_ucode_tlv_api_t)68, 304 305 NUM_IWL_UCODE_TLV_API 306 /* 307 * This construction make both sparse (which cannot increment the previous 308 * member due to its bitwise type) and kernel-doc (which doesn't understand 309 * the ifdef/else properly) work. 310 */ 311 #ifdef __CHECKER__ 312 #define __CHECKER_NUM_IWL_UCODE_TLV_API 128 313 = (__force iwl_ucode_tlv_api_t)__CHECKER_NUM_IWL_UCODE_TLV_API, 314 #define NUM_IWL_UCODE_TLV_API __CHECKER_NUM_IWL_UCODE_TLV_API 315 #endif 316 }; 317 318 typedef unsigned int __bitwise iwl_ucode_tlv_capa_t; 319 320 /** 321 * enum iwl_ucode_tlv_capa - ucode capabilities 322 * @IWL_UCODE_TLV_CAPA_D0I3_SUPPORT: supports D0i3 323 * @IWL_UCODE_TLV_CAPA_LAR_SUPPORT: supports Location Aware Regulatory 324 * @IWL_UCODE_TLV_CAPA_UMAC_SCAN: supports UMAC scan. 325 * @IWL_UCODE_TLV_CAPA_BEAMFORMER: supports Beamformer 326 * @IWL_UCODE_TLV_CAPA_TDLS_SUPPORT: support basic TDLS functionality 327 * @IWL_UCODE_TLV_CAPA_TXPOWER_INSERTION_SUPPORT: supports insertion of current 328 * tx power value into TPC Report action frame and Link Measurement Report 329 * action frame 330 * @IWL_UCODE_TLV_CAPA_DS_PARAM_SET_IE_SUPPORT: supports updating current 331 * channel in DS parameter set element in probe requests. 332 * @IWL_UCODE_TLV_CAPA_WFA_TPC_REP_IE_SUPPORT: supports adding TPC Report IE in 333 * probe requests. 334 * @IWL_UCODE_TLV_CAPA_QUIET_PERIOD_SUPPORT: supports Quiet Period requests 335 * @IWL_UCODE_TLV_CAPA_DQA_SUPPORT: supports dynamic queue allocation (DQA), 336 * which also implies support for the scheduler configuration command 337 * @IWL_UCODE_TLV_CAPA_TDLS_CHANNEL_SWITCH: supports TDLS channel switching 338 * @IWL_UCODE_TLV_CAPA_CNSLDTD_D3_D0_IMG: Consolidated D3-D0 image 339 * @IWL_UCODE_TLV_CAPA_HOTSPOT_SUPPORT: supports Hot Spot Command 340 * @IWL_UCODE_TLV_CAPA_CSUM_SUPPORT: supports TCP Checksum Offload 341 * @IWL_UCODE_TLV_CAPA_RADIO_BEACON_STATS: support radio and beacon statistics 342 * @IWL_UCODE_TLV_CAPA_P2P_SCM_UAPSD: supports U-APSD on p2p interface when it 343 * is standalone or with a BSS station interface in the same binding. 344 * @IWL_UCODE_TLV_CAPA_BT_COEX_PLCR: enabled BT Coex packet level co-running 345 * @IWL_UCODE_TLV_CAPA_LAR_MULTI_MCC: ucode supports LAR updates with different 346 * sources for the MCC. This TLV bit is a future replacement to 347 * IWL_UCODE_TLV_API_WIFI_MCC_UPDATE. When either is set, multi-source LAR 348 * is supported. 349 * @IWL_UCODE_TLV_CAPA_BT_COEX_RRC: supports BT Coex RRC 350 * @IWL_UCODE_TLV_CAPA_GSCAN_SUPPORT: supports gscan (no longer used) 351 * @IWL_UCODE_TLV_CAPA_FRAGMENTED_PNVM_IMG: supports fragmented PNVM image 352 * @IWL_UCODE_TLV_CAPA_SOC_LATENCY_SUPPORT: the firmware supports setting 353 * stabilization latency for SoCs. 354 * @IWL_UCODE_TLV_CAPA_STA_PM_NOTIF: firmware will send STA PM notification 355 * @IWL_UCODE_TLV_CAPA_TLC_OFFLOAD: firmware implements rate scaling algorithm 356 * @IWL_UCODE_TLV_CAPA_DYNAMIC_QUOTA: firmware implements quota related 357 * @IWL_UCODE_TLV_CAPA_COEX_SCHEMA_2: firmware implements Coex Schema 2 358 * IWL_UCODE_TLV_CAPA_CHANNEL_SWITCH_CMD: firmware supports CSA command 359 * @IWL_UCODE_TLV_CAPA_ULTRA_HB_CHANNELS: firmware supports ultra high band 360 * (6 GHz). 361 * @IWL_UCODE_TLV_CAPA_CS_MODIFY: firmware supports modify action CSA command 362 * @IWL_UCODE_TLV_CAPA_EXTENDED_DTS_MEASURE: extended DTS measurement 363 * @IWL_UCODE_TLV_CAPA_SHORT_PM_TIMEOUTS: supports short PM timeouts 364 * @IWL_UCODE_TLV_CAPA_BT_MPLUT_SUPPORT: supports bt-coex Multi-priority LUT 365 * @IWL_UCODE_TLV_CAPA_CSA_AND_TBTT_OFFLOAD: the firmware supports CSA 366 * countdown offloading. Beacon notifications are not sent to the host. 367 * The fw also offloads TBTT alignment. 368 * @IWL_UCODE_TLV_CAPA_BEACON_ANT_SELECTION: firmware will decide on what 369 * antenna the beacon should be transmitted 370 * @IWL_UCODE_TLV_CAPA_BEACON_STORING: firmware will store the latest beacon 371 * from AP and will send it upon d0i3 exit. 372 * @IWL_UCODE_TLV_CAPA_LAR_SUPPORT_V3: support LAR API V3 373 * @IWL_UCODE_TLV_CAPA_CT_KILL_BY_FW: firmware responsible for CT-kill 374 * @IWL_UCODE_TLV_CAPA_TEMP_THS_REPORT_SUPPORT: supports temperature 375 * thresholds reporting 376 * @IWL_UCODE_TLV_CAPA_CTDP_SUPPORT: supports cTDP command 377 * @IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED: supports usniffer enabled in 378 * regular image. 379 * @IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG: support getting more shared 380 * memory addresses from the firmware. 381 * @IWL_UCODE_TLV_CAPA_LQM_SUPPORT: supports Link Quality Measurement 382 * @IWL_UCODE_TLV_CAPA_TX_POWER_ACK: reduced TX power API has larger 383 * command size (command version 4) that supports toggling ACK TX 384 * power reduction. 385 * @IWL_UCODE_TLV_CAPA_D3_DEBUG: supports debug recording during D3 386 * @IWL_UCODE_TLV_CAPA_MCC_UPDATE_11AX_SUPPORT: MCC response support 11ax 387 * capability. 388 * @IWL_UCODE_TLV_CAPA_CSI_REPORTING: firmware is capable of being configured 389 * to report the CSI information with (certain) RX frames 390 * @IWL_UCODE_TLV_CAPA_FTM_CALIBRATED: has FTM calibrated and thus supports both 391 * initiator and responder 392 * @IWL_UCODE_TLV_CAPA_BIOS_OVERRIDE_UNII4_US_CA: supports (de)activating UNII-4 393 * for US/CA/WW from BIOS 394 * @IWL_UCODE_TLV_CAPA_PROTECTED_TWT: Supports protection of TWT action frames 395 * @IWL_UCODE_TLV_CAPA_FW_RESET_HANDSHAKE: Supports the firmware handshake in 396 * reset flow 397 * @IWL_UCODE_TLV_CAPA_PASSIVE_6GHZ_SCAN: Support for passive scan on 6GHz PSC 398 * channels even when these are not enabled. 399 * @IWL_UCODE_TLV_CAPA_DUMP_COMPLETE_SUPPORT: Support for indicating dump collection 400 * complete to FW. 401 * @IWL_UCODE_TLV_CAPA_SPP_AMSDU_SUPPORT: Support SPP (signaling and payload 402 * protected) A-MSDU. 403 * @IWL_UCODE_TLV_CAPA_SECURE_LTF_SUPPORT: Support secure LTF measurement. 404 * @IWL_UCODE_TLV_CAPA_MONITOR_PASSIVE_CHANS: Support monitor mode on otherwise 405 * passive channels 406 * @IWL_UCODE_TLV_CAPA_BIOS_OVERRIDE_5G9_FOR_CA: supports (de)activating 5G9 407 * for CA from BIOS. 408 * @IWL_UCODE_TLV_CAPA_UHB_CANADA_TAS_SUPPORT: supports %TAS_UHB_ALLOWED_CANADA 409 * @IWL_UCODE_TLV_CAPA_EXT_FSEQ_IMAGE_SUPPORT: external FSEQ image support 410 * 411 * @NUM_IWL_UCODE_TLV_CAPA: number of bits used 412 */ 413 enum iwl_ucode_tlv_capa { 414 /* set 0 */ 415 IWL_UCODE_TLV_CAPA_D0I3_SUPPORT = (__force iwl_ucode_tlv_capa_t)0, 416 IWL_UCODE_TLV_CAPA_LAR_SUPPORT = (__force iwl_ucode_tlv_capa_t)1, 417 IWL_UCODE_TLV_CAPA_UMAC_SCAN = (__force iwl_ucode_tlv_capa_t)2, 418 IWL_UCODE_TLV_CAPA_BEAMFORMER = (__force iwl_ucode_tlv_capa_t)3, 419 IWL_UCODE_TLV_CAPA_TDLS_SUPPORT = (__force iwl_ucode_tlv_capa_t)6, 420 IWL_UCODE_TLV_CAPA_TXPOWER_INSERTION_SUPPORT = (__force iwl_ucode_tlv_capa_t)8, 421 IWL_UCODE_TLV_CAPA_DS_PARAM_SET_IE_SUPPORT = (__force iwl_ucode_tlv_capa_t)9, 422 IWL_UCODE_TLV_CAPA_WFA_TPC_REP_IE_SUPPORT = (__force iwl_ucode_tlv_capa_t)10, 423 IWL_UCODE_TLV_CAPA_QUIET_PERIOD_SUPPORT = (__force iwl_ucode_tlv_capa_t)11, 424 IWL_UCODE_TLV_CAPA_DQA_SUPPORT = (__force iwl_ucode_tlv_capa_t)12, 425 IWL_UCODE_TLV_CAPA_TDLS_CHANNEL_SWITCH = (__force iwl_ucode_tlv_capa_t)13, 426 IWL_UCODE_TLV_CAPA_CNSLDTD_D3_D0_IMG = (__force iwl_ucode_tlv_capa_t)17, 427 IWL_UCODE_TLV_CAPA_HOTSPOT_SUPPORT = (__force iwl_ucode_tlv_capa_t)18, 428 IWL_UCODE_TLV_CAPA_CSUM_SUPPORT = (__force iwl_ucode_tlv_capa_t)21, 429 IWL_UCODE_TLV_CAPA_RADIO_BEACON_STATS = (__force iwl_ucode_tlv_capa_t)22, 430 IWL_UCODE_TLV_CAPA_P2P_SCM_UAPSD = (__force iwl_ucode_tlv_capa_t)26, 431 IWL_UCODE_TLV_CAPA_BT_COEX_PLCR = (__force iwl_ucode_tlv_capa_t)28, 432 IWL_UCODE_TLV_CAPA_LAR_MULTI_MCC = (__force iwl_ucode_tlv_capa_t)29, 433 IWL_UCODE_TLV_CAPA_BT_COEX_RRC = (__force iwl_ucode_tlv_capa_t)30, 434 IWL_UCODE_TLV_CAPA_GSCAN_SUPPORT = (__force iwl_ucode_tlv_capa_t)31, 435 436 /* set 1 */ 437 IWL_UCODE_TLV_CAPA_FRAGMENTED_PNVM_IMG = (__force iwl_ucode_tlv_capa_t)32, 438 IWL_UCODE_TLV_CAPA_SOC_LATENCY_SUPPORT = (__force iwl_ucode_tlv_capa_t)37, 439 IWL_UCODE_TLV_CAPA_STA_PM_NOTIF = (__force iwl_ucode_tlv_capa_t)38, 440 IWL_UCODE_TLV_CAPA_BINDING_CDB_SUPPORT = (__force iwl_ucode_tlv_capa_t)39, 441 IWL_UCODE_TLV_CAPA_CDB_SUPPORT = (__force iwl_ucode_tlv_capa_t)40, 442 IWL_UCODE_TLV_CAPA_D0I3_END_FIRST = (__force iwl_ucode_tlv_capa_t)41, 443 IWL_UCODE_TLV_CAPA_TLC_OFFLOAD = (__force iwl_ucode_tlv_capa_t)43, 444 IWL_UCODE_TLV_CAPA_DYNAMIC_QUOTA = (__force iwl_ucode_tlv_capa_t)44, 445 IWL_UCODE_TLV_CAPA_COEX_SCHEMA_2 = (__force iwl_ucode_tlv_capa_t)45, 446 IWL_UCODE_TLV_CAPA_CHANNEL_SWITCH_CMD = (__force iwl_ucode_tlv_capa_t)46, 447 IWL_UCODE_TLV_CAPA_FTM_CALIBRATED = (__force iwl_ucode_tlv_capa_t)47, 448 IWL_UCODE_TLV_CAPA_ULTRA_HB_CHANNELS = (__force iwl_ucode_tlv_capa_t)48, 449 IWL_UCODE_TLV_CAPA_CS_MODIFY = (__force iwl_ucode_tlv_capa_t)49, 450 IWL_UCODE_TLV_CAPA_SET_LTR_GEN2 = (__force iwl_ucode_tlv_capa_t)50, 451 IWL_UCODE_TLV_CAPA_SET_PPAG = (__force iwl_ucode_tlv_capa_t)52, 452 IWL_UCODE_TLV_CAPA_TAS_CFG = (__force iwl_ucode_tlv_capa_t)53, 453 IWL_UCODE_TLV_CAPA_SESSION_PROT_CMD = (__force iwl_ucode_tlv_capa_t)54, 454 IWL_UCODE_TLV_CAPA_PROTECTED_TWT = (__force iwl_ucode_tlv_capa_t)56, 455 IWL_UCODE_TLV_CAPA_FW_RESET_HANDSHAKE = (__force iwl_ucode_tlv_capa_t)57, 456 IWL_UCODE_TLV_CAPA_PASSIVE_6GHZ_SCAN = (__force iwl_ucode_tlv_capa_t)58, 457 IWL_UCODE_TLV_CAPA_HIDDEN_6GHZ_SCAN = (__force iwl_ucode_tlv_capa_t)59, 458 IWL_UCODE_TLV_CAPA_BROADCAST_TWT = (__force iwl_ucode_tlv_capa_t)60, 459 IWL_UCODE_TLV_CAPA_COEX_HIGH_PRIO = (__force iwl_ucode_tlv_capa_t)61, 460 IWL_UCODE_TLV_CAPA_RFIM_SUPPORT = (__force iwl_ucode_tlv_capa_t)62, 461 IWL_UCODE_TLV_CAPA_BAID_ML_SUPPORT = (__force iwl_ucode_tlv_capa_t)63, 462 463 /* set 2 */ 464 IWL_UCODE_TLV_CAPA_EXTENDED_DTS_MEASURE = (__force iwl_ucode_tlv_capa_t)64, 465 IWL_UCODE_TLV_CAPA_SHORT_PM_TIMEOUTS = (__force iwl_ucode_tlv_capa_t)65, 466 IWL_UCODE_TLV_CAPA_BT_MPLUT_SUPPORT = (__force iwl_ucode_tlv_capa_t)67, 467 IWL_UCODE_TLV_CAPA_MULTI_QUEUE_RX_SUPPORT = (__force iwl_ucode_tlv_capa_t)68, 468 IWL_UCODE_TLV_CAPA_CSA_AND_TBTT_OFFLOAD = (__force iwl_ucode_tlv_capa_t)70, 469 IWL_UCODE_TLV_CAPA_BEACON_ANT_SELECTION = (__force iwl_ucode_tlv_capa_t)71, 470 IWL_UCODE_TLV_CAPA_BEACON_STORING = (__force iwl_ucode_tlv_capa_t)72, 471 IWL_UCODE_TLV_CAPA_LAR_SUPPORT_V3 = (__force iwl_ucode_tlv_capa_t)73, 472 IWL_UCODE_TLV_CAPA_CT_KILL_BY_FW = (__force iwl_ucode_tlv_capa_t)74, 473 IWL_UCODE_TLV_CAPA_TEMP_THS_REPORT_SUPPORT = (__force iwl_ucode_tlv_capa_t)75, 474 IWL_UCODE_TLV_CAPA_CTDP_SUPPORT = (__force iwl_ucode_tlv_capa_t)76, 475 IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED = (__force iwl_ucode_tlv_capa_t)77, 476 IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG = (__force iwl_ucode_tlv_capa_t)80, 477 IWL_UCODE_TLV_CAPA_LQM_SUPPORT = (__force iwl_ucode_tlv_capa_t)81, 478 IWL_UCODE_TLV_CAPA_TX_POWER_ACK = (__force iwl_ucode_tlv_capa_t)84, 479 IWL_UCODE_TLV_CAPA_D3_DEBUG = (__force iwl_ucode_tlv_capa_t)87, 480 IWL_UCODE_TLV_CAPA_LED_CMD_SUPPORT = (__force iwl_ucode_tlv_capa_t)88, 481 IWL_UCODE_TLV_CAPA_MCC_UPDATE_11AX_SUPPORT = (__force iwl_ucode_tlv_capa_t)89, 482 IWL_UCODE_TLV_CAPA_CSI_REPORTING = (__force iwl_ucode_tlv_capa_t)90, 483 IWL_UCODE_TLV_CAPA_DBG_SUSPEND_RESUME_CMD_SUPP = (__force iwl_ucode_tlv_capa_t)92, 484 IWL_UCODE_TLV_CAPA_DBG_BUF_ALLOC_CMD_SUPP = (__force iwl_ucode_tlv_capa_t)93, 485 486 /* set 3 */ 487 IWL_UCODE_TLV_CAPA_BIOS_OVERRIDE_UNII4_US_CA = (__force iwl_ucode_tlv_capa_t)96, 488 489 /* 490 * @IWL_UCODE_TLV_CAPA_PSC_CHAN_SUPPORT: supports PSC channels 491 */ 492 IWL_UCODE_TLV_CAPA_PSC_CHAN_SUPPORT = (__force iwl_ucode_tlv_capa_t)98, 493 494 IWL_UCODE_TLV_CAPA_BIGTK_SUPPORT = (__force iwl_ucode_tlv_capa_t)100, 495 IWL_UCODE_TLV_CAPA_SPP_AMSDU_SUPPORT = (__force iwl_ucode_tlv_capa_t)103, 496 IWL_UCODE_TLV_CAPA_DRAM_FRAG_SUPPORT = (__force iwl_ucode_tlv_capa_t)104, 497 IWL_UCODE_TLV_CAPA_DUMP_COMPLETE_SUPPORT = (__force iwl_ucode_tlv_capa_t)105, 498 IWL_UCODE_TLV_CAPA_SYNCED_TIME = (__force iwl_ucode_tlv_capa_t)106, 499 IWL_UCODE_TLV_CAPA_TIME_SYNC_BOTH_FTM_TM = (__force iwl_ucode_tlv_capa_t)108, 500 IWL_UCODE_TLV_CAPA_BIGTK_TX_SUPPORT = (__force iwl_ucode_tlv_capa_t)109, 501 IWL_UCODE_TLV_CAPA_MLD_API_SUPPORT = (__force iwl_ucode_tlv_capa_t)110, 502 IWL_UCODE_TLV_CAPA_SCAN_DONT_TOGGLE_ANT = (__force iwl_ucode_tlv_capa_t)111, 503 IWL_UCODE_TLV_CAPA_PPAG_CHINA_BIOS_SUPPORT = (__force iwl_ucode_tlv_capa_t)112, 504 IWL_UCODE_TLV_CAPA_OFFLOAD_BTM_SUPPORT = (__force iwl_ucode_tlv_capa_t)113, 505 IWL_UCODE_TLV_CAPA_STA_EXP_MFP_SUPPORT = (__force iwl_ucode_tlv_capa_t)114, 506 IWL_UCODE_TLV_CAPA_SNIFF_VALIDATE_SUPPORT = (__force iwl_ucode_tlv_capa_t)116, 507 IWL_UCODE_TLV_CAPA_CHINA_22_REG_SUPPORT = (__force iwl_ucode_tlv_capa_t)117, 508 IWL_UCODE_TLV_CAPA_SECURE_LTF_SUPPORT = (__force iwl_ucode_tlv_capa_t)121, 509 IWL_UCODE_TLV_CAPA_MONITOR_PASSIVE_CHANS = (__force iwl_ucode_tlv_capa_t)122, 510 IWL_UCODE_TLV_CAPA_BIOS_OVERRIDE_5G9_FOR_CA = (__force iwl_ucode_tlv_capa_t)123, 511 IWL_UCODE_TLV_CAPA_UHB_CANADA_TAS_SUPPORT = (__force iwl_ucode_tlv_capa_t)124, 512 IWL_UCODE_TLV_CAPA_EXT_FSEQ_IMAGE_SUPPORT = (__force iwl_ucode_tlv_capa_t)125, 513 514 /* set 4 */ 515 /** 516 * @IWL_UCODE_TLV_CAPA_RESET_DURING_ASSERT: FW reset handshake is needed 517 * during assert handling even if the dump isn't split 518 */ 519 IWL_UCODE_TLV_CAPA_RESET_DURING_ASSERT = (__force iwl_ucode_tlv_capa_t)(4 * 32 + 0), 520 NUM_IWL_UCODE_TLV_CAPA 521 /* 522 * This construction make both sparse (which cannot increment the previous 523 * member due to its bitwise type) and kernel-doc (which doesn't understand 524 * the ifdef/else properly) work. 525 */ 526 #ifdef __CHECKER__ 527 #define __CHECKER_NUM_IWL_UCODE_TLV_CAPA 128 528 = (__force iwl_ucode_tlv_capa_t)__CHECKER_NUM_IWL_UCODE_TLV_CAPA, 529 #define NUM_IWL_UCODE_TLV_CAPA __CHECKER_NUM_IWL_UCODE_TLV_CAPA 530 #endif 531 }; 532 533 /* The default calibrate table size if not specified by firmware file */ 534 #define IWL_DEFAULT_STANDARD_PHY_CALIBRATE_TBL_SIZE 18 535 #define IWL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE 19 536 #define IWL_MAX_PHY_CALIBRATE_TBL_SIZE 253 537 538 /* The default max probe length if not specified by the firmware file */ 539 #define IWL_DEFAULT_MAX_PROBE_LENGTH 200 540 541 /* 542 * For 16.0 uCode and above, there is no differentiation between sections, 543 * just an offset to the HW address. 544 */ 545 #define CPU1_CPU2_SEPARATOR_SECTION 0xFFFFCCCC 546 #define PAGING_SEPARATOR_SECTION 0xAAAABBBB 547 548 /* uCode version contains 4 values: Major/Minor/API/Serial */ 549 #define IWL_UCODE_MAJOR(ver) (((ver) & 0xFF000000) >> 24) 550 #define IWL_UCODE_MINOR(ver) (((ver) & 0x00FF0000) >> 16) 551 #define IWL_UCODE_API(ver) (((ver) & 0x0000FF00) >> 8) 552 #define IWL_UCODE_SERIAL(ver) ((ver) & 0x000000FF) 553 554 /** 555 * struct iwl_tlv_calib_ctrl - Calibration control struct. 556 * Sent as part of the phy configuration command. 557 * @flow_trigger: bitmap for which calibrations to perform according to 558 * flow triggers. 559 * @event_trigger: bitmap for which calibrations to perform according to 560 * event triggers. 561 */ 562 struct iwl_tlv_calib_ctrl { 563 __le32 flow_trigger; 564 __le32 event_trigger; 565 } __packed; 566 567 enum iwl_fw_phy_cfg { 568 FW_PHY_CFG_RADIO_TYPE_POS = 0, 569 FW_PHY_CFG_RADIO_TYPE = 0x3 << FW_PHY_CFG_RADIO_TYPE_POS, 570 FW_PHY_CFG_RADIO_STEP_POS = 2, 571 FW_PHY_CFG_RADIO_STEP = 0x3 << FW_PHY_CFG_RADIO_STEP_POS, 572 FW_PHY_CFG_RADIO_DASH_POS = 4, 573 FW_PHY_CFG_RADIO_DASH = 0x3 << FW_PHY_CFG_RADIO_DASH_POS, 574 FW_PHY_CFG_TX_CHAIN_POS = 16, 575 FW_PHY_CFG_TX_CHAIN = 0xf << FW_PHY_CFG_TX_CHAIN_POS, 576 FW_PHY_CFG_RX_CHAIN_POS = 20, 577 FW_PHY_CFG_RX_CHAIN = 0xf << FW_PHY_CFG_RX_CHAIN_POS, 578 FW_PHY_CFG_CHAIN_SAD_POS = 23, 579 FW_PHY_CFG_CHAIN_SAD_ENABLED = 0x1 << FW_PHY_CFG_CHAIN_SAD_POS, 580 FW_PHY_CFG_CHAIN_SAD_ANT_A = 0x2 << FW_PHY_CFG_CHAIN_SAD_POS, 581 FW_PHY_CFG_CHAIN_SAD_ANT_B = 0x4 << FW_PHY_CFG_CHAIN_SAD_POS, 582 FW_PHY_CFG_SHARED_CLK = BIT(31), 583 }; 584 585 enum iwl_fw_dbg_reg_operator { 586 CSR_ASSIGN, 587 CSR_SETBIT, 588 CSR_CLEARBIT, 589 590 PRPH_ASSIGN, 591 PRPH_SETBIT, 592 PRPH_CLEARBIT, 593 594 INDIRECT_ASSIGN, 595 INDIRECT_SETBIT, 596 INDIRECT_CLEARBIT, 597 598 PRPH_BLOCKBIT, 599 }; 600 601 /** 602 * struct iwl_fw_dbg_reg_op - an operation on a register 603 * 604 * @op: &enum iwl_fw_dbg_reg_operator 605 * @reserved: reserved 606 * @addr: offset of the register 607 * @val: value 608 */ 609 struct iwl_fw_dbg_reg_op { 610 u8 op; 611 u8 reserved[3]; 612 __le32 addr; 613 __le32 val; 614 } __packed; 615 616 /** 617 * enum iwl_fw_dbg_monitor_mode - available monitor recording modes 618 * 619 * @SMEM_MODE: monitor stores the data in SMEM 620 * @EXTERNAL_MODE: monitor stores the data in allocated DRAM 621 * @MARBH_MODE: monitor stores the data in MARBH buffer 622 * @MIPI_MODE: monitor outputs the data through the MIPI interface 623 */ 624 enum iwl_fw_dbg_monitor_mode { 625 SMEM_MODE = 0, 626 EXTERNAL_MODE = 1, 627 MARBH_MODE = 2, 628 MIPI_MODE = 3, 629 }; 630 631 /** 632 * struct iwl_fw_dbg_mem_seg_tlv - configures the debug data memory segments 633 * 634 * @data_type: the memory segment type to record 635 * @ofs: the memory segment offset 636 * @len: the memory segment length, in bytes 637 * 638 * This parses IWL_UCODE_TLV_FW_MEM_SEG 639 */ 640 struct iwl_fw_dbg_mem_seg_tlv { 641 __le32 data_type; 642 __le32 ofs; 643 __le32 len; 644 } __packed; 645 646 /** 647 * struct iwl_fw_dbg_dest_tlv_v1 - configures the destination of the debug data 648 * 649 * @version: version of the TLV - currently 0 650 * @monitor_mode: &enum iwl_fw_dbg_monitor_mode 651 * @size_power: buffer size will be 2^(size_power + 11) 652 * @reserved: reserved 653 * @base_reg: addr of the base addr register (PRPH) 654 * @end_reg: addr of the end addr register (PRPH) 655 * @write_ptr_reg: the addr of the reg of the write pointer 656 * @wrap_count: the addr of the reg of the wrap_count 657 * @base_shift: shift right of the base addr reg 658 * @end_shift: shift right of the end addr reg 659 * @reg_ops: array of registers operations 660 * 661 * This parses IWL_UCODE_TLV_FW_DBG_DEST 662 */ 663 struct iwl_fw_dbg_dest_tlv_v1 { 664 u8 version; 665 u8 monitor_mode; 666 u8 size_power; 667 u8 reserved; 668 __le32 base_reg; 669 __le32 end_reg; 670 __le32 write_ptr_reg; 671 __le32 wrap_count; 672 u8 base_shift; 673 u8 end_shift; 674 struct iwl_fw_dbg_reg_op reg_ops[]; 675 } __packed; 676 677 /* Mask of the register for defining the LDBG MAC2SMEM buffer SMEM size */ 678 #define IWL_LDBG_M2S_BUF_SIZE_MSK 0x0fff0000 679 /* Mask of the register for defining the LDBG MAC2SMEM SMEM base address */ 680 #define IWL_LDBG_M2S_BUF_BA_MSK 0x00000fff 681 /* The smem buffer chunks are in units of 256 bits */ 682 #define IWL_M2S_UNIT_SIZE 0x100 683 684 struct iwl_fw_dbg_dest_tlv { 685 u8 version; 686 u8 monitor_mode; 687 u8 size_power; 688 u8 reserved; 689 __le32 cfg_reg; 690 __le32 write_ptr_reg; 691 __le32 wrap_count; 692 u8 base_shift; 693 u8 size_shift; 694 struct iwl_fw_dbg_reg_op reg_ops[]; 695 } __packed; 696 697 struct iwl_fw_dbg_conf_hcmd { 698 u8 id; 699 u8 reserved; 700 __le16 len; 701 u8 data[]; 702 } __packed; 703 704 /** 705 * enum iwl_fw_dbg_trigger_mode - triggers functionalities 706 * 707 * @IWL_FW_DBG_TRIGGER_START: when trigger occurs re-conf the dbg mechanism 708 * @IWL_FW_DBG_TRIGGER_STOP: when trigger occurs pull the dbg data 709 * @IWL_FW_DBG_TRIGGER_MONITOR_ONLY: when trigger occurs trigger is set to 710 * collect only monitor data 711 */ 712 enum iwl_fw_dbg_trigger_mode { 713 IWL_FW_DBG_TRIGGER_START = BIT(0), 714 IWL_FW_DBG_TRIGGER_STOP = BIT(1), 715 IWL_FW_DBG_TRIGGER_MONITOR_ONLY = BIT(2), 716 }; 717 718 /** 719 * enum iwl_fw_dbg_trigger_flags - the flags supported by wrt triggers 720 * @IWL_FW_DBG_FORCE_RESTART: force a firmware restart 721 */ 722 enum iwl_fw_dbg_trigger_flags { 723 IWL_FW_DBG_FORCE_RESTART = BIT(0), 724 }; 725 726 /** 727 * enum iwl_fw_dbg_trigger_vif_type - define the VIF type for a trigger 728 * @IWL_FW_DBG_CONF_VIF_ANY: any vif type 729 * @IWL_FW_DBG_CONF_VIF_IBSS: IBSS mode 730 * @IWL_FW_DBG_CONF_VIF_STATION: BSS mode 731 * @IWL_FW_DBG_CONF_VIF_AP: AP mode 732 * @IWL_FW_DBG_CONF_VIF_P2P_CLIENT: P2P Client mode 733 * @IWL_FW_DBG_CONF_VIF_P2P_GO: P2P GO mode 734 * @IWL_FW_DBG_CONF_VIF_P2P_DEVICE: P2P device 735 */ 736 enum iwl_fw_dbg_trigger_vif_type { 737 IWL_FW_DBG_CONF_VIF_ANY = NL80211_IFTYPE_UNSPECIFIED, 738 IWL_FW_DBG_CONF_VIF_IBSS = NL80211_IFTYPE_ADHOC, 739 IWL_FW_DBG_CONF_VIF_STATION = NL80211_IFTYPE_STATION, 740 IWL_FW_DBG_CONF_VIF_AP = NL80211_IFTYPE_AP, 741 IWL_FW_DBG_CONF_VIF_P2P_CLIENT = NL80211_IFTYPE_P2P_CLIENT, 742 IWL_FW_DBG_CONF_VIF_P2P_GO = NL80211_IFTYPE_P2P_GO, 743 IWL_FW_DBG_CONF_VIF_P2P_DEVICE = NL80211_IFTYPE_P2P_DEVICE, 744 }; 745 746 /** 747 * struct iwl_fw_dbg_trigger_tlv - a TLV that describes the trigger 748 * @id: &enum iwl_fw_dbg_trigger 749 * @vif_type: &enum iwl_fw_dbg_trigger_vif_type 750 * @stop_conf_ids: bitmap of configurations this trigger relates to. 751 * if the mode is %IWL_FW_DBG_TRIGGER_STOP, then if the bit corresponding 752 * to the currently running configuration is set, the data should be 753 * collected. 754 * @stop_delay: how many milliseconds to wait before collecting the data 755 * after the STOP trigger fires. 756 * @mode: &enum iwl_fw_dbg_trigger_mode - can be stop / start of both 757 * @start_conf_id: if mode is %IWL_FW_DBG_TRIGGER_START, this defines what 758 * configuration should be applied when the triggers kicks in. 759 * @occurrences: number of occurrences. 0 means the trigger will never fire. 760 * @trig_dis_ms: the time, in milliseconds, after an occurrence of this 761 * trigger in which another occurrence should be ignored. 762 * @flags: &enum iwl_fw_dbg_trigger_flags 763 * @reserved: reserved (for alignment) 764 * @data: trigger data 765 */ 766 struct iwl_fw_dbg_trigger_tlv { 767 __le32 id; 768 __le32 vif_type; 769 __le32 stop_conf_ids; 770 __le32 stop_delay; 771 u8 mode; 772 u8 start_conf_id; 773 __le16 occurrences; 774 __le16 trig_dis_ms; 775 u8 flags; 776 u8 reserved[5]; 777 778 u8 data[]; 779 } __packed; 780 781 #define FW_DBG_START_FROM_ALIVE 0 782 #define FW_DBG_CONF_MAX 32 783 #define FW_DBG_INVALID 0xff 784 785 /** 786 * struct iwl_fw_dbg_trigger_missed_bcon - configures trigger for missed beacons 787 * @stop_consec_missed_bcon: stop recording if threshold is crossed. 788 * @stop_consec_missed_bcon_since_rx: stop recording if threshold is crossed. 789 * @start_consec_missed_bcon: start recording if threshold is crossed. 790 * @start_consec_missed_bcon_since_rx: start recording if threshold is crossed. 791 * @reserved1: reserved 792 * @reserved2: reserved 793 */ 794 struct iwl_fw_dbg_trigger_missed_bcon { 795 __le32 stop_consec_missed_bcon; 796 __le32 stop_consec_missed_bcon_since_rx; 797 __le32 reserved2[2]; 798 __le32 start_consec_missed_bcon; 799 __le32 start_consec_missed_bcon_since_rx; 800 __le32 reserved1[2]; 801 } __packed; 802 803 /** 804 * struct iwl_fw_dbg_trigger_cmd - configures trigger for messages from FW. 805 * @cmds: the list of commands to trigger the collection on 806 */ 807 struct iwl_fw_dbg_trigger_cmd { 808 struct cmd { 809 u8 cmd_id; 810 u8 group_id; 811 } __packed cmds[16]; 812 } __packed; 813 814 /** 815 * struct iwl_fw_dbg_trigger_stats - configures trigger for statistics 816 * @stop_offset: the offset of the value to be monitored 817 * @stop_threshold: the threshold above which to collect 818 * @start_offset: the offset of the value to be monitored 819 * @start_threshold: the threshold above which to start recording 820 */ 821 struct iwl_fw_dbg_trigger_stats { 822 __le32 stop_offset; 823 __le32 stop_threshold; 824 __le32 start_offset; 825 __le32 start_threshold; 826 } __packed; 827 828 /** 829 * struct iwl_fw_dbg_trigger_low_rssi - trigger for low beacon RSSI 830 * @rssi: RSSI value to trigger at 831 */ 832 struct iwl_fw_dbg_trigger_low_rssi { 833 __le32 rssi; 834 } __packed; 835 836 /** 837 * struct iwl_fw_dbg_trigger_mlme - configures trigger for mlme events 838 * @stop_auth_denied: number of denied authentication to collect 839 * @stop_auth_timeout: number of authentication timeout to collect 840 * @stop_rx_deauth: number of Rx deauth before to collect 841 * @stop_tx_deauth: number of Tx deauth before to collect 842 * @stop_assoc_denied: number of denied association to collect 843 * @stop_assoc_timeout: number of association timeout to collect 844 * @stop_connection_loss: number of connection loss to collect 845 * @start_auth_denied: number of denied authentication to start recording 846 * @start_auth_timeout: number of authentication timeout to start recording 847 * @start_rx_deauth: number of Rx deauth to start recording 848 * @start_tx_deauth: number of Tx deauth to start recording 849 * @start_assoc_denied: number of denied association to start recording 850 * @start_assoc_timeout: number of association timeout to start recording 851 * @start_connection_loss: number of connection loss to start recording 852 */ 853 struct iwl_fw_dbg_trigger_mlme { 854 u8 stop_auth_denied; 855 u8 stop_auth_timeout; 856 u8 stop_rx_deauth; 857 u8 stop_tx_deauth; 858 859 u8 stop_assoc_denied; 860 u8 stop_assoc_timeout; 861 u8 stop_connection_loss; 862 u8 reserved; 863 864 u8 start_auth_denied; 865 u8 start_auth_timeout; 866 u8 start_rx_deauth; 867 u8 start_tx_deauth; 868 869 u8 start_assoc_denied; 870 u8 start_assoc_timeout; 871 u8 start_connection_loss; 872 u8 reserved2; 873 } __packed; 874 875 /** 876 * struct iwl_fw_dbg_trigger_txq_timer - configures the Tx queue's timer 877 * @command_queue: timeout for the command queue in ms 878 * @bss: timeout for the queues of a BSS (except for TDLS queues) in ms 879 * @softap: timeout for the queues of a softAP in ms 880 * @p2p_go: timeout for the queues of a P2P GO in ms 881 * @p2p_client: timeout for the queues of a P2P client in ms 882 * @p2p_device: timeout for the queues of a P2P device in ms 883 * @ibss: timeout for the queues of an IBSS in ms 884 * @tdls: timeout for the queues of a TDLS station in ms 885 */ 886 struct iwl_fw_dbg_trigger_txq_timer { 887 __le32 command_queue; 888 __le32 bss; 889 __le32 softap; 890 __le32 p2p_go; 891 __le32 p2p_client; 892 __le32 p2p_device; 893 __le32 ibss; 894 __le32 tdls; 895 __le32 reserved[4]; 896 } __packed; 897 898 /** 899 * struct iwl_fw_dbg_trigger_time_event - configures a time event trigger 900 * time_Events: a list of tuples <id, action_bitmap>. The driver will issue a 901 * trigger each time a time event notification that relates to time event 902 * id with one of the actions in the bitmap is received and 903 * BIT(notif->status) is set in status_bitmap. 904 * 905 */ 906 struct iwl_fw_dbg_trigger_time_event { 907 struct { 908 __le32 id; 909 __le32 action_bitmap; 910 __le32 status_bitmap; 911 } __packed time_events[16]; 912 } __packed; 913 914 /** 915 * struct iwl_fw_dbg_trigger_ba - configures BlockAck related trigger 916 * rx_ba_start: tid bitmap to configure on what tid the trigger should occur 917 * when an Rx BlockAck session is started. 918 * rx_ba_stop: tid bitmap to configure on what tid the trigger should occur 919 * when an Rx BlockAck session is stopped. 920 * tx_ba_start: tid bitmap to configure on what tid the trigger should occur 921 * when a Tx BlockAck session is started. 922 * tx_ba_stop: tid bitmap to configure on what tid the trigger should occur 923 * when a Tx BlockAck session is stopped. 924 * rx_bar: tid bitmap to configure on what tid the trigger should occur 925 * when a BAR is received (for a Tx BlockAck session). 926 * tx_bar: tid bitmap to configure on what tid the trigger should occur 927 * when a BAR is send (for an Rx BlocAck session). 928 * frame_timeout: tid bitmap to configure on what tid the trigger should occur 929 * when a frame times out in the reordering buffer. 930 */ 931 struct iwl_fw_dbg_trigger_ba { 932 __le16 rx_ba_start; 933 __le16 rx_ba_stop; 934 __le16 tx_ba_start; 935 __le16 tx_ba_stop; 936 __le16 rx_bar; 937 __le16 tx_bar; 938 __le16 frame_timeout; 939 } __packed; 940 941 /** 942 * struct iwl_fw_dbg_trigger_tdls - configures trigger for TDLS events. 943 * @action_bitmap: the TDLS action to trigger the collection upon 944 * @peer_mode: trigger on specific peer or all 945 * @peer: the TDLS peer to trigger the collection on 946 */ 947 struct iwl_fw_dbg_trigger_tdls { 948 u8 action_bitmap; 949 u8 peer_mode; 950 u8 peer[ETH_ALEN]; 951 u8 reserved[4]; 952 } __packed; 953 954 /** 955 * struct iwl_fw_dbg_trigger_tx_status - configures trigger for tx response 956 * status. 957 * @statuses: the list of statuses to trigger the collection on 958 */ 959 struct iwl_fw_dbg_trigger_tx_status { 960 struct tx_status { 961 u8 status; 962 u8 reserved[3]; 963 } __packed statuses[16]; 964 __le32 reserved[2]; 965 } __packed; 966 967 /** 968 * struct iwl_fw_dbg_conf_tlv - a TLV that describes a debug configuration. 969 * @id: conf id 970 * @usniffer: should the uSniffer image be used 971 * @num_of_hcmds: how many HCMDs to send are present here 972 * @hcmd: a variable length host command to be sent to apply the configuration. 973 * If there is more than one HCMD to send, they will appear one after the 974 * other and be sent in the order that they appear in. 975 * This parses IWL_UCODE_TLV_FW_DBG_CONF. The user can add up-to 976 * %FW_DBG_CONF_MAX configuration per run. 977 */ 978 struct iwl_fw_dbg_conf_tlv { 979 u8 id; 980 u8 usniffer; 981 u8 reserved; 982 u8 num_of_hcmds; 983 struct iwl_fw_dbg_conf_hcmd hcmd; 984 } __packed; 985 986 #define IWL_FW_CMD_VER_UNKNOWN 99 987 988 /** 989 * struct iwl_fw_cmd_version - firmware command version entry 990 * @cmd: command ID 991 * @group: group ID 992 * @cmd_ver: command version 993 * @notif_ver: notification version 994 */ 995 struct iwl_fw_cmd_version { 996 u8 cmd; 997 u8 group; 998 u8 cmd_ver; 999 u8 notif_ver; 1000 } __packed; 1001 1002 struct iwl_fw_tcm_error_addr { 1003 __le32 addr; 1004 }; /* FW_TLV_TCM_ERROR_INFO_ADDRS_S */ 1005 1006 struct iwl_fw_dump_exclude { 1007 __le32 addr, size; 1008 }; 1009 1010 struct iwl_fw_fseq_bin_version { 1011 __le32 major, minor; 1012 }; /* FW_TLV_FSEQ_BIN_VERSION_S */ 1013 1014 static inline size_t _iwl_tlv_array_len(const struct iwl_ucode_tlv *tlv, 1015 size_t fixed_size, size_t var_size) 1016 { 1017 size_t var_len = le32_to_cpu(tlv->length) - fixed_size; 1018 1019 if (WARN_ON(var_len % var_size)) 1020 return 0; 1021 1022 return var_len / var_size; 1023 } 1024 1025 #define iwl_tlv_array_len(_tlv_ptr, _struct_ptr, _memb) \ 1026 _iwl_tlv_array_len((_tlv_ptr), sizeof(*(_struct_ptr)), \ 1027 sizeof(_struct_ptr->_memb[0])) 1028 1029 #define iwl_tlv_array_len_with_size(_tlv_ptr, _struct_ptr, _size) \ 1030 _iwl_tlv_array_len((_tlv_ptr), sizeof(*(_struct_ptr)), _size) 1031 1032 /* external FSEQ file */ 1033 #define IWL_FSEQ_FILE "intel/fseq-%04x-%04x" 1034 #define IWL_FSEQ_MAGIC "INTEL-CNV-FSEQ\n\0" 1035 1036 struct iwl_fseq_file { 1037 char magic[16]; 1038 char version[16]; 1039 __le32 bt_len; 1040 __le32 wifi_len; 1041 u8 reserved[8]; 1042 u8 data[]; 1043 } __packed; 1044 1045 #endif /* __iwl_fw_file_h__ */ 1046