1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ 2 /* 3 * Copyright (C) 2008-2014, 2018-2021 Intel Corporation 4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH 5 * Copyright (C) 2016-2017 Intel Deutschland GmbH 6 */ 7 #ifndef __iwl_fw_file_h__ 8 #define __iwl_fw_file_h__ 9 10 #include <linux/netdevice.h> 11 #include <linux/nl80211.h> 12 13 /* v1/v2 uCode file layout */ 14 struct iwl_ucode_header { 15 __le32 ver; /* major/minor/API/serial */ 16 union { 17 struct { 18 __le32 inst_size; /* bytes of runtime code */ 19 __le32 data_size; /* bytes of runtime data */ 20 __le32 init_size; /* bytes of init code */ 21 __le32 init_data_size; /* bytes of init data */ 22 __le32 boot_size; /* bytes of bootstrap code */ 23 u8 data[0]; /* in same order as sizes */ 24 } v1; 25 struct { 26 __le32 build; /* build number */ 27 __le32 inst_size; /* bytes of runtime code */ 28 __le32 data_size; /* bytes of runtime data */ 29 __le32 init_size; /* bytes of init code */ 30 __le32 init_data_size; /* bytes of init data */ 31 __le32 boot_size; /* bytes of bootstrap code */ 32 u8 data[0]; /* in same order as sizes */ 33 } v2; 34 } u; 35 }; 36 37 #define IWL_UCODE_TLV_DEBUG_BASE 0x1000005 38 #define IWL_UCODE_TLV_CONST_BASE 0x100 39 40 /* 41 * new TLV uCode file layout 42 * 43 * The new TLV file format contains TLVs, that each specify 44 * some piece of data. 45 */ 46 47 enum iwl_ucode_tlv_type { 48 IWL_UCODE_TLV_INVALID = 0, /* unused */ 49 IWL_UCODE_TLV_INST = 1, 50 IWL_UCODE_TLV_DATA = 2, 51 IWL_UCODE_TLV_INIT = 3, 52 IWL_UCODE_TLV_INIT_DATA = 4, 53 IWL_UCODE_TLV_BOOT = 5, 54 IWL_UCODE_TLV_PROBE_MAX_LEN = 6, /* a u32 value */ 55 IWL_UCODE_TLV_PAN = 7, /* deprecated -- only used in DVM */ 56 IWL_UCODE_TLV_MEM_DESC = 7, /* replaces PAN in non-DVM */ 57 IWL_UCODE_TLV_RUNT_EVTLOG_PTR = 8, 58 IWL_UCODE_TLV_RUNT_EVTLOG_SIZE = 9, 59 IWL_UCODE_TLV_RUNT_ERRLOG_PTR = 10, 60 IWL_UCODE_TLV_INIT_EVTLOG_PTR = 11, 61 IWL_UCODE_TLV_INIT_EVTLOG_SIZE = 12, 62 IWL_UCODE_TLV_INIT_ERRLOG_PTR = 13, 63 IWL_UCODE_TLV_ENHANCE_SENS_TBL = 14, 64 IWL_UCODE_TLV_PHY_CALIBRATION_SIZE = 15, 65 IWL_UCODE_TLV_WOWLAN_INST = 16, 66 IWL_UCODE_TLV_WOWLAN_DATA = 17, 67 IWL_UCODE_TLV_FLAGS = 18, 68 IWL_UCODE_TLV_SEC_RT = 19, 69 IWL_UCODE_TLV_SEC_INIT = 20, 70 IWL_UCODE_TLV_SEC_WOWLAN = 21, 71 IWL_UCODE_TLV_DEF_CALIB = 22, 72 IWL_UCODE_TLV_PHY_SKU = 23, 73 IWL_UCODE_TLV_SECURE_SEC_RT = 24, 74 IWL_UCODE_TLV_SECURE_SEC_INIT = 25, 75 IWL_UCODE_TLV_SECURE_SEC_WOWLAN = 26, 76 IWL_UCODE_TLV_NUM_OF_CPU = 27, 77 IWL_UCODE_TLV_CSCHEME = 28, 78 IWL_UCODE_TLV_API_CHANGES_SET = 29, 79 IWL_UCODE_TLV_ENABLED_CAPABILITIES = 30, 80 IWL_UCODE_TLV_N_SCAN_CHANNELS = 31, 81 IWL_UCODE_TLV_PAGING = 32, 82 IWL_UCODE_TLV_SEC_RT_USNIFFER = 34, 83 /* 35 is unused */ 84 IWL_UCODE_TLV_FW_VERSION = 36, 85 IWL_UCODE_TLV_FW_DBG_DEST = 38, 86 IWL_UCODE_TLV_FW_DBG_CONF = 39, 87 IWL_UCODE_TLV_FW_DBG_TRIGGER = 40, 88 IWL_UCODE_TLV_CMD_VERSIONS = 48, 89 IWL_UCODE_TLV_FW_GSCAN_CAPA = 50, 90 IWL_UCODE_TLV_FW_MEM_SEG = 51, 91 IWL_UCODE_TLV_IML = 52, 92 IWL_UCODE_TLV_UMAC_DEBUG_ADDRS = 54, 93 IWL_UCODE_TLV_LMAC_DEBUG_ADDRS = 55, 94 IWL_UCODE_TLV_FW_RECOVERY_INFO = 57, 95 IWL_UCODE_TLV_HW_TYPE = 58, 96 IWL_UCODE_TLV_FW_FSEQ_VERSION = 60, 97 IWL_UCODE_TLV_PHY_INTEGRATION_VERSION = 61, 98 99 IWL_UCODE_TLV_PNVM_VERSION = 62, 100 IWL_UCODE_TLV_PNVM_SKU = 64, 101 102 IWL_UCODE_TLV_SEC_TABLE_ADDR = 66, 103 IWL_UCODE_TLV_D3_KEK_KCK_ADDR = 67, 104 105 IWL_UCODE_TLV_FW_NUM_STATIONS = IWL_UCODE_TLV_CONST_BASE + 0, 106 107 IWL_UCODE_TLV_TYPE_DEBUG_INFO = IWL_UCODE_TLV_DEBUG_BASE + 0, 108 IWL_UCODE_TLV_TYPE_BUFFER_ALLOCATION = IWL_UCODE_TLV_DEBUG_BASE + 1, 109 IWL_UCODE_TLV_TYPE_HCMD = IWL_UCODE_TLV_DEBUG_BASE + 2, 110 IWL_UCODE_TLV_TYPE_REGIONS = IWL_UCODE_TLV_DEBUG_BASE + 3, 111 IWL_UCODE_TLV_TYPE_TRIGGERS = IWL_UCODE_TLV_DEBUG_BASE + 4, 112 IWL_UCODE_TLV_TYPE_CONF_SET = IWL_UCODE_TLV_DEBUG_BASE + 5, 113 IWL_UCODE_TLV_DEBUG_MAX = IWL_UCODE_TLV_TYPE_TRIGGERS, 114 115 /* TLVs 0x1000-0x2000 are for internal driver usage */ 116 IWL_UCODE_TLV_FW_DBG_DUMP_LST = 0x1000, 117 }; 118 119 struct iwl_ucode_tlv { 120 __le32 type; /* see above */ 121 __le32 length; /* not including type/length fields */ 122 u8 data[0]; 123 }; 124 125 #define IWL_TLV_UCODE_MAGIC 0x0a4c5749 126 #define FW_VER_HUMAN_READABLE_SZ 64 127 128 struct iwl_tlv_ucode_header { 129 /* 130 * The TLV style ucode header is distinguished from 131 * the v1/v2 style header by first four bytes being 132 * zero, as such is an invalid combination of 133 * major/minor/API/serial versions. 134 */ 135 __le32 zero; 136 __le32 magic; 137 u8 human_readable[FW_VER_HUMAN_READABLE_SZ]; 138 /* major/minor/API/serial or major in new format */ 139 __le32 ver; 140 __le32 build; 141 __le64 ignore; 142 /* 143 * The data contained herein has a TLV layout, 144 * see above for the TLV header and types. 145 * Note that each TLV is padded to a length 146 * that is a multiple of 4 for alignment. 147 */ 148 u8 data[0]; 149 }; 150 151 /* 152 * ucode TLVs 153 * 154 * ability to get extension for: flags & capabilities from ucode binaries files 155 */ 156 struct iwl_ucode_api { 157 __le32 api_index; 158 __le32 api_flags; 159 } __packed; 160 161 struct iwl_ucode_capa { 162 __le32 api_index; 163 __le32 api_capa; 164 } __packed; 165 166 /** 167 * enum iwl_ucode_tlv_flag - ucode API flags 168 * @IWL_UCODE_TLV_FLAGS_PAN: This is PAN capable microcode; this previously 169 * was a separate TLV but moved here to save space. 170 * @IWL_UCODE_TLV_FLAGS_NEWSCAN: new uCode scan behavior on hidden SSID, 171 * treats good CRC threshold as a boolean 172 * @IWL_UCODE_TLV_FLAGS_MFP: This uCode image supports MFP (802.11w). 173 * @IWL_UCODE_TLV_FLAGS_UAPSD_SUPPORT: This uCode image supports uAPSD 174 * @IWL_UCODE_TLV_FLAGS_SHORT_BL: 16 entries of block list instead of 64 in scan 175 * offload profile config command. 176 * @IWL_UCODE_TLV_FLAGS_D3_6_IPV6_ADDRS: D3 image supports up to six 177 * (rather than two) IPv6 addresses 178 * @IWL_UCODE_TLV_FLAGS_NO_BASIC_SSID: not sending a probe with the SSID element 179 * from the probe request template. 180 * @IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_SMALL: new NS offload (small version) 181 * @IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_LARGE: new NS offload (large version) 182 * @IWL_UCODE_TLV_FLAGS_UAPSD_SUPPORT: General support for uAPSD 183 * @IWL_UCODE_TLV_FLAGS_P2P_PS_UAPSD: P2P client supports uAPSD power save 184 * @IWL_UCODE_TLV_FLAGS_EBS_SUPPORT: this uCode image supports EBS. 185 */ 186 enum iwl_ucode_tlv_flag { 187 IWL_UCODE_TLV_FLAGS_PAN = BIT(0), 188 IWL_UCODE_TLV_FLAGS_NEWSCAN = BIT(1), 189 IWL_UCODE_TLV_FLAGS_MFP = BIT(2), 190 IWL_UCODE_TLV_FLAGS_SHORT_BL = BIT(7), 191 IWL_UCODE_TLV_FLAGS_D3_6_IPV6_ADDRS = BIT(10), 192 IWL_UCODE_TLV_FLAGS_NO_BASIC_SSID = BIT(12), 193 IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_SMALL = BIT(15), 194 IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_LARGE = BIT(16), 195 IWL_UCODE_TLV_FLAGS_UAPSD_SUPPORT = BIT(24), 196 IWL_UCODE_TLV_FLAGS_EBS_SUPPORT = BIT(25), 197 IWL_UCODE_TLV_FLAGS_P2P_PS_UAPSD = BIT(26), 198 }; 199 200 typedef unsigned int __bitwise iwl_ucode_tlv_api_t; 201 202 /** 203 * enum iwl_ucode_tlv_api - ucode api 204 * @IWL_UCODE_TLV_API_FRAGMENTED_SCAN: This ucode supports active dwell time 205 * longer than the passive one, which is essential for fragmented scan. 206 * @IWL_UCODE_TLV_API_WIFI_MCC_UPDATE: ucode supports MCC updates with source. 207 * @IWL_UCODE_TLV_API_LQ_SS_PARAMS: Configure STBC/BFER via LQ CMD ss_params 208 * @IWL_UCODE_TLV_API_NEW_VERSION: new versioning format 209 * @IWL_UCODE_TLV_API_SCAN_TSF_REPORT: Scan start time reported in scan 210 * iteration complete notification, and the timestamp reported for RX 211 * received during scan, are reported in TSF of the mac specified in the 212 * scan request. 213 * @IWL_UCODE_TLV_API_TKIP_MIC_KEYS: This ucode supports version 2 of 214 * ADD_MODIFY_STA_KEY_API_S_VER_2. 215 * @IWL_UCODE_TLV_API_STA_TYPE: This ucode supports station type assignement. 216 * @IWL_UCODE_TLV_API_NAN2_VER2: This ucode supports NAN API version 2 217 * @IWL_UCODE_TLV_API_NEW_RX_STATS: should new RX STATISTICS API be used 218 * @IWL_UCODE_TLV_API_QUOTA_LOW_LATENCY: Quota command includes a field 219 * indicating low latency direction. 220 * @IWL_UCODE_TLV_API_DEPRECATE_TTAK: RX status flag TTAK ok (bit 7) is 221 * deprecated. 222 * @IWL_UCODE_TLV_API_ADAPTIVE_DWELL_V2: This ucode supports version 8 223 * of scan request: SCAN_REQUEST_CMD_UMAC_API_S_VER_8 224 * @IWL_UCODE_TLV_API_FRAG_EBS: This ucode supports fragmented EBS 225 * @IWL_UCODE_TLV_API_REDUCE_TX_POWER: This ucode supports v5 of 226 * the REDUCE_TX_POWER_CMD. 227 * @IWL_UCODE_TLV_API_SHORT_BEACON_NOTIF: This ucode supports the short 228 * version of the beacon notification. 229 * @IWL_UCODE_TLV_API_BEACON_FILTER_V4: This ucode supports v4 of 230 * BEACON_FILTER_CONFIG_API_S_VER_4. 231 * @IWL_UCODE_TLV_API_REGULATORY_NVM_INFO: This ucode supports v4 of 232 * REGULATORY_NVM_GET_INFO_RSP_API_S. 233 * @IWL_UCODE_TLV_API_FTM_NEW_RANGE_REQ: This ucode supports v7 of 234 * LOCATION_RANGE_REQ_CMD_API_S and v6 of LOCATION_RANGE_RESP_NTFY_API_S. 235 * @IWL_UCODE_TLV_API_SCAN_OFFLOAD_CHANS: This ucode supports v2 of 236 * SCAN_OFFLOAD_PROFILE_MATCH_RESULTS_S and v3 of 237 * SCAN_OFFLOAD_PROFILES_QUERY_RSP_S. 238 * @IWL_UCODE_TLV_API_MBSSID_HE: This ucode supports v2 of 239 * STA_CONTEXT_DOT11AX_API_S 240 * @IWL_UCODE_TLV_API_SAR_TABLE_VER: This ucode supports different sar 241 * version tables. 242 * @IWL_UCODE_TLV_API_REDUCED_SCAN_CONFIG: This ucode supports v3 of 243 * SCAN_CONFIG_DB_CMD_API_S. 244 * 245 * @NUM_IWL_UCODE_TLV_API: number of bits used 246 */ 247 enum iwl_ucode_tlv_api { 248 /* API Set 0 */ 249 IWL_UCODE_TLV_API_FRAGMENTED_SCAN = (__force iwl_ucode_tlv_api_t)8, 250 IWL_UCODE_TLV_API_WIFI_MCC_UPDATE = (__force iwl_ucode_tlv_api_t)9, 251 IWL_UCODE_TLV_API_LQ_SS_PARAMS = (__force iwl_ucode_tlv_api_t)18, 252 IWL_UCODE_TLV_API_NEW_VERSION = (__force iwl_ucode_tlv_api_t)20, 253 IWL_UCODE_TLV_API_SCAN_TSF_REPORT = (__force iwl_ucode_tlv_api_t)28, 254 IWL_UCODE_TLV_API_TKIP_MIC_KEYS = (__force iwl_ucode_tlv_api_t)29, 255 IWL_UCODE_TLV_API_STA_TYPE = (__force iwl_ucode_tlv_api_t)30, 256 IWL_UCODE_TLV_API_NAN2_VER2 = (__force iwl_ucode_tlv_api_t)31, 257 /* API Set 1 */ 258 IWL_UCODE_TLV_API_ADAPTIVE_DWELL = (__force iwl_ucode_tlv_api_t)32, 259 IWL_UCODE_TLV_API_OCE = (__force iwl_ucode_tlv_api_t)33, 260 IWL_UCODE_TLV_API_NEW_BEACON_TEMPLATE = (__force iwl_ucode_tlv_api_t)34, 261 IWL_UCODE_TLV_API_NEW_RX_STATS = (__force iwl_ucode_tlv_api_t)35, 262 IWL_UCODE_TLV_API_WOWLAN_KEY_MATERIAL = (__force iwl_ucode_tlv_api_t)36, 263 IWL_UCODE_TLV_API_QUOTA_LOW_LATENCY = (__force iwl_ucode_tlv_api_t)38, 264 IWL_UCODE_TLV_API_DEPRECATE_TTAK = (__force iwl_ucode_tlv_api_t)41, 265 IWL_UCODE_TLV_API_ADAPTIVE_DWELL_V2 = (__force iwl_ucode_tlv_api_t)42, 266 IWL_UCODE_TLV_API_FRAG_EBS = (__force iwl_ucode_tlv_api_t)44, 267 IWL_UCODE_TLV_API_REDUCE_TX_POWER = (__force iwl_ucode_tlv_api_t)45, 268 IWL_UCODE_TLV_API_SHORT_BEACON_NOTIF = (__force iwl_ucode_tlv_api_t)46, 269 IWL_UCODE_TLV_API_BEACON_FILTER_V4 = (__force iwl_ucode_tlv_api_t)47, 270 IWL_UCODE_TLV_API_REGULATORY_NVM_INFO = (__force iwl_ucode_tlv_api_t)48, 271 IWL_UCODE_TLV_API_FTM_NEW_RANGE_REQ = (__force iwl_ucode_tlv_api_t)49, 272 IWL_UCODE_TLV_API_SCAN_OFFLOAD_CHANS = (__force iwl_ucode_tlv_api_t)50, 273 IWL_UCODE_TLV_API_MBSSID_HE = (__force iwl_ucode_tlv_api_t)52, 274 IWL_UCODE_TLV_API_WOWLAN_TCP_SYN_WAKE = (__force iwl_ucode_tlv_api_t)53, 275 IWL_UCODE_TLV_API_FTM_RTT_ACCURACY = (__force iwl_ucode_tlv_api_t)54, 276 IWL_UCODE_TLV_API_SAR_TABLE_VER = (__force iwl_ucode_tlv_api_t)55, 277 IWL_UCODE_TLV_API_REDUCED_SCAN_CONFIG = (__force iwl_ucode_tlv_api_t)56, 278 IWL_UCODE_TLV_API_ADWELL_HB_DEF_N_AP = (__force iwl_ucode_tlv_api_t)57, 279 IWL_UCODE_TLV_API_SCAN_EXT_CHAN_VER = (__force iwl_ucode_tlv_api_t)58, 280 IWL_UCODE_TLV_API_BAND_IN_RX_DATA = (__force iwl_ucode_tlv_api_t)59, 281 282 283 #ifdef __CHECKER__ 284 /* sparse says it cannot increment the previous enum member */ 285 #define NUM_IWL_UCODE_TLV_API 128 286 #else 287 NUM_IWL_UCODE_TLV_API 288 #endif 289 }; 290 291 typedef unsigned int __bitwise iwl_ucode_tlv_capa_t; 292 293 /** 294 * enum iwl_ucode_tlv_capa - ucode capabilities 295 * @IWL_UCODE_TLV_CAPA_D0I3_SUPPORT: supports D0i3 296 * @IWL_UCODE_TLV_CAPA_LAR_SUPPORT: supports Location Aware Regulatory 297 * @IWL_UCODE_TLV_CAPA_UMAC_SCAN: supports UMAC scan. 298 * @IWL_UCODE_TLV_CAPA_BEAMFORMER: supports Beamformer 299 * @IWL_UCODE_TLV_CAPA_TDLS_SUPPORT: support basic TDLS functionality 300 * @IWL_UCODE_TLV_CAPA_TXPOWER_INSERTION_SUPPORT: supports insertion of current 301 * tx power value into TPC Report action frame and Link Measurement Report 302 * action frame 303 * @IWL_UCODE_TLV_CAPA_DS_PARAM_SET_IE_SUPPORT: supports updating current 304 * channel in DS parameter set element in probe requests. 305 * @IWL_UCODE_TLV_CAPA_WFA_TPC_REP_IE_SUPPORT: supports adding TPC Report IE in 306 * probe requests. 307 * @IWL_UCODE_TLV_CAPA_QUIET_PERIOD_SUPPORT: supports Quiet Period requests 308 * @IWL_UCODE_TLV_CAPA_DQA_SUPPORT: supports dynamic queue allocation (DQA), 309 * which also implies support for the scheduler configuration command 310 * @IWL_UCODE_TLV_CAPA_TDLS_CHANNEL_SWITCH: supports TDLS channel switching 311 * @IWL_UCODE_TLV_CAPA_CNSLDTD_D3_D0_IMG: Consolidated D3-D0 image 312 * @IWL_UCODE_TLV_CAPA_HOTSPOT_SUPPORT: supports Hot Spot Command 313 * @IWL_UCODE_TLV_CAPA_DC2DC_SUPPORT: supports DC2DC Command 314 * @IWL_UCODE_TLV_CAPA_CSUM_SUPPORT: supports TCP Checksum Offload 315 * @IWL_UCODE_TLV_CAPA_RADIO_BEACON_STATS: support radio and beacon statistics 316 * @IWL_UCODE_TLV_CAPA_P2P_SCM_UAPSD: supports U-APSD on p2p interface when it 317 * is standalone or with a BSS station interface in the same binding. 318 * @IWL_UCODE_TLV_CAPA_BT_COEX_PLCR: enabled BT Coex packet level co-running 319 * @IWL_UCODE_TLV_CAPA_LAR_MULTI_MCC: ucode supports LAR updates with different 320 * sources for the MCC. This TLV bit is a future replacement to 321 * IWL_UCODE_TLV_API_WIFI_MCC_UPDATE. When either is set, multi-source LAR 322 * is supported. 323 * @IWL_UCODE_TLV_CAPA_BT_COEX_RRC: supports BT Coex RRC 324 * @IWL_UCODE_TLV_CAPA_GSCAN_SUPPORT: supports gscan (no longer used) 325 * @IWL_UCODE_TLV_CAPA_SOC_LATENCY_SUPPORT: the firmware supports setting 326 * stabilization latency for SoCs. 327 * @IWL_UCODE_TLV_CAPA_STA_PM_NOTIF: firmware will send STA PM notification 328 * @IWL_UCODE_TLV_CAPA_TLC_OFFLOAD: firmware implements rate scaling algorithm 329 * @IWL_UCODE_TLV_CAPA_DYNAMIC_QUOTA: firmware implements quota related 330 * @IWL_UCODE_TLV_CAPA_COEX_SCHEMA_2: firmware implements Coex Schema 2 331 * IWL_UCODE_TLV_CAPA_CHANNEL_SWITCH_CMD: firmware supports CSA command 332 * @IWL_UCODE_TLV_CAPA_ULTRA_HB_CHANNELS: firmware supports ultra high band 333 * (6 GHz). 334 * @IWL_UCODE_TLV_CAPA_CS_MODIFY: firmware supports modify action CSA command 335 * @IWL_UCODE_TLV_CAPA_EXTENDED_DTS_MEASURE: extended DTS measurement 336 * @IWL_UCODE_TLV_CAPA_SHORT_PM_TIMEOUTS: supports short PM timeouts 337 * @IWL_UCODE_TLV_CAPA_BT_MPLUT_SUPPORT: supports bt-coex Multi-priority LUT 338 * @IWL_UCODE_TLV_CAPA_CSA_AND_TBTT_OFFLOAD: the firmware supports CSA 339 * countdown offloading. Beacon notifications are not sent to the host. 340 * The fw also offloads TBTT alignment. 341 * @IWL_UCODE_TLV_CAPA_BEACON_ANT_SELECTION: firmware will decide on what 342 * antenna the beacon should be transmitted 343 * @IWL_UCODE_TLV_CAPA_BEACON_STORING: firmware will store the latest beacon 344 * from AP and will send it upon d0i3 exit. 345 * @IWL_UCODE_TLV_CAPA_LAR_SUPPORT_V3: support LAR API V3 346 * @IWL_UCODE_TLV_CAPA_CT_KILL_BY_FW: firmware responsible for CT-kill 347 * @IWL_UCODE_TLV_CAPA_TEMP_THS_REPORT_SUPPORT: supports temperature 348 * thresholds reporting 349 * @IWL_UCODE_TLV_CAPA_CTDP_SUPPORT: supports cTDP command 350 * @IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED: supports usniffer enabled in 351 * regular image. 352 * @IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG: support getting more shared 353 * memory addresses from the firmware. 354 * @IWL_UCODE_TLV_CAPA_LQM_SUPPORT: supports Link Quality Measurement 355 * @IWL_UCODE_TLV_CAPA_TX_POWER_ACK: reduced TX power API has larger 356 * command size (command version 4) that supports toggling ACK TX 357 * power reduction. 358 * @IWL_UCODE_TLV_CAPA_D3_DEBUG: supports debug recording during D3 359 * @IWL_UCODE_TLV_CAPA_MCC_UPDATE_11AX_SUPPORT: MCC response support 11ax 360 * capability. 361 * @IWL_UCODE_TLV_CAPA_CSI_REPORTING: firmware is capable of being configured 362 * to report the CSI information with (certain) RX frames 363 * @IWL_UCODE_TLV_CAPA_FTM_CALIBRATED: has FTM calibrated and thus supports both 364 * initiator and responder 365 * @IWL_UCODE_TLV_CAPA_MLME_OFFLOAD: supports MLME offload 366 * @IWL_UCODE_TLV_CAPA_PROTECTED_TWT: Supports protection of TWT action frames 367 * @IWL_UCODE_TLV_CAPA_FW_RESET_HANDSHAKE: Supports the firmware handshake in 368 * reset flow 369 * @IWL_UCODE_TLV_CAPA_PASSIVE_6GHZ_SCAN: Support for passive scan on 6GHz PSC 370 * channels even when these are not enabled. 371 * 372 * @NUM_IWL_UCODE_TLV_CAPA: number of bits used 373 */ 374 enum iwl_ucode_tlv_capa { 375 /* set 0 */ 376 IWL_UCODE_TLV_CAPA_D0I3_SUPPORT = (__force iwl_ucode_tlv_capa_t)0, 377 IWL_UCODE_TLV_CAPA_LAR_SUPPORT = (__force iwl_ucode_tlv_capa_t)1, 378 IWL_UCODE_TLV_CAPA_UMAC_SCAN = (__force iwl_ucode_tlv_capa_t)2, 379 IWL_UCODE_TLV_CAPA_BEAMFORMER = (__force iwl_ucode_tlv_capa_t)3, 380 IWL_UCODE_TLV_CAPA_TDLS_SUPPORT = (__force iwl_ucode_tlv_capa_t)6, 381 IWL_UCODE_TLV_CAPA_TXPOWER_INSERTION_SUPPORT = (__force iwl_ucode_tlv_capa_t)8, 382 IWL_UCODE_TLV_CAPA_DS_PARAM_SET_IE_SUPPORT = (__force iwl_ucode_tlv_capa_t)9, 383 IWL_UCODE_TLV_CAPA_WFA_TPC_REP_IE_SUPPORT = (__force iwl_ucode_tlv_capa_t)10, 384 IWL_UCODE_TLV_CAPA_QUIET_PERIOD_SUPPORT = (__force iwl_ucode_tlv_capa_t)11, 385 IWL_UCODE_TLV_CAPA_DQA_SUPPORT = (__force iwl_ucode_tlv_capa_t)12, 386 IWL_UCODE_TLV_CAPA_TDLS_CHANNEL_SWITCH = (__force iwl_ucode_tlv_capa_t)13, 387 IWL_UCODE_TLV_CAPA_CNSLDTD_D3_D0_IMG = (__force iwl_ucode_tlv_capa_t)17, 388 IWL_UCODE_TLV_CAPA_HOTSPOT_SUPPORT = (__force iwl_ucode_tlv_capa_t)18, 389 IWL_UCODE_TLV_CAPA_DC2DC_CONFIG_SUPPORT = (__force iwl_ucode_tlv_capa_t)19, 390 IWL_UCODE_TLV_CAPA_CSUM_SUPPORT = (__force iwl_ucode_tlv_capa_t)21, 391 IWL_UCODE_TLV_CAPA_RADIO_BEACON_STATS = (__force iwl_ucode_tlv_capa_t)22, 392 IWL_UCODE_TLV_CAPA_P2P_SCM_UAPSD = (__force iwl_ucode_tlv_capa_t)26, 393 IWL_UCODE_TLV_CAPA_BT_COEX_PLCR = (__force iwl_ucode_tlv_capa_t)28, 394 IWL_UCODE_TLV_CAPA_LAR_MULTI_MCC = (__force iwl_ucode_tlv_capa_t)29, 395 IWL_UCODE_TLV_CAPA_BT_COEX_RRC = (__force iwl_ucode_tlv_capa_t)30, 396 IWL_UCODE_TLV_CAPA_GSCAN_SUPPORT = (__force iwl_ucode_tlv_capa_t)31, 397 398 /* set 1 */ 399 IWL_UCODE_TLV_CAPA_SOC_LATENCY_SUPPORT = (__force iwl_ucode_tlv_capa_t)37, 400 IWL_UCODE_TLV_CAPA_STA_PM_NOTIF = (__force iwl_ucode_tlv_capa_t)38, 401 IWL_UCODE_TLV_CAPA_BINDING_CDB_SUPPORT = (__force iwl_ucode_tlv_capa_t)39, 402 IWL_UCODE_TLV_CAPA_CDB_SUPPORT = (__force iwl_ucode_tlv_capa_t)40, 403 IWL_UCODE_TLV_CAPA_D0I3_END_FIRST = (__force iwl_ucode_tlv_capa_t)41, 404 IWL_UCODE_TLV_CAPA_TLC_OFFLOAD = (__force iwl_ucode_tlv_capa_t)43, 405 IWL_UCODE_TLV_CAPA_DYNAMIC_QUOTA = (__force iwl_ucode_tlv_capa_t)44, 406 IWL_UCODE_TLV_CAPA_COEX_SCHEMA_2 = (__force iwl_ucode_tlv_capa_t)45, 407 IWL_UCODE_TLV_CAPA_CHANNEL_SWITCH_CMD = (__force iwl_ucode_tlv_capa_t)46, 408 IWL_UCODE_TLV_CAPA_FTM_CALIBRATED = (__force iwl_ucode_tlv_capa_t)47, 409 IWL_UCODE_TLV_CAPA_ULTRA_HB_CHANNELS = (__force iwl_ucode_tlv_capa_t)48, 410 IWL_UCODE_TLV_CAPA_CS_MODIFY = (__force iwl_ucode_tlv_capa_t)49, 411 IWL_UCODE_TLV_CAPA_SET_LTR_GEN2 = (__force iwl_ucode_tlv_capa_t)50, 412 IWL_UCODE_TLV_CAPA_SET_PPAG = (__force iwl_ucode_tlv_capa_t)52, 413 IWL_UCODE_TLV_CAPA_TAS_CFG = (__force iwl_ucode_tlv_capa_t)53, 414 IWL_UCODE_TLV_CAPA_SESSION_PROT_CMD = (__force iwl_ucode_tlv_capa_t)54, 415 IWL_UCODE_TLV_CAPA_PROTECTED_TWT = (__force iwl_ucode_tlv_capa_t)56, 416 IWL_UCODE_TLV_CAPA_FW_RESET_HANDSHAKE = (__force iwl_ucode_tlv_capa_t)57, 417 IWL_UCODE_TLV_CAPA_PASSIVE_6GHZ_SCAN = (__force iwl_ucode_tlv_capa_t)58, 418 IWL_UCODE_TLV_CAPA_HIDDEN_6GHZ_SCAN = (__force iwl_ucode_tlv_capa_t)59, 419 IWL_UCODE_TLV_CAPA_BROADCAST_TWT = (__force iwl_ucode_tlv_capa_t)60, 420 IWL_UCODE_TLV_CAPA_COEX_HIGH_PRIO = (__force iwl_ucode_tlv_capa_t)61, 421 IWL_UCODE_TLV_CAPA_RFIM_SUPPORT = (__force iwl_ucode_tlv_capa_t)62, 422 423 /* set 2 */ 424 IWL_UCODE_TLV_CAPA_EXTENDED_DTS_MEASURE = (__force iwl_ucode_tlv_capa_t)64, 425 IWL_UCODE_TLV_CAPA_SHORT_PM_TIMEOUTS = (__force iwl_ucode_tlv_capa_t)65, 426 IWL_UCODE_TLV_CAPA_BT_MPLUT_SUPPORT = (__force iwl_ucode_tlv_capa_t)67, 427 IWL_UCODE_TLV_CAPA_MULTI_QUEUE_RX_SUPPORT = (__force iwl_ucode_tlv_capa_t)68, 428 IWL_UCODE_TLV_CAPA_CSA_AND_TBTT_OFFLOAD = (__force iwl_ucode_tlv_capa_t)70, 429 IWL_UCODE_TLV_CAPA_BEACON_ANT_SELECTION = (__force iwl_ucode_tlv_capa_t)71, 430 IWL_UCODE_TLV_CAPA_BEACON_STORING = (__force iwl_ucode_tlv_capa_t)72, 431 IWL_UCODE_TLV_CAPA_LAR_SUPPORT_V3 = (__force iwl_ucode_tlv_capa_t)73, 432 IWL_UCODE_TLV_CAPA_CT_KILL_BY_FW = (__force iwl_ucode_tlv_capa_t)74, 433 IWL_UCODE_TLV_CAPA_TEMP_THS_REPORT_SUPPORT = (__force iwl_ucode_tlv_capa_t)75, 434 IWL_UCODE_TLV_CAPA_CTDP_SUPPORT = (__force iwl_ucode_tlv_capa_t)76, 435 IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED = (__force iwl_ucode_tlv_capa_t)77, 436 IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG = (__force iwl_ucode_tlv_capa_t)80, 437 IWL_UCODE_TLV_CAPA_LQM_SUPPORT = (__force iwl_ucode_tlv_capa_t)81, 438 IWL_UCODE_TLV_CAPA_TX_POWER_ACK = (__force iwl_ucode_tlv_capa_t)84, 439 IWL_UCODE_TLV_CAPA_D3_DEBUG = (__force iwl_ucode_tlv_capa_t)87, 440 IWL_UCODE_TLV_CAPA_LED_CMD_SUPPORT = (__force iwl_ucode_tlv_capa_t)88, 441 IWL_UCODE_TLV_CAPA_MCC_UPDATE_11AX_SUPPORT = (__force iwl_ucode_tlv_capa_t)89, 442 IWL_UCODE_TLV_CAPA_CSI_REPORTING = (__force iwl_ucode_tlv_capa_t)90, 443 IWL_UCODE_TLV_CAPA_DBG_SUSPEND_RESUME_CMD_SUPP = (__force iwl_ucode_tlv_capa_t)92, 444 IWL_UCODE_TLV_CAPA_DBG_BUF_ALLOC_CMD_SUPP = (__force iwl_ucode_tlv_capa_t)93, 445 446 /* set 3 */ 447 IWL_UCODE_TLV_CAPA_MLME_OFFLOAD = (__force iwl_ucode_tlv_capa_t)96, 448 449 /* 450 * @IWL_UCODE_TLV_CAPA_PSC_CHAN_SUPPORT: supports PSC channels 451 */ 452 IWL_UCODE_TLV_CAPA_PSC_CHAN_SUPPORT = (__force iwl_ucode_tlv_capa_t)98, 453 454 IWL_UCODE_TLV_CAPA_BIGTK_SUPPORT = (__force iwl_ucode_tlv_capa_t)100, 455 IWL_UCODE_TLV_CAPA_DRAM_FRAG_SUPPORT = (__force iwl_ucode_tlv_capa_t)104, 456 457 #ifdef __CHECKER__ 458 /* sparse says it cannot increment the previous enum member */ 459 #define NUM_IWL_UCODE_TLV_CAPA 128 460 #else 461 NUM_IWL_UCODE_TLV_CAPA 462 #endif 463 }; 464 465 /* The default calibrate table size if not specified by firmware file */ 466 #define IWL_DEFAULT_STANDARD_PHY_CALIBRATE_TBL_SIZE 18 467 #define IWL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE 19 468 #define IWL_MAX_PHY_CALIBRATE_TBL_SIZE 253 469 470 /* The default max probe length if not specified by the firmware file */ 471 #define IWL_DEFAULT_MAX_PROBE_LENGTH 200 472 473 /* 474 * For 16.0 uCode and above, there is no differentiation between sections, 475 * just an offset to the HW address. 476 */ 477 #define CPU1_CPU2_SEPARATOR_SECTION 0xFFFFCCCC 478 #define PAGING_SEPARATOR_SECTION 0xAAAABBBB 479 480 /* uCode version contains 4 values: Major/Minor/API/Serial */ 481 #define IWL_UCODE_MAJOR(ver) (((ver) & 0xFF000000) >> 24) 482 #define IWL_UCODE_MINOR(ver) (((ver) & 0x00FF0000) >> 16) 483 #define IWL_UCODE_API(ver) (((ver) & 0x0000FF00) >> 8) 484 #define IWL_UCODE_SERIAL(ver) ((ver) & 0x000000FF) 485 486 /** 487 * struct iwl_tlv_calib_ctrl - Calibration control struct. 488 * Sent as part of the phy configuration command. 489 * @flow_trigger: bitmap for which calibrations to perform according to 490 * flow triggers. 491 * @event_trigger: bitmap for which calibrations to perform according to 492 * event triggers. 493 */ 494 struct iwl_tlv_calib_ctrl { 495 __le32 flow_trigger; 496 __le32 event_trigger; 497 } __packed; 498 499 enum iwl_fw_phy_cfg { 500 FW_PHY_CFG_RADIO_TYPE_POS = 0, 501 FW_PHY_CFG_RADIO_TYPE = 0x3 << FW_PHY_CFG_RADIO_TYPE_POS, 502 FW_PHY_CFG_RADIO_STEP_POS = 2, 503 FW_PHY_CFG_RADIO_STEP = 0x3 << FW_PHY_CFG_RADIO_STEP_POS, 504 FW_PHY_CFG_RADIO_DASH_POS = 4, 505 FW_PHY_CFG_RADIO_DASH = 0x3 << FW_PHY_CFG_RADIO_DASH_POS, 506 FW_PHY_CFG_TX_CHAIN_POS = 16, 507 FW_PHY_CFG_TX_CHAIN = 0xf << FW_PHY_CFG_TX_CHAIN_POS, 508 FW_PHY_CFG_RX_CHAIN_POS = 20, 509 FW_PHY_CFG_RX_CHAIN = 0xf << FW_PHY_CFG_RX_CHAIN_POS, 510 FW_PHY_CFG_CHAIN_SAD_POS = 23, 511 FW_PHY_CFG_CHAIN_SAD_ENABLED = 0x1 << FW_PHY_CFG_CHAIN_SAD_POS, 512 FW_PHY_CFG_CHAIN_SAD_ANT_A = 0x2 << FW_PHY_CFG_CHAIN_SAD_POS, 513 FW_PHY_CFG_CHAIN_SAD_ANT_B = 0x4 << FW_PHY_CFG_CHAIN_SAD_POS, 514 FW_PHY_CFG_SHARED_CLK = BIT(31), 515 }; 516 517 #define IWL_UCODE_MAX_CS 1 518 519 /** 520 * struct iwl_fw_cipher_scheme - a cipher scheme supported by FW. 521 * @cipher: a cipher suite selector 522 * @flags: cipher scheme flags (currently reserved for a future use) 523 * @hdr_len: a size of MPDU security header 524 * @pn_len: a size of PN 525 * @pn_off: an offset of pn from the beginning of the security header 526 * @key_idx_off: an offset of key index byte in the security header 527 * @key_idx_mask: a bit mask of key_idx bits 528 * @key_idx_shift: bit shift needed to get key_idx 529 * @mic_len: mic length in bytes 530 * @hw_cipher: a HW cipher index used in host commands 531 */ 532 struct iwl_fw_cipher_scheme { 533 __le32 cipher; 534 u8 flags; 535 u8 hdr_len; 536 u8 pn_len; 537 u8 pn_off; 538 u8 key_idx_off; 539 u8 key_idx_mask; 540 u8 key_idx_shift; 541 u8 mic_len; 542 u8 hw_cipher; 543 } __packed; 544 545 enum iwl_fw_dbg_reg_operator { 546 CSR_ASSIGN, 547 CSR_SETBIT, 548 CSR_CLEARBIT, 549 550 PRPH_ASSIGN, 551 PRPH_SETBIT, 552 PRPH_CLEARBIT, 553 554 INDIRECT_ASSIGN, 555 INDIRECT_SETBIT, 556 INDIRECT_CLEARBIT, 557 558 PRPH_BLOCKBIT, 559 }; 560 561 /** 562 * struct iwl_fw_dbg_reg_op - an operation on a register 563 * 564 * @op: &enum iwl_fw_dbg_reg_operator 565 * @addr: offset of the register 566 * @val: value 567 */ 568 struct iwl_fw_dbg_reg_op { 569 u8 op; 570 u8 reserved[3]; 571 __le32 addr; 572 __le32 val; 573 } __packed; 574 575 /** 576 * enum iwl_fw_dbg_monitor_mode - available monitor recording modes 577 * 578 * @SMEM_MODE: monitor stores the data in SMEM 579 * @EXTERNAL_MODE: monitor stores the data in allocated DRAM 580 * @MARBH_MODE: monitor stores the data in MARBH buffer 581 * @MIPI_MODE: monitor outputs the data through the MIPI interface 582 */ 583 enum iwl_fw_dbg_monitor_mode { 584 SMEM_MODE = 0, 585 EXTERNAL_MODE = 1, 586 MARBH_MODE = 2, 587 MIPI_MODE = 3, 588 }; 589 590 /** 591 * struct iwl_fw_dbg_mem_seg_tlv - configures the debug data memory segments 592 * 593 * @data_type: the memory segment type to record 594 * @ofs: the memory segment offset 595 * @len: the memory segment length, in bytes 596 * 597 * This parses IWL_UCODE_TLV_FW_MEM_SEG 598 */ 599 struct iwl_fw_dbg_mem_seg_tlv { 600 __le32 data_type; 601 __le32 ofs; 602 __le32 len; 603 } __packed; 604 605 /** 606 * struct iwl_fw_dbg_dest_tlv_v1 - configures the destination of the debug data 607 * 608 * @version: version of the TLV - currently 0 609 * @monitor_mode: &enum iwl_fw_dbg_monitor_mode 610 * @size_power: buffer size will be 2^(size_power + 11) 611 * @base_reg: addr of the base addr register (PRPH) 612 * @end_reg: addr of the end addr register (PRPH) 613 * @write_ptr_reg: the addr of the reg of the write pointer 614 * @wrap_count: the addr of the reg of the wrap_count 615 * @base_shift: shift right of the base addr reg 616 * @end_shift: shift right of the end addr reg 617 * @reg_ops: array of registers operations 618 * 619 * This parses IWL_UCODE_TLV_FW_DBG_DEST 620 */ 621 struct iwl_fw_dbg_dest_tlv_v1 { 622 u8 version; 623 u8 monitor_mode; 624 u8 size_power; 625 u8 reserved; 626 __le32 base_reg; 627 __le32 end_reg; 628 __le32 write_ptr_reg; 629 __le32 wrap_count; 630 u8 base_shift; 631 u8 end_shift; 632 struct iwl_fw_dbg_reg_op reg_ops[0]; 633 } __packed; 634 635 /* Mask of the register for defining the LDBG MAC2SMEM buffer SMEM size */ 636 #define IWL_LDBG_M2S_BUF_SIZE_MSK 0x0fff0000 637 /* Mask of the register for defining the LDBG MAC2SMEM SMEM base address */ 638 #define IWL_LDBG_M2S_BUF_BA_MSK 0x00000fff 639 /* The smem buffer chunks are in units of 256 bits */ 640 #define IWL_M2S_UNIT_SIZE 0x100 641 642 struct iwl_fw_dbg_dest_tlv { 643 u8 version; 644 u8 monitor_mode; 645 u8 size_power; 646 u8 reserved; 647 __le32 cfg_reg; 648 __le32 write_ptr_reg; 649 __le32 wrap_count; 650 u8 base_shift; 651 u8 size_shift; 652 struct iwl_fw_dbg_reg_op reg_ops[0]; 653 } __packed; 654 655 struct iwl_fw_dbg_conf_hcmd { 656 u8 id; 657 u8 reserved; 658 __le16 len; 659 u8 data[0]; 660 } __packed; 661 662 /** 663 * enum iwl_fw_dbg_trigger_mode - triggers functionalities 664 * 665 * @IWL_FW_DBG_TRIGGER_START: when trigger occurs re-conf the dbg mechanism 666 * @IWL_FW_DBG_TRIGGER_STOP: when trigger occurs pull the dbg data 667 * @IWL_FW_DBG_TRIGGER_MONITOR_ONLY: when trigger occurs trigger is set to 668 * collect only monitor data 669 */ 670 enum iwl_fw_dbg_trigger_mode { 671 IWL_FW_DBG_TRIGGER_START = BIT(0), 672 IWL_FW_DBG_TRIGGER_STOP = BIT(1), 673 IWL_FW_DBG_TRIGGER_MONITOR_ONLY = BIT(2), 674 }; 675 676 /** 677 * enum iwl_fw_dbg_trigger_flags - the flags supported by wrt triggers 678 * @IWL_FW_DBG_FORCE_RESTART: force a firmware restart 679 */ 680 enum iwl_fw_dbg_trigger_flags { 681 IWL_FW_DBG_FORCE_RESTART = BIT(0), 682 }; 683 684 /** 685 * enum iwl_fw_dbg_trigger_vif_type - define the VIF type for a trigger 686 * @IWL_FW_DBG_CONF_VIF_ANY: any vif type 687 * @IWL_FW_DBG_CONF_VIF_IBSS: IBSS mode 688 * @IWL_FW_DBG_CONF_VIF_STATION: BSS mode 689 * @IWL_FW_DBG_CONF_VIF_AP: AP mode 690 * @IWL_FW_DBG_CONF_VIF_P2P_CLIENT: P2P Client mode 691 * @IWL_FW_DBG_CONF_VIF_P2P_GO: P2P GO mode 692 * @IWL_FW_DBG_CONF_VIF_P2P_DEVICE: P2P device 693 */ 694 enum iwl_fw_dbg_trigger_vif_type { 695 IWL_FW_DBG_CONF_VIF_ANY = NL80211_IFTYPE_UNSPECIFIED, 696 IWL_FW_DBG_CONF_VIF_IBSS = NL80211_IFTYPE_ADHOC, 697 IWL_FW_DBG_CONF_VIF_STATION = NL80211_IFTYPE_STATION, 698 IWL_FW_DBG_CONF_VIF_AP = NL80211_IFTYPE_AP, 699 IWL_FW_DBG_CONF_VIF_P2P_CLIENT = NL80211_IFTYPE_P2P_CLIENT, 700 IWL_FW_DBG_CONF_VIF_P2P_GO = NL80211_IFTYPE_P2P_GO, 701 IWL_FW_DBG_CONF_VIF_P2P_DEVICE = NL80211_IFTYPE_P2P_DEVICE, 702 }; 703 704 /** 705 * struct iwl_fw_dbg_trigger_tlv - a TLV that describes the trigger 706 * @id: &enum iwl_fw_dbg_trigger 707 * @vif_type: &enum iwl_fw_dbg_trigger_vif_type 708 * @stop_conf_ids: bitmap of configurations this trigger relates to. 709 * if the mode is %IWL_FW_DBG_TRIGGER_STOP, then if the bit corresponding 710 * to the currently running configuration is set, the data should be 711 * collected. 712 * @stop_delay: how many milliseconds to wait before collecting the data 713 * after the STOP trigger fires. 714 * @mode: &enum iwl_fw_dbg_trigger_mode - can be stop / start of both 715 * @start_conf_id: if mode is %IWL_FW_DBG_TRIGGER_START, this defines what 716 * configuration should be applied when the triggers kicks in. 717 * @occurrences: number of occurrences. 0 means the trigger will never fire. 718 * @trig_dis_ms: the time, in milliseconds, after an occurrence of this 719 * trigger in which another occurrence should be ignored. 720 * @flags: &enum iwl_fw_dbg_trigger_flags 721 */ 722 struct iwl_fw_dbg_trigger_tlv { 723 __le32 id; 724 __le32 vif_type; 725 __le32 stop_conf_ids; 726 __le32 stop_delay; 727 u8 mode; 728 u8 start_conf_id; 729 __le16 occurrences; 730 __le16 trig_dis_ms; 731 u8 flags; 732 u8 reserved[5]; 733 734 u8 data[0]; 735 } __packed; 736 737 #define FW_DBG_START_FROM_ALIVE 0 738 #define FW_DBG_CONF_MAX 32 739 #define FW_DBG_INVALID 0xff 740 741 /** 742 * struct iwl_fw_dbg_trigger_missed_bcon - configures trigger for missed beacons 743 * @stop_consec_missed_bcon: stop recording if threshold is crossed. 744 * @stop_consec_missed_bcon_since_rx: stop recording if threshold is crossed. 745 * @start_consec_missed_bcon: start recording if threshold is crossed. 746 * @start_consec_missed_bcon_since_rx: start recording if threshold is crossed. 747 * @reserved1: reserved 748 * @reserved2: reserved 749 */ 750 struct iwl_fw_dbg_trigger_missed_bcon { 751 __le32 stop_consec_missed_bcon; 752 __le32 stop_consec_missed_bcon_since_rx; 753 __le32 reserved2[2]; 754 __le32 start_consec_missed_bcon; 755 __le32 start_consec_missed_bcon_since_rx; 756 __le32 reserved1[2]; 757 } __packed; 758 759 /** 760 * struct iwl_fw_dbg_trigger_cmd - configures trigger for messages from FW. 761 * cmds: the list of commands to trigger the collection on 762 */ 763 struct iwl_fw_dbg_trigger_cmd { 764 struct cmd { 765 u8 cmd_id; 766 u8 group_id; 767 } __packed cmds[16]; 768 } __packed; 769 770 /** 771 * iwl_fw_dbg_trigger_stats - configures trigger for statistics 772 * @stop_offset: the offset of the value to be monitored 773 * @stop_threshold: the threshold above which to collect 774 * @start_offset: the offset of the value to be monitored 775 * @start_threshold: the threshold above which to start recording 776 */ 777 struct iwl_fw_dbg_trigger_stats { 778 __le32 stop_offset; 779 __le32 stop_threshold; 780 __le32 start_offset; 781 __le32 start_threshold; 782 } __packed; 783 784 /** 785 * struct iwl_fw_dbg_trigger_low_rssi - trigger for low beacon RSSI 786 * @rssi: RSSI value to trigger at 787 */ 788 struct iwl_fw_dbg_trigger_low_rssi { 789 __le32 rssi; 790 } __packed; 791 792 /** 793 * struct iwl_fw_dbg_trigger_mlme - configures trigger for mlme events 794 * @stop_auth_denied: number of denied authentication to collect 795 * @stop_auth_timeout: number of authentication timeout to collect 796 * @stop_rx_deauth: number of Rx deauth before to collect 797 * @stop_tx_deauth: number of Tx deauth before to collect 798 * @stop_assoc_denied: number of denied association to collect 799 * @stop_assoc_timeout: number of association timeout to collect 800 * @stop_connection_loss: number of connection loss to collect 801 * @start_auth_denied: number of denied authentication to start recording 802 * @start_auth_timeout: number of authentication timeout to start recording 803 * @start_rx_deauth: number of Rx deauth to start recording 804 * @start_tx_deauth: number of Tx deauth to start recording 805 * @start_assoc_denied: number of denied association to start recording 806 * @start_assoc_timeout: number of association timeout to start recording 807 * @start_connection_loss: number of connection loss to start recording 808 */ 809 struct iwl_fw_dbg_trigger_mlme { 810 u8 stop_auth_denied; 811 u8 stop_auth_timeout; 812 u8 stop_rx_deauth; 813 u8 stop_tx_deauth; 814 815 u8 stop_assoc_denied; 816 u8 stop_assoc_timeout; 817 u8 stop_connection_loss; 818 u8 reserved; 819 820 u8 start_auth_denied; 821 u8 start_auth_timeout; 822 u8 start_rx_deauth; 823 u8 start_tx_deauth; 824 825 u8 start_assoc_denied; 826 u8 start_assoc_timeout; 827 u8 start_connection_loss; 828 u8 reserved2; 829 } __packed; 830 831 /** 832 * struct iwl_fw_dbg_trigger_txq_timer - configures the Tx queue's timer 833 * @command_queue: timeout for the command queue in ms 834 * @bss: timeout for the queues of a BSS (except for TDLS queues) in ms 835 * @softap: timeout for the queues of a softAP in ms 836 * @p2p_go: timeout for the queues of a P2P GO in ms 837 * @p2p_client: timeout for the queues of a P2P client in ms 838 * @p2p_device: timeout for the queues of a P2P device in ms 839 * @ibss: timeout for the queues of an IBSS in ms 840 * @tdls: timeout for the queues of a TDLS station in ms 841 */ 842 struct iwl_fw_dbg_trigger_txq_timer { 843 __le32 command_queue; 844 __le32 bss; 845 __le32 softap; 846 __le32 p2p_go; 847 __le32 p2p_client; 848 __le32 p2p_device; 849 __le32 ibss; 850 __le32 tdls; 851 __le32 reserved[4]; 852 } __packed; 853 854 /** 855 * struct iwl_fw_dbg_trigger_time_event - configures a time event trigger 856 * time_Events: a list of tuples <id, action_bitmap>. The driver will issue a 857 * trigger each time a time event notification that relates to time event 858 * id with one of the actions in the bitmap is received and 859 * BIT(notif->status) is set in status_bitmap. 860 * 861 */ 862 struct iwl_fw_dbg_trigger_time_event { 863 struct { 864 __le32 id; 865 __le32 action_bitmap; 866 __le32 status_bitmap; 867 } __packed time_events[16]; 868 } __packed; 869 870 /** 871 * struct iwl_fw_dbg_trigger_ba - configures BlockAck related trigger 872 * rx_ba_start: tid bitmap to configure on what tid the trigger should occur 873 * when an Rx BlockAck session is started. 874 * rx_ba_stop: tid bitmap to configure on what tid the trigger should occur 875 * when an Rx BlockAck session is stopped. 876 * tx_ba_start: tid bitmap to configure on what tid the trigger should occur 877 * when a Tx BlockAck session is started. 878 * tx_ba_stop: tid bitmap to configure on what tid the trigger should occur 879 * when a Tx BlockAck session is stopped. 880 * rx_bar: tid bitmap to configure on what tid the trigger should occur 881 * when a BAR is received (for a Tx BlockAck session). 882 * tx_bar: tid bitmap to configure on what tid the trigger should occur 883 * when a BAR is send (for an Rx BlocAck session). 884 * frame_timeout: tid bitmap to configure on what tid the trigger should occur 885 * when a frame times out in the reordering buffer. 886 */ 887 struct iwl_fw_dbg_trigger_ba { 888 __le16 rx_ba_start; 889 __le16 rx_ba_stop; 890 __le16 tx_ba_start; 891 __le16 tx_ba_stop; 892 __le16 rx_bar; 893 __le16 tx_bar; 894 __le16 frame_timeout; 895 } __packed; 896 897 /** 898 * struct iwl_fw_dbg_trigger_tdls - configures trigger for TDLS events. 899 * @action_bitmap: the TDLS action to trigger the collection upon 900 * @peer_mode: trigger on specific peer or all 901 * @peer: the TDLS peer to trigger the collection on 902 */ 903 struct iwl_fw_dbg_trigger_tdls { 904 u8 action_bitmap; 905 u8 peer_mode; 906 u8 peer[ETH_ALEN]; 907 u8 reserved[4]; 908 } __packed; 909 910 /** 911 * struct iwl_fw_dbg_trigger_tx_status - configures trigger for tx response 912 * status. 913 * @statuses: the list of statuses to trigger the collection on 914 */ 915 struct iwl_fw_dbg_trigger_tx_status { 916 struct tx_status { 917 u8 status; 918 u8 reserved[3]; 919 } __packed statuses[16]; 920 __le32 reserved[2]; 921 } __packed; 922 923 /** 924 * struct iwl_fw_dbg_conf_tlv - a TLV that describes a debug configuration. 925 * @id: conf id 926 * @usniffer: should the uSniffer image be used 927 * @num_of_hcmds: how many HCMDs to send are present here 928 * @hcmd: a variable length host command to be sent to apply the configuration. 929 * If there is more than one HCMD to send, they will appear one after the 930 * other and be sent in the order that they appear in. 931 * This parses IWL_UCODE_TLV_FW_DBG_CONF. The user can add up-to 932 * %FW_DBG_CONF_MAX configuration per run. 933 */ 934 struct iwl_fw_dbg_conf_tlv { 935 u8 id; 936 u8 usniffer; 937 u8 reserved; 938 u8 num_of_hcmds; 939 struct iwl_fw_dbg_conf_hcmd hcmd; 940 } __packed; 941 942 #define IWL_FW_CMD_VER_UNKNOWN 99 943 944 /** 945 * struct iwl_fw_cmd_version - firmware command version entry 946 * @cmd: command ID 947 * @group: group ID 948 * @cmd_ver: command version 949 * @notif_ver: notification version 950 */ 951 struct iwl_fw_cmd_version { 952 u8 cmd; 953 u8 group; 954 u8 cmd_ver; 955 u8 notif_ver; 956 } __packed; 957 958 struct iwl_fw_tcm_error_addr { 959 __le32 addr; 960 }; /* FW_TLV_TCM_ERROR_INFO_ADDRS_S */ 961 962 struct iwl_fw_dump_exclude { 963 __le32 addr, size; 964 }; 965 966 static inline size_t _iwl_tlv_array_len(const struct iwl_ucode_tlv *tlv, 967 size_t fixed_size, size_t var_size) 968 { 969 size_t var_len = le32_to_cpu(tlv->length) - fixed_size; 970 971 if (WARN_ON(var_len % var_size)) 972 return 0; 973 974 return var_len / var_size; 975 } 976 977 #define iwl_tlv_array_len(_tlv_ptr, _struct_ptr, _memb) \ 978 _iwl_tlv_array_len((_tlv_ptr), sizeof(*(_struct_ptr)), \ 979 sizeof(_struct_ptr->_memb[0])) 980 981 #endif /* __iwl_fw_file_h__ */ 982