xref: /linux/drivers/net/wireless/intel/iwlwifi/fw/file.h (revision 3652117f854819a148ff0fbe4492587d3520b5e5)
1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
2 /*
3  * Copyright (C) 2008-2014, 2018-2023 Intel Corporation
4  * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5  * Copyright (C) 2016-2017 Intel Deutschland GmbH
6  */
7 #ifndef __iwl_fw_file_h__
8 #define __iwl_fw_file_h__
9 
10 #include <linux/netdevice.h>
11 #include <linux/nl80211.h>
12 
13 /* v1/v2 uCode file layout */
14 struct iwl_ucode_header {
15 	__le32 ver;	/* major/minor/API/serial */
16 	union {
17 		struct {
18 			__le32 inst_size;	/* bytes of runtime code */
19 			__le32 data_size;	/* bytes of runtime data */
20 			__le32 init_size;	/* bytes of init code */
21 			__le32 init_data_size;	/* bytes of init data */
22 			__le32 boot_size;	/* bytes of bootstrap code */
23 			u8 data[0];		/* in same order as sizes */
24 		} v1;
25 		struct {
26 			__le32 build;		/* build number */
27 			__le32 inst_size;	/* bytes of runtime code */
28 			__le32 data_size;	/* bytes of runtime data */
29 			__le32 init_size;	/* bytes of init code */
30 			__le32 init_data_size;	/* bytes of init data */
31 			__le32 boot_size;	/* bytes of bootstrap code */
32 			u8 data[0];		/* in same order as sizes */
33 		} v2;
34 	} u;
35 };
36 
37 #define IWL_UCODE_TLV_DEBUG_BASE	0x1000005
38 #define IWL_UCODE_TLV_CONST_BASE	0x100
39 
40 /*
41  * new TLV uCode file layout
42  *
43  * The new TLV file format contains TLVs, that each specify
44  * some piece of data.
45  */
46 
47 enum iwl_ucode_tlv_type {
48 	IWL_UCODE_TLV_INVALID		= 0, /* unused */
49 	IWL_UCODE_TLV_INST		= 1,
50 	IWL_UCODE_TLV_DATA		= 2,
51 	IWL_UCODE_TLV_INIT		= 3,
52 	IWL_UCODE_TLV_INIT_DATA		= 4,
53 	IWL_UCODE_TLV_BOOT		= 5,
54 	IWL_UCODE_TLV_PROBE_MAX_LEN	= 6, /* a u32 value */
55 	IWL_UCODE_TLV_PAN		= 7, /* deprecated -- only used in DVM */
56 	IWL_UCODE_TLV_MEM_DESC		= 7, /* replaces PAN in non-DVM */
57 	IWL_UCODE_TLV_RUNT_EVTLOG_PTR	= 8,
58 	IWL_UCODE_TLV_RUNT_EVTLOG_SIZE	= 9,
59 	IWL_UCODE_TLV_RUNT_ERRLOG_PTR	= 10,
60 	IWL_UCODE_TLV_INIT_EVTLOG_PTR	= 11,
61 	IWL_UCODE_TLV_INIT_EVTLOG_SIZE	= 12,
62 	IWL_UCODE_TLV_INIT_ERRLOG_PTR	= 13,
63 	IWL_UCODE_TLV_ENHANCE_SENS_TBL	= 14,
64 	IWL_UCODE_TLV_PHY_CALIBRATION_SIZE = 15,
65 	IWL_UCODE_TLV_WOWLAN_INST	= 16,
66 	IWL_UCODE_TLV_WOWLAN_DATA	= 17,
67 	IWL_UCODE_TLV_FLAGS		= 18,
68 	IWL_UCODE_TLV_SEC_RT		= 19,
69 	IWL_UCODE_TLV_SEC_INIT		= 20,
70 	IWL_UCODE_TLV_SEC_WOWLAN	= 21,
71 	IWL_UCODE_TLV_DEF_CALIB		= 22,
72 	IWL_UCODE_TLV_PHY_SKU		= 23,
73 	IWL_UCODE_TLV_SECURE_SEC_RT	= 24,
74 	IWL_UCODE_TLV_SECURE_SEC_INIT	= 25,
75 	IWL_UCODE_TLV_SECURE_SEC_WOWLAN	= 26,
76 	IWL_UCODE_TLV_NUM_OF_CPU	= 27,
77 	IWL_UCODE_TLV_CSCHEME		= 28,
78 	IWL_UCODE_TLV_API_CHANGES_SET	= 29,
79 	IWL_UCODE_TLV_ENABLED_CAPABILITIES	= 30,
80 	IWL_UCODE_TLV_N_SCAN_CHANNELS		= 31,
81 	IWL_UCODE_TLV_PAGING		= 32,
82 	IWL_UCODE_TLV_SEC_RT_USNIFFER	= 34,
83 	/* 35 is unused */
84 	IWL_UCODE_TLV_FW_VERSION	= 36,
85 	IWL_UCODE_TLV_FW_DBG_DEST	= 38,
86 	IWL_UCODE_TLV_FW_DBG_CONF	= 39,
87 	IWL_UCODE_TLV_FW_DBG_TRIGGER	= 40,
88 	IWL_UCODE_TLV_CMD_VERSIONS	= 48,
89 	IWL_UCODE_TLV_FW_GSCAN_CAPA	= 50,
90 	IWL_UCODE_TLV_FW_MEM_SEG	= 51,
91 	IWL_UCODE_TLV_IML		= 52,
92 	IWL_UCODE_TLV_UMAC_DEBUG_ADDRS	= 54,
93 	IWL_UCODE_TLV_LMAC_DEBUG_ADDRS	= 55,
94 	IWL_UCODE_TLV_FW_RECOVERY_INFO	= 57,
95 	IWL_UCODE_TLV_HW_TYPE			= 58,
96 	IWL_UCODE_TLV_FW_FSEQ_VERSION		= 60,
97 	IWL_UCODE_TLV_PHY_INTEGRATION_VERSION	= 61,
98 
99 	IWL_UCODE_TLV_PNVM_VERSION		= 62,
100 	IWL_UCODE_TLV_PNVM_SKU			= 64,
101 
102 	IWL_UCODE_TLV_SEC_TABLE_ADDR		= 66,
103 	IWL_UCODE_TLV_D3_KEK_KCK_ADDR		= 67,
104 	IWL_UCODE_TLV_CURRENT_PC		= 68,
105 
106 	IWL_UCODE_TLV_FW_NUM_STATIONS		= IWL_UCODE_TLV_CONST_BASE + 0,
107 	IWL_UCODE_TLV_FW_NUM_BEACONS		= IWL_UCODE_TLV_CONST_BASE + 2,
108 
109 	IWL_UCODE_TLV_TYPE_DEBUG_INFO		= IWL_UCODE_TLV_DEBUG_BASE + 0,
110 	IWL_UCODE_TLV_TYPE_BUFFER_ALLOCATION	= IWL_UCODE_TLV_DEBUG_BASE + 1,
111 	IWL_UCODE_TLV_TYPE_HCMD			= IWL_UCODE_TLV_DEBUG_BASE + 2,
112 	IWL_UCODE_TLV_TYPE_REGIONS		= IWL_UCODE_TLV_DEBUG_BASE + 3,
113 	IWL_UCODE_TLV_TYPE_TRIGGERS		= IWL_UCODE_TLV_DEBUG_BASE + 4,
114 	IWL_UCODE_TLV_TYPE_CONF_SET		= IWL_UCODE_TLV_DEBUG_BASE + 5,
115 	IWL_UCODE_TLV_DEBUG_MAX = IWL_UCODE_TLV_TYPE_TRIGGERS,
116 
117 	/* TLVs 0x1000-0x2000 are for internal driver usage */
118 	IWL_UCODE_TLV_FW_DBG_DUMP_LST	= 0x1000,
119 };
120 
121 struct iwl_ucode_tlv {
122 	__le32 type;		/* see above */
123 	__le32 length;		/* not including type/length fields */
124 	u8 data[];
125 };
126 
127 #define IWL_TLV_UCODE_MAGIC		0x0a4c5749
128 #define FW_VER_HUMAN_READABLE_SZ	64
129 
130 struct iwl_tlv_ucode_header {
131 	/*
132 	 * The TLV style ucode header is distinguished from
133 	 * the v1/v2 style header by first four bytes being
134 	 * zero, as such is an invalid combination of
135 	 * major/minor/API/serial versions.
136 	 */
137 	__le32 zero;
138 	__le32 magic;
139 	u8 human_readable[FW_VER_HUMAN_READABLE_SZ];
140 	/* major/minor/API/serial or major in new format */
141 	__le32 ver;
142 	__le32 build;
143 	__le64 ignore;
144 	/*
145 	 * The data contained herein has a TLV layout,
146 	 * see above for the TLV header and types.
147 	 * Note that each TLV is padded to a length
148 	 * that is a multiple of 4 for alignment.
149 	 */
150 	u8 data[];
151 };
152 
153 /*
154  * ucode TLVs
155  *
156  * ability to get extension for: flags & capabilities from ucode binaries files
157  */
158 struct iwl_ucode_api {
159 	__le32 api_index;
160 	__le32 api_flags;
161 } __packed;
162 
163 struct iwl_ucode_capa {
164 	__le32 api_index;
165 	__le32 api_capa;
166 } __packed;
167 
168 /**
169  * enum iwl_ucode_tlv_flag - ucode API flags
170  * @IWL_UCODE_TLV_FLAGS_PAN: This is PAN capable microcode; this previously
171  *	was a separate TLV but moved here to save space.
172  * @IWL_UCODE_TLV_FLAGS_NEWSCAN: new uCode scan behavior on hidden SSID,
173  *	treats good CRC threshold as a boolean
174  * @IWL_UCODE_TLV_FLAGS_MFP: This uCode image supports MFP (802.11w).
175  * @IWL_UCODE_TLV_FLAGS_UAPSD_SUPPORT: This uCode image supports uAPSD
176  * @IWL_UCODE_TLV_FLAGS_SHORT_BL: 16 entries of block list instead of 64 in scan
177  *	offload profile config command.
178  * @IWL_UCODE_TLV_FLAGS_D3_6_IPV6_ADDRS: D3 image supports up to six
179  *	(rather than two) IPv6 addresses
180  * @IWL_UCODE_TLV_FLAGS_NO_BASIC_SSID: not sending a probe with the SSID element
181  *	from the probe request template.
182  * @IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_SMALL: new NS offload (small version)
183  * @IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_LARGE: new NS offload (large version)
184  * @IWL_UCODE_TLV_FLAGS_UAPSD_SUPPORT: General support for uAPSD
185  * @IWL_UCODE_TLV_FLAGS_P2P_PS_UAPSD: P2P client supports uAPSD power save
186  * @IWL_UCODE_TLV_FLAGS_EBS_SUPPORT: this uCode image supports EBS.
187  */
188 enum iwl_ucode_tlv_flag {
189 	IWL_UCODE_TLV_FLAGS_PAN			= BIT(0),
190 	IWL_UCODE_TLV_FLAGS_NEWSCAN		= BIT(1),
191 	IWL_UCODE_TLV_FLAGS_MFP			= BIT(2),
192 	IWL_UCODE_TLV_FLAGS_SHORT_BL		= BIT(7),
193 	IWL_UCODE_TLV_FLAGS_D3_6_IPV6_ADDRS	= BIT(10),
194 	IWL_UCODE_TLV_FLAGS_NO_BASIC_SSID	= BIT(12),
195 	IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_SMALL	= BIT(15),
196 	IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_LARGE	= BIT(16),
197 	IWL_UCODE_TLV_FLAGS_UAPSD_SUPPORT	= BIT(24),
198 	IWL_UCODE_TLV_FLAGS_EBS_SUPPORT		= BIT(25),
199 	IWL_UCODE_TLV_FLAGS_P2P_PS_UAPSD	= BIT(26),
200 };
201 
202 typedef unsigned int __bitwise iwl_ucode_tlv_api_t;
203 
204 /**
205  * enum iwl_ucode_tlv_api - ucode api
206  * @IWL_UCODE_TLV_API_FRAGMENTED_SCAN: This ucode supports active dwell time
207  *	longer than the passive one, which is essential for fragmented scan.
208  * @IWL_UCODE_TLV_API_WIFI_MCC_UPDATE: ucode supports MCC updates with source.
209  * @IWL_UCODE_TLV_API_LQ_SS_PARAMS: Configure STBC/BFER via LQ CMD ss_params
210  * @IWL_UCODE_TLV_API_NEW_VERSION: new versioning format
211  * @IWL_UCODE_TLV_API_SCAN_TSF_REPORT: Scan start time reported in scan
212  *	iteration complete notification, and the timestamp reported for RX
213  *	received during scan, are reported in TSF of the mac specified in the
214  *	scan request.
215  * @IWL_UCODE_TLV_API_TKIP_MIC_KEYS: This ucode supports version 2 of
216  *	ADD_MODIFY_STA_KEY_API_S_VER_2.
217  * @IWL_UCODE_TLV_API_STA_TYPE: This ucode supports station type assignement.
218  * @IWL_UCODE_TLV_API_NAN2_VER2: This ucode supports NAN API version 2
219  * @IWL_UCODE_TLV_API_NEW_RX_STATS: should new RX STATISTICS API be used
220  * @IWL_UCODE_TLV_API_QUOTA_LOW_LATENCY: Quota command includes a field
221  *	indicating low latency direction.
222  * @IWL_UCODE_TLV_API_DEPRECATE_TTAK: RX status flag TTAK ok (bit 7) is
223  *	deprecated.
224  * @IWL_UCODE_TLV_API_ADAPTIVE_DWELL_V2: This ucode supports version 8
225  *	of scan request: SCAN_REQUEST_CMD_UMAC_API_S_VER_8
226  * @IWL_UCODE_TLV_API_FRAG_EBS: This ucode supports fragmented EBS
227  * @IWL_UCODE_TLV_API_REDUCE_TX_POWER: This ucode supports v5 of
228  *	the REDUCE_TX_POWER_CMD.
229  * @IWL_UCODE_TLV_API_SHORT_BEACON_NOTIF: This ucode supports the short
230  *	version of the beacon notification.
231  * @IWL_UCODE_TLV_API_BEACON_FILTER_V4: This ucode supports v4 of
232  *	BEACON_FILTER_CONFIG_API_S_VER_4.
233  * @IWL_UCODE_TLV_API_REGULATORY_NVM_INFO: This ucode supports v4 of
234  *	REGULATORY_NVM_GET_INFO_RSP_API_S.
235  * @IWL_UCODE_TLV_API_FTM_NEW_RANGE_REQ: This ucode supports v7 of
236  *	LOCATION_RANGE_REQ_CMD_API_S and v6 of LOCATION_RANGE_RESP_NTFY_API_S.
237  * @IWL_UCODE_TLV_API_SCAN_OFFLOAD_CHANS: This ucode supports v2 of
238  *	SCAN_OFFLOAD_PROFILE_MATCH_RESULTS_S and v3 of
239  *	SCAN_OFFLOAD_PROFILES_QUERY_RSP_S.
240  * @IWL_UCODE_TLV_API_MBSSID_HE: This ucode supports v2 of
241  *	STA_CONTEXT_DOT11AX_API_S
242  * @IWL_UCODE_TLV_API_SAR_TABLE_VER: This ucode supports different sar
243  *	version tables.
244  * @IWL_UCODE_TLV_API_REDUCED_SCAN_CONFIG: This ucode supports v3 of
245  *  SCAN_CONFIG_DB_CMD_API_S.
246  *
247  * @NUM_IWL_UCODE_TLV_API: number of bits used
248  */
249 enum iwl_ucode_tlv_api {
250 	/* API Set 0 */
251 	IWL_UCODE_TLV_API_FRAGMENTED_SCAN	= (__force iwl_ucode_tlv_api_t)8,
252 	IWL_UCODE_TLV_API_WIFI_MCC_UPDATE	= (__force iwl_ucode_tlv_api_t)9,
253 	IWL_UCODE_TLV_API_LQ_SS_PARAMS		= (__force iwl_ucode_tlv_api_t)18,
254 	IWL_UCODE_TLV_API_NEW_VERSION		= (__force iwl_ucode_tlv_api_t)20,
255 	IWL_UCODE_TLV_API_SCAN_TSF_REPORT	= (__force iwl_ucode_tlv_api_t)28,
256 	IWL_UCODE_TLV_API_TKIP_MIC_KEYS		= (__force iwl_ucode_tlv_api_t)29,
257 	IWL_UCODE_TLV_API_STA_TYPE		= (__force iwl_ucode_tlv_api_t)30,
258 	IWL_UCODE_TLV_API_NAN2_VER2		= (__force iwl_ucode_tlv_api_t)31,
259 	/* API Set 1 */
260 	IWL_UCODE_TLV_API_ADAPTIVE_DWELL	= (__force iwl_ucode_tlv_api_t)32,
261 	IWL_UCODE_TLV_API_OCE			= (__force iwl_ucode_tlv_api_t)33,
262 	IWL_UCODE_TLV_API_NEW_BEACON_TEMPLATE	= (__force iwl_ucode_tlv_api_t)34,
263 	IWL_UCODE_TLV_API_NEW_RX_STATS		= (__force iwl_ucode_tlv_api_t)35,
264 	IWL_UCODE_TLV_API_WOWLAN_KEY_MATERIAL	= (__force iwl_ucode_tlv_api_t)36,
265 	IWL_UCODE_TLV_API_QUOTA_LOW_LATENCY	= (__force iwl_ucode_tlv_api_t)38,
266 	IWL_UCODE_TLV_API_DEPRECATE_TTAK	= (__force iwl_ucode_tlv_api_t)41,
267 	IWL_UCODE_TLV_API_ADAPTIVE_DWELL_V2	= (__force iwl_ucode_tlv_api_t)42,
268 	IWL_UCODE_TLV_API_FRAG_EBS		= (__force iwl_ucode_tlv_api_t)44,
269 	IWL_UCODE_TLV_API_REDUCE_TX_POWER	= (__force iwl_ucode_tlv_api_t)45,
270 	IWL_UCODE_TLV_API_SHORT_BEACON_NOTIF	= (__force iwl_ucode_tlv_api_t)46,
271 	IWL_UCODE_TLV_API_BEACON_FILTER_V4      = (__force iwl_ucode_tlv_api_t)47,
272 	IWL_UCODE_TLV_API_REGULATORY_NVM_INFO   = (__force iwl_ucode_tlv_api_t)48,
273 	IWL_UCODE_TLV_API_FTM_NEW_RANGE_REQ     = (__force iwl_ucode_tlv_api_t)49,
274 	IWL_UCODE_TLV_API_SCAN_OFFLOAD_CHANS    = (__force iwl_ucode_tlv_api_t)50,
275 	IWL_UCODE_TLV_API_MBSSID_HE		= (__force iwl_ucode_tlv_api_t)52,
276 	IWL_UCODE_TLV_API_WOWLAN_TCP_SYN_WAKE	= (__force iwl_ucode_tlv_api_t)53,
277 	IWL_UCODE_TLV_API_FTM_RTT_ACCURACY      = (__force iwl_ucode_tlv_api_t)54,
278 	IWL_UCODE_TLV_API_SAR_TABLE_VER         = (__force iwl_ucode_tlv_api_t)55,
279 	IWL_UCODE_TLV_API_REDUCED_SCAN_CONFIG   = (__force iwl_ucode_tlv_api_t)56,
280 	IWL_UCODE_TLV_API_ADWELL_HB_DEF_N_AP	= (__force iwl_ucode_tlv_api_t)57,
281 	IWL_UCODE_TLV_API_SCAN_EXT_CHAN_VER	= (__force iwl_ucode_tlv_api_t)58,
282 	IWL_UCODE_TLV_API_BAND_IN_RX_DATA	= (__force iwl_ucode_tlv_api_t)59,
283 
284 	NUM_IWL_UCODE_TLV_API
285 /*
286  * This construction make both sparse (which cannot increment the previous
287  * member due to its bitwise type) and kernel-doc (which doesn't understand
288  * the ifdef/else properly) work.
289  */
290 #ifdef __CHECKER__
291 #define __CHECKER_NUM_IWL_UCODE_TLV_API	128
292 		= (__force iwl_ucode_tlv_api_t)__CHECKER_NUM_IWL_UCODE_TLV_API,
293 #define NUM_IWL_UCODE_TLV_API __CHECKER_NUM_IWL_UCODE_TLV_API
294 #endif
295 };
296 
297 typedef unsigned int __bitwise iwl_ucode_tlv_capa_t;
298 
299 /**
300  * enum iwl_ucode_tlv_capa - ucode capabilities
301  * @IWL_UCODE_TLV_CAPA_D0I3_SUPPORT: supports D0i3
302  * @IWL_UCODE_TLV_CAPA_LAR_SUPPORT: supports Location Aware Regulatory
303  * @IWL_UCODE_TLV_CAPA_UMAC_SCAN: supports UMAC scan.
304  * @IWL_UCODE_TLV_CAPA_BEAMFORMER: supports Beamformer
305  * @IWL_UCODE_TLV_CAPA_TDLS_SUPPORT: support basic TDLS functionality
306  * @IWL_UCODE_TLV_CAPA_TXPOWER_INSERTION_SUPPORT: supports insertion of current
307  *	tx power value into TPC Report action frame and Link Measurement Report
308  *	action frame
309  * @IWL_UCODE_TLV_CAPA_DS_PARAM_SET_IE_SUPPORT: supports updating current
310  *	channel in DS parameter set element in probe requests.
311  * @IWL_UCODE_TLV_CAPA_WFA_TPC_REP_IE_SUPPORT: supports adding TPC Report IE in
312  *	probe requests.
313  * @IWL_UCODE_TLV_CAPA_QUIET_PERIOD_SUPPORT: supports Quiet Period requests
314  * @IWL_UCODE_TLV_CAPA_DQA_SUPPORT: supports dynamic queue allocation (DQA),
315  *	which also implies support for the scheduler configuration command
316  * @IWL_UCODE_TLV_CAPA_TDLS_CHANNEL_SWITCH: supports TDLS channel switching
317  * @IWL_UCODE_TLV_CAPA_CNSLDTD_D3_D0_IMG: Consolidated D3-D0 image
318  * @IWL_UCODE_TLV_CAPA_HOTSPOT_SUPPORT: supports Hot Spot Command
319  * @IWL_UCODE_TLV_CAPA_CSUM_SUPPORT: supports TCP Checksum Offload
320  * @IWL_UCODE_TLV_CAPA_RADIO_BEACON_STATS: support radio and beacon statistics
321  * @IWL_UCODE_TLV_CAPA_P2P_SCM_UAPSD: supports U-APSD on p2p interface when it
322  *	is standalone or with a BSS station interface in the same binding.
323  * @IWL_UCODE_TLV_CAPA_BT_COEX_PLCR: enabled BT Coex packet level co-running
324  * @IWL_UCODE_TLV_CAPA_LAR_MULTI_MCC: ucode supports LAR updates with different
325  *	sources for the MCC. This TLV bit is a future replacement to
326  *	IWL_UCODE_TLV_API_WIFI_MCC_UPDATE. When either is set, multi-source LAR
327  *	is supported.
328  * @IWL_UCODE_TLV_CAPA_BT_COEX_RRC: supports BT Coex RRC
329  * @IWL_UCODE_TLV_CAPA_GSCAN_SUPPORT: supports gscan (no longer used)
330  * @IWL_UCODE_TLV_CAPA_FRAGMENTED_PNVM_IMG: supports fragmented PNVM image
331  * @IWL_UCODE_TLV_CAPA_SOC_LATENCY_SUPPORT: the firmware supports setting
332  *	stabilization latency for SoCs.
333  * @IWL_UCODE_TLV_CAPA_STA_PM_NOTIF: firmware will send STA PM notification
334  * @IWL_UCODE_TLV_CAPA_TLC_OFFLOAD: firmware implements rate scaling algorithm
335  * @IWL_UCODE_TLV_CAPA_DYNAMIC_QUOTA: firmware implements quota related
336  * @IWL_UCODE_TLV_CAPA_COEX_SCHEMA_2: firmware implements Coex Schema 2
337  * IWL_UCODE_TLV_CAPA_CHANNEL_SWITCH_CMD: firmware supports CSA command
338  * @IWL_UCODE_TLV_CAPA_ULTRA_HB_CHANNELS: firmware supports ultra high band
339  *	(6 GHz).
340  * @IWL_UCODE_TLV_CAPA_CS_MODIFY: firmware supports modify action CSA command
341  * @IWL_UCODE_TLV_CAPA_EXTENDED_DTS_MEASURE: extended DTS measurement
342  * @IWL_UCODE_TLV_CAPA_SHORT_PM_TIMEOUTS: supports short PM timeouts
343  * @IWL_UCODE_TLV_CAPA_BT_MPLUT_SUPPORT: supports bt-coex Multi-priority LUT
344  * @IWL_UCODE_TLV_CAPA_CSA_AND_TBTT_OFFLOAD: the firmware supports CSA
345  *	countdown offloading. Beacon notifications are not sent to the host.
346  *	The fw also offloads TBTT alignment.
347  * @IWL_UCODE_TLV_CAPA_BEACON_ANT_SELECTION: firmware will decide on what
348  *	antenna the beacon should be transmitted
349  * @IWL_UCODE_TLV_CAPA_BEACON_STORING: firmware will store the latest beacon
350  *	from AP and will send it upon d0i3 exit.
351  * @IWL_UCODE_TLV_CAPA_LAR_SUPPORT_V3: support LAR API V3
352  * @IWL_UCODE_TLV_CAPA_CT_KILL_BY_FW: firmware responsible for CT-kill
353  * @IWL_UCODE_TLV_CAPA_TEMP_THS_REPORT_SUPPORT: supports temperature
354  *	thresholds reporting
355  * @IWL_UCODE_TLV_CAPA_CTDP_SUPPORT: supports cTDP command
356  * @IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED: supports usniffer enabled in
357  *	regular image.
358  * @IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG: support getting more shared
359  *	memory addresses from the firmware.
360  * @IWL_UCODE_TLV_CAPA_LQM_SUPPORT: supports Link Quality Measurement
361  * @IWL_UCODE_TLV_CAPA_TX_POWER_ACK: reduced TX power API has larger
362  *	command size (command version 4) that supports toggling ACK TX
363  *	power reduction.
364  * @IWL_UCODE_TLV_CAPA_D3_DEBUG: supports debug recording during D3
365  * @IWL_UCODE_TLV_CAPA_MCC_UPDATE_11AX_SUPPORT: MCC response support 11ax
366  *	capability.
367  * @IWL_UCODE_TLV_CAPA_CSI_REPORTING: firmware is capable of being configured
368  *	to report the CSI information with (certain) RX frames
369  * @IWL_UCODE_TLV_CAPA_FTM_CALIBRATED: has FTM calibrated and thus supports both
370  *	initiator and responder
371  * @IWL_UCODE_TLV_CAPA_MLME_OFFLOAD: supports MLME offload
372  * @IWL_UCODE_TLV_CAPA_PROTECTED_TWT: Supports protection of TWT action frames
373  * @IWL_UCODE_TLV_CAPA_FW_RESET_HANDSHAKE: Supports the firmware handshake in
374  *	reset flow
375  * @IWL_UCODE_TLV_CAPA_PASSIVE_6GHZ_SCAN: Support for passive scan on 6GHz PSC
376  *      channels even when these are not enabled.
377  * @IWL_UCODE_TLV_CAPA_DUMP_COMPLETE_SUPPORT: Support for indicating dump collection
378  *	complete to FW.
379  *
380  * @NUM_IWL_UCODE_TLV_CAPA: number of bits used
381  */
382 enum iwl_ucode_tlv_capa {
383 	/* set 0 */
384 	IWL_UCODE_TLV_CAPA_D0I3_SUPPORT			= (__force iwl_ucode_tlv_capa_t)0,
385 	IWL_UCODE_TLV_CAPA_LAR_SUPPORT			= (__force iwl_ucode_tlv_capa_t)1,
386 	IWL_UCODE_TLV_CAPA_UMAC_SCAN			= (__force iwl_ucode_tlv_capa_t)2,
387 	IWL_UCODE_TLV_CAPA_BEAMFORMER			= (__force iwl_ucode_tlv_capa_t)3,
388 	IWL_UCODE_TLV_CAPA_TDLS_SUPPORT			= (__force iwl_ucode_tlv_capa_t)6,
389 	IWL_UCODE_TLV_CAPA_TXPOWER_INSERTION_SUPPORT	= (__force iwl_ucode_tlv_capa_t)8,
390 	IWL_UCODE_TLV_CAPA_DS_PARAM_SET_IE_SUPPORT	= (__force iwl_ucode_tlv_capa_t)9,
391 	IWL_UCODE_TLV_CAPA_WFA_TPC_REP_IE_SUPPORT	= (__force iwl_ucode_tlv_capa_t)10,
392 	IWL_UCODE_TLV_CAPA_QUIET_PERIOD_SUPPORT		= (__force iwl_ucode_tlv_capa_t)11,
393 	IWL_UCODE_TLV_CAPA_DQA_SUPPORT			= (__force iwl_ucode_tlv_capa_t)12,
394 	IWL_UCODE_TLV_CAPA_TDLS_CHANNEL_SWITCH		= (__force iwl_ucode_tlv_capa_t)13,
395 	IWL_UCODE_TLV_CAPA_CNSLDTD_D3_D0_IMG		= (__force iwl_ucode_tlv_capa_t)17,
396 	IWL_UCODE_TLV_CAPA_HOTSPOT_SUPPORT		= (__force iwl_ucode_tlv_capa_t)18,
397 	IWL_UCODE_TLV_CAPA_CSUM_SUPPORT			= (__force iwl_ucode_tlv_capa_t)21,
398 	IWL_UCODE_TLV_CAPA_RADIO_BEACON_STATS		= (__force iwl_ucode_tlv_capa_t)22,
399 	IWL_UCODE_TLV_CAPA_P2P_SCM_UAPSD		= (__force iwl_ucode_tlv_capa_t)26,
400 	IWL_UCODE_TLV_CAPA_BT_COEX_PLCR			= (__force iwl_ucode_tlv_capa_t)28,
401 	IWL_UCODE_TLV_CAPA_LAR_MULTI_MCC		= (__force iwl_ucode_tlv_capa_t)29,
402 	IWL_UCODE_TLV_CAPA_BT_COEX_RRC			= (__force iwl_ucode_tlv_capa_t)30,
403 	IWL_UCODE_TLV_CAPA_GSCAN_SUPPORT		= (__force iwl_ucode_tlv_capa_t)31,
404 
405 	/* set 1 */
406 	IWL_UCODE_TLV_CAPA_FRAGMENTED_PNVM_IMG		= (__force iwl_ucode_tlv_capa_t)32,
407 	IWL_UCODE_TLV_CAPA_SOC_LATENCY_SUPPORT		= (__force iwl_ucode_tlv_capa_t)37,
408 	IWL_UCODE_TLV_CAPA_STA_PM_NOTIF			= (__force iwl_ucode_tlv_capa_t)38,
409 	IWL_UCODE_TLV_CAPA_BINDING_CDB_SUPPORT		= (__force iwl_ucode_tlv_capa_t)39,
410 	IWL_UCODE_TLV_CAPA_CDB_SUPPORT			= (__force iwl_ucode_tlv_capa_t)40,
411 	IWL_UCODE_TLV_CAPA_D0I3_END_FIRST		= (__force iwl_ucode_tlv_capa_t)41,
412 	IWL_UCODE_TLV_CAPA_TLC_OFFLOAD                  = (__force iwl_ucode_tlv_capa_t)43,
413 	IWL_UCODE_TLV_CAPA_DYNAMIC_QUOTA                = (__force iwl_ucode_tlv_capa_t)44,
414 	IWL_UCODE_TLV_CAPA_COEX_SCHEMA_2		= (__force iwl_ucode_tlv_capa_t)45,
415 	IWL_UCODE_TLV_CAPA_CHANNEL_SWITCH_CMD		= (__force iwl_ucode_tlv_capa_t)46,
416 	IWL_UCODE_TLV_CAPA_FTM_CALIBRATED		= (__force iwl_ucode_tlv_capa_t)47,
417 	IWL_UCODE_TLV_CAPA_ULTRA_HB_CHANNELS		= (__force iwl_ucode_tlv_capa_t)48,
418 	IWL_UCODE_TLV_CAPA_CS_MODIFY			= (__force iwl_ucode_tlv_capa_t)49,
419 	IWL_UCODE_TLV_CAPA_SET_LTR_GEN2			= (__force iwl_ucode_tlv_capa_t)50,
420 	IWL_UCODE_TLV_CAPA_SET_PPAG			= (__force iwl_ucode_tlv_capa_t)52,
421 	IWL_UCODE_TLV_CAPA_TAS_CFG			= (__force iwl_ucode_tlv_capa_t)53,
422 	IWL_UCODE_TLV_CAPA_SESSION_PROT_CMD		= (__force iwl_ucode_tlv_capa_t)54,
423 	IWL_UCODE_TLV_CAPA_PROTECTED_TWT		= (__force iwl_ucode_tlv_capa_t)56,
424 	IWL_UCODE_TLV_CAPA_FW_RESET_HANDSHAKE		= (__force iwl_ucode_tlv_capa_t)57,
425 	IWL_UCODE_TLV_CAPA_PASSIVE_6GHZ_SCAN		= (__force iwl_ucode_tlv_capa_t)58,
426 	IWL_UCODE_TLV_CAPA_HIDDEN_6GHZ_SCAN		= (__force iwl_ucode_tlv_capa_t)59,
427 	IWL_UCODE_TLV_CAPA_BROADCAST_TWT		= (__force iwl_ucode_tlv_capa_t)60,
428 	IWL_UCODE_TLV_CAPA_COEX_HIGH_PRIO		= (__force iwl_ucode_tlv_capa_t)61,
429 	IWL_UCODE_TLV_CAPA_RFIM_SUPPORT			= (__force iwl_ucode_tlv_capa_t)62,
430 	IWL_UCODE_TLV_CAPA_BAID_ML_SUPPORT		= (__force iwl_ucode_tlv_capa_t)63,
431 
432 	/* set 2 */
433 	IWL_UCODE_TLV_CAPA_EXTENDED_DTS_MEASURE		= (__force iwl_ucode_tlv_capa_t)64,
434 	IWL_UCODE_TLV_CAPA_SHORT_PM_TIMEOUTS		= (__force iwl_ucode_tlv_capa_t)65,
435 	IWL_UCODE_TLV_CAPA_BT_MPLUT_SUPPORT		= (__force iwl_ucode_tlv_capa_t)67,
436 	IWL_UCODE_TLV_CAPA_MULTI_QUEUE_RX_SUPPORT	= (__force iwl_ucode_tlv_capa_t)68,
437 	IWL_UCODE_TLV_CAPA_CSA_AND_TBTT_OFFLOAD		= (__force iwl_ucode_tlv_capa_t)70,
438 	IWL_UCODE_TLV_CAPA_BEACON_ANT_SELECTION		= (__force iwl_ucode_tlv_capa_t)71,
439 	IWL_UCODE_TLV_CAPA_BEACON_STORING		= (__force iwl_ucode_tlv_capa_t)72,
440 	IWL_UCODE_TLV_CAPA_LAR_SUPPORT_V3		= (__force iwl_ucode_tlv_capa_t)73,
441 	IWL_UCODE_TLV_CAPA_CT_KILL_BY_FW		= (__force iwl_ucode_tlv_capa_t)74,
442 	IWL_UCODE_TLV_CAPA_TEMP_THS_REPORT_SUPPORT	= (__force iwl_ucode_tlv_capa_t)75,
443 	IWL_UCODE_TLV_CAPA_CTDP_SUPPORT			= (__force iwl_ucode_tlv_capa_t)76,
444 	IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED		= (__force iwl_ucode_tlv_capa_t)77,
445 	IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG	= (__force iwl_ucode_tlv_capa_t)80,
446 	IWL_UCODE_TLV_CAPA_LQM_SUPPORT			= (__force iwl_ucode_tlv_capa_t)81,
447 	IWL_UCODE_TLV_CAPA_TX_POWER_ACK			= (__force iwl_ucode_tlv_capa_t)84,
448 	IWL_UCODE_TLV_CAPA_D3_DEBUG			= (__force iwl_ucode_tlv_capa_t)87,
449 	IWL_UCODE_TLV_CAPA_LED_CMD_SUPPORT		= (__force iwl_ucode_tlv_capa_t)88,
450 	IWL_UCODE_TLV_CAPA_MCC_UPDATE_11AX_SUPPORT	= (__force iwl_ucode_tlv_capa_t)89,
451 	IWL_UCODE_TLV_CAPA_CSI_REPORTING		= (__force iwl_ucode_tlv_capa_t)90,
452 	IWL_UCODE_TLV_CAPA_DBG_SUSPEND_RESUME_CMD_SUPP	= (__force iwl_ucode_tlv_capa_t)92,
453 	IWL_UCODE_TLV_CAPA_DBG_BUF_ALLOC_CMD_SUPP	= (__force iwl_ucode_tlv_capa_t)93,
454 
455 	/* set 3 */
456 	IWL_UCODE_TLV_CAPA_MLME_OFFLOAD			= (__force iwl_ucode_tlv_capa_t)96,
457 
458 	/*
459 	 * @IWL_UCODE_TLV_CAPA_PSC_CHAN_SUPPORT: supports PSC channels
460 	 */
461 	IWL_UCODE_TLV_CAPA_PSC_CHAN_SUPPORT		= (__force iwl_ucode_tlv_capa_t)98,
462 
463 	IWL_UCODE_TLV_CAPA_BIGTK_SUPPORT		= (__force iwl_ucode_tlv_capa_t)100,
464 	IWL_UCODE_TLV_CAPA_DRAM_FRAG_SUPPORT		= (__force iwl_ucode_tlv_capa_t)104,
465 	IWL_UCODE_TLV_CAPA_DUMP_COMPLETE_SUPPORT	= (__force iwl_ucode_tlv_capa_t)105,
466 	IWL_UCODE_TLV_CAPA_SYNCED_TIME			= (__force iwl_ucode_tlv_capa_t)106,
467 	IWL_UCODE_TLV_CAPA_TIME_SYNC_BOTH_FTM_TM        = (__force iwl_ucode_tlv_capa_t)108,
468 	IWL_UCODE_TLV_CAPA_BIGTK_TX_SUPPORT		= (__force iwl_ucode_tlv_capa_t)109,
469 	IWL_UCODE_TLV_CAPA_MLD_API_SUPPORT		= (__force iwl_ucode_tlv_capa_t)110,
470 	IWL_UCODE_TLV_CAPA_SCAN_DONT_TOGGLE_ANT         = (__force iwl_ucode_tlv_capa_t)111,
471 	IWL_UCODE_TLV_CAPA_PPAG_CHINA_BIOS_SUPPORT	= (__force iwl_ucode_tlv_capa_t)112,
472 	IWL_UCODE_TLV_CAPA_OFFLOAD_BTM_SUPPORT		= (__force iwl_ucode_tlv_capa_t)113,
473 	IWL_UCODE_TLV_CAPA_STA_EXP_MFP_SUPPORT		= (__force iwl_ucode_tlv_capa_t)114,
474 	IWL_UCODE_TLV_CAPA_SNIFF_VALIDATE_SUPPORT	= (__force iwl_ucode_tlv_capa_t)116,
475 	IWL_UCODE_TLV_CAPA_CHINA_22_REG_SUPPORT		= (__force iwl_ucode_tlv_capa_t)117,
476 
477 	NUM_IWL_UCODE_TLV_CAPA
478 /*
479  * This construction make both sparse (which cannot increment the previous
480  * member due to its bitwise type) and kernel-doc (which doesn't understand
481  * the ifdef/else properly) work.
482  */
483 #ifdef __CHECKER__
484 #define __CHECKER_NUM_IWL_UCODE_TLV_CAPA	128
485 		= (__force iwl_ucode_tlv_capa_t)__CHECKER_NUM_IWL_UCODE_TLV_CAPA,
486 #define NUM_IWL_UCODE_TLV_CAPA __CHECKER_NUM_IWL_UCODE_TLV_CAPA
487 #endif
488 };
489 
490 /* The default calibrate table size if not specified by firmware file */
491 #define IWL_DEFAULT_STANDARD_PHY_CALIBRATE_TBL_SIZE	18
492 #define IWL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE		19
493 #define IWL_MAX_PHY_CALIBRATE_TBL_SIZE			253
494 
495 /* The default max probe length if not specified by the firmware file */
496 #define IWL_DEFAULT_MAX_PROBE_LENGTH	200
497 
498 /*
499  * For 16.0 uCode and above, there is no differentiation between sections,
500  * just an offset to the HW address.
501  */
502 #define CPU1_CPU2_SEPARATOR_SECTION	0xFFFFCCCC
503 #define PAGING_SEPARATOR_SECTION	0xAAAABBBB
504 
505 /* uCode version contains 4 values: Major/Minor/API/Serial */
506 #define IWL_UCODE_MAJOR(ver)	(((ver) & 0xFF000000) >> 24)
507 #define IWL_UCODE_MINOR(ver)	(((ver) & 0x00FF0000) >> 16)
508 #define IWL_UCODE_API(ver)	(((ver) & 0x0000FF00) >> 8)
509 #define IWL_UCODE_SERIAL(ver)	((ver) & 0x000000FF)
510 
511 /**
512  * struct iwl_tlv_calib_ctrl - Calibration control struct.
513  * Sent as part of the phy configuration command.
514  * @flow_trigger: bitmap for which calibrations to perform according to
515  *		flow triggers.
516  * @event_trigger: bitmap for which calibrations to perform according to
517  *		event triggers.
518  */
519 struct iwl_tlv_calib_ctrl {
520 	__le32 flow_trigger;
521 	__le32 event_trigger;
522 } __packed;
523 
524 enum iwl_fw_phy_cfg {
525 	FW_PHY_CFG_RADIO_TYPE_POS = 0,
526 	FW_PHY_CFG_RADIO_TYPE = 0x3 << FW_PHY_CFG_RADIO_TYPE_POS,
527 	FW_PHY_CFG_RADIO_STEP_POS = 2,
528 	FW_PHY_CFG_RADIO_STEP = 0x3 << FW_PHY_CFG_RADIO_STEP_POS,
529 	FW_PHY_CFG_RADIO_DASH_POS = 4,
530 	FW_PHY_CFG_RADIO_DASH = 0x3 << FW_PHY_CFG_RADIO_DASH_POS,
531 	FW_PHY_CFG_TX_CHAIN_POS = 16,
532 	FW_PHY_CFG_TX_CHAIN = 0xf << FW_PHY_CFG_TX_CHAIN_POS,
533 	FW_PHY_CFG_RX_CHAIN_POS = 20,
534 	FW_PHY_CFG_RX_CHAIN = 0xf << FW_PHY_CFG_RX_CHAIN_POS,
535 	FW_PHY_CFG_CHAIN_SAD_POS = 23,
536 	FW_PHY_CFG_CHAIN_SAD_ENABLED = 0x1 << FW_PHY_CFG_CHAIN_SAD_POS,
537 	FW_PHY_CFG_CHAIN_SAD_ANT_A = 0x2 << FW_PHY_CFG_CHAIN_SAD_POS,
538 	FW_PHY_CFG_CHAIN_SAD_ANT_B = 0x4 << FW_PHY_CFG_CHAIN_SAD_POS,
539 	FW_PHY_CFG_SHARED_CLK = BIT(31),
540 };
541 
542 enum iwl_fw_dbg_reg_operator {
543 	CSR_ASSIGN,
544 	CSR_SETBIT,
545 	CSR_CLEARBIT,
546 
547 	PRPH_ASSIGN,
548 	PRPH_SETBIT,
549 	PRPH_CLEARBIT,
550 
551 	INDIRECT_ASSIGN,
552 	INDIRECT_SETBIT,
553 	INDIRECT_CLEARBIT,
554 
555 	PRPH_BLOCKBIT,
556 };
557 
558 /**
559  * struct iwl_fw_dbg_reg_op - an operation on a register
560  *
561  * @op: &enum iwl_fw_dbg_reg_operator
562  * @addr: offset of the register
563  * @val: value
564  */
565 struct iwl_fw_dbg_reg_op {
566 	u8 op;
567 	u8 reserved[3];
568 	__le32 addr;
569 	__le32 val;
570 } __packed;
571 
572 /**
573  * enum iwl_fw_dbg_monitor_mode - available monitor recording modes
574  *
575  * @SMEM_MODE: monitor stores the data in SMEM
576  * @EXTERNAL_MODE: monitor stores the data in allocated DRAM
577  * @MARBH_MODE: monitor stores the data in MARBH buffer
578  * @MIPI_MODE: monitor outputs the data through the MIPI interface
579  */
580 enum iwl_fw_dbg_monitor_mode {
581 	SMEM_MODE = 0,
582 	EXTERNAL_MODE = 1,
583 	MARBH_MODE = 2,
584 	MIPI_MODE = 3,
585 };
586 
587 /**
588  * struct iwl_fw_dbg_mem_seg_tlv - configures the debug data memory segments
589  *
590  * @data_type: the memory segment type to record
591  * @ofs: the memory segment offset
592  * @len: the memory segment length, in bytes
593  *
594  * This parses IWL_UCODE_TLV_FW_MEM_SEG
595  */
596 struct iwl_fw_dbg_mem_seg_tlv {
597 	__le32 data_type;
598 	__le32 ofs;
599 	__le32 len;
600 } __packed;
601 
602 /**
603  * struct iwl_fw_dbg_dest_tlv_v1 - configures the destination of the debug data
604  *
605  * @version: version of the TLV - currently 0
606  * @monitor_mode: &enum iwl_fw_dbg_monitor_mode
607  * @size_power: buffer size will be 2^(size_power + 11)
608  * @base_reg: addr of the base addr register (PRPH)
609  * @end_reg:  addr of the end addr register (PRPH)
610  * @write_ptr_reg: the addr of the reg of the write pointer
611  * @wrap_count: the addr of the reg of the wrap_count
612  * @base_shift: shift right of the base addr reg
613  * @end_shift: shift right of the end addr reg
614  * @reg_ops: array of registers operations
615  *
616  * This parses IWL_UCODE_TLV_FW_DBG_DEST
617  */
618 struct iwl_fw_dbg_dest_tlv_v1 {
619 	u8 version;
620 	u8 monitor_mode;
621 	u8 size_power;
622 	u8 reserved;
623 	__le32 base_reg;
624 	__le32 end_reg;
625 	__le32 write_ptr_reg;
626 	__le32 wrap_count;
627 	u8 base_shift;
628 	u8 end_shift;
629 	struct iwl_fw_dbg_reg_op reg_ops[];
630 } __packed;
631 
632 /* Mask of the register for defining the LDBG MAC2SMEM buffer SMEM size */
633 #define IWL_LDBG_M2S_BUF_SIZE_MSK	0x0fff0000
634 /* Mask of the register for defining the LDBG MAC2SMEM SMEM base address */
635 #define IWL_LDBG_M2S_BUF_BA_MSK		0x00000fff
636 /* The smem buffer chunks are in units of 256 bits */
637 #define IWL_M2S_UNIT_SIZE			0x100
638 
639 struct iwl_fw_dbg_dest_tlv {
640 	u8 version;
641 	u8 monitor_mode;
642 	u8 size_power;
643 	u8 reserved;
644 	__le32 cfg_reg;
645 	__le32 write_ptr_reg;
646 	__le32 wrap_count;
647 	u8 base_shift;
648 	u8 size_shift;
649 	struct iwl_fw_dbg_reg_op reg_ops[];
650 } __packed;
651 
652 struct iwl_fw_dbg_conf_hcmd {
653 	u8 id;
654 	u8 reserved;
655 	__le16 len;
656 	u8 data[];
657 } __packed;
658 
659 /**
660  * enum iwl_fw_dbg_trigger_mode - triggers functionalities
661  *
662  * @IWL_FW_DBG_TRIGGER_START: when trigger occurs re-conf the dbg mechanism
663  * @IWL_FW_DBG_TRIGGER_STOP: when trigger occurs pull the dbg data
664  * @IWL_FW_DBG_TRIGGER_MONITOR_ONLY: when trigger occurs trigger is set to
665  *	collect only monitor data
666  */
667 enum iwl_fw_dbg_trigger_mode {
668 	IWL_FW_DBG_TRIGGER_START = BIT(0),
669 	IWL_FW_DBG_TRIGGER_STOP = BIT(1),
670 	IWL_FW_DBG_TRIGGER_MONITOR_ONLY = BIT(2),
671 };
672 
673 /**
674  * enum iwl_fw_dbg_trigger_flags - the flags supported by wrt triggers
675  * @IWL_FW_DBG_FORCE_RESTART: force a firmware restart
676  */
677 enum iwl_fw_dbg_trigger_flags {
678 	IWL_FW_DBG_FORCE_RESTART = BIT(0),
679 };
680 
681 /**
682  * enum iwl_fw_dbg_trigger_vif_type - define the VIF type for a trigger
683  * @IWL_FW_DBG_CONF_VIF_ANY: any vif type
684  * @IWL_FW_DBG_CONF_VIF_IBSS: IBSS mode
685  * @IWL_FW_DBG_CONF_VIF_STATION: BSS mode
686  * @IWL_FW_DBG_CONF_VIF_AP: AP mode
687  * @IWL_FW_DBG_CONF_VIF_P2P_CLIENT: P2P Client mode
688  * @IWL_FW_DBG_CONF_VIF_P2P_GO: P2P GO mode
689  * @IWL_FW_DBG_CONF_VIF_P2P_DEVICE: P2P device
690  */
691 enum iwl_fw_dbg_trigger_vif_type {
692 	IWL_FW_DBG_CONF_VIF_ANY = NL80211_IFTYPE_UNSPECIFIED,
693 	IWL_FW_DBG_CONF_VIF_IBSS = NL80211_IFTYPE_ADHOC,
694 	IWL_FW_DBG_CONF_VIF_STATION = NL80211_IFTYPE_STATION,
695 	IWL_FW_DBG_CONF_VIF_AP = NL80211_IFTYPE_AP,
696 	IWL_FW_DBG_CONF_VIF_P2P_CLIENT = NL80211_IFTYPE_P2P_CLIENT,
697 	IWL_FW_DBG_CONF_VIF_P2P_GO = NL80211_IFTYPE_P2P_GO,
698 	IWL_FW_DBG_CONF_VIF_P2P_DEVICE = NL80211_IFTYPE_P2P_DEVICE,
699 };
700 
701 /**
702  * struct iwl_fw_dbg_trigger_tlv - a TLV that describes the trigger
703  * @id: &enum iwl_fw_dbg_trigger
704  * @vif_type: &enum iwl_fw_dbg_trigger_vif_type
705  * @stop_conf_ids: bitmap of configurations this trigger relates to.
706  *	if the mode is %IWL_FW_DBG_TRIGGER_STOP, then if the bit corresponding
707  *	to the currently running configuration is set, the data should be
708  *	collected.
709  * @stop_delay: how many milliseconds to wait before collecting the data
710  *	after the STOP trigger fires.
711  * @mode: &enum iwl_fw_dbg_trigger_mode - can be stop / start of both
712  * @start_conf_id: if mode is %IWL_FW_DBG_TRIGGER_START, this defines what
713  *	configuration should be applied when the triggers kicks in.
714  * @occurrences: number of occurrences. 0 means the trigger will never fire.
715  * @trig_dis_ms: the time, in milliseconds, after an occurrence of this
716  *	trigger in which another occurrence should be ignored.
717  * @flags: &enum iwl_fw_dbg_trigger_flags
718  */
719 struct iwl_fw_dbg_trigger_tlv {
720 	__le32 id;
721 	__le32 vif_type;
722 	__le32 stop_conf_ids;
723 	__le32 stop_delay;
724 	u8 mode;
725 	u8 start_conf_id;
726 	__le16 occurrences;
727 	__le16 trig_dis_ms;
728 	u8 flags;
729 	u8 reserved[5];
730 
731 	u8 data[];
732 } __packed;
733 
734 #define FW_DBG_START_FROM_ALIVE	0
735 #define FW_DBG_CONF_MAX		32
736 #define FW_DBG_INVALID		0xff
737 
738 /**
739  * struct iwl_fw_dbg_trigger_missed_bcon - configures trigger for missed beacons
740  * @stop_consec_missed_bcon: stop recording if threshold is crossed.
741  * @stop_consec_missed_bcon_since_rx: stop recording if threshold is crossed.
742  * @start_consec_missed_bcon: start recording if threshold is crossed.
743  * @start_consec_missed_bcon_since_rx: start recording if threshold is crossed.
744  * @reserved1: reserved
745  * @reserved2: reserved
746  */
747 struct iwl_fw_dbg_trigger_missed_bcon {
748 	__le32 stop_consec_missed_bcon;
749 	__le32 stop_consec_missed_bcon_since_rx;
750 	__le32 reserved2[2];
751 	__le32 start_consec_missed_bcon;
752 	__le32 start_consec_missed_bcon_since_rx;
753 	__le32 reserved1[2];
754 } __packed;
755 
756 /**
757  * struct iwl_fw_dbg_trigger_cmd - configures trigger for messages from FW.
758  * cmds: the list of commands to trigger the collection on
759  */
760 struct iwl_fw_dbg_trigger_cmd {
761 	struct cmd {
762 		u8 cmd_id;
763 		u8 group_id;
764 	} __packed cmds[16];
765 } __packed;
766 
767 /**
768  * iwl_fw_dbg_trigger_stats - configures trigger for statistics
769  * @stop_offset: the offset of the value to be monitored
770  * @stop_threshold: the threshold above which to collect
771  * @start_offset: the offset of the value to be monitored
772  * @start_threshold: the threshold above which to start recording
773  */
774 struct iwl_fw_dbg_trigger_stats {
775 	__le32 stop_offset;
776 	__le32 stop_threshold;
777 	__le32 start_offset;
778 	__le32 start_threshold;
779 } __packed;
780 
781 /**
782  * struct iwl_fw_dbg_trigger_low_rssi - trigger for low beacon RSSI
783  * @rssi: RSSI value to trigger at
784  */
785 struct iwl_fw_dbg_trigger_low_rssi {
786 	__le32 rssi;
787 } __packed;
788 
789 /**
790  * struct iwl_fw_dbg_trigger_mlme - configures trigger for mlme events
791  * @stop_auth_denied: number of denied authentication to collect
792  * @stop_auth_timeout: number of authentication timeout to collect
793  * @stop_rx_deauth: number of Rx deauth before to collect
794  * @stop_tx_deauth: number of Tx deauth before to collect
795  * @stop_assoc_denied: number of denied association to collect
796  * @stop_assoc_timeout: number of association timeout to collect
797  * @stop_connection_loss: number of connection loss to collect
798  * @start_auth_denied: number of denied authentication to start recording
799  * @start_auth_timeout: number of authentication timeout to start recording
800  * @start_rx_deauth: number of Rx deauth to start recording
801  * @start_tx_deauth: number of Tx deauth to start recording
802  * @start_assoc_denied: number of denied association to start recording
803  * @start_assoc_timeout: number of association timeout to start recording
804  * @start_connection_loss: number of connection loss to start recording
805  */
806 struct iwl_fw_dbg_trigger_mlme {
807 	u8 stop_auth_denied;
808 	u8 stop_auth_timeout;
809 	u8 stop_rx_deauth;
810 	u8 stop_tx_deauth;
811 
812 	u8 stop_assoc_denied;
813 	u8 stop_assoc_timeout;
814 	u8 stop_connection_loss;
815 	u8 reserved;
816 
817 	u8 start_auth_denied;
818 	u8 start_auth_timeout;
819 	u8 start_rx_deauth;
820 	u8 start_tx_deauth;
821 
822 	u8 start_assoc_denied;
823 	u8 start_assoc_timeout;
824 	u8 start_connection_loss;
825 	u8 reserved2;
826 } __packed;
827 
828 /**
829  * struct iwl_fw_dbg_trigger_txq_timer - configures the Tx queue's timer
830  * @command_queue: timeout for the command queue in ms
831  * @bss: timeout for the queues of a BSS (except for TDLS queues) in ms
832  * @softap: timeout for the queues of a softAP in ms
833  * @p2p_go: timeout for the queues of a P2P GO in ms
834  * @p2p_client: timeout for the queues of a P2P client in ms
835  * @p2p_device: timeout for the queues of a P2P device in ms
836  * @ibss: timeout for the queues of an IBSS in ms
837  * @tdls: timeout for the queues of a TDLS station in ms
838  */
839 struct iwl_fw_dbg_trigger_txq_timer {
840 	__le32 command_queue;
841 	__le32 bss;
842 	__le32 softap;
843 	__le32 p2p_go;
844 	__le32 p2p_client;
845 	__le32 p2p_device;
846 	__le32 ibss;
847 	__le32 tdls;
848 	__le32 reserved[4];
849 } __packed;
850 
851 /**
852  * struct iwl_fw_dbg_trigger_time_event - configures a time event trigger
853  * time_Events: a list of tuples <id, action_bitmap>. The driver will issue a
854  *	trigger each time a time event notification that relates to time event
855  *	id with one of the actions in the bitmap is received and
856  *	BIT(notif->status) is set in status_bitmap.
857  *
858  */
859 struct iwl_fw_dbg_trigger_time_event {
860 	struct {
861 		__le32 id;
862 		__le32 action_bitmap;
863 		__le32 status_bitmap;
864 	} __packed time_events[16];
865 } __packed;
866 
867 /**
868  * struct iwl_fw_dbg_trigger_ba - configures BlockAck related trigger
869  * rx_ba_start: tid bitmap to configure on what tid the trigger should occur
870  *	when an Rx BlockAck session is started.
871  * rx_ba_stop: tid bitmap to configure on what tid the trigger should occur
872  *	when an Rx BlockAck session is stopped.
873  * tx_ba_start: tid bitmap to configure on what tid the trigger should occur
874  *	when a Tx BlockAck session is started.
875  * tx_ba_stop: tid bitmap to configure on what tid the trigger should occur
876  *	when a Tx BlockAck session is stopped.
877  * rx_bar: tid bitmap to configure on what tid the trigger should occur
878  *	when a BAR is received (for a Tx BlockAck session).
879  * tx_bar: tid bitmap to configure on what tid the trigger should occur
880  *	when a BAR is send (for an Rx BlocAck session).
881  * frame_timeout: tid bitmap to configure on what tid the trigger should occur
882  *	when a frame times out in the reordering buffer.
883  */
884 struct iwl_fw_dbg_trigger_ba {
885 	__le16 rx_ba_start;
886 	__le16 rx_ba_stop;
887 	__le16 tx_ba_start;
888 	__le16 tx_ba_stop;
889 	__le16 rx_bar;
890 	__le16 tx_bar;
891 	__le16 frame_timeout;
892 } __packed;
893 
894 /**
895  * struct iwl_fw_dbg_trigger_tdls - configures trigger for TDLS events.
896  * @action_bitmap: the TDLS action to trigger the collection upon
897  * @peer_mode: trigger on specific peer or all
898  * @peer: the TDLS peer to trigger the collection on
899  */
900 struct iwl_fw_dbg_trigger_tdls {
901 	u8 action_bitmap;
902 	u8 peer_mode;
903 	u8 peer[ETH_ALEN];
904 	u8 reserved[4];
905 } __packed;
906 
907 /**
908  * struct iwl_fw_dbg_trigger_tx_status - configures trigger for tx response
909  *  status.
910  * @statuses: the list of statuses to trigger the collection on
911  */
912 struct iwl_fw_dbg_trigger_tx_status {
913 	struct tx_status {
914 		u8 status;
915 		u8 reserved[3];
916 	} __packed statuses[16];
917 	__le32 reserved[2];
918 } __packed;
919 
920 /**
921  * struct iwl_fw_dbg_conf_tlv - a TLV that describes a debug configuration.
922  * @id: conf id
923  * @usniffer: should the uSniffer image be used
924  * @num_of_hcmds: how many HCMDs to send are present here
925  * @hcmd: a variable length host command to be sent to apply the configuration.
926  *	If there is more than one HCMD to send, they will appear one after the
927  *	other and be sent in the order that they appear in.
928  * This parses IWL_UCODE_TLV_FW_DBG_CONF. The user can add up-to
929  * %FW_DBG_CONF_MAX configuration per run.
930  */
931 struct iwl_fw_dbg_conf_tlv {
932 	u8 id;
933 	u8 usniffer;
934 	u8 reserved;
935 	u8 num_of_hcmds;
936 	struct iwl_fw_dbg_conf_hcmd hcmd;
937 } __packed;
938 
939 #define IWL_FW_CMD_VER_UNKNOWN 99
940 
941 /**
942  * struct iwl_fw_cmd_version - firmware command version entry
943  * @cmd: command ID
944  * @group: group ID
945  * @cmd_ver: command version
946  * @notif_ver: notification version
947  */
948 struct iwl_fw_cmd_version {
949 	u8 cmd;
950 	u8 group;
951 	u8 cmd_ver;
952 	u8 notif_ver;
953 } __packed;
954 
955 struct iwl_fw_tcm_error_addr {
956 	__le32 addr;
957 }; /* FW_TLV_TCM_ERROR_INFO_ADDRS_S */
958 
959 struct iwl_fw_dump_exclude {
960 	__le32 addr, size;
961 };
962 
963 static inline size_t _iwl_tlv_array_len(const struct iwl_ucode_tlv *tlv,
964 					size_t fixed_size, size_t var_size)
965 {
966 	size_t var_len = le32_to_cpu(tlv->length) - fixed_size;
967 
968 	if (WARN_ON(var_len % var_size))
969 		return 0;
970 
971 	return var_len / var_size;
972 }
973 
974 #define iwl_tlv_array_len(_tlv_ptr, _struct_ptr, _memb)			\
975 	_iwl_tlv_array_len((_tlv_ptr), sizeof(*(_struct_ptr)),		\
976 			   sizeof(_struct_ptr->_memb[0]))
977 
978 #define iwl_tlv_array_len_with_size(_tlv_ptr, _struct_ptr, _size)	\
979 	_iwl_tlv_array_len((_tlv_ptr), sizeof(*(_struct_ptr)), _size)
980 #endif  /* __iwl_fw_file_h__ */
981