1 /****************************************************************************** 2 * 3 * This file is provided under a dual BSD/GPLv2 license. When using or 4 * redistributing this file, you may do so under either license. 5 * 6 * GPL LICENSE SUMMARY 7 * 8 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. 9 * Copyright(c) 2017 Intel Deutschland GmbH 10 * Copyright(c) 2018 Intel Corporation 11 * 12 * This program is free software; you can redistribute it and/or modify 13 * it under the terms of version 2 of the GNU General Public License as 14 * published by the Free Software Foundation. 15 * 16 * This program is distributed in the hope that it will be useful, but 17 * WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 19 * General Public License for more details. 20 * 21 * The full GNU General Public License is included in this distribution 22 * in the file called COPYING. 23 * 24 * Contact Information: 25 * Intel Linux Wireless <linuxwifi@intel.com> 26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 27 * 28 * BSD LICENSE 29 * 30 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. 31 * Copyright(c) 2017 Intel Deutschland GmbH 32 * Copyright(c) 2018 Intel Corporation 33 * All rights reserved. 34 * 35 * Redistribution and use in source and binary forms, with or without 36 * modification, are permitted provided that the following conditions 37 * are met: 38 * 39 * * Redistributions of source code must retain the above copyright 40 * notice, this list of conditions and the following disclaimer. 41 * * Redistributions in binary form must reproduce the above copyright 42 * notice, this list of conditions and the following disclaimer in 43 * the documentation and/or other materials provided with the 44 * distribution. 45 * * Neither the name Intel Corporation nor the names of its 46 * contributors may be used to endorse or promote products derived 47 * from this software without specific prior written permission. 48 * 49 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 50 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 51 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 52 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 53 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 54 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 55 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 56 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 57 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 58 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 59 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 60 *****************************************************************************/ 61 62 #ifndef __iwl_fw_api_rs_h__ 63 #define __iwl_fw_api_rs_h__ 64 65 #include "mac.h" 66 67 /** 68 * enum iwl_tlc_mng_cfg_flags_enum - options for TLC config flags 69 * @IWL_TLC_MNG_CFG_FLAGS_STBC_MSK: enable STBC 70 * @IWL_TLC_MNG_CFG_FLAGS_LDPC_MSK: enable LDPC 71 */ 72 enum iwl_tlc_mng_cfg_flags { 73 IWL_TLC_MNG_CFG_FLAGS_STBC_MSK = BIT(0), 74 IWL_TLC_MNG_CFG_FLAGS_LDPC_MSK = BIT(1), 75 }; 76 77 /** 78 * enum iwl_tlc_mng_cfg_cw - channel width options 79 * @IWL_TLC_MNG_CH_WIDTH_20MHZ: 20MHZ channel 80 * @IWL_TLC_MNG_CH_WIDTH_40MHZ: 40MHZ channel 81 * @IWL_TLC_MNG_CH_WIDTH_80MHZ: 80MHZ channel 82 * @IWL_TLC_MNG_CH_WIDTH_160MHZ: 160MHZ channel 83 * @IWL_TLC_MNG_CH_WIDTH_LAST: maximum value 84 */ 85 enum iwl_tlc_mng_cfg_cw { 86 IWL_TLC_MNG_CH_WIDTH_20MHZ, 87 IWL_TLC_MNG_CH_WIDTH_40MHZ, 88 IWL_TLC_MNG_CH_WIDTH_80MHZ, 89 IWL_TLC_MNG_CH_WIDTH_160MHZ, 90 IWL_TLC_MNG_CH_WIDTH_LAST = IWL_TLC_MNG_CH_WIDTH_160MHZ, 91 }; 92 93 /** 94 * enum iwl_tlc_mng_cfg_chains - possible chains 95 * @IWL_TLC_MNG_CHAIN_A_MSK: chain A 96 * @IWL_TLC_MNG_CHAIN_B_MSK: chain B 97 */ 98 enum iwl_tlc_mng_cfg_chains { 99 IWL_TLC_MNG_CHAIN_A_MSK = BIT(0), 100 IWL_TLC_MNG_CHAIN_B_MSK = BIT(1), 101 }; 102 103 /** 104 * enum iwl_tlc_mng_cfg_mode - supported modes 105 * @IWL_TLC_MNG_MODE_CCK: enable CCK 106 * @IWL_TLC_MNG_MODE_OFDM_NON_HT: enable OFDM (non HT) 107 * @IWL_TLC_MNG_MODE_NON_HT: enable non HT 108 * @IWL_TLC_MNG_MODE_HT: enable HT 109 * @IWL_TLC_MNG_MODE_VHT: enable VHT 110 * @IWL_TLC_MNG_MODE_HE: enable HE 111 * @IWL_TLC_MNG_MODE_INVALID: invalid value 112 * @IWL_TLC_MNG_MODE_NUM: a count of possible modes 113 */ 114 enum iwl_tlc_mng_cfg_mode { 115 IWL_TLC_MNG_MODE_CCK = 0, 116 IWL_TLC_MNG_MODE_OFDM_NON_HT = IWL_TLC_MNG_MODE_CCK, 117 IWL_TLC_MNG_MODE_NON_HT = IWL_TLC_MNG_MODE_CCK, 118 IWL_TLC_MNG_MODE_HT, 119 IWL_TLC_MNG_MODE_VHT, 120 IWL_TLC_MNG_MODE_HE, 121 IWL_TLC_MNG_MODE_INVALID, 122 IWL_TLC_MNG_MODE_NUM = IWL_TLC_MNG_MODE_INVALID, 123 }; 124 125 /** 126 * enum iwl_tlc_mng_ht_rates - HT/VHT/HE rates 127 * @IWL_TLC_MNG_HT_RATE_MCS0: index of MCS0 128 * @IWL_TLC_MNG_HT_RATE_MCS1: index of MCS1 129 * @IWL_TLC_MNG_HT_RATE_MCS2: index of MCS2 130 * @IWL_TLC_MNG_HT_RATE_MCS3: index of MCS3 131 * @IWL_TLC_MNG_HT_RATE_MCS4: index of MCS4 132 * @IWL_TLC_MNG_HT_RATE_MCS5: index of MCS5 133 * @IWL_TLC_MNG_HT_RATE_MCS6: index of MCS6 134 * @IWL_TLC_MNG_HT_RATE_MCS7: index of MCS7 135 * @IWL_TLC_MNG_HT_RATE_MCS8: index of MCS8 136 * @IWL_TLC_MNG_HT_RATE_MCS9: index of MCS9 137 * @IWL_TLC_MNG_HT_RATE_MCS10: index of MCS10 138 * @IWL_TLC_MNG_HT_RATE_MCS11: index of MCS11 139 * @IWL_TLC_MNG_HT_RATE_MAX: maximal rate for HT/VHT 140 */ 141 enum iwl_tlc_mng_ht_rates { 142 IWL_TLC_MNG_HT_RATE_MCS0 = 0, 143 IWL_TLC_MNG_HT_RATE_MCS1, 144 IWL_TLC_MNG_HT_RATE_MCS2, 145 IWL_TLC_MNG_HT_RATE_MCS3, 146 IWL_TLC_MNG_HT_RATE_MCS4, 147 IWL_TLC_MNG_HT_RATE_MCS5, 148 IWL_TLC_MNG_HT_RATE_MCS6, 149 IWL_TLC_MNG_HT_RATE_MCS7, 150 IWL_TLC_MNG_HT_RATE_MCS8, 151 IWL_TLC_MNG_HT_RATE_MCS9, 152 IWL_TLC_MNG_HT_RATE_MCS10, 153 IWL_TLC_MNG_HT_RATE_MCS11, 154 IWL_TLC_MNG_HT_RATE_MAX = IWL_TLC_MNG_HT_RATE_MCS11, 155 }; 156 157 /* Maximum supported tx antennas number */ 158 #define MAX_NSS 2 159 160 /** 161 * struct tlc_config_cmd - TLC configuration 162 * @sta_id: station id 163 * @reserved1: reserved 164 * @max_ch_width: max supported channel width from @enum iwl_tlc_mng_cfg_cw 165 * @mode: &enum iwl_tlc_mng_cfg_mode 166 * @chains: bitmask of &enum iwl_tlc_mng_cfg_chains 167 * @amsdu: TX amsdu is supported 168 * @flags: bitmask of &enum iwl_tlc_mng_cfg_flags 169 * @non_ht_rates: bitmap of supported legacy rates 170 * @ht_rates: bitmap of &enum iwl_tlc_mng_ht_rates, per <nss, channel-width> 171 * pair (0 - 80mhz width and below, 1 - 160mhz). 172 * @max_mpdu_len: max MPDU length, in bytes 173 * @sgi_ch_width_supp: bitmap of SGI support per channel width 174 * use BIT(@enum iwl_tlc_mng_cfg_cw) 175 * @reserved2: reserved 176 */ 177 struct iwl_tlc_config_cmd { 178 u8 sta_id; 179 u8 reserved1[3]; 180 u8 max_ch_width; 181 u8 mode; 182 u8 chains; 183 u8 amsdu; 184 __le16 flags; 185 __le16 non_ht_rates; 186 __le16 ht_rates[MAX_NSS][2]; 187 __le16 max_mpdu_len; 188 u8 sgi_ch_width_supp; 189 u8 reserved2[1]; 190 } __packed; /* TLC_MNG_CONFIG_CMD_API_S_VER_2 */ 191 192 /** 193 * enum iwl_tlc_update_flags - updated fields 194 * @IWL_TLC_NOTIF_FLAG_RATE: last initial rate update 195 * @IWL_TLC_NOTIF_FLAG_AMSDU: umsdu parameters update 196 */ 197 enum iwl_tlc_update_flags { 198 IWL_TLC_NOTIF_FLAG_RATE = BIT(0), 199 IWL_TLC_NOTIF_FLAG_AMSDU = BIT(1), 200 }; 201 202 /** 203 * struct iwl_tlc_update_notif - TLC notification from FW 204 * @sta_id: station id 205 * @reserved: reserved 206 * @flags: bitmap of notifications reported 207 * @rate: current initial rate 208 * @amsdu_size: Max AMSDU size, in bytes 209 * @amsdu_enabled: bitmap for per-TID AMSDU enablement 210 */ 211 struct iwl_tlc_update_notif { 212 u8 sta_id; 213 u8 reserved[3]; 214 __le32 flags; 215 __le32 rate; 216 __le32 amsdu_size; 217 __le32 amsdu_enabled; 218 } __packed; /* TLC_MNG_UPDATE_NTFY_API_S_VER_2 */ 219 220 /** 221 * enum iwl_tlc_debug_flags - debug options 222 * @IWL_TLC_DEBUG_FIXED_RATE: set fixed rate for rate scaling 223 * @IWL_TLC_DEBUG_STATS_TH: threshold for sending statistics to the driver, in 224 * frames 225 * @IWL_TLC_DEBUG_STATS_TIME_TH: threshold for sending statistics to the 226 * driver, in msec 227 * @IWL_TLC_DEBUG_AGG_TIME_LIM: time limit for a BA session 228 * @IWL_TLC_DEBUG_AGG_DIS_START_TH: frame with try-count greater than this 229 * threshold should not start an aggregation session 230 * @IWL_TLC_DEBUG_AGG_FRAME_CNT_LIM: set max number of frames in an aggregation 231 * @IWL_TLC_DEBUG_RENEW_ADDBA_DELAY: delay between retries of ADD BA 232 * @IWL_TLC_DEBUG_START_AC_RATE_IDX: frames per second to start a BA session 233 * @IWL_TLC_DEBUG_NO_FAR_RANGE_TWEAK: disable BW scaling 234 */ 235 enum iwl_tlc_debug_flags { 236 IWL_TLC_DEBUG_FIXED_RATE, 237 IWL_TLC_DEBUG_STATS_TH, 238 IWL_TLC_DEBUG_STATS_TIME_TH, 239 IWL_TLC_DEBUG_AGG_TIME_LIM, 240 IWL_TLC_DEBUG_AGG_DIS_START_TH, 241 IWL_TLC_DEBUG_AGG_FRAME_CNT_LIM, 242 IWL_TLC_DEBUG_RENEW_ADDBA_DELAY, 243 IWL_TLC_DEBUG_START_AC_RATE_IDX, 244 IWL_TLC_DEBUG_NO_FAR_RANGE_TWEAK, 245 }; /* TLC_MNG_DEBUG_FLAGS_API_E_VER_1 */ 246 247 /** 248 * struct iwl_dhc_tlc_dbg - fixed debug config 249 * @sta_id: bit 0 - enable/disable, bits 1 - 7 hold station id 250 * @reserved1: reserved 251 * @flags: bitmap of %IWL_TLC_DEBUG_\* 252 * @fixed_rate: rate value 253 * @stats_threshold: if number of tx-ed frames is greater, send statistics 254 * @time_threshold: statistics threshold in usec 255 * @agg_time_lim: max agg time 256 * @agg_dis_start_threshold: frames with try-cont greater than this count will 257 * not be aggregated 258 * @agg_frame_count_lim: agg size 259 * @addba_retry_delay: delay between retries of ADD BA 260 * @start_ac_rate_idx: frames per second to start a BA session 261 * @no_far_range_tweak: disable BW scaling 262 * @reserved2: reserved 263 */ 264 struct iwl_dhc_tlc_cmd { 265 u8 sta_id; 266 u8 reserved1[3]; 267 __le32 flags; 268 __le32 fixed_rate; 269 __le16 stats_threshold; 270 __le16 time_threshold; 271 __le16 agg_time_lim; 272 __le16 agg_dis_start_threshold; 273 __le16 agg_frame_count_lim; 274 __le16 addba_retry_delay; 275 u8 start_ac_rate_idx[IEEE80211_NUM_ACS]; 276 u8 no_far_range_tweak; 277 u8 reserved2[3]; 278 } __packed; 279 280 /* 281 * These serve as indexes into 282 * struct iwl_rate_info fw_rate_idx_to_plcp[IWL_RATE_COUNT]; 283 * TODO: avoid overlap between legacy and HT rates 284 */ 285 enum { 286 IWL_RATE_1M_INDEX = 0, 287 IWL_FIRST_CCK_RATE = IWL_RATE_1M_INDEX, 288 IWL_RATE_2M_INDEX, 289 IWL_RATE_5M_INDEX, 290 IWL_RATE_11M_INDEX, 291 IWL_LAST_CCK_RATE = IWL_RATE_11M_INDEX, 292 IWL_RATE_6M_INDEX, 293 IWL_FIRST_OFDM_RATE = IWL_RATE_6M_INDEX, 294 IWL_RATE_MCS_0_INDEX = IWL_RATE_6M_INDEX, 295 IWL_FIRST_HT_RATE = IWL_RATE_MCS_0_INDEX, 296 IWL_FIRST_VHT_RATE = IWL_RATE_MCS_0_INDEX, 297 IWL_RATE_9M_INDEX, 298 IWL_RATE_12M_INDEX, 299 IWL_RATE_MCS_1_INDEX = IWL_RATE_12M_INDEX, 300 IWL_RATE_18M_INDEX, 301 IWL_RATE_MCS_2_INDEX = IWL_RATE_18M_INDEX, 302 IWL_RATE_24M_INDEX, 303 IWL_RATE_MCS_3_INDEX = IWL_RATE_24M_INDEX, 304 IWL_RATE_36M_INDEX, 305 IWL_RATE_MCS_4_INDEX = IWL_RATE_36M_INDEX, 306 IWL_RATE_48M_INDEX, 307 IWL_RATE_MCS_5_INDEX = IWL_RATE_48M_INDEX, 308 IWL_RATE_54M_INDEX, 309 IWL_RATE_MCS_6_INDEX = IWL_RATE_54M_INDEX, 310 IWL_LAST_NON_HT_RATE = IWL_RATE_54M_INDEX, 311 IWL_RATE_60M_INDEX, 312 IWL_RATE_MCS_7_INDEX = IWL_RATE_60M_INDEX, 313 IWL_LAST_HT_RATE = IWL_RATE_MCS_7_INDEX, 314 IWL_RATE_MCS_8_INDEX, 315 IWL_RATE_MCS_9_INDEX, 316 IWL_LAST_VHT_RATE = IWL_RATE_MCS_9_INDEX, 317 IWL_RATE_MCS_10_INDEX, 318 IWL_RATE_MCS_11_INDEX, 319 IWL_LAST_HE_RATE = IWL_RATE_MCS_11_INDEX, 320 IWL_RATE_COUNT_LEGACY = IWL_LAST_NON_HT_RATE + 1, 321 IWL_RATE_COUNT = IWL_LAST_HE_RATE + 1, 322 }; 323 324 #define IWL_RATE_BIT_MSK(r) BIT(IWL_RATE_##r##M_INDEX) 325 326 /* fw API values for legacy bit rates, both OFDM and CCK */ 327 enum { 328 IWL_RATE_6M_PLCP = 13, 329 IWL_RATE_9M_PLCP = 15, 330 IWL_RATE_12M_PLCP = 5, 331 IWL_RATE_18M_PLCP = 7, 332 IWL_RATE_24M_PLCP = 9, 333 IWL_RATE_36M_PLCP = 11, 334 IWL_RATE_48M_PLCP = 1, 335 IWL_RATE_54M_PLCP = 3, 336 IWL_RATE_1M_PLCP = 10, 337 IWL_RATE_2M_PLCP = 20, 338 IWL_RATE_5M_PLCP = 55, 339 IWL_RATE_11M_PLCP = 110, 340 IWL_RATE_INVM_PLCP = -1, 341 }; 342 343 /* 344 * rate_n_flags bit fields 345 * 346 * The 32-bit value has different layouts in the low 8 bites depending on the 347 * format. There are three formats, HT, VHT and legacy (11abg, with subformats 348 * for CCK and OFDM). 349 * 350 * High-throughput (HT) rate format 351 * bit 8 is 1, bit 26 is 0, bit 9 is 0 (OFDM) 352 * Very High-throughput (VHT) rate format 353 * bit 8 is 0, bit 26 is 1, bit 9 is 0 (OFDM) 354 * Legacy OFDM rate format for bits 7:0 355 * bit 8 is 0, bit 26 is 0, bit 9 is 0 (OFDM) 356 * Legacy CCK rate format for bits 7:0: 357 * bit 8 is 0, bit 26 is 0, bit 9 is 1 (CCK) 358 */ 359 360 /* Bit 8: (1) HT format, (0) legacy or VHT format */ 361 #define RATE_MCS_HT_POS 8 362 #define RATE_MCS_HT_MSK (1 << RATE_MCS_HT_POS) 363 364 /* Bit 9: (1) CCK, (0) OFDM. HT (bit 8) must be "0" for this bit to be valid */ 365 #define RATE_MCS_CCK_POS 9 366 #define RATE_MCS_CCK_MSK (1 << RATE_MCS_CCK_POS) 367 368 /* Bit 26: (1) VHT format, (0) legacy format in bits 8:0 */ 369 #define RATE_MCS_VHT_POS 26 370 #define RATE_MCS_VHT_MSK (1 << RATE_MCS_VHT_POS) 371 372 373 /* 374 * High-throughput (HT) rate format for bits 7:0 375 * 376 * 2-0: MCS rate base 377 * 0) 6 Mbps 378 * 1) 12 Mbps 379 * 2) 18 Mbps 380 * 3) 24 Mbps 381 * 4) 36 Mbps 382 * 5) 48 Mbps 383 * 6) 54 Mbps 384 * 7) 60 Mbps 385 * 4-3: 0) Single stream (SISO) 386 * 1) Dual stream (MIMO) 387 * 2) Triple stream (MIMO) 388 * 5: Value of 0x20 in bits 7:0 indicates 6 Mbps HT40 duplicate data 389 * (bits 7-6 are zero) 390 * 391 * Together the low 5 bits work out to the MCS index because we don't 392 * support MCSes above 15/23, and 0-7 have one stream, 8-15 have two 393 * streams and 16-23 have three streams. We could also support MCS 32 394 * which is the duplicate 20 MHz MCS (bit 5 set, all others zero.) 395 */ 396 #define RATE_HT_MCS_RATE_CODE_MSK 0x7 397 #define RATE_HT_MCS_NSS_POS 3 398 #define RATE_HT_MCS_NSS_MSK (3 << RATE_HT_MCS_NSS_POS) 399 400 /* Bit 10: (1) Use Green Field preamble */ 401 #define RATE_HT_MCS_GF_POS 10 402 #define RATE_HT_MCS_GF_MSK (1 << RATE_HT_MCS_GF_POS) 403 404 #define RATE_HT_MCS_INDEX_MSK 0x3f 405 406 /* 407 * Very High-throughput (VHT) rate format for bits 7:0 408 * 409 * 3-0: VHT MCS (0-9) 410 * 5-4: number of streams - 1: 411 * 0) Single stream (SISO) 412 * 1) Dual stream (MIMO) 413 * 2) Triple stream (MIMO) 414 */ 415 416 /* Bit 4-5: (0) SISO, (1) MIMO2 (2) MIMO3 */ 417 #define RATE_VHT_MCS_RATE_CODE_MSK 0xf 418 #define RATE_VHT_MCS_NSS_POS 4 419 #define RATE_VHT_MCS_NSS_MSK (3 << RATE_VHT_MCS_NSS_POS) 420 421 /* 422 * Legacy OFDM rate format for bits 7:0 423 * 424 * 3-0: 0xD) 6 Mbps 425 * 0xF) 9 Mbps 426 * 0x5) 12 Mbps 427 * 0x7) 18 Mbps 428 * 0x9) 24 Mbps 429 * 0xB) 36 Mbps 430 * 0x1) 48 Mbps 431 * 0x3) 54 Mbps 432 * (bits 7-4 are 0) 433 * 434 * Legacy CCK rate format for bits 7:0: 435 * bit 8 is 0, bit 26 is 0, bit 9 is 1 (CCK): 436 * 437 * 6-0: 10) 1 Mbps 438 * 20) 2 Mbps 439 * 55) 5.5 Mbps 440 * 110) 11 Mbps 441 * (bit 7 is 0) 442 */ 443 #define RATE_LEGACY_RATE_MSK 0xff 444 445 /* Bit 10 - OFDM HE */ 446 #define RATE_MCS_HE_POS 10 447 #define RATE_MCS_HE_MSK BIT(RATE_MCS_HE_POS) 448 449 /* 450 * Bit 11-12: (0) 20MHz, (1) 40MHz, (2) 80MHz, (3) 160MHz 451 * 0 and 1 are valid for HT and VHT, 2 and 3 only for VHT 452 */ 453 #define RATE_MCS_CHAN_WIDTH_POS 11 454 #define RATE_MCS_CHAN_WIDTH_MSK (3 << RATE_MCS_CHAN_WIDTH_POS) 455 #define RATE_MCS_CHAN_WIDTH_20 (0 << RATE_MCS_CHAN_WIDTH_POS) 456 #define RATE_MCS_CHAN_WIDTH_40 (1 << RATE_MCS_CHAN_WIDTH_POS) 457 #define RATE_MCS_CHAN_WIDTH_80 (2 << RATE_MCS_CHAN_WIDTH_POS) 458 #define RATE_MCS_CHAN_WIDTH_160 (3 << RATE_MCS_CHAN_WIDTH_POS) 459 460 /* Bit 13: (1) Short guard interval (0.4 usec), (0) normal GI (0.8 usec) */ 461 #define RATE_MCS_SGI_POS 13 462 #define RATE_MCS_SGI_MSK (1 << RATE_MCS_SGI_POS) 463 464 /* Bit 14-16: Antenna selection (1) Ant A, (2) Ant B, (4) Ant C */ 465 #define RATE_MCS_ANT_POS 14 466 #define RATE_MCS_ANT_A_MSK (1 << RATE_MCS_ANT_POS) 467 #define RATE_MCS_ANT_B_MSK (2 << RATE_MCS_ANT_POS) 468 #define RATE_MCS_ANT_C_MSK (4 << RATE_MCS_ANT_POS) 469 #define RATE_MCS_ANT_AB_MSK (RATE_MCS_ANT_A_MSK | \ 470 RATE_MCS_ANT_B_MSK) 471 #define RATE_MCS_ANT_ABC_MSK (RATE_MCS_ANT_AB_MSK | \ 472 RATE_MCS_ANT_C_MSK) 473 #define RATE_MCS_ANT_MSK RATE_MCS_ANT_ABC_MSK 474 475 /* Bit 17: (0) SS, (1) SS*2 */ 476 #define RATE_MCS_STBC_POS 17 477 #define RATE_MCS_STBC_MSK BIT(RATE_MCS_STBC_POS) 478 479 /* Bit 18: OFDM-HE dual carrier mode */ 480 #define RATE_HE_DUAL_CARRIER_MODE 18 481 #define RATE_HE_DUAL_CARRIER_MODE_MSK BIT(RATE_HE_DUAL_CARRIER_MODE) 482 483 /* Bit 19: (0) Beamforming is off, (1) Beamforming is on */ 484 #define RATE_MCS_BF_POS 19 485 #define RATE_MCS_BF_MSK (1 << RATE_MCS_BF_POS) 486 487 /* 488 * Bit 20-21: HE LTF type and guard interval 489 * HE (ext) SU: 490 * 0 1xLTF+0.8us 491 * 1 2xLTF+0.8us 492 * 2 2xLTF+1.6us 493 * 3 & SGI (bit 13) clear 4xLTF+3.2us 494 * 3 & SGI (bit 13) set 4xLTF+0.8us 495 * HE MU: 496 * 0 4xLTF+0.8us 497 * 1 2xLTF+0.8us 498 * 2 2xLTF+1.6us 499 * 3 4xLTF+3.2us 500 * HE TRIG: 501 * 0 1xLTF+1.6us 502 * 1 2xLTF+1.6us 503 * 2 4xLTF+3.2us 504 * 3 (does not occur) 505 */ 506 #define RATE_MCS_HE_GI_LTF_POS 20 507 #define RATE_MCS_HE_GI_LTF_MSK (3 << RATE_MCS_HE_GI_LTF_POS) 508 509 /* Bit 22-23: HE type. (0) SU, (1) SU_EXT, (2) MU, (3) trigger based */ 510 #define RATE_MCS_HE_TYPE_POS 22 511 #define RATE_MCS_HE_TYPE_SU (0 << RATE_MCS_HE_TYPE_POS) 512 #define RATE_MCS_HE_TYPE_EXT_SU (1 << RATE_MCS_HE_TYPE_POS) 513 #define RATE_MCS_HE_TYPE_MU (2 << RATE_MCS_HE_TYPE_POS) 514 #define RATE_MCS_HE_TYPE_TRIG (3 << RATE_MCS_HE_TYPE_POS) 515 #define RATE_MCS_HE_TYPE_MSK (3 << RATE_MCS_HE_TYPE_POS) 516 517 /* Bit 24-25: (0) 20MHz (no dup), (1) 2x20MHz, (2) 4x20MHz, 3 8x20MHz */ 518 #define RATE_MCS_DUP_POS 24 519 #define RATE_MCS_DUP_MSK (3 << RATE_MCS_DUP_POS) 520 521 /* Bit 27: (1) LDPC enabled, (0) LDPC disabled */ 522 #define RATE_MCS_LDPC_POS 27 523 #define RATE_MCS_LDPC_MSK (1 << RATE_MCS_LDPC_POS) 524 525 /* Bit 28: (1) 106-tone RX (8 MHz RU), (0) normal bandwidth */ 526 #define RATE_MCS_HE_106T_POS 28 527 #define RATE_MCS_HE_106T_MSK (1 << RATE_MCS_HE_106T_POS) 528 529 /* Link Quality definitions */ 530 531 /* # entries in rate scale table to support Tx retries */ 532 #define LQ_MAX_RETRY_NUM 16 533 534 /* Link quality command flags bit fields */ 535 536 /* Bit 0: (0) Don't use RTS (1) Use RTS */ 537 #define LQ_FLAG_USE_RTS_POS 0 538 #define LQ_FLAG_USE_RTS_MSK (1 << LQ_FLAG_USE_RTS_POS) 539 540 /* Bit 1-3: LQ command color. Used to match responses to LQ commands */ 541 #define LQ_FLAG_COLOR_POS 1 542 #define LQ_FLAG_COLOR_MSK (7 << LQ_FLAG_COLOR_POS) 543 #define LQ_FLAG_COLOR_GET(_f) (((_f) & LQ_FLAG_COLOR_MSK) >>\ 544 LQ_FLAG_COLOR_POS) 545 #define LQ_FLAGS_COLOR_INC(_c) ((((_c) + 1) << LQ_FLAG_COLOR_POS) &\ 546 LQ_FLAG_COLOR_MSK) 547 #define LQ_FLAG_COLOR_SET(_f, _c) ((_c) | ((_f) & ~LQ_FLAG_COLOR_MSK)) 548 549 /* Bit 4-5: Tx RTS BW Signalling 550 * (0) No RTS BW signalling 551 * (1) Static BW signalling 552 * (2) Dynamic BW signalling 553 */ 554 #define LQ_FLAG_RTS_BW_SIG_POS 4 555 #define LQ_FLAG_RTS_BW_SIG_NONE (0 << LQ_FLAG_RTS_BW_SIG_POS) 556 #define LQ_FLAG_RTS_BW_SIG_STATIC (1 << LQ_FLAG_RTS_BW_SIG_POS) 557 #define LQ_FLAG_RTS_BW_SIG_DYNAMIC (2 << LQ_FLAG_RTS_BW_SIG_POS) 558 559 /* Bit 6: (0) No dynamic BW selection (1) Allow dynamic BW selection 560 * Dyanmic BW selection allows Tx with narrower BW then requested in rates 561 */ 562 #define LQ_FLAG_DYNAMIC_BW_POS 6 563 #define LQ_FLAG_DYNAMIC_BW_MSK (1 << LQ_FLAG_DYNAMIC_BW_POS) 564 565 /* Single Stream Tx Parameters (lq_cmd->ss_params) 566 * Flags to control a smart FW decision about whether BFER/STBC/SISO will be 567 * used for single stream Tx. 568 */ 569 570 /* Bit 0-1: Max STBC streams allowed. Can be 0-3. 571 * (0) - No STBC allowed 572 * (1) - 2x1 STBC allowed (HT/VHT) 573 * (2) - 4x2 STBC allowed (HT/VHT) 574 * (3) - 3x2 STBC allowed (HT only) 575 * All our chips are at most 2 antennas so only (1) is valid for now. 576 */ 577 #define LQ_SS_STBC_ALLOWED_POS 0 578 #define LQ_SS_STBC_ALLOWED_MSK (3 << LQ_SS_STBC_ALLOWED_MSK) 579 580 /* 2x1 STBC is allowed */ 581 #define LQ_SS_STBC_1SS_ALLOWED (1 << LQ_SS_STBC_ALLOWED_POS) 582 583 /* Bit 2: Beamformer (VHT only) is allowed */ 584 #define LQ_SS_BFER_ALLOWED_POS 2 585 #define LQ_SS_BFER_ALLOWED (1 << LQ_SS_BFER_ALLOWED_POS) 586 587 /* Bit 3: Force BFER or STBC for testing 588 * If this is set: 589 * If BFER is allowed then force the ucode to choose BFER else 590 * If STBC is allowed then force the ucode to choose STBC over SISO 591 */ 592 #define LQ_SS_FORCE_POS 3 593 #define LQ_SS_FORCE (1 << LQ_SS_FORCE_POS) 594 595 /* Bit 31: ss_params field is valid. Used for FW backward compatibility 596 * with other drivers which don't support the ss_params API yet 597 */ 598 #define LQ_SS_PARAMS_VALID_POS 31 599 #define LQ_SS_PARAMS_VALID (1 << LQ_SS_PARAMS_VALID_POS) 600 601 /** 602 * struct iwl_lq_cmd - link quality command 603 * @sta_id: station to update 604 * @reduced_tpc: reduced transmit power control value 605 * @control: not used 606 * @flags: combination of LQ_FLAG_* 607 * @mimo_delim: the first SISO index in rs_table, which separates MIMO 608 * and SISO rates 609 * @single_stream_ant_msk: best antenna for SISO (can be dual in CDD). 610 * Should be ANT_[ABC] 611 * @dual_stream_ant_msk: best antennas for MIMO, combination of ANT_[ABC] 612 * @initial_rate_index: first index from rs_table per AC category 613 * @agg_time_limit: aggregation max time threshold in usec/100, meaning 614 * value of 100 is one usec. Range is 100 to 8000 615 * @agg_disable_start_th: try-count threshold for starting aggregation. 616 * If a frame has higher try-count, it should not be selected for 617 * starting an aggregation sequence. 618 * @agg_frame_cnt_limit: max frame count in an aggregation. 619 * 0: no limit 620 * 1: no aggregation (one frame per aggregation) 621 * 2 - 0x3f: maximal number of frames (up to 3f == 63) 622 * @reserved2: reserved 623 * @rs_table: array of rates for each TX try, each is rate_n_flags, 624 * meaning it is a combination of RATE_MCS_* and IWL_RATE_*_PLCP 625 * @ss_params: single stream features. declare whether STBC or BFER are allowed. 626 */ 627 struct iwl_lq_cmd { 628 u8 sta_id; 629 u8 reduced_tpc; 630 __le16 control; 631 /* LINK_QUAL_GENERAL_PARAMS_API_S_VER_1 */ 632 u8 flags; 633 u8 mimo_delim; 634 u8 single_stream_ant_msk; 635 u8 dual_stream_ant_msk; 636 u8 initial_rate_index[AC_NUM]; 637 /* LINK_QUAL_AGG_PARAMS_API_S_VER_1 */ 638 __le16 agg_time_limit; 639 u8 agg_disable_start_th; 640 u8 agg_frame_cnt_limit; 641 __le32 reserved2; 642 __le32 rs_table[LQ_MAX_RETRY_NUM]; 643 __le32 ss_params; 644 }; /* LINK_QUALITY_CMD_API_S_VER_1 */ 645 646 #endif /* __iwl_fw_api_rs_h__ */ 647