1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ 2 /* 3 * Copyright (C) 2012-2014, 2018-2020 Intel Corporation 4 * Copyright (C) 2017 Intel Deutschland GmbH 5 */ 6 #ifndef __iwl_fw_api_rs_h__ 7 #define __iwl_fw_api_rs_h__ 8 9 #include "mac.h" 10 11 /** 12 * enum iwl_tlc_mng_cfg_flags_enum - options for TLC config flags 13 * @IWL_TLC_MNG_CFG_FLAGS_STBC_MSK: enable STBC. For HE this enables STBC for 14 * bandwidths <= 80MHz 15 * @IWL_TLC_MNG_CFG_FLAGS_LDPC_MSK: enable LDPC 16 * @IWL_TLC_MNG_CFG_FLAGS_HE_STBC_160MHZ_MSK: enable STBC in HE at 160MHz 17 * bandwidth 18 * @IWL_TLC_MNG_CFG_FLAGS_HE_DCM_NSS_1_MSK: enable HE Dual Carrier Modulation 19 * for BPSK (MCS 0) with 1 spatial 20 * stream 21 * @IWL_TLC_MNG_CFG_FLAGS_HE_DCM_NSS_2_MSK: enable HE Dual Carrier Modulation 22 * for BPSK (MCS 0) with 2 spatial 23 * streams 24 */ 25 enum iwl_tlc_mng_cfg_flags { 26 IWL_TLC_MNG_CFG_FLAGS_STBC_MSK = BIT(0), 27 IWL_TLC_MNG_CFG_FLAGS_LDPC_MSK = BIT(1), 28 IWL_TLC_MNG_CFG_FLAGS_HE_STBC_160MHZ_MSK = BIT(2), 29 IWL_TLC_MNG_CFG_FLAGS_HE_DCM_NSS_1_MSK = BIT(3), 30 IWL_TLC_MNG_CFG_FLAGS_HE_DCM_NSS_2_MSK = BIT(4), 31 }; 32 33 /** 34 * enum iwl_tlc_mng_cfg_cw - channel width options 35 * @IWL_TLC_MNG_CH_WIDTH_20MHZ: 20MHZ channel 36 * @IWL_TLC_MNG_CH_WIDTH_40MHZ: 40MHZ channel 37 * @IWL_TLC_MNG_CH_WIDTH_80MHZ: 80MHZ channel 38 * @IWL_TLC_MNG_CH_WIDTH_160MHZ: 160MHZ channel 39 * @IWL_TLC_MNG_CH_WIDTH_LAST: maximum value 40 */ 41 enum iwl_tlc_mng_cfg_cw { 42 IWL_TLC_MNG_CH_WIDTH_20MHZ, 43 IWL_TLC_MNG_CH_WIDTH_40MHZ, 44 IWL_TLC_MNG_CH_WIDTH_80MHZ, 45 IWL_TLC_MNG_CH_WIDTH_160MHZ, 46 IWL_TLC_MNG_CH_WIDTH_LAST = IWL_TLC_MNG_CH_WIDTH_160MHZ, 47 }; 48 49 /** 50 * enum iwl_tlc_mng_cfg_chains - possible chains 51 * @IWL_TLC_MNG_CHAIN_A_MSK: chain A 52 * @IWL_TLC_MNG_CHAIN_B_MSK: chain B 53 */ 54 enum iwl_tlc_mng_cfg_chains { 55 IWL_TLC_MNG_CHAIN_A_MSK = BIT(0), 56 IWL_TLC_MNG_CHAIN_B_MSK = BIT(1), 57 }; 58 59 /** 60 * enum iwl_tlc_mng_cfg_mode - supported modes 61 * @IWL_TLC_MNG_MODE_CCK: enable CCK 62 * @IWL_TLC_MNG_MODE_OFDM_NON_HT: enable OFDM (non HT) 63 * @IWL_TLC_MNG_MODE_NON_HT: enable non HT 64 * @IWL_TLC_MNG_MODE_HT: enable HT 65 * @IWL_TLC_MNG_MODE_VHT: enable VHT 66 * @IWL_TLC_MNG_MODE_HE: enable HE 67 * @IWL_TLC_MNG_MODE_INVALID: invalid value 68 * @IWL_TLC_MNG_MODE_NUM: a count of possible modes 69 */ 70 enum iwl_tlc_mng_cfg_mode { 71 IWL_TLC_MNG_MODE_CCK = 0, 72 IWL_TLC_MNG_MODE_OFDM_NON_HT = IWL_TLC_MNG_MODE_CCK, 73 IWL_TLC_MNG_MODE_NON_HT = IWL_TLC_MNG_MODE_CCK, 74 IWL_TLC_MNG_MODE_HT, 75 IWL_TLC_MNG_MODE_VHT, 76 IWL_TLC_MNG_MODE_HE, 77 IWL_TLC_MNG_MODE_INVALID, 78 IWL_TLC_MNG_MODE_NUM = IWL_TLC_MNG_MODE_INVALID, 79 }; 80 81 /** 82 * enum iwl_tlc_mng_ht_rates - HT/VHT/HE rates 83 * @IWL_TLC_MNG_HT_RATE_MCS0: index of MCS0 84 * @IWL_TLC_MNG_HT_RATE_MCS1: index of MCS1 85 * @IWL_TLC_MNG_HT_RATE_MCS2: index of MCS2 86 * @IWL_TLC_MNG_HT_RATE_MCS3: index of MCS3 87 * @IWL_TLC_MNG_HT_RATE_MCS4: index of MCS4 88 * @IWL_TLC_MNG_HT_RATE_MCS5: index of MCS5 89 * @IWL_TLC_MNG_HT_RATE_MCS6: index of MCS6 90 * @IWL_TLC_MNG_HT_RATE_MCS7: index of MCS7 91 * @IWL_TLC_MNG_HT_RATE_MCS8: index of MCS8 92 * @IWL_TLC_MNG_HT_RATE_MCS9: index of MCS9 93 * @IWL_TLC_MNG_HT_RATE_MCS10: index of MCS10 94 * @IWL_TLC_MNG_HT_RATE_MCS11: index of MCS11 95 * @IWL_TLC_MNG_HT_RATE_MAX: maximal rate for HT/VHT 96 */ 97 enum iwl_tlc_mng_ht_rates { 98 IWL_TLC_MNG_HT_RATE_MCS0 = 0, 99 IWL_TLC_MNG_HT_RATE_MCS1, 100 IWL_TLC_MNG_HT_RATE_MCS2, 101 IWL_TLC_MNG_HT_RATE_MCS3, 102 IWL_TLC_MNG_HT_RATE_MCS4, 103 IWL_TLC_MNG_HT_RATE_MCS5, 104 IWL_TLC_MNG_HT_RATE_MCS6, 105 IWL_TLC_MNG_HT_RATE_MCS7, 106 IWL_TLC_MNG_HT_RATE_MCS8, 107 IWL_TLC_MNG_HT_RATE_MCS9, 108 IWL_TLC_MNG_HT_RATE_MCS10, 109 IWL_TLC_MNG_HT_RATE_MCS11, 110 IWL_TLC_MNG_HT_RATE_MAX = IWL_TLC_MNG_HT_RATE_MCS11, 111 }; 112 113 enum IWL_TLC_MNG_NSS { 114 IWL_TLC_NSS_1, 115 IWL_TLC_NSS_2, 116 IWL_TLC_NSS_MAX 117 }; 118 119 /** 120 * enum IWL_TLC_MCS_PER_BW - mcs index per BW 121 * @IWL_TLC_MCS_PER_BW_80: mcs for bw - 20Hhz, 40Hhz, 80Hhz 122 * @IWL_TLC_MCS_PER_BW_160: mcs for bw - 160Mhz 123 * @IWL_TLC_MCS_PER_BW_320: mcs for bw - 320Mhz 124 * @IWL_TLC_MCS_PER_BW_NUM_V3: number of entries up to version 3 125 * @IWL_TLC_MCS_PER_BW_NUM_V4: number of entries from version 4 126 */ 127 enum IWL_TLC_MCS_PER_BW { 128 IWL_TLC_MCS_PER_BW_80, 129 IWL_TLC_MCS_PER_BW_160, 130 IWL_TLC_MCS_PER_BW_320, 131 IWL_TLC_MCS_PER_BW_NUM_V3 = IWL_TLC_MCS_PER_BW_160 + 1, 132 IWL_TLC_MCS_PER_BW_NUM_V4 = IWL_TLC_MCS_PER_BW_320 + 1, 133 }; 134 135 /** 136 * struct tlc_config_cmd - TLC configuration 137 * @sta_id: station id 138 * @reserved1: reserved 139 * @max_ch_width: max supported channel width from @enum iwl_tlc_mng_cfg_cw 140 * @mode: &enum iwl_tlc_mng_cfg_mode 141 * @chains: bitmask of &enum iwl_tlc_mng_cfg_chains 142 * @amsdu: TX amsdu is supported 143 * @flags: bitmask of &enum iwl_tlc_mng_cfg_flags 144 * @non_ht_rates: bitmap of supported legacy rates 145 * @ht_rates: bitmap of &enum iwl_tlc_mng_ht_rates, per &enum IWL_TLC_MCS_PER_BW 146 * <nss, channel-width> pair (0 - 80mhz width and below, 1 - 160mhz). 147 * @max_mpdu_len: max MPDU length, in bytes 148 * @sgi_ch_width_supp: bitmap of SGI support per channel width 149 * use BIT(@enum iwl_tlc_mng_cfg_cw) 150 * @reserved2: reserved 151 * @max_tx_op: max TXOP in uSecs for all AC (BK, BE, VO, VI), 152 * set zero for no limit. 153 */ 154 struct iwl_tlc_config_cmd_v3 { 155 u8 sta_id; 156 u8 reserved1[3]; 157 u8 max_ch_width; 158 u8 mode; 159 u8 chains; 160 u8 amsdu; 161 __le16 flags; 162 __le16 non_ht_rates; 163 __le16 ht_rates[IWL_TLC_NSS_MAX][IWL_TLC_MCS_PER_BW_NUM_V3]; 164 __le16 max_mpdu_len; 165 u8 sgi_ch_width_supp; 166 u8 reserved2; 167 __le32 max_tx_op; 168 } __packed; /* TLC_MNG_CONFIG_CMD_API_S_VER_3 */ 169 170 /** 171 * struct tlc_config_cmd - TLC configuration 172 * @sta_id: station id 173 * @reserved1: reserved 174 * @max_ch_width: max supported channel width from &enum iwl_tlc_mng_cfg_cw 175 * @mode: &enum iwl_tlc_mng_cfg_mode 176 * @chains: bitmask of &enum iwl_tlc_mng_cfg_chains 177 * @sgi_ch_width_supp: bitmap of SGI support per channel width 178 * use BIT(&enum iwl_tlc_mng_cfg_cw) 179 * @flags: bitmask of &enum iwl_tlc_mng_cfg_flags 180 * @non_ht_rates: bitmap of supported legacy rates 181 * @ht_rates: bitmap of &enum iwl_tlc_mng_ht_rates, per <nss, channel-width> 182 * pair (0 - 80mhz width and below, 1 - 160mhz, 2 - 320mhz). 183 * @max_mpdu_len: max MPDU length, in bytes 184 * @max_tx_op: max TXOP in uSecs for all AC (BK, BE, VO, VI), 185 * set zero for no limit. 186 */ 187 struct iwl_tlc_config_cmd_v4 { 188 u8 sta_id; 189 u8 reserved1[3]; 190 u8 max_ch_width; 191 u8 mode; 192 u8 chains; 193 u8 sgi_ch_width_supp; 194 __le16 flags; 195 __le16 non_ht_rates; 196 __le16 ht_rates[IWL_TLC_NSS_MAX][IWL_TLC_MCS_PER_BW_NUM_V4]; 197 __le16 max_mpdu_len; 198 __le16 max_tx_op; 199 } __packed; /* TLC_MNG_CONFIG_CMD_API_S_VER_4 */ 200 201 /** 202 * enum iwl_tlc_update_flags - updated fields 203 * @IWL_TLC_NOTIF_FLAG_RATE: last initial rate update 204 * @IWL_TLC_NOTIF_FLAG_AMSDU: umsdu parameters update 205 */ 206 enum iwl_tlc_update_flags { 207 IWL_TLC_NOTIF_FLAG_RATE = BIT(0), 208 IWL_TLC_NOTIF_FLAG_AMSDU = BIT(1), 209 }; 210 211 /** 212 * struct iwl_tlc_update_notif - TLC notification from FW 213 * @sta_id: station id 214 * @reserved: reserved 215 * @flags: bitmap of notifications reported 216 * @rate: current initial rate 217 * @amsdu_size: Max AMSDU size, in bytes 218 * @amsdu_enabled: bitmap for per-TID AMSDU enablement 219 */ 220 struct iwl_tlc_update_notif { 221 u8 sta_id; 222 u8 reserved[3]; 223 __le32 flags; 224 __le32 rate; 225 __le32 amsdu_size; 226 __le32 amsdu_enabled; 227 } __packed; /* TLC_MNG_UPDATE_NTFY_API_S_VER_2 */ 228 229 230 #define IWL_MAX_MCS_DISPLAY_SIZE 12 231 232 struct iwl_rate_mcs_info { 233 char mbps[IWL_MAX_MCS_DISPLAY_SIZE]; 234 char mcs[IWL_MAX_MCS_DISPLAY_SIZE]; 235 }; 236 237 /* 238 * These serve as indexes into 239 * struct iwl_rate_info fw_rate_idx_to_plcp[IWL_RATE_COUNT]; 240 * TODO: avoid overlap between legacy and HT rates 241 */ 242 enum { 243 IWL_RATE_1M_INDEX = 0, 244 IWL_FIRST_CCK_RATE = IWL_RATE_1M_INDEX, 245 IWL_RATE_2M_INDEX, 246 IWL_RATE_5M_INDEX, 247 IWL_RATE_11M_INDEX, 248 IWL_LAST_CCK_RATE = IWL_RATE_11M_INDEX, 249 IWL_RATE_6M_INDEX, 250 IWL_FIRST_OFDM_RATE = IWL_RATE_6M_INDEX, 251 IWL_RATE_MCS_0_INDEX = IWL_RATE_6M_INDEX, 252 IWL_FIRST_HT_RATE = IWL_RATE_MCS_0_INDEX, 253 IWL_FIRST_VHT_RATE = IWL_RATE_MCS_0_INDEX, 254 IWL_RATE_9M_INDEX, 255 IWL_RATE_12M_INDEX, 256 IWL_RATE_MCS_1_INDEX = IWL_RATE_12M_INDEX, 257 IWL_RATE_18M_INDEX, 258 IWL_RATE_MCS_2_INDEX = IWL_RATE_18M_INDEX, 259 IWL_RATE_24M_INDEX, 260 IWL_RATE_MCS_3_INDEX = IWL_RATE_24M_INDEX, 261 IWL_RATE_36M_INDEX, 262 IWL_RATE_MCS_4_INDEX = IWL_RATE_36M_INDEX, 263 IWL_RATE_48M_INDEX, 264 IWL_RATE_MCS_5_INDEX = IWL_RATE_48M_INDEX, 265 IWL_RATE_54M_INDEX, 266 IWL_RATE_MCS_6_INDEX = IWL_RATE_54M_INDEX, 267 IWL_LAST_NON_HT_RATE = IWL_RATE_54M_INDEX, 268 IWL_RATE_60M_INDEX, 269 IWL_RATE_MCS_7_INDEX = IWL_RATE_60M_INDEX, 270 IWL_LAST_HT_RATE = IWL_RATE_MCS_7_INDEX, 271 IWL_RATE_MCS_8_INDEX, 272 IWL_RATE_MCS_9_INDEX, 273 IWL_LAST_VHT_RATE = IWL_RATE_MCS_9_INDEX, 274 IWL_RATE_MCS_10_INDEX, 275 IWL_RATE_MCS_11_INDEX, 276 IWL_LAST_HE_RATE = IWL_RATE_MCS_11_INDEX, 277 IWL_RATE_COUNT_LEGACY = IWL_LAST_NON_HT_RATE + 1, 278 IWL_RATE_COUNT = IWL_LAST_HE_RATE + 1, 279 IWL_RATE_INVM_INDEX = IWL_RATE_COUNT, 280 IWL_RATE_INVALID = IWL_RATE_COUNT, 281 }; 282 283 #define IWL_RATE_BIT_MSK(r) BIT(IWL_RATE_##r##M_INDEX) 284 285 /* fw API values for legacy bit rates, both OFDM and CCK */ 286 enum { 287 IWL_RATE_6M_PLCP = 13, 288 IWL_RATE_9M_PLCP = 15, 289 IWL_RATE_12M_PLCP = 5, 290 IWL_RATE_18M_PLCP = 7, 291 IWL_RATE_24M_PLCP = 9, 292 IWL_RATE_36M_PLCP = 11, 293 IWL_RATE_48M_PLCP = 1, 294 IWL_RATE_54M_PLCP = 3, 295 IWL_RATE_1M_PLCP = 10, 296 IWL_RATE_2M_PLCP = 20, 297 IWL_RATE_5M_PLCP = 55, 298 IWL_RATE_11M_PLCP = 110, 299 IWL_RATE_INVM_PLCP = -1, 300 }; 301 302 /* 303 * rate_n_flags bit fields version 1 304 * 305 * The 32-bit value has different layouts in the low 8 bites depending on the 306 * format. There are three formats, HT, VHT and legacy (11abg, with subformats 307 * for CCK and OFDM). 308 * 309 * High-throughput (HT) rate format 310 * bit 8 is 1, bit 26 is 0, bit 9 is 0 (OFDM) 311 * Very High-throughput (VHT) rate format 312 * bit 8 is 0, bit 26 is 1, bit 9 is 0 (OFDM) 313 * Legacy OFDM rate format for bits 7:0 314 * bit 8 is 0, bit 26 is 0, bit 9 is 0 (OFDM) 315 * Legacy CCK rate format for bits 7:0: 316 * bit 8 is 0, bit 26 is 0, bit 9 is 1 (CCK) 317 */ 318 319 /* Bit 8: (1) HT format, (0) legacy or VHT format */ 320 #define RATE_MCS_HT_POS 8 321 #define RATE_MCS_HT_MSK_V1 BIT(RATE_MCS_HT_POS) 322 323 /* Bit 9: (1) CCK, (0) OFDM. HT (bit 8) must be "0" for this bit to be valid */ 324 #define RATE_MCS_CCK_POS_V1 9 325 #define RATE_MCS_CCK_MSK_V1 BIT(RATE_MCS_CCK_POS_V1) 326 327 /* Bit 26: (1) VHT format, (0) legacy format in bits 8:0 */ 328 #define RATE_MCS_VHT_POS_V1 26 329 #define RATE_MCS_VHT_MSK_V1 BIT(RATE_MCS_VHT_POS_V1) 330 331 332 /* 333 * High-throughput (HT) rate format for bits 7:0 334 * 335 * 2-0: MCS rate base 336 * 0) 6 Mbps 337 * 1) 12 Mbps 338 * 2) 18 Mbps 339 * 3) 24 Mbps 340 * 4) 36 Mbps 341 * 5) 48 Mbps 342 * 6) 54 Mbps 343 * 7) 60 Mbps 344 * 4-3: 0) Single stream (SISO) 345 * 1) Dual stream (MIMO) 346 * 2) Triple stream (MIMO) 347 * 5: Value of 0x20 in bits 7:0 indicates 6 Mbps HT40 duplicate data 348 * (bits 7-6 are zero) 349 * 350 * Together the low 5 bits work out to the MCS index because we don't 351 * support MCSes above 15/23, and 0-7 have one stream, 8-15 have two 352 * streams and 16-23 have three streams. We could also support MCS 32 353 * which is the duplicate 20 MHz MCS (bit 5 set, all others zero.) 354 */ 355 #define RATE_HT_MCS_RATE_CODE_MSK_V1 0x7 356 #define RATE_HT_MCS_NSS_POS_V1 3 357 #define RATE_HT_MCS_NSS_MSK_V1 (3 << RATE_HT_MCS_NSS_POS_V1) 358 #define RATE_HT_MCS_MIMO2_MSK BIT(RATE_HT_MCS_NSS_POS_V1) 359 360 /* Bit 10: (1) Use Green Field preamble */ 361 #define RATE_HT_MCS_GF_POS 10 362 #define RATE_HT_MCS_GF_MSK (1 << RATE_HT_MCS_GF_POS) 363 364 #define RATE_HT_MCS_INDEX_MSK_V1 0x3f 365 366 /* 367 * Very High-throughput (VHT) rate format for bits 7:0 368 * 369 * 3-0: VHT MCS (0-9) 370 * 5-4: number of streams - 1: 371 * 0) Single stream (SISO) 372 * 1) Dual stream (MIMO) 373 * 2) Triple stream (MIMO) 374 */ 375 376 /* Bit 4-5: (0) SISO, (1) MIMO2 (2) MIMO3 */ 377 #define RATE_VHT_MCS_RATE_CODE_MSK 0xf 378 #define RATE_VHT_MCS_NSS_POS 4 379 #define RATE_VHT_MCS_NSS_MSK (3 << RATE_VHT_MCS_NSS_POS) 380 #define RATE_VHT_MCS_MIMO2_MSK BIT(RATE_VHT_MCS_NSS_POS) 381 382 /* 383 * Legacy OFDM rate format for bits 7:0 384 * 385 * 3-0: 0xD) 6 Mbps 386 * 0xF) 9 Mbps 387 * 0x5) 12 Mbps 388 * 0x7) 18 Mbps 389 * 0x9) 24 Mbps 390 * 0xB) 36 Mbps 391 * 0x1) 48 Mbps 392 * 0x3) 54 Mbps 393 * (bits 7-4 are 0) 394 * 395 * Legacy CCK rate format for bits 7:0: 396 * bit 8 is 0, bit 26 is 0, bit 9 is 1 (CCK): 397 * 398 * 6-0: 10) 1 Mbps 399 * 20) 2 Mbps 400 * 55) 5.5 Mbps 401 * 110) 11 Mbps 402 * (bit 7 is 0) 403 */ 404 #define RATE_LEGACY_RATE_MSK_V1 0xff 405 406 /* Bit 10 - OFDM HE */ 407 #define RATE_MCS_HE_POS_V1 10 408 #define RATE_MCS_HE_MSK_V1 BIT(RATE_MCS_HE_POS_V1) 409 410 /* 411 * Bit 11-12: (0) 20MHz, (1) 40MHz, (2) 80MHz, (3) 160MHz 412 * 0 and 1 are valid for HT and VHT, 2 and 3 only for VHT 413 */ 414 #define RATE_MCS_CHAN_WIDTH_POS 11 415 #define RATE_MCS_CHAN_WIDTH_MSK_V1 (3 << RATE_MCS_CHAN_WIDTH_POS) 416 417 /* Bit 13: (1) Short guard interval (0.4 usec), (0) normal GI (0.8 usec) */ 418 #define RATE_MCS_SGI_POS_V1 13 419 #define RATE_MCS_SGI_MSK_V1 BIT(RATE_MCS_SGI_POS_V1) 420 421 /* Bit 14-16: Antenna selection (1) Ant A, (2) Ant B, (4) Ant C */ 422 #define RATE_MCS_ANT_POS 14 423 #define RATE_MCS_ANT_A_MSK (1 << RATE_MCS_ANT_POS) 424 #define RATE_MCS_ANT_B_MSK (2 << RATE_MCS_ANT_POS) 425 #define RATE_MCS_ANT_AB_MSK (RATE_MCS_ANT_A_MSK | \ 426 RATE_MCS_ANT_B_MSK) 427 #define RATE_MCS_ANT_MSK RATE_MCS_ANT_AB_MSK 428 429 /* Bit 17: (0) SS, (1) SS*2 */ 430 #define RATE_MCS_STBC_POS 17 431 #define RATE_MCS_STBC_MSK BIT(RATE_MCS_STBC_POS) 432 433 /* Bit 18: OFDM-HE dual carrier mode */ 434 #define RATE_HE_DUAL_CARRIER_MODE 18 435 #define RATE_HE_DUAL_CARRIER_MODE_MSK BIT(RATE_HE_DUAL_CARRIER_MODE) 436 437 /* Bit 19: (0) Beamforming is off, (1) Beamforming is on */ 438 #define RATE_MCS_BF_POS 19 439 #define RATE_MCS_BF_MSK (1 << RATE_MCS_BF_POS) 440 441 /* 442 * Bit 20-21: HE LTF type and guard interval 443 * HE (ext) SU: 444 * 0 1xLTF+0.8us 445 * 1 2xLTF+0.8us 446 * 2 2xLTF+1.6us 447 * 3 & SGI (bit 13) clear 4xLTF+3.2us 448 * 3 & SGI (bit 13) set 4xLTF+0.8us 449 * HE MU: 450 * 0 4xLTF+0.8us 451 * 1 2xLTF+0.8us 452 * 2 2xLTF+1.6us 453 * 3 4xLTF+3.2us 454 * HE TRIG: 455 * 0 1xLTF+1.6us 456 * 1 2xLTF+1.6us 457 * 2 4xLTF+3.2us 458 * 3 (does not occur) 459 */ 460 #define RATE_MCS_HE_GI_LTF_POS 20 461 #define RATE_MCS_HE_GI_LTF_MSK_V1 (3 << RATE_MCS_HE_GI_LTF_POS) 462 463 /* Bit 22-23: HE type. (0) SU, (1) SU_EXT, (2) MU, (3) trigger based */ 464 #define RATE_MCS_HE_TYPE_POS_V1 22 465 #define RATE_MCS_HE_TYPE_SU_V1 (0 << RATE_MCS_HE_TYPE_POS_V1) 466 #define RATE_MCS_HE_TYPE_EXT_SU_V1 BIT(RATE_MCS_HE_TYPE_POS_V1) 467 #define RATE_MCS_HE_TYPE_MU_V1 (2 << RATE_MCS_HE_TYPE_POS_V1) 468 #define RATE_MCS_HE_TYPE_TRIG_V1 (3 << RATE_MCS_HE_TYPE_POS_V1) 469 #define RATE_MCS_HE_TYPE_MSK_V1 (3 << RATE_MCS_HE_TYPE_POS_V1) 470 471 /* Bit 24-25: (0) 20MHz (no dup), (1) 2x20MHz, (2) 4x20MHz, 3 8x20MHz */ 472 #define RATE_MCS_DUP_POS_V1 24 473 #define RATE_MCS_DUP_MSK_V1 (3 << RATE_MCS_DUP_POS_V1) 474 475 /* Bit 27: (1) LDPC enabled, (0) LDPC disabled */ 476 #define RATE_MCS_LDPC_POS_V1 27 477 #define RATE_MCS_LDPC_MSK_V1 BIT(RATE_MCS_LDPC_POS_V1) 478 479 /* Bit 28: (1) 106-tone RX (8 MHz RU), (0) normal bandwidth */ 480 #define RATE_MCS_HE_106T_POS_V1 28 481 #define RATE_MCS_HE_106T_MSK_V1 BIT(RATE_MCS_HE_106T_POS_V1) 482 483 /* Bit 30-31: (1) RTS, (2) CTS */ 484 #define RATE_MCS_RTS_REQUIRED_POS (30) 485 #define RATE_MCS_RTS_REQUIRED_MSK (0x1 << RATE_MCS_RTS_REQUIRED_POS) 486 487 #define RATE_MCS_CTS_REQUIRED_POS (31) 488 #define RATE_MCS_CTS_REQUIRED_MSK (0x1 << RATE_MCS_CTS_REQUIRED_POS) 489 490 /* rate_n_flags bit field version 2 491 * 492 * The 32-bit value has different layouts in the low 8 bits depending on the 493 * format. There are three formats, HT, VHT and legacy (11abg, with subformats 494 * for CCK and OFDM). 495 * 496 */ 497 498 /* Bits 10-8: rate format 499 * (0) Legacy CCK (1) Legacy OFDM (2) High-throughput (HT) 500 * (3) Very High-throughput (VHT) (4) High-efficiency (HE) 501 * (5) Extremely High-throughput (EHT) 502 */ 503 #define RATE_MCS_MOD_TYPE_POS 8 504 #define RATE_MCS_MOD_TYPE_MSK (0x7 << RATE_MCS_MOD_TYPE_POS) 505 #define RATE_MCS_CCK_MSK (0 << RATE_MCS_MOD_TYPE_POS) 506 #define RATE_MCS_LEGACY_OFDM_MSK (1 << RATE_MCS_MOD_TYPE_POS) 507 #define RATE_MCS_HT_MSK (2 << RATE_MCS_MOD_TYPE_POS) 508 #define RATE_MCS_VHT_MSK (3 << RATE_MCS_MOD_TYPE_POS) 509 #define RATE_MCS_HE_MSK (4 << RATE_MCS_MOD_TYPE_POS) 510 #define RATE_MCS_EHT_MSK (5 << RATE_MCS_MOD_TYPE_POS) 511 512 /* 513 * Legacy CCK rate format for bits 0:3: 514 * 515 * (0) 0xa - 1 Mbps 516 * (1) 0x14 - 2 Mbps 517 * (2) 0x37 - 5.5 Mbps 518 * (3) 0x6e - 11 nbps 519 * 520 * Legacy OFDM rate format for bis 3:0: 521 * 522 * (0) 6 Mbps 523 * (1) 9 Mbps 524 * (2) 12 Mbps 525 * (3) 18 Mbps 526 * (4) 24 Mbps 527 * (5) 36 Mbps 528 * (6) 48 Mbps 529 * (7) 54 Mbps 530 * 531 */ 532 #define RATE_LEGACY_RATE_MSK 0x7 533 534 /* 535 * HT, VHT, HE, EHT rate format for bits 3:0 536 * 3-0: MCS 537 * 538 */ 539 #define RATE_HT_MCS_CODE_MSK 0x7 540 #define RATE_MCS_NSS_POS 4 541 #define RATE_MCS_NSS_MSK (1 << RATE_MCS_NSS_POS) 542 #define RATE_MCS_CODE_MSK 0xf 543 #define RATE_HT_MCS_INDEX(r) ((((r) & RATE_MCS_NSS_MSK) >> 1) | \ 544 ((r) & RATE_HT_MCS_CODE_MSK)) 545 546 /* Bits 7-5: reserved */ 547 548 /* 549 * Bits 13-11: (0) 20MHz, (1) 40MHz, (2) 80MHz, (3) 160MHz, (4) 320MHz 550 */ 551 #define RATE_MCS_CHAN_WIDTH_MSK (0x7 << RATE_MCS_CHAN_WIDTH_POS) 552 #define RATE_MCS_CHAN_WIDTH_20 (0 << RATE_MCS_CHAN_WIDTH_POS) 553 #define RATE_MCS_CHAN_WIDTH_40 (1 << RATE_MCS_CHAN_WIDTH_POS) 554 #define RATE_MCS_CHAN_WIDTH_80 (2 << RATE_MCS_CHAN_WIDTH_POS) 555 #define RATE_MCS_CHAN_WIDTH_160 (3 << RATE_MCS_CHAN_WIDTH_POS) 556 #define RATE_MCS_CHAN_WIDTH_320 (4 << RATE_MCS_CHAN_WIDTH_POS) 557 558 /* Bit 15-14: Antenna selection: 559 * Bit 14: Ant A active 560 * Bit 15: Ant B active 561 * 562 * All relevant definitions are same as in v1 563 */ 564 565 /* Bit 16 (1) LDPC enables, (0) LDPC disabled */ 566 #define RATE_MCS_LDPC_POS 16 567 #define RATE_MCS_LDPC_MSK (1 << RATE_MCS_LDPC_POS) 568 569 /* Bit 17: (0) SS, (1) SS*2 (same as v1) */ 570 571 /* Bit 18: OFDM-HE dual carrier mode (same as v1) */ 572 573 /* Bit 19: (0) Beamforming is off, (1) Beamforming is on (same as v1) */ 574 575 /* 576 * Bit 22-20: HE LTF type and guard interval 577 * CCK: 578 * 0 long preamble 579 * 1 short preamble 580 * HT/VHT: 581 * 0 0.8us 582 * 1 0.4us 583 * HE (ext) SU: 584 * 0 1xLTF+0.8us 585 * 1 2xLTF+0.8us 586 * 2 2xLTF+1.6us 587 * 3 4xLTF+3.2us 588 * 4 4xLTF+0.8us 589 * HE MU: 590 * 0 4xLTF+0.8us 591 * 1 2xLTF+0.8us 592 * 2 2xLTF+1.6us 593 * 3 4xLTF+3.2us 594 * HE TRIG: 595 * 0 1xLTF+1.6us 596 * 1 2xLTF+1.6us 597 * 2 4xLTF+3.2us 598 * */ 599 #define RATE_MCS_HE_GI_LTF_MSK (0x7 << RATE_MCS_HE_GI_LTF_POS) 600 #define RATE_MCS_SGI_POS RATE_MCS_HE_GI_LTF_POS 601 #define RATE_MCS_SGI_MSK (1 << RATE_MCS_SGI_POS) 602 #define RATE_MCS_HE_SU_4_LTF 3 603 #define RATE_MCS_HE_SU_4_LTF_08_GI 4 604 605 /* Bit 24-23: HE type. (0) SU, (1) SU_EXT, (2) MU, (3) trigger based */ 606 #define RATE_MCS_HE_TYPE_POS 23 607 #define RATE_MCS_HE_TYPE_SU (0 << RATE_MCS_HE_TYPE_POS) 608 #define RATE_MCS_HE_TYPE_EXT_SU (1 << RATE_MCS_HE_TYPE_POS) 609 #define RATE_MCS_HE_TYPE_MU (2 << RATE_MCS_HE_TYPE_POS) 610 #define RATE_MCS_HE_TYPE_TRIG (3 << RATE_MCS_HE_TYPE_POS) 611 #define RATE_MCS_HE_TYPE_MSK (3 << RATE_MCS_HE_TYPE_POS) 612 613 /* Bit 25: duplicate channel enabled 614 * 615 * if this bit is set, duplicate is according to BW (bits 11-13): 616 * 617 * CCK: 2x 20MHz 618 * OFDM Legacy: N x 20Mhz, (N = BW \ 2 , either 2, 4, 8, 16) 619 * EHT: 2 x BW/2, (80 - 2x40, 160 - 2x80, 320 - 2x160) 620 * */ 621 #define RATE_MCS_DUP_POS 25 622 #define RATE_MCS_DUP_MSK (1 << RATE_MCS_DUP_POS) 623 624 /* Bit 26: (1) 106-tone RX (8 MHz RU), (0) normal bandwidth */ 625 #define RATE_MCS_HE_106T_POS 26 626 #define RATE_MCS_HE_106T_MSK (1 << RATE_MCS_HE_106T_POS) 627 628 /* Bit 27: EHT extra LTF: 629 * instead of 1 LTF for SISO use 2 LTFs, 630 * instead of 2 LTFs for NSTS=2 use 4 LTFs*/ 631 #define RATE_MCS_EHT_EXTRA_LTF_POS 27 632 #define RATE_MCS_EHT_EXTRA_LTF_MSK (1 << RATE_MCS_EHT_EXTRA_LTF_POS) 633 634 /* Bit 31-28: reserved */ 635 636 /* Link Quality definitions */ 637 638 /* # entries in rate scale table to support Tx retries */ 639 #define LQ_MAX_RETRY_NUM 16 640 641 /* Link quality command flags bit fields */ 642 643 /* Bit 0: (0) Don't use RTS (1) Use RTS */ 644 #define LQ_FLAG_USE_RTS_POS 0 645 #define LQ_FLAG_USE_RTS_MSK (1 << LQ_FLAG_USE_RTS_POS) 646 647 /* Bit 1-3: LQ command color. Used to match responses to LQ commands */ 648 #define LQ_FLAG_COLOR_POS 1 649 #define LQ_FLAG_COLOR_MSK (7 << LQ_FLAG_COLOR_POS) 650 #define LQ_FLAG_COLOR_GET(_f) (((_f) & LQ_FLAG_COLOR_MSK) >>\ 651 LQ_FLAG_COLOR_POS) 652 #define LQ_FLAGS_COLOR_INC(_c) ((((_c) + 1) << LQ_FLAG_COLOR_POS) &\ 653 LQ_FLAG_COLOR_MSK) 654 #define LQ_FLAG_COLOR_SET(_f, _c) ((_c) | ((_f) & ~LQ_FLAG_COLOR_MSK)) 655 656 /* Bit 4-5: Tx RTS BW Signalling 657 * (0) No RTS BW signalling 658 * (1) Static BW signalling 659 * (2) Dynamic BW signalling 660 */ 661 #define LQ_FLAG_RTS_BW_SIG_POS 4 662 #define LQ_FLAG_RTS_BW_SIG_NONE (0 << LQ_FLAG_RTS_BW_SIG_POS) 663 #define LQ_FLAG_RTS_BW_SIG_STATIC (1 << LQ_FLAG_RTS_BW_SIG_POS) 664 #define LQ_FLAG_RTS_BW_SIG_DYNAMIC (2 << LQ_FLAG_RTS_BW_SIG_POS) 665 666 /* Bit 6: (0) No dynamic BW selection (1) Allow dynamic BW selection 667 * Dyanmic BW selection allows Tx with narrower BW then requested in rates 668 */ 669 #define LQ_FLAG_DYNAMIC_BW_POS 6 670 #define LQ_FLAG_DYNAMIC_BW_MSK (1 << LQ_FLAG_DYNAMIC_BW_POS) 671 672 /* Single Stream Tx Parameters (lq_cmd->ss_params) 673 * Flags to control a smart FW decision about whether BFER/STBC/SISO will be 674 * used for single stream Tx. 675 */ 676 677 /* Bit 0-1: Max STBC streams allowed. Can be 0-3. 678 * (0) - No STBC allowed 679 * (1) - 2x1 STBC allowed (HT/VHT) 680 * (2) - 4x2 STBC allowed (HT/VHT) 681 * (3) - 3x2 STBC allowed (HT only) 682 * All our chips are at most 2 antennas so only (1) is valid for now. 683 */ 684 #define LQ_SS_STBC_ALLOWED_POS 0 685 #define LQ_SS_STBC_ALLOWED_MSK (3 << LQ_SS_STBC_ALLOWED_MSK) 686 687 /* 2x1 STBC is allowed */ 688 #define LQ_SS_STBC_1SS_ALLOWED (1 << LQ_SS_STBC_ALLOWED_POS) 689 690 /* Bit 2: Beamformer (VHT only) is allowed */ 691 #define LQ_SS_BFER_ALLOWED_POS 2 692 #define LQ_SS_BFER_ALLOWED (1 << LQ_SS_BFER_ALLOWED_POS) 693 694 /* Bit 3: Force BFER or STBC for testing 695 * If this is set: 696 * If BFER is allowed then force the ucode to choose BFER else 697 * If STBC is allowed then force the ucode to choose STBC over SISO 698 */ 699 #define LQ_SS_FORCE_POS 3 700 #define LQ_SS_FORCE (1 << LQ_SS_FORCE_POS) 701 702 /* Bit 31: ss_params field is valid. Used for FW backward compatibility 703 * with other drivers which don't support the ss_params API yet 704 */ 705 #define LQ_SS_PARAMS_VALID_POS 31 706 #define LQ_SS_PARAMS_VALID (1 << LQ_SS_PARAMS_VALID_POS) 707 708 /** 709 * struct iwl_lq_cmd - link quality command 710 * @sta_id: station to update 711 * @reduced_tpc: reduced transmit power control value 712 * @control: not used 713 * @flags: combination of LQ_FLAG_* 714 * @mimo_delim: the first SISO index in rs_table, which separates MIMO 715 * and SISO rates 716 * @single_stream_ant_msk: best antenna for SISO (can be dual in CDD). 717 * Should be ANT_[ABC] 718 * @dual_stream_ant_msk: best antennas for MIMO, combination of ANT_[ABC] 719 * @initial_rate_index: first index from rs_table per AC category 720 * @agg_time_limit: aggregation max time threshold in usec/100, meaning 721 * value of 100 is one usec. Range is 100 to 8000 722 * @agg_disable_start_th: try-count threshold for starting aggregation. 723 * If a frame has higher try-count, it should not be selected for 724 * starting an aggregation sequence. 725 * @agg_frame_cnt_limit: max frame count in an aggregation. 726 * 0: no limit 727 * 1: no aggregation (one frame per aggregation) 728 * 2 - 0x3f: maximal number of frames (up to 3f == 63) 729 * @reserved2: reserved 730 * @rs_table: array of rates for each TX try, each is rate_n_flags, 731 * meaning it is a combination of RATE_MCS_* and IWL_RATE_*_PLCP 732 * @ss_params: single stream features. declare whether STBC or BFER are allowed. 733 */ 734 struct iwl_lq_cmd { 735 u8 sta_id; 736 u8 reduced_tpc; 737 __le16 control; 738 /* LINK_QUAL_GENERAL_PARAMS_API_S_VER_1 */ 739 u8 flags; 740 u8 mimo_delim; 741 u8 single_stream_ant_msk; 742 u8 dual_stream_ant_msk; 743 u8 initial_rate_index[AC_NUM]; 744 /* LINK_QUAL_AGG_PARAMS_API_S_VER_1 */ 745 __le16 agg_time_limit; 746 u8 agg_disable_start_th; 747 u8 agg_frame_cnt_limit; 748 __le32 reserved2; 749 __le32 rs_table[LQ_MAX_RETRY_NUM]; 750 __le32 ss_params; 751 }; /* LINK_QUALITY_CMD_API_S_VER_1 */ 752 753 u8 iwl_fw_rate_idx_to_plcp(int idx); 754 u32 iwl_new_rate_from_v1(u32 rate_v1); 755 u32 iwl_legacy_rate_to_fw_idx(u32 rate_n_flags); 756 const struct iwl_rate_mcs_info *iwl_rate_mcs(int idx); 757 const char *iwl_rs_pretty_ant(u8 ant); 758 const char *iwl_rs_pretty_bw(int bw); 759 int rs_pretty_print_rate(char *buf, int bufsz, const u32 rate); 760 bool iwl_he_is_sgi(u32 rate_n_flags); 761 762 #endif /* __iwl_fw_api_rs_h__ */ 763