195da92e7SMiri Korenblit /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ 295da92e7SMiri Korenblit /* 395da92e7SMiri Korenblit * Copyright (C) 2025 Intel Corporation 495da92e7SMiri Korenblit */ 595da92e7SMiri Korenblit #ifndef __iwl_fw_api_dhc_h__ 695da92e7SMiri Korenblit #define __iwl_fw_api_dhc_h__ 795da92e7SMiri Korenblit 895da92e7SMiri Korenblit #define DHC_TABLE_MASK_POS (28) 995da92e7SMiri Korenblit 1095da92e7SMiri Korenblit /** 1195da92e7SMiri Korenblit * enum iwl_dhc_table_id - DHC table operations index 1295da92e7SMiri Korenblit */ 1395da92e7SMiri Korenblit enum iwl_dhc_table_id { 1495da92e7SMiri Korenblit /** 1595da92e7SMiri Korenblit * @DHC_TABLE_INTEGRATION: select the integration table 1695da92e7SMiri Korenblit */ 1795da92e7SMiri Korenblit DHC_TABLE_INTEGRATION = 2 << DHC_TABLE_MASK_POS, 18*b611cf6bSPagadala Yesu Anjaneyulu /** 19*b611cf6bSPagadala Yesu Anjaneyulu * @DHC_TABLE_TOOLS: select the tools table 20*b611cf6bSPagadala Yesu Anjaneyulu */ 21*b611cf6bSPagadala Yesu Anjaneyulu DHC_TABLE_TOOLS = 0, 22*b611cf6bSPagadala Yesu Anjaneyulu }; 23*b611cf6bSPagadala Yesu Anjaneyulu 24*b611cf6bSPagadala Yesu Anjaneyulu /** 25*b611cf6bSPagadala Yesu Anjaneyulu * enum iwl_dhc_umac_tools_table - tools operations 26*b611cf6bSPagadala Yesu Anjaneyulu * @DHC_TOOLS_UMAC_GET_TAS_STATUS: Get TAS status. 27*b611cf6bSPagadala Yesu Anjaneyulu * See @struct iwl_dhc_tas_status_resp 28*b611cf6bSPagadala Yesu Anjaneyulu */ 29*b611cf6bSPagadala Yesu Anjaneyulu enum iwl_dhc_umac_tools_table { 30*b611cf6bSPagadala Yesu Anjaneyulu DHC_TOOLS_UMAC_GET_TAS_STATUS = 0, 3195da92e7SMiri Korenblit }; 3295da92e7SMiri Korenblit 3395da92e7SMiri Korenblit /** 3495da92e7SMiri Korenblit * enum iwl_dhc_umac_integration_table - integration operations 3595da92e7SMiri Korenblit */ 3695da92e7SMiri Korenblit enum iwl_dhc_umac_integration_table { 3795da92e7SMiri Korenblit /** 3895da92e7SMiri Korenblit * @DHC_INT_UMAC_TWT_OPERATION: trigger a TWT operation 3995da92e7SMiri Korenblit */ 4095da92e7SMiri Korenblit DHC_INT_UMAC_TWT_OPERATION = 4, 4195da92e7SMiri Korenblit /** 4295da92e7SMiri Korenblit * @DHC_INTEGRATION_TLC_DEBUG_CONFIG: TLC debug 4395da92e7SMiri Korenblit */ 4495da92e7SMiri Korenblit DHC_INTEGRATION_TLC_DEBUG_CONFIG = 1, 4595da92e7SMiri Korenblit /** 4695da92e7SMiri Korenblit * @DHC_INTEGRATION_MAX: Maximum UMAC integration table entries 4795da92e7SMiri Korenblit */ 4895da92e7SMiri Korenblit DHC_INTEGRATION_MAX 4995da92e7SMiri Korenblit }; 5095da92e7SMiri Korenblit 5195da92e7SMiri Korenblit #define DHC_TARGET_UMAC BIT(27) 5295da92e7SMiri Korenblit 5395da92e7SMiri Korenblit /** 5495da92e7SMiri Korenblit * struct iwl_dhc_cmd - debug host command 5595da92e7SMiri Korenblit * @length: length in DWs of the data structure that is concatenated to the end 5695da92e7SMiri Korenblit * of this struct 5795da92e7SMiri Korenblit * @index_and_mask: bit 31 is 1 for data set operation else it's 0 5895da92e7SMiri Korenblit * bits 28-30 is the index of the table of the operation - 5995da92e7SMiri Korenblit * &enum iwl_dhc_table_id * 6095da92e7SMiri Korenblit * bit 27 is 0 if the cmd targeted to LMAC and 1 if targeted to UMAC, 6195da92e7SMiri Korenblit * (LMAC is 0 for backward compatibility) 6295da92e7SMiri Korenblit * bit 26 is 0 if the cmd targeted to LMAC0 and 1 if targeted to LMAC1, 6395da92e7SMiri Korenblit * relevant only if bit 27 set to 0 6495da92e7SMiri Korenblit * bits 0-25 is a specific entry index in the table specified in bits 28-30 6595da92e7SMiri Korenblit * 6695da92e7SMiri Korenblit * @data: the concatenated data. 6795da92e7SMiri Korenblit */ 6895da92e7SMiri Korenblit struct iwl_dhc_cmd { 6995da92e7SMiri Korenblit __le32 length; 7095da92e7SMiri Korenblit __le32 index_and_mask; 7195da92e7SMiri Korenblit __le32 data[]; 7295da92e7SMiri Korenblit } __packed; /* DHC_CMD_API_S */ 7395da92e7SMiri Korenblit 7495da92e7SMiri Korenblit /** 75*b611cf6bSPagadala Yesu Anjaneyulu * struct iwl_dhc_payload_hdr - DHC payload header 76*b611cf6bSPagadala Yesu Anjaneyulu * @version: a version of a payload 77*b611cf6bSPagadala Yesu Anjaneyulu * @reserved: reserved for alignment 78*b611cf6bSPagadala Yesu Anjaneyulu */ 79*b611cf6bSPagadala Yesu Anjaneyulu struct iwl_dhc_payload_hdr { 80*b611cf6bSPagadala Yesu Anjaneyulu u8 version; 81*b611cf6bSPagadala Yesu Anjaneyulu u8 reserved[3]; 82*b611cf6bSPagadala Yesu Anjaneyulu } __packed; /* DHC_PAYLOAD_HDR_API_S_VER_1 */ 83*b611cf6bSPagadala Yesu Anjaneyulu 84*b611cf6bSPagadala Yesu Anjaneyulu /** 85*b611cf6bSPagadala Yesu Anjaneyulu * struct iwl_dhc_tas_status_per_radio - TAS status per radio 86*b611cf6bSPagadala Yesu Anjaneyulu * @band: &PHY_BAND_5 for high band, PHY_BAND_24 for low band and 87*b611cf6bSPagadala Yesu Anjaneyulu * &PHY_BAND_6 for ultra high band. 88*b611cf6bSPagadala Yesu Anjaneyulu * @static_status: TAS statically enabled or disabled 89*b611cf6bSPagadala Yesu Anjaneyulu * @static_disable_reason: TAS static disable reason, uses 90*b611cf6bSPagadala Yesu Anjaneyulu * &enum iwl_tas_statically_disabled_reason 91*b611cf6bSPagadala Yesu Anjaneyulu * @near_disconnection: is TAS currently near disconnection per radio 92*b611cf6bSPagadala Yesu Anjaneyulu * @dynamic_status_ant_a: Antenna A current TAS status. 93*b611cf6bSPagadala Yesu Anjaneyulu * uses &enum iwl_tas_dyna_status 94*b611cf6bSPagadala Yesu Anjaneyulu * @dynamic_status_ant_b: Antenna B current TAS status. 95*b611cf6bSPagadala Yesu Anjaneyulu * uses &enum iwl_tas_dyna_status 96*b611cf6bSPagadala Yesu Anjaneyulu * @max_reg_pwr_limit_ant_a: Antenna A regulatory power limits in dBm 97*b611cf6bSPagadala Yesu Anjaneyulu * @max_reg_pwr_limit_ant_b: Antenna B regulatory power limits in dBm 98*b611cf6bSPagadala Yesu Anjaneyulu * @sar_limit_ant_a: Antenna A SAR limit per radio in dBm 99*b611cf6bSPagadala Yesu Anjaneyulu * @sar_limit_ant_b: Antenna B SAR limit per radio in dBm 100*b611cf6bSPagadala Yesu Anjaneyulu * @reserved: reserved for alignment 101*b611cf6bSPagadala Yesu Anjaneyulu */ 102*b611cf6bSPagadala Yesu Anjaneyulu struct iwl_dhc_tas_status_per_radio { 103*b611cf6bSPagadala Yesu Anjaneyulu u8 band; 104*b611cf6bSPagadala Yesu Anjaneyulu u8 static_status; 105*b611cf6bSPagadala Yesu Anjaneyulu u8 static_disable_reason; 106*b611cf6bSPagadala Yesu Anjaneyulu u8 near_disconnection; 107*b611cf6bSPagadala Yesu Anjaneyulu u8 dynamic_status_ant_a; 108*b611cf6bSPagadala Yesu Anjaneyulu u8 dynamic_status_ant_b; 109*b611cf6bSPagadala Yesu Anjaneyulu __le16 max_reg_pwr_limit_ant_a; 110*b611cf6bSPagadala Yesu Anjaneyulu __le16 max_reg_pwr_limit_ant_b; 111*b611cf6bSPagadala Yesu Anjaneyulu __le16 sar_limit_ant_a; 112*b611cf6bSPagadala Yesu Anjaneyulu __le16 sar_limit_ant_b; 113*b611cf6bSPagadala Yesu Anjaneyulu u8 reserved[2]; 114*b611cf6bSPagadala Yesu Anjaneyulu } __packed; /* DHC_TAS_STATUS_PER_RADIO_S_VER_1 */ 115*b611cf6bSPagadala Yesu Anjaneyulu 116*b611cf6bSPagadala Yesu Anjaneyulu /** 117*b611cf6bSPagadala Yesu Anjaneyulu * struct iwl_dhc_tas_status_resp - Response to DHC_TOOLS_UMAC_GET_TAS_STATUS 118*b611cf6bSPagadala Yesu Anjaneyulu * @header: DHC payload header, uses &struct iwl_dhc_payload_hdr 119*b611cf6bSPagadala Yesu Anjaneyulu * @tas_config_info: see @struct bios_value_u32 120*b611cf6bSPagadala Yesu Anjaneyulu * @mcc_block_list: block listed country codes 121*b611cf6bSPagadala Yesu Anjaneyulu * @tas_status_radio: TAS status, uses &struct iwl_dhc_tas_status_per_radio 122*b611cf6bSPagadala Yesu Anjaneyulu * @curr_mcc: current mcc 123*b611cf6bSPagadala Yesu Anjaneyulu * @valid_radio_mask: represent entry in tas_status_per_radio is valid. 124*b611cf6bSPagadala Yesu Anjaneyulu * @reserved: reserved for alignment 125*b611cf6bSPagadala Yesu Anjaneyulu */ 126*b611cf6bSPagadala Yesu Anjaneyulu struct iwl_dhc_tas_status_resp { 127*b611cf6bSPagadala Yesu Anjaneyulu struct iwl_dhc_payload_hdr header; 128*b611cf6bSPagadala Yesu Anjaneyulu struct bios_value_u32 tas_config_info; 129*b611cf6bSPagadala Yesu Anjaneyulu __le16 mcc_block_list[IWL_WTAS_BLACK_LIST_MAX]; 130*b611cf6bSPagadala Yesu Anjaneyulu struct iwl_dhc_tas_status_per_radio tas_status_radio[2]; 131*b611cf6bSPagadala Yesu Anjaneyulu __le16 curr_mcc; 132*b611cf6bSPagadala Yesu Anjaneyulu u8 valid_radio_mask; 133*b611cf6bSPagadala Yesu Anjaneyulu u8 reserved; 134*b611cf6bSPagadala Yesu Anjaneyulu } __packed; /* DHC_TAS_STATUS_RSP_API_S_VER_1 */ 135*b611cf6bSPagadala Yesu Anjaneyulu 136*b611cf6bSPagadala Yesu Anjaneyulu /** 137*b611cf6bSPagadala Yesu Anjaneyulu * struct iwl_dhc_cmd_resp_v1 - debug host command response 138*b611cf6bSPagadala Yesu Anjaneyulu * @status: status of the command 139*b611cf6bSPagadala Yesu Anjaneyulu * @data: the response data 140*b611cf6bSPagadala Yesu Anjaneyulu */ 141*b611cf6bSPagadala Yesu Anjaneyulu struct iwl_dhc_cmd_resp_v1 { 142*b611cf6bSPagadala Yesu Anjaneyulu __le32 status; 143*b611cf6bSPagadala Yesu Anjaneyulu __le32 data[]; 144*b611cf6bSPagadala Yesu Anjaneyulu } __packed; /* DHC_RESP_API_S_VER_1 */ 145*b611cf6bSPagadala Yesu Anjaneyulu 146*b611cf6bSPagadala Yesu Anjaneyulu /** 147*b611cf6bSPagadala Yesu Anjaneyulu * struct iwl_dhc_cmd_resp - debug host command response 148*b611cf6bSPagadala Yesu Anjaneyulu * @status: status of the command 149*b611cf6bSPagadala Yesu Anjaneyulu * @descriptor: command descriptor (index_and_mask) returned 150*b611cf6bSPagadala Yesu Anjaneyulu * @data: the response data 151*b611cf6bSPagadala Yesu Anjaneyulu */ 152*b611cf6bSPagadala Yesu Anjaneyulu struct iwl_dhc_cmd_resp { 153*b611cf6bSPagadala Yesu Anjaneyulu __le32 status; 154*b611cf6bSPagadala Yesu Anjaneyulu __le32 descriptor; 155*b611cf6bSPagadala Yesu Anjaneyulu __le32 data[]; 156*b611cf6bSPagadala Yesu Anjaneyulu } __packed; /* DHC_RESP_API_S_VER_2 and DHC_RESP_API_S_VER_3 */ 157*b611cf6bSPagadala Yesu Anjaneyulu 158*b611cf6bSPagadala Yesu Anjaneyulu /** 15995da92e7SMiri Korenblit * enum iwl_dhc_twt_operation_type - describes the TWT operation type 16095da92e7SMiri Korenblit * 16195da92e7SMiri Korenblit * @DHC_TWT_REQUEST: Send a Request TWT command 16295da92e7SMiri Korenblit * @DHC_TWT_SUGGEST: Send a Suggest TWT command 16395da92e7SMiri Korenblit * @DHC_TWT_DEMAND: Send a Demand TWT command 16495da92e7SMiri Korenblit * @DHC_TWT_GROUPING: Send a Grouping TWT command 16595da92e7SMiri Korenblit * @DHC_TWT_ACCEPT: Send a Accept TWT command 16695da92e7SMiri Korenblit * @DHC_TWT_ALTERNATE: Send a Alternate TWT command 16795da92e7SMiri Korenblit * @DHC_TWT_DICTATE: Send a Dictate TWT command 16895da92e7SMiri Korenblit * @DHC_TWT_REJECT: Send a Reject TWT command 16995da92e7SMiri Korenblit * @DHC_TWT_TEARDOWN: Send a TearDown TWT command 17095da92e7SMiri Korenblit */ 17195da92e7SMiri Korenblit enum iwl_dhc_twt_operation_type { 17295da92e7SMiri Korenblit DHC_TWT_REQUEST, 17395da92e7SMiri Korenblit DHC_TWT_SUGGEST, 17495da92e7SMiri Korenblit DHC_TWT_DEMAND, 17595da92e7SMiri Korenblit DHC_TWT_GROUPING, 17695da92e7SMiri Korenblit DHC_TWT_ACCEPT, 17795da92e7SMiri Korenblit DHC_TWT_ALTERNATE, 17895da92e7SMiri Korenblit DHC_TWT_DICTATE, 17995da92e7SMiri Korenblit DHC_TWT_REJECT, 18095da92e7SMiri Korenblit DHC_TWT_TEARDOWN, 18195da92e7SMiri Korenblit }; /* DHC_TWT_OPERATION_TYPE_E */ 18295da92e7SMiri Korenblit 18395da92e7SMiri Korenblit /** 18495da92e7SMiri Korenblit * struct iwl_dhc_twt_operation - trigger a TWT operation 18595da92e7SMiri Korenblit * 18695da92e7SMiri Korenblit * @mac_id: the mac Id on which to trigger TWT operation 18795da92e7SMiri Korenblit * @twt_operation: see &enum iwl_dhc_twt_operation_type 18895da92e7SMiri Korenblit * @target_wake_time: when should we be on channel 18995da92e7SMiri Korenblit * @interval_exp: the exponent for the interval 19095da92e7SMiri Korenblit * @interval_mantissa: the mantissa for the interval 19195da92e7SMiri Korenblit * @min_wake_duration: the minimum duration for the wake period 19295da92e7SMiri Korenblit * @trigger: is the TWT triggered or not 19395da92e7SMiri Korenblit * @flow_type: is the TWT announced or not 19495da92e7SMiri Korenblit * @flow_id: the TWT flow identifier from 0 to 7 19595da92e7SMiri Korenblit * @protection: is the TWT protected 19695da92e7SMiri Korenblit * @ndo_paging_indicator: is ndo_paging_indicator set 19795da92e7SMiri Korenblit * @responder_pm_mode: is responder_pm_mode set 19895da92e7SMiri Korenblit * @negotiation_type: if the responder wants to doze outside the TWT SP 19995da92e7SMiri Korenblit * @twt_request: 1 for TWT request, 0 otherwise 20095da92e7SMiri Korenblit * @implicit: is TWT implicit 20195da92e7SMiri Korenblit * @twt_group_assignment: the TWT group assignment 20295da92e7SMiri Korenblit * @twt_channel: the TWT channel 20395da92e7SMiri Korenblit * @reserved: reserved 20495da92e7SMiri Korenblit */ 20595da92e7SMiri Korenblit struct iwl_dhc_twt_operation { 20695da92e7SMiri Korenblit __le32 mac_id; 20795da92e7SMiri Korenblit __le32 twt_operation; 20895da92e7SMiri Korenblit __le64 target_wake_time; 20995da92e7SMiri Korenblit __le32 interval_exp; 21095da92e7SMiri Korenblit __le32 interval_mantissa; 21195da92e7SMiri Korenblit __le32 min_wake_duration; 21295da92e7SMiri Korenblit u8 trigger; 21395da92e7SMiri Korenblit u8 flow_type; 21495da92e7SMiri Korenblit u8 flow_id; 21595da92e7SMiri Korenblit u8 protection; 21695da92e7SMiri Korenblit u8 ndo_paging_indicator; 21795da92e7SMiri Korenblit u8 responder_pm_mode; 21895da92e7SMiri Korenblit u8 negotiation_type; 21995da92e7SMiri Korenblit u8 twt_request; 22095da92e7SMiri Korenblit u8 implicit; 22195da92e7SMiri Korenblit u8 twt_group_assignment; 22295da92e7SMiri Korenblit u8 twt_channel; 22395da92e7SMiri Korenblit u8 reserved; 22495da92e7SMiri Korenblit }; /* DHC_TWT_OPERATION_API_S */ 22595da92e7SMiri Korenblit 22695da92e7SMiri Korenblit #endif /* __iwl_fw_api_dhc_h__ */ 227