1 /****************************************************************************** 2 * 3 * This file is provided under a dual BSD/GPLv2 license. When using or 4 * redistributing this file, you may do so under either license. 5 * 6 * GPL LICENSE SUMMARY 7 * 8 * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved. 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of version 2 of the GNU General Public License as 12 * published by the Free Software Foundation. 13 * 14 * This program is distributed in the hope that it will be useful, but 15 * WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 17 * General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110, 22 * USA 23 * 24 * The full GNU General Public License is included in this distribution 25 * in the file called COPYING. 26 * 27 * Contact Information: 28 * Intel Linux Wireless <linuxwifi@intel.com> 29 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 30 * 31 * BSD LICENSE 32 * 33 * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved. 34 * All rights reserved. 35 * 36 * Redistribution and use in source and binary forms, with or without 37 * modification, are permitted provided that the following conditions 38 * are met: 39 * 40 * * Redistributions of source code must retain the above copyright 41 * notice, this list of conditions and the following disclaimer. 42 * * Redistributions in binary form must reproduce the above copyright 43 * notice, this list of conditions and the following disclaimer in 44 * the documentation and/or other materials provided with the 45 * distribution. 46 * * Neither the name Intel Corporation nor the names of its 47 * contributors may be used to endorse or promote products derived 48 * from this software without specific prior written permission. 49 * 50 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 51 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 52 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 53 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 54 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 55 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 56 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 57 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 58 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 59 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 60 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 61 * 62 *****************************************************************************/ 63 /* 64 * Please use this file (commands.h) only for uCode API definitions. 65 * Please use iwl-xxxx-hw.h for hardware-related definitions. 66 * Please use dev.h for driver implementation definitions. 67 */ 68 69 #ifndef __iwl_commands_h__ 70 #define __iwl_commands_h__ 71 72 #include <linux/ieee80211.h> 73 #include <linux/types.h> 74 75 76 enum { 77 REPLY_ALIVE = 0x1, 78 REPLY_ERROR = 0x2, 79 REPLY_ECHO = 0x3, /* test command */ 80 81 /* RXON and QOS commands */ 82 REPLY_RXON = 0x10, 83 REPLY_RXON_ASSOC = 0x11, 84 REPLY_QOS_PARAM = 0x13, 85 REPLY_RXON_TIMING = 0x14, 86 87 /* Multi-Station support */ 88 REPLY_ADD_STA = 0x18, 89 REPLY_REMOVE_STA = 0x19, 90 REPLY_REMOVE_ALL_STA = 0x1a, /* not used */ 91 REPLY_TXFIFO_FLUSH = 0x1e, 92 93 /* Security */ 94 REPLY_WEPKEY = 0x20, 95 96 /* RX, TX, LEDs */ 97 REPLY_TX = 0x1c, 98 REPLY_LEDS_CMD = 0x48, 99 REPLY_TX_LINK_QUALITY_CMD = 0x4e, 100 101 /* WiMAX coexistence */ 102 COEX_PRIORITY_TABLE_CMD = 0x5a, 103 COEX_MEDIUM_NOTIFICATION = 0x5b, 104 COEX_EVENT_CMD = 0x5c, 105 106 /* Calibration */ 107 TEMPERATURE_NOTIFICATION = 0x62, 108 CALIBRATION_CFG_CMD = 0x65, 109 CALIBRATION_RES_NOTIFICATION = 0x66, 110 CALIBRATION_COMPLETE_NOTIFICATION = 0x67, 111 112 /* 802.11h related */ 113 REPLY_QUIET_CMD = 0x71, /* not used */ 114 REPLY_CHANNEL_SWITCH = 0x72, 115 CHANNEL_SWITCH_NOTIFICATION = 0x73, 116 REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74, 117 SPECTRUM_MEASURE_NOTIFICATION = 0x75, 118 119 /* Power Management */ 120 POWER_TABLE_CMD = 0x77, 121 PM_SLEEP_NOTIFICATION = 0x7A, 122 PM_DEBUG_STATISTIC_NOTIFIC = 0x7B, 123 124 /* Scan commands and notifications */ 125 REPLY_SCAN_CMD = 0x80, 126 REPLY_SCAN_ABORT_CMD = 0x81, 127 SCAN_START_NOTIFICATION = 0x82, 128 SCAN_RESULTS_NOTIFICATION = 0x83, 129 SCAN_COMPLETE_NOTIFICATION = 0x84, 130 131 /* IBSS/AP commands */ 132 BEACON_NOTIFICATION = 0x90, 133 REPLY_TX_BEACON = 0x91, 134 WHO_IS_AWAKE_NOTIFICATION = 0x94, /* not used */ 135 136 /* Miscellaneous commands */ 137 REPLY_TX_POWER_DBM_CMD = 0x95, 138 QUIET_NOTIFICATION = 0x96, /* not used */ 139 REPLY_TX_PWR_TABLE_CMD = 0x97, 140 REPLY_TX_POWER_DBM_CMD_V1 = 0x98, /* old version of API */ 141 TX_ANT_CONFIGURATION_CMD = 0x98, 142 MEASURE_ABORT_NOTIFICATION = 0x99, /* not used */ 143 144 /* Bluetooth device coexistence config command */ 145 REPLY_BT_CONFIG = 0x9b, 146 147 /* Statistics */ 148 REPLY_STATISTICS_CMD = 0x9c, 149 STATISTICS_NOTIFICATION = 0x9d, 150 151 /* RF-KILL commands and notifications */ 152 REPLY_CARD_STATE_CMD = 0xa0, 153 CARD_STATE_NOTIFICATION = 0xa1, 154 155 /* Missed beacons notification */ 156 MISSED_BEACONS_NOTIFICATION = 0xa2, 157 158 REPLY_CT_KILL_CONFIG_CMD = 0xa4, 159 SENSITIVITY_CMD = 0xa8, 160 REPLY_PHY_CALIBRATION_CMD = 0xb0, 161 REPLY_RX_PHY_CMD = 0xc0, 162 REPLY_RX_MPDU_CMD = 0xc1, 163 REPLY_RX = 0xc3, 164 REPLY_COMPRESSED_BA = 0xc5, 165 166 /* BT Coex */ 167 REPLY_BT_COEX_PRIO_TABLE = 0xcc, 168 REPLY_BT_COEX_PROT_ENV = 0xcd, 169 REPLY_BT_COEX_PROFILE_NOTIF = 0xce, 170 171 /* PAN commands */ 172 REPLY_WIPAN_PARAMS = 0xb2, 173 REPLY_WIPAN_RXON = 0xb3, /* use REPLY_RXON structure */ 174 REPLY_WIPAN_RXON_TIMING = 0xb4, /* use REPLY_RXON_TIMING structure */ 175 REPLY_WIPAN_RXON_ASSOC = 0xb6, /* use REPLY_RXON_ASSOC structure */ 176 REPLY_WIPAN_QOS_PARAM = 0xb7, /* use REPLY_QOS_PARAM structure */ 177 REPLY_WIPAN_WEPKEY = 0xb8, /* use REPLY_WEPKEY structure */ 178 REPLY_WIPAN_P2P_CHANNEL_SWITCH = 0xb9, 179 REPLY_WIPAN_NOA_NOTIFICATION = 0xbc, 180 REPLY_WIPAN_DEACTIVATION_COMPLETE = 0xbd, 181 182 REPLY_WOWLAN_PATTERNS = 0xe0, 183 REPLY_WOWLAN_WAKEUP_FILTER = 0xe1, 184 REPLY_WOWLAN_TSC_RSC_PARAMS = 0xe2, 185 REPLY_WOWLAN_TKIP_PARAMS = 0xe3, 186 REPLY_WOWLAN_KEK_KCK_MATERIAL = 0xe4, 187 REPLY_WOWLAN_GET_STATUS = 0xe5, 188 REPLY_D3_CONFIG = 0xd3, 189 190 REPLY_MAX = 0xff 191 }; 192 193 /* 194 * Minimum number of queues. MAX_NUM is defined in hw specific files. 195 * Set the minimum to accommodate 196 * - 4 standard TX queues 197 * - the command queue 198 * - 4 PAN TX queues 199 * - the PAN multicast queue, and 200 * - the AUX (TX during scan dwell) queue. 201 */ 202 #define IWL_MIN_NUM_QUEUES 11 203 204 /* 205 * Command queue depends on iPAN support. 206 */ 207 #define IWL_DEFAULT_CMD_QUEUE_NUM 4 208 #define IWL_IPAN_CMD_QUEUE_NUM 9 209 210 #define IWL_TX_FIFO_BK 0 /* shared */ 211 #define IWL_TX_FIFO_BE 1 212 #define IWL_TX_FIFO_VI 2 /* shared */ 213 #define IWL_TX_FIFO_VO 3 214 #define IWL_TX_FIFO_BK_IPAN IWL_TX_FIFO_BK 215 #define IWL_TX_FIFO_BE_IPAN 4 216 #define IWL_TX_FIFO_VI_IPAN IWL_TX_FIFO_VI 217 #define IWL_TX_FIFO_VO_IPAN 5 218 /* re-uses the VO FIFO, uCode will properly flush/schedule */ 219 #define IWL_TX_FIFO_AUX 5 220 #define IWL_TX_FIFO_UNUSED 255 221 222 #define IWLAGN_CMD_FIFO_NUM 7 223 224 /* 225 * This queue number is required for proper operation 226 * because the ucode will stop/start the scheduler as 227 * required. 228 */ 229 #define IWL_IPAN_MCAST_QUEUE 8 230 231 /****************************************************************************** 232 * (0) 233 * Commonly used structures and definitions: 234 * Command header, rate_n_flags, txpower 235 * 236 *****************************************************************************/ 237 238 /** 239 * iwlagn rate_n_flags bit fields 240 * 241 * rate_n_flags format is used in following iwlagn commands: 242 * REPLY_RX (response only) 243 * REPLY_RX_MPDU (response only) 244 * REPLY_TX (both command and response) 245 * REPLY_TX_LINK_QUALITY_CMD 246 * 247 * High-throughput (HT) rate format for bits 7:0 (bit 8 must be "1"): 248 * 2-0: 0) 6 Mbps 249 * 1) 12 Mbps 250 * 2) 18 Mbps 251 * 3) 24 Mbps 252 * 4) 36 Mbps 253 * 5) 48 Mbps 254 * 6) 54 Mbps 255 * 7) 60 Mbps 256 * 257 * 4-3: 0) Single stream (SISO) 258 * 1) Dual stream (MIMO) 259 * 2) Triple stream (MIMO) 260 * 261 * 5: Value of 0x20 in bits 7:0 indicates 6 Mbps HT40 duplicate data 262 * 263 * Legacy OFDM rate format for bits 7:0 (bit 8 must be "0", bit 9 "0"): 264 * 3-0: 0xD) 6 Mbps 265 * 0xF) 9 Mbps 266 * 0x5) 12 Mbps 267 * 0x7) 18 Mbps 268 * 0x9) 24 Mbps 269 * 0xB) 36 Mbps 270 * 0x1) 48 Mbps 271 * 0x3) 54 Mbps 272 * 273 * Legacy CCK rate format for bits 7:0 (bit 8 must be "0", bit 9 "1"): 274 * 6-0: 10) 1 Mbps 275 * 20) 2 Mbps 276 * 55) 5.5 Mbps 277 * 110) 11 Mbps 278 */ 279 #define RATE_MCS_CODE_MSK 0x7 280 #define RATE_MCS_SPATIAL_POS 3 281 #define RATE_MCS_SPATIAL_MSK 0x18 282 #define RATE_MCS_HT_DUP_POS 5 283 #define RATE_MCS_HT_DUP_MSK 0x20 284 /* Both legacy and HT use bits 7:0 as the CCK/OFDM rate or HT MCS */ 285 #define RATE_MCS_RATE_MSK 0xff 286 287 /* Bit 8: (1) HT format, (0) legacy format in bits 7:0 */ 288 #define RATE_MCS_FLAGS_POS 8 289 #define RATE_MCS_HT_POS 8 290 #define RATE_MCS_HT_MSK 0x100 291 292 /* Bit 9: (1) CCK, (0) OFDM. HT (bit 8) must be "0" for this bit to be valid */ 293 #define RATE_MCS_CCK_POS 9 294 #define RATE_MCS_CCK_MSK 0x200 295 296 /* Bit 10: (1) Use Green Field preamble */ 297 #define RATE_MCS_GF_POS 10 298 #define RATE_MCS_GF_MSK 0x400 299 300 /* Bit 11: (1) Use 40Mhz HT40 chnl width, (0) use 20 MHz legacy chnl width */ 301 #define RATE_MCS_HT40_POS 11 302 #define RATE_MCS_HT40_MSK 0x800 303 304 /* Bit 12: (1) Duplicate data on both 20MHz chnls. HT40 (bit 11) must be set. */ 305 #define RATE_MCS_DUP_POS 12 306 #define RATE_MCS_DUP_MSK 0x1000 307 308 /* Bit 13: (1) Short guard interval (0.4 usec), (0) normal GI (0.8 usec) */ 309 #define RATE_MCS_SGI_POS 13 310 #define RATE_MCS_SGI_MSK 0x2000 311 312 /** 313 * rate_n_flags Tx antenna masks 314 * 4965 has 2 transmitters 315 * 5100 has 1 transmitter B 316 * 5150 has 1 transmitter A 317 * 5300 has 3 transmitters 318 * 5350 has 3 transmitters 319 * bit14:16 320 */ 321 #define RATE_MCS_ANT_POS 14 322 #define RATE_MCS_ANT_A_MSK 0x04000 323 #define RATE_MCS_ANT_B_MSK 0x08000 324 #define RATE_MCS_ANT_C_MSK 0x10000 325 #define RATE_MCS_ANT_AB_MSK (RATE_MCS_ANT_A_MSK | RATE_MCS_ANT_B_MSK) 326 #define RATE_MCS_ANT_ABC_MSK (RATE_MCS_ANT_AB_MSK | RATE_MCS_ANT_C_MSK) 327 #define RATE_ANT_NUM 3 328 329 #define POWER_TABLE_NUM_ENTRIES 33 330 #define POWER_TABLE_NUM_HT_OFDM_ENTRIES 32 331 #define POWER_TABLE_CCK_ENTRY 32 332 333 #define IWL_PWR_NUM_HT_OFDM_ENTRIES 24 334 #define IWL_PWR_CCK_ENTRIES 2 335 336 /** 337 * struct tx_power_dual_stream 338 * 339 * Table entries in REPLY_TX_PWR_TABLE_CMD, REPLY_CHANNEL_SWITCH 340 * 341 * Same format as iwl_tx_power_dual_stream, but __le32 342 */ 343 struct tx_power_dual_stream { 344 __le32 dw; 345 } __packed; 346 347 /** 348 * Command REPLY_TX_POWER_DBM_CMD = 0x98 349 * struct iwlagn_tx_power_dbm_cmd 350 */ 351 #define IWLAGN_TX_POWER_AUTO 0x7f 352 #define IWLAGN_TX_POWER_NO_CLOSED (0x1 << 6) 353 354 struct iwlagn_tx_power_dbm_cmd { 355 s8 global_lmt; /*in half-dBm (e.g. 30 = 15 dBm) */ 356 u8 flags; 357 s8 srv_chan_lmt; /*in half-dBm (e.g. 30 = 15 dBm) */ 358 u8 reserved; 359 } __packed; 360 361 /** 362 * Command TX_ANT_CONFIGURATION_CMD = 0x98 363 * This command is used to configure valid Tx antenna. 364 * By default uCode concludes the valid antenna according to the radio flavor. 365 * This command enables the driver to override/modify this conclusion. 366 */ 367 struct iwl_tx_ant_config_cmd { 368 __le32 valid; 369 } __packed; 370 371 /****************************************************************************** 372 * (0a) 373 * Alive and Error Commands & Responses: 374 * 375 *****************************************************************************/ 376 377 #define UCODE_VALID_OK cpu_to_le32(0x1) 378 379 /** 380 * REPLY_ALIVE = 0x1 (response only, not a command) 381 * 382 * uCode issues this "alive" notification once the runtime image is ready 383 * to receive commands from the driver. This is the *second* "alive" 384 * notification that the driver will receive after rebooting uCode; 385 * this "alive" is indicated by subtype field != 9. 386 * 387 * See comments documenting "BSM" (bootstrap state machine). 388 * 389 * This response includes two pointers to structures within the device's 390 * data SRAM (access via HBUS_TARG_MEM_* regs) that are useful for debugging: 391 * 392 * 1) log_event_table_ptr indicates base of the event log. This traces 393 * a 256-entry history of uCode execution within a circular buffer. 394 * Its header format is: 395 * 396 * __le32 log_size; log capacity (in number of entries) 397 * __le32 type; (1) timestamp with each entry, (0) no timestamp 398 * __le32 wraps; # times uCode has wrapped to top of circular buffer 399 * __le32 write_index; next circular buffer entry that uCode would fill 400 * 401 * The header is followed by the circular buffer of log entries. Entries 402 * with timestamps have the following format: 403 * 404 * __le32 event_id; range 0 - 1500 405 * __le32 timestamp; low 32 bits of TSF (of network, if associated) 406 * __le32 data; event_id-specific data value 407 * 408 * Entries without timestamps contain only event_id and data. 409 * 410 * 411 * 2) error_event_table_ptr indicates base of the error log. This contains 412 * information about any uCode error that occurs. For agn, the format 413 * of the error log is defined by struct iwl_error_event_table. 414 * 415 * The Linux driver can print both logs to the system log when a uCode error 416 * occurs. 417 */ 418 419 /* 420 * Note: This structure is read from the device with IO accesses, 421 * and the reading already does the endian conversion. As it is 422 * read with u32-sized accesses, any members with a different size 423 * need to be ordered correctly though! 424 */ 425 struct iwl_error_event_table { 426 u32 valid; /* (nonzero) valid, (0) log is empty */ 427 u32 error_id; /* type of error */ 428 u32 pc; /* program counter */ 429 u32 blink1; /* branch link */ 430 u32 blink2; /* branch link */ 431 u32 ilink1; /* interrupt link */ 432 u32 ilink2; /* interrupt link */ 433 u32 data1; /* error-specific data */ 434 u32 data2; /* error-specific data */ 435 u32 line; /* source code line of error */ 436 u32 bcon_time; /* beacon timer */ 437 u32 tsf_low; /* network timestamp function timer */ 438 u32 tsf_hi; /* network timestamp function timer */ 439 u32 gp1; /* GP1 timer register */ 440 u32 gp2; /* GP2 timer register */ 441 u32 gp3; /* GP3 timer register */ 442 u32 ucode_ver; /* uCode version */ 443 u32 hw_ver; /* HW Silicon version */ 444 u32 brd_ver; /* HW board version */ 445 u32 log_pc; /* log program counter */ 446 u32 frame_ptr; /* frame pointer */ 447 u32 stack_ptr; /* stack pointer */ 448 u32 hcmd; /* last host command header */ 449 u32 isr0; /* isr status register LMPM_NIC_ISR0: 450 * rxtx_flag */ 451 u32 isr1; /* isr status register LMPM_NIC_ISR1: 452 * host_flag */ 453 u32 isr2; /* isr status register LMPM_NIC_ISR2: 454 * enc_flag */ 455 u32 isr3; /* isr status register LMPM_NIC_ISR3: 456 * time_flag */ 457 u32 isr4; /* isr status register LMPM_NIC_ISR4: 458 * wico interrupt */ 459 u32 isr_pref; /* isr status register LMPM_NIC_PREF_STAT */ 460 u32 wait_event; /* wait event() caller address */ 461 u32 l2p_control; /* L2pControlField */ 462 u32 l2p_duration; /* L2pDurationField */ 463 u32 l2p_mhvalid; /* L2pMhValidBits */ 464 u32 l2p_addr_match; /* L2pAddrMatchStat */ 465 u32 lmpm_pmg_sel; /* indicate which clocks are turned on 466 * (LMPM_PMG_SEL) */ 467 u32 u_timestamp; /* indicate when the date and time of the 468 * compilation */ 469 u32 flow_handler; /* FH read/write pointers, RX credit */ 470 } __packed; 471 472 struct iwl_alive_resp { 473 u8 ucode_minor; 474 u8 ucode_major; 475 __le16 reserved1; 476 u8 sw_rev[8]; 477 u8 ver_type; 478 u8 ver_subtype; /* not "9" for runtime alive */ 479 __le16 reserved2; 480 __le32 log_event_table_ptr; /* SRAM address for event log */ 481 __le32 error_event_table_ptr; /* SRAM address for error log */ 482 __le32 timestamp; 483 __le32 is_valid; 484 } __packed; 485 486 /* 487 * REPLY_ERROR = 0x2 (response only, not a command) 488 */ 489 struct iwl_error_resp { 490 __le32 error_type; 491 u8 cmd_id; 492 u8 reserved1; 493 __le16 bad_cmd_seq_num; 494 __le32 error_info; 495 __le64 timestamp; 496 } __packed; 497 498 /****************************************************************************** 499 * (1) 500 * RXON Commands & Responses: 501 * 502 *****************************************************************************/ 503 504 /* 505 * Rx config defines & structure 506 */ 507 /* rx_config device types */ 508 enum { 509 RXON_DEV_TYPE_AP = 1, 510 RXON_DEV_TYPE_ESS = 3, 511 RXON_DEV_TYPE_IBSS = 4, 512 RXON_DEV_TYPE_SNIFFER = 6, 513 RXON_DEV_TYPE_CP = 7, 514 RXON_DEV_TYPE_2STA = 8, 515 RXON_DEV_TYPE_P2P = 9, 516 }; 517 518 519 #define RXON_RX_CHAIN_DRIVER_FORCE_MSK cpu_to_le16(0x1 << 0) 520 #define RXON_RX_CHAIN_DRIVER_FORCE_POS (0) 521 #define RXON_RX_CHAIN_VALID_MSK cpu_to_le16(0x7 << 1) 522 #define RXON_RX_CHAIN_VALID_POS (1) 523 #define RXON_RX_CHAIN_FORCE_SEL_MSK cpu_to_le16(0x7 << 4) 524 #define RXON_RX_CHAIN_FORCE_SEL_POS (4) 525 #define RXON_RX_CHAIN_FORCE_MIMO_SEL_MSK cpu_to_le16(0x7 << 7) 526 #define RXON_RX_CHAIN_FORCE_MIMO_SEL_POS (7) 527 #define RXON_RX_CHAIN_CNT_MSK cpu_to_le16(0x3 << 10) 528 #define RXON_RX_CHAIN_CNT_POS (10) 529 #define RXON_RX_CHAIN_MIMO_CNT_MSK cpu_to_le16(0x3 << 12) 530 #define RXON_RX_CHAIN_MIMO_CNT_POS (12) 531 #define RXON_RX_CHAIN_MIMO_FORCE_MSK cpu_to_le16(0x1 << 14) 532 #define RXON_RX_CHAIN_MIMO_FORCE_POS (14) 533 534 /* rx_config flags */ 535 /* band & modulation selection */ 536 #define RXON_FLG_BAND_24G_MSK cpu_to_le32(1 << 0) 537 #define RXON_FLG_CCK_MSK cpu_to_le32(1 << 1) 538 /* auto detection enable */ 539 #define RXON_FLG_AUTO_DETECT_MSK cpu_to_le32(1 << 2) 540 /* TGg protection when tx */ 541 #define RXON_FLG_TGG_PROTECT_MSK cpu_to_le32(1 << 3) 542 /* cck short slot & preamble */ 543 #define RXON_FLG_SHORT_SLOT_MSK cpu_to_le32(1 << 4) 544 #define RXON_FLG_SHORT_PREAMBLE_MSK cpu_to_le32(1 << 5) 545 /* antenna selection */ 546 #define RXON_FLG_DIS_DIV_MSK cpu_to_le32(1 << 7) 547 #define RXON_FLG_ANT_SEL_MSK cpu_to_le32(0x0f00) 548 #define RXON_FLG_ANT_A_MSK cpu_to_le32(1 << 8) 549 #define RXON_FLG_ANT_B_MSK cpu_to_le32(1 << 9) 550 /* radar detection enable */ 551 #define RXON_FLG_RADAR_DETECT_MSK cpu_to_le32(1 << 12) 552 #define RXON_FLG_TGJ_NARROW_BAND_MSK cpu_to_le32(1 << 13) 553 /* rx response to host with 8-byte TSF 554 * (according to ON_AIR deassertion) */ 555 #define RXON_FLG_TSF2HOST_MSK cpu_to_le32(1 << 15) 556 557 558 /* HT flags */ 559 #define RXON_FLG_CTRL_CHANNEL_LOC_POS (22) 560 #define RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK cpu_to_le32(0x1 << 22) 561 562 #define RXON_FLG_HT_OPERATING_MODE_POS (23) 563 564 #define RXON_FLG_HT_PROT_MSK cpu_to_le32(0x1 << 23) 565 #define RXON_FLG_HT40_PROT_MSK cpu_to_le32(0x2 << 23) 566 567 #define RXON_FLG_CHANNEL_MODE_POS (25) 568 #define RXON_FLG_CHANNEL_MODE_MSK cpu_to_le32(0x3 << 25) 569 570 /* channel mode */ 571 enum { 572 CHANNEL_MODE_LEGACY = 0, 573 CHANNEL_MODE_PURE_40 = 1, 574 CHANNEL_MODE_MIXED = 2, 575 CHANNEL_MODE_RESERVED = 3, 576 }; 577 #define RXON_FLG_CHANNEL_MODE_LEGACY cpu_to_le32(CHANNEL_MODE_LEGACY << RXON_FLG_CHANNEL_MODE_POS) 578 #define RXON_FLG_CHANNEL_MODE_PURE_40 cpu_to_le32(CHANNEL_MODE_PURE_40 << RXON_FLG_CHANNEL_MODE_POS) 579 #define RXON_FLG_CHANNEL_MODE_MIXED cpu_to_le32(CHANNEL_MODE_MIXED << RXON_FLG_CHANNEL_MODE_POS) 580 581 /* CTS to self (if spec allows) flag */ 582 #define RXON_FLG_SELF_CTS_EN cpu_to_le32(0x1<<30) 583 584 /* rx_config filter flags */ 585 /* accept all data frames */ 586 #define RXON_FILTER_PROMISC_MSK cpu_to_le32(1 << 0) 587 /* pass control & management to host */ 588 #define RXON_FILTER_CTL2HOST_MSK cpu_to_le32(1 << 1) 589 /* accept multi-cast */ 590 #define RXON_FILTER_ACCEPT_GRP_MSK cpu_to_le32(1 << 2) 591 /* don't decrypt uni-cast frames */ 592 #define RXON_FILTER_DIS_DECRYPT_MSK cpu_to_le32(1 << 3) 593 /* don't decrypt multi-cast frames */ 594 #define RXON_FILTER_DIS_GRP_DECRYPT_MSK cpu_to_le32(1 << 4) 595 /* STA is associated */ 596 #define RXON_FILTER_ASSOC_MSK cpu_to_le32(1 << 5) 597 /* transfer to host non bssid beacons in associated state */ 598 #define RXON_FILTER_BCON_AWARE_MSK cpu_to_le32(1 << 6) 599 600 /** 601 * REPLY_RXON = 0x10 (command, has simple generic response) 602 * 603 * RXON tunes the radio tuner to a service channel, and sets up a number 604 * of parameters that are used primarily for Rx, but also for Tx operations. 605 * 606 * NOTE: When tuning to a new channel, driver must set the 607 * RXON_FILTER_ASSOC_MSK to 0. This will clear station-dependent 608 * info within the device, including the station tables, tx retry 609 * rate tables, and txpower tables. Driver must build a new station 610 * table and txpower table before transmitting anything on the RXON 611 * channel. 612 * 613 * NOTE: All RXONs wipe clean the internal txpower table. Driver must 614 * issue a new REPLY_TX_PWR_TABLE_CMD after each REPLY_RXON (0x10), 615 * regardless of whether RXON_FILTER_ASSOC_MSK is set. 616 */ 617 618 struct iwl_rxon_cmd { 619 u8 node_addr[6]; 620 __le16 reserved1; 621 u8 bssid_addr[6]; 622 __le16 reserved2; 623 u8 wlap_bssid_addr[6]; 624 __le16 reserved3; 625 u8 dev_type; 626 u8 air_propagation; 627 __le16 rx_chain; 628 u8 ofdm_basic_rates; 629 u8 cck_basic_rates; 630 __le16 assoc_id; 631 __le32 flags; 632 __le32 filter_flags; 633 __le16 channel; 634 u8 ofdm_ht_single_stream_basic_rates; 635 u8 ofdm_ht_dual_stream_basic_rates; 636 u8 ofdm_ht_triple_stream_basic_rates; 637 u8 reserved5; 638 __le16 acquisition_data; 639 __le16 reserved6; 640 } __packed; 641 642 /* 643 * REPLY_RXON_ASSOC = 0x11 (command, has simple generic response) 644 */ 645 struct iwl_rxon_assoc_cmd { 646 __le32 flags; 647 __le32 filter_flags; 648 u8 ofdm_basic_rates; 649 u8 cck_basic_rates; 650 __le16 reserved1; 651 u8 ofdm_ht_single_stream_basic_rates; 652 u8 ofdm_ht_dual_stream_basic_rates; 653 u8 ofdm_ht_triple_stream_basic_rates; 654 u8 reserved2; 655 __le16 rx_chain_select_flags; 656 __le16 acquisition_data; 657 __le32 reserved3; 658 } __packed; 659 660 #define IWL_CONN_MAX_LISTEN_INTERVAL 10 661 #define IWL_MAX_UCODE_BEACON_INTERVAL 4 /* 4096 */ 662 663 /* 664 * REPLY_RXON_TIMING = 0x14 (command, has simple generic response) 665 */ 666 struct iwl_rxon_time_cmd { 667 __le64 timestamp; 668 __le16 beacon_interval; 669 __le16 atim_window; 670 __le32 beacon_init_val; 671 __le16 listen_interval; 672 u8 dtim_period; 673 u8 delta_cp_bss_tbtts; 674 } __packed; 675 676 /* 677 * REPLY_CHANNEL_SWITCH = 0x72 (command, has simple generic response) 678 */ 679 /** 680 * struct iwl5000_channel_switch_cmd 681 * @band: 0- 5.2GHz, 1- 2.4GHz 682 * @expect_beacon: 0- resume transmits after channel switch 683 * 1- wait for beacon to resume transmits 684 * @channel: new channel number 685 * @rxon_flags: Rx on flags 686 * @rxon_filter_flags: filtering parameters 687 * @switch_time: switch time in extended beacon format 688 * @reserved: reserved bytes 689 */ 690 struct iwl5000_channel_switch_cmd { 691 u8 band; 692 u8 expect_beacon; 693 __le16 channel; 694 __le32 rxon_flags; 695 __le32 rxon_filter_flags; 696 __le32 switch_time; 697 __le32 reserved[2][IWL_PWR_NUM_HT_OFDM_ENTRIES + IWL_PWR_CCK_ENTRIES]; 698 } __packed; 699 700 /** 701 * struct iwl6000_channel_switch_cmd 702 * @band: 0- 5.2GHz, 1- 2.4GHz 703 * @expect_beacon: 0- resume transmits after channel switch 704 * 1- wait for beacon to resume transmits 705 * @channel: new channel number 706 * @rxon_flags: Rx on flags 707 * @rxon_filter_flags: filtering parameters 708 * @switch_time: switch time in extended beacon format 709 * @reserved: reserved bytes 710 */ 711 struct iwl6000_channel_switch_cmd { 712 u8 band; 713 u8 expect_beacon; 714 __le16 channel; 715 __le32 rxon_flags; 716 __le32 rxon_filter_flags; 717 __le32 switch_time; 718 __le32 reserved[3][IWL_PWR_NUM_HT_OFDM_ENTRIES + IWL_PWR_CCK_ENTRIES]; 719 } __packed; 720 721 /* 722 * CHANNEL_SWITCH_NOTIFICATION = 0x73 (notification only, not a command) 723 */ 724 struct iwl_csa_notification { 725 __le16 band; 726 __le16 channel; 727 __le32 status; /* 0 - OK, 1 - fail */ 728 } __packed; 729 730 /****************************************************************************** 731 * (2) 732 * Quality-of-Service (QOS) Commands & Responses: 733 * 734 *****************************************************************************/ 735 736 /** 737 * struct iwl_ac_qos -- QOS timing params for REPLY_QOS_PARAM 738 * One for each of 4 EDCA access categories in struct iwl_qosparam_cmd 739 * 740 * @cw_min: Contention window, start value in numbers of slots. 741 * Should be a power-of-2, minus 1. Device's default is 0x0f. 742 * @cw_max: Contention window, max value in numbers of slots. 743 * Should be a power-of-2, minus 1. Device's default is 0x3f. 744 * @aifsn: Number of slots in Arbitration Interframe Space (before 745 * performing random backoff timing prior to Tx). Device default 1. 746 * @edca_txop: Length of Tx opportunity, in uSecs. Device default is 0. 747 * 748 * Device will automatically increase contention window by (2*CW) + 1 for each 749 * transmission retry. Device uses cw_max as a bit mask, ANDed with new CW 750 * value, to cap the CW value. 751 */ 752 struct iwl_ac_qos { 753 __le16 cw_min; 754 __le16 cw_max; 755 u8 aifsn; 756 u8 reserved1; 757 __le16 edca_txop; 758 } __packed; 759 760 /* QoS flags defines */ 761 #define QOS_PARAM_FLG_UPDATE_EDCA_MSK cpu_to_le32(0x01) 762 #define QOS_PARAM_FLG_TGN_MSK cpu_to_le32(0x02) 763 #define QOS_PARAM_FLG_TXOP_TYPE_MSK cpu_to_le32(0x10) 764 765 /* Number of Access Categories (AC) (EDCA), queues 0..3 */ 766 #define AC_NUM 4 767 768 /* 769 * REPLY_QOS_PARAM = 0x13 (command, has simple generic response) 770 * 771 * This command sets up timings for each of the 4 prioritized EDCA Tx FIFOs 772 * 0: Background, 1: Best Effort, 2: Video, 3: Voice. 773 */ 774 struct iwl_qosparam_cmd { 775 __le32 qos_flags; 776 struct iwl_ac_qos ac[AC_NUM]; 777 } __packed; 778 779 /****************************************************************************** 780 * (3) 781 * Add/Modify Stations Commands & Responses: 782 * 783 *****************************************************************************/ 784 /* 785 * Multi station support 786 */ 787 788 /* Special, dedicated locations within device's station table */ 789 #define IWL_AP_ID 0 790 #define IWL_AP_ID_PAN 1 791 #define IWL_STA_ID 2 792 #define IWLAGN_PAN_BCAST_ID 14 793 #define IWLAGN_BROADCAST_ID 15 794 #define IWLAGN_STATION_COUNT 16 795 796 #define IWL_TID_NON_QOS IWL_MAX_TID_COUNT 797 798 #define STA_FLG_TX_RATE_MSK cpu_to_le32(1 << 2) 799 #define STA_FLG_PWR_SAVE_MSK cpu_to_le32(1 << 8) 800 #define STA_FLG_PAN_STATION cpu_to_le32(1 << 13) 801 #define STA_FLG_RTS_MIMO_PROT_MSK cpu_to_le32(1 << 17) 802 #define STA_FLG_AGG_MPDU_8US_MSK cpu_to_le32(1 << 18) 803 #define STA_FLG_MAX_AGG_SIZE_POS (19) 804 #define STA_FLG_MAX_AGG_SIZE_MSK cpu_to_le32(3 << 19) 805 #define STA_FLG_HT40_EN_MSK cpu_to_le32(1 << 21) 806 #define STA_FLG_MIMO_DIS_MSK cpu_to_le32(1 << 22) 807 #define STA_FLG_AGG_MPDU_DENSITY_POS (23) 808 #define STA_FLG_AGG_MPDU_DENSITY_MSK cpu_to_le32(7 << 23) 809 810 /* Use in mode field. 1: modify existing entry, 0: add new station entry */ 811 #define STA_CONTROL_MODIFY_MSK 0x01 812 813 /* key flags __le16*/ 814 #define STA_KEY_FLG_ENCRYPT_MSK cpu_to_le16(0x0007) 815 #define STA_KEY_FLG_NO_ENC cpu_to_le16(0x0000) 816 #define STA_KEY_FLG_WEP cpu_to_le16(0x0001) 817 #define STA_KEY_FLG_CCMP cpu_to_le16(0x0002) 818 #define STA_KEY_FLG_TKIP cpu_to_le16(0x0003) 819 820 #define STA_KEY_FLG_KEYID_POS 8 821 #define STA_KEY_FLG_INVALID cpu_to_le16(0x0800) 822 /* wep key is either from global key (0) or from station info array (1) */ 823 #define STA_KEY_FLG_MAP_KEY_MSK cpu_to_le16(0x0008) 824 825 /* wep key in STA: 5-bytes (0) or 13-bytes (1) */ 826 #define STA_KEY_FLG_KEY_SIZE_MSK cpu_to_le16(0x1000) 827 #define STA_KEY_MULTICAST_MSK cpu_to_le16(0x4000) 828 #define STA_KEY_MAX_NUM 8 829 #define STA_KEY_MAX_NUM_PAN 16 830 /* must not match WEP_INVALID_OFFSET */ 831 #define IWLAGN_HW_KEY_DEFAULT 0xfe 832 833 /* Flags indicate whether to modify vs. don't change various station params */ 834 #define STA_MODIFY_KEY_MASK 0x01 835 #define STA_MODIFY_TID_DISABLE_TX 0x02 836 #define STA_MODIFY_TX_RATE_MSK 0x04 837 #define STA_MODIFY_ADDBA_TID_MSK 0x08 838 #define STA_MODIFY_DELBA_TID_MSK 0x10 839 #define STA_MODIFY_SLEEP_TX_COUNT_MSK 0x20 840 841 /* agn */ 842 struct iwl_keyinfo { 843 __le16 key_flags; 844 u8 tkip_rx_tsc_byte2; /* TSC[2] for key mix ph1 detection */ 845 u8 reserved1; 846 __le16 tkip_rx_ttak[5]; /* 10-byte unicast TKIP TTAK */ 847 u8 key_offset; 848 u8 reserved2; 849 u8 key[16]; /* 16-byte unicast decryption key */ 850 __le64 tx_secur_seq_cnt; 851 __le64 hw_tkip_mic_rx_key; 852 __le64 hw_tkip_mic_tx_key; 853 } __packed; 854 855 /** 856 * struct sta_id_modify 857 * @addr[ETH_ALEN]: station's MAC address 858 * @sta_id: index of station in uCode's station table 859 * @modify_mask: STA_MODIFY_*, 1: modify, 0: don't change 860 * 861 * Driver selects unused table index when adding new station, 862 * or the index to a pre-existing station entry when modifying that station. 863 * Some indexes have special purposes (IWL_AP_ID, index 0, is for AP). 864 * 865 * modify_mask flags select which parameters to modify vs. leave alone. 866 */ 867 struct sta_id_modify { 868 u8 addr[ETH_ALEN]; 869 __le16 reserved1; 870 u8 sta_id; 871 u8 modify_mask; 872 __le16 reserved2; 873 } __packed; 874 875 /* 876 * REPLY_ADD_STA = 0x18 (command) 877 * 878 * The device contains an internal table of per-station information, 879 * with info on security keys, aggregation parameters, and Tx rates for 880 * initial Tx attempt and any retries (agn devices uses 881 * REPLY_TX_LINK_QUALITY_CMD, 882 * 883 * REPLY_ADD_STA sets up the table entry for one station, either creating 884 * a new entry, or modifying a pre-existing one. 885 * 886 * NOTE: RXON command (without "associated" bit set) wipes the station table 887 * clean. Moving into RF_KILL state does this also. Driver must set up 888 * new station table before transmitting anything on the RXON channel 889 * (except active scans or active measurements; those commands carry 890 * their own txpower/rate setup data). 891 * 892 * When getting started on a new channel, driver must set up the 893 * IWL_BROADCAST_ID entry (last entry in the table). For a client 894 * station in a BSS, once an AP is selected, driver sets up the AP STA 895 * in the IWL_AP_ID entry (1st entry in the table). BROADCAST and AP 896 * are all that are needed for a BSS client station. If the device is 897 * used as AP, or in an IBSS network, driver must set up station table 898 * entries for all STAs in network, starting with index IWL_STA_ID. 899 */ 900 901 struct iwl_addsta_cmd { 902 u8 mode; /* 1: modify existing, 0: add new station */ 903 u8 reserved[3]; 904 struct sta_id_modify sta; 905 struct iwl_keyinfo key; 906 __le32 station_flags; /* STA_FLG_* */ 907 __le32 station_flags_msk; /* STA_FLG_* */ 908 909 /* bit field to disable (1) or enable (0) Tx for Traffic ID (TID) 910 * corresponding to bit (e.g. bit 5 controls TID 5). 911 * Set modify_mask bit STA_MODIFY_TID_DISABLE_TX to use this field. */ 912 __le16 tid_disable_tx; 913 __le16 legacy_reserved; 914 915 /* TID for which to add block-ack support. 916 * Set modify_mask bit STA_MODIFY_ADDBA_TID_MSK to use this field. */ 917 u8 add_immediate_ba_tid; 918 919 /* TID for which to remove block-ack support. 920 * Set modify_mask bit STA_MODIFY_DELBA_TID_MSK to use this field. */ 921 u8 remove_immediate_ba_tid; 922 923 /* Starting Sequence Number for added block-ack support. 924 * Set modify_mask bit STA_MODIFY_ADDBA_TID_MSK to use this field. */ 925 __le16 add_immediate_ba_ssn; 926 927 /* 928 * Number of packets OK to transmit to station even though 929 * it is asleep -- used to synchronise PS-poll and u-APSD 930 * responses while ucode keeps track of STA sleep state. 931 */ 932 __le16 sleep_tx_count; 933 934 __le16 reserved2; 935 } __packed; 936 937 938 #define ADD_STA_SUCCESS_MSK 0x1 939 #define ADD_STA_NO_ROOM_IN_TABLE 0x2 940 #define ADD_STA_NO_BLOCK_ACK_RESOURCE 0x4 941 #define ADD_STA_MODIFY_NON_EXIST_STA 0x8 942 /* 943 * REPLY_ADD_STA = 0x18 (response) 944 */ 945 struct iwl_add_sta_resp { 946 u8 status; /* ADD_STA_* */ 947 } __packed; 948 949 #define REM_STA_SUCCESS_MSK 0x1 950 /* 951 * REPLY_REM_STA = 0x19 (response) 952 */ 953 struct iwl_rem_sta_resp { 954 u8 status; 955 } __packed; 956 957 /* 958 * REPLY_REM_STA = 0x19 (command) 959 */ 960 struct iwl_rem_sta_cmd { 961 u8 num_sta; /* number of removed stations */ 962 u8 reserved[3]; 963 u8 addr[ETH_ALEN]; /* MAC addr of the first station */ 964 u8 reserved2[2]; 965 } __packed; 966 967 968 /* WiFi queues mask */ 969 #define IWL_SCD_BK_MSK BIT(0) 970 #define IWL_SCD_BE_MSK BIT(1) 971 #define IWL_SCD_VI_MSK BIT(2) 972 #define IWL_SCD_VO_MSK BIT(3) 973 #define IWL_SCD_MGMT_MSK BIT(3) 974 975 /* PAN queues mask */ 976 #define IWL_PAN_SCD_BK_MSK BIT(4) 977 #define IWL_PAN_SCD_BE_MSK BIT(5) 978 #define IWL_PAN_SCD_VI_MSK BIT(6) 979 #define IWL_PAN_SCD_VO_MSK BIT(7) 980 #define IWL_PAN_SCD_MGMT_MSK BIT(7) 981 #define IWL_PAN_SCD_MULTICAST_MSK BIT(8) 982 983 #define IWL_AGG_TX_QUEUE_MSK 0xffc00 984 985 #define IWL_DROP_ALL BIT(1) 986 987 /* 988 * REPLY_TXFIFO_FLUSH = 0x1e(command and response) 989 * 990 * When using full FIFO flush this command checks the scheduler HW block WR/RD 991 * pointers to check if all the frames were transferred by DMA into the 992 * relevant TX FIFO queue. Only when the DMA is finished and the queue is 993 * empty the command can finish. 994 * This command is used to flush the TXFIFO from transmit commands, it may 995 * operate on single or multiple queues, the command queue can't be flushed by 996 * this command. The command response is returned when all the queue flush 997 * operations are done. Each TX command flushed return response with the FLUSH 998 * status set in the TX response status. When FIFO flush operation is used, 999 * the flush operation ends when both the scheduler DMA done and TXFIFO empty 1000 * are set. 1001 * 1002 * @queue_control: bit mask for which queues to flush 1003 * @flush_control: flush controls 1004 * 0: Dump single MSDU 1005 * 1: Dump multiple MSDU according to PS, INVALID STA, TTL, TID disable. 1006 * 2: Dump all FIFO 1007 */ 1008 struct iwl_txfifo_flush_cmd_v3 { 1009 __le32 queue_control; 1010 __le16 flush_control; 1011 __le16 reserved; 1012 } __packed; 1013 1014 struct iwl_txfifo_flush_cmd_v2 { 1015 __le16 queue_control; 1016 __le16 flush_control; 1017 } __packed; 1018 1019 /* 1020 * REPLY_WEP_KEY = 0x20 1021 */ 1022 struct iwl_wep_key { 1023 u8 key_index; 1024 u8 key_offset; 1025 u8 reserved1[2]; 1026 u8 key_size; 1027 u8 reserved2[3]; 1028 u8 key[16]; 1029 } __packed; 1030 1031 struct iwl_wep_cmd { 1032 u8 num_keys; 1033 u8 global_key_type; 1034 u8 flags; 1035 u8 reserved; 1036 struct iwl_wep_key key[0]; 1037 } __packed; 1038 1039 #define WEP_KEY_WEP_TYPE 1 1040 #define WEP_KEYS_MAX 4 1041 #define WEP_INVALID_OFFSET 0xff 1042 #define WEP_KEY_LEN_64 5 1043 #define WEP_KEY_LEN_128 13 1044 1045 /****************************************************************************** 1046 * (4) 1047 * Rx Responses: 1048 * 1049 *****************************************************************************/ 1050 1051 #define RX_RES_STATUS_NO_CRC32_ERROR cpu_to_le32(1 << 0) 1052 #define RX_RES_STATUS_NO_RXE_OVERFLOW cpu_to_le32(1 << 1) 1053 1054 #define RX_RES_PHY_FLAGS_BAND_24_MSK cpu_to_le16(1 << 0) 1055 #define RX_RES_PHY_FLAGS_MOD_CCK_MSK cpu_to_le16(1 << 1) 1056 #define RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK cpu_to_le16(1 << 2) 1057 #define RX_RES_PHY_FLAGS_NARROW_BAND_MSK cpu_to_le16(1 << 3) 1058 #define RX_RES_PHY_FLAGS_ANTENNA_MSK 0x70 1059 #define RX_RES_PHY_FLAGS_ANTENNA_POS 4 1060 #define RX_RES_PHY_FLAGS_AGG_MSK cpu_to_le16(1 << 7) 1061 1062 #define RX_RES_STATUS_SEC_TYPE_MSK (0x7 << 8) 1063 #define RX_RES_STATUS_SEC_TYPE_NONE (0x0 << 8) 1064 #define RX_RES_STATUS_SEC_TYPE_WEP (0x1 << 8) 1065 #define RX_RES_STATUS_SEC_TYPE_CCMP (0x2 << 8) 1066 #define RX_RES_STATUS_SEC_TYPE_TKIP (0x3 << 8) 1067 #define RX_RES_STATUS_SEC_TYPE_ERR (0x7 << 8) 1068 1069 #define RX_RES_STATUS_STATION_FOUND (1<<6) 1070 #define RX_RES_STATUS_NO_STATION_INFO_MISMATCH (1<<7) 1071 1072 #define RX_RES_STATUS_DECRYPT_TYPE_MSK (0x3 << 11) 1073 #define RX_RES_STATUS_NOT_DECRYPT (0x0 << 11) 1074 #define RX_RES_STATUS_DECRYPT_OK (0x3 << 11) 1075 #define RX_RES_STATUS_BAD_ICV_MIC (0x1 << 11) 1076 #define RX_RES_STATUS_BAD_KEY_TTAK (0x2 << 11) 1077 1078 #define RX_MPDU_RES_STATUS_ICV_OK (0x20) 1079 #define RX_MPDU_RES_STATUS_MIC_OK (0x40) 1080 #define RX_MPDU_RES_STATUS_TTAK_OK (1 << 7) 1081 #define RX_MPDU_RES_STATUS_DEC_DONE_MSK (0x800) 1082 1083 1084 #define IWLAGN_RX_RES_PHY_CNT 8 1085 #define IWLAGN_RX_RES_AGC_IDX 1 1086 #define IWLAGN_RX_RES_RSSI_AB_IDX 2 1087 #define IWLAGN_RX_RES_RSSI_C_IDX 3 1088 #define IWLAGN_OFDM_AGC_MSK 0xfe00 1089 #define IWLAGN_OFDM_AGC_BIT_POS 9 1090 #define IWLAGN_OFDM_RSSI_INBAND_A_BITMSK 0x00ff 1091 #define IWLAGN_OFDM_RSSI_ALLBAND_A_BITMSK 0xff00 1092 #define IWLAGN_OFDM_RSSI_A_BIT_POS 0 1093 #define IWLAGN_OFDM_RSSI_INBAND_B_BITMSK 0xff0000 1094 #define IWLAGN_OFDM_RSSI_ALLBAND_B_BITMSK 0xff000000 1095 #define IWLAGN_OFDM_RSSI_B_BIT_POS 16 1096 #define IWLAGN_OFDM_RSSI_INBAND_C_BITMSK 0x00ff 1097 #define IWLAGN_OFDM_RSSI_ALLBAND_C_BITMSK 0xff00 1098 #define IWLAGN_OFDM_RSSI_C_BIT_POS 0 1099 1100 struct iwlagn_non_cfg_phy { 1101 __le32 non_cfg_phy[IWLAGN_RX_RES_PHY_CNT]; /* up to 8 phy entries */ 1102 } __packed; 1103 1104 1105 /* 1106 * REPLY_RX = 0xc3 (response only, not a command) 1107 * Used only for legacy (non 11n) frames. 1108 */ 1109 struct iwl_rx_phy_res { 1110 u8 non_cfg_phy_cnt; /* non configurable DSP phy data byte count */ 1111 u8 cfg_phy_cnt; /* configurable DSP phy data byte count */ 1112 u8 stat_id; /* configurable DSP phy data set ID */ 1113 u8 reserved1; 1114 __le64 timestamp; /* TSF at on air rise */ 1115 __le32 beacon_time_stamp; /* beacon at on-air rise */ 1116 __le16 phy_flags; /* general phy flags: band, modulation, ... */ 1117 __le16 channel; /* channel number */ 1118 u8 non_cfg_phy_buf[32]; /* for various implementations of non_cfg_phy */ 1119 __le32 rate_n_flags; /* RATE_MCS_* */ 1120 __le16 byte_count; /* frame's byte-count */ 1121 __le16 frame_time; /* frame's time on the air */ 1122 } __packed; 1123 1124 struct iwl_rx_mpdu_res_start { 1125 __le16 byte_count; 1126 __le16 reserved; 1127 } __packed; 1128 1129 1130 /****************************************************************************** 1131 * (5) 1132 * Tx Commands & Responses: 1133 * 1134 * Driver must place each REPLY_TX command into one of the prioritized Tx 1135 * queues in host DRAM, shared between driver and device (see comments for 1136 * SCD registers and Tx/Rx Queues). When the device's Tx scheduler and uCode 1137 * are preparing to transmit, the device pulls the Tx command over the PCI 1138 * bus via one of the device's Tx DMA channels, to fill an internal FIFO 1139 * from which data will be transmitted. 1140 * 1141 * uCode handles all timing and protocol related to control frames 1142 * (RTS/CTS/ACK), based on flags in the Tx command. uCode and Tx scheduler 1143 * handle reception of block-acks; uCode updates the host driver via 1144 * REPLY_COMPRESSED_BA. 1145 * 1146 * uCode handles retrying Tx when an ACK is expected but not received. 1147 * This includes trying lower data rates than the one requested in the Tx 1148 * command, as set up by the REPLY_TX_LINK_QUALITY_CMD (agn). 1149 * 1150 * Driver sets up transmit power for various rates via REPLY_TX_PWR_TABLE_CMD. 1151 * This command must be executed after every RXON command, before Tx can occur. 1152 *****************************************************************************/ 1153 1154 /* REPLY_TX Tx flags field */ 1155 1156 /* 1157 * 1: Use RTS/CTS protocol or CTS-to-self if spec allows it 1158 * before this frame. if CTS-to-self required check 1159 * RXON_FLG_SELF_CTS_EN status. 1160 */ 1161 #define TX_CMD_FLG_PROT_REQUIRE_MSK cpu_to_le32(1 << 0) 1162 1163 /* 1: Expect ACK from receiving station 1164 * 0: Don't expect ACK (MAC header's duration field s/b 0) 1165 * Set this for unicast frames, but not broadcast/multicast. */ 1166 #define TX_CMD_FLG_ACK_MSK cpu_to_le32(1 << 3) 1167 1168 /* For agn devices: 1169 * 1: Use rate scale table (see REPLY_TX_LINK_QUALITY_CMD). 1170 * Tx command's initial_rate_index indicates first rate to try; 1171 * uCode walks through table for additional Tx attempts. 1172 * 0: Use Tx rate/MCS from Tx command's rate_n_flags field. 1173 * This rate will be used for all Tx attempts; it will not be scaled. */ 1174 #define TX_CMD_FLG_STA_RATE_MSK cpu_to_le32(1 << 4) 1175 1176 /* 1: Expect immediate block-ack. 1177 * Set when Txing a block-ack request frame. Also set TX_CMD_FLG_ACK_MSK. */ 1178 #define TX_CMD_FLG_IMM_BA_RSP_MASK cpu_to_le32(1 << 6) 1179 1180 /* Tx antenna selection field; reserved (0) for agn devices. */ 1181 #define TX_CMD_FLG_ANT_SEL_MSK cpu_to_le32(0xf00) 1182 1183 /* 1: Ignore Bluetooth priority for this frame. 1184 * 0: Delay Tx until Bluetooth device is done (normal usage). */ 1185 #define TX_CMD_FLG_IGNORE_BT cpu_to_le32(1 << 12) 1186 1187 /* 1: uCode overrides sequence control field in MAC header. 1188 * 0: Driver provides sequence control field in MAC header. 1189 * Set this for management frames, non-QOS data frames, non-unicast frames, 1190 * and also in Tx command embedded in REPLY_SCAN_CMD for active scans. */ 1191 #define TX_CMD_FLG_SEQ_CTL_MSK cpu_to_le32(1 << 13) 1192 1193 /* 1: This frame is non-last MPDU; more fragments are coming. 1194 * 0: Last fragment, or not using fragmentation. */ 1195 #define TX_CMD_FLG_MORE_FRAG_MSK cpu_to_le32(1 << 14) 1196 1197 /* 1: uCode calculates and inserts Timestamp Function (TSF) in outgoing frame. 1198 * 0: No TSF required in outgoing frame. 1199 * Set this for transmitting beacons and probe responses. */ 1200 #define TX_CMD_FLG_TSF_MSK cpu_to_le32(1 << 16) 1201 1202 /* 1: Driver inserted 2 bytes pad after the MAC header, for (required) dword 1203 * alignment of frame's payload data field. 1204 * 0: No pad 1205 * Set this for MAC headers with 26 or 30 bytes, i.e. those with QOS or ADDR4 1206 * field (but not both). Driver must align frame data (i.e. data following 1207 * MAC header) to DWORD boundary. */ 1208 #define TX_CMD_FLG_MH_PAD_MSK cpu_to_le32(1 << 20) 1209 1210 /* accelerate aggregation support 1211 * 0 - no CCMP encryption; 1 - CCMP encryption */ 1212 #define TX_CMD_FLG_AGG_CCMP_MSK cpu_to_le32(1 << 22) 1213 1214 /* HCCA-AP - disable duration overwriting. */ 1215 #define TX_CMD_FLG_DUR_MSK cpu_to_le32(1 << 25) 1216 1217 1218 /* 1219 * TX command security control 1220 */ 1221 #define TX_CMD_SEC_WEP 0x01 1222 #define TX_CMD_SEC_CCM 0x02 1223 #define TX_CMD_SEC_TKIP 0x03 1224 #define TX_CMD_SEC_MSK 0x03 1225 #define TX_CMD_SEC_SHIFT 6 1226 #define TX_CMD_SEC_KEY128 0x08 1227 1228 /* 1229 * REPLY_TX = 0x1c (command) 1230 */ 1231 1232 /* 1233 * 4965 uCode updates these Tx attempt count values in host DRAM. 1234 * Used for managing Tx retries when expecting block-acks. 1235 * Driver should set these fields to 0. 1236 */ 1237 struct iwl_dram_scratch { 1238 u8 try_cnt; /* Tx attempts */ 1239 u8 bt_kill_cnt; /* Tx attempts blocked by Bluetooth device */ 1240 __le16 reserved; 1241 } __packed; 1242 1243 struct iwl_tx_cmd { 1244 /* 1245 * MPDU byte count: 1246 * MAC header (24/26/30/32 bytes) + 2 bytes pad if 26/30 header size, 1247 * + 8 byte IV for CCM or TKIP (not used for WEP) 1248 * + Data payload 1249 * + 8-byte MIC (not used for CCM/WEP) 1250 * NOTE: Does not include Tx command bytes, post-MAC pad bytes, 1251 * MIC (CCM) 8 bytes, ICV (WEP/TKIP/CKIP) 4 bytes, CRC 4 bytes.i 1252 * Range: 14-2342 bytes. 1253 */ 1254 __le16 len; 1255 1256 /* 1257 * MPDU or MSDU byte count for next frame. 1258 * Used for fragmentation and bursting, but not 11n aggregation. 1259 * Same as "len", but for next frame. Set to 0 if not applicable. 1260 */ 1261 __le16 next_frame_len; 1262 1263 __le32 tx_flags; /* TX_CMD_FLG_* */ 1264 1265 /* uCode may modify this field of the Tx command (in host DRAM!). 1266 * Driver must also set dram_lsb_ptr and dram_msb_ptr in this cmd. */ 1267 struct iwl_dram_scratch scratch; 1268 1269 /* Rate for *all* Tx attempts, if TX_CMD_FLG_STA_RATE_MSK is cleared. */ 1270 __le32 rate_n_flags; /* RATE_MCS_* */ 1271 1272 /* Index of destination station in uCode's station table */ 1273 u8 sta_id; 1274 1275 /* Type of security encryption: CCM or TKIP */ 1276 u8 sec_ctl; /* TX_CMD_SEC_* */ 1277 1278 /* 1279 * Index into rate table (see REPLY_TX_LINK_QUALITY_CMD) for initial 1280 * Tx attempt, if TX_CMD_FLG_STA_RATE_MSK is set. Normally "0" for 1281 * data frames, this field may be used to selectively reduce initial 1282 * rate (via non-0 value) for special frames (e.g. management), while 1283 * still supporting rate scaling for all frames. 1284 */ 1285 u8 initial_rate_index; 1286 u8 reserved; 1287 u8 key[16]; 1288 __le16 next_frame_flags; 1289 __le16 reserved2; 1290 union { 1291 __le32 life_time; 1292 __le32 attempt; 1293 } stop_time; 1294 1295 /* Host DRAM physical address pointer to "scratch" in this command. 1296 * Must be dword aligned. "0" in dram_lsb_ptr disables usage. */ 1297 __le32 dram_lsb_ptr; 1298 u8 dram_msb_ptr; 1299 1300 u8 rts_retry_limit; /*byte 50 */ 1301 u8 data_retry_limit; /*byte 51 */ 1302 u8 tid_tspec; 1303 union { 1304 __le16 pm_frame_timeout; 1305 __le16 attempt_duration; 1306 } timeout; 1307 1308 /* 1309 * Duration of EDCA burst Tx Opportunity, in 32-usec units. 1310 * Set this if txop time is not specified by HCCA protocol (e.g. by AP). 1311 */ 1312 __le16 driver_txop; 1313 1314 /* 1315 * MAC header goes here, followed by 2 bytes padding if MAC header 1316 * length is 26 or 30 bytes, followed by payload data 1317 */ 1318 u8 payload[0]; 1319 struct ieee80211_hdr hdr[0]; 1320 } __packed; 1321 1322 /* 1323 * TX command response is sent after *agn* transmission attempts. 1324 * 1325 * both postpone and abort status are expected behavior from uCode. there is 1326 * no special operation required from driver; except for RFKILL_FLUSH, 1327 * which required tx flush host command to flush all the tx frames in queues 1328 */ 1329 enum { 1330 TX_STATUS_SUCCESS = 0x01, 1331 TX_STATUS_DIRECT_DONE = 0x02, 1332 /* postpone TX */ 1333 TX_STATUS_POSTPONE_DELAY = 0x40, 1334 TX_STATUS_POSTPONE_FEW_BYTES = 0x41, 1335 TX_STATUS_POSTPONE_BT_PRIO = 0x42, 1336 TX_STATUS_POSTPONE_QUIET_PERIOD = 0x43, 1337 TX_STATUS_POSTPONE_CALC_TTAK = 0x44, 1338 /* abort TX */ 1339 TX_STATUS_FAIL_INTERNAL_CROSSED_RETRY = 0x81, 1340 TX_STATUS_FAIL_SHORT_LIMIT = 0x82, 1341 TX_STATUS_FAIL_LONG_LIMIT = 0x83, 1342 TX_STATUS_FAIL_FIFO_UNDERRUN = 0x84, 1343 TX_STATUS_FAIL_DRAIN_FLOW = 0x85, 1344 TX_STATUS_FAIL_RFKILL_FLUSH = 0x86, 1345 TX_STATUS_FAIL_LIFE_EXPIRE = 0x87, 1346 TX_STATUS_FAIL_DEST_PS = 0x88, 1347 TX_STATUS_FAIL_HOST_ABORTED = 0x89, 1348 TX_STATUS_FAIL_BT_RETRY = 0x8a, 1349 TX_STATUS_FAIL_STA_INVALID = 0x8b, 1350 TX_STATUS_FAIL_FRAG_DROPPED = 0x8c, 1351 TX_STATUS_FAIL_TID_DISABLE = 0x8d, 1352 TX_STATUS_FAIL_FIFO_FLUSHED = 0x8e, 1353 TX_STATUS_FAIL_INSUFFICIENT_CF_POLL = 0x8f, 1354 TX_STATUS_FAIL_PASSIVE_NO_RX = 0x90, 1355 TX_STATUS_FAIL_NO_BEACON_ON_RADAR = 0x91, 1356 }; 1357 1358 #define TX_PACKET_MODE_REGULAR 0x0000 1359 #define TX_PACKET_MODE_BURST_SEQ 0x0100 1360 #define TX_PACKET_MODE_BURST_FIRST 0x0200 1361 1362 enum { 1363 TX_POWER_PA_NOT_ACTIVE = 0x0, 1364 }; 1365 1366 enum { 1367 TX_STATUS_MSK = 0x000000ff, /* bits 0:7 */ 1368 TX_STATUS_DELAY_MSK = 0x00000040, 1369 TX_STATUS_ABORT_MSK = 0x00000080, 1370 TX_PACKET_MODE_MSK = 0x0000ff00, /* bits 8:15 */ 1371 TX_FIFO_NUMBER_MSK = 0x00070000, /* bits 16:18 */ 1372 TX_RESERVED = 0x00780000, /* bits 19:22 */ 1373 TX_POWER_PA_DETECT_MSK = 0x7f800000, /* bits 23:30 */ 1374 TX_ABORT_REQUIRED_MSK = 0x80000000, /* bits 31:31 */ 1375 }; 1376 1377 /* ******************************* 1378 * TX aggregation status 1379 ******************************* */ 1380 1381 enum { 1382 AGG_TX_STATE_TRANSMITTED = 0x00, 1383 AGG_TX_STATE_UNDERRUN_MSK = 0x01, 1384 AGG_TX_STATE_BT_PRIO_MSK = 0x02, 1385 AGG_TX_STATE_FEW_BYTES_MSK = 0x04, 1386 AGG_TX_STATE_ABORT_MSK = 0x08, 1387 AGG_TX_STATE_LAST_SENT_TTL_MSK = 0x10, 1388 AGG_TX_STATE_LAST_SENT_TRY_CNT_MSK = 0x20, 1389 AGG_TX_STATE_LAST_SENT_BT_KILL_MSK = 0x40, 1390 AGG_TX_STATE_SCD_QUERY_MSK = 0x80, 1391 AGG_TX_STATE_TEST_BAD_CRC32_MSK = 0x100, 1392 AGG_TX_STATE_RESPONSE_MSK = 0x1ff, 1393 AGG_TX_STATE_DUMP_TX_MSK = 0x200, 1394 AGG_TX_STATE_DELAY_TX_MSK = 0x400 1395 }; 1396 1397 #define AGG_TX_STATUS_MSK 0x00000fff /* bits 0:11 */ 1398 #define AGG_TX_TRY_MSK 0x0000f000 /* bits 12:15 */ 1399 #define AGG_TX_TRY_POS 12 1400 1401 #define AGG_TX_STATE_LAST_SENT_MSK (AGG_TX_STATE_LAST_SENT_TTL_MSK | \ 1402 AGG_TX_STATE_LAST_SENT_TRY_CNT_MSK | \ 1403 AGG_TX_STATE_LAST_SENT_BT_KILL_MSK) 1404 1405 /* # tx attempts for first frame in aggregation */ 1406 #define AGG_TX_STATE_TRY_CNT_POS 12 1407 #define AGG_TX_STATE_TRY_CNT_MSK 0xf000 1408 1409 /* Command ID and sequence number of Tx command for this frame */ 1410 #define AGG_TX_STATE_SEQ_NUM_POS 16 1411 #define AGG_TX_STATE_SEQ_NUM_MSK 0xffff0000 1412 1413 /* 1414 * REPLY_TX = 0x1c (response) 1415 * 1416 * This response may be in one of two slightly different formats, indicated 1417 * by the frame_count field: 1418 * 1419 * 1) No aggregation (frame_count == 1). This reports Tx results for 1420 * a single frame. Multiple attempts, at various bit rates, may have 1421 * been made for this frame. 1422 * 1423 * 2) Aggregation (frame_count > 1). This reports Tx results for 1424 * 2 or more frames that used block-acknowledge. All frames were 1425 * transmitted at same rate. Rate scaling may have been used if first 1426 * frame in this new agg block failed in previous agg block(s). 1427 * 1428 * Note that, for aggregation, ACK (block-ack) status is not delivered here; 1429 * block-ack has not been received by the time the agn device records 1430 * this status. 1431 * This status relates to reasons the tx might have been blocked or aborted 1432 * within the sending station (this agn device), rather than whether it was 1433 * received successfully by the destination station. 1434 */ 1435 struct agg_tx_status { 1436 __le16 status; 1437 __le16 sequence; 1438 } __packed; 1439 1440 /* 1441 * definitions for initial rate index field 1442 * bits [3:0] initial rate index 1443 * bits [6:4] rate table color, used for the initial rate 1444 * bit-7 invalid rate indication 1445 * i.e. rate was not chosen from rate table 1446 * or rate table color was changed during frame retries 1447 * refer tlc rate info 1448 */ 1449 1450 #define IWL50_TX_RES_INIT_RATE_INDEX_POS 0 1451 #define IWL50_TX_RES_INIT_RATE_INDEX_MSK 0x0f 1452 #define IWL50_TX_RES_RATE_TABLE_COLOR_POS 4 1453 #define IWL50_TX_RES_RATE_TABLE_COLOR_MSK 0x70 1454 #define IWL50_TX_RES_INV_RATE_INDEX_MSK 0x80 1455 1456 /* refer to ra_tid */ 1457 #define IWLAGN_TX_RES_TID_POS 0 1458 #define IWLAGN_TX_RES_TID_MSK 0x0f 1459 #define IWLAGN_TX_RES_RA_POS 4 1460 #define IWLAGN_TX_RES_RA_MSK 0xf0 1461 1462 struct iwlagn_tx_resp { 1463 u8 frame_count; /* 1 no aggregation, >1 aggregation */ 1464 u8 bt_kill_count; /* # blocked by bluetooth (unused for agg) */ 1465 u8 failure_rts; /* # failures due to unsuccessful RTS */ 1466 u8 failure_frame; /* # failures due to no ACK (unused for agg) */ 1467 1468 /* For non-agg: Rate at which frame was successful. 1469 * For agg: Rate at which all frames were transmitted. */ 1470 __le32 rate_n_flags; /* RATE_MCS_* */ 1471 1472 /* For non-agg: RTS + CTS + frame tx attempts time + ACK. 1473 * For agg: RTS + CTS + aggregation tx time + block-ack time. */ 1474 __le16 wireless_media_time; /* uSecs */ 1475 1476 u8 pa_status; /* RF power amplifier measurement (not used) */ 1477 u8 pa_integ_res_a[3]; 1478 u8 pa_integ_res_b[3]; 1479 u8 pa_integ_res_C[3]; 1480 1481 __le32 tfd_info; 1482 __le16 seq_ctl; 1483 __le16 byte_cnt; 1484 u8 tlc_info; 1485 u8 ra_tid; /* tid (0:3), sta_id (4:7) */ 1486 __le16 frame_ctrl; 1487 /* 1488 * For non-agg: frame status TX_STATUS_* 1489 * For agg: status of 1st frame, AGG_TX_STATE_*; other frame status 1490 * fields follow this one, up to frame_count. 1491 * Bit fields: 1492 * 11- 0: AGG_TX_STATE_* status code 1493 * 15-12: Retry count for 1st frame in aggregation (retries 1494 * occur if tx failed for this frame when it was a 1495 * member of a previous aggregation block). If rate 1496 * scaling is used, retry count indicates the rate 1497 * table entry used for all frames in the new agg. 1498 * 31-16: Sequence # for this frame's Tx cmd (not SSN!) 1499 */ 1500 struct agg_tx_status status; /* TX status (in aggregation - 1501 * status of 1st frame) */ 1502 } __packed; 1503 /* 1504 * REPLY_COMPRESSED_BA = 0xc5 (response only, not a command) 1505 * 1506 * Reports Block-Acknowledge from recipient station 1507 */ 1508 struct iwl_compressed_ba_resp { 1509 __le32 sta_addr_lo32; 1510 __le16 sta_addr_hi16; 1511 __le16 reserved; 1512 1513 /* Index of recipient (BA-sending) station in uCode's station table */ 1514 u8 sta_id; 1515 u8 tid; 1516 __le16 seq_ctl; 1517 __le64 bitmap; 1518 __le16 scd_flow; 1519 __le16 scd_ssn; 1520 u8 txed; /* number of frames sent */ 1521 u8 txed_2_done; /* number of frames acked */ 1522 __le16 reserved1; 1523 } __packed; 1524 1525 /* 1526 * REPLY_TX_PWR_TABLE_CMD = 0x97 (command, has simple generic response) 1527 * 1528 */ 1529 1530 /*RS_NEW_API: only TLC_RTS remains and moved to bit 0 */ 1531 #define LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK (1 << 0) 1532 1533 /* # of EDCA prioritized tx fifos */ 1534 #define LINK_QUAL_AC_NUM AC_NUM 1535 1536 /* # entries in rate scale table to support Tx retries */ 1537 #define LINK_QUAL_MAX_RETRY_NUM 16 1538 1539 /* Tx antenna selection values */ 1540 #define LINK_QUAL_ANT_A_MSK (1 << 0) 1541 #define LINK_QUAL_ANT_B_MSK (1 << 1) 1542 #define LINK_QUAL_ANT_MSK (LINK_QUAL_ANT_A_MSK|LINK_QUAL_ANT_B_MSK) 1543 1544 1545 /** 1546 * struct iwl_link_qual_general_params 1547 * 1548 * Used in REPLY_TX_LINK_QUALITY_CMD 1549 */ 1550 struct iwl_link_qual_general_params { 1551 u8 flags; 1552 1553 /* No entries at or above this (driver chosen) index contain MIMO */ 1554 u8 mimo_delimiter; 1555 1556 /* Best single antenna to use for single stream (legacy, SISO). */ 1557 u8 single_stream_ant_msk; /* LINK_QUAL_ANT_* */ 1558 1559 /* Best antennas to use for MIMO (unused for 4965, assumes both). */ 1560 u8 dual_stream_ant_msk; /* LINK_QUAL_ANT_* */ 1561 1562 /* 1563 * If driver needs to use different initial rates for different 1564 * EDCA QOS access categories (as implemented by tx fifos 0-3), 1565 * this table will set that up, by indicating the indexes in the 1566 * rs_table[LINK_QUAL_MAX_RETRY_NUM] rate table at which to start. 1567 * Otherwise, driver should set all entries to 0. 1568 * 1569 * Entry usage: 1570 * 0 = Background, 1 = Best Effort (normal), 2 = Video, 3 = Voice 1571 * TX FIFOs above 3 use same value (typically 0) as TX FIFO 3. 1572 */ 1573 u8 start_rate_index[LINK_QUAL_AC_NUM]; 1574 } __packed; 1575 1576 #define LINK_QUAL_AGG_TIME_LIMIT_DEF (4000) /* 4 milliseconds */ 1577 #define LINK_QUAL_AGG_TIME_LIMIT_MAX (8000) 1578 #define LINK_QUAL_AGG_TIME_LIMIT_MIN (100) 1579 1580 #define LINK_QUAL_AGG_DISABLE_START_DEF (3) 1581 #define LINK_QUAL_AGG_DISABLE_START_MAX (255) 1582 #define LINK_QUAL_AGG_DISABLE_START_MIN (0) 1583 1584 #define LINK_QUAL_AGG_FRAME_LIMIT_DEF (63) 1585 #define LINK_QUAL_AGG_FRAME_LIMIT_MAX (63) 1586 #define LINK_QUAL_AGG_FRAME_LIMIT_MIN (0) 1587 1588 /** 1589 * struct iwl_link_qual_agg_params 1590 * 1591 * Used in REPLY_TX_LINK_QUALITY_CMD 1592 */ 1593 struct iwl_link_qual_agg_params { 1594 1595 /* 1596 *Maximum number of uSec in aggregation. 1597 * default set to 4000 (4 milliseconds) if not configured in .cfg 1598 */ 1599 __le16 agg_time_limit; 1600 1601 /* 1602 * Number of Tx retries allowed for a frame, before that frame will 1603 * no longer be considered for the start of an aggregation sequence 1604 * (scheduler will then try to tx it as single frame). 1605 * Driver should set this to 3. 1606 */ 1607 u8 agg_dis_start_th; 1608 1609 /* 1610 * Maximum number of frames in aggregation. 1611 * 0 = no limit (default). 1 = no aggregation. 1612 * Other values = max # frames in aggregation. 1613 */ 1614 u8 agg_frame_cnt_limit; 1615 1616 __le32 reserved; 1617 } __packed; 1618 1619 /* 1620 * REPLY_TX_LINK_QUALITY_CMD = 0x4e (command, has simple generic response) 1621 * 1622 * For agn devices 1623 * 1624 * Each station in the agn device's internal station table has its own table 1625 * of 16 1626 * Tx rates and modulation modes (e.g. legacy/SISO/MIMO) for retrying Tx when 1627 * an ACK is not received. This command replaces the entire table for 1628 * one station. 1629 * 1630 * NOTE: Station must already be in agn device's station table. 1631 * Use REPLY_ADD_STA. 1632 * 1633 * The rate scaling procedures described below work well. Of course, other 1634 * procedures are possible, and may work better for particular environments. 1635 * 1636 * 1637 * FILLING THE RATE TABLE 1638 * 1639 * Given a particular initial rate and mode, as determined by the rate 1640 * scaling algorithm described below, the Linux driver uses the following 1641 * formula to fill the rs_table[LINK_QUAL_MAX_RETRY_NUM] rate table in the 1642 * Link Quality command: 1643 * 1644 * 1645 * 1) If using High-throughput (HT) (SISO or MIMO) initial rate: 1646 * a) Use this same initial rate for first 3 entries. 1647 * b) Find next lower available rate using same mode (SISO or MIMO), 1648 * use for next 3 entries. If no lower rate available, switch to 1649 * legacy mode (no HT40 channel, no MIMO, no short guard interval). 1650 * c) If using MIMO, set command's mimo_delimiter to number of entries 1651 * using MIMO (3 or 6). 1652 * d) After trying 2 HT rates, switch to legacy mode (no HT40 channel, 1653 * no MIMO, no short guard interval), at the next lower bit rate 1654 * (e.g. if second HT bit rate was 54, try 48 legacy), and follow 1655 * legacy procedure for remaining table entries. 1656 * 1657 * 2) If using legacy initial rate: 1658 * a) Use the initial rate for only one entry. 1659 * b) For each following entry, reduce the rate to next lower available 1660 * rate, until reaching the lowest available rate. 1661 * c) When reducing rate, also switch antenna selection. 1662 * d) Once lowest available rate is reached, repeat this rate until 1663 * rate table is filled (16 entries), switching antenna each entry. 1664 * 1665 * 1666 * ACCUMULATING HISTORY 1667 * 1668 * The rate scaling algorithm for agn devices, as implemented in Linux driver, 1669 * uses two sets of frame Tx success history: One for the current/active 1670 * modulation mode, and one for a speculative/search mode that is being 1671 * attempted. If the speculative mode turns out to be more effective (i.e. 1672 * actual transfer rate is better), then the driver continues to use the 1673 * speculative mode as the new current active mode. 1674 * 1675 * Each history set contains, separately for each possible rate, data for a 1676 * sliding window of the 62 most recent tx attempts at that rate. The data 1677 * includes a shifting bitmap of success(1)/failure(0), and sums of successful 1678 * and attempted frames, from which the driver can additionally calculate a 1679 * success ratio (success / attempted) and number of failures 1680 * (attempted - success), and control the size of the window (attempted). 1681 * The driver uses the bit map to remove successes from the success sum, as 1682 * the oldest tx attempts fall out of the window. 1683 * 1684 * When the agn device makes multiple tx attempts for a given frame, each 1685 * attempt might be at a different rate, and have different modulation 1686 * characteristics (e.g. antenna, fat channel, short guard interval), as set 1687 * up in the rate scaling table in the Link Quality command. The driver must 1688 * determine which rate table entry was used for each tx attempt, to determine 1689 * which rate-specific history to update, and record only those attempts that 1690 * match the modulation characteristics of the history set. 1691 * 1692 * When using block-ack (aggregation), all frames are transmitted at the same 1693 * rate, since there is no per-attempt acknowledgment from the destination 1694 * station. The Tx response struct iwl_tx_resp indicates the Tx rate in 1695 * rate_n_flags field. After receiving a block-ack, the driver can update 1696 * history for the entire block all at once. 1697 * 1698 * 1699 * FINDING BEST STARTING RATE: 1700 * 1701 * When working with a selected initial modulation mode (see below), the 1702 * driver attempts to find a best initial rate. The initial rate is the 1703 * first entry in the Link Quality command's rate table. 1704 * 1705 * 1) Calculate actual throughput (success ratio * expected throughput, see 1706 * table below) for current initial rate. Do this only if enough frames 1707 * have been attempted to make the value meaningful: at least 6 failed 1708 * tx attempts, or at least 8 successes. If not enough, don't try rate 1709 * scaling yet. 1710 * 1711 * 2) Find available rates adjacent to current initial rate. Available means: 1712 * a) supported by hardware && 1713 * b) supported by association && 1714 * c) within any constraints selected by user 1715 * 1716 * 3) Gather measured throughputs for adjacent rates. These might not have 1717 * enough history to calculate a throughput. That's okay, we might try 1718 * using one of them anyway! 1719 * 1720 * 4) Try decreasing rate if, for current rate: 1721 * a) success ratio is < 15% || 1722 * b) lower adjacent rate has better measured throughput || 1723 * c) higher adjacent rate has worse throughput, and lower is unmeasured 1724 * 1725 * As a sanity check, if decrease was determined above, leave rate 1726 * unchanged if: 1727 * a) lower rate unavailable 1728 * b) success ratio at current rate > 85% (very good) 1729 * c) current measured throughput is better than expected throughput 1730 * of lower rate (under perfect 100% tx conditions, see table below) 1731 * 1732 * 5) Try increasing rate if, for current rate: 1733 * a) success ratio is < 15% || 1734 * b) both adjacent rates' throughputs are unmeasured (try it!) || 1735 * b) higher adjacent rate has better measured throughput || 1736 * c) lower adjacent rate has worse throughput, and higher is unmeasured 1737 * 1738 * As a sanity check, if increase was determined above, leave rate 1739 * unchanged if: 1740 * a) success ratio at current rate < 70%. This is not particularly 1741 * good performance; higher rate is sure to have poorer success. 1742 * 1743 * 6) Re-evaluate the rate after each tx frame. If working with block- 1744 * acknowledge, history and statistics may be calculated for the entire 1745 * block (including prior history that fits within the history windows), 1746 * before re-evaluation. 1747 * 1748 * FINDING BEST STARTING MODULATION MODE: 1749 * 1750 * After working with a modulation mode for a "while" (and doing rate scaling), 1751 * the driver searches for a new initial mode in an attempt to improve 1752 * throughput. The "while" is measured by numbers of attempted frames: 1753 * 1754 * For legacy mode, search for new mode after: 1755 * 480 successful frames, or 160 failed frames 1756 * For high-throughput modes (SISO or MIMO), search for new mode after: 1757 * 4500 successful frames, or 400 failed frames 1758 * 1759 * Mode switch possibilities are (3 for each mode): 1760 * 1761 * For legacy: 1762 * Change antenna, try SISO (if HT association), try MIMO (if HT association) 1763 * For SISO: 1764 * Change antenna, try MIMO, try shortened guard interval (SGI) 1765 * For MIMO: 1766 * Try SISO antenna A, SISO antenna B, try shortened guard interval (SGI) 1767 * 1768 * When trying a new mode, use the same bit rate as the old/current mode when 1769 * trying antenna switches and shortened guard interval. When switching to 1770 * SISO from MIMO or legacy, or to MIMO from SISO or legacy, use a rate 1771 * for which the expected throughput (under perfect conditions) is about the 1772 * same or slightly better than the actual measured throughput delivered by 1773 * the old/current mode. 1774 * 1775 * Actual throughput can be estimated by multiplying the expected throughput 1776 * by the success ratio (successful / attempted tx frames). Frame size is 1777 * not considered in this calculation; it assumes that frame size will average 1778 * out to be fairly consistent over several samples. The following are 1779 * metric values for expected throughput assuming 100% success ratio. 1780 * Only G band has support for CCK rates: 1781 * 1782 * RATE: 1 2 5 11 6 9 12 18 24 36 48 54 60 1783 * 1784 * G: 7 13 35 58 40 57 72 98 121 154 177 186 186 1785 * A: 0 0 0 0 40 57 72 98 121 154 177 186 186 1786 * SISO 20MHz: 0 0 0 0 42 42 76 102 124 159 183 193 202 1787 * SGI SISO 20MHz: 0 0 0 0 46 46 82 110 132 168 192 202 211 1788 * MIMO 20MHz: 0 0 0 0 74 74 123 155 179 214 236 244 251 1789 * SGI MIMO 20MHz: 0 0 0 0 81 81 131 164 188 222 243 251 257 1790 * SISO 40MHz: 0 0 0 0 77 77 127 160 184 220 242 250 257 1791 * SGI SISO 40MHz: 0 0 0 0 83 83 135 169 193 229 250 257 264 1792 * MIMO 40MHz: 0 0 0 0 123 123 182 214 235 264 279 285 289 1793 * SGI MIMO 40MHz: 0 0 0 0 131 131 191 222 242 270 284 289 293 1794 * 1795 * After the new mode has been tried for a short while (minimum of 6 failed 1796 * frames or 8 successful frames), compare success ratio and actual throughput 1797 * estimate of the new mode with the old. If either is better with the new 1798 * mode, continue to use the new mode. 1799 * 1800 * Continue comparing modes until all 3 possibilities have been tried. 1801 * If moving from legacy to HT, try all 3 possibilities from the new HT 1802 * mode. After trying all 3, a best mode is found. Continue to use this mode 1803 * for the longer "while" described above (e.g. 480 successful frames for 1804 * legacy), and then repeat the search process. 1805 * 1806 */ 1807 struct iwl_link_quality_cmd { 1808 1809 /* Index of destination/recipient station in uCode's station table */ 1810 u8 sta_id; 1811 u8 reserved1; 1812 __le16 control; /* not used */ 1813 struct iwl_link_qual_general_params general_params; 1814 struct iwl_link_qual_agg_params agg_params; 1815 1816 /* 1817 * Rate info; when using rate-scaling, Tx command's initial_rate_index 1818 * specifies 1st Tx rate attempted, via index into this table. 1819 * agn devices works its way through table when retrying Tx. 1820 */ 1821 struct { 1822 __le32 rate_n_flags; /* RATE_MCS_*, IWL_RATE_* */ 1823 } rs_table[LINK_QUAL_MAX_RETRY_NUM]; 1824 __le32 reserved2; 1825 } __packed; 1826 1827 /* 1828 * BT configuration enable flags: 1829 * bit 0 - 1: BT channel announcement enabled 1830 * 0: disable 1831 * bit 1 - 1: priority of BT device enabled 1832 * 0: disable 1833 * bit 2 - 1: BT 2 wire support enabled 1834 * 0: disable 1835 */ 1836 #define BT_COEX_DISABLE (0x0) 1837 #define BT_ENABLE_CHANNEL_ANNOUNCE BIT(0) 1838 #define BT_ENABLE_PRIORITY BIT(1) 1839 #define BT_ENABLE_2_WIRE BIT(2) 1840 1841 #define BT_COEX_DISABLE (0x0) 1842 #define BT_COEX_ENABLE (BT_ENABLE_CHANNEL_ANNOUNCE | BT_ENABLE_PRIORITY) 1843 1844 #define BT_LEAD_TIME_MIN (0x0) 1845 #define BT_LEAD_TIME_DEF (0x1E) 1846 #define BT_LEAD_TIME_MAX (0xFF) 1847 1848 #define BT_MAX_KILL_MIN (0x1) 1849 #define BT_MAX_KILL_DEF (0x5) 1850 #define BT_MAX_KILL_MAX (0xFF) 1851 1852 #define BT_DURATION_LIMIT_DEF 625 1853 #define BT_DURATION_LIMIT_MAX 1250 1854 #define BT_DURATION_LIMIT_MIN 625 1855 1856 #define BT_ON_THRESHOLD_DEF 4 1857 #define BT_ON_THRESHOLD_MAX 1000 1858 #define BT_ON_THRESHOLD_MIN 1 1859 1860 #define BT_FRAG_THRESHOLD_DEF 0 1861 #define BT_FRAG_THRESHOLD_MAX 0 1862 #define BT_FRAG_THRESHOLD_MIN 0 1863 1864 #define BT_AGG_THRESHOLD_DEF 1200 1865 #define BT_AGG_THRESHOLD_MAX 8000 1866 #define BT_AGG_THRESHOLD_MIN 400 1867 1868 /* 1869 * REPLY_BT_CONFIG = 0x9b (command, has simple generic response) 1870 * 1871 * agn devices support hardware handshake with Bluetooth device on 1872 * same platform. Bluetooth device alerts wireless device when it will Tx; 1873 * wireless device can delay or kill its own Tx to accommodate. 1874 */ 1875 struct iwl_bt_cmd { 1876 u8 flags; 1877 u8 lead_time; 1878 u8 max_kill; 1879 u8 reserved; 1880 __le32 kill_ack_mask; 1881 __le32 kill_cts_mask; 1882 } __packed; 1883 1884 #define IWLAGN_BT_FLAG_CHANNEL_INHIBITION BIT(0) 1885 1886 #define IWLAGN_BT_FLAG_COEX_MODE_MASK (BIT(3)|BIT(4)|BIT(5)) 1887 #define IWLAGN_BT_FLAG_COEX_MODE_SHIFT 3 1888 #define IWLAGN_BT_FLAG_COEX_MODE_DISABLED 0 1889 #define IWLAGN_BT_FLAG_COEX_MODE_LEGACY_2W 1 1890 #define IWLAGN_BT_FLAG_COEX_MODE_3W 2 1891 #define IWLAGN_BT_FLAG_COEX_MODE_4W 3 1892 1893 #define IWLAGN_BT_FLAG_UCODE_DEFAULT BIT(6) 1894 /* Disable Sync PSPoll on SCO/eSCO */ 1895 #define IWLAGN_BT_FLAG_SYNC_2_BT_DISABLE BIT(7) 1896 1897 #define IWLAGN_BT_PSP_MIN_RSSI_THRESHOLD -75 /* dBm */ 1898 #define IWLAGN_BT_PSP_MAX_RSSI_THRESHOLD -65 /* dBm */ 1899 1900 #define IWLAGN_BT_PRIO_BOOST_MAX 0xFF 1901 #define IWLAGN_BT_PRIO_BOOST_MIN 0x00 1902 #define IWLAGN_BT_PRIO_BOOST_DEFAULT 0xF0 1903 #define IWLAGN_BT_PRIO_BOOST_DEFAULT32 0xF0F0F0F0 1904 1905 #define IWLAGN_BT_MAX_KILL_DEFAULT 5 1906 1907 #define IWLAGN_BT3_T7_DEFAULT 1 1908 1909 enum iwl_bt_kill_idx { 1910 IWL_BT_KILL_DEFAULT = 0, 1911 IWL_BT_KILL_OVERRIDE = 1, 1912 IWL_BT_KILL_REDUCE = 2, 1913 }; 1914 1915 #define IWLAGN_BT_KILL_ACK_MASK_DEFAULT cpu_to_le32(0xffff0000) 1916 #define IWLAGN_BT_KILL_CTS_MASK_DEFAULT cpu_to_le32(0xffff0000) 1917 #define IWLAGN_BT_KILL_ACK_CTS_MASK_SCO cpu_to_le32(0xffffffff) 1918 #define IWLAGN_BT_KILL_ACK_CTS_MASK_REDUCE cpu_to_le32(0) 1919 1920 #define IWLAGN_BT3_PRIO_SAMPLE_DEFAULT 2 1921 1922 #define IWLAGN_BT3_T2_DEFAULT 0xc 1923 1924 #define IWLAGN_BT_VALID_ENABLE_FLAGS cpu_to_le16(BIT(0)) 1925 #define IWLAGN_BT_VALID_BOOST cpu_to_le16(BIT(1)) 1926 #define IWLAGN_BT_VALID_MAX_KILL cpu_to_le16(BIT(2)) 1927 #define IWLAGN_BT_VALID_3W_TIMERS cpu_to_le16(BIT(3)) 1928 #define IWLAGN_BT_VALID_KILL_ACK_MASK cpu_to_le16(BIT(4)) 1929 #define IWLAGN_BT_VALID_KILL_CTS_MASK cpu_to_le16(BIT(5)) 1930 #define IWLAGN_BT_VALID_REDUCED_TX_PWR cpu_to_le16(BIT(6)) 1931 #define IWLAGN_BT_VALID_3W_LUT cpu_to_le16(BIT(7)) 1932 1933 #define IWLAGN_BT_ALL_VALID_MSK (IWLAGN_BT_VALID_ENABLE_FLAGS | \ 1934 IWLAGN_BT_VALID_BOOST | \ 1935 IWLAGN_BT_VALID_MAX_KILL | \ 1936 IWLAGN_BT_VALID_3W_TIMERS | \ 1937 IWLAGN_BT_VALID_KILL_ACK_MASK | \ 1938 IWLAGN_BT_VALID_KILL_CTS_MASK | \ 1939 IWLAGN_BT_VALID_REDUCED_TX_PWR | \ 1940 IWLAGN_BT_VALID_3W_LUT) 1941 1942 #define IWLAGN_BT_REDUCED_TX_PWR BIT(0) 1943 1944 #define IWLAGN_BT_DECISION_LUT_SIZE 12 1945 1946 struct iwl_basic_bt_cmd { 1947 u8 flags; 1948 u8 ledtime; /* unused */ 1949 u8 max_kill; 1950 u8 bt3_timer_t7_value; 1951 __le32 kill_ack_mask; 1952 __le32 kill_cts_mask; 1953 u8 bt3_prio_sample_time; 1954 u8 bt3_timer_t2_value; 1955 __le16 bt4_reaction_time; /* unused */ 1956 __le32 bt3_lookup_table[IWLAGN_BT_DECISION_LUT_SIZE]; 1957 /* 1958 * bit 0: use reduced tx power for control frame 1959 * bit 1 - 7: reserved 1960 */ 1961 u8 reduce_txpower; 1962 u8 reserved; 1963 __le16 valid; 1964 }; 1965 1966 struct iwl_bt_cmd_v1 { 1967 struct iwl_basic_bt_cmd basic; 1968 u8 prio_boost; 1969 /* 1970 * set IWLAGN_BT_VALID_BOOST to "1" in "valid" bitmask 1971 * if configure the following patterns 1972 */ 1973 u8 tx_prio_boost; /* SW boost of WiFi tx priority */ 1974 __le16 rx_prio_boost; /* SW boost of WiFi rx priority */ 1975 }; 1976 1977 struct iwl_bt_cmd_v2 { 1978 struct iwl_basic_bt_cmd basic; 1979 __le32 prio_boost; 1980 /* 1981 * set IWLAGN_BT_VALID_BOOST to "1" in "valid" bitmask 1982 * if configure the following patterns 1983 */ 1984 u8 reserved; 1985 u8 tx_prio_boost; /* SW boost of WiFi tx priority */ 1986 __le16 rx_prio_boost; /* SW boost of WiFi rx priority */ 1987 }; 1988 1989 #define IWLAGN_BT_SCO_ACTIVE cpu_to_le32(BIT(0)) 1990 1991 struct iwlagn_bt_sco_cmd { 1992 __le32 flags; 1993 }; 1994 1995 /****************************************************************************** 1996 * (6) 1997 * Spectrum Management (802.11h) Commands, Responses, Notifications: 1998 * 1999 *****************************************************************************/ 2000 2001 /* 2002 * Spectrum Management 2003 */ 2004 #define MEASUREMENT_FILTER_FLAG (RXON_FILTER_PROMISC_MSK | \ 2005 RXON_FILTER_CTL2HOST_MSK | \ 2006 RXON_FILTER_ACCEPT_GRP_MSK | \ 2007 RXON_FILTER_DIS_DECRYPT_MSK | \ 2008 RXON_FILTER_DIS_GRP_DECRYPT_MSK | \ 2009 RXON_FILTER_ASSOC_MSK | \ 2010 RXON_FILTER_BCON_AWARE_MSK) 2011 2012 struct iwl_measure_channel { 2013 __le32 duration; /* measurement duration in extended beacon 2014 * format */ 2015 u8 channel; /* channel to measure */ 2016 u8 type; /* see enum iwl_measure_type */ 2017 __le16 reserved; 2018 } __packed; 2019 2020 /* 2021 * REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74 (command) 2022 */ 2023 struct iwl_spectrum_cmd { 2024 __le16 len; /* number of bytes starting from token */ 2025 u8 token; /* token id */ 2026 u8 id; /* measurement id -- 0 or 1 */ 2027 u8 origin; /* 0 = TGh, 1 = other, 2 = TGk */ 2028 u8 periodic; /* 1 = periodic */ 2029 __le16 path_loss_timeout; 2030 __le32 start_time; /* start time in extended beacon format */ 2031 __le32 reserved2; 2032 __le32 flags; /* rxon flags */ 2033 __le32 filter_flags; /* rxon filter flags */ 2034 __le16 channel_count; /* minimum 1, maximum 10 */ 2035 __le16 reserved3; 2036 struct iwl_measure_channel channels[10]; 2037 } __packed; 2038 2039 /* 2040 * REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74 (response) 2041 */ 2042 struct iwl_spectrum_resp { 2043 u8 token; 2044 u8 id; /* id of the prior command replaced, or 0xff */ 2045 __le16 status; /* 0 - command will be handled 2046 * 1 - cannot handle (conflicts with another 2047 * measurement) */ 2048 } __packed; 2049 2050 enum iwl_measurement_state { 2051 IWL_MEASUREMENT_START = 0, 2052 IWL_MEASUREMENT_STOP = 1, 2053 }; 2054 2055 enum iwl_measurement_status { 2056 IWL_MEASUREMENT_OK = 0, 2057 IWL_MEASUREMENT_CONCURRENT = 1, 2058 IWL_MEASUREMENT_CSA_CONFLICT = 2, 2059 IWL_MEASUREMENT_TGH_CONFLICT = 3, 2060 /* 4-5 reserved */ 2061 IWL_MEASUREMENT_STOPPED = 6, 2062 IWL_MEASUREMENT_TIMEOUT = 7, 2063 IWL_MEASUREMENT_PERIODIC_FAILED = 8, 2064 }; 2065 2066 #define NUM_ELEMENTS_IN_HISTOGRAM 8 2067 2068 struct iwl_measurement_histogram { 2069 __le32 ofdm[NUM_ELEMENTS_IN_HISTOGRAM]; /* in 0.8usec counts */ 2070 __le32 cck[NUM_ELEMENTS_IN_HISTOGRAM]; /* in 1usec counts */ 2071 } __packed; 2072 2073 /* clear channel availability counters */ 2074 struct iwl_measurement_cca_counters { 2075 __le32 ofdm; 2076 __le32 cck; 2077 } __packed; 2078 2079 enum iwl_measure_type { 2080 IWL_MEASURE_BASIC = (1 << 0), 2081 IWL_MEASURE_CHANNEL_LOAD = (1 << 1), 2082 IWL_MEASURE_HISTOGRAM_RPI = (1 << 2), 2083 IWL_MEASURE_HISTOGRAM_NOISE = (1 << 3), 2084 IWL_MEASURE_FRAME = (1 << 4), 2085 /* bits 5:6 are reserved */ 2086 IWL_MEASURE_IDLE = (1 << 7), 2087 }; 2088 2089 /* 2090 * SPECTRUM_MEASURE_NOTIFICATION = 0x75 (notification only, not a command) 2091 */ 2092 struct iwl_spectrum_notification { 2093 u8 id; /* measurement id -- 0 or 1 */ 2094 u8 token; 2095 u8 channel_index; /* index in measurement channel list */ 2096 u8 state; /* 0 - start, 1 - stop */ 2097 __le32 start_time; /* lower 32-bits of TSF */ 2098 u8 band; /* 0 - 5.2GHz, 1 - 2.4GHz */ 2099 u8 channel; 2100 u8 type; /* see enum iwl_measurement_type */ 2101 u8 reserved1; 2102 /* NOTE: cca_ofdm, cca_cck, basic_type, and histogram are only only 2103 * valid if applicable for measurement type requested. */ 2104 __le32 cca_ofdm; /* cca fraction time in 40Mhz clock periods */ 2105 __le32 cca_cck; /* cca fraction time in 44Mhz clock periods */ 2106 __le32 cca_time; /* channel load time in usecs */ 2107 u8 basic_type; /* 0 - bss, 1 - ofdm preamble, 2 - 2108 * unidentified */ 2109 u8 reserved2[3]; 2110 struct iwl_measurement_histogram histogram; 2111 __le32 stop_time; /* lower 32-bits of TSF */ 2112 __le32 status; /* see iwl_measurement_status */ 2113 } __packed; 2114 2115 /****************************************************************************** 2116 * (7) 2117 * Power Management Commands, Responses, Notifications: 2118 * 2119 *****************************************************************************/ 2120 2121 /** 2122 * struct iwl_powertable_cmd - Power Table Command 2123 * @flags: See below: 2124 * 2125 * POWER_TABLE_CMD = 0x77 (command, has simple generic response) 2126 * 2127 * PM allow: 2128 * bit 0 - '0' Driver not allow power management 2129 * '1' Driver allow PM (use rest of parameters) 2130 * 2131 * uCode send sleep notifications: 2132 * bit 1 - '0' Don't send sleep notification 2133 * '1' send sleep notification (SEND_PM_NOTIFICATION) 2134 * 2135 * Sleep over DTIM 2136 * bit 2 - '0' PM have to walk up every DTIM 2137 * '1' PM could sleep over DTIM till listen Interval. 2138 * 2139 * PCI power managed 2140 * bit 3 - '0' (PCI_CFG_LINK_CTRL & 0x1) 2141 * '1' !(PCI_CFG_LINK_CTRL & 0x1) 2142 * 2143 * Fast PD 2144 * bit 4 - '1' Put radio to sleep when receiving frame for others 2145 * 2146 * Force sleep Modes 2147 * bit 31/30- '00' use both mac/xtal sleeps 2148 * '01' force Mac sleep 2149 * '10' force xtal sleep 2150 * '11' Illegal set 2151 * 2152 * NOTE: if sleep_interval[SLEEP_INTRVL_TABLE_SIZE-1] > DTIM period then 2153 * ucode assume sleep over DTIM is allowed and we don't need to wake up 2154 * for every DTIM. 2155 */ 2156 #define IWL_POWER_VEC_SIZE 5 2157 2158 #define IWL_POWER_DRIVER_ALLOW_SLEEP_MSK cpu_to_le16(BIT(0)) 2159 #define IWL_POWER_POWER_SAVE_ENA_MSK cpu_to_le16(BIT(0)) 2160 #define IWL_POWER_POWER_MANAGEMENT_ENA_MSK cpu_to_le16(BIT(1)) 2161 #define IWL_POWER_SLEEP_OVER_DTIM_MSK cpu_to_le16(BIT(2)) 2162 #define IWL_POWER_PCI_PM_MSK cpu_to_le16(BIT(3)) 2163 #define IWL_POWER_FAST_PD cpu_to_le16(BIT(4)) 2164 #define IWL_POWER_BEACON_FILTERING cpu_to_le16(BIT(5)) 2165 #define IWL_POWER_SHADOW_REG_ENA cpu_to_le16(BIT(6)) 2166 #define IWL_POWER_CT_KILL_SET cpu_to_le16(BIT(7)) 2167 #define IWL_POWER_BT_SCO_ENA cpu_to_le16(BIT(8)) 2168 #define IWL_POWER_ADVANCE_PM_ENA_MSK cpu_to_le16(BIT(9)) 2169 2170 struct iwl_powertable_cmd { 2171 __le16 flags; 2172 u8 keep_alive_seconds; 2173 u8 debug_flags; 2174 __le32 rx_data_timeout; 2175 __le32 tx_data_timeout; 2176 __le32 sleep_interval[IWL_POWER_VEC_SIZE]; 2177 __le32 keep_alive_beacons; 2178 } __packed; 2179 2180 /* 2181 * PM_SLEEP_NOTIFICATION = 0x7A (notification only, not a command) 2182 * all devices identical. 2183 */ 2184 struct iwl_sleep_notification { 2185 u8 pm_sleep_mode; 2186 u8 pm_wakeup_src; 2187 __le16 reserved; 2188 __le32 sleep_time; 2189 __le32 tsf_low; 2190 __le32 bcon_timer; 2191 } __packed; 2192 2193 /* Sleep states. all devices identical. */ 2194 enum { 2195 IWL_PM_NO_SLEEP = 0, 2196 IWL_PM_SLP_MAC = 1, 2197 IWL_PM_SLP_FULL_MAC_UNASSOCIATE = 2, 2198 IWL_PM_SLP_FULL_MAC_CARD_STATE = 3, 2199 IWL_PM_SLP_PHY = 4, 2200 IWL_PM_SLP_REPENT = 5, 2201 IWL_PM_WAKEUP_BY_TIMER = 6, 2202 IWL_PM_WAKEUP_BY_DRIVER = 7, 2203 IWL_PM_WAKEUP_BY_RFKILL = 8, 2204 /* 3 reserved */ 2205 IWL_PM_NUM_OF_MODES = 12, 2206 }; 2207 2208 /* 2209 * REPLY_CARD_STATE_CMD = 0xa0 (command, has simple generic response) 2210 */ 2211 #define CARD_STATE_CMD_DISABLE 0x00 /* Put card to sleep */ 2212 #define CARD_STATE_CMD_ENABLE 0x01 /* Wake up card */ 2213 #define CARD_STATE_CMD_HALT 0x02 /* Power down permanently */ 2214 struct iwl_card_state_cmd { 2215 __le32 status; /* CARD_STATE_CMD_* request new power state */ 2216 } __packed; 2217 2218 /* 2219 * CARD_STATE_NOTIFICATION = 0xa1 (notification only, not a command) 2220 */ 2221 struct iwl_card_state_notif { 2222 __le32 flags; 2223 } __packed; 2224 2225 #define HW_CARD_DISABLED 0x01 2226 #define SW_CARD_DISABLED 0x02 2227 #define CT_CARD_DISABLED 0x04 2228 #define RXON_CARD_DISABLED 0x10 2229 2230 struct iwl_ct_kill_config { 2231 __le32 reserved; 2232 __le32 critical_temperature_M; 2233 __le32 critical_temperature_R; 2234 } __packed; 2235 2236 /* 1000, and 6x00 */ 2237 struct iwl_ct_kill_throttling_config { 2238 __le32 critical_temperature_exit; 2239 __le32 reserved; 2240 __le32 critical_temperature_enter; 2241 } __packed; 2242 2243 /****************************************************************************** 2244 * (8) 2245 * Scan Commands, Responses, Notifications: 2246 * 2247 *****************************************************************************/ 2248 2249 #define SCAN_CHANNEL_TYPE_PASSIVE cpu_to_le32(0) 2250 #define SCAN_CHANNEL_TYPE_ACTIVE cpu_to_le32(1) 2251 2252 /** 2253 * struct iwl_scan_channel - entry in REPLY_SCAN_CMD channel table 2254 * 2255 * One for each channel in the scan list. 2256 * Each channel can independently select: 2257 * 1) SSID for directed active scans 2258 * 2) Txpower setting (for rate specified within Tx command) 2259 * 3) How long to stay on-channel (behavior may be modified by quiet_time, 2260 * quiet_plcp_th, good_CRC_th) 2261 * 2262 * To avoid uCode errors, make sure the following are true (see comments 2263 * under struct iwl_scan_cmd about max_out_time and quiet_time): 2264 * 1) If using passive_dwell (i.e. passive_dwell != 0): 2265 * active_dwell <= passive_dwell (< max_out_time if max_out_time != 0) 2266 * 2) quiet_time <= active_dwell 2267 * 3) If restricting off-channel time (i.e. max_out_time !=0): 2268 * passive_dwell < max_out_time 2269 * active_dwell < max_out_time 2270 */ 2271 2272 struct iwl_scan_channel { 2273 /* 2274 * type is defined as: 2275 * 0:0 1 = active, 0 = passive 2276 * 1:20 SSID direct bit map; if a bit is set, then corresponding 2277 * SSID IE is transmitted in probe request. 2278 * 21:31 reserved 2279 */ 2280 __le32 type; 2281 __le16 channel; /* band is selected by iwl_scan_cmd "flags" field */ 2282 u8 tx_gain; /* gain for analog radio */ 2283 u8 dsp_atten; /* gain for DSP */ 2284 __le16 active_dwell; /* in 1024-uSec TU (time units), typ 5-50 */ 2285 __le16 passive_dwell; /* in 1024-uSec TU (time units), typ 20-500 */ 2286 } __packed; 2287 2288 /* set number of direct probes __le32 type */ 2289 #define IWL_SCAN_PROBE_MASK(n) cpu_to_le32((BIT(n) | (BIT(n) - BIT(1)))) 2290 2291 /** 2292 * struct iwl_ssid_ie - directed scan network information element 2293 * 2294 * Up to 20 of these may appear in REPLY_SCAN_CMD, 2295 * selected by "type" bit field in struct iwl_scan_channel; 2296 * each channel may select different ssids from among the 20 entries. 2297 * SSID IEs get transmitted in reverse order of entry. 2298 */ 2299 struct iwl_ssid_ie { 2300 u8 id; 2301 u8 len; 2302 u8 ssid[32]; 2303 } __packed; 2304 2305 #define PROBE_OPTION_MAX 20 2306 #define TX_CMD_LIFE_TIME_INFINITE cpu_to_le32(0xFFFFFFFF) 2307 #define IWL_GOOD_CRC_TH_DISABLED 0 2308 #define IWL_GOOD_CRC_TH_DEFAULT cpu_to_le16(1) 2309 #define IWL_GOOD_CRC_TH_NEVER cpu_to_le16(0xffff) 2310 #define IWL_MAX_CMD_SIZE 4096 2311 2312 /* 2313 * REPLY_SCAN_CMD = 0x80 (command) 2314 * 2315 * The hardware scan command is very powerful; the driver can set it up to 2316 * maintain (relatively) normal network traffic while doing a scan in the 2317 * background. The max_out_time and suspend_time control the ratio of how 2318 * long the device stays on an associated network channel ("service channel") 2319 * vs. how long it's away from the service channel, i.e. tuned to other channels 2320 * for scanning. 2321 * 2322 * max_out_time is the max time off-channel (in usec), and suspend_time 2323 * is how long (in "extended beacon" format) that the scan is "suspended" 2324 * after returning to the service channel. That is, suspend_time is the 2325 * time that we stay on the service channel, doing normal work, between 2326 * scan segments. The driver may set these parameters differently to support 2327 * scanning when associated vs. not associated, and light vs. heavy traffic 2328 * loads when associated. 2329 * 2330 * After receiving this command, the device's scan engine does the following; 2331 * 2332 * 1) Sends SCAN_START notification to driver 2333 * 2) Checks to see if it has time to do scan for one channel 2334 * 3) Sends NULL packet, with power-save (PS) bit set to 1, 2335 * to tell AP that we're going off-channel 2336 * 4) Tunes to first channel in scan list, does active or passive scan 2337 * 5) Sends SCAN_RESULT notification to driver 2338 * 6) Checks to see if it has time to do scan on *next* channel in list 2339 * 7) Repeats 4-6 until it no longer has time to scan the next channel 2340 * before max_out_time expires 2341 * 8) Returns to service channel 2342 * 9) Sends NULL packet with PS=0 to tell AP that we're back 2343 * 10) Stays on service channel until suspend_time expires 2344 * 11) Repeats entire process 2-10 until list is complete 2345 * 12) Sends SCAN_COMPLETE notification 2346 * 2347 * For fast, efficient scans, the scan command also has support for staying on 2348 * a channel for just a short time, if doing active scanning and getting no 2349 * responses to the transmitted probe request. This time is controlled by 2350 * quiet_time, and the number of received packets below which a channel is 2351 * considered "quiet" is controlled by quiet_plcp_threshold. 2352 * 2353 * For active scanning on channels that have regulatory restrictions against 2354 * blindly transmitting, the scan can listen before transmitting, to make sure 2355 * that there is already legitimate activity on the channel. If enough 2356 * packets are cleanly received on the channel (controlled by good_CRC_th, 2357 * typical value 1), the scan engine starts transmitting probe requests. 2358 * 2359 * Driver must use separate scan commands for 2.4 vs. 5 GHz bands. 2360 * 2361 * To avoid uCode errors, see timing restrictions described under 2362 * struct iwl_scan_channel. 2363 */ 2364 2365 enum iwl_scan_flags { 2366 /* BIT(0) currently unused */ 2367 IWL_SCAN_FLAGS_ACTION_FRAME_TX = BIT(1), 2368 /* bits 2-7 reserved */ 2369 }; 2370 2371 struct iwl_scan_cmd { 2372 __le16 len; 2373 u8 scan_flags; /* scan flags: see enum iwl_scan_flags */ 2374 u8 channel_count; /* # channels in channel list */ 2375 __le16 quiet_time; /* dwell only this # millisecs on quiet channel 2376 * (only for active scan) */ 2377 __le16 quiet_plcp_th; /* quiet chnl is < this # pkts (typ. 1) */ 2378 __le16 good_CRC_th; /* passive -> active promotion threshold */ 2379 __le16 rx_chain; /* RXON_RX_CHAIN_* */ 2380 __le32 max_out_time; /* max usec to be away from associated (service) 2381 * channel */ 2382 __le32 suspend_time; /* pause scan this long (in "extended beacon 2383 * format") when returning to service chnl: 2384 */ 2385 __le32 flags; /* RXON_FLG_* */ 2386 __le32 filter_flags; /* RXON_FILTER_* */ 2387 2388 /* For active scans (set to all-0s for passive scans). 2389 * Does not include payload. Must specify Tx rate; no rate scaling. */ 2390 struct iwl_tx_cmd tx_cmd; 2391 2392 /* For directed active scans (set to all-0s otherwise) */ 2393 struct iwl_ssid_ie direct_scan[PROBE_OPTION_MAX]; 2394 2395 /* 2396 * Probe request frame, followed by channel list. 2397 * 2398 * Size of probe request frame is specified by byte count in tx_cmd. 2399 * Channel list follows immediately after probe request frame. 2400 * Number of channels in list is specified by channel_count. 2401 * Each channel in list is of type: 2402 * 2403 * struct iwl_scan_channel channels[0]; 2404 * 2405 * NOTE: Only one band of channels can be scanned per pass. You 2406 * must not mix 2.4GHz channels and 5.2GHz channels, and you must wait 2407 * for one scan to complete (i.e. receive SCAN_COMPLETE_NOTIFICATION) 2408 * before requesting another scan. 2409 */ 2410 u8 data[0]; 2411 } __packed; 2412 2413 /* Can abort will notify by complete notification with abort status. */ 2414 #define CAN_ABORT_STATUS cpu_to_le32(0x1) 2415 /* complete notification statuses */ 2416 #define ABORT_STATUS 0x2 2417 2418 /* 2419 * REPLY_SCAN_CMD = 0x80 (response) 2420 */ 2421 struct iwl_scanreq_notification { 2422 __le32 status; /* 1: okay, 2: cannot fulfill request */ 2423 } __packed; 2424 2425 /* 2426 * SCAN_START_NOTIFICATION = 0x82 (notification only, not a command) 2427 */ 2428 struct iwl_scanstart_notification { 2429 __le32 tsf_low; 2430 __le32 tsf_high; 2431 __le32 beacon_timer; 2432 u8 channel; 2433 u8 band; 2434 u8 reserved[2]; 2435 __le32 status; 2436 } __packed; 2437 2438 #define SCAN_OWNER_STATUS 0x1 2439 #define MEASURE_OWNER_STATUS 0x2 2440 2441 #define IWL_PROBE_STATUS_OK 0 2442 #define IWL_PROBE_STATUS_TX_FAILED BIT(0) 2443 /* error statuses combined with TX_FAILED */ 2444 #define IWL_PROBE_STATUS_FAIL_TTL BIT(1) 2445 #define IWL_PROBE_STATUS_FAIL_BT BIT(2) 2446 2447 #define NUMBER_OF_STATISTICS 1 /* first __le32 is good CRC */ 2448 /* 2449 * SCAN_RESULTS_NOTIFICATION = 0x83 (notification only, not a command) 2450 */ 2451 struct iwl_scanresults_notification { 2452 u8 channel; 2453 u8 band; 2454 u8 probe_status; 2455 u8 num_probe_not_sent; /* not enough time to send */ 2456 __le32 tsf_low; 2457 __le32 tsf_high; 2458 __le32 statistics[NUMBER_OF_STATISTICS]; 2459 } __packed; 2460 2461 /* 2462 * SCAN_COMPLETE_NOTIFICATION = 0x84 (notification only, not a command) 2463 */ 2464 struct iwl_scancomplete_notification { 2465 u8 scanned_channels; 2466 u8 status; 2467 u8 bt_status; /* BT On/Off status */ 2468 u8 last_channel; 2469 __le32 tsf_low; 2470 __le32 tsf_high; 2471 } __packed; 2472 2473 2474 /****************************************************************************** 2475 * (9) 2476 * IBSS/AP Commands and Notifications: 2477 * 2478 *****************************************************************************/ 2479 2480 enum iwl_ibss_manager { 2481 IWL_NOT_IBSS_MANAGER = 0, 2482 IWL_IBSS_MANAGER = 1, 2483 }; 2484 2485 /* 2486 * BEACON_NOTIFICATION = 0x90 (notification only, not a command) 2487 */ 2488 2489 struct iwlagn_beacon_notif { 2490 struct iwlagn_tx_resp beacon_notify_hdr; 2491 __le32 low_tsf; 2492 __le32 high_tsf; 2493 __le32 ibss_mgr_status; 2494 } __packed; 2495 2496 /* 2497 * REPLY_TX_BEACON = 0x91 (command, has simple generic response) 2498 */ 2499 2500 struct iwl_tx_beacon_cmd { 2501 struct iwl_tx_cmd tx; 2502 __le16 tim_idx; 2503 u8 tim_size; 2504 u8 reserved1; 2505 struct ieee80211_hdr frame[0]; /* beacon frame */ 2506 } __packed; 2507 2508 /****************************************************************************** 2509 * (10) 2510 * Statistics Commands and Notifications: 2511 * 2512 *****************************************************************************/ 2513 2514 #define IWL_TEMP_CONVERT 260 2515 2516 #define SUP_RATE_11A_MAX_NUM_CHANNELS 8 2517 #define SUP_RATE_11B_MAX_NUM_CHANNELS 4 2518 #define SUP_RATE_11G_MAX_NUM_CHANNELS 12 2519 2520 /* Used for passing to driver number of successes and failures per rate */ 2521 struct rate_histogram { 2522 union { 2523 __le32 a[SUP_RATE_11A_MAX_NUM_CHANNELS]; 2524 __le32 b[SUP_RATE_11B_MAX_NUM_CHANNELS]; 2525 __le32 g[SUP_RATE_11G_MAX_NUM_CHANNELS]; 2526 } success; 2527 union { 2528 __le32 a[SUP_RATE_11A_MAX_NUM_CHANNELS]; 2529 __le32 b[SUP_RATE_11B_MAX_NUM_CHANNELS]; 2530 __le32 g[SUP_RATE_11G_MAX_NUM_CHANNELS]; 2531 } failed; 2532 } __packed; 2533 2534 /* statistics command response */ 2535 2536 struct statistics_dbg { 2537 __le32 burst_check; 2538 __le32 burst_count; 2539 __le32 wait_for_silence_timeout_cnt; 2540 __le32 reserved[3]; 2541 } __packed; 2542 2543 struct statistics_rx_phy { 2544 __le32 ina_cnt; 2545 __le32 fina_cnt; 2546 __le32 plcp_err; 2547 __le32 crc32_err; 2548 __le32 overrun_err; 2549 __le32 early_overrun_err; 2550 __le32 crc32_good; 2551 __le32 false_alarm_cnt; 2552 __le32 fina_sync_err_cnt; 2553 __le32 sfd_timeout; 2554 __le32 fina_timeout; 2555 __le32 unresponded_rts; 2556 __le32 rxe_frame_limit_overrun; 2557 __le32 sent_ack_cnt; 2558 __le32 sent_cts_cnt; 2559 __le32 sent_ba_rsp_cnt; 2560 __le32 dsp_self_kill; 2561 __le32 mh_format_err; 2562 __le32 re_acq_main_rssi_sum; 2563 __le32 reserved3; 2564 } __packed; 2565 2566 struct statistics_rx_ht_phy { 2567 __le32 plcp_err; 2568 __le32 overrun_err; 2569 __le32 early_overrun_err; 2570 __le32 crc32_good; 2571 __le32 crc32_err; 2572 __le32 mh_format_err; 2573 __le32 agg_crc32_good; 2574 __le32 agg_mpdu_cnt; 2575 __le32 agg_cnt; 2576 __le32 unsupport_mcs; 2577 } __packed; 2578 2579 #define INTERFERENCE_DATA_AVAILABLE cpu_to_le32(1) 2580 2581 struct statistics_rx_non_phy { 2582 __le32 bogus_cts; /* CTS received when not expecting CTS */ 2583 __le32 bogus_ack; /* ACK received when not expecting ACK */ 2584 __le32 non_bssid_frames; /* number of frames with BSSID that 2585 * doesn't belong to the STA BSSID */ 2586 __le32 filtered_frames; /* count frames that were dumped in the 2587 * filtering process */ 2588 __le32 non_channel_beacons; /* beacons with our bss id but not on 2589 * our serving channel */ 2590 __le32 channel_beacons; /* beacons with our bss id and in our 2591 * serving channel */ 2592 __le32 num_missed_bcon; /* number of missed beacons */ 2593 __le32 adc_rx_saturation_time; /* count in 0.8us units the time the 2594 * ADC was in saturation */ 2595 __le32 ina_detection_search_time;/* total time (in 0.8us) searched 2596 * for INA */ 2597 __le32 beacon_silence_rssi_a; /* RSSI silence after beacon frame */ 2598 __le32 beacon_silence_rssi_b; /* RSSI silence after beacon frame */ 2599 __le32 beacon_silence_rssi_c; /* RSSI silence after beacon frame */ 2600 __le32 interference_data_flag; /* flag for interference data 2601 * availability. 1 when data is 2602 * available. */ 2603 __le32 channel_load; /* counts RX Enable time in uSec */ 2604 __le32 dsp_false_alarms; /* DSP false alarm (both OFDM 2605 * and CCK) counter */ 2606 __le32 beacon_rssi_a; 2607 __le32 beacon_rssi_b; 2608 __le32 beacon_rssi_c; 2609 __le32 beacon_energy_a; 2610 __le32 beacon_energy_b; 2611 __le32 beacon_energy_c; 2612 } __packed; 2613 2614 struct statistics_rx_non_phy_bt { 2615 struct statistics_rx_non_phy common; 2616 /* additional stats for bt */ 2617 __le32 num_bt_kills; 2618 __le32 reserved[2]; 2619 } __packed; 2620 2621 struct statistics_rx { 2622 struct statistics_rx_phy ofdm; 2623 struct statistics_rx_phy cck; 2624 struct statistics_rx_non_phy general; 2625 struct statistics_rx_ht_phy ofdm_ht; 2626 } __packed; 2627 2628 struct statistics_rx_bt { 2629 struct statistics_rx_phy ofdm; 2630 struct statistics_rx_phy cck; 2631 struct statistics_rx_non_phy_bt general; 2632 struct statistics_rx_ht_phy ofdm_ht; 2633 } __packed; 2634 2635 /** 2636 * struct statistics_tx_power - current tx power 2637 * 2638 * @ant_a: current tx power on chain a in 1/2 dB step 2639 * @ant_b: current tx power on chain b in 1/2 dB step 2640 * @ant_c: current tx power on chain c in 1/2 dB step 2641 */ 2642 struct statistics_tx_power { 2643 u8 ant_a; 2644 u8 ant_b; 2645 u8 ant_c; 2646 u8 reserved; 2647 } __packed; 2648 2649 struct statistics_tx_non_phy_agg { 2650 __le32 ba_timeout; 2651 __le32 ba_reschedule_frames; 2652 __le32 scd_query_agg_frame_cnt; 2653 __le32 scd_query_no_agg; 2654 __le32 scd_query_agg; 2655 __le32 scd_query_mismatch; 2656 __le32 frame_not_ready; 2657 __le32 underrun; 2658 __le32 bt_prio_kill; 2659 __le32 rx_ba_rsp_cnt; 2660 } __packed; 2661 2662 struct statistics_tx { 2663 __le32 preamble_cnt; 2664 __le32 rx_detected_cnt; 2665 __le32 bt_prio_defer_cnt; 2666 __le32 bt_prio_kill_cnt; 2667 __le32 few_bytes_cnt; 2668 __le32 cts_timeout; 2669 __le32 ack_timeout; 2670 __le32 expected_ack_cnt; 2671 __le32 actual_ack_cnt; 2672 __le32 dump_msdu_cnt; 2673 __le32 burst_abort_next_frame_mismatch_cnt; 2674 __le32 burst_abort_missing_next_frame_cnt; 2675 __le32 cts_timeout_collision; 2676 __le32 ack_or_ba_timeout_collision; 2677 struct statistics_tx_non_phy_agg agg; 2678 /* 2679 * "tx_power" are optional parameters provided by uCode, 2680 * 6000 series is the only device provide the information, 2681 * Those are reserved fields for all the other devices 2682 */ 2683 struct statistics_tx_power tx_power; 2684 __le32 reserved1; 2685 } __packed; 2686 2687 2688 struct statistics_div { 2689 __le32 tx_on_a; 2690 __le32 tx_on_b; 2691 __le32 exec_time; 2692 __le32 probe_time; 2693 __le32 reserved1; 2694 __le32 reserved2; 2695 } __packed; 2696 2697 struct statistics_general_common { 2698 __le32 temperature; /* radio temperature */ 2699 __le32 temperature_m; /* radio voltage */ 2700 struct statistics_dbg dbg; 2701 __le32 sleep_time; 2702 __le32 slots_out; 2703 __le32 slots_idle; 2704 __le32 ttl_timestamp; 2705 struct statistics_div div; 2706 __le32 rx_enable_counter; 2707 /* 2708 * num_of_sos_states: 2709 * count the number of times we have to re-tune 2710 * in order to get out of bad PHY status 2711 */ 2712 __le32 num_of_sos_states; 2713 } __packed; 2714 2715 struct statistics_bt_activity { 2716 /* Tx statistics */ 2717 __le32 hi_priority_tx_req_cnt; 2718 __le32 hi_priority_tx_denied_cnt; 2719 __le32 lo_priority_tx_req_cnt; 2720 __le32 lo_priority_tx_denied_cnt; 2721 /* Rx statistics */ 2722 __le32 hi_priority_rx_req_cnt; 2723 __le32 hi_priority_rx_denied_cnt; 2724 __le32 lo_priority_rx_req_cnt; 2725 __le32 lo_priority_rx_denied_cnt; 2726 } __packed; 2727 2728 struct statistics_general { 2729 struct statistics_general_common common; 2730 __le32 reserved2; 2731 __le32 reserved3; 2732 } __packed; 2733 2734 struct statistics_general_bt { 2735 struct statistics_general_common common; 2736 struct statistics_bt_activity activity; 2737 __le32 reserved2; 2738 __le32 reserved3; 2739 } __packed; 2740 2741 #define UCODE_STATISTICS_CLEAR_MSK (0x1 << 0) 2742 #define UCODE_STATISTICS_FREQUENCY_MSK (0x1 << 1) 2743 #define UCODE_STATISTICS_NARROW_BAND_MSK (0x1 << 2) 2744 2745 /* 2746 * REPLY_STATISTICS_CMD = 0x9c, 2747 * all devices identical. 2748 * 2749 * This command triggers an immediate response containing uCode statistics. 2750 * The response is in the same format as STATISTICS_NOTIFICATION 0x9d, below. 2751 * 2752 * If the CLEAR_STATS configuration flag is set, uCode will clear its 2753 * internal copy of the statistics (counters) after issuing the response. 2754 * This flag does not affect STATISTICS_NOTIFICATIONs after beacons (see below). 2755 * 2756 * If the DISABLE_NOTIF configuration flag is set, uCode will not issue 2757 * STATISTICS_NOTIFICATIONs after received beacons (see below). This flag 2758 * does not affect the response to the REPLY_STATISTICS_CMD 0x9c itself. 2759 */ 2760 #define IWL_STATS_CONF_CLEAR_STATS cpu_to_le32(0x1) /* see above */ 2761 #define IWL_STATS_CONF_DISABLE_NOTIF cpu_to_le32(0x2)/* see above */ 2762 struct iwl_statistics_cmd { 2763 __le32 configuration_flags; /* IWL_STATS_CONF_* */ 2764 } __packed; 2765 2766 /* 2767 * STATISTICS_NOTIFICATION = 0x9d (notification only, not a command) 2768 * 2769 * By default, uCode issues this notification after receiving a beacon 2770 * while associated. To disable this behavior, set DISABLE_NOTIF flag in the 2771 * REPLY_STATISTICS_CMD 0x9c, above. 2772 * 2773 * Statistics counters continue to increment beacon after beacon, but are 2774 * cleared when changing channels or when driver issues REPLY_STATISTICS_CMD 2775 * 0x9c with CLEAR_STATS bit set (see above). 2776 * 2777 * uCode also issues this notification during scans. uCode clears statistics 2778 * appropriately so that each notification contains statistics for only the 2779 * one channel that has just been scanned. 2780 */ 2781 #define STATISTICS_REPLY_FLG_BAND_24G_MSK cpu_to_le32(0x2) 2782 #define STATISTICS_REPLY_FLG_HT40_MODE_MSK cpu_to_le32(0x8) 2783 2784 struct iwl_notif_statistics { 2785 __le32 flag; 2786 struct statistics_rx rx; 2787 struct statistics_tx tx; 2788 struct statistics_general general; 2789 } __packed; 2790 2791 struct iwl_bt_notif_statistics { 2792 __le32 flag; 2793 struct statistics_rx_bt rx; 2794 struct statistics_tx tx; 2795 struct statistics_general_bt general; 2796 } __packed; 2797 2798 /* 2799 * MISSED_BEACONS_NOTIFICATION = 0xa2 (notification only, not a command) 2800 * 2801 * uCode send MISSED_BEACONS_NOTIFICATION to driver when detect beacon missed 2802 * in regardless of how many missed beacons, which mean when driver receive the 2803 * notification, inside the command, it can find all the beacons information 2804 * which include number of total missed beacons, number of consecutive missed 2805 * beacons, number of beacons received and number of beacons expected to 2806 * receive. 2807 * 2808 * If uCode detected consecutive_missed_beacons > 5, it will reset the radio 2809 * in order to bring the radio/PHY back to working state; which has no relation 2810 * to when driver will perform sensitivity calibration. 2811 * 2812 * Driver should set it own missed_beacon_threshold to decide when to perform 2813 * sensitivity calibration based on number of consecutive missed beacons in 2814 * order to improve overall performance, especially in noisy environment. 2815 * 2816 */ 2817 2818 #define IWL_MISSED_BEACON_THRESHOLD_MIN (1) 2819 #define IWL_MISSED_BEACON_THRESHOLD_DEF (5) 2820 #define IWL_MISSED_BEACON_THRESHOLD_MAX IWL_MISSED_BEACON_THRESHOLD_DEF 2821 2822 struct iwl_missed_beacon_notif { 2823 __le32 consecutive_missed_beacons; 2824 __le32 total_missed_becons; 2825 __le32 num_expected_beacons; 2826 __le32 num_recvd_beacons; 2827 } __packed; 2828 2829 2830 /****************************************************************************** 2831 * (11) 2832 * Rx Calibration Commands: 2833 * 2834 * With the uCode used for open source drivers, most Tx calibration (except 2835 * for Tx Power) and most Rx calibration is done by uCode during the 2836 * "initialize" phase of uCode boot. Driver must calibrate only: 2837 * 2838 * 1) Tx power (depends on temperature), described elsewhere 2839 * 2) Receiver gain balance (optimize MIMO, and detect disconnected antennas) 2840 * 3) Receiver sensitivity (to optimize signal detection) 2841 * 2842 *****************************************************************************/ 2843 2844 /** 2845 * SENSITIVITY_CMD = 0xa8 (command, has simple generic response) 2846 * 2847 * This command sets up the Rx signal detector for a sensitivity level that 2848 * is high enough to lock onto all signals within the associated network, 2849 * but low enough to ignore signals that are below a certain threshold, so as 2850 * not to have too many "false alarms". False alarms are signals that the 2851 * Rx DSP tries to lock onto, but then discards after determining that they 2852 * are noise. 2853 * 2854 * The optimum number of false alarms is between 5 and 50 per 200 TUs 2855 * (200 * 1024 uSecs, i.e. 204.8 milliseconds) of actual Rx time (i.e. 2856 * time listening, not transmitting). Driver must adjust sensitivity so that 2857 * the ratio of actual false alarms to actual Rx time falls within this range. 2858 * 2859 * While associated, uCode delivers STATISTICS_NOTIFICATIONs after each 2860 * received beacon. These provide information to the driver to analyze the 2861 * sensitivity. Don't analyze statistics that come in from scanning, or any 2862 * other non-associated-network source. Pertinent statistics include: 2863 * 2864 * From "general" statistics (struct statistics_rx_non_phy): 2865 * 2866 * (beacon_energy_[abc] & 0x0FF00) >> 8 (unsigned, higher value is lower level) 2867 * Measure of energy of desired signal. Used for establishing a level 2868 * below which the device does not detect signals. 2869 * 2870 * (beacon_silence_rssi_[abc] & 0x0FF00) >> 8 (unsigned, units in dB) 2871 * Measure of background noise in silent period after beacon. 2872 * 2873 * channel_load 2874 * uSecs of actual Rx time during beacon period (varies according to 2875 * how much time was spent transmitting). 2876 * 2877 * From "cck" and "ofdm" statistics (struct statistics_rx_phy), separately: 2878 * 2879 * false_alarm_cnt 2880 * Signal locks abandoned early (before phy-level header). 2881 * 2882 * plcp_err 2883 * Signal locks abandoned late (during phy-level header). 2884 * 2885 * NOTE: Both false_alarm_cnt and plcp_err increment monotonically from 2886 * beacon to beacon, i.e. each value is an accumulation of all errors 2887 * before and including the latest beacon. Values will wrap around to 0 2888 * after counting up to 2^32 - 1. Driver must differentiate vs. 2889 * previous beacon's values to determine # false alarms in the current 2890 * beacon period. 2891 * 2892 * Total number of false alarms = false_alarms + plcp_errs 2893 * 2894 * For OFDM, adjust the following table entries in struct iwl_sensitivity_cmd 2895 * (notice that the start points for OFDM are at or close to settings for 2896 * maximum sensitivity): 2897 * 2898 * START / MIN / MAX 2899 * HD_AUTO_CORR32_X1_TH_ADD_MIN_INDEX 90 / 85 / 120 2900 * HD_AUTO_CORR32_X1_TH_ADD_MIN_MRC_INDEX 170 / 170 / 210 2901 * HD_AUTO_CORR32_X4_TH_ADD_MIN_INDEX 105 / 105 / 140 2902 * HD_AUTO_CORR32_X4_TH_ADD_MIN_MRC_INDEX 220 / 220 / 270 2903 * 2904 * If actual rate of OFDM false alarms (+ plcp_errors) is too high 2905 * (greater than 50 for each 204.8 msecs listening), reduce sensitivity 2906 * by *adding* 1 to all 4 of the table entries above, up to the max for 2907 * each entry. Conversely, if false alarm rate is too low (less than 5 2908 * for each 204.8 msecs listening), *subtract* 1 from each entry to 2909 * increase sensitivity. 2910 * 2911 * For CCK sensitivity, keep track of the following: 2912 * 2913 * 1). 20-beacon history of maximum background noise, indicated by 2914 * (beacon_silence_rssi_[abc] & 0x0FF00), units in dB, across the 2915 * 3 receivers. For any given beacon, the "silence reference" is 2916 * the maximum of last 60 samples (20 beacons * 3 receivers). 2917 * 2918 * 2). 10-beacon history of strongest signal level, as indicated 2919 * by (beacon_energy_[abc] & 0x0FF00) >> 8, across the 3 receivers, 2920 * i.e. the strength of the signal through the best receiver at the 2921 * moment. These measurements are "upside down", with lower values 2922 * for stronger signals, so max energy will be *minimum* value. 2923 * 2924 * Then for any given beacon, the driver must determine the *weakest* 2925 * of the strongest signals; this is the minimum level that needs to be 2926 * successfully detected, when using the best receiver at the moment. 2927 * "Max cck energy" is the maximum (higher value means lower energy!) 2928 * of the last 10 minima. Once this is determined, driver must add 2929 * a little margin by adding "6" to it. 2930 * 2931 * 3). Number of consecutive beacon periods with too few false alarms. 2932 * Reset this to 0 at the first beacon period that falls within the 2933 * "good" range (5 to 50 false alarms per 204.8 milliseconds rx). 2934 * 2935 * Then, adjust the following CCK table entries in struct iwl_sensitivity_cmd 2936 * (notice that the start points for CCK are at maximum sensitivity): 2937 * 2938 * START / MIN / MAX 2939 * HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX 125 / 125 / 200 2940 * HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX 200 / 200 / 400 2941 * HD_MIN_ENERGY_CCK_DET_INDEX 100 / 0 / 100 2942 * 2943 * If actual rate of CCK false alarms (+ plcp_errors) is too high 2944 * (greater than 50 for each 204.8 msecs listening), method for reducing 2945 * sensitivity is: 2946 * 2947 * 1) *Add* 3 to value in HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX, 2948 * up to max 400. 2949 * 2950 * 2) If current value in HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX is < 160, 2951 * sensitivity has been reduced a significant amount; bring it up to 2952 * a moderate 161. Otherwise, *add* 3, up to max 200. 2953 * 2954 * 3) a) If current value in HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX is > 160, 2955 * sensitivity has been reduced only a moderate or small amount; 2956 * *subtract* 2 from value in HD_MIN_ENERGY_CCK_DET_INDEX, 2957 * down to min 0. Otherwise (if gain has been significantly reduced), 2958 * don't change the HD_MIN_ENERGY_CCK_DET_INDEX value. 2959 * 2960 * b) Save a snapshot of the "silence reference". 2961 * 2962 * If actual rate of CCK false alarms (+ plcp_errors) is too low 2963 * (less than 5 for each 204.8 msecs listening), method for increasing 2964 * sensitivity is used only if: 2965 * 2966 * 1a) Previous beacon did not have too many false alarms 2967 * 1b) AND difference between previous "silence reference" and current 2968 * "silence reference" (prev - current) is 2 or more, 2969 * OR 2) 100 or more consecutive beacon periods have had rate of 2970 * less than 5 false alarms per 204.8 milliseconds rx time. 2971 * 2972 * Method for increasing sensitivity: 2973 * 2974 * 1) *Subtract* 3 from value in HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX, 2975 * down to min 125. 2976 * 2977 * 2) *Subtract* 3 from value in HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX, 2978 * down to min 200. 2979 * 2980 * 3) *Add* 2 to value in HD_MIN_ENERGY_CCK_DET_INDEX, up to max 100. 2981 * 2982 * If actual rate of CCK false alarms (+ plcp_errors) is within good range 2983 * (between 5 and 50 for each 204.8 msecs listening): 2984 * 2985 * 1) Save a snapshot of the silence reference. 2986 * 2987 * 2) If previous beacon had too many CCK false alarms (+ plcp_errors), 2988 * give some extra margin to energy threshold by *subtracting* 8 2989 * from value in HD_MIN_ENERGY_CCK_DET_INDEX. 2990 * 2991 * For all cases (too few, too many, good range), make sure that the CCK 2992 * detection threshold (energy) is below the energy level for robust 2993 * detection over the past 10 beacon periods, the "Max cck energy". 2994 * Lower values mean higher energy; this means making sure that the value 2995 * in HD_MIN_ENERGY_CCK_DET_INDEX is at or *above* "Max cck energy". 2996 * 2997 */ 2998 2999 /* 3000 * Table entries in SENSITIVITY_CMD (struct iwl_sensitivity_cmd) 3001 */ 3002 #define HD_TABLE_SIZE (11) /* number of entries */ 3003 #define HD_MIN_ENERGY_CCK_DET_INDEX (0) /* table indexes */ 3004 #define HD_MIN_ENERGY_OFDM_DET_INDEX (1) 3005 #define HD_AUTO_CORR32_X1_TH_ADD_MIN_INDEX (2) 3006 #define HD_AUTO_CORR32_X1_TH_ADD_MIN_MRC_INDEX (3) 3007 #define HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX (4) 3008 #define HD_AUTO_CORR32_X4_TH_ADD_MIN_INDEX (5) 3009 #define HD_AUTO_CORR32_X4_TH_ADD_MIN_MRC_INDEX (6) 3010 #define HD_BARKER_CORR_TH_ADD_MIN_INDEX (7) 3011 #define HD_BARKER_CORR_TH_ADD_MIN_MRC_INDEX (8) 3012 #define HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX (9) 3013 #define HD_OFDM_ENERGY_TH_IN_INDEX (10) 3014 3015 /* 3016 * Additional table entries in enhance SENSITIVITY_CMD 3017 */ 3018 #define HD_INA_NON_SQUARE_DET_OFDM_INDEX (11) 3019 #define HD_INA_NON_SQUARE_DET_CCK_INDEX (12) 3020 #define HD_CORR_11_INSTEAD_OF_CORR_9_EN_INDEX (13) 3021 #define HD_OFDM_NON_SQUARE_DET_SLOPE_MRC_INDEX (14) 3022 #define HD_OFDM_NON_SQUARE_DET_INTERCEPT_MRC_INDEX (15) 3023 #define HD_OFDM_NON_SQUARE_DET_SLOPE_INDEX (16) 3024 #define HD_OFDM_NON_SQUARE_DET_INTERCEPT_INDEX (17) 3025 #define HD_CCK_NON_SQUARE_DET_SLOPE_MRC_INDEX (18) 3026 #define HD_CCK_NON_SQUARE_DET_INTERCEPT_MRC_INDEX (19) 3027 #define HD_CCK_NON_SQUARE_DET_SLOPE_INDEX (20) 3028 #define HD_CCK_NON_SQUARE_DET_INTERCEPT_INDEX (21) 3029 #define HD_RESERVED (22) 3030 3031 /* number of entries for enhanced tbl */ 3032 #define ENHANCE_HD_TABLE_SIZE (23) 3033 3034 /* number of additional entries for enhanced tbl */ 3035 #define ENHANCE_HD_TABLE_ENTRIES (ENHANCE_HD_TABLE_SIZE - HD_TABLE_SIZE) 3036 3037 #define HD_INA_NON_SQUARE_DET_OFDM_DATA_V1 cpu_to_le16(0) 3038 #define HD_INA_NON_SQUARE_DET_CCK_DATA_V1 cpu_to_le16(0) 3039 #define HD_CORR_11_INSTEAD_OF_CORR_9_EN_DATA_V1 cpu_to_le16(0) 3040 #define HD_OFDM_NON_SQUARE_DET_SLOPE_MRC_DATA_V1 cpu_to_le16(668) 3041 #define HD_OFDM_NON_SQUARE_DET_INTERCEPT_MRC_DATA_V1 cpu_to_le16(4) 3042 #define HD_OFDM_NON_SQUARE_DET_SLOPE_DATA_V1 cpu_to_le16(486) 3043 #define HD_OFDM_NON_SQUARE_DET_INTERCEPT_DATA_V1 cpu_to_le16(37) 3044 #define HD_CCK_NON_SQUARE_DET_SLOPE_MRC_DATA_V1 cpu_to_le16(853) 3045 #define HD_CCK_NON_SQUARE_DET_INTERCEPT_MRC_DATA_V1 cpu_to_le16(4) 3046 #define HD_CCK_NON_SQUARE_DET_SLOPE_DATA_V1 cpu_to_le16(476) 3047 #define HD_CCK_NON_SQUARE_DET_INTERCEPT_DATA_V1 cpu_to_le16(99) 3048 3049 #define HD_INA_NON_SQUARE_DET_OFDM_DATA_V2 cpu_to_le16(1) 3050 #define HD_INA_NON_SQUARE_DET_CCK_DATA_V2 cpu_to_le16(1) 3051 #define HD_CORR_11_INSTEAD_OF_CORR_9_EN_DATA_V2 cpu_to_le16(1) 3052 #define HD_OFDM_NON_SQUARE_DET_SLOPE_MRC_DATA_V2 cpu_to_le16(600) 3053 #define HD_OFDM_NON_SQUARE_DET_INTERCEPT_MRC_DATA_V2 cpu_to_le16(40) 3054 #define HD_OFDM_NON_SQUARE_DET_SLOPE_DATA_V2 cpu_to_le16(486) 3055 #define HD_OFDM_NON_SQUARE_DET_INTERCEPT_DATA_V2 cpu_to_le16(45) 3056 #define HD_CCK_NON_SQUARE_DET_SLOPE_MRC_DATA_V2 cpu_to_le16(853) 3057 #define HD_CCK_NON_SQUARE_DET_INTERCEPT_MRC_DATA_V2 cpu_to_le16(60) 3058 #define HD_CCK_NON_SQUARE_DET_SLOPE_DATA_V2 cpu_to_le16(476) 3059 #define HD_CCK_NON_SQUARE_DET_INTERCEPT_DATA_V2 cpu_to_le16(99) 3060 3061 3062 /* Control field in struct iwl_sensitivity_cmd */ 3063 #define SENSITIVITY_CMD_CONTROL_DEFAULT_TABLE cpu_to_le16(0) 3064 #define SENSITIVITY_CMD_CONTROL_WORK_TABLE cpu_to_le16(1) 3065 3066 /** 3067 * struct iwl_sensitivity_cmd 3068 * @control: (1) updates working table, (0) updates default table 3069 * @table: energy threshold values, use HD_* as index into table 3070 * 3071 * Always use "1" in "control" to update uCode's working table and DSP. 3072 */ 3073 struct iwl_sensitivity_cmd { 3074 __le16 control; /* always use "1" */ 3075 __le16 table[HD_TABLE_SIZE]; /* use HD_* as index */ 3076 } __packed; 3077 3078 /* 3079 * 3080 */ 3081 struct iwl_enhance_sensitivity_cmd { 3082 __le16 control; /* always use "1" */ 3083 __le16 enhance_table[ENHANCE_HD_TABLE_SIZE]; /* use HD_* as index */ 3084 } __packed; 3085 3086 3087 /** 3088 * REPLY_PHY_CALIBRATION_CMD = 0xb0 (command, has simple generic response) 3089 * 3090 * This command sets the relative gains of agn device's 3 radio receiver chains. 3091 * 3092 * After the first association, driver should accumulate signal and noise 3093 * statistics from the STATISTICS_NOTIFICATIONs that follow the first 20 3094 * beacons from the associated network (don't collect statistics that come 3095 * in from scanning, or any other non-network source). 3096 * 3097 * DISCONNECTED ANTENNA: 3098 * 3099 * Driver should determine which antennas are actually connected, by comparing 3100 * average beacon signal levels for the 3 Rx chains. Accumulate (add) the 3101 * following values over 20 beacons, one accumulator for each of the chains 3102 * a/b/c, from struct statistics_rx_non_phy: 3103 * 3104 * beacon_rssi_[abc] & 0x0FF (unsigned, units in dB) 3105 * 3106 * Find the strongest signal from among a/b/c. Compare the other two to the 3107 * strongest. If any signal is more than 15 dB (times 20, unless you 3108 * divide the accumulated values by 20) below the strongest, the driver 3109 * considers that antenna to be disconnected, and should not try to use that 3110 * antenna/chain for Rx or Tx. If both A and B seem to be disconnected, 3111 * driver should declare the stronger one as connected, and attempt to use it 3112 * (A and B are the only 2 Tx chains!). 3113 * 3114 * 3115 * RX BALANCE: 3116 * 3117 * Driver should balance the 3 receivers (but just the ones that are connected 3118 * to antennas, see above) for gain, by comparing the average signal levels 3119 * detected during the silence after each beacon (background noise). 3120 * Accumulate (add) the following values over 20 beacons, one accumulator for 3121 * each of the chains a/b/c, from struct statistics_rx_non_phy: 3122 * 3123 * beacon_silence_rssi_[abc] & 0x0FF (unsigned, units in dB) 3124 * 3125 * Find the weakest background noise level from among a/b/c. This Rx chain 3126 * will be the reference, with 0 gain adjustment. Attenuate other channels by 3127 * finding noise difference: 3128 * 3129 * (accum_noise[i] - accum_noise[reference]) / 30 3130 * 3131 * The "30" adjusts the dB in the 20 accumulated samples to units of 1.5 dB. 3132 * For use in diff_gain_[abc] fields of struct iwl_calibration_cmd, the 3133 * driver should limit the difference results to a range of 0-3 (0-4.5 dB), 3134 * and set bit 2 to indicate "reduce gain". The value for the reference 3135 * (weakest) chain should be "0". 3136 * 3137 * diff_gain_[abc] bit fields: 3138 * 2: (1) reduce gain, (0) increase gain 3139 * 1-0: amount of gain, units of 1.5 dB 3140 */ 3141 3142 /* Phy calibration command for series */ 3143 enum { 3144 IWL_PHY_CALIBRATE_DC_CMD = 8, 3145 IWL_PHY_CALIBRATE_LO_CMD = 9, 3146 IWL_PHY_CALIBRATE_TX_IQ_CMD = 11, 3147 IWL_PHY_CALIBRATE_CRYSTAL_FRQ_CMD = 15, 3148 IWL_PHY_CALIBRATE_BASE_BAND_CMD = 16, 3149 IWL_PHY_CALIBRATE_TX_IQ_PERD_CMD = 17, 3150 IWL_PHY_CALIBRATE_TEMP_OFFSET_CMD = 18, 3151 }; 3152 3153 /* This enum defines the bitmap of various calibrations to enable in both 3154 * init ucode and runtime ucode through CALIBRATION_CFG_CMD. 3155 */ 3156 enum iwl_ucode_calib_cfg { 3157 IWL_CALIB_CFG_RX_BB_IDX = BIT(0), 3158 IWL_CALIB_CFG_DC_IDX = BIT(1), 3159 IWL_CALIB_CFG_LO_IDX = BIT(2), 3160 IWL_CALIB_CFG_TX_IQ_IDX = BIT(3), 3161 IWL_CALIB_CFG_RX_IQ_IDX = BIT(4), 3162 IWL_CALIB_CFG_NOISE_IDX = BIT(5), 3163 IWL_CALIB_CFG_CRYSTAL_IDX = BIT(6), 3164 IWL_CALIB_CFG_TEMPERATURE_IDX = BIT(7), 3165 IWL_CALIB_CFG_PAPD_IDX = BIT(8), 3166 IWL_CALIB_CFG_SENSITIVITY_IDX = BIT(9), 3167 IWL_CALIB_CFG_TX_PWR_IDX = BIT(10), 3168 }; 3169 3170 #define IWL_CALIB_INIT_CFG_ALL cpu_to_le32(IWL_CALIB_CFG_RX_BB_IDX | \ 3171 IWL_CALIB_CFG_DC_IDX | \ 3172 IWL_CALIB_CFG_LO_IDX | \ 3173 IWL_CALIB_CFG_TX_IQ_IDX | \ 3174 IWL_CALIB_CFG_RX_IQ_IDX | \ 3175 IWL_CALIB_CFG_CRYSTAL_IDX) 3176 3177 #define IWL_CALIB_RT_CFG_ALL cpu_to_le32(IWL_CALIB_CFG_RX_BB_IDX | \ 3178 IWL_CALIB_CFG_DC_IDX | \ 3179 IWL_CALIB_CFG_LO_IDX | \ 3180 IWL_CALIB_CFG_TX_IQ_IDX | \ 3181 IWL_CALIB_CFG_RX_IQ_IDX | \ 3182 IWL_CALIB_CFG_TEMPERATURE_IDX | \ 3183 IWL_CALIB_CFG_PAPD_IDX | \ 3184 IWL_CALIB_CFG_TX_PWR_IDX | \ 3185 IWL_CALIB_CFG_CRYSTAL_IDX) 3186 3187 #define IWL_CALIB_CFG_FLAG_SEND_COMPLETE_NTFY_MSK cpu_to_le32(BIT(0)) 3188 3189 struct iwl_calib_cfg_elmnt_s { 3190 __le32 is_enable; 3191 __le32 start; 3192 __le32 send_res; 3193 __le32 apply_res; 3194 __le32 reserved; 3195 } __packed; 3196 3197 struct iwl_calib_cfg_status_s { 3198 struct iwl_calib_cfg_elmnt_s once; 3199 struct iwl_calib_cfg_elmnt_s perd; 3200 __le32 flags; 3201 } __packed; 3202 3203 struct iwl_calib_cfg_cmd { 3204 struct iwl_calib_cfg_status_s ucd_calib_cfg; 3205 struct iwl_calib_cfg_status_s drv_calib_cfg; 3206 __le32 reserved1; 3207 } __packed; 3208 3209 struct iwl_calib_hdr { 3210 u8 op_code; 3211 u8 first_group; 3212 u8 groups_num; 3213 u8 data_valid; 3214 } __packed; 3215 3216 struct iwl_calib_cmd { 3217 struct iwl_calib_hdr hdr; 3218 u8 data[0]; 3219 } __packed; 3220 3221 struct iwl_calib_xtal_freq_cmd { 3222 struct iwl_calib_hdr hdr; 3223 u8 cap_pin1; 3224 u8 cap_pin2; 3225 u8 pad[2]; 3226 } __packed; 3227 3228 #define DEFAULT_RADIO_SENSOR_OFFSET cpu_to_le16(2700) 3229 struct iwl_calib_temperature_offset_cmd { 3230 struct iwl_calib_hdr hdr; 3231 __le16 radio_sensor_offset; 3232 __le16 reserved; 3233 } __packed; 3234 3235 struct iwl_calib_temperature_offset_v2_cmd { 3236 struct iwl_calib_hdr hdr; 3237 __le16 radio_sensor_offset_high; 3238 __le16 radio_sensor_offset_low; 3239 __le16 burntVoltageRef; 3240 __le16 reserved; 3241 } __packed; 3242 3243 /* IWL_PHY_CALIBRATE_CHAIN_NOISE_RESET_CMD */ 3244 struct iwl_calib_chain_noise_reset_cmd { 3245 struct iwl_calib_hdr hdr; 3246 u8 data[0]; 3247 }; 3248 3249 /* IWL_PHY_CALIBRATE_CHAIN_NOISE_GAIN_CMD */ 3250 struct iwl_calib_chain_noise_gain_cmd { 3251 struct iwl_calib_hdr hdr; 3252 u8 delta_gain_1; 3253 u8 delta_gain_2; 3254 u8 pad[2]; 3255 } __packed; 3256 3257 /****************************************************************************** 3258 * (12) 3259 * Miscellaneous Commands: 3260 * 3261 *****************************************************************************/ 3262 3263 /* 3264 * LEDs Command & Response 3265 * REPLY_LEDS_CMD = 0x48 (command, has simple generic response) 3266 * 3267 * For each of 3 possible LEDs (Activity/Link/Tech, selected by "id" field), 3268 * this command turns it on or off, or sets up a periodic blinking cycle. 3269 */ 3270 struct iwl_led_cmd { 3271 __le32 interval; /* "interval" in uSec */ 3272 u8 id; /* 1: Activity, 2: Link, 3: Tech */ 3273 u8 off; /* # intervals off while blinking; 3274 * "0", with >0 "on" value, turns LED on */ 3275 u8 on; /* # intervals on while blinking; 3276 * "0", regardless of "off", turns LED off */ 3277 u8 reserved; 3278 } __packed; 3279 3280 /* 3281 * station priority table entries 3282 * also used as potential "events" value for both 3283 * COEX_MEDIUM_NOTIFICATION and COEX_EVENT_CMD 3284 */ 3285 3286 /* 3287 * COEX events entry flag masks 3288 * RP - Requested Priority 3289 * WP - Win Medium Priority: priority assigned when the contention has been won 3290 */ 3291 #define COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG (0x1) 3292 #define COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG (0x2) 3293 #define COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG (0x4) 3294 3295 #define COEX_CU_UNASSOC_IDLE_RP 4 3296 #define COEX_CU_UNASSOC_MANUAL_SCAN_RP 4 3297 #define COEX_CU_UNASSOC_AUTO_SCAN_RP 4 3298 #define COEX_CU_CALIBRATION_RP 4 3299 #define COEX_CU_PERIODIC_CALIBRATION_RP 4 3300 #define COEX_CU_CONNECTION_ESTAB_RP 4 3301 #define COEX_CU_ASSOCIATED_IDLE_RP 4 3302 #define COEX_CU_ASSOC_MANUAL_SCAN_RP 4 3303 #define COEX_CU_ASSOC_AUTO_SCAN_RP 4 3304 #define COEX_CU_ASSOC_ACTIVE_LEVEL_RP 4 3305 #define COEX_CU_RF_ON_RP 6 3306 #define COEX_CU_RF_OFF_RP 4 3307 #define COEX_CU_STAND_ALONE_DEBUG_RP 6 3308 #define COEX_CU_IPAN_ASSOC_LEVEL_RP 4 3309 #define COEX_CU_RSRVD1_RP 4 3310 #define COEX_CU_RSRVD2_RP 4 3311 3312 #define COEX_CU_UNASSOC_IDLE_WP 3 3313 #define COEX_CU_UNASSOC_MANUAL_SCAN_WP 3 3314 #define COEX_CU_UNASSOC_AUTO_SCAN_WP 3 3315 #define COEX_CU_CALIBRATION_WP 3 3316 #define COEX_CU_PERIODIC_CALIBRATION_WP 3 3317 #define COEX_CU_CONNECTION_ESTAB_WP 3 3318 #define COEX_CU_ASSOCIATED_IDLE_WP 3 3319 #define COEX_CU_ASSOC_MANUAL_SCAN_WP 3 3320 #define COEX_CU_ASSOC_AUTO_SCAN_WP 3 3321 #define COEX_CU_ASSOC_ACTIVE_LEVEL_WP 3 3322 #define COEX_CU_RF_ON_WP 3 3323 #define COEX_CU_RF_OFF_WP 3 3324 #define COEX_CU_STAND_ALONE_DEBUG_WP 6 3325 #define COEX_CU_IPAN_ASSOC_LEVEL_WP 3 3326 #define COEX_CU_RSRVD1_WP 3 3327 #define COEX_CU_RSRVD2_WP 3 3328 3329 #define COEX_UNASSOC_IDLE_FLAGS 0 3330 #define COEX_UNASSOC_MANUAL_SCAN_FLAGS \ 3331 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \ 3332 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG) 3333 #define COEX_UNASSOC_AUTO_SCAN_FLAGS \ 3334 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \ 3335 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG) 3336 #define COEX_CALIBRATION_FLAGS \ 3337 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \ 3338 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG) 3339 #define COEX_PERIODIC_CALIBRATION_FLAGS 0 3340 /* 3341 * COEX_CONNECTION_ESTAB: 3342 * we need DELAY_MEDIUM_FREE_NTFY to let WiMAX disconnect from network. 3343 */ 3344 #define COEX_CONNECTION_ESTAB_FLAGS \ 3345 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \ 3346 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG | \ 3347 COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG) 3348 #define COEX_ASSOCIATED_IDLE_FLAGS 0 3349 #define COEX_ASSOC_MANUAL_SCAN_FLAGS \ 3350 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \ 3351 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG) 3352 #define COEX_ASSOC_AUTO_SCAN_FLAGS \ 3353 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \ 3354 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG) 3355 #define COEX_ASSOC_ACTIVE_LEVEL_FLAGS 0 3356 #define COEX_RF_ON_FLAGS 0 3357 #define COEX_RF_OFF_FLAGS 0 3358 #define COEX_STAND_ALONE_DEBUG_FLAGS \ 3359 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \ 3360 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG) 3361 #define COEX_IPAN_ASSOC_LEVEL_FLAGS \ 3362 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \ 3363 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG | \ 3364 COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG) 3365 #define COEX_RSRVD1_FLAGS 0 3366 #define COEX_RSRVD2_FLAGS 0 3367 /* 3368 * COEX_CU_RF_ON is the event wrapping all radio ownership. 3369 * We need DELAY_MEDIUM_FREE_NTFY to let WiMAX disconnect from network. 3370 */ 3371 #define COEX_CU_RF_ON_FLAGS \ 3372 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \ 3373 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG | \ 3374 COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG) 3375 3376 3377 enum { 3378 /* un-association part */ 3379 COEX_UNASSOC_IDLE = 0, 3380 COEX_UNASSOC_MANUAL_SCAN = 1, 3381 COEX_UNASSOC_AUTO_SCAN = 2, 3382 /* calibration */ 3383 COEX_CALIBRATION = 3, 3384 COEX_PERIODIC_CALIBRATION = 4, 3385 /* connection */ 3386 COEX_CONNECTION_ESTAB = 5, 3387 /* association part */ 3388 COEX_ASSOCIATED_IDLE = 6, 3389 COEX_ASSOC_MANUAL_SCAN = 7, 3390 COEX_ASSOC_AUTO_SCAN = 8, 3391 COEX_ASSOC_ACTIVE_LEVEL = 9, 3392 /* RF ON/OFF */ 3393 COEX_RF_ON = 10, 3394 COEX_RF_OFF = 11, 3395 COEX_STAND_ALONE_DEBUG = 12, 3396 /* IPAN */ 3397 COEX_IPAN_ASSOC_LEVEL = 13, 3398 /* reserved */ 3399 COEX_RSRVD1 = 14, 3400 COEX_RSRVD2 = 15, 3401 COEX_NUM_OF_EVENTS = 16 3402 }; 3403 3404 /* 3405 * Coexistence WIFI/WIMAX Command 3406 * COEX_PRIORITY_TABLE_CMD = 0x5a 3407 * 3408 */ 3409 struct iwl_wimax_coex_event_entry { 3410 u8 request_prio; 3411 u8 win_medium_prio; 3412 u8 reserved; 3413 u8 flags; 3414 } __packed; 3415 3416 /* COEX flag masks */ 3417 3418 /* Station table is valid */ 3419 #define COEX_FLAGS_STA_TABLE_VALID_MSK (0x1) 3420 /* UnMask wake up src at unassociated sleep */ 3421 #define COEX_FLAGS_UNASSOC_WA_UNMASK_MSK (0x4) 3422 /* UnMask wake up src at associated sleep */ 3423 #define COEX_FLAGS_ASSOC_WA_UNMASK_MSK (0x8) 3424 /* Enable CoEx feature. */ 3425 #define COEX_FLAGS_COEX_ENABLE_MSK (0x80) 3426 3427 struct iwl_wimax_coex_cmd { 3428 u8 flags; 3429 u8 reserved[3]; 3430 struct iwl_wimax_coex_event_entry sta_prio[COEX_NUM_OF_EVENTS]; 3431 } __packed; 3432 3433 /* 3434 * Coexistence MEDIUM NOTIFICATION 3435 * COEX_MEDIUM_NOTIFICATION = 0x5b 3436 * 3437 * notification from uCode to host to indicate medium changes 3438 * 3439 */ 3440 /* 3441 * status field 3442 * bit 0 - 2: medium status 3443 * bit 3: medium change indication 3444 * bit 4 - 31: reserved 3445 */ 3446 /* status option values, (0 - 2 bits) */ 3447 #define COEX_MEDIUM_BUSY (0x0) /* radio belongs to WiMAX */ 3448 #define COEX_MEDIUM_ACTIVE (0x1) /* radio belongs to WiFi */ 3449 #define COEX_MEDIUM_PRE_RELEASE (0x2) /* received radio release */ 3450 #define COEX_MEDIUM_MSK (0x7) 3451 3452 /* send notification status (1 bit) */ 3453 #define COEX_MEDIUM_CHANGED (0x8) 3454 #define COEX_MEDIUM_CHANGED_MSK (0x8) 3455 #define COEX_MEDIUM_SHIFT (3) 3456 3457 struct iwl_coex_medium_notification { 3458 __le32 status; 3459 __le32 events; 3460 } __packed; 3461 3462 /* 3463 * Coexistence EVENT Command 3464 * COEX_EVENT_CMD = 0x5c 3465 * 3466 * send from host to uCode for coex event request. 3467 */ 3468 /* flags options */ 3469 #define COEX_EVENT_REQUEST_MSK (0x1) 3470 3471 struct iwl_coex_event_cmd { 3472 u8 flags; 3473 u8 event; 3474 __le16 reserved; 3475 } __packed; 3476 3477 struct iwl_coex_event_resp { 3478 __le32 status; 3479 } __packed; 3480 3481 3482 /****************************************************************************** 3483 * Bluetooth Coexistence commands 3484 * 3485 *****************************************************************************/ 3486 3487 /* 3488 * BT Status notification 3489 * REPLY_BT_COEX_PROFILE_NOTIF = 0xce 3490 */ 3491 enum iwl_bt_coex_profile_traffic_load { 3492 IWL_BT_COEX_TRAFFIC_LOAD_NONE = 0, 3493 IWL_BT_COEX_TRAFFIC_LOAD_LOW = 1, 3494 IWL_BT_COEX_TRAFFIC_LOAD_HIGH = 2, 3495 IWL_BT_COEX_TRAFFIC_LOAD_CONTINUOUS = 3, 3496 /* 3497 * There are no more even though below is a u8, the 3498 * indication from the BT device only has two bits. 3499 */ 3500 }; 3501 3502 #define BT_SESSION_ACTIVITY_1_UART_MSG 0x1 3503 #define BT_SESSION_ACTIVITY_2_UART_MSG 0x2 3504 3505 /* BT UART message - Share Part (BT -> WiFi) */ 3506 #define BT_UART_MSG_FRAME1MSGTYPE_POS (0) 3507 #define BT_UART_MSG_FRAME1MSGTYPE_MSK \ 3508 (0x7 << BT_UART_MSG_FRAME1MSGTYPE_POS) 3509 #define BT_UART_MSG_FRAME1SSN_POS (3) 3510 #define BT_UART_MSG_FRAME1SSN_MSK \ 3511 (0x3 << BT_UART_MSG_FRAME1SSN_POS) 3512 #define BT_UART_MSG_FRAME1UPDATEREQ_POS (5) 3513 #define BT_UART_MSG_FRAME1UPDATEREQ_MSK \ 3514 (0x1 << BT_UART_MSG_FRAME1UPDATEREQ_POS) 3515 #define BT_UART_MSG_FRAME1RESERVED_POS (6) 3516 #define BT_UART_MSG_FRAME1RESERVED_MSK \ 3517 (0x3 << BT_UART_MSG_FRAME1RESERVED_POS) 3518 3519 #define BT_UART_MSG_FRAME2OPENCONNECTIONS_POS (0) 3520 #define BT_UART_MSG_FRAME2OPENCONNECTIONS_MSK \ 3521 (0x3 << BT_UART_MSG_FRAME2OPENCONNECTIONS_POS) 3522 #define BT_UART_MSG_FRAME2TRAFFICLOAD_POS (2) 3523 #define BT_UART_MSG_FRAME2TRAFFICLOAD_MSK \ 3524 (0x3 << BT_UART_MSG_FRAME2TRAFFICLOAD_POS) 3525 #define BT_UART_MSG_FRAME2CHLSEQN_POS (4) 3526 #define BT_UART_MSG_FRAME2CHLSEQN_MSK \ 3527 (0x1 << BT_UART_MSG_FRAME2CHLSEQN_POS) 3528 #define BT_UART_MSG_FRAME2INBAND_POS (5) 3529 #define BT_UART_MSG_FRAME2INBAND_MSK \ 3530 (0x1 << BT_UART_MSG_FRAME2INBAND_POS) 3531 #define BT_UART_MSG_FRAME2RESERVED_POS (6) 3532 #define BT_UART_MSG_FRAME2RESERVED_MSK \ 3533 (0x3 << BT_UART_MSG_FRAME2RESERVED_POS) 3534 3535 #define BT_UART_MSG_FRAME3SCOESCO_POS (0) 3536 #define BT_UART_MSG_FRAME3SCOESCO_MSK \ 3537 (0x1 << BT_UART_MSG_FRAME3SCOESCO_POS) 3538 #define BT_UART_MSG_FRAME3SNIFF_POS (1) 3539 #define BT_UART_MSG_FRAME3SNIFF_MSK \ 3540 (0x1 << BT_UART_MSG_FRAME3SNIFF_POS) 3541 #define BT_UART_MSG_FRAME3A2DP_POS (2) 3542 #define BT_UART_MSG_FRAME3A2DP_MSK \ 3543 (0x1 << BT_UART_MSG_FRAME3A2DP_POS) 3544 #define BT_UART_MSG_FRAME3ACL_POS (3) 3545 #define BT_UART_MSG_FRAME3ACL_MSK \ 3546 (0x1 << BT_UART_MSG_FRAME3ACL_POS) 3547 #define BT_UART_MSG_FRAME3MASTER_POS (4) 3548 #define BT_UART_MSG_FRAME3MASTER_MSK \ 3549 (0x1 << BT_UART_MSG_FRAME3MASTER_POS) 3550 #define BT_UART_MSG_FRAME3OBEX_POS (5) 3551 #define BT_UART_MSG_FRAME3OBEX_MSK \ 3552 (0x1 << BT_UART_MSG_FRAME3OBEX_POS) 3553 #define BT_UART_MSG_FRAME3RESERVED_POS (6) 3554 #define BT_UART_MSG_FRAME3RESERVED_MSK \ 3555 (0x3 << BT_UART_MSG_FRAME3RESERVED_POS) 3556 3557 #define BT_UART_MSG_FRAME4IDLEDURATION_POS (0) 3558 #define BT_UART_MSG_FRAME4IDLEDURATION_MSK \ 3559 (0x3F << BT_UART_MSG_FRAME4IDLEDURATION_POS) 3560 #define BT_UART_MSG_FRAME4RESERVED_POS (6) 3561 #define BT_UART_MSG_FRAME4RESERVED_MSK \ 3562 (0x3 << BT_UART_MSG_FRAME4RESERVED_POS) 3563 3564 #define BT_UART_MSG_FRAME5TXACTIVITY_POS (0) 3565 #define BT_UART_MSG_FRAME5TXACTIVITY_MSK \ 3566 (0x3 << BT_UART_MSG_FRAME5TXACTIVITY_POS) 3567 #define BT_UART_MSG_FRAME5RXACTIVITY_POS (2) 3568 #define BT_UART_MSG_FRAME5RXACTIVITY_MSK \ 3569 (0x3 << BT_UART_MSG_FRAME5RXACTIVITY_POS) 3570 #define BT_UART_MSG_FRAME5ESCORETRANSMIT_POS (4) 3571 #define BT_UART_MSG_FRAME5ESCORETRANSMIT_MSK \ 3572 (0x3 << BT_UART_MSG_FRAME5ESCORETRANSMIT_POS) 3573 #define BT_UART_MSG_FRAME5RESERVED_POS (6) 3574 #define BT_UART_MSG_FRAME5RESERVED_MSK \ 3575 (0x3 << BT_UART_MSG_FRAME5RESERVED_POS) 3576 3577 #define BT_UART_MSG_FRAME6SNIFFINTERVAL_POS (0) 3578 #define BT_UART_MSG_FRAME6SNIFFINTERVAL_MSK \ 3579 (0x1F << BT_UART_MSG_FRAME6SNIFFINTERVAL_POS) 3580 #define BT_UART_MSG_FRAME6DISCOVERABLE_POS (5) 3581 #define BT_UART_MSG_FRAME6DISCOVERABLE_MSK \ 3582 (0x1 << BT_UART_MSG_FRAME6DISCOVERABLE_POS) 3583 #define BT_UART_MSG_FRAME6RESERVED_POS (6) 3584 #define BT_UART_MSG_FRAME6RESERVED_MSK \ 3585 (0x3 << BT_UART_MSG_FRAME6RESERVED_POS) 3586 3587 #define BT_UART_MSG_FRAME7SNIFFACTIVITY_POS (0) 3588 #define BT_UART_MSG_FRAME7SNIFFACTIVITY_MSK \ 3589 (0x7 << BT_UART_MSG_FRAME7SNIFFACTIVITY_POS) 3590 #define BT_UART_MSG_FRAME7PAGE_POS (3) 3591 #define BT_UART_MSG_FRAME7PAGE_MSK \ 3592 (0x1 << BT_UART_MSG_FRAME7PAGE_POS) 3593 #define BT_UART_MSG_FRAME7INQUIRY_POS (4) 3594 #define BT_UART_MSG_FRAME7INQUIRY_MSK \ 3595 (0x1 << BT_UART_MSG_FRAME7INQUIRY_POS) 3596 #define BT_UART_MSG_FRAME7CONNECTABLE_POS (5) 3597 #define BT_UART_MSG_FRAME7CONNECTABLE_MSK \ 3598 (0x1 << BT_UART_MSG_FRAME7CONNECTABLE_POS) 3599 #define BT_UART_MSG_FRAME7RESERVED_POS (6) 3600 #define BT_UART_MSG_FRAME7RESERVED_MSK \ 3601 (0x3 << BT_UART_MSG_FRAME7RESERVED_POS) 3602 3603 /* BT Session Activity 2 UART message (BT -> WiFi) */ 3604 #define BT_UART_MSG_2_FRAME1RESERVED1_POS (5) 3605 #define BT_UART_MSG_2_FRAME1RESERVED1_MSK \ 3606 (0x1<<BT_UART_MSG_2_FRAME1RESERVED1_POS) 3607 #define BT_UART_MSG_2_FRAME1RESERVED2_POS (6) 3608 #define BT_UART_MSG_2_FRAME1RESERVED2_MSK \ 3609 (0x3<<BT_UART_MSG_2_FRAME1RESERVED2_POS) 3610 3611 #define BT_UART_MSG_2_FRAME2AGGTRAFFICLOAD_POS (0) 3612 #define BT_UART_MSG_2_FRAME2AGGTRAFFICLOAD_MSK \ 3613 (0x3F<<BT_UART_MSG_2_FRAME2AGGTRAFFICLOAD_POS) 3614 #define BT_UART_MSG_2_FRAME2RESERVED_POS (6) 3615 #define BT_UART_MSG_2_FRAME2RESERVED_MSK \ 3616 (0x3<<BT_UART_MSG_2_FRAME2RESERVED_POS) 3617 3618 #define BT_UART_MSG_2_FRAME3BRLASTTXPOWER_POS (0) 3619 #define BT_UART_MSG_2_FRAME3BRLASTTXPOWER_MSK \ 3620 (0xF<<BT_UART_MSG_2_FRAME3BRLASTTXPOWER_POS) 3621 #define BT_UART_MSG_2_FRAME3INQPAGESRMODE_POS (4) 3622 #define BT_UART_MSG_2_FRAME3INQPAGESRMODE_MSK \ 3623 (0x1<<BT_UART_MSG_2_FRAME3INQPAGESRMODE_POS) 3624 #define BT_UART_MSG_2_FRAME3LEMASTER_POS (5) 3625 #define BT_UART_MSG_2_FRAME3LEMASTER_MSK \ 3626 (0x1<<BT_UART_MSG_2_FRAME3LEMASTER_POS) 3627 #define BT_UART_MSG_2_FRAME3RESERVED_POS (6) 3628 #define BT_UART_MSG_2_FRAME3RESERVED_MSK \ 3629 (0x3<<BT_UART_MSG_2_FRAME3RESERVED_POS) 3630 3631 #define BT_UART_MSG_2_FRAME4LELASTTXPOWER_POS (0) 3632 #define BT_UART_MSG_2_FRAME4LELASTTXPOWER_MSK \ 3633 (0xF<<BT_UART_MSG_2_FRAME4LELASTTXPOWER_POS) 3634 #define BT_UART_MSG_2_FRAME4NUMLECONN_POS (4) 3635 #define BT_UART_MSG_2_FRAME4NUMLECONN_MSK \ 3636 (0x3<<BT_UART_MSG_2_FRAME4NUMLECONN_POS) 3637 #define BT_UART_MSG_2_FRAME4RESERVED_POS (6) 3638 #define BT_UART_MSG_2_FRAME4RESERVED_MSK \ 3639 (0x3<<BT_UART_MSG_2_FRAME4RESERVED_POS) 3640 3641 #define BT_UART_MSG_2_FRAME5BTMINRSSI_POS (0) 3642 #define BT_UART_MSG_2_FRAME5BTMINRSSI_MSK \ 3643 (0xF<<BT_UART_MSG_2_FRAME5BTMINRSSI_POS) 3644 #define BT_UART_MSG_2_FRAME5LESCANINITMODE_POS (4) 3645 #define BT_UART_MSG_2_FRAME5LESCANINITMODE_MSK \ 3646 (0x1<<BT_UART_MSG_2_FRAME5LESCANINITMODE_POS) 3647 #define BT_UART_MSG_2_FRAME5LEADVERMODE_POS (5) 3648 #define BT_UART_MSG_2_FRAME5LEADVERMODE_MSK \ 3649 (0x1<<BT_UART_MSG_2_FRAME5LEADVERMODE_POS) 3650 #define BT_UART_MSG_2_FRAME5RESERVED_POS (6) 3651 #define BT_UART_MSG_2_FRAME5RESERVED_MSK \ 3652 (0x3<<BT_UART_MSG_2_FRAME5RESERVED_POS) 3653 3654 #define BT_UART_MSG_2_FRAME6LECONNINTERVAL_POS (0) 3655 #define BT_UART_MSG_2_FRAME6LECONNINTERVAL_MSK \ 3656 (0x1F<<BT_UART_MSG_2_FRAME6LECONNINTERVAL_POS) 3657 #define BT_UART_MSG_2_FRAME6RFU_POS (5) 3658 #define BT_UART_MSG_2_FRAME6RFU_MSK \ 3659 (0x1<<BT_UART_MSG_2_FRAME6RFU_POS) 3660 #define BT_UART_MSG_2_FRAME6RESERVED_POS (6) 3661 #define BT_UART_MSG_2_FRAME6RESERVED_MSK \ 3662 (0x3<<BT_UART_MSG_2_FRAME6RESERVED_POS) 3663 3664 #define BT_UART_MSG_2_FRAME7LECONNSLAVELAT_POS (0) 3665 #define BT_UART_MSG_2_FRAME7LECONNSLAVELAT_MSK \ 3666 (0x7<<BT_UART_MSG_2_FRAME7LECONNSLAVELAT_POS) 3667 #define BT_UART_MSG_2_FRAME7LEPROFILE1_POS (3) 3668 #define BT_UART_MSG_2_FRAME7LEPROFILE1_MSK \ 3669 (0x1<<BT_UART_MSG_2_FRAME7LEPROFILE1_POS) 3670 #define BT_UART_MSG_2_FRAME7LEPROFILE2_POS (4) 3671 #define BT_UART_MSG_2_FRAME7LEPROFILE2_MSK \ 3672 (0x1<<BT_UART_MSG_2_FRAME7LEPROFILE2_POS) 3673 #define BT_UART_MSG_2_FRAME7LEPROFILEOTHER_POS (5) 3674 #define BT_UART_MSG_2_FRAME7LEPROFILEOTHER_MSK \ 3675 (0x1<<BT_UART_MSG_2_FRAME7LEPROFILEOTHER_POS) 3676 #define BT_UART_MSG_2_FRAME7RESERVED_POS (6) 3677 #define BT_UART_MSG_2_FRAME7RESERVED_MSK \ 3678 (0x3<<BT_UART_MSG_2_FRAME7RESERVED_POS) 3679 3680 3681 #define BT_ENABLE_REDUCED_TXPOWER_THRESHOLD (-62) 3682 #define BT_DISABLE_REDUCED_TXPOWER_THRESHOLD (-65) 3683 3684 struct iwl_bt_uart_msg { 3685 u8 header; 3686 u8 frame1; 3687 u8 frame2; 3688 u8 frame3; 3689 u8 frame4; 3690 u8 frame5; 3691 u8 frame6; 3692 u8 frame7; 3693 } __packed; 3694 3695 struct iwl_bt_coex_profile_notif { 3696 struct iwl_bt_uart_msg last_bt_uart_msg; 3697 u8 bt_status; /* 0 - off, 1 - on */ 3698 u8 bt_traffic_load; /* 0 .. 3? */ 3699 u8 bt_ci_compliance; /* 0 - not complied, 1 - complied */ 3700 u8 reserved; 3701 } __packed; 3702 3703 #define IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS 0 3704 #define IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_MSK 0x1 3705 #define IWL_BT_COEX_PRIO_TBL_PRIO_POS 1 3706 #define IWL_BT_COEX_PRIO_TBL_PRIO_MASK 0x0e 3707 #define IWL_BT_COEX_PRIO_TBL_RESERVED_POS 4 3708 #define IWL_BT_COEX_PRIO_TBL_RESERVED_MASK 0xf0 3709 #define IWL_BT_COEX_PRIO_TBL_PRIO_SHIFT 1 3710 3711 /* 3712 * BT Coexistence Priority table 3713 * REPLY_BT_COEX_PRIO_TABLE = 0xcc 3714 */ 3715 enum bt_coex_prio_table_events { 3716 BT_COEX_PRIO_TBL_EVT_INIT_CALIB1 = 0, 3717 BT_COEX_PRIO_TBL_EVT_INIT_CALIB2 = 1, 3718 BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_LOW1 = 2, 3719 BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_LOW2 = 3, /* DC calib */ 3720 BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_HIGH1 = 4, 3721 BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_HIGH2 = 5, 3722 BT_COEX_PRIO_TBL_EVT_DTIM = 6, 3723 BT_COEX_PRIO_TBL_EVT_SCAN52 = 7, 3724 BT_COEX_PRIO_TBL_EVT_SCAN24 = 8, 3725 BT_COEX_PRIO_TBL_EVT_RESERVED0 = 9, 3726 BT_COEX_PRIO_TBL_EVT_RESERVED1 = 10, 3727 BT_COEX_PRIO_TBL_EVT_RESERVED2 = 11, 3728 BT_COEX_PRIO_TBL_EVT_RESERVED3 = 12, 3729 BT_COEX_PRIO_TBL_EVT_RESERVED4 = 13, 3730 BT_COEX_PRIO_TBL_EVT_RESERVED5 = 14, 3731 BT_COEX_PRIO_TBL_EVT_RESERVED6 = 15, 3732 /* BT_COEX_PRIO_TBL_EVT_MAX should always be last */ 3733 BT_COEX_PRIO_TBL_EVT_MAX, 3734 }; 3735 3736 enum bt_coex_prio_table_priorities { 3737 BT_COEX_PRIO_TBL_DISABLED = 0, 3738 BT_COEX_PRIO_TBL_PRIO_LOW = 1, 3739 BT_COEX_PRIO_TBL_PRIO_HIGH = 2, 3740 BT_COEX_PRIO_TBL_PRIO_BYPASS = 3, 3741 BT_COEX_PRIO_TBL_PRIO_COEX_OFF = 4, 3742 BT_COEX_PRIO_TBL_PRIO_COEX_ON = 5, 3743 BT_COEX_PRIO_TBL_PRIO_RSRVD1 = 6, 3744 BT_COEX_PRIO_TBL_PRIO_RSRVD2 = 7, 3745 BT_COEX_PRIO_TBL_MAX, 3746 }; 3747 3748 struct iwl_bt_coex_prio_table_cmd { 3749 u8 prio_tbl[BT_COEX_PRIO_TBL_EVT_MAX]; 3750 } __packed; 3751 3752 #define IWL_BT_COEX_ENV_CLOSE 0 3753 #define IWL_BT_COEX_ENV_OPEN 1 3754 /* 3755 * BT Protection Envelope 3756 * REPLY_BT_COEX_PROT_ENV = 0xcd 3757 */ 3758 struct iwl_bt_coex_prot_env_cmd { 3759 u8 action; /* 0 = closed, 1 = open */ 3760 u8 type; /* 0 .. 15 */ 3761 u8 reserved[2]; 3762 } __packed; 3763 3764 /* 3765 * REPLY_D3_CONFIG 3766 */ 3767 enum iwlagn_d3_wakeup_filters { 3768 IWLAGN_D3_WAKEUP_RFKILL = BIT(0), 3769 IWLAGN_D3_WAKEUP_SYSASSERT = BIT(1), 3770 }; 3771 3772 struct iwlagn_d3_config_cmd { 3773 __le32 min_sleep_time; 3774 __le32 wakeup_flags; 3775 } __packed; 3776 3777 /* 3778 * REPLY_WOWLAN_PATTERNS 3779 */ 3780 #define IWLAGN_WOWLAN_MIN_PATTERN_LEN 16 3781 #define IWLAGN_WOWLAN_MAX_PATTERN_LEN 128 3782 3783 struct iwlagn_wowlan_pattern { 3784 u8 mask[IWLAGN_WOWLAN_MAX_PATTERN_LEN / 8]; 3785 u8 pattern[IWLAGN_WOWLAN_MAX_PATTERN_LEN]; 3786 u8 mask_size; 3787 u8 pattern_size; 3788 __le16 reserved; 3789 } __packed; 3790 3791 #define IWLAGN_WOWLAN_MAX_PATTERNS 20 3792 3793 struct iwlagn_wowlan_patterns_cmd { 3794 __le32 n_patterns; 3795 struct iwlagn_wowlan_pattern patterns[]; 3796 } __packed; 3797 3798 /* 3799 * REPLY_WOWLAN_WAKEUP_FILTER 3800 */ 3801 enum iwlagn_wowlan_wakeup_filters { 3802 IWLAGN_WOWLAN_WAKEUP_MAGIC_PACKET = BIT(0), 3803 IWLAGN_WOWLAN_WAKEUP_PATTERN_MATCH = BIT(1), 3804 IWLAGN_WOWLAN_WAKEUP_BEACON_MISS = BIT(2), 3805 IWLAGN_WOWLAN_WAKEUP_LINK_CHANGE = BIT(3), 3806 IWLAGN_WOWLAN_WAKEUP_GTK_REKEY_FAIL = BIT(4), 3807 IWLAGN_WOWLAN_WAKEUP_EAP_IDENT_REQ = BIT(5), 3808 IWLAGN_WOWLAN_WAKEUP_4WAY_HANDSHAKE = BIT(6), 3809 IWLAGN_WOWLAN_WAKEUP_ALWAYS = BIT(7), 3810 IWLAGN_WOWLAN_WAKEUP_ENABLE_NET_DETECT = BIT(8), 3811 }; 3812 3813 struct iwlagn_wowlan_wakeup_filter_cmd { 3814 __le32 enabled; 3815 __le16 non_qos_seq; 3816 __le16 reserved; 3817 __le16 qos_seq[8]; 3818 }; 3819 3820 /* 3821 * REPLY_WOWLAN_TSC_RSC_PARAMS 3822 */ 3823 #define IWLAGN_NUM_RSC 16 3824 3825 struct tkip_sc { 3826 __le16 iv16; 3827 __le16 pad; 3828 __le32 iv32; 3829 } __packed; 3830 3831 struct iwlagn_tkip_rsc_tsc { 3832 struct tkip_sc unicast_rsc[IWLAGN_NUM_RSC]; 3833 struct tkip_sc multicast_rsc[IWLAGN_NUM_RSC]; 3834 struct tkip_sc tsc; 3835 } __packed; 3836 3837 struct aes_sc { 3838 __le64 pn; 3839 } __packed; 3840 3841 struct iwlagn_aes_rsc_tsc { 3842 struct aes_sc unicast_rsc[IWLAGN_NUM_RSC]; 3843 struct aes_sc multicast_rsc[IWLAGN_NUM_RSC]; 3844 struct aes_sc tsc; 3845 } __packed; 3846 3847 union iwlagn_all_tsc_rsc { 3848 struct iwlagn_tkip_rsc_tsc tkip; 3849 struct iwlagn_aes_rsc_tsc aes; 3850 }; 3851 3852 struct iwlagn_wowlan_rsc_tsc_params_cmd { 3853 union iwlagn_all_tsc_rsc all_tsc_rsc; 3854 } __packed; 3855 3856 /* 3857 * REPLY_WOWLAN_TKIP_PARAMS 3858 */ 3859 #define IWLAGN_MIC_KEY_SIZE 8 3860 #define IWLAGN_P1K_SIZE 5 3861 struct iwlagn_mic_keys { 3862 u8 tx[IWLAGN_MIC_KEY_SIZE]; 3863 u8 rx_unicast[IWLAGN_MIC_KEY_SIZE]; 3864 u8 rx_mcast[IWLAGN_MIC_KEY_SIZE]; 3865 } __packed; 3866 3867 struct iwlagn_p1k_cache { 3868 __le16 p1k[IWLAGN_P1K_SIZE]; 3869 } __packed; 3870 3871 #define IWLAGN_NUM_RX_P1K_CACHE 2 3872 3873 struct iwlagn_wowlan_tkip_params_cmd { 3874 struct iwlagn_mic_keys mic_keys; 3875 struct iwlagn_p1k_cache tx; 3876 struct iwlagn_p1k_cache rx_uni[IWLAGN_NUM_RX_P1K_CACHE]; 3877 struct iwlagn_p1k_cache rx_multi[IWLAGN_NUM_RX_P1K_CACHE]; 3878 } __packed; 3879 3880 /* 3881 * REPLY_WOWLAN_KEK_KCK_MATERIAL 3882 */ 3883 3884 #define IWLAGN_KCK_MAX_SIZE 32 3885 #define IWLAGN_KEK_MAX_SIZE 32 3886 3887 struct iwlagn_wowlan_kek_kck_material_cmd { 3888 u8 kck[IWLAGN_KCK_MAX_SIZE]; 3889 u8 kek[IWLAGN_KEK_MAX_SIZE]; 3890 __le16 kck_len; 3891 __le16 kek_len; 3892 __le64 replay_ctr; 3893 } __packed; 3894 3895 #define RF_KILL_INDICATOR_FOR_WOWLAN 0x87 3896 3897 /* 3898 * REPLY_WOWLAN_GET_STATUS = 0xe5 3899 */ 3900 struct iwlagn_wowlan_status { 3901 __le64 replay_ctr; 3902 __le32 rekey_status; 3903 __le32 wakeup_reason; 3904 u8 pattern_number; 3905 u8 reserved1; 3906 __le16 qos_seq_ctr[8]; 3907 __le16 non_qos_seq_ctr; 3908 __le16 reserved2; 3909 union iwlagn_all_tsc_rsc tsc_rsc; 3910 __le16 reserved3; 3911 } __packed; 3912 3913 /* 3914 * REPLY_WIPAN_PARAMS = 0xb2 (Commands and Notification) 3915 */ 3916 3917 /* 3918 * Minimum slot time in TU 3919 */ 3920 #define IWL_MIN_SLOT_TIME 20 3921 3922 /** 3923 * struct iwl_wipan_slot 3924 * @width: Time in TU 3925 * @type: 3926 * 0 - BSS 3927 * 1 - PAN 3928 */ 3929 struct iwl_wipan_slot { 3930 __le16 width; 3931 u8 type; 3932 u8 reserved; 3933 } __packed; 3934 3935 #define IWL_WIPAN_PARAMS_FLG_LEAVE_CHANNEL_CTS BIT(1) /* reserved */ 3936 #define IWL_WIPAN_PARAMS_FLG_LEAVE_CHANNEL_QUIET BIT(2) /* reserved */ 3937 #define IWL_WIPAN_PARAMS_FLG_SLOTTED_MODE BIT(3) /* reserved */ 3938 #define IWL_WIPAN_PARAMS_FLG_FILTER_BEACON_NOTIF BIT(4) 3939 #define IWL_WIPAN_PARAMS_FLG_FULL_SLOTTED_MODE BIT(5) 3940 3941 /** 3942 * struct iwl_wipan_params_cmd 3943 * @flags: 3944 * bit0: reserved 3945 * bit1: CP leave channel with CTS 3946 * bit2: CP leave channel qith Quiet 3947 * bit3: slotted mode 3948 * 1 - work in slotted mode 3949 * 0 - work in non slotted mode 3950 * bit4: filter beacon notification 3951 * bit5: full tx slotted mode. if this flag is set, 3952 * uCode will perform leaving channel methods in context switch 3953 * also when working in same channel mode 3954 * @num_slots: 1 - 10 3955 */ 3956 struct iwl_wipan_params_cmd { 3957 __le16 flags; 3958 u8 reserved; 3959 u8 num_slots; 3960 struct iwl_wipan_slot slots[10]; 3961 } __packed; 3962 3963 /* 3964 * REPLY_WIPAN_P2P_CHANNEL_SWITCH = 0xb9 3965 * 3966 * TODO: Figure out what this is used for, 3967 * it can only switch between 2.4 GHz 3968 * channels!! 3969 */ 3970 3971 struct iwl_wipan_p2p_channel_switch_cmd { 3972 __le16 channel; 3973 __le16 reserved; 3974 }; 3975 3976 /* 3977 * REPLY_WIPAN_NOA_NOTIFICATION = 0xbc 3978 * 3979 * This is used by the device to notify us of the 3980 * NoA schedule it determined so we can forward it 3981 * to userspace for inclusion in probe responses. 3982 * 3983 * In beacons, the NoA schedule is simply appended 3984 * to the frame we give the device. 3985 */ 3986 3987 struct iwl_wipan_noa_descriptor { 3988 u8 count; 3989 __le32 duration; 3990 __le32 interval; 3991 __le32 starttime; 3992 } __packed; 3993 3994 struct iwl_wipan_noa_attribute { 3995 u8 id; 3996 __le16 length; 3997 u8 index; 3998 u8 ct_window; 3999 struct iwl_wipan_noa_descriptor descr0, descr1; 4000 u8 reserved; 4001 } __packed; 4002 4003 struct iwl_wipan_noa_notification { 4004 u32 noa_active; 4005 struct iwl_wipan_noa_attribute noa_attribute; 4006 } __packed; 4007 4008 #endif /* __iwl_commands_h__ */ 4009