xref: /linux/drivers/net/wireless/intel/iwlwifi/cfg/9000.c (revision bca5cfbb694d66a1c482d0c347eee80f6afbc870)
1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /*
3  * Copyright (C) 2015-2017 Intel Deutschland GmbH
4  * Copyright (C) 2018-2021, 2023, 2025 Intel Corporation
5  */
6 #include <linux/module.h>
7 #include <linux/stringify.h>
8 #include "iwl-config.h"
9 #include "fw/file.h"
10 #include "iwl-prph.h"
11 
12 /* Highest firmware API version supported */
13 #define IWL9000_UCODE_API_MAX	46
14 
15 /* Lowest firmware API version supported */
16 #define IWL9000_UCODE_API_MIN	30
17 
18 /* Memory offsets and lengths */
19 #define IWL9000_SMEM_OFFSET		0x400000
20 #define IWL9000_SMEM_LEN		0x68000
21 
22 #define  IWL9000_FW_PRE "iwlwifi-9000-pu-b0-jf-b0"
23 #define  IWL9260_FW_PRE "iwlwifi-9260-th-b0-jf-b0"
24 #define IWL9000_MODULE_FIRMWARE(api) \
25 	IWL9000_FW_PRE "-" __stringify(api) ".ucode"
26 #define IWL9260_MODULE_FIRMWARE(api) \
27 	IWL9260_FW_PRE "-" __stringify(api) ".ucode"
28 
29 static const struct iwl_family_base_params iwl9000_base = {
30 	.eeprom_size = OTP_LOW_IMAGE_SIZE_32K,
31 	.num_of_queues = 31,
32 	.max_tfd_queue_size = 256,
33 	.shadow_ram_support = true,
34 	.led_compensation = 57,
35 	.wd_timeout = IWL_LONG_WD_TIMEOUT,
36 	.max_event_log_size = 512,
37 	.shadow_reg_enable = true,
38 	.pcie_l1_allowed = true,
39 	.smem_offset = IWL9000_SMEM_OFFSET,
40 	.smem_len = IWL9000_SMEM_LEN,
41 	.features = IWL_TX_CSUM_NETIF_FLAGS | NETIF_F_RXCSUM,
42 	.apmg_not_supported = true,
43 	.mac_addr_from_csr = 0x380,
44 	.min_umac_error_event_table = 0x800000,
45 	.d3_debug_data_base_addr = 0x401000,
46 	.d3_debug_data_length = 92 * 1024,
47 	.nvm_hw_section_num = 10,
48 	.mon_smem_regs = {
49 		.write_ptr = {
50 			.addr = LDBG_M2S_BUF_WPTR,
51 			.mask = LDBG_M2S_BUF_WPTR_VAL_MSK,
52 		},
53 		.cycle_cnt = {
54 			.addr = LDBG_M2S_BUF_WRAP_CNT,
55 			.mask = LDBG_M2S_BUF_WRAP_CNT_VAL_MSK,
56 		},
57 	},
58 	.mon_dram_regs = {
59 		.write_ptr = {
60 			.addr = MON_BUFF_WRPTR_VER2,
61 			.mask = 0xffffffff,
62 		},
63 		.cycle_cnt = {
64 			.addr = MON_BUFF_CYCLE_CNT_VER2,
65 			.mask = 0xffffffff,
66 		},
67 	},
68 	.ucode_api_max = IWL9000_UCODE_API_MAX,
69 	.ucode_api_min = IWL9000_UCODE_API_MIN,
70 };
71 
72 const struct iwl_mac_cfg iwl9000_mac_cfg = {
73 	.device_family = IWL_DEVICE_FAMILY_9000,
74 	.base = &iwl9000_base,
75 	.mq_rx_supported = true,
76 };
77 
78 const struct iwl_mac_cfg iwl9560_mac_cfg = {
79 	.device_family = IWL_DEVICE_FAMILY_9000,
80 	.base = &iwl9000_base,
81 	.mq_rx_supported = true,
82 	.integrated = true,
83 	.xtal_latency = 650,
84 };
85 
86 const struct iwl_mac_cfg iwl9560_long_latency_mac_cfg = {
87 	.device_family = IWL_DEVICE_FAMILY_9000,
88 	.base = &iwl9000_base,
89 	.mq_rx_supported = true,
90 	.integrated = true,
91 	.xtal_latency = 2820,
92 };
93 
94 const struct iwl_mac_cfg iwl9560_shared_clk_mac_cfg = {
95 	.device_family = IWL_DEVICE_FAMILY_9000,
96 	.base = &iwl9000_base,
97 	.mq_rx_supported = true,
98 	.integrated = true,
99 	.xtal_latency = 670,
100 	.extra_phy_cfg_flags = FW_PHY_CFG_SHARED_CLK
101 };
102 
103 MODULE_FIRMWARE(IWL9000_MODULE_FIRMWARE(IWL9000_UCODE_API_MAX));
104 MODULE_FIRMWARE(IWL9260_MODULE_FIRMWARE(IWL9000_UCODE_API_MAX));
105