1 // SPDX-License-Identifier: GPL-2.0-only 2 /****************************************************************************** 3 * 4 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. 5 * 6 * Contact Information: 7 * Intel Linux Wireless <ilw@linux.intel.com> 8 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 9 *****************************************************************************/ 10 11 #include <linux/kernel.h> 12 #include <linux/module.h> 13 #include <linux/etherdevice.h> 14 #include <linux/sched.h> 15 #include <linux/slab.h> 16 #include <linux/types.h> 17 #include <linux/lockdep.h> 18 #include <linux/pci.h> 19 #include <linux/dma-mapping.h> 20 #include <linux/delay.h> 21 #include <linux/skbuff.h> 22 #include <net/mac80211.h> 23 24 #include "common.h" 25 26 int 27 _il_poll_bit(struct il_priv *il, u32 addr, u32 bits, u32 mask, int timeout) 28 { 29 const int interval = 10; /* microseconds */ 30 int t = 0; 31 32 do { 33 if ((_il_rd(il, addr) & mask) == (bits & mask)) 34 return t; 35 udelay(interval); 36 t += interval; 37 } while (t < timeout); 38 39 return -ETIMEDOUT; 40 } 41 EXPORT_SYMBOL(_il_poll_bit); 42 43 void 44 il_set_bit(struct il_priv *p, u32 r, u32 m) 45 { 46 unsigned long reg_flags; 47 48 spin_lock_irqsave(&p->reg_lock, reg_flags); 49 _il_set_bit(p, r, m); 50 spin_unlock_irqrestore(&p->reg_lock, reg_flags); 51 } 52 EXPORT_SYMBOL(il_set_bit); 53 54 void 55 il_clear_bit(struct il_priv *p, u32 r, u32 m) 56 { 57 unsigned long reg_flags; 58 59 spin_lock_irqsave(&p->reg_lock, reg_flags); 60 _il_clear_bit(p, r, m); 61 spin_unlock_irqrestore(&p->reg_lock, reg_flags); 62 } 63 EXPORT_SYMBOL(il_clear_bit); 64 65 bool 66 _il_grab_nic_access(struct il_priv *il) 67 { 68 int ret; 69 u32 val; 70 71 /* this bit wakes up the NIC */ 72 _il_set_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); 73 74 /* 75 * These bits say the device is running, and should keep running for 76 * at least a short while (at least as long as MAC_ACCESS_REQ stays 1), 77 * but they do not indicate that embedded SRAM is restored yet; 78 * 3945 and 4965 have volatile SRAM, and must save/restore contents 79 * to/from host DRAM when sleeping/waking for power-saving. 80 * Each direction takes approximately 1/4 millisecond; with this 81 * overhead, it's a good idea to grab and hold MAC_ACCESS_REQUEST if a 82 * series of register accesses are expected (e.g. reading Event Log), 83 * to keep device from sleeping. 84 * 85 * CSR_UCODE_DRV_GP1 register bit MAC_SLEEP == 0 indicates that 86 * SRAM is okay/restored. We don't check that here because this call 87 * is just for hardware register access; but GP1 MAC_SLEEP check is a 88 * good idea before accessing 3945/4965 SRAM (e.g. reading Event Log). 89 * 90 */ 91 ret = 92 _il_poll_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_VAL_MAC_ACCESS_EN, 93 (CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY | 94 CSR_GP_CNTRL_REG_FLAG_GOING_TO_SLEEP), 15000); 95 if (unlikely(ret < 0)) { 96 val = _il_rd(il, CSR_GP_CNTRL); 97 WARN_ONCE(1, "Timeout waiting for ucode processor access " 98 "(CSR_GP_CNTRL 0x%08x)\n", val); 99 _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_FORCE_NMI); 100 return false; 101 } 102 103 return true; 104 } 105 EXPORT_SYMBOL_GPL(_il_grab_nic_access); 106 107 int 108 il_poll_bit(struct il_priv *il, u32 addr, u32 mask, int timeout) 109 { 110 const int interval = 10; /* microseconds */ 111 int t = 0; 112 113 do { 114 if ((il_rd(il, addr) & mask) == mask) 115 return t; 116 udelay(interval); 117 t += interval; 118 } while (t < timeout); 119 120 return -ETIMEDOUT; 121 } 122 EXPORT_SYMBOL(il_poll_bit); 123 124 u32 125 il_rd_prph(struct il_priv *il, u32 reg) 126 { 127 unsigned long reg_flags; 128 u32 val; 129 130 spin_lock_irqsave(&il->reg_lock, reg_flags); 131 _il_grab_nic_access(il); 132 val = _il_rd_prph(il, reg); 133 _il_release_nic_access(il); 134 spin_unlock_irqrestore(&il->reg_lock, reg_flags); 135 return val; 136 } 137 EXPORT_SYMBOL(il_rd_prph); 138 139 void 140 il_wr_prph(struct il_priv *il, u32 addr, u32 val) 141 { 142 unsigned long reg_flags; 143 144 spin_lock_irqsave(&il->reg_lock, reg_flags); 145 if (likely(_il_grab_nic_access(il))) { 146 _il_wr_prph(il, addr, val); 147 _il_release_nic_access(il); 148 } 149 spin_unlock_irqrestore(&il->reg_lock, reg_flags); 150 } 151 EXPORT_SYMBOL(il_wr_prph); 152 153 u32 154 il_read_targ_mem(struct il_priv *il, u32 addr) 155 { 156 unsigned long reg_flags; 157 u32 value; 158 159 spin_lock_irqsave(&il->reg_lock, reg_flags); 160 _il_grab_nic_access(il); 161 162 _il_wr(il, HBUS_TARG_MEM_RADDR, addr); 163 value = _il_rd(il, HBUS_TARG_MEM_RDAT); 164 165 _il_release_nic_access(il); 166 spin_unlock_irqrestore(&il->reg_lock, reg_flags); 167 return value; 168 } 169 EXPORT_SYMBOL(il_read_targ_mem); 170 171 void 172 il_write_targ_mem(struct il_priv *il, u32 addr, u32 val) 173 { 174 unsigned long reg_flags; 175 176 spin_lock_irqsave(&il->reg_lock, reg_flags); 177 if (likely(_il_grab_nic_access(il))) { 178 _il_wr(il, HBUS_TARG_MEM_WADDR, addr); 179 _il_wr(il, HBUS_TARG_MEM_WDAT, val); 180 _il_release_nic_access(il); 181 } 182 spin_unlock_irqrestore(&il->reg_lock, reg_flags); 183 } 184 EXPORT_SYMBOL(il_write_targ_mem); 185 186 const char * 187 il_get_cmd_string(u8 cmd) 188 { 189 switch (cmd) { 190 IL_CMD(N_ALIVE); 191 IL_CMD(N_ERROR); 192 IL_CMD(C_RXON); 193 IL_CMD(C_RXON_ASSOC); 194 IL_CMD(C_QOS_PARAM); 195 IL_CMD(C_RXON_TIMING); 196 IL_CMD(C_ADD_STA); 197 IL_CMD(C_REM_STA); 198 IL_CMD(C_WEPKEY); 199 IL_CMD(N_3945_RX); 200 IL_CMD(C_TX); 201 IL_CMD(C_RATE_SCALE); 202 IL_CMD(C_LEDS); 203 IL_CMD(C_TX_LINK_QUALITY_CMD); 204 IL_CMD(C_CHANNEL_SWITCH); 205 IL_CMD(N_CHANNEL_SWITCH); 206 IL_CMD(C_SPECTRUM_MEASUREMENT); 207 IL_CMD(N_SPECTRUM_MEASUREMENT); 208 IL_CMD(C_POWER_TBL); 209 IL_CMD(N_PM_SLEEP); 210 IL_CMD(N_PM_DEBUG_STATS); 211 IL_CMD(C_SCAN); 212 IL_CMD(C_SCAN_ABORT); 213 IL_CMD(N_SCAN_START); 214 IL_CMD(N_SCAN_RESULTS); 215 IL_CMD(N_SCAN_COMPLETE); 216 IL_CMD(N_BEACON); 217 IL_CMD(C_TX_BEACON); 218 IL_CMD(C_TX_PWR_TBL); 219 IL_CMD(C_BT_CONFIG); 220 IL_CMD(C_STATS); 221 IL_CMD(N_STATS); 222 IL_CMD(N_CARD_STATE); 223 IL_CMD(N_MISSED_BEACONS); 224 IL_CMD(C_CT_KILL_CONFIG); 225 IL_CMD(C_SENSITIVITY); 226 IL_CMD(C_PHY_CALIBRATION); 227 IL_CMD(N_RX_PHY); 228 IL_CMD(N_RX_MPDU); 229 IL_CMD(N_RX); 230 IL_CMD(N_COMPRESSED_BA); 231 default: 232 return "UNKNOWN"; 233 234 } 235 } 236 EXPORT_SYMBOL(il_get_cmd_string); 237 238 #define HOST_COMPLETE_TIMEOUT (HZ / 2) 239 240 static void 241 il_generic_cmd_callback(struct il_priv *il, struct il_device_cmd *cmd, 242 struct il_rx_pkt *pkt) 243 { 244 if (pkt->hdr.flags & IL_CMD_FAILED_MSK) { 245 IL_ERR("Bad return from %s (0x%08X)\n", 246 il_get_cmd_string(cmd->hdr.cmd), pkt->hdr.flags); 247 return; 248 } 249 #ifdef CONFIG_IWLEGACY_DEBUG 250 switch (cmd->hdr.cmd) { 251 case C_TX_LINK_QUALITY_CMD: 252 case C_SENSITIVITY: 253 D_HC_DUMP("back from %s (0x%08X)\n", 254 il_get_cmd_string(cmd->hdr.cmd), pkt->hdr.flags); 255 break; 256 default: 257 D_HC("back from %s (0x%08X)\n", il_get_cmd_string(cmd->hdr.cmd), 258 pkt->hdr.flags); 259 } 260 #endif 261 } 262 263 static int 264 il_send_cmd_async(struct il_priv *il, struct il_host_cmd *cmd) 265 { 266 int ret; 267 268 BUG_ON(!(cmd->flags & CMD_ASYNC)); 269 270 /* An asynchronous command can not expect an SKB to be set. */ 271 BUG_ON(cmd->flags & CMD_WANT_SKB); 272 273 /* Assign a generic callback if one is not provided */ 274 if (!cmd->callback) 275 cmd->callback = il_generic_cmd_callback; 276 277 if (test_bit(S_EXIT_PENDING, &il->status)) 278 return -EBUSY; 279 280 ret = il_enqueue_hcmd(il, cmd); 281 if (ret < 0) { 282 IL_ERR("Error sending %s: enqueue_hcmd failed: %d\n", 283 il_get_cmd_string(cmd->id), ret); 284 return ret; 285 } 286 return 0; 287 } 288 289 int 290 il_send_cmd_sync(struct il_priv *il, struct il_host_cmd *cmd) 291 { 292 int cmd_idx; 293 int ret; 294 295 lockdep_assert_held(&il->mutex); 296 297 BUG_ON(cmd->flags & CMD_ASYNC); 298 299 /* A synchronous command can not have a callback set. */ 300 BUG_ON(cmd->callback); 301 302 D_INFO("Attempting to send sync command %s\n", 303 il_get_cmd_string(cmd->id)); 304 305 set_bit(S_HCMD_ACTIVE, &il->status); 306 D_INFO("Setting HCMD_ACTIVE for command %s\n", 307 il_get_cmd_string(cmd->id)); 308 309 cmd_idx = il_enqueue_hcmd(il, cmd); 310 if (cmd_idx < 0) { 311 ret = cmd_idx; 312 IL_ERR("Error sending %s: enqueue_hcmd failed: %d\n", 313 il_get_cmd_string(cmd->id), ret); 314 goto out; 315 } 316 317 ret = wait_event_timeout(il->wait_command_queue, 318 !test_bit(S_HCMD_ACTIVE, &il->status), 319 HOST_COMPLETE_TIMEOUT); 320 if (!ret) { 321 if (test_bit(S_HCMD_ACTIVE, &il->status)) { 322 IL_ERR("Error sending %s: time out after %dms.\n", 323 il_get_cmd_string(cmd->id), 324 jiffies_to_msecs(HOST_COMPLETE_TIMEOUT)); 325 326 clear_bit(S_HCMD_ACTIVE, &il->status); 327 D_INFO("Clearing HCMD_ACTIVE for command %s\n", 328 il_get_cmd_string(cmd->id)); 329 ret = -ETIMEDOUT; 330 goto cancel; 331 } 332 } 333 334 if (test_bit(S_RFKILL, &il->status)) { 335 IL_ERR("Command %s aborted: RF KILL Switch\n", 336 il_get_cmd_string(cmd->id)); 337 ret = -ECANCELED; 338 goto fail; 339 } 340 if (test_bit(S_FW_ERROR, &il->status)) { 341 IL_ERR("Command %s failed: FW Error\n", 342 il_get_cmd_string(cmd->id)); 343 ret = -EIO; 344 goto fail; 345 } 346 if ((cmd->flags & CMD_WANT_SKB) && !cmd->reply_page) { 347 IL_ERR("Error: Response NULL in '%s'\n", 348 il_get_cmd_string(cmd->id)); 349 ret = -EIO; 350 goto cancel; 351 } 352 353 ret = 0; 354 goto out; 355 356 cancel: 357 if (cmd->flags & CMD_WANT_SKB) { 358 /* 359 * Cancel the CMD_WANT_SKB flag for the cmd in the 360 * TX cmd queue. Otherwise in case the cmd comes 361 * in later, it will possibly set an invalid 362 * address (cmd->meta.source). 363 */ 364 il->txq[il->cmd_queue].meta[cmd_idx].flags &= ~CMD_WANT_SKB; 365 } 366 fail: 367 if (cmd->reply_page) { 368 il_free_pages(il, cmd->reply_page); 369 cmd->reply_page = 0; 370 } 371 out: 372 return ret; 373 } 374 EXPORT_SYMBOL(il_send_cmd_sync); 375 376 int 377 il_send_cmd(struct il_priv *il, struct il_host_cmd *cmd) 378 { 379 if (cmd->flags & CMD_ASYNC) 380 return il_send_cmd_async(il, cmd); 381 382 return il_send_cmd_sync(il, cmd); 383 } 384 EXPORT_SYMBOL(il_send_cmd); 385 386 int 387 il_send_cmd_pdu(struct il_priv *il, u8 id, u16 len, const void *data) 388 { 389 struct il_host_cmd cmd = { 390 .id = id, 391 .len = len, 392 .data = data, 393 }; 394 395 return il_send_cmd_sync(il, &cmd); 396 } 397 EXPORT_SYMBOL(il_send_cmd_pdu); 398 399 int 400 il_send_cmd_pdu_async(struct il_priv *il, u8 id, u16 len, const void *data, 401 void (*callback) (struct il_priv *il, 402 struct il_device_cmd *cmd, 403 struct il_rx_pkt *pkt)) 404 { 405 struct il_host_cmd cmd = { 406 .id = id, 407 .len = len, 408 .data = data, 409 }; 410 411 cmd.flags |= CMD_ASYNC; 412 cmd.callback = callback; 413 414 return il_send_cmd_async(il, &cmd); 415 } 416 EXPORT_SYMBOL(il_send_cmd_pdu_async); 417 418 /* default: IL_LED_BLINK(0) using blinking idx table */ 419 static int led_mode; 420 module_param(led_mode, int, 0444); 421 MODULE_PARM_DESC(led_mode, 422 "0=system default, " "1=On(RF On)/Off(RF Off), 2=blinking"); 423 424 /* Throughput OFF time(ms) ON time (ms) 425 * >300 25 25 426 * >200 to 300 40 40 427 * >100 to 200 55 55 428 * >70 to 100 65 65 429 * >50 to 70 75 75 430 * >20 to 50 85 85 431 * >10 to 20 95 95 432 * >5 to 10 110 110 433 * >1 to 5 130 130 434 * >0 to 1 167 167 435 * <=0 SOLID ON 436 */ 437 static const struct ieee80211_tpt_blink il_blink[] = { 438 {.throughput = 0, .blink_time = 334}, 439 {.throughput = 1 * 1024 - 1, .blink_time = 260}, 440 {.throughput = 5 * 1024 - 1, .blink_time = 220}, 441 {.throughput = 10 * 1024 - 1, .blink_time = 190}, 442 {.throughput = 20 * 1024 - 1, .blink_time = 170}, 443 {.throughput = 50 * 1024 - 1, .blink_time = 150}, 444 {.throughput = 70 * 1024 - 1, .blink_time = 130}, 445 {.throughput = 100 * 1024 - 1, .blink_time = 110}, 446 {.throughput = 200 * 1024 - 1, .blink_time = 80}, 447 {.throughput = 300 * 1024 - 1, .blink_time = 50}, 448 }; 449 450 /* 451 * Adjust led blink rate to compensate on a MAC Clock difference on every HW 452 * Led blink rate analysis showed an average deviation of 0% on 3945, 453 * 5% on 4965 HW. 454 * Need to compensate on the led on/off time per HW according to the deviation 455 * to achieve the desired led frequency 456 * The calculation is: (100-averageDeviation)/100 * blinkTime 457 * For code efficiency the calculation will be: 458 * compensation = (100 - averageDeviation) * 64 / 100 459 * NewBlinkTime = (compensation * BlinkTime) / 64 460 */ 461 static inline u8 462 il_blink_compensation(struct il_priv *il, u8 time, u16 compensation) 463 { 464 if (!compensation) { 465 IL_ERR("undefined blink compensation: " 466 "use pre-defined blinking time\n"); 467 return time; 468 } 469 470 return (u8) ((time * compensation) >> 6); 471 } 472 473 /* Set led pattern command */ 474 static int 475 il_led_cmd(struct il_priv *il, unsigned long on, unsigned long off) 476 { 477 struct il_led_cmd led_cmd = { 478 .id = IL_LED_LINK, 479 .interval = IL_DEF_LED_INTRVL 480 }; 481 int ret; 482 483 if (!test_bit(S_READY, &il->status)) 484 return -EBUSY; 485 486 if (il->blink_on == on && il->blink_off == off) 487 return 0; 488 489 if (off == 0) { 490 /* led is SOLID_ON */ 491 on = IL_LED_SOLID; 492 } 493 494 D_LED("Led blink time compensation=%u\n", 495 il->cfg->led_compensation); 496 led_cmd.on = 497 il_blink_compensation(il, on, 498 il->cfg->led_compensation); 499 led_cmd.off = 500 il_blink_compensation(il, off, 501 il->cfg->led_compensation); 502 503 ret = il->ops->send_led_cmd(il, &led_cmd); 504 if (!ret) { 505 il->blink_on = on; 506 il->blink_off = off; 507 } 508 return ret; 509 } 510 511 static void 512 il_led_brightness_set(struct led_classdev *led_cdev, 513 enum led_brightness brightness) 514 { 515 struct il_priv *il = container_of(led_cdev, struct il_priv, led); 516 unsigned long on = 0; 517 518 if (brightness > 0) 519 on = IL_LED_SOLID; 520 521 il_led_cmd(il, on, 0); 522 } 523 524 static int 525 il_led_blink_set(struct led_classdev *led_cdev, unsigned long *delay_on, 526 unsigned long *delay_off) 527 { 528 struct il_priv *il = container_of(led_cdev, struct il_priv, led); 529 530 return il_led_cmd(il, *delay_on, *delay_off); 531 } 532 533 void 534 il_leds_init(struct il_priv *il) 535 { 536 int mode = led_mode; 537 int ret; 538 539 if (mode == IL_LED_DEFAULT) 540 mode = il->cfg->led_mode; 541 542 il->led.name = 543 kasprintf(GFP_KERNEL, "%s-led", wiphy_name(il->hw->wiphy)); 544 il->led.brightness_set = il_led_brightness_set; 545 il->led.blink_set = il_led_blink_set; 546 il->led.max_brightness = 1; 547 548 switch (mode) { 549 case IL_LED_DEFAULT: 550 WARN_ON(1); 551 break; 552 case IL_LED_BLINK: 553 il->led.default_trigger = 554 ieee80211_create_tpt_led_trigger(il->hw, 555 IEEE80211_TPT_LEDTRIG_FL_CONNECTED, 556 il_blink, 557 ARRAY_SIZE(il_blink)); 558 break; 559 case IL_LED_RF_STATE: 560 il->led.default_trigger = ieee80211_get_radio_led_name(il->hw); 561 break; 562 } 563 564 ret = led_classdev_register(&il->pci_dev->dev, &il->led); 565 if (ret) { 566 kfree(il->led.name); 567 return; 568 } 569 570 il->led_registered = true; 571 } 572 EXPORT_SYMBOL(il_leds_init); 573 574 void 575 il_leds_exit(struct il_priv *il) 576 { 577 if (!il->led_registered) 578 return; 579 580 led_classdev_unregister(&il->led); 581 kfree(il->led.name); 582 } 583 EXPORT_SYMBOL(il_leds_exit); 584 585 /************************** EEPROM BANDS **************************** 586 * 587 * The il_eeprom_band definitions below provide the mapping from the 588 * EEPROM contents to the specific channel number supported for each 589 * band. 590 * 591 * For example, il_priv->eeprom.band_3_channels[4] from the band_3 592 * definition below maps to physical channel 42 in the 5.2GHz spectrum. 593 * The specific geography and calibration information for that channel 594 * is contained in the eeprom map itself. 595 * 596 * During init, we copy the eeprom information and channel map 597 * information into il->channel_info_24/52 and il->channel_map_24/52 598 * 599 * channel_map_24/52 provides the idx in the channel_info array for a 600 * given channel. We have to have two separate maps as there is channel 601 * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and 602 * band_2 603 * 604 * A value of 0xff stored in the channel_map indicates that the channel 605 * is not supported by the hardware at all. 606 * 607 * A value of 0xfe in the channel_map indicates that the channel is not 608 * valid for Tx with the current hardware. This means that 609 * while the system can tune and receive on a given channel, it may not 610 * be able to associate or transmit any frames on that 611 * channel. There is no corresponding channel information for that 612 * entry. 613 * 614 *********************************************************************/ 615 616 /* 2.4 GHz */ 617 const u8 il_eeprom_band_1[14] = { 618 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14 619 }; 620 621 /* 5.2 GHz bands */ 622 static const u8 il_eeprom_band_2[] = { /* 4915-5080MHz */ 623 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16 624 }; 625 626 static const u8 il_eeprom_band_3[] = { /* 5170-5320MHz */ 627 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64 628 }; 629 630 static const u8 il_eeprom_band_4[] = { /* 5500-5700MHz */ 631 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140 632 }; 633 634 static const u8 il_eeprom_band_5[] = { /* 5725-5825MHz */ 635 145, 149, 153, 157, 161, 165 636 }; 637 638 static const u8 il_eeprom_band_6[] = { /* 2.4 ht40 channel */ 639 1, 2, 3, 4, 5, 6, 7 640 }; 641 642 static const u8 il_eeprom_band_7[] = { /* 5.2 ht40 channel */ 643 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157 644 }; 645 646 /****************************************************************************** 647 * 648 * EEPROM related functions 649 * 650 ******************************************************************************/ 651 652 static int 653 il_eeprom_verify_signature(struct il_priv *il) 654 { 655 u32 gp = _il_rd(il, CSR_EEPROM_GP) & CSR_EEPROM_GP_VALID_MSK; 656 int ret = 0; 657 658 D_EEPROM("EEPROM signature=0x%08x\n", gp); 659 switch (gp) { 660 case CSR_EEPROM_GP_GOOD_SIG_EEP_LESS_THAN_4K: 661 case CSR_EEPROM_GP_GOOD_SIG_EEP_MORE_THAN_4K: 662 break; 663 default: 664 IL_ERR("bad EEPROM signature," "EEPROM_GP=0x%08x\n", gp); 665 ret = -ENOENT; 666 break; 667 } 668 return ret; 669 } 670 671 const u8 * 672 il_eeprom_query_addr(const struct il_priv *il, size_t offset) 673 { 674 BUG_ON(offset >= il->cfg->eeprom_size); 675 return &il->eeprom[offset]; 676 } 677 EXPORT_SYMBOL(il_eeprom_query_addr); 678 679 u16 680 il_eeprom_query16(const struct il_priv *il, size_t offset) 681 { 682 if (!il->eeprom) 683 return 0; 684 return (u16) il->eeprom[offset] | ((u16) il->eeprom[offset + 1] << 8); 685 } 686 EXPORT_SYMBOL(il_eeprom_query16); 687 688 /* 689 * il_eeprom_init - read EEPROM contents 690 * 691 * Load the EEPROM contents from adapter into il->eeprom 692 * 693 * NOTE: This routine uses the non-debug IO access functions. 694 */ 695 int 696 il_eeprom_init(struct il_priv *il) 697 { 698 __le16 *e; 699 u32 gp = _il_rd(il, CSR_EEPROM_GP); 700 int sz; 701 int ret; 702 int addr; 703 704 /* allocate eeprom */ 705 sz = il->cfg->eeprom_size; 706 D_EEPROM("NVM size = %d\n", sz); 707 il->eeprom = kzalloc(sz, GFP_KERNEL); 708 if (!il->eeprom) 709 return -ENOMEM; 710 711 e = (__le16 *) il->eeprom; 712 713 il->ops->apm_init(il); 714 715 ret = il_eeprom_verify_signature(il); 716 if (ret < 0) { 717 IL_ERR("EEPROM not found, EEPROM_GP=0x%08x\n", gp); 718 ret = -ENOENT; 719 goto err; 720 } 721 722 /* Make sure driver (instead of uCode) is allowed to read EEPROM */ 723 ret = il->ops->eeprom_acquire_semaphore(il); 724 if (ret < 0) { 725 IL_ERR("Failed to acquire EEPROM semaphore.\n"); 726 ret = -ENOENT; 727 goto err; 728 } 729 730 /* eeprom is an array of 16bit values */ 731 for (addr = 0; addr < sz; addr += sizeof(u16)) { 732 u32 r; 733 734 _il_wr(il, CSR_EEPROM_REG, 735 CSR_EEPROM_REG_MSK_ADDR & (addr << 1)); 736 737 ret = 738 _il_poll_bit(il, CSR_EEPROM_REG, 739 CSR_EEPROM_REG_READ_VALID_MSK, 740 CSR_EEPROM_REG_READ_VALID_MSK, 741 IL_EEPROM_ACCESS_TIMEOUT); 742 if (ret < 0) { 743 IL_ERR("Time out reading EEPROM[%d]\n", addr); 744 goto done; 745 } 746 r = _il_rd(il, CSR_EEPROM_REG); 747 e[addr / 2] = cpu_to_le16(r >> 16); 748 } 749 750 D_EEPROM("NVM Type: %s, version: 0x%x\n", "EEPROM", 751 il_eeprom_query16(il, EEPROM_VERSION)); 752 753 ret = 0; 754 done: 755 il->ops->eeprom_release_semaphore(il); 756 757 err: 758 if (ret) 759 il_eeprom_free(il); 760 /* Reset chip to save power until we load uCode during "up". */ 761 il_apm_stop(il); 762 return ret; 763 } 764 EXPORT_SYMBOL(il_eeprom_init); 765 766 void 767 il_eeprom_free(struct il_priv *il) 768 { 769 kfree(il->eeprom); 770 il->eeprom = NULL; 771 } 772 EXPORT_SYMBOL(il_eeprom_free); 773 774 static void 775 il_init_band_reference(const struct il_priv *il, int eep_band, 776 int *eeprom_ch_count, 777 const struct il_eeprom_channel **eeprom_ch_info, 778 const u8 **eeprom_ch_idx) 779 { 780 u32 offset = il->cfg->regulatory_bands[eep_band - 1]; 781 782 switch (eep_band) { 783 case 1: /* 2.4GHz band */ 784 *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_1); 785 *eeprom_ch_info = 786 (struct il_eeprom_channel *)il_eeprom_query_addr(il, 787 offset); 788 *eeprom_ch_idx = il_eeprom_band_1; 789 break; 790 case 2: /* 4.9GHz band */ 791 *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_2); 792 *eeprom_ch_info = 793 (struct il_eeprom_channel *)il_eeprom_query_addr(il, 794 offset); 795 *eeprom_ch_idx = il_eeprom_band_2; 796 break; 797 case 3: /* 5.2GHz band */ 798 *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_3); 799 *eeprom_ch_info = 800 (struct il_eeprom_channel *)il_eeprom_query_addr(il, 801 offset); 802 *eeprom_ch_idx = il_eeprom_band_3; 803 break; 804 case 4: /* 5.5GHz band */ 805 *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_4); 806 *eeprom_ch_info = 807 (struct il_eeprom_channel *)il_eeprom_query_addr(il, 808 offset); 809 *eeprom_ch_idx = il_eeprom_band_4; 810 break; 811 case 5: /* 5.7GHz band */ 812 *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_5); 813 *eeprom_ch_info = 814 (struct il_eeprom_channel *)il_eeprom_query_addr(il, 815 offset); 816 *eeprom_ch_idx = il_eeprom_band_5; 817 break; 818 case 6: /* 2.4GHz ht40 channels */ 819 *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_6); 820 *eeprom_ch_info = 821 (struct il_eeprom_channel *)il_eeprom_query_addr(il, 822 offset); 823 *eeprom_ch_idx = il_eeprom_band_6; 824 break; 825 case 7: /* 5 GHz ht40 channels */ 826 *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_7); 827 *eeprom_ch_info = 828 (struct il_eeprom_channel *)il_eeprom_query_addr(il, 829 offset); 830 *eeprom_ch_idx = il_eeprom_band_7; 831 break; 832 default: 833 BUG(); 834 } 835 } 836 837 #define CHECK_AND_PRINT(x) ((eeprom_ch->flags & EEPROM_CHANNEL_##x) \ 838 ? # x " " : "") 839 /* 840 * il_mod_ht40_chan_info - Copy ht40 channel info into driver's il. 841 * 842 * Does not set up a command, or touch hardware. 843 */ 844 static int 845 il_mod_ht40_chan_info(struct il_priv *il, enum nl80211_band band, u16 channel, 846 const struct il_eeprom_channel *eeprom_ch, 847 u8 clear_ht40_extension_channel) 848 { 849 struct il_channel_info *ch_info; 850 851 ch_info = 852 (struct il_channel_info *)il_get_channel_info(il, band, channel); 853 854 if (!il_is_channel_valid(ch_info)) 855 return -1; 856 857 D_EEPROM("HT40 Ch. %d [%sGHz] %s%s%s%s%s(0x%02x %ddBm):" 858 " Ad-Hoc %ssupported\n", ch_info->channel, 859 il_is_channel_a_band(ch_info) ? "5.2" : "2.4", 860 CHECK_AND_PRINT(IBSS), CHECK_AND_PRINT(ACTIVE), 861 CHECK_AND_PRINT(RADAR), CHECK_AND_PRINT(WIDE), 862 CHECK_AND_PRINT(DFS), eeprom_ch->flags, 863 eeprom_ch->max_power_avg, 864 ((eeprom_ch->flags & EEPROM_CHANNEL_IBSS) && 865 !(eeprom_ch->flags & EEPROM_CHANNEL_RADAR)) ? "" : "not "); 866 867 ch_info->ht40_eeprom = *eeprom_ch; 868 ch_info->ht40_max_power_avg = eeprom_ch->max_power_avg; 869 ch_info->ht40_flags = eeprom_ch->flags; 870 if (eeprom_ch->flags & EEPROM_CHANNEL_VALID) 871 ch_info->ht40_extension_channel &= 872 ~clear_ht40_extension_channel; 873 874 return 0; 875 } 876 877 #define CHECK_AND_PRINT_I(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \ 878 ? # x " " : "") 879 880 /* 881 * il_init_channel_map - Set up driver's info for all possible channels 882 */ 883 int 884 il_init_channel_map(struct il_priv *il) 885 { 886 int eeprom_ch_count = 0; 887 const u8 *eeprom_ch_idx = NULL; 888 const struct il_eeprom_channel *eeprom_ch_info = NULL; 889 int band, ch; 890 struct il_channel_info *ch_info; 891 892 if (il->channel_count) { 893 D_EEPROM("Channel map already initialized.\n"); 894 return 0; 895 } 896 897 D_EEPROM("Initializing regulatory info from EEPROM\n"); 898 899 il->channel_count = 900 ARRAY_SIZE(il_eeprom_band_1) + ARRAY_SIZE(il_eeprom_band_2) + 901 ARRAY_SIZE(il_eeprom_band_3) + ARRAY_SIZE(il_eeprom_band_4) + 902 ARRAY_SIZE(il_eeprom_band_5); 903 904 D_EEPROM("Parsing data for %d channels.\n", il->channel_count); 905 906 il->channel_info = 907 kcalloc(il->channel_count, sizeof(struct il_channel_info), 908 GFP_KERNEL); 909 if (!il->channel_info) { 910 IL_ERR("Could not allocate channel_info\n"); 911 il->channel_count = 0; 912 return -ENOMEM; 913 } 914 915 ch_info = il->channel_info; 916 917 /* Loop through the 5 EEPROM bands adding them in order to the 918 * channel map we maintain (that contains additional information than 919 * what just in the EEPROM) */ 920 for (band = 1; band <= 5; band++) { 921 922 il_init_band_reference(il, band, &eeprom_ch_count, 923 &eeprom_ch_info, &eeprom_ch_idx); 924 925 /* Loop through each band adding each of the channels */ 926 for (ch = 0; ch < eeprom_ch_count; ch++) { 927 ch_info->channel = eeprom_ch_idx[ch]; 928 ch_info->band = 929 (band == 930 1) ? NL80211_BAND_2GHZ : NL80211_BAND_5GHZ; 931 932 /* permanently store EEPROM's channel regulatory flags 933 * and max power in channel info database. */ 934 ch_info->eeprom = eeprom_ch_info[ch]; 935 936 /* Copy the run-time flags so they are there even on 937 * invalid channels */ 938 ch_info->flags = eeprom_ch_info[ch].flags; 939 /* First write that ht40 is not enabled, and then enable 940 * one by one */ 941 ch_info->ht40_extension_channel = 942 IEEE80211_CHAN_NO_HT40; 943 944 if (!(il_is_channel_valid(ch_info))) { 945 D_EEPROM("Ch. %d Flags %x [%sGHz] - " 946 "No traffic\n", ch_info->channel, 947 ch_info->flags, 948 il_is_channel_a_band(ch_info) ? "5.2" : 949 "2.4"); 950 ch_info++; 951 continue; 952 } 953 954 /* Initialize regulatory-based run-time data */ 955 ch_info->max_power_avg = ch_info->curr_txpow = 956 eeprom_ch_info[ch].max_power_avg; 957 ch_info->scan_power = eeprom_ch_info[ch].max_power_avg; 958 ch_info->min_power = 0; 959 960 D_EEPROM("Ch. %d [%sGHz] " "%s%s%s%s%s%s(0x%02x %ddBm):" 961 " Ad-Hoc %ssupported\n", ch_info->channel, 962 il_is_channel_a_band(ch_info) ? "5.2" : "2.4", 963 CHECK_AND_PRINT_I(VALID), 964 CHECK_AND_PRINT_I(IBSS), 965 CHECK_AND_PRINT_I(ACTIVE), 966 CHECK_AND_PRINT_I(RADAR), 967 CHECK_AND_PRINT_I(WIDE), 968 CHECK_AND_PRINT_I(DFS), 969 eeprom_ch_info[ch].flags, 970 eeprom_ch_info[ch].max_power_avg, 971 ((eeprom_ch_info[ch]. 972 flags & EEPROM_CHANNEL_IBSS) && 973 !(eeprom_ch_info[ch]. 974 flags & EEPROM_CHANNEL_RADAR)) ? "" : 975 "not "); 976 977 ch_info++; 978 } 979 } 980 981 /* Check if we do have HT40 channels */ 982 if (il->cfg->regulatory_bands[5] == EEPROM_REGULATORY_BAND_NO_HT40 && 983 il->cfg->regulatory_bands[6] == EEPROM_REGULATORY_BAND_NO_HT40) 984 return 0; 985 986 /* Two additional EEPROM bands for 2.4 and 5 GHz HT40 channels */ 987 for (band = 6; band <= 7; band++) { 988 enum nl80211_band ieeeband; 989 990 il_init_band_reference(il, band, &eeprom_ch_count, 991 &eeprom_ch_info, &eeprom_ch_idx); 992 993 /* EEPROM band 6 is 2.4, band 7 is 5 GHz */ 994 ieeeband = 995 (band == 6) ? NL80211_BAND_2GHZ : NL80211_BAND_5GHZ; 996 997 /* Loop through each band adding each of the channels */ 998 for (ch = 0; ch < eeprom_ch_count; ch++) { 999 /* Set up driver's info for lower half */ 1000 il_mod_ht40_chan_info(il, ieeeband, eeprom_ch_idx[ch], 1001 &eeprom_ch_info[ch], 1002 IEEE80211_CHAN_NO_HT40PLUS); 1003 1004 /* Set up driver's info for upper half */ 1005 il_mod_ht40_chan_info(il, ieeeband, 1006 eeprom_ch_idx[ch] + 4, 1007 &eeprom_ch_info[ch], 1008 IEEE80211_CHAN_NO_HT40MINUS); 1009 } 1010 } 1011 1012 return 0; 1013 } 1014 EXPORT_SYMBOL(il_init_channel_map); 1015 1016 /* 1017 * il_free_channel_map - undo allocations in il_init_channel_map 1018 */ 1019 void 1020 il_free_channel_map(struct il_priv *il) 1021 { 1022 kfree(il->channel_info); 1023 il->channel_count = 0; 1024 } 1025 EXPORT_SYMBOL(il_free_channel_map); 1026 1027 /* 1028 * il_get_channel_info - Find driver's ilate channel info 1029 * 1030 * Based on band and channel number. 1031 */ 1032 const struct il_channel_info * 1033 il_get_channel_info(const struct il_priv *il, enum nl80211_band band, 1034 u16 channel) 1035 { 1036 int i; 1037 1038 switch (band) { 1039 case NL80211_BAND_5GHZ: 1040 for (i = 14; i < il->channel_count; i++) { 1041 if (il->channel_info[i].channel == channel) 1042 return &il->channel_info[i]; 1043 } 1044 break; 1045 case NL80211_BAND_2GHZ: 1046 if (channel >= 1 && channel <= 14) 1047 return &il->channel_info[channel - 1]; 1048 break; 1049 default: 1050 BUG(); 1051 } 1052 1053 return NULL; 1054 } 1055 EXPORT_SYMBOL(il_get_channel_info); 1056 1057 /* 1058 * Setting power level allows the card to go to sleep when not busy. 1059 * 1060 * We calculate a sleep command based on the required latency, which 1061 * we get from mac80211. 1062 */ 1063 1064 #define SLP_VEC(X0, X1, X2, X3, X4) { \ 1065 cpu_to_le32(X0), \ 1066 cpu_to_le32(X1), \ 1067 cpu_to_le32(X2), \ 1068 cpu_to_le32(X3), \ 1069 cpu_to_le32(X4) \ 1070 } 1071 1072 static void 1073 il_build_powertable_cmd(struct il_priv *il, struct il_powertable_cmd *cmd) 1074 { 1075 static const __le32 interval[3][IL_POWER_VEC_SIZE] = { 1076 SLP_VEC(2, 2, 4, 6, 0xFF), 1077 SLP_VEC(2, 4, 7, 10, 10), 1078 SLP_VEC(4, 7, 10, 10, 0xFF) 1079 }; 1080 int i, dtim_period, no_dtim; 1081 u32 max_sleep; 1082 bool skip; 1083 1084 memset(cmd, 0, sizeof(*cmd)); 1085 1086 if (il->power_data.pci_pm) 1087 cmd->flags |= IL_POWER_PCI_PM_MSK; 1088 1089 /* if no Power Save, we are done */ 1090 if (il->power_data.ps_disabled) 1091 return; 1092 1093 cmd->flags = IL_POWER_DRIVER_ALLOW_SLEEP_MSK; 1094 cmd->keep_alive_seconds = 0; 1095 cmd->debug_flags = 0; 1096 cmd->rx_data_timeout = cpu_to_le32(25 * 1024); 1097 cmd->tx_data_timeout = cpu_to_le32(25 * 1024); 1098 cmd->keep_alive_beacons = 0; 1099 1100 dtim_period = il->vif ? il->vif->bss_conf.dtim_period : 0; 1101 1102 if (dtim_period <= 2) { 1103 memcpy(cmd->sleep_interval, interval[0], sizeof(interval[0])); 1104 no_dtim = 2; 1105 } else if (dtim_period <= 10) { 1106 memcpy(cmd->sleep_interval, interval[1], sizeof(interval[1])); 1107 no_dtim = 2; 1108 } else { 1109 memcpy(cmd->sleep_interval, interval[2], sizeof(interval[2])); 1110 no_dtim = 0; 1111 } 1112 1113 if (dtim_period == 0) { 1114 dtim_period = 1; 1115 skip = false; 1116 } else { 1117 skip = !!no_dtim; 1118 } 1119 1120 if (skip) { 1121 __le32 tmp = cmd->sleep_interval[IL_POWER_VEC_SIZE - 1]; 1122 1123 max_sleep = le32_to_cpu(tmp); 1124 if (max_sleep == 0xFF) 1125 max_sleep = dtim_period * (skip + 1); 1126 else if (max_sleep > dtim_period) 1127 max_sleep = (max_sleep / dtim_period) * dtim_period; 1128 cmd->flags |= IL_POWER_SLEEP_OVER_DTIM_MSK; 1129 } else { 1130 max_sleep = dtim_period; 1131 cmd->flags &= ~IL_POWER_SLEEP_OVER_DTIM_MSK; 1132 } 1133 1134 for (i = 0; i < IL_POWER_VEC_SIZE; i++) 1135 if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep) 1136 cmd->sleep_interval[i] = cpu_to_le32(max_sleep); 1137 } 1138 1139 static int 1140 il_set_power(struct il_priv *il, struct il_powertable_cmd *cmd) 1141 { 1142 D_POWER("Sending power/sleep command\n"); 1143 D_POWER("Flags value = 0x%08X\n", cmd->flags); 1144 D_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout)); 1145 D_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout)); 1146 D_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n", 1147 le32_to_cpu(cmd->sleep_interval[0]), 1148 le32_to_cpu(cmd->sleep_interval[1]), 1149 le32_to_cpu(cmd->sleep_interval[2]), 1150 le32_to_cpu(cmd->sleep_interval[3]), 1151 le32_to_cpu(cmd->sleep_interval[4])); 1152 1153 return il_send_cmd_pdu(il, C_POWER_TBL, 1154 sizeof(struct il_powertable_cmd), cmd); 1155 } 1156 1157 static int 1158 il_power_set_mode(struct il_priv *il, struct il_powertable_cmd *cmd, bool force) 1159 { 1160 int ret; 1161 bool update_chains; 1162 1163 lockdep_assert_held(&il->mutex); 1164 1165 /* Don't update the RX chain when chain noise calibration is running */ 1166 update_chains = il->chain_noise_data.state == IL_CHAIN_NOISE_DONE || 1167 il->chain_noise_data.state == IL_CHAIN_NOISE_ALIVE; 1168 1169 if (!memcmp(&il->power_data.sleep_cmd, cmd, sizeof(*cmd)) && !force) 1170 return 0; 1171 1172 if (!il_is_ready_rf(il)) 1173 return -EIO; 1174 1175 /* scan complete use sleep_power_next, need to be updated */ 1176 memcpy(&il->power_data.sleep_cmd_next, cmd, sizeof(*cmd)); 1177 if (test_bit(S_SCANNING, &il->status) && !force) { 1178 D_INFO("Defer power set mode while scanning\n"); 1179 return 0; 1180 } 1181 1182 if (cmd->flags & IL_POWER_DRIVER_ALLOW_SLEEP_MSK) 1183 set_bit(S_POWER_PMI, &il->status); 1184 1185 ret = il_set_power(il, cmd); 1186 if (!ret) { 1187 if (!(cmd->flags & IL_POWER_DRIVER_ALLOW_SLEEP_MSK)) 1188 clear_bit(S_POWER_PMI, &il->status); 1189 1190 if (il->ops->update_chain_flags && update_chains) 1191 il->ops->update_chain_flags(il); 1192 else if (il->ops->update_chain_flags) 1193 D_POWER("Cannot update the power, chain noise " 1194 "calibration running: %d\n", 1195 il->chain_noise_data.state); 1196 1197 memcpy(&il->power_data.sleep_cmd, cmd, sizeof(*cmd)); 1198 } else 1199 IL_ERR("set power fail, ret = %d", ret); 1200 1201 return ret; 1202 } 1203 1204 int 1205 il_power_update_mode(struct il_priv *il, bool force) 1206 { 1207 struct il_powertable_cmd cmd; 1208 1209 il_build_powertable_cmd(il, &cmd); 1210 1211 return il_power_set_mode(il, &cmd, force); 1212 } 1213 EXPORT_SYMBOL(il_power_update_mode); 1214 1215 /* initialize to default */ 1216 void 1217 il_power_initialize(struct il_priv *il) 1218 { 1219 u16 lctl; 1220 1221 pcie_capability_read_word(il->pci_dev, PCI_EXP_LNKCTL, &lctl); 1222 il->power_data.pci_pm = !(lctl & PCI_EXP_LNKCTL_ASPM_L0S); 1223 1224 il->power_data.debug_sleep_level_override = -1; 1225 1226 memset(&il->power_data.sleep_cmd, 0, sizeof(il->power_data.sleep_cmd)); 1227 } 1228 EXPORT_SYMBOL(il_power_initialize); 1229 1230 /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after 1231 * sending probe req. This should be set long enough to hear probe responses 1232 * from more than one AP. */ 1233 #define IL_ACTIVE_DWELL_TIME_24 (30) /* all times in msec */ 1234 #define IL_ACTIVE_DWELL_TIME_52 (20) 1235 1236 #define IL_ACTIVE_DWELL_FACTOR_24GHZ (3) 1237 #define IL_ACTIVE_DWELL_FACTOR_52GHZ (2) 1238 1239 /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel. 1240 * Must be set longer than active dwell time. 1241 * For the most reliable scan, set > AP beacon interval (typically 100msec). */ 1242 #define IL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */ 1243 #define IL_PASSIVE_DWELL_TIME_52 (10) 1244 #define IL_PASSIVE_DWELL_BASE (100) 1245 #define IL_CHANNEL_TUNE_TIME 5 1246 1247 static int 1248 il_send_scan_abort(struct il_priv *il) 1249 { 1250 int ret; 1251 struct il_rx_pkt *pkt; 1252 struct il_host_cmd cmd = { 1253 .id = C_SCAN_ABORT, 1254 .flags = CMD_WANT_SKB, 1255 }; 1256 1257 /* Exit instantly with error when device is not ready 1258 * to receive scan abort command or it does not perform 1259 * hardware scan currently */ 1260 if (!test_bit(S_READY, &il->status) || 1261 !test_bit(S_GEO_CONFIGURED, &il->status) || 1262 !test_bit(S_SCAN_HW, &il->status) || 1263 test_bit(S_FW_ERROR, &il->status) || 1264 test_bit(S_EXIT_PENDING, &il->status)) 1265 return -EIO; 1266 1267 ret = il_send_cmd_sync(il, &cmd); 1268 if (ret) 1269 return ret; 1270 1271 pkt = (struct il_rx_pkt *)cmd.reply_page; 1272 if (pkt->u.status != CAN_ABORT_STATUS) { 1273 /* The scan abort will return 1 for success or 1274 * 2 for "failure". A failure condition can be 1275 * due to simply not being in an active scan which 1276 * can occur if we send the scan abort before we 1277 * the microcode has notified us that a scan is 1278 * completed. */ 1279 D_SCAN("SCAN_ABORT ret %d.\n", pkt->u.status); 1280 ret = -EIO; 1281 } 1282 1283 il_free_pages(il, cmd.reply_page); 1284 return ret; 1285 } 1286 1287 static void 1288 il_complete_scan(struct il_priv *il, bool aborted) 1289 { 1290 struct cfg80211_scan_info info = { 1291 .aborted = aborted, 1292 }; 1293 1294 /* check if scan was requested from mac80211 */ 1295 if (il->scan_request) { 1296 D_SCAN("Complete scan in mac80211\n"); 1297 ieee80211_scan_completed(il->hw, &info); 1298 } 1299 1300 il->scan_vif = NULL; 1301 il->scan_request = NULL; 1302 } 1303 1304 void 1305 il_force_scan_end(struct il_priv *il) 1306 { 1307 lockdep_assert_held(&il->mutex); 1308 1309 if (!test_bit(S_SCANNING, &il->status)) { 1310 D_SCAN("Forcing scan end while not scanning\n"); 1311 return; 1312 } 1313 1314 D_SCAN("Forcing scan end\n"); 1315 clear_bit(S_SCANNING, &il->status); 1316 clear_bit(S_SCAN_HW, &il->status); 1317 clear_bit(S_SCAN_ABORTING, &il->status); 1318 il_complete_scan(il, true); 1319 } 1320 1321 static void 1322 il_do_scan_abort(struct il_priv *il) 1323 { 1324 int ret; 1325 1326 lockdep_assert_held(&il->mutex); 1327 1328 if (!test_bit(S_SCANNING, &il->status)) { 1329 D_SCAN("Not performing scan to abort\n"); 1330 return; 1331 } 1332 1333 if (test_and_set_bit(S_SCAN_ABORTING, &il->status)) { 1334 D_SCAN("Scan abort in progress\n"); 1335 return; 1336 } 1337 1338 ret = il_send_scan_abort(il); 1339 if (ret) { 1340 D_SCAN("Send scan abort failed %d\n", ret); 1341 il_force_scan_end(il); 1342 } else 1343 D_SCAN("Successfully send scan abort\n"); 1344 } 1345 1346 /* 1347 * il_scan_cancel - Cancel any currently executing HW scan 1348 */ 1349 int 1350 il_scan_cancel(struct il_priv *il) 1351 { 1352 D_SCAN("Queuing abort scan\n"); 1353 queue_work(il->workqueue, &il->abort_scan); 1354 return 0; 1355 } 1356 EXPORT_SYMBOL(il_scan_cancel); 1357 1358 /* 1359 * il_scan_cancel_timeout - Cancel any currently executing HW scan 1360 * @ms: amount of time to wait (in milliseconds) for scan to abort 1361 * 1362 */ 1363 int 1364 il_scan_cancel_timeout(struct il_priv *il, unsigned long ms) 1365 { 1366 unsigned long timeout = jiffies + msecs_to_jiffies(ms); 1367 1368 lockdep_assert_held(&il->mutex); 1369 1370 D_SCAN("Scan cancel timeout\n"); 1371 1372 il_do_scan_abort(il); 1373 1374 while (time_before_eq(jiffies, timeout)) { 1375 if (!test_bit(S_SCAN_HW, &il->status)) 1376 break; 1377 msleep(20); 1378 } 1379 1380 return test_bit(S_SCAN_HW, &il->status); 1381 } 1382 EXPORT_SYMBOL(il_scan_cancel_timeout); 1383 1384 /* Service response to C_SCAN (0x80) */ 1385 static void 1386 il_hdl_scan(struct il_priv *il, struct il_rx_buf *rxb) 1387 { 1388 #ifdef CONFIG_IWLEGACY_DEBUG 1389 struct il_rx_pkt *pkt = rxb_addr(rxb); 1390 struct il_scanreq_notification *notif = 1391 (struct il_scanreq_notification *)pkt->u.raw; 1392 1393 D_SCAN("Scan request status = 0x%x\n", notif->status); 1394 #endif 1395 } 1396 1397 /* Service N_SCAN_START (0x82) */ 1398 static void 1399 il_hdl_scan_start(struct il_priv *il, struct il_rx_buf *rxb) 1400 { 1401 struct il_rx_pkt *pkt = rxb_addr(rxb); 1402 struct il_scanstart_notification *notif = 1403 (struct il_scanstart_notification *)pkt->u.raw; 1404 il->scan_start_tsf = le32_to_cpu(notif->tsf_low); 1405 D_SCAN("Scan start: " "%d [802.11%s] " 1406 "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n", notif->channel, 1407 notif->band ? "bg" : "a", le32_to_cpu(notif->tsf_high), 1408 le32_to_cpu(notif->tsf_low), notif->status, notif->beacon_timer); 1409 } 1410 1411 /* Service N_SCAN_RESULTS (0x83) */ 1412 static void 1413 il_hdl_scan_results(struct il_priv *il, struct il_rx_buf *rxb) 1414 { 1415 #ifdef CONFIG_IWLEGACY_DEBUG 1416 struct il_rx_pkt *pkt = rxb_addr(rxb); 1417 struct il_scanresults_notification *notif = 1418 (struct il_scanresults_notification *)pkt->u.raw; 1419 1420 D_SCAN("Scan ch.res: " "%d [802.11%s] " "(TSF: 0x%08X:%08X) - %d " 1421 "elapsed=%lu usec\n", notif->channel, notif->band ? "bg" : "a", 1422 le32_to_cpu(notif->tsf_high), le32_to_cpu(notif->tsf_low), 1423 le32_to_cpu(notif->stats[0]), 1424 le32_to_cpu(notif->tsf_low) - il->scan_start_tsf); 1425 #endif 1426 } 1427 1428 /* Service N_SCAN_COMPLETE (0x84) */ 1429 static void 1430 il_hdl_scan_complete(struct il_priv *il, struct il_rx_buf *rxb) 1431 { 1432 1433 #ifdef CONFIG_IWLEGACY_DEBUG 1434 struct il_rx_pkt *pkt = rxb_addr(rxb); 1435 struct il_scancomplete_notification *scan_notif = (void *)pkt->u.raw; 1436 #endif 1437 1438 D_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n", 1439 scan_notif->scanned_channels, scan_notif->tsf_low, 1440 scan_notif->tsf_high, scan_notif->status); 1441 1442 /* The HW is no longer scanning */ 1443 clear_bit(S_SCAN_HW, &il->status); 1444 1445 D_SCAN("Scan on %sGHz took %dms\n", 1446 (il->scan_band == NL80211_BAND_2GHZ) ? "2.4" : "5.2", 1447 jiffies_to_msecs(jiffies - il->scan_start)); 1448 1449 queue_work(il->workqueue, &il->scan_completed); 1450 } 1451 1452 void 1453 il_setup_rx_scan_handlers(struct il_priv *il) 1454 { 1455 /* scan handlers */ 1456 il->handlers[C_SCAN] = il_hdl_scan; 1457 il->handlers[N_SCAN_START] = il_hdl_scan_start; 1458 il->handlers[N_SCAN_RESULTS] = il_hdl_scan_results; 1459 il->handlers[N_SCAN_COMPLETE] = il_hdl_scan_complete; 1460 } 1461 EXPORT_SYMBOL(il_setup_rx_scan_handlers); 1462 1463 u16 1464 il_get_active_dwell_time(struct il_priv *il, enum nl80211_band band, 1465 u8 n_probes) 1466 { 1467 if (band == NL80211_BAND_5GHZ) 1468 return IL_ACTIVE_DWELL_TIME_52 + 1469 IL_ACTIVE_DWELL_FACTOR_52GHZ * (n_probes + 1); 1470 else 1471 return IL_ACTIVE_DWELL_TIME_24 + 1472 IL_ACTIVE_DWELL_FACTOR_24GHZ * (n_probes + 1); 1473 } 1474 EXPORT_SYMBOL(il_get_active_dwell_time); 1475 1476 u16 1477 il_get_passive_dwell_time(struct il_priv *il, enum nl80211_band band, 1478 struct ieee80211_vif *vif) 1479 { 1480 u16 value; 1481 1482 u16 passive = 1483 (band == 1484 NL80211_BAND_2GHZ) ? IL_PASSIVE_DWELL_BASE + 1485 IL_PASSIVE_DWELL_TIME_24 : IL_PASSIVE_DWELL_BASE + 1486 IL_PASSIVE_DWELL_TIME_52; 1487 1488 if (il_is_any_associated(il)) { 1489 /* 1490 * If we're associated, we clamp the maximum passive 1491 * dwell time to be 98% of the smallest beacon interval 1492 * (minus 2 * channel tune time) 1493 */ 1494 value = il->vif ? il->vif->bss_conf.beacon_int : 0; 1495 if (value > IL_PASSIVE_DWELL_BASE || !value) 1496 value = IL_PASSIVE_DWELL_BASE; 1497 value = (value * 98) / 100 - IL_CHANNEL_TUNE_TIME * 2; 1498 passive = min(value, passive); 1499 } 1500 1501 return passive; 1502 } 1503 EXPORT_SYMBOL(il_get_passive_dwell_time); 1504 1505 void 1506 il_init_scan_params(struct il_priv *il) 1507 { 1508 u8 ant_idx = fls(il->hw_params.valid_tx_ant) - 1; 1509 if (!il->scan_tx_ant[NL80211_BAND_5GHZ]) 1510 il->scan_tx_ant[NL80211_BAND_5GHZ] = ant_idx; 1511 if (!il->scan_tx_ant[NL80211_BAND_2GHZ]) 1512 il->scan_tx_ant[NL80211_BAND_2GHZ] = ant_idx; 1513 } 1514 EXPORT_SYMBOL(il_init_scan_params); 1515 1516 static int 1517 il_scan_initiate(struct il_priv *il, struct ieee80211_vif *vif) 1518 { 1519 int ret; 1520 1521 lockdep_assert_held(&il->mutex); 1522 1523 cancel_delayed_work(&il->scan_check); 1524 1525 if (!il_is_ready_rf(il)) { 1526 IL_WARN("Request scan called when driver not ready.\n"); 1527 return -EIO; 1528 } 1529 1530 if (test_bit(S_SCAN_HW, &il->status)) { 1531 D_SCAN("Multiple concurrent scan requests in parallel.\n"); 1532 return -EBUSY; 1533 } 1534 1535 if (test_bit(S_SCAN_ABORTING, &il->status)) { 1536 D_SCAN("Scan request while abort pending.\n"); 1537 return -EBUSY; 1538 } 1539 1540 D_SCAN("Starting scan...\n"); 1541 1542 set_bit(S_SCANNING, &il->status); 1543 il->scan_start = jiffies; 1544 1545 ret = il->ops->request_scan(il, vif); 1546 if (ret) { 1547 clear_bit(S_SCANNING, &il->status); 1548 return ret; 1549 } 1550 1551 queue_delayed_work(il->workqueue, &il->scan_check, 1552 IL_SCAN_CHECK_WATCHDOG); 1553 1554 return 0; 1555 } 1556 1557 int 1558 il_mac_hw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 1559 struct ieee80211_scan_request *hw_req) 1560 { 1561 struct cfg80211_scan_request *req = &hw_req->req; 1562 struct il_priv *il = hw->priv; 1563 int ret; 1564 1565 if (req->n_channels == 0) { 1566 IL_ERR("Can not scan on no channels.\n"); 1567 return -EINVAL; 1568 } 1569 1570 mutex_lock(&il->mutex); 1571 D_MAC80211("enter\n"); 1572 1573 if (test_bit(S_SCANNING, &il->status)) { 1574 D_SCAN("Scan already in progress.\n"); 1575 ret = -EAGAIN; 1576 goto out_unlock; 1577 } 1578 1579 /* mac80211 will only ask for one band at a time */ 1580 il->scan_request = req; 1581 il->scan_vif = vif; 1582 il->scan_band = req->channels[0]->band; 1583 1584 ret = il_scan_initiate(il, vif); 1585 1586 out_unlock: 1587 D_MAC80211("leave ret %d\n", ret); 1588 mutex_unlock(&il->mutex); 1589 1590 return ret; 1591 } 1592 EXPORT_SYMBOL(il_mac_hw_scan); 1593 1594 static void 1595 il_bg_scan_check(struct work_struct *data) 1596 { 1597 struct il_priv *il = 1598 container_of(data, struct il_priv, scan_check.work); 1599 1600 D_SCAN("Scan check work\n"); 1601 1602 /* Since we are here firmware does not finish scan and 1603 * most likely is in bad shape, so we don't bother to 1604 * send abort command, just force scan complete to mac80211 */ 1605 mutex_lock(&il->mutex); 1606 il_force_scan_end(il); 1607 mutex_unlock(&il->mutex); 1608 } 1609 1610 /* 1611 * il_fill_probe_req - fill in all required fields and IE for probe request 1612 */ 1613 u16 1614 il_fill_probe_req(struct il_priv *il, struct ieee80211_mgmt *frame, 1615 const u8 *ta, const u8 *ies, int ie_len, int left) 1616 { 1617 int len = 0; 1618 u8 *pos = NULL; 1619 1620 /* Make sure there is enough space for the probe request, 1621 * two mandatory IEs and the data */ 1622 left -= 24; 1623 if (left < 0) 1624 return 0; 1625 1626 frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ); 1627 eth_broadcast_addr(frame->da); 1628 memcpy(frame->sa, ta, ETH_ALEN); 1629 eth_broadcast_addr(frame->bssid); 1630 frame->seq_ctrl = 0; 1631 1632 len += 24; 1633 1634 /* ...next IE... */ 1635 pos = &frame->u.probe_req.variable[0]; 1636 1637 /* fill in our indirect SSID IE */ 1638 left -= 2; 1639 if (left < 0) 1640 return 0; 1641 *pos++ = WLAN_EID_SSID; 1642 *pos++ = 0; 1643 1644 len += 2; 1645 1646 if (WARN_ON(left < ie_len)) 1647 return len; 1648 1649 if (ies && ie_len) { 1650 memcpy(pos, ies, ie_len); 1651 len += ie_len; 1652 } 1653 1654 return (u16) len; 1655 } 1656 EXPORT_SYMBOL(il_fill_probe_req); 1657 1658 static void 1659 il_bg_abort_scan(struct work_struct *work) 1660 { 1661 struct il_priv *il = container_of(work, struct il_priv, abort_scan); 1662 1663 D_SCAN("Abort scan work\n"); 1664 1665 /* We keep scan_check work queued in case when firmware will not 1666 * report back scan completed notification */ 1667 mutex_lock(&il->mutex); 1668 il_scan_cancel_timeout(il, 200); 1669 mutex_unlock(&il->mutex); 1670 } 1671 1672 static void 1673 il_bg_scan_completed(struct work_struct *work) 1674 { 1675 struct il_priv *il = container_of(work, struct il_priv, scan_completed); 1676 bool aborted; 1677 1678 D_SCAN("Completed scan.\n"); 1679 1680 cancel_delayed_work(&il->scan_check); 1681 1682 mutex_lock(&il->mutex); 1683 1684 aborted = test_and_clear_bit(S_SCAN_ABORTING, &il->status); 1685 if (aborted) 1686 D_SCAN("Aborted scan completed.\n"); 1687 1688 if (!test_and_clear_bit(S_SCANNING, &il->status)) { 1689 D_SCAN("Scan already completed.\n"); 1690 goto out_settings; 1691 } 1692 1693 il_complete_scan(il, aborted); 1694 1695 out_settings: 1696 /* Can we still talk to firmware ? */ 1697 if (!il_is_ready_rf(il)) 1698 goto out; 1699 1700 /* 1701 * We do not commit power settings while scan is pending, 1702 * do it now if the settings changed. 1703 */ 1704 il_power_set_mode(il, &il->power_data.sleep_cmd_next, false); 1705 il_set_tx_power(il, il->tx_power_next, false); 1706 1707 il->ops->post_scan(il); 1708 1709 out: 1710 mutex_unlock(&il->mutex); 1711 } 1712 1713 void 1714 il_setup_scan_deferred_work(struct il_priv *il) 1715 { 1716 INIT_WORK(&il->scan_completed, il_bg_scan_completed); 1717 INIT_WORK(&il->abort_scan, il_bg_abort_scan); 1718 INIT_DELAYED_WORK(&il->scan_check, il_bg_scan_check); 1719 } 1720 EXPORT_SYMBOL(il_setup_scan_deferred_work); 1721 1722 void 1723 il_cancel_scan_deferred_work(struct il_priv *il) 1724 { 1725 cancel_work_sync(&il->abort_scan); 1726 cancel_work_sync(&il->scan_completed); 1727 1728 if (cancel_delayed_work_sync(&il->scan_check)) { 1729 mutex_lock(&il->mutex); 1730 il_force_scan_end(il); 1731 mutex_unlock(&il->mutex); 1732 } 1733 } 1734 EXPORT_SYMBOL(il_cancel_scan_deferred_work); 1735 1736 /* il->sta_lock must be held */ 1737 static void 1738 il_sta_ucode_activate(struct il_priv *il, u8 sta_id) 1739 { 1740 1741 if (!(il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE)) 1742 IL_ERR("ACTIVATE a non DRIVER active station id %u addr %pM\n", 1743 sta_id, il->stations[sta_id].sta.sta.addr); 1744 1745 if (il->stations[sta_id].used & IL_STA_UCODE_ACTIVE) { 1746 D_ASSOC("STA id %u addr %pM already present" 1747 " in uCode (according to driver)\n", sta_id, 1748 il->stations[sta_id].sta.sta.addr); 1749 } else { 1750 il->stations[sta_id].used |= IL_STA_UCODE_ACTIVE; 1751 D_ASSOC("Added STA id %u addr %pM to uCode\n", sta_id, 1752 il->stations[sta_id].sta.sta.addr); 1753 } 1754 } 1755 1756 static int 1757 il_process_add_sta_resp(struct il_priv *il, struct il_addsta_cmd *addsta, 1758 struct il_rx_pkt *pkt, bool sync) 1759 { 1760 u8 sta_id = addsta->sta.sta_id; 1761 unsigned long flags; 1762 int ret = -EIO; 1763 1764 if (pkt->hdr.flags & IL_CMD_FAILED_MSK) { 1765 IL_ERR("Bad return from C_ADD_STA (0x%08X)\n", pkt->hdr.flags); 1766 return ret; 1767 } 1768 1769 D_INFO("Processing response for adding station %u\n", sta_id); 1770 1771 spin_lock_irqsave(&il->sta_lock, flags); 1772 1773 switch (pkt->u.add_sta.status) { 1774 case ADD_STA_SUCCESS_MSK: 1775 D_INFO("C_ADD_STA PASSED\n"); 1776 il_sta_ucode_activate(il, sta_id); 1777 ret = 0; 1778 break; 1779 case ADD_STA_NO_ROOM_IN_TBL: 1780 IL_ERR("Adding station %d failed, no room in table.\n", sta_id); 1781 break; 1782 case ADD_STA_NO_BLOCK_ACK_RESOURCE: 1783 IL_ERR("Adding station %d failed, no block ack resource.\n", 1784 sta_id); 1785 break; 1786 case ADD_STA_MODIFY_NON_EXIST_STA: 1787 IL_ERR("Attempting to modify non-existing station %d\n", 1788 sta_id); 1789 break; 1790 default: 1791 D_ASSOC("Received C_ADD_STA:(0x%08X)\n", pkt->u.add_sta.status); 1792 break; 1793 } 1794 1795 D_INFO("%s station id %u addr %pM\n", 1796 il->stations[sta_id].sta.mode == 1797 STA_CONTROL_MODIFY_MSK ? "Modified" : "Added", sta_id, 1798 il->stations[sta_id].sta.sta.addr); 1799 1800 /* 1801 * XXX: The MAC address in the command buffer is often changed from 1802 * the original sent to the device. That is, the MAC address 1803 * written to the command buffer often is not the same MAC address 1804 * read from the command buffer when the command returns. This 1805 * issue has not yet been resolved and this debugging is left to 1806 * observe the problem. 1807 */ 1808 D_INFO("%s station according to cmd buffer %pM\n", 1809 il->stations[sta_id].sta.mode == 1810 STA_CONTROL_MODIFY_MSK ? "Modified" : "Added", addsta->sta.addr); 1811 spin_unlock_irqrestore(&il->sta_lock, flags); 1812 1813 return ret; 1814 } 1815 1816 static void 1817 il_add_sta_callback(struct il_priv *il, struct il_device_cmd *cmd, 1818 struct il_rx_pkt *pkt) 1819 { 1820 struct il_addsta_cmd *addsta = (struct il_addsta_cmd *)cmd->cmd.payload; 1821 1822 il_process_add_sta_resp(il, addsta, pkt, false); 1823 1824 } 1825 1826 int 1827 il_send_add_sta(struct il_priv *il, struct il_addsta_cmd *sta, u8 flags) 1828 { 1829 struct il_rx_pkt *pkt = NULL; 1830 int ret = 0; 1831 u8 data[sizeof(*sta)]; 1832 struct il_host_cmd cmd = { 1833 .id = C_ADD_STA, 1834 .flags = flags, 1835 .data = data, 1836 }; 1837 u8 sta_id __maybe_unused = sta->sta.sta_id; 1838 1839 D_INFO("Adding sta %u (%pM) %ssynchronously\n", sta_id, sta->sta.addr, 1840 flags & CMD_ASYNC ? "a" : ""); 1841 1842 if (flags & CMD_ASYNC) 1843 cmd.callback = il_add_sta_callback; 1844 else { 1845 cmd.flags |= CMD_WANT_SKB; 1846 might_sleep(); 1847 } 1848 1849 cmd.len = il->ops->build_addsta_hcmd(sta, data); 1850 ret = il_send_cmd(il, &cmd); 1851 if (ret) 1852 return ret; 1853 if (flags & CMD_ASYNC) 1854 return 0; 1855 1856 pkt = (struct il_rx_pkt *)cmd.reply_page; 1857 ret = il_process_add_sta_resp(il, sta, pkt, true); 1858 1859 il_free_pages(il, cmd.reply_page); 1860 1861 return ret; 1862 } 1863 EXPORT_SYMBOL(il_send_add_sta); 1864 1865 static void 1866 il_set_ht_add_station(struct il_priv *il, u8 idx, struct ieee80211_sta *sta) 1867 { 1868 struct ieee80211_sta_ht_cap *sta_ht_inf = &sta->ht_cap; 1869 __le32 sta_flags; 1870 1871 if (!sta || !sta_ht_inf->ht_supported) 1872 goto done; 1873 1874 D_ASSOC("spatial multiplexing power save mode: %s\n", 1875 (sta->smps_mode == IEEE80211_SMPS_STATIC) ? "static" : 1876 (sta->smps_mode == IEEE80211_SMPS_DYNAMIC) ? "dynamic" : 1877 "disabled"); 1878 1879 sta_flags = il->stations[idx].sta.station_flags; 1880 1881 sta_flags &= ~(STA_FLG_RTS_MIMO_PROT_MSK | STA_FLG_MIMO_DIS_MSK); 1882 1883 switch (sta->smps_mode) { 1884 case IEEE80211_SMPS_STATIC: 1885 sta_flags |= STA_FLG_MIMO_DIS_MSK; 1886 break; 1887 case IEEE80211_SMPS_DYNAMIC: 1888 sta_flags |= STA_FLG_RTS_MIMO_PROT_MSK; 1889 break; 1890 case IEEE80211_SMPS_OFF: 1891 break; 1892 default: 1893 IL_WARN("Invalid MIMO PS mode %d\n", sta->smps_mode); 1894 break; 1895 } 1896 1897 sta_flags |= 1898 cpu_to_le32((u32) sta_ht_inf-> 1899 ampdu_factor << STA_FLG_MAX_AGG_SIZE_POS); 1900 1901 sta_flags |= 1902 cpu_to_le32((u32) sta_ht_inf-> 1903 ampdu_density << STA_FLG_AGG_MPDU_DENSITY_POS); 1904 1905 if (il_is_ht40_tx_allowed(il, &sta->ht_cap)) 1906 sta_flags |= STA_FLG_HT40_EN_MSK; 1907 else 1908 sta_flags &= ~STA_FLG_HT40_EN_MSK; 1909 1910 il->stations[idx].sta.station_flags = sta_flags; 1911 done: 1912 return; 1913 } 1914 1915 /* 1916 * il_prep_station - Prepare station information for addition 1917 * 1918 * should be called with sta_lock held 1919 */ 1920 u8 1921 il_prep_station(struct il_priv *il, const u8 *addr, bool is_ap, 1922 struct ieee80211_sta *sta) 1923 { 1924 struct il_station_entry *station; 1925 int i; 1926 u8 sta_id = IL_INVALID_STATION; 1927 u16 rate; 1928 1929 if (is_ap) 1930 sta_id = IL_AP_ID; 1931 else if (is_broadcast_ether_addr(addr)) 1932 sta_id = il->hw_params.bcast_id; 1933 else 1934 for (i = IL_STA_ID; i < il->hw_params.max_stations; i++) { 1935 if (ether_addr_equal(il->stations[i].sta.sta.addr, 1936 addr)) { 1937 sta_id = i; 1938 break; 1939 } 1940 1941 if (!il->stations[i].used && 1942 sta_id == IL_INVALID_STATION) 1943 sta_id = i; 1944 } 1945 1946 /* 1947 * These two conditions have the same outcome, but keep them 1948 * separate 1949 */ 1950 if (unlikely(sta_id == IL_INVALID_STATION)) 1951 return sta_id; 1952 1953 /* 1954 * uCode is not able to deal with multiple requests to add a 1955 * station. Keep track if one is in progress so that we do not send 1956 * another. 1957 */ 1958 if (il->stations[sta_id].used & IL_STA_UCODE_INPROGRESS) { 1959 D_INFO("STA %d already in process of being added.\n", sta_id); 1960 return sta_id; 1961 } 1962 1963 if ((il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE) && 1964 (il->stations[sta_id].used & IL_STA_UCODE_ACTIVE) && 1965 ether_addr_equal(il->stations[sta_id].sta.sta.addr, addr)) { 1966 D_ASSOC("STA %d (%pM) already added, not adding again.\n", 1967 sta_id, addr); 1968 return sta_id; 1969 } 1970 1971 station = &il->stations[sta_id]; 1972 station->used = IL_STA_DRIVER_ACTIVE; 1973 D_ASSOC("Add STA to driver ID %d: %pM\n", sta_id, addr); 1974 il->num_stations++; 1975 1976 /* Set up the C_ADD_STA command to send to device */ 1977 memset(&station->sta, 0, sizeof(struct il_addsta_cmd)); 1978 memcpy(station->sta.sta.addr, addr, ETH_ALEN); 1979 station->sta.mode = 0; 1980 station->sta.sta.sta_id = sta_id; 1981 station->sta.station_flags = 0; 1982 1983 /* 1984 * OK to call unconditionally, since local stations (IBSS BSSID 1985 * STA and broadcast STA) pass in a NULL sta, and mac80211 1986 * doesn't allow HT IBSS. 1987 */ 1988 il_set_ht_add_station(il, sta_id, sta); 1989 1990 /* 3945 only */ 1991 rate = (il->band == NL80211_BAND_5GHZ) ? RATE_6M_PLCP : RATE_1M_PLCP; 1992 /* Turn on both antennas for the station... */ 1993 station->sta.rate_n_flags = cpu_to_le16(rate | RATE_MCS_ANT_AB_MSK); 1994 1995 return sta_id; 1996 1997 } 1998 EXPORT_SYMBOL_GPL(il_prep_station); 1999 2000 #define STA_WAIT_TIMEOUT (HZ/2) 2001 2002 /* 2003 * il_add_station_common - 2004 */ 2005 int 2006 il_add_station_common(struct il_priv *il, const u8 *addr, bool is_ap, 2007 struct ieee80211_sta *sta, u8 *sta_id_r) 2008 { 2009 unsigned long flags_spin; 2010 int ret = 0; 2011 u8 sta_id; 2012 struct il_addsta_cmd sta_cmd; 2013 2014 *sta_id_r = 0; 2015 spin_lock_irqsave(&il->sta_lock, flags_spin); 2016 sta_id = il_prep_station(il, addr, is_ap, sta); 2017 if (sta_id == IL_INVALID_STATION) { 2018 IL_ERR("Unable to prepare station %pM for addition\n", addr); 2019 spin_unlock_irqrestore(&il->sta_lock, flags_spin); 2020 return -EINVAL; 2021 } 2022 2023 /* 2024 * uCode is not able to deal with multiple requests to add a 2025 * station. Keep track if one is in progress so that we do not send 2026 * another. 2027 */ 2028 if (il->stations[sta_id].used & IL_STA_UCODE_INPROGRESS) { 2029 D_INFO("STA %d already in process of being added.\n", sta_id); 2030 spin_unlock_irqrestore(&il->sta_lock, flags_spin); 2031 return -EEXIST; 2032 } 2033 2034 if ((il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE) && 2035 (il->stations[sta_id].used & IL_STA_UCODE_ACTIVE)) { 2036 D_ASSOC("STA %d (%pM) already added, not adding again.\n", 2037 sta_id, addr); 2038 spin_unlock_irqrestore(&il->sta_lock, flags_spin); 2039 return -EEXIST; 2040 } 2041 2042 il->stations[sta_id].used |= IL_STA_UCODE_INPROGRESS; 2043 memcpy(&sta_cmd, &il->stations[sta_id].sta, 2044 sizeof(struct il_addsta_cmd)); 2045 spin_unlock_irqrestore(&il->sta_lock, flags_spin); 2046 2047 /* Add station to device's station table */ 2048 ret = il_send_add_sta(il, &sta_cmd, CMD_SYNC); 2049 if (ret) { 2050 spin_lock_irqsave(&il->sta_lock, flags_spin); 2051 IL_ERR("Adding station %pM failed.\n", 2052 il->stations[sta_id].sta.sta.addr); 2053 il->stations[sta_id].used &= ~IL_STA_DRIVER_ACTIVE; 2054 il->stations[sta_id].used &= ~IL_STA_UCODE_INPROGRESS; 2055 spin_unlock_irqrestore(&il->sta_lock, flags_spin); 2056 } 2057 *sta_id_r = sta_id; 2058 return ret; 2059 } 2060 EXPORT_SYMBOL(il_add_station_common); 2061 2062 /* 2063 * il_sta_ucode_deactivate - deactivate ucode status for a station 2064 * 2065 * il->sta_lock must be held 2066 */ 2067 static void 2068 il_sta_ucode_deactivate(struct il_priv *il, u8 sta_id) 2069 { 2070 /* Ucode must be active and driver must be non active */ 2071 if ((il->stations[sta_id]. 2072 used & (IL_STA_UCODE_ACTIVE | IL_STA_DRIVER_ACTIVE)) != 2073 IL_STA_UCODE_ACTIVE) 2074 IL_ERR("removed non active STA %u\n", sta_id); 2075 2076 il->stations[sta_id].used &= ~IL_STA_UCODE_ACTIVE; 2077 2078 memset(&il->stations[sta_id], 0, sizeof(struct il_station_entry)); 2079 D_ASSOC("Removed STA %u\n", sta_id); 2080 } 2081 2082 static int 2083 il_send_remove_station(struct il_priv *il, const u8 * addr, int sta_id, 2084 bool temporary) 2085 { 2086 struct il_rx_pkt *pkt; 2087 int ret; 2088 2089 unsigned long flags_spin; 2090 struct il_rem_sta_cmd rm_sta_cmd; 2091 2092 struct il_host_cmd cmd = { 2093 .id = C_REM_STA, 2094 .len = sizeof(struct il_rem_sta_cmd), 2095 .flags = CMD_SYNC, 2096 .data = &rm_sta_cmd, 2097 }; 2098 2099 memset(&rm_sta_cmd, 0, sizeof(rm_sta_cmd)); 2100 rm_sta_cmd.num_sta = 1; 2101 memcpy(&rm_sta_cmd.addr, addr, ETH_ALEN); 2102 2103 cmd.flags |= CMD_WANT_SKB; 2104 2105 ret = il_send_cmd(il, &cmd); 2106 2107 if (ret) 2108 return ret; 2109 2110 pkt = (struct il_rx_pkt *)cmd.reply_page; 2111 if (pkt->hdr.flags & IL_CMD_FAILED_MSK) { 2112 IL_ERR("Bad return from C_REM_STA (0x%08X)\n", pkt->hdr.flags); 2113 ret = -EIO; 2114 } 2115 2116 if (!ret) { 2117 switch (pkt->u.rem_sta.status) { 2118 case REM_STA_SUCCESS_MSK: 2119 if (!temporary) { 2120 spin_lock_irqsave(&il->sta_lock, flags_spin); 2121 il_sta_ucode_deactivate(il, sta_id); 2122 spin_unlock_irqrestore(&il->sta_lock, 2123 flags_spin); 2124 } 2125 D_ASSOC("C_REM_STA PASSED\n"); 2126 break; 2127 default: 2128 ret = -EIO; 2129 IL_ERR("C_REM_STA failed\n"); 2130 break; 2131 } 2132 } 2133 il_free_pages(il, cmd.reply_page); 2134 2135 return ret; 2136 } 2137 2138 /* 2139 * il_remove_station - Remove driver's knowledge of station. 2140 */ 2141 int 2142 il_remove_station(struct il_priv *il, const u8 sta_id, const u8 * addr) 2143 { 2144 unsigned long flags; 2145 2146 if (!il_is_ready(il)) { 2147 D_INFO("Unable to remove station %pM, device not ready.\n", 2148 addr); 2149 /* 2150 * It is typical for stations to be removed when we are 2151 * going down. Return success since device will be down 2152 * soon anyway 2153 */ 2154 return 0; 2155 } 2156 2157 D_ASSOC("Removing STA from driver:%d %pM\n", sta_id, addr); 2158 2159 if (WARN_ON(sta_id == IL_INVALID_STATION)) 2160 return -EINVAL; 2161 2162 spin_lock_irqsave(&il->sta_lock, flags); 2163 2164 if (!(il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE)) { 2165 D_INFO("Removing %pM but non DRIVER active\n", addr); 2166 goto out_err; 2167 } 2168 2169 if (!(il->stations[sta_id].used & IL_STA_UCODE_ACTIVE)) { 2170 D_INFO("Removing %pM but non UCODE active\n", addr); 2171 goto out_err; 2172 } 2173 2174 if (il->stations[sta_id].used & IL_STA_LOCAL) { 2175 kfree(il->stations[sta_id].lq); 2176 il->stations[sta_id].lq = NULL; 2177 } 2178 2179 il->stations[sta_id].used &= ~IL_STA_DRIVER_ACTIVE; 2180 2181 il->num_stations--; 2182 2183 BUG_ON(il->num_stations < 0); 2184 2185 spin_unlock_irqrestore(&il->sta_lock, flags); 2186 2187 return il_send_remove_station(il, addr, sta_id, false); 2188 out_err: 2189 spin_unlock_irqrestore(&il->sta_lock, flags); 2190 return -EINVAL; 2191 } 2192 EXPORT_SYMBOL_GPL(il_remove_station); 2193 2194 /* 2195 * il_clear_ucode_stations - clear ucode station table bits 2196 * 2197 * This function clears all the bits in the driver indicating 2198 * which stations are active in the ucode. Call when something 2199 * other than explicit station management would cause this in 2200 * the ucode, e.g. unassociated RXON. 2201 */ 2202 void 2203 il_clear_ucode_stations(struct il_priv *il) 2204 { 2205 int i; 2206 unsigned long flags_spin; 2207 bool cleared = false; 2208 2209 D_INFO("Clearing ucode stations in driver\n"); 2210 2211 spin_lock_irqsave(&il->sta_lock, flags_spin); 2212 for (i = 0; i < il->hw_params.max_stations; i++) { 2213 if (il->stations[i].used & IL_STA_UCODE_ACTIVE) { 2214 D_INFO("Clearing ucode active for station %d\n", i); 2215 il->stations[i].used &= ~IL_STA_UCODE_ACTIVE; 2216 cleared = true; 2217 } 2218 } 2219 spin_unlock_irqrestore(&il->sta_lock, flags_spin); 2220 2221 if (!cleared) 2222 D_INFO("No active stations found to be cleared\n"); 2223 } 2224 EXPORT_SYMBOL(il_clear_ucode_stations); 2225 2226 /* 2227 * il_restore_stations() - Restore driver known stations to device 2228 * 2229 * All stations considered active by driver, but not present in ucode, is 2230 * restored. 2231 * 2232 * Function sleeps. 2233 */ 2234 void 2235 il_restore_stations(struct il_priv *il) 2236 { 2237 struct il_addsta_cmd sta_cmd; 2238 struct il_link_quality_cmd lq; 2239 unsigned long flags_spin; 2240 int i; 2241 bool found = false; 2242 int ret; 2243 bool send_lq; 2244 2245 if (!il_is_ready(il)) { 2246 D_INFO("Not ready yet, not restoring any stations.\n"); 2247 return; 2248 } 2249 2250 D_ASSOC("Restoring all known stations ... start.\n"); 2251 spin_lock_irqsave(&il->sta_lock, flags_spin); 2252 for (i = 0; i < il->hw_params.max_stations; i++) { 2253 if ((il->stations[i].used & IL_STA_DRIVER_ACTIVE) && 2254 !(il->stations[i].used & IL_STA_UCODE_ACTIVE)) { 2255 D_ASSOC("Restoring sta %pM\n", 2256 il->stations[i].sta.sta.addr); 2257 il->stations[i].sta.mode = 0; 2258 il->stations[i].used |= IL_STA_UCODE_INPROGRESS; 2259 found = true; 2260 } 2261 } 2262 2263 for (i = 0; i < il->hw_params.max_stations; i++) { 2264 if ((il->stations[i].used & IL_STA_UCODE_INPROGRESS)) { 2265 memcpy(&sta_cmd, &il->stations[i].sta, 2266 sizeof(struct il_addsta_cmd)); 2267 send_lq = false; 2268 if (il->stations[i].lq) { 2269 memcpy(&lq, il->stations[i].lq, 2270 sizeof(struct il_link_quality_cmd)); 2271 send_lq = true; 2272 } 2273 spin_unlock_irqrestore(&il->sta_lock, flags_spin); 2274 ret = il_send_add_sta(il, &sta_cmd, CMD_SYNC); 2275 if (ret) { 2276 spin_lock_irqsave(&il->sta_lock, flags_spin); 2277 IL_ERR("Adding station %pM failed.\n", 2278 il->stations[i].sta.sta.addr); 2279 il->stations[i].used &= ~IL_STA_DRIVER_ACTIVE; 2280 il->stations[i].used &= 2281 ~IL_STA_UCODE_INPROGRESS; 2282 spin_unlock_irqrestore(&il->sta_lock, 2283 flags_spin); 2284 } 2285 /* 2286 * Rate scaling has already been initialized, send 2287 * current LQ command 2288 */ 2289 if (send_lq) 2290 il_send_lq_cmd(il, &lq, CMD_SYNC, true); 2291 spin_lock_irqsave(&il->sta_lock, flags_spin); 2292 il->stations[i].used &= ~IL_STA_UCODE_INPROGRESS; 2293 } 2294 } 2295 2296 spin_unlock_irqrestore(&il->sta_lock, flags_spin); 2297 if (!found) 2298 D_INFO("Restoring all known stations" 2299 " .... no stations to be restored.\n"); 2300 else 2301 D_INFO("Restoring all known stations" " .... complete.\n"); 2302 } 2303 EXPORT_SYMBOL(il_restore_stations); 2304 2305 int 2306 il_get_free_ucode_key_idx(struct il_priv *il) 2307 { 2308 int i; 2309 2310 for (i = 0; i < il->sta_key_max_num; i++) 2311 if (!test_and_set_bit(i, &il->ucode_key_table)) 2312 return i; 2313 2314 return WEP_INVALID_OFFSET; 2315 } 2316 EXPORT_SYMBOL(il_get_free_ucode_key_idx); 2317 2318 void 2319 il_dealloc_bcast_stations(struct il_priv *il) 2320 { 2321 unsigned long flags; 2322 int i; 2323 2324 spin_lock_irqsave(&il->sta_lock, flags); 2325 for (i = 0; i < il->hw_params.max_stations; i++) { 2326 if (!(il->stations[i].used & IL_STA_BCAST)) 2327 continue; 2328 2329 il->stations[i].used &= ~IL_STA_UCODE_ACTIVE; 2330 il->num_stations--; 2331 BUG_ON(il->num_stations < 0); 2332 kfree(il->stations[i].lq); 2333 il->stations[i].lq = NULL; 2334 } 2335 spin_unlock_irqrestore(&il->sta_lock, flags); 2336 } 2337 EXPORT_SYMBOL_GPL(il_dealloc_bcast_stations); 2338 2339 #ifdef CONFIG_IWLEGACY_DEBUG 2340 static void 2341 il_dump_lq_cmd(struct il_priv *il, struct il_link_quality_cmd *lq) 2342 { 2343 int i; 2344 D_RATE("lq station id 0x%x\n", lq->sta_id); 2345 D_RATE("lq ant 0x%X 0x%X\n", lq->general_params.single_stream_ant_msk, 2346 lq->general_params.dual_stream_ant_msk); 2347 2348 for (i = 0; i < LINK_QUAL_MAX_RETRY_NUM; i++) 2349 D_RATE("lq idx %d 0x%X\n", i, lq->rs_table[i].rate_n_flags); 2350 } 2351 #else 2352 static inline void 2353 il_dump_lq_cmd(struct il_priv *il, struct il_link_quality_cmd *lq) 2354 { 2355 } 2356 #endif 2357 2358 /* 2359 * il_is_lq_table_valid() - Test one aspect of LQ cmd for validity 2360 * 2361 * It sometimes happens when a HT rate has been in use and we 2362 * loose connectivity with AP then mac80211 will first tell us that the 2363 * current channel is not HT anymore before removing the station. In such a 2364 * scenario the RXON flags will be updated to indicate we are not 2365 * communicating HT anymore, but the LQ command may still contain HT rates. 2366 * Test for this to prevent driver from sending LQ command between the time 2367 * RXON flags are updated and when LQ command is updated. 2368 */ 2369 static bool 2370 il_is_lq_table_valid(struct il_priv *il, struct il_link_quality_cmd *lq) 2371 { 2372 int i; 2373 2374 if (il->ht.enabled) 2375 return true; 2376 2377 D_INFO("Channel %u is not an HT channel\n", il->active.channel); 2378 for (i = 0; i < LINK_QUAL_MAX_RETRY_NUM; i++) { 2379 if (le32_to_cpu(lq->rs_table[i].rate_n_flags) & RATE_MCS_HT_MSK) { 2380 D_INFO("idx %d of LQ expects HT channel\n", i); 2381 return false; 2382 } 2383 } 2384 return true; 2385 } 2386 2387 /* 2388 * il_send_lq_cmd() - Send link quality command 2389 * @init: This command is sent as part of station initialization right 2390 * after station has been added. 2391 * 2392 * The link quality command is sent as the last step of station creation. 2393 * This is the special case in which init is set and we call a callback in 2394 * this case to clear the state indicating that station creation is in 2395 * progress. 2396 */ 2397 int 2398 il_send_lq_cmd(struct il_priv *il, struct il_link_quality_cmd *lq, 2399 u8 flags, bool init) 2400 { 2401 int ret = 0; 2402 unsigned long flags_spin; 2403 2404 struct il_host_cmd cmd = { 2405 .id = C_TX_LINK_QUALITY_CMD, 2406 .len = sizeof(struct il_link_quality_cmd), 2407 .flags = flags, 2408 .data = lq, 2409 }; 2410 2411 if (WARN_ON(lq->sta_id == IL_INVALID_STATION)) 2412 return -EINVAL; 2413 2414 spin_lock_irqsave(&il->sta_lock, flags_spin); 2415 if (!(il->stations[lq->sta_id].used & IL_STA_DRIVER_ACTIVE)) { 2416 spin_unlock_irqrestore(&il->sta_lock, flags_spin); 2417 return -EINVAL; 2418 } 2419 spin_unlock_irqrestore(&il->sta_lock, flags_spin); 2420 2421 il_dump_lq_cmd(il, lq); 2422 BUG_ON(init && (cmd.flags & CMD_ASYNC)); 2423 2424 if (il_is_lq_table_valid(il, lq)) 2425 ret = il_send_cmd(il, &cmd); 2426 else 2427 ret = -EINVAL; 2428 2429 if (cmd.flags & CMD_ASYNC) 2430 return ret; 2431 2432 if (init) { 2433 D_INFO("init LQ command complete," 2434 " clearing sta addition status for sta %d\n", 2435 lq->sta_id); 2436 spin_lock_irqsave(&il->sta_lock, flags_spin); 2437 il->stations[lq->sta_id].used &= ~IL_STA_UCODE_INPROGRESS; 2438 spin_unlock_irqrestore(&il->sta_lock, flags_spin); 2439 } 2440 return ret; 2441 } 2442 EXPORT_SYMBOL(il_send_lq_cmd); 2443 2444 int 2445 il_mac_sta_remove(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 2446 struct ieee80211_sta *sta) 2447 { 2448 struct il_priv *il = hw->priv; 2449 struct il_station_priv_common *sta_common = (void *)sta->drv_priv; 2450 int ret; 2451 2452 mutex_lock(&il->mutex); 2453 D_MAC80211("enter station %pM\n", sta->addr); 2454 2455 ret = il_remove_station(il, sta_common->sta_id, sta->addr); 2456 if (ret) 2457 IL_ERR("Error removing station %pM\n", sta->addr); 2458 2459 D_MAC80211("leave ret %d\n", ret); 2460 mutex_unlock(&il->mutex); 2461 2462 return ret; 2463 } 2464 EXPORT_SYMBOL(il_mac_sta_remove); 2465 2466 /************************** RX-FUNCTIONS ****************************/ 2467 /* 2468 * Rx theory of operation 2469 * 2470 * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs), 2471 * each of which point to Receive Buffers to be filled by the NIC. These get 2472 * used not only for Rx frames, but for any command response or notification 2473 * from the NIC. The driver and NIC manage the Rx buffers by means 2474 * of idxes into the circular buffer. 2475 * 2476 * Rx Queue Indexes 2477 * The host/firmware share two idx registers for managing the Rx buffers. 2478 * 2479 * The READ idx maps to the first position that the firmware may be writing 2480 * to -- the driver can read up to (but not including) this position and get 2481 * good data. 2482 * The READ idx is managed by the firmware once the card is enabled. 2483 * 2484 * The WRITE idx maps to the last position the driver has read from -- the 2485 * position preceding WRITE is the last slot the firmware can place a packet. 2486 * 2487 * The queue is empty (no good data) if WRITE = READ - 1, and is full if 2488 * WRITE = READ. 2489 * 2490 * During initialization, the host sets up the READ queue position to the first 2491 * IDX position, and WRITE to the last (READ - 1 wrapped) 2492 * 2493 * When the firmware places a packet in a buffer, it will advance the READ idx 2494 * and fire the RX interrupt. The driver can then query the READ idx and 2495 * process as many packets as possible, moving the WRITE idx forward as it 2496 * resets the Rx queue buffers with new memory. 2497 * 2498 * The management in the driver is as follows: 2499 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When 2500 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled 2501 * to replenish the iwl->rxq->rx_free. 2502 * + In il_rx_replenish (scheduled) if 'processed' != 'read' then the 2503 * iwl->rxq is replenished and the READ IDX is updated (updating the 2504 * 'processed' and 'read' driver idxes as well) 2505 * + A received packet is processed and handed to the kernel network stack, 2506 * detached from the iwl->rxq. The driver 'processed' idx is updated. 2507 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free 2508 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ 2509 * IDX is not incremented and iwl->status(RX_STALLED) is set. If there 2510 * were enough free buffers and RX_STALLED is set it is cleared. 2511 * 2512 * 2513 * Driver sequence: 2514 * 2515 * il_rx_queue_alloc() Allocates rx_free 2516 * il_rx_replenish() Replenishes rx_free list from rx_used, and calls 2517 * il_rx_queue_restock 2518 * il_rx_queue_restock() Moves available buffers from rx_free into Rx 2519 * queue, updates firmware pointers, and updates 2520 * the WRITE idx. If insufficient rx_free buffers 2521 * are available, schedules il_rx_replenish 2522 * 2523 * -- enable interrupts -- 2524 * ISR - il_rx() Detach il_rx_bufs from pool up to the 2525 * READ IDX, detaching the SKB from the pool. 2526 * Moves the packet buffer from queue to rx_used. 2527 * Calls il_rx_queue_restock to refill any empty 2528 * slots. 2529 * ... 2530 * 2531 */ 2532 2533 /* 2534 * il_rx_queue_space - Return number of free slots available in queue. 2535 */ 2536 int 2537 il_rx_queue_space(const struct il_rx_queue *q) 2538 { 2539 int s = q->read - q->write; 2540 if (s <= 0) 2541 s += RX_QUEUE_SIZE; 2542 /* keep some buffer to not confuse full and empty queue */ 2543 s -= 2; 2544 if (s < 0) 2545 s = 0; 2546 return s; 2547 } 2548 EXPORT_SYMBOL(il_rx_queue_space); 2549 2550 /* 2551 * il_rx_queue_update_write_ptr - Update the write pointer for the RX queue 2552 */ 2553 void 2554 il_rx_queue_update_write_ptr(struct il_priv *il, struct il_rx_queue *q) 2555 { 2556 unsigned long flags; 2557 u32 rx_wrt_ptr_reg = il->hw_params.rx_wrt_ptr_reg; 2558 u32 reg; 2559 2560 spin_lock_irqsave(&q->lock, flags); 2561 2562 if (q->need_update == 0) 2563 goto exit_unlock; 2564 2565 /* If power-saving is in use, make sure device is awake */ 2566 if (test_bit(S_POWER_PMI, &il->status)) { 2567 reg = _il_rd(il, CSR_UCODE_DRV_GP1); 2568 2569 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) { 2570 D_INFO("Rx queue requesting wakeup," " GP1 = 0x%x\n", 2571 reg); 2572 il_set_bit(il, CSR_GP_CNTRL, 2573 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); 2574 goto exit_unlock; 2575 } 2576 2577 q->write_actual = (q->write & ~0x7); 2578 il_wr(il, rx_wrt_ptr_reg, q->write_actual); 2579 2580 /* Else device is assumed to be awake */ 2581 } else { 2582 /* Device expects a multiple of 8 */ 2583 q->write_actual = (q->write & ~0x7); 2584 il_wr(il, rx_wrt_ptr_reg, q->write_actual); 2585 } 2586 2587 q->need_update = 0; 2588 2589 exit_unlock: 2590 spin_unlock_irqrestore(&q->lock, flags); 2591 } 2592 EXPORT_SYMBOL(il_rx_queue_update_write_ptr); 2593 2594 int 2595 il_rx_queue_alloc(struct il_priv *il) 2596 { 2597 struct il_rx_queue *rxq = &il->rxq; 2598 struct device *dev = &il->pci_dev->dev; 2599 int i; 2600 2601 spin_lock_init(&rxq->lock); 2602 INIT_LIST_HEAD(&rxq->rx_free); 2603 INIT_LIST_HEAD(&rxq->rx_used); 2604 2605 /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */ 2606 rxq->bd = dma_alloc_coherent(dev, 4 * RX_QUEUE_SIZE, &rxq->bd_dma, 2607 GFP_KERNEL); 2608 if (!rxq->bd) 2609 goto err_bd; 2610 2611 rxq->rb_stts = dma_alloc_coherent(dev, sizeof(struct il_rb_status), 2612 &rxq->rb_stts_dma, GFP_KERNEL); 2613 if (!rxq->rb_stts) 2614 goto err_rb; 2615 2616 /* Fill the rx_used queue with _all_ of the Rx buffers */ 2617 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) 2618 list_add_tail(&rxq->pool[i].list, &rxq->rx_used); 2619 2620 /* Set us so that we have processed and used all buffers, but have 2621 * not restocked the Rx queue with fresh buffers */ 2622 rxq->read = rxq->write = 0; 2623 rxq->write_actual = 0; 2624 rxq->free_count = 0; 2625 rxq->need_update = 0; 2626 return 0; 2627 2628 err_rb: 2629 dma_free_coherent(&il->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd, 2630 rxq->bd_dma); 2631 err_bd: 2632 return -ENOMEM; 2633 } 2634 EXPORT_SYMBOL(il_rx_queue_alloc); 2635 2636 void 2637 il_hdl_spectrum_measurement(struct il_priv *il, struct il_rx_buf *rxb) 2638 { 2639 struct il_rx_pkt *pkt = rxb_addr(rxb); 2640 struct il_spectrum_notification *report = &(pkt->u.spectrum_notif); 2641 2642 if (!report->state) { 2643 D_11H("Spectrum Measure Notification: Start\n"); 2644 return; 2645 } 2646 2647 memcpy(&il->measure_report, report, sizeof(*report)); 2648 il->measurement_status |= MEASUREMENT_READY; 2649 } 2650 EXPORT_SYMBOL(il_hdl_spectrum_measurement); 2651 2652 /* 2653 * returns non-zero if packet should be dropped 2654 */ 2655 int 2656 il_set_decrypted_flag(struct il_priv *il, struct ieee80211_hdr *hdr, 2657 u32 decrypt_res, struct ieee80211_rx_status *stats) 2658 { 2659 u16 fc = le16_to_cpu(hdr->frame_control); 2660 2661 /* 2662 * All contexts have the same setting here due to it being 2663 * a module parameter, so OK to check any context. 2664 */ 2665 if (il->active.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK) 2666 return 0; 2667 2668 if (!(fc & IEEE80211_FCTL_PROTECTED)) 2669 return 0; 2670 2671 D_RX("decrypt_res:0x%x\n", decrypt_res); 2672 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) { 2673 case RX_RES_STATUS_SEC_TYPE_TKIP: 2674 /* The uCode has got a bad phase 1 Key, pushes the packet. 2675 * Decryption will be done in SW. */ 2676 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) == 2677 RX_RES_STATUS_BAD_KEY_TTAK) 2678 break; 2679 fallthrough; 2680 2681 case RX_RES_STATUS_SEC_TYPE_WEP: 2682 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) == 2683 RX_RES_STATUS_BAD_ICV_MIC) { 2684 /* bad ICV, the packet is destroyed since the 2685 * decryption is inplace, drop it */ 2686 D_RX("Packet destroyed\n"); 2687 return -1; 2688 } 2689 fallthrough; 2690 case RX_RES_STATUS_SEC_TYPE_CCMP: 2691 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) == 2692 RX_RES_STATUS_DECRYPT_OK) { 2693 D_RX("hw decrypt successfully!!!\n"); 2694 stats->flag |= RX_FLAG_DECRYPTED; 2695 } 2696 break; 2697 2698 default: 2699 break; 2700 } 2701 return 0; 2702 } 2703 EXPORT_SYMBOL(il_set_decrypted_flag); 2704 2705 /* 2706 * il_txq_update_write_ptr - Send new write idx to hardware 2707 */ 2708 void 2709 il_txq_update_write_ptr(struct il_priv *il, struct il_tx_queue *txq) 2710 { 2711 u32 reg = 0; 2712 int txq_id = txq->q.id; 2713 2714 if (txq->need_update == 0) 2715 return; 2716 2717 /* if we're trying to save power */ 2718 if (test_bit(S_POWER_PMI, &il->status)) { 2719 /* wake up nic if it's powered down ... 2720 * uCode will wake up, and interrupt us again, so next 2721 * time we'll skip this part. */ 2722 reg = _il_rd(il, CSR_UCODE_DRV_GP1); 2723 2724 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) { 2725 D_INFO("Tx queue %d requesting wakeup," " GP1 = 0x%x\n", 2726 txq_id, reg); 2727 il_set_bit(il, CSR_GP_CNTRL, 2728 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); 2729 return; 2730 } 2731 2732 il_wr(il, HBUS_TARG_WRPTR, txq->q.write_ptr | (txq_id << 8)); 2733 2734 /* 2735 * else not in power-save mode, 2736 * uCode will never sleep when we're 2737 * trying to tx (during RFKILL, we're not trying to tx). 2738 */ 2739 } else 2740 _il_wr(il, HBUS_TARG_WRPTR, txq->q.write_ptr | (txq_id << 8)); 2741 txq->need_update = 0; 2742 } 2743 EXPORT_SYMBOL(il_txq_update_write_ptr); 2744 2745 /* 2746 * il_tx_queue_unmap - Unmap any remaining DMA mappings and free skb's 2747 */ 2748 void 2749 il_tx_queue_unmap(struct il_priv *il, int txq_id) 2750 { 2751 struct il_tx_queue *txq = &il->txq[txq_id]; 2752 struct il_queue *q = &txq->q; 2753 2754 if (q->n_bd == 0) 2755 return; 2756 2757 while (q->write_ptr != q->read_ptr) { 2758 il->ops->txq_free_tfd(il, txq); 2759 q->read_ptr = il_queue_inc_wrap(q->read_ptr, q->n_bd); 2760 } 2761 } 2762 EXPORT_SYMBOL(il_tx_queue_unmap); 2763 2764 /* 2765 * il_tx_queue_free - Deallocate DMA queue. 2766 * @txq: Transmit queue to deallocate. 2767 * 2768 * Empty queue by removing and destroying all BD's. 2769 * Free all buffers. 2770 * 0-fill, but do not free "txq" descriptor structure. 2771 */ 2772 void 2773 il_tx_queue_free(struct il_priv *il, int txq_id) 2774 { 2775 struct il_tx_queue *txq = &il->txq[txq_id]; 2776 struct device *dev = &il->pci_dev->dev; 2777 int i; 2778 2779 il_tx_queue_unmap(il, txq_id); 2780 2781 /* De-alloc array of command/tx buffers */ 2782 if (txq->cmd) { 2783 for (i = 0; i < TFD_TX_CMD_SLOTS; i++) 2784 kfree(txq->cmd[i]); 2785 } 2786 2787 /* De-alloc circular buffer of TFDs */ 2788 if (txq->q.n_bd) 2789 dma_free_coherent(dev, il->hw_params.tfd_size * txq->q.n_bd, 2790 txq->tfds, txq->q.dma_addr); 2791 2792 /* De-alloc array of per-TFD driver data */ 2793 kfree(txq->skbs); 2794 txq->skbs = NULL; 2795 2796 /* deallocate arrays */ 2797 kfree(txq->cmd); 2798 kfree(txq->meta); 2799 txq->cmd = NULL; 2800 txq->meta = NULL; 2801 2802 /* 0-fill queue descriptor structure */ 2803 memset(txq, 0, sizeof(*txq)); 2804 } 2805 EXPORT_SYMBOL(il_tx_queue_free); 2806 2807 /* 2808 * il_cmd_queue_unmap - Unmap any remaining DMA mappings from command queue 2809 */ 2810 void 2811 il_cmd_queue_unmap(struct il_priv *il) 2812 { 2813 struct il_tx_queue *txq = &il->txq[il->cmd_queue]; 2814 struct il_queue *q = &txq->q; 2815 int i; 2816 2817 if (q->n_bd == 0) 2818 return; 2819 2820 while (q->read_ptr != q->write_ptr) { 2821 i = il_get_cmd_idx(q, q->read_ptr, 0); 2822 2823 if (txq->meta[i].flags & CMD_MAPPED) { 2824 pci_unmap_single(il->pci_dev, 2825 dma_unmap_addr(&txq->meta[i], mapping), 2826 dma_unmap_len(&txq->meta[i], len), 2827 PCI_DMA_BIDIRECTIONAL); 2828 txq->meta[i].flags = 0; 2829 } 2830 2831 q->read_ptr = il_queue_inc_wrap(q->read_ptr, q->n_bd); 2832 } 2833 2834 i = q->n_win; 2835 if (txq->meta[i].flags & CMD_MAPPED) { 2836 pci_unmap_single(il->pci_dev, 2837 dma_unmap_addr(&txq->meta[i], mapping), 2838 dma_unmap_len(&txq->meta[i], len), 2839 PCI_DMA_BIDIRECTIONAL); 2840 txq->meta[i].flags = 0; 2841 } 2842 } 2843 EXPORT_SYMBOL(il_cmd_queue_unmap); 2844 2845 /* 2846 * il_cmd_queue_free - Deallocate DMA queue. 2847 * 2848 * Empty queue by removing and destroying all BD's. 2849 * Free all buffers. 2850 * 0-fill, but do not free "txq" descriptor structure. 2851 */ 2852 void 2853 il_cmd_queue_free(struct il_priv *il) 2854 { 2855 struct il_tx_queue *txq = &il->txq[il->cmd_queue]; 2856 struct device *dev = &il->pci_dev->dev; 2857 int i; 2858 2859 il_cmd_queue_unmap(il); 2860 2861 /* De-alloc array of command/tx buffers */ 2862 if (txq->cmd) { 2863 for (i = 0; i <= TFD_CMD_SLOTS; i++) 2864 kfree(txq->cmd[i]); 2865 } 2866 2867 /* De-alloc circular buffer of TFDs */ 2868 if (txq->q.n_bd) 2869 dma_free_coherent(dev, il->hw_params.tfd_size * txq->q.n_bd, 2870 txq->tfds, txq->q.dma_addr); 2871 2872 /* deallocate arrays */ 2873 kfree(txq->cmd); 2874 kfree(txq->meta); 2875 txq->cmd = NULL; 2876 txq->meta = NULL; 2877 2878 /* 0-fill queue descriptor structure */ 2879 memset(txq, 0, sizeof(*txq)); 2880 } 2881 EXPORT_SYMBOL(il_cmd_queue_free); 2882 2883 /*************** DMA-QUEUE-GENERAL-FUNCTIONS ***** 2884 * DMA services 2885 * 2886 * Theory of operation 2887 * 2888 * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer 2889 * of buffer descriptors, each of which points to one or more data buffers for 2890 * the device to read from or fill. Driver and device exchange status of each 2891 * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty 2892 * entries in each circular buffer, to protect against confusing empty and full 2893 * queue states. 2894 * 2895 * The device reads or writes the data in the queues via the device's several 2896 * DMA/FIFO channels. Each queue is mapped to a single DMA channel. 2897 * 2898 * For Tx queue, there are low mark and high mark limits. If, after queuing 2899 * the packet for Tx, free space become < low mark, Tx queue stopped. When 2900 * reclaiming packets (on 'tx done IRQ), if free space become > high mark, 2901 * Tx queue resumed. 2902 * 2903 * See more detailed info in 4965.h. 2904 ***************************************************/ 2905 2906 int 2907 il_queue_space(const struct il_queue *q) 2908 { 2909 int s = q->read_ptr - q->write_ptr; 2910 2911 if (q->read_ptr > q->write_ptr) 2912 s -= q->n_bd; 2913 2914 if (s <= 0) 2915 s += q->n_win; 2916 /* keep some reserve to not confuse empty and full situations */ 2917 s -= 2; 2918 if (s < 0) 2919 s = 0; 2920 return s; 2921 } 2922 EXPORT_SYMBOL(il_queue_space); 2923 2924 2925 /* 2926 * il_queue_init - Initialize queue's high/low-water and read/write idxes 2927 */ 2928 static int 2929 il_queue_init(struct il_priv *il, struct il_queue *q, int slots, u32 id) 2930 { 2931 /* 2932 * TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise 2933 * il_queue_inc_wrap and il_queue_dec_wrap are broken. 2934 */ 2935 BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1)); 2936 /* FIXME: remove q->n_bd */ 2937 q->n_bd = TFD_QUEUE_SIZE_MAX; 2938 2939 q->n_win = slots; 2940 q->id = id; 2941 2942 /* slots_must be power-of-two size, otherwise 2943 * il_get_cmd_idx is broken. */ 2944 BUG_ON(!is_power_of_2(slots)); 2945 2946 q->low_mark = q->n_win / 4; 2947 if (q->low_mark < 4) 2948 q->low_mark = 4; 2949 2950 q->high_mark = q->n_win / 8; 2951 if (q->high_mark < 2) 2952 q->high_mark = 2; 2953 2954 q->write_ptr = q->read_ptr = 0; 2955 2956 return 0; 2957 } 2958 2959 /* 2960 * il_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue 2961 */ 2962 static int 2963 il_tx_queue_alloc(struct il_priv *il, struct il_tx_queue *txq, u32 id) 2964 { 2965 struct device *dev = &il->pci_dev->dev; 2966 size_t tfd_sz = il->hw_params.tfd_size * TFD_QUEUE_SIZE_MAX; 2967 2968 /* Driver ilate data, only for Tx (not command) queues, 2969 * not shared with device. */ 2970 if (id != il->cmd_queue) { 2971 txq->skbs = kcalloc(TFD_QUEUE_SIZE_MAX, 2972 sizeof(struct sk_buff *), 2973 GFP_KERNEL); 2974 if (!txq->skbs) { 2975 IL_ERR("Fail to alloc skbs\n"); 2976 goto error; 2977 } 2978 } else 2979 txq->skbs = NULL; 2980 2981 /* Circular buffer of transmit frame descriptors (TFDs), 2982 * shared with device */ 2983 txq->tfds = 2984 dma_alloc_coherent(dev, tfd_sz, &txq->q.dma_addr, GFP_KERNEL); 2985 if (!txq->tfds) 2986 goto error; 2987 2988 txq->q.id = id; 2989 2990 return 0; 2991 2992 error: 2993 kfree(txq->skbs); 2994 txq->skbs = NULL; 2995 2996 return -ENOMEM; 2997 } 2998 2999 /* 3000 * il_tx_queue_init - Allocate and initialize one tx/cmd queue 3001 */ 3002 int 3003 il_tx_queue_init(struct il_priv *il, u32 txq_id) 3004 { 3005 int i, len, ret; 3006 int slots, actual_slots; 3007 struct il_tx_queue *txq = &il->txq[txq_id]; 3008 3009 /* 3010 * Alloc buffer array for commands (Tx or other types of commands). 3011 * For the command queue (#4/#9), allocate command space + one big 3012 * command for scan, since scan command is very huge; the system will 3013 * not have two scans at the same time, so only one is needed. 3014 * For normal Tx queues (all other queues), no super-size command 3015 * space is needed. 3016 */ 3017 if (txq_id == il->cmd_queue) { 3018 slots = TFD_CMD_SLOTS; 3019 actual_slots = slots + 1; 3020 } else { 3021 slots = TFD_TX_CMD_SLOTS; 3022 actual_slots = slots; 3023 } 3024 3025 txq->meta = 3026 kcalloc(actual_slots, sizeof(struct il_cmd_meta), GFP_KERNEL); 3027 txq->cmd = 3028 kcalloc(actual_slots, sizeof(struct il_device_cmd *), GFP_KERNEL); 3029 3030 if (!txq->meta || !txq->cmd) 3031 goto out_free_arrays; 3032 3033 len = sizeof(struct il_device_cmd); 3034 for (i = 0; i < actual_slots; i++) { 3035 /* only happens for cmd queue */ 3036 if (i == slots) 3037 len = IL_MAX_CMD_SIZE; 3038 3039 txq->cmd[i] = kmalloc(len, GFP_KERNEL); 3040 if (!txq->cmd[i]) 3041 goto err; 3042 } 3043 3044 /* Alloc driver data array and TFD circular buffer */ 3045 ret = il_tx_queue_alloc(il, txq, txq_id); 3046 if (ret) 3047 goto err; 3048 3049 txq->need_update = 0; 3050 3051 /* 3052 * For the default queues 0-3, set up the swq_id 3053 * already -- all others need to get one later 3054 * (if they need one at all). 3055 */ 3056 if (txq_id < 4) 3057 il_set_swq_id(txq, txq_id, txq_id); 3058 3059 /* Initialize queue's high/low-water marks, and head/tail idxes */ 3060 il_queue_init(il, &txq->q, slots, txq_id); 3061 3062 /* Tell device where to find queue */ 3063 il->ops->txq_init(il, txq); 3064 3065 return 0; 3066 err: 3067 for (i = 0; i < actual_slots; i++) 3068 kfree(txq->cmd[i]); 3069 out_free_arrays: 3070 kfree(txq->meta); 3071 txq->meta = NULL; 3072 kfree(txq->cmd); 3073 txq->cmd = NULL; 3074 3075 return -ENOMEM; 3076 } 3077 EXPORT_SYMBOL(il_tx_queue_init); 3078 3079 void 3080 il_tx_queue_reset(struct il_priv *il, u32 txq_id) 3081 { 3082 int slots, actual_slots; 3083 struct il_tx_queue *txq = &il->txq[txq_id]; 3084 3085 if (txq_id == il->cmd_queue) { 3086 slots = TFD_CMD_SLOTS; 3087 actual_slots = TFD_CMD_SLOTS + 1; 3088 } else { 3089 slots = TFD_TX_CMD_SLOTS; 3090 actual_slots = TFD_TX_CMD_SLOTS; 3091 } 3092 3093 memset(txq->meta, 0, sizeof(struct il_cmd_meta) * actual_slots); 3094 txq->need_update = 0; 3095 3096 /* Initialize queue's high/low-water marks, and head/tail idxes */ 3097 il_queue_init(il, &txq->q, slots, txq_id); 3098 3099 /* Tell device where to find queue */ 3100 il->ops->txq_init(il, txq); 3101 } 3102 EXPORT_SYMBOL(il_tx_queue_reset); 3103 3104 /*************** HOST COMMAND QUEUE FUNCTIONS *****/ 3105 3106 /* 3107 * il_enqueue_hcmd - enqueue a uCode command 3108 * @il: device ilate data point 3109 * @cmd: a point to the ucode command structure 3110 * 3111 * The function returns < 0 values to indicate the operation is 3112 * failed. On success, it turns the idx (> 0) of command in the 3113 * command queue. 3114 */ 3115 int 3116 il_enqueue_hcmd(struct il_priv *il, struct il_host_cmd *cmd) 3117 { 3118 struct il_tx_queue *txq = &il->txq[il->cmd_queue]; 3119 struct il_queue *q = &txq->q; 3120 struct il_device_cmd *out_cmd; 3121 struct il_cmd_meta *out_meta; 3122 dma_addr_t phys_addr; 3123 unsigned long flags; 3124 u32 idx; 3125 u16 fix_size; 3126 3127 cmd->len = il->ops->get_hcmd_size(cmd->id, cmd->len); 3128 fix_size = (u16) (cmd->len + sizeof(out_cmd->hdr)); 3129 3130 /* If any of the command structures end up being larger than 3131 * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then 3132 * we will need to increase the size of the TFD entries 3133 * Also, check to see if command buffer should not exceed the size 3134 * of device_cmd and max_cmd_size. */ 3135 BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) && 3136 !(cmd->flags & CMD_SIZE_HUGE)); 3137 BUG_ON(fix_size > IL_MAX_CMD_SIZE); 3138 3139 if (il_is_rfkill(il) || il_is_ctkill(il)) { 3140 IL_WARN("Not sending command - %s KILL\n", 3141 il_is_rfkill(il) ? "RF" : "CT"); 3142 return -EIO; 3143 } 3144 3145 spin_lock_irqsave(&il->hcmd_lock, flags); 3146 3147 if (il_queue_space(q) < ((cmd->flags & CMD_ASYNC) ? 2 : 1)) { 3148 spin_unlock_irqrestore(&il->hcmd_lock, flags); 3149 3150 IL_ERR("Restarting adapter due to command queue full\n"); 3151 queue_work(il->workqueue, &il->restart); 3152 return -ENOSPC; 3153 } 3154 3155 idx = il_get_cmd_idx(q, q->write_ptr, cmd->flags & CMD_SIZE_HUGE); 3156 out_cmd = txq->cmd[idx]; 3157 out_meta = &txq->meta[idx]; 3158 3159 if (WARN_ON(out_meta->flags & CMD_MAPPED)) { 3160 spin_unlock_irqrestore(&il->hcmd_lock, flags); 3161 return -ENOSPC; 3162 } 3163 3164 memset(out_meta, 0, sizeof(*out_meta)); /* re-initialize to NULL */ 3165 out_meta->flags = cmd->flags | CMD_MAPPED; 3166 if (cmd->flags & CMD_WANT_SKB) 3167 out_meta->source = cmd; 3168 if (cmd->flags & CMD_ASYNC) 3169 out_meta->callback = cmd->callback; 3170 3171 out_cmd->hdr.cmd = cmd->id; 3172 memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len); 3173 3174 /* At this point, the out_cmd now has all of the incoming cmd 3175 * information */ 3176 3177 out_cmd->hdr.flags = 0; 3178 out_cmd->hdr.sequence = 3179 cpu_to_le16(QUEUE_TO_SEQ(il->cmd_queue) | IDX_TO_SEQ(q->write_ptr)); 3180 if (cmd->flags & CMD_SIZE_HUGE) 3181 out_cmd->hdr.sequence |= SEQ_HUGE_FRAME; 3182 3183 #ifdef CONFIG_IWLEGACY_DEBUG 3184 switch (out_cmd->hdr.cmd) { 3185 case C_TX_LINK_QUALITY_CMD: 3186 case C_SENSITIVITY: 3187 D_HC_DUMP("Sending command %s (#%x), seq: 0x%04X, " 3188 "%d bytes at %d[%d]:%d\n", 3189 il_get_cmd_string(out_cmd->hdr.cmd), out_cmd->hdr.cmd, 3190 le16_to_cpu(out_cmd->hdr.sequence), fix_size, 3191 q->write_ptr, idx, il->cmd_queue); 3192 break; 3193 default: 3194 D_HC("Sending command %s (#%x), seq: 0x%04X, " 3195 "%d bytes at %d[%d]:%d\n", 3196 il_get_cmd_string(out_cmd->hdr.cmd), out_cmd->hdr.cmd, 3197 le16_to_cpu(out_cmd->hdr.sequence), fix_size, q->write_ptr, 3198 idx, il->cmd_queue); 3199 } 3200 #endif 3201 3202 phys_addr = 3203 pci_map_single(il->pci_dev, &out_cmd->hdr, fix_size, 3204 PCI_DMA_BIDIRECTIONAL); 3205 if (unlikely(pci_dma_mapping_error(il->pci_dev, phys_addr))) { 3206 idx = -ENOMEM; 3207 goto out; 3208 } 3209 dma_unmap_addr_set(out_meta, mapping, phys_addr); 3210 dma_unmap_len_set(out_meta, len, fix_size); 3211 3212 txq->need_update = 1; 3213 3214 if (il->ops->txq_update_byte_cnt_tbl) 3215 /* Set up entry in queue's byte count circular buffer */ 3216 il->ops->txq_update_byte_cnt_tbl(il, txq, 0); 3217 3218 il->ops->txq_attach_buf_to_tfd(il, txq, phys_addr, fix_size, 1, 3219 U32_PAD(cmd->len)); 3220 3221 /* Increment and update queue's write idx */ 3222 q->write_ptr = il_queue_inc_wrap(q->write_ptr, q->n_bd); 3223 il_txq_update_write_ptr(il, txq); 3224 3225 out: 3226 spin_unlock_irqrestore(&il->hcmd_lock, flags); 3227 return idx; 3228 } 3229 3230 /* 3231 * il_hcmd_queue_reclaim - Reclaim TX command queue entries already Tx'd 3232 * 3233 * When FW advances 'R' idx, all entries between old and new 'R' idx 3234 * need to be reclaimed. As result, some free space forms. If there is 3235 * enough free space (> low mark), wake the stack that feeds us. 3236 */ 3237 static void 3238 il_hcmd_queue_reclaim(struct il_priv *il, int txq_id, int idx, int cmd_idx) 3239 { 3240 struct il_tx_queue *txq = &il->txq[txq_id]; 3241 struct il_queue *q = &txq->q; 3242 int nfreed = 0; 3243 3244 if (idx >= q->n_bd || il_queue_used(q, idx) == 0) { 3245 IL_ERR("Read idx for DMA queue txq id (%d), idx %d, " 3246 "is out of range [0-%d] %d %d.\n", txq_id, idx, q->n_bd, 3247 q->write_ptr, q->read_ptr); 3248 return; 3249 } 3250 3251 for (idx = il_queue_inc_wrap(idx, q->n_bd); q->read_ptr != idx; 3252 q->read_ptr = il_queue_inc_wrap(q->read_ptr, q->n_bd)) { 3253 3254 if (nfreed++ > 0) { 3255 IL_ERR("HCMD skipped: idx (%d) %d %d\n", idx, 3256 q->write_ptr, q->read_ptr); 3257 queue_work(il->workqueue, &il->restart); 3258 } 3259 3260 } 3261 } 3262 3263 /* 3264 * il_tx_cmd_complete - Pull unused buffers off the queue and reclaim them 3265 * @rxb: Rx buffer to reclaim 3266 * 3267 * If an Rx buffer has an async callback associated with it the callback 3268 * will be executed. The attached skb (if present) will only be freed 3269 * if the callback returns 1 3270 */ 3271 void 3272 il_tx_cmd_complete(struct il_priv *il, struct il_rx_buf *rxb) 3273 { 3274 struct il_rx_pkt *pkt = rxb_addr(rxb); 3275 u16 sequence = le16_to_cpu(pkt->hdr.sequence); 3276 int txq_id = SEQ_TO_QUEUE(sequence); 3277 int idx = SEQ_TO_IDX(sequence); 3278 int cmd_idx; 3279 bool huge = !!(pkt->hdr.sequence & SEQ_HUGE_FRAME); 3280 struct il_device_cmd *cmd; 3281 struct il_cmd_meta *meta; 3282 struct il_tx_queue *txq = &il->txq[il->cmd_queue]; 3283 unsigned long flags; 3284 3285 /* If a Tx command is being handled and it isn't in the actual 3286 * command queue then there a command routing bug has been introduced 3287 * in the queue management code. */ 3288 if (WARN 3289 (txq_id != il->cmd_queue, 3290 "wrong command queue %d (should be %d), sequence 0x%X readp=%d writep=%d\n", 3291 txq_id, il->cmd_queue, sequence, il->txq[il->cmd_queue].q.read_ptr, 3292 il->txq[il->cmd_queue].q.write_ptr)) { 3293 il_print_hex_error(il, pkt, 32); 3294 return; 3295 } 3296 3297 cmd_idx = il_get_cmd_idx(&txq->q, idx, huge); 3298 cmd = txq->cmd[cmd_idx]; 3299 meta = &txq->meta[cmd_idx]; 3300 3301 txq->time_stamp = jiffies; 3302 3303 pci_unmap_single(il->pci_dev, dma_unmap_addr(meta, mapping), 3304 dma_unmap_len(meta, len), PCI_DMA_BIDIRECTIONAL); 3305 3306 /* Input error checking is done when commands are added to queue. */ 3307 if (meta->flags & CMD_WANT_SKB) { 3308 meta->source->reply_page = (unsigned long)rxb_addr(rxb); 3309 rxb->page = NULL; 3310 } else if (meta->callback) 3311 meta->callback(il, cmd, pkt); 3312 3313 spin_lock_irqsave(&il->hcmd_lock, flags); 3314 3315 il_hcmd_queue_reclaim(il, txq_id, idx, cmd_idx); 3316 3317 if (!(meta->flags & CMD_ASYNC)) { 3318 clear_bit(S_HCMD_ACTIVE, &il->status); 3319 D_INFO("Clearing HCMD_ACTIVE for command %s\n", 3320 il_get_cmd_string(cmd->hdr.cmd)); 3321 wake_up(&il->wait_command_queue); 3322 } 3323 3324 /* Mark as unmapped */ 3325 meta->flags = 0; 3326 3327 spin_unlock_irqrestore(&il->hcmd_lock, flags); 3328 } 3329 EXPORT_SYMBOL(il_tx_cmd_complete); 3330 3331 MODULE_DESCRIPTION("iwl-legacy: common functions for 3945 and 4965"); 3332 MODULE_VERSION(IWLWIFI_VERSION); 3333 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR); 3334 MODULE_LICENSE("GPL"); 3335 3336 /* 3337 * set bt_coex_active to true, uCode will do kill/defer 3338 * every time the priority line is asserted (BT is sending signals on the 3339 * priority line in the PCIx). 3340 * set bt_coex_active to false, uCode will ignore the BT activity and 3341 * perform the normal operation 3342 * 3343 * User might experience transmit issue on some platform due to WiFi/BT 3344 * co-exist problem. The possible behaviors are: 3345 * Able to scan and finding all the available AP 3346 * Not able to associate with any AP 3347 * On those platforms, WiFi communication can be restored by set 3348 * "bt_coex_active" module parameter to "false" 3349 * 3350 * default: bt_coex_active = true (BT_COEX_ENABLE) 3351 */ 3352 static bool bt_coex_active = true; 3353 module_param(bt_coex_active, bool, 0444); 3354 MODULE_PARM_DESC(bt_coex_active, "enable wifi/bluetooth co-exist"); 3355 3356 u32 il_debug_level; 3357 EXPORT_SYMBOL(il_debug_level); 3358 3359 const u8 il_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF }; 3360 EXPORT_SYMBOL(il_bcast_addr); 3361 3362 #define MAX_BIT_RATE_40_MHZ 150 /* Mbps */ 3363 #define MAX_BIT_RATE_20_MHZ 72 /* Mbps */ 3364 static void 3365 il_init_ht_hw_capab(const struct il_priv *il, 3366 struct ieee80211_sta_ht_cap *ht_info, 3367 enum nl80211_band band) 3368 { 3369 u16 max_bit_rate = 0; 3370 u8 rx_chains_num = il->hw_params.rx_chains_num; 3371 u8 tx_chains_num = il->hw_params.tx_chains_num; 3372 3373 ht_info->cap = 0; 3374 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs)); 3375 3376 ht_info->ht_supported = true; 3377 3378 ht_info->cap |= IEEE80211_HT_CAP_SGI_20; 3379 max_bit_rate = MAX_BIT_RATE_20_MHZ; 3380 if (il->hw_params.ht40_channel & BIT(band)) { 3381 ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40; 3382 ht_info->cap |= IEEE80211_HT_CAP_SGI_40; 3383 ht_info->mcs.rx_mask[4] = 0x01; 3384 max_bit_rate = MAX_BIT_RATE_40_MHZ; 3385 } 3386 3387 if (il->cfg->mod_params->amsdu_size_8K) 3388 ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU; 3389 3390 ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF; 3391 ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF; 3392 3393 ht_info->mcs.rx_mask[0] = 0xFF; 3394 if (rx_chains_num >= 2) 3395 ht_info->mcs.rx_mask[1] = 0xFF; 3396 if (rx_chains_num >= 3) 3397 ht_info->mcs.rx_mask[2] = 0xFF; 3398 3399 /* Highest supported Rx data rate */ 3400 max_bit_rate *= rx_chains_num; 3401 WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK); 3402 ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate); 3403 3404 /* Tx MCS capabilities */ 3405 ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED; 3406 if (tx_chains_num != rx_chains_num) { 3407 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF; 3408 ht_info->mcs.tx_params |= 3409 ((tx_chains_num - 3410 1) << IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT); 3411 } 3412 } 3413 3414 /* 3415 * il_init_geos - Initialize mac80211's geo/channel info based from eeprom 3416 */ 3417 int 3418 il_init_geos(struct il_priv *il) 3419 { 3420 struct il_channel_info *ch; 3421 struct ieee80211_supported_band *sband; 3422 struct ieee80211_channel *channels; 3423 struct ieee80211_channel *geo_ch; 3424 struct ieee80211_rate *rates; 3425 int i = 0; 3426 s8 max_tx_power = 0; 3427 3428 if (il->bands[NL80211_BAND_2GHZ].n_bitrates || 3429 il->bands[NL80211_BAND_5GHZ].n_bitrates) { 3430 D_INFO("Geography modes already initialized.\n"); 3431 set_bit(S_GEO_CONFIGURED, &il->status); 3432 return 0; 3433 } 3434 3435 channels = 3436 kcalloc(il->channel_count, sizeof(struct ieee80211_channel), 3437 GFP_KERNEL); 3438 if (!channels) 3439 return -ENOMEM; 3440 3441 rates = 3442 kzalloc((sizeof(struct ieee80211_rate) * RATE_COUNT_LEGACY), 3443 GFP_KERNEL); 3444 if (!rates) { 3445 kfree(channels); 3446 return -ENOMEM; 3447 } 3448 3449 /* 5.2GHz channels start after the 2.4GHz channels */ 3450 sband = &il->bands[NL80211_BAND_5GHZ]; 3451 sband->channels = &channels[ARRAY_SIZE(il_eeprom_band_1)]; 3452 /* just OFDM */ 3453 sband->bitrates = &rates[IL_FIRST_OFDM_RATE]; 3454 sband->n_bitrates = RATE_COUNT_LEGACY - IL_FIRST_OFDM_RATE; 3455 3456 if (il->cfg->sku & IL_SKU_N) 3457 il_init_ht_hw_capab(il, &sband->ht_cap, NL80211_BAND_5GHZ); 3458 3459 sband = &il->bands[NL80211_BAND_2GHZ]; 3460 sband->channels = channels; 3461 /* OFDM & CCK */ 3462 sband->bitrates = rates; 3463 sband->n_bitrates = RATE_COUNT_LEGACY; 3464 3465 if (il->cfg->sku & IL_SKU_N) 3466 il_init_ht_hw_capab(il, &sband->ht_cap, NL80211_BAND_2GHZ); 3467 3468 il->ieee_channels = channels; 3469 il->ieee_rates = rates; 3470 3471 for (i = 0; i < il->channel_count; i++) { 3472 ch = &il->channel_info[i]; 3473 3474 if (!il_is_channel_valid(ch)) 3475 continue; 3476 3477 sband = &il->bands[ch->band]; 3478 3479 geo_ch = &sband->channels[sband->n_channels++]; 3480 3481 geo_ch->center_freq = 3482 ieee80211_channel_to_frequency(ch->channel, ch->band); 3483 geo_ch->max_power = ch->max_power_avg; 3484 geo_ch->max_antenna_gain = 0xff; 3485 geo_ch->hw_value = ch->channel; 3486 3487 if (il_is_channel_valid(ch)) { 3488 if (!(ch->flags & EEPROM_CHANNEL_IBSS)) 3489 geo_ch->flags |= IEEE80211_CHAN_NO_IR; 3490 3491 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE)) 3492 geo_ch->flags |= IEEE80211_CHAN_NO_IR; 3493 3494 if (ch->flags & EEPROM_CHANNEL_RADAR) 3495 geo_ch->flags |= IEEE80211_CHAN_RADAR; 3496 3497 geo_ch->flags |= ch->ht40_extension_channel; 3498 3499 if (ch->max_power_avg > max_tx_power) 3500 max_tx_power = ch->max_power_avg; 3501 } else { 3502 geo_ch->flags |= IEEE80211_CHAN_DISABLED; 3503 } 3504 3505 D_INFO("Channel %d Freq=%d[%sGHz] %s flag=0x%X\n", ch->channel, 3506 geo_ch->center_freq, 3507 il_is_channel_a_band(ch) ? "5.2" : "2.4", 3508 geo_ch-> 3509 flags & IEEE80211_CHAN_DISABLED ? "restricted" : "valid", 3510 geo_ch->flags); 3511 } 3512 3513 il->tx_power_device_lmt = max_tx_power; 3514 il->tx_power_user_lmt = max_tx_power; 3515 il->tx_power_next = max_tx_power; 3516 3517 if (il->bands[NL80211_BAND_5GHZ].n_channels == 0 && 3518 (il->cfg->sku & IL_SKU_A)) { 3519 IL_INFO("Incorrectly detected BG card as ABG. " 3520 "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n", 3521 il->pci_dev->device, il->pci_dev->subsystem_device); 3522 il->cfg->sku &= ~IL_SKU_A; 3523 } 3524 3525 IL_INFO("Tunable channels: %d 802.11bg, %d 802.11a channels\n", 3526 il->bands[NL80211_BAND_2GHZ].n_channels, 3527 il->bands[NL80211_BAND_5GHZ].n_channels); 3528 3529 set_bit(S_GEO_CONFIGURED, &il->status); 3530 3531 return 0; 3532 } 3533 EXPORT_SYMBOL(il_init_geos); 3534 3535 /* 3536 * il_free_geos - undo allocations in il_init_geos 3537 */ 3538 void 3539 il_free_geos(struct il_priv *il) 3540 { 3541 kfree(il->ieee_channels); 3542 kfree(il->ieee_rates); 3543 clear_bit(S_GEO_CONFIGURED, &il->status); 3544 } 3545 EXPORT_SYMBOL(il_free_geos); 3546 3547 static bool 3548 il_is_channel_extension(struct il_priv *il, enum nl80211_band band, 3549 u16 channel, u8 extension_chan_offset) 3550 { 3551 const struct il_channel_info *ch_info; 3552 3553 ch_info = il_get_channel_info(il, band, channel); 3554 if (!il_is_channel_valid(ch_info)) 3555 return false; 3556 3557 if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE) 3558 return !(ch_info-> 3559 ht40_extension_channel & IEEE80211_CHAN_NO_HT40PLUS); 3560 else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW) 3561 return !(ch_info-> 3562 ht40_extension_channel & IEEE80211_CHAN_NO_HT40MINUS); 3563 3564 return false; 3565 } 3566 3567 bool 3568 il_is_ht40_tx_allowed(struct il_priv *il, struct ieee80211_sta_ht_cap *ht_cap) 3569 { 3570 if (!il->ht.enabled || !il->ht.is_40mhz) 3571 return false; 3572 3573 /* 3574 * We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40 3575 * the bit will not set if it is pure 40MHz case 3576 */ 3577 if (ht_cap && !ht_cap->ht_supported) 3578 return false; 3579 3580 #ifdef CONFIG_IWLEGACY_DEBUGFS 3581 if (il->disable_ht40) 3582 return false; 3583 #endif 3584 3585 return il_is_channel_extension(il, il->band, 3586 le16_to_cpu(il->staging.channel), 3587 il->ht.extension_chan_offset); 3588 } 3589 EXPORT_SYMBOL(il_is_ht40_tx_allowed); 3590 3591 static u16 noinline 3592 il_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val) 3593 { 3594 u16 new_val; 3595 u16 beacon_factor; 3596 3597 /* 3598 * If mac80211 hasn't given us a beacon interval, program 3599 * the default into the device. 3600 */ 3601 if (!beacon_val) 3602 return DEFAULT_BEACON_INTERVAL; 3603 3604 /* 3605 * If the beacon interval we obtained from the peer 3606 * is too large, we'll have to wake up more often 3607 * (and in IBSS case, we'll beacon too much) 3608 * 3609 * For example, if max_beacon_val is 4096, and the 3610 * requested beacon interval is 7000, we'll have to 3611 * use 3500 to be able to wake up on the beacons. 3612 * 3613 * This could badly influence beacon detection stats. 3614 */ 3615 3616 beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val; 3617 new_val = beacon_val / beacon_factor; 3618 3619 if (!new_val) 3620 new_val = max_beacon_val; 3621 3622 return new_val; 3623 } 3624 3625 int 3626 il_send_rxon_timing(struct il_priv *il) 3627 { 3628 u64 tsf; 3629 s32 interval_tm, rem; 3630 struct ieee80211_conf *conf = NULL; 3631 u16 beacon_int; 3632 struct ieee80211_vif *vif = il->vif; 3633 3634 conf = &il->hw->conf; 3635 3636 lockdep_assert_held(&il->mutex); 3637 3638 memset(&il->timing, 0, sizeof(struct il_rxon_time_cmd)); 3639 3640 il->timing.timestamp = cpu_to_le64(il->timestamp); 3641 il->timing.listen_interval = cpu_to_le16(conf->listen_interval); 3642 3643 beacon_int = vif ? vif->bss_conf.beacon_int : 0; 3644 3645 /* 3646 * TODO: For IBSS we need to get atim_win from mac80211, 3647 * for now just always use 0 3648 */ 3649 il->timing.atim_win = 0; 3650 3651 beacon_int = 3652 il_adjust_beacon_interval(beacon_int, 3653 il->hw_params.max_beacon_itrvl * 3654 TIME_UNIT); 3655 il->timing.beacon_interval = cpu_to_le16(beacon_int); 3656 3657 tsf = il->timestamp; /* tsf is modifed by do_div: copy it */ 3658 interval_tm = beacon_int * TIME_UNIT; 3659 rem = do_div(tsf, interval_tm); 3660 il->timing.beacon_init_val = cpu_to_le32(interval_tm - rem); 3661 3662 il->timing.dtim_period = vif ? (vif->bss_conf.dtim_period ? : 1) : 1; 3663 3664 D_ASSOC("beacon interval %d beacon timer %d beacon tim %d\n", 3665 le16_to_cpu(il->timing.beacon_interval), 3666 le32_to_cpu(il->timing.beacon_init_val), 3667 le16_to_cpu(il->timing.atim_win)); 3668 3669 return il_send_cmd_pdu(il, C_RXON_TIMING, sizeof(il->timing), 3670 &il->timing); 3671 } 3672 EXPORT_SYMBOL(il_send_rxon_timing); 3673 3674 void 3675 il_set_rxon_hwcrypto(struct il_priv *il, int hw_decrypt) 3676 { 3677 struct il_rxon_cmd *rxon = &il->staging; 3678 3679 if (hw_decrypt) 3680 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK; 3681 else 3682 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK; 3683 3684 } 3685 EXPORT_SYMBOL(il_set_rxon_hwcrypto); 3686 3687 /* validate RXON structure is valid */ 3688 int 3689 il_check_rxon_cmd(struct il_priv *il) 3690 { 3691 struct il_rxon_cmd *rxon = &il->staging; 3692 bool error = false; 3693 3694 if (rxon->flags & RXON_FLG_BAND_24G_MSK) { 3695 if (rxon->flags & RXON_FLG_TGJ_NARROW_BAND_MSK) { 3696 IL_WARN("check 2.4G: wrong narrow\n"); 3697 error = true; 3698 } 3699 if (rxon->flags & RXON_FLG_RADAR_DETECT_MSK) { 3700 IL_WARN("check 2.4G: wrong radar\n"); 3701 error = true; 3702 } 3703 } else { 3704 if (!(rxon->flags & RXON_FLG_SHORT_SLOT_MSK)) { 3705 IL_WARN("check 5.2G: not short slot!\n"); 3706 error = true; 3707 } 3708 if (rxon->flags & RXON_FLG_CCK_MSK) { 3709 IL_WARN("check 5.2G: CCK!\n"); 3710 error = true; 3711 } 3712 } 3713 if ((rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1) { 3714 IL_WARN("mac/bssid mcast!\n"); 3715 error = true; 3716 } 3717 3718 /* make sure basic rates 6Mbps and 1Mbps are supported */ 3719 if ((rxon->ofdm_basic_rates & RATE_6M_MASK) == 0 && 3720 (rxon->cck_basic_rates & RATE_1M_MASK) == 0) { 3721 IL_WARN("neither 1 nor 6 are basic\n"); 3722 error = true; 3723 } 3724 3725 if (le16_to_cpu(rxon->assoc_id) > 2007) { 3726 IL_WARN("aid > 2007\n"); 3727 error = true; 3728 } 3729 3730 if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)) == 3731 (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)) { 3732 IL_WARN("CCK and short slot\n"); 3733 error = true; 3734 } 3735 3736 if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)) == 3737 (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)) { 3738 IL_WARN("CCK and auto detect"); 3739 error = true; 3740 } 3741 3742 if ((rxon-> 3743 flags & (RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK)) == 3744 RXON_FLG_TGG_PROTECT_MSK) { 3745 IL_WARN("TGg but no auto-detect\n"); 3746 error = true; 3747 } 3748 3749 if (error) 3750 IL_WARN("Tuning to channel %d\n", le16_to_cpu(rxon->channel)); 3751 3752 if (error) { 3753 IL_ERR("Invalid RXON\n"); 3754 return -EINVAL; 3755 } 3756 return 0; 3757 } 3758 EXPORT_SYMBOL(il_check_rxon_cmd); 3759 3760 /* 3761 * il_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed 3762 * @il: staging_rxon is compared to active_rxon 3763 * 3764 * If the RXON structure is changing enough to require a new tune, 3765 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that 3766 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required. 3767 */ 3768 int 3769 il_full_rxon_required(struct il_priv *il) 3770 { 3771 const struct il_rxon_cmd *staging = &il->staging; 3772 const struct il_rxon_cmd *active = &il->active; 3773 3774 #define CHK(cond) \ 3775 if ((cond)) { \ 3776 D_INFO("need full RXON - " #cond "\n"); \ 3777 return 1; \ 3778 } 3779 3780 #define CHK_NEQ(c1, c2) \ 3781 if ((c1) != (c2)) { \ 3782 D_INFO("need full RXON - " \ 3783 #c1 " != " #c2 " - %d != %d\n", \ 3784 (c1), (c2)); \ 3785 return 1; \ 3786 } 3787 3788 /* These items are only settable from the full RXON command */ 3789 CHK(!il_is_associated(il)); 3790 CHK(!ether_addr_equal_64bits(staging->bssid_addr, active->bssid_addr)); 3791 CHK(!ether_addr_equal_64bits(staging->node_addr, active->node_addr)); 3792 CHK(!ether_addr_equal_64bits(staging->wlap_bssid_addr, 3793 active->wlap_bssid_addr)); 3794 CHK_NEQ(staging->dev_type, active->dev_type); 3795 CHK_NEQ(staging->channel, active->channel); 3796 CHK_NEQ(staging->air_propagation, active->air_propagation); 3797 CHK_NEQ(staging->ofdm_ht_single_stream_basic_rates, 3798 active->ofdm_ht_single_stream_basic_rates); 3799 CHK_NEQ(staging->ofdm_ht_dual_stream_basic_rates, 3800 active->ofdm_ht_dual_stream_basic_rates); 3801 CHK_NEQ(staging->assoc_id, active->assoc_id); 3802 3803 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can 3804 * be updated with the RXON_ASSOC command -- however only some 3805 * flag transitions are allowed using RXON_ASSOC */ 3806 3807 /* Check if we are not switching bands */ 3808 CHK_NEQ(staging->flags & RXON_FLG_BAND_24G_MSK, 3809 active->flags & RXON_FLG_BAND_24G_MSK); 3810 3811 /* Check if we are switching association toggle */ 3812 CHK_NEQ(staging->filter_flags & RXON_FILTER_ASSOC_MSK, 3813 active->filter_flags & RXON_FILTER_ASSOC_MSK); 3814 3815 #undef CHK 3816 #undef CHK_NEQ 3817 3818 return 0; 3819 } 3820 EXPORT_SYMBOL(il_full_rxon_required); 3821 3822 u8 3823 il_get_lowest_plcp(struct il_priv *il) 3824 { 3825 /* 3826 * Assign the lowest rate -- should really get this from 3827 * the beacon skb from mac80211. 3828 */ 3829 if (il->staging.flags & RXON_FLG_BAND_24G_MSK) 3830 return RATE_1M_PLCP; 3831 else 3832 return RATE_6M_PLCP; 3833 } 3834 EXPORT_SYMBOL(il_get_lowest_plcp); 3835 3836 static void 3837 _il_set_rxon_ht(struct il_priv *il, struct il_ht_config *ht_conf) 3838 { 3839 struct il_rxon_cmd *rxon = &il->staging; 3840 3841 if (!il->ht.enabled) { 3842 rxon->flags &= 3843 ~(RXON_FLG_CHANNEL_MODE_MSK | 3844 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK | RXON_FLG_HT40_PROT_MSK 3845 | RXON_FLG_HT_PROT_MSK); 3846 return; 3847 } 3848 3849 rxon->flags |= 3850 cpu_to_le32(il->ht.protection << RXON_FLG_HT_OPERATING_MODE_POS); 3851 3852 /* Set up channel bandwidth: 3853 * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */ 3854 /* clear the HT channel mode before set the mode */ 3855 rxon->flags &= 3856 ~(RXON_FLG_CHANNEL_MODE_MSK | RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK); 3857 if (il_is_ht40_tx_allowed(il, NULL)) { 3858 /* pure ht40 */ 3859 if (il->ht.protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) { 3860 rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40; 3861 /* Note: control channel is opposite of extension channel */ 3862 switch (il->ht.extension_chan_offset) { 3863 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE: 3864 rxon->flags &= 3865 ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK; 3866 break; 3867 case IEEE80211_HT_PARAM_CHA_SEC_BELOW: 3868 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK; 3869 break; 3870 } 3871 } else { 3872 /* Note: control channel is opposite of extension channel */ 3873 switch (il->ht.extension_chan_offset) { 3874 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE: 3875 rxon->flags &= 3876 ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK); 3877 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED; 3878 break; 3879 case IEEE80211_HT_PARAM_CHA_SEC_BELOW: 3880 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK; 3881 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED; 3882 break; 3883 case IEEE80211_HT_PARAM_CHA_SEC_NONE: 3884 default: 3885 /* channel location only valid if in Mixed mode */ 3886 IL_ERR("invalid extension channel offset\n"); 3887 break; 3888 } 3889 } 3890 } else { 3891 rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY; 3892 } 3893 3894 if (il->ops->set_rxon_chain) 3895 il->ops->set_rxon_chain(il); 3896 3897 D_ASSOC("rxon flags 0x%X operation mode :0x%X " 3898 "extension channel offset 0x%x\n", le32_to_cpu(rxon->flags), 3899 il->ht.protection, il->ht.extension_chan_offset); 3900 } 3901 3902 void 3903 il_set_rxon_ht(struct il_priv *il, struct il_ht_config *ht_conf) 3904 { 3905 _il_set_rxon_ht(il, ht_conf); 3906 } 3907 EXPORT_SYMBOL(il_set_rxon_ht); 3908 3909 /* Return valid, unused, channel for a passive scan to reset the RF */ 3910 u8 3911 il_get_single_channel_number(struct il_priv *il, enum nl80211_band band) 3912 { 3913 const struct il_channel_info *ch_info; 3914 int i; 3915 u8 channel = 0; 3916 u8 min, max; 3917 3918 if (band == NL80211_BAND_5GHZ) { 3919 min = 14; 3920 max = il->channel_count; 3921 } else { 3922 min = 0; 3923 max = 14; 3924 } 3925 3926 for (i = min; i < max; i++) { 3927 channel = il->channel_info[i].channel; 3928 if (channel == le16_to_cpu(il->staging.channel)) 3929 continue; 3930 3931 ch_info = il_get_channel_info(il, band, channel); 3932 if (il_is_channel_valid(ch_info)) 3933 break; 3934 } 3935 3936 return channel; 3937 } 3938 EXPORT_SYMBOL(il_get_single_channel_number); 3939 3940 /* 3941 * il_set_rxon_channel - Set the band and channel values in staging RXON 3942 * @ch: requested channel as a pointer to struct ieee80211_channel 3943 3944 * NOTE: Does not commit to the hardware; it sets appropriate bit fields 3945 * in the staging RXON flag structure based on the ch->band 3946 */ 3947 int 3948 il_set_rxon_channel(struct il_priv *il, struct ieee80211_channel *ch) 3949 { 3950 enum nl80211_band band = ch->band; 3951 u16 channel = ch->hw_value; 3952 3953 if (le16_to_cpu(il->staging.channel) == channel && il->band == band) 3954 return 0; 3955 3956 il->staging.channel = cpu_to_le16(channel); 3957 if (band == NL80211_BAND_5GHZ) 3958 il->staging.flags &= ~RXON_FLG_BAND_24G_MSK; 3959 else 3960 il->staging.flags |= RXON_FLG_BAND_24G_MSK; 3961 3962 il->band = band; 3963 3964 D_INFO("Staging channel set to %d [%d]\n", channel, band); 3965 3966 return 0; 3967 } 3968 EXPORT_SYMBOL(il_set_rxon_channel); 3969 3970 void 3971 il_set_flags_for_band(struct il_priv *il, enum nl80211_band band, 3972 struct ieee80211_vif *vif) 3973 { 3974 if (band == NL80211_BAND_5GHZ) { 3975 il->staging.flags &= 3976 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK | 3977 RXON_FLG_CCK_MSK); 3978 il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK; 3979 } else { 3980 /* Copied from il_post_associate() */ 3981 if (vif && vif->bss_conf.use_short_slot) 3982 il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK; 3983 else 3984 il->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK; 3985 3986 il->staging.flags |= RXON_FLG_BAND_24G_MSK; 3987 il->staging.flags |= RXON_FLG_AUTO_DETECT_MSK; 3988 il->staging.flags &= ~RXON_FLG_CCK_MSK; 3989 } 3990 } 3991 EXPORT_SYMBOL(il_set_flags_for_band); 3992 3993 /* 3994 * initialize rxon structure with default values from eeprom 3995 */ 3996 void 3997 il_connection_init_rx_config(struct il_priv *il) 3998 { 3999 const struct il_channel_info *ch_info; 4000 4001 memset(&il->staging, 0, sizeof(il->staging)); 4002 4003 switch (il->iw_mode) { 4004 case NL80211_IFTYPE_UNSPECIFIED: 4005 il->staging.dev_type = RXON_DEV_TYPE_ESS; 4006 break; 4007 case NL80211_IFTYPE_STATION: 4008 il->staging.dev_type = RXON_DEV_TYPE_ESS; 4009 il->staging.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK; 4010 break; 4011 case NL80211_IFTYPE_ADHOC: 4012 il->staging.dev_type = RXON_DEV_TYPE_IBSS; 4013 il->staging.flags = RXON_FLG_SHORT_PREAMBLE_MSK; 4014 il->staging.filter_flags = 4015 RXON_FILTER_BCON_AWARE_MSK | RXON_FILTER_ACCEPT_GRP_MSK; 4016 break; 4017 default: 4018 IL_ERR("Unsupported interface type %d\n", il->vif->type); 4019 return; 4020 } 4021 4022 #if 0 4023 /* TODO: Figure out when short_preamble would be set and cache from 4024 * that */ 4025 if (!hw_to_local(il->hw)->short_preamble) 4026 il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; 4027 else 4028 il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; 4029 #endif 4030 4031 ch_info = 4032 il_get_channel_info(il, il->band, le16_to_cpu(il->active.channel)); 4033 4034 if (!ch_info) 4035 ch_info = &il->channel_info[0]; 4036 4037 il->staging.channel = cpu_to_le16(ch_info->channel); 4038 il->band = ch_info->band; 4039 4040 il_set_flags_for_band(il, il->band, il->vif); 4041 4042 il->staging.ofdm_basic_rates = 4043 (IL_OFDM_RATES_MASK >> IL_FIRST_OFDM_RATE) & 0xFF; 4044 il->staging.cck_basic_rates = 4045 (IL_CCK_RATES_MASK >> IL_FIRST_CCK_RATE) & 0xF; 4046 4047 /* clear both MIX and PURE40 mode flag */ 4048 il->staging.flags &= 4049 ~(RXON_FLG_CHANNEL_MODE_MIXED | RXON_FLG_CHANNEL_MODE_PURE_40); 4050 if (il->vif) 4051 memcpy(il->staging.node_addr, il->vif->addr, ETH_ALEN); 4052 4053 il->staging.ofdm_ht_single_stream_basic_rates = 0xff; 4054 il->staging.ofdm_ht_dual_stream_basic_rates = 0xff; 4055 } 4056 EXPORT_SYMBOL(il_connection_init_rx_config); 4057 4058 void 4059 il_set_rate(struct il_priv *il) 4060 { 4061 const struct ieee80211_supported_band *hw = NULL; 4062 struct ieee80211_rate *rate; 4063 int i; 4064 4065 hw = il_get_hw_mode(il, il->band); 4066 if (!hw) { 4067 IL_ERR("Failed to set rate: unable to get hw mode\n"); 4068 return; 4069 } 4070 4071 il->active_rate = 0; 4072 4073 for (i = 0; i < hw->n_bitrates; i++) { 4074 rate = &(hw->bitrates[i]); 4075 if (rate->hw_value < RATE_COUNT_LEGACY) 4076 il->active_rate |= (1 << rate->hw_value); 4077 } 4078 4079 D_RATE("Set active_rate = %0x\n", il->active_rate); 4080 4081 il->staging.cck_basic_rates = 4082 (IL_CCK_BASIC_RATES_MASK >> IL_FIRST_CCK_RATE) & 0xF; 4083 4084 il->staging.ofdm_basic_rates = 4085 (IL_OFDM_BASIC_RATES_MASK >> IL_FIRST_OFDM_RATE) & 0xFF; 4086 } 4087 EXPORT_SYMBOL(il_set_rate); 4088 4089 void 4090 il_chswitch_done(struct il_priv *il, bool is_success) 4091 { 4092 if (test_bit(S_EXIT_PENDING, &il->status)) 4093 return; 4094 4095 if (test_and_clear_bit(S_CHANNEL_SWITCH_PENDING, &il->status)) 4096 ieee80211_chswitch_done(il->vif, is_success); 4097 } 4098 EXPORT_SYMBOL(il_chswitch_done); 4099 4100 void 4101 il_hdl_csa(struct il_priv *il, struct il_rx_buf *rxb) 4102 { 4103 struct il_rx_pkt *pkt = rxb_addr(rxb); 4104 struct il_csa_notification *csa = &(pkt->u.csa_notif); 4105 struct il_rxon_cmd *rxon = (void *)&il->active; 4106 4107 if (!test_bit(S_CHANNEL_SWITCH_PENDING, &il->status)) 4108 return; 4109 4110 if (!le32_to_cpu(csa->status) && csa->channel == il->switch_channel) { 4111 rxon->channel = csa->channel; 4112 il->staging.channel = csa->channel; 4113 D_11H("CSA notif: channel %d\n", le16_to_cpu(csa->channel)); 4114 il_chswitch_done(il, true); 4115 } else { 4116 IL_ERR("CSA notif (fail) : channel %d\n", 4117 le16_to_cpu(csa->channel)); 4118 il_chswitch_done(il, false); 4119 } 4120 } 4121 EXPORT_SYMBOL(il_hdl_csa); 4122 4123 #ifdef CONFIG_IWLEGACY_DEBUG 4124 void 4125 il_print_rx_config_cmd(struct il_priv *il) 4126 { 4127 struct il_rxon_cmd *rxon = &il->staging; 4128 4129 D_RADIO("RX CONFIG:\n"); 4130 il_print_hex_dump(il, IL_DL_RADIO, (u8 *) rxon, sizeof(*rxon)); 4131 D_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel)); 4132 D_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags)); 4133 D_RADIO("u32 filter_flags: 0x%08x\n", le32_to_cpu(rxon->filter_flags)); 4134 D_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type); 4135 D_RADIO("u8 ofdm_basic_rates: 0x%02x\n", rxon->ofdm_basic_rates); 4136 D_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates); 4137 D_RADIO("u8[6] node_addr: %pM\n", rxon->node_addr); 4138 D_RADIO("u8[6] bssid_addr: %pM\n", rxon->bssid_addr); 4139 D_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id)); 4140 } 4141 EXPORT_SYMBOL(il_print_rx_config_cmd); 4142 #endif 4143 /* 4144 * il_irq_handle_error - called for HW or SW error interrupt from card 4145 */ 4146 void 4147 il_irq_handle_error(struct il_priv *il) 4148 { 4149 /* Set the FW error flag -- cleared on il_down */ 4150 set_bit(S_FW_ERROR, &il->status); 4151 4152 /* Cancel currently queued command. */ 4153 clear_bit(S_HCMD_ACTIVE, &il->status); 4154 4155 IL_ERR("Loaded firmware version: %s\n", il->hw->wiphy->fw_version); 4156 4157 il->ops->dump_nic_error_log(il); 4158 if (il->ops->dump_fh) 4159 il->ops->dump_fh(il, NULL, false); 4160 #ifdef CONFIG_IWLEGACY_DEBUG 4161 if (il_get_debug_level(il) & IL_DL_FW_ERRORS) 4162 il_print_rx_config_cmd(il); 4163 #endif 4164 4165 wake_up(&il->wait_command_queue); 4166 4167 /* Keep the restart process from trying to send host 4168 * commands by clearing the INIT status bit */ 4169 clear_bit(S_READY, &il->status); 4170 4171 if (!test_bit(S_EXIT_PENDING, &il->status)) { 4172 IL_DBG(IL_DL_FW_ERRORS, 4173 "Restarting adapter due to uCode error.\n"); 4174 4175 if (il->cfg->mod_params->restart_fw) 4176 queue_work(il->workqueue, &il->restart); 4177 } 4178 } 4179 EXPORT_SYMBOL(il_irq_handle_error); 4180 4181 static int 4182 _il_apm_stop_master(struct il_priv *il) 4183 { 4184 int ret = 0; 4185 4186 /* stop device's busmaster DMA activity */ 4187 _il_set_bit(il, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER); 4188 4189 ret = 4190 _il_poll_bit(il, CSR_RESET, CSR_RESET_REG_FLAG_MASTER_DISABLED, 4191 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100); 4192 if (ret < 0) 4193 IL_WARN("Master Disable Timed Out, 100 usec\n"); 4194 4195 D_INFO("stop master\n"); 4196 4197 return ret; 4198 } 4199 4200 void 4201 _il_apm_stop(struct il_priv *il) 4202 { 4203 lockdep_assert_held(&il->reg_lock); 4204 4205 D_INFO("Stop card, put in low power state\n"); 4206 4207 /* Stop device's DMA activity */ 4208 _il_apm_stop_master(il); 4209 4210 /* Reset the entire device */ 4211 _il_set_bit(il, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET); 4212 4213 udelay(10); 4214 4215 /* 4216 * Clear "initialization complete" bit to move adapter from 4217 * D0A* (powered-up Active) --> D0U* (Uninitialized) state. 4218 */ 4219 _il_clear_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE); 4220 } 4221 EXPORT_SYMBOL(_il_apm_stop); 4222 4223 void 4224 il_apm_stop(struct il_priv *il) 4225 { 4226 unsigned long flags; 4227 4228 spin_lock_irqsave(&il->reg_lock, flags); 4229 _il_apm_stop(il); 4230 spin_unlock_irqrestore(&il->reg_lock, flags); 4231 } 4232 EXPORT_SYMBOL(il_apm_stop); 4233 4234 /* 4235 * Start up NIC's basic functionality after it has been reset 4236 * (e.g. after platform boot, or shutdown via il_apm_stop()) 4237 * NOTE: This does not load uCode nor start the embedded processor 4238 */ 4239 int 4240 il_apm_init(struct il_priv *il) 4241 { 4242 int ret = 0; 4243 u16 lctl; 4244 4245 D_INFO("Init card's basic functions\n"); 4246 4247 /* 4248 * Use "set_bit" below rather than "write", to preserve any hardware 4249 * bits already set by default after reset. 4250 */ 4251 4252 /* Disable L0S exit timer (platform NMI Work/Around) */ 4253 il_set_bit(il, CSR_GIO_CHICKEN_BITS, 4254 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER); 4255 4256 /* 4257 * Disable L0s without affecting L1; 4258 * don't wait for ICH L0s (ICH bug W/A) 4259 */ 4260 il_set_bit(il, CSR_GIO_CHICKEN_BITS, 4261 CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX); 4262 4263 /* Set FH wait threshold to maximum (HW error during stress W/A) */ 4264 il_set_bit(il, CSR_DBG_HPET_MEM_REG, CSR_DBG_HPET_MEM_REG_VAL); 4265 4266 /* 4267 * Enable HAP INTA (interrupt from management bus) to 4268 * wake device's PCI Express link L1a -> L0s 4269 * NOTE: This is no-op for 3945 (non-existent bit) 4270 */ 4271 il_set_bit(il, CSR_HW_IF_CONFIG_REG, 4272 CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A); 4273 4274 /* 4275 * HW bug W/A for instability in PCIe bus L0->L0S->L1 transition. 4276 * Check if BIOS (or OS) enabled L1-ASPM on this device. 4277 * If so (likely), disable L0S, so device moves directly L0->L1; 4278 * costs negligible amount of power savings. 4279 * If not (unlikely), enable L0S, so there is at least some 4280 * power savings, even without L1. 4281 */ 4282 if (il->cfg->set_l0s) { 4283 ret = pcie_capability_read_word(il->pci_dev, PCI_EXP_LNKCTL, &lctl); 4284 if (!ret && (lctl & PCI_EXP_LNKCTL_ASPM_L1)) { 4285 /* L1-ASPM enabled; disable(!) L0S */ 4286 il_set_bit(il, CSR_GIO_REG, 4287 CSR_GIO_REG_VAL_L0S_ENABLED); 4288 D_POWER("L1 Enabled; Disabling L0S\n"); 4289 } else { 4290 /* L1-ASPM disabled; enable(!) L0S */ 4291 il_clear_bit(il, CSR_GIO_REG, 4292 CSR_GIO_REG_VAL_L0S_ENABLED); 4293 D_POWER("L1 Disabled; Enabling L0S\n"); 4294 } 4295 } 4296 4297 /* Configure analog phase-lock-loop before activating to D0A */ 4298 if (il->cfg->pll_cfg_val) 4299 il_set_bit(il, CSR_ANA_PLL_CFG, 4300 il->cfg->pll_cfg_val); 4301 4302 /* 4303 * Set "initialization complete" bit to move adapter from 4304 * D0U* --> D0A* (powered-up active) state. 4305 */ 4306 il_set_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE); 4307 4308 /* 4309 * Wait for clock stabilization; once stabilized, access to 4310 * device-internal resources is supported, e.g. il_wr_prph() 4311 * and accesses to uCode SRAM. 4312 */ 4313 ret = 4314 _il_poll_bit(il, CSR_GP_CNTRL, 4315 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 4316 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000); 4317 if (ret < 0) { 4318 D_INFO("Failed to init the card\n"); 4319 goto out; 4320 } 4321 4322 /* 4323 * Enable DMA and BSM (if used) clocks, wait for them to stabilize. 4324 * BSM (Boostrap State Machine) is only in 3945 and 4965. 4325 * 4326 * Write to "CLK_EN_REG"; "1" bits enable clocks, while "0" bits 4327 * do not disable clocks. This preserves any hardware bits already 4328 * set by default in "CLK_CTRL_REG" after reset. 4329 */ 4330 if (il->cfg->use_bsm) 4331 il_wr_prph(il, APMG_CLK_EN_REG, 4332 APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT); 4333 else 4334 il_wr_prph(il, APMG_CLK_EN_REG, APMG_CLK_VAL_DMA_CLK_RQT); 4335 udelay(20); 4336 4337 /* Disable L1-Active */ 4338 il_set_bits_prph(il, APMG_PCIDEV_STT_REG, 4339 APMG_PCIDEV_STT_VAL_L1_ACT_DIS); 4340 4341 out: 4342 return ret; 4343 } 4344 EXPORT_SYMBOL(il_apm_init); 4345 4346 int 4347 il_set_tx_power(struct il_priv *il, s8 tx_power, bool force) 4348 { 4349 int ret; 4350 s8 prev_tx_power; 4351 bool defer; 4352 4353 lockdep_assert_held(&il->mutex); 4354 4355 if (il->tx_power_user_lmt == tx_power && !force) 4356 return 0; 4357 4358 if (!il->ops->send_tx_power) 4359 return -EOPNOTSUPP; 4360 4361 /* 0 dBm mean 1 milliwatt */ 4362 if (tx_power < 0) { 4363 IL_WARN("Requested user TXPOWER %d below 1 mW.\n", tx_power); 4364 return -EINVAL; 4365 } 4366 4367 if (tx_power > il->tx_power_device_lmt) { 4368 IL_WARN("Requested user TXPOWER %d above upper limit %d.\n", 4369 tx_power, il->tx_power_device_lmt); 4370 return -EINVAL; 4371 } 4372 4373 if (!il_is_ready_rf(il)) 4374 return -EIO; 4375 4376 /* scan complete and commit_rxon use tx_power_next value, 4377 * it always need to be updated for newest request */ 4378 il->tx_power_next = tx_power; 4379 4380 /* do not set tx power when scanning or channel changing */ 4381 defer = test_bit(S_SCANNING, &il->status) || 4382 memcmp(&il->active, &il->staging, sizeof(il->staging)); 4383 if (defer && !force) { 4384 D_INFO("Deferring tx power set\n"); 4385 return 0; 4386 } 4387 4388 prev_tx_power = il->tx_power_user_lmt; 4389 il->tx_power_user_lmt = tx_power; 4390 4391 ret = il->ops->send_tx_power(il); 4392 4393 /* if fail to set tx_power, restore the orig. tx power */ 4394 if (ret) { 4395 il->tx_power_user_lmt = prev_tx_power; 4396 il->tx_power_next = prev_tx_power; 4397 } 4398 return ret; 4399 } 4400 EXPORT_SYMBOL(il_set_tx_power); 4401 4402 void 4403 il_send_bt_config(struct il_priv *il) 4404 { 4405 struct il_bt_cmd bt_cmd = { 4406 .lead_time = BT_LEAD_TIME_DEF, 4407 .max_kill = BT_MAX_KILL_DEF, 4408 .kill_ack_mask = 0, 4409 .kill_cts_mask = 0, 4410 }; 4411 4412 if (!bt_coex_active) 4413 bt_cmd.flags = BT_COEX_DISABLE; 4414 else 4415 bt_cmd.flags = BT_COEX_ENABLE; 4416 4417 D_INFO("BT coex %s\n", 4418 (bt_cmd.flags == BT_COEX_DISABLE) ? "disable" : "active"); 4419 4420 if (il_send_cmd_pdu(il, C_BT_CONFIG, sizeof(struct il_bt_cmd), &bt_cmd)) 4421 IL_ERR("failed to send BT Coex Config\n"); 4422 } 4423 EXPORT_SYMBOL(il_send_bt_config); 4424 4425 int 4426 il_send_stats_request(struct il_priv *il, u8 flags, bool clear) 4427 { 4428 struct il_stats_cmd stats_cmd = { 4429 .configuration_flags = clear ? IL_STATS_CONF_CLEAR_STATS : 0, 4430 }; 4431 4432 if (flags & CMD_ASYNC) 4433 return il_send_cmd_pdu_async(il, C_STATS, sizeof(struct il_stats_cmd), 4434 &stats_cmd, NULL); 4435 else 4436 return il_send_cmd_pdu(il, C_STATS, sizeof(struct il_stats_cmd), 4437 &stats_cmd); 4438 } 4439 EXPORT_SYMBOL(il_send_stats_request); 4440 4441 void 4442 il_hdl_pm_sleep(struct il_priv *il, struct il_rx_buf *rxb) 4443 { 4444 #ifdef CONFIG_IWLEGACY_DEBUG 4445 struct il_rx_pkt *pkt = rxb_addr(rxb); 4446 struct il_sleep_notification *sleep = &(pkt->u.sleep_notif); 4447 D_RX("sleep mode: %d, src: %d\n", 4448 sleep->pm_sleep_mode, sleep->pm_wakeup_src); 4449 #endif 4450 } 4451 EXPORT_SYMBOL(il_hdl_pm_sleep); 4452 4453 void 4454 il_hdl_pm_debug_stats(struct il_priv *il, struct il_rx_buf *rxb) 4455 { 4456 struct il_rx_pkt *pkt = rxb_addr(rxb); 4457 u32 len = le32_to_cpu(pkt->len_n_flags) & IL_RX_FRAME_SIZE_MSK; 4458 D_RADIO("Dumping %d bytes of unhandled notification for %s:\n", len, 4459 il_get_cmd_string(pkt->hdr.cmd)); 4460 il_print_hex_dump(il, IL_DL_RADIO, pkt->u.raw, len); 4461 } 4462 EXPORT_SYMBOL(il_hdl_pm_debug_stats); 4463 4464 void 4465 il_hdl_error(struct il_priv *il, struct il_rx_buf *rxb) 4466 { 4467 struct il_rx_pkt *pkt = rxb_addr(rxb); 4468 4469 IL_ERR("Error Reply type 0x%08X cmd %s (0x%02X) " 4470 "seq 0x%04X ser 0x%08X\n", 4471 le32_to_cpu(pkt->u.err_resp.error_type), 4472 il_get_cmd_string(pkt->u.err_resp.cmd_id), 4473 pkt->u.err_resp.cmd_id, 4474 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num), 4475 le32_to_cpu(pkt->u.err_resp.error_info)); 4476 } 4477 EXPORT_SYMBOL(il_hdl_error); 4478 4479 void 4480 il_clear_isr_stats(struct il_priv *il) 4481 { 4482 memset(&il->isr_stats, 0, sizeof(il->isr_stats)); 4483 } 4484 4485 int 4486 il_mac_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif, u16 queue, 4487 const struct ieee80211_tx_queue_params *params) 4488 { 4489 struct il_priv *il = hw->priv; 4490 unsigned long flags; 4491 int q; 4492 4493 D_MAC80211("enter\n"); 4494 4495 if (!il_is_ready_rf(il)) { 4496 D_MAC80211("leave - RF not ready\n"); 4497 return -EIO; 4498 } 4499 4500 if (queue >= AC_NUM) { 4501 D_MAC80211("leave - queue >= AC_NUM %d\n", queue); 4502 return 0; 4503 } 4504 4505 q = AC_NUM - 1 - queue; 4506 4507 spin_lock_irqsave(&il->lock, flags); 4508 4509 il->qos_data.def_qos_parm.ac[q].cw_min = 4510 cpu_to_le16(params->cw_min); 4511 il->qos_data.def_qos_parm.ac[q].cw_max = 4512 cpu_to_le16(params->cw_max); 4513 il->qos_data.def_qos_parm.ac[q].aifsn = params->aifs; 4514 il->qos_data.def_qos_parm.ac[q].edca_txop = 4515 cpu_to_le16((params->txop * 32)); 4516 4517 il->qos_data.def_qos_parm.ac[q].reserved1 = 0; 4518 4519 spin_unlock_irqrestore(&il->lock, flags); 4520 4521 D_MAC80211("leave\n"); 4522 return 0; 4523 } 4524 EXPORT_SYMBOL(il_mac_conf_tx); 4525 4526 int 4527 il_mac_tx_last_beacon(struct ieee80211_hw *hw) 4528 { 4529 struct il_priv *il = hw->priv; 4530 int ret; 4531 4532 D_MAC80211("enter\n"); 4533 4534 ret = (il->ibss_manager == IL_IBSS_MANAGER); 4535 4536 D_MAC80211("leave ret %d\n", ret); 4537 return ret; 4538 } 4539 EXPORT_SYMBOL_GPL(il_mac_tx_last_beacon); 4540 4541 static int 4542 il_set_mode(struct il_priv *il) 4543 { 4544 il_connection_init_rx_config(il); 4545 4546 if (il->ops->set_rxon_chain) 4547 il->ops->set_rxon_chain(il); 4548 4549 return il_commit_rxon(il); 4550 } 4551 4552 int 4553 il_mac_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif) 4554 { 4555 struct il_priv *il = hw->priv; 4556 int err; 4557 bool reset; 4558 4559 mutex_lock(&il->mutex); 4560 D_MAC80211("enter: type %d, addr %pM\n", vif->type, vif->addr); 4561 4562 if (!il_is_ready_rf(il)) { 4563 IL_WARN("Try to add interface when device not ready\n"); 4564 err = -EINVAL; 4565 goto out; 4566 } 4567 4568 /* 4569 * We do not support multiple virtual interfaces, but on hardware reset 4570 * we have to add the same interface again. 4571 */ 4572 reset = (il->vif == vif); 4573 if (il->vif && !reset) { 4574 err = -EOPNOTSUPP; 4575 goto out; 4576 } 4577 4578 il->vif = vif; 4579 il->iw_mode = vif->type; 4580 4581 err = il_set_mode(il); 4582 if (err) { 4583 IL_WARN("Fail to set mode %d\n", vif->type); 4584 if (!reset) { 4585 il->vif = NULL; 4586 il->iw_mode = NL80211_IFTYPE_STATION; 4587 } 4588 } 4589 4590 out: 4591 D_MAC80211("leave err %d\n", err); 4592 mutex_unlock(&il->mutex); 4593 4594 return err; 4595 } 4596 EXPORT_SYMBOL(il_mac_add_interface); 4597 4598 static void 4599 il_teardown_interface(struct il_priv *il, struct ieee80211_vif *vif) 4600 { 4601 lockdep_assert_held(&il->mutex); 4602 4603 if (il->scan_vif == vif) { 4604 il_scan_cancel_timeout(il, 200); 4605 il_force_scan_end(il); 4606 } 4607 4608 il_set_mode(il); 4609 } 4610 4611 void 4612 il_mac_remove_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif) 4613 { 4614 struct il_priv *il = hw->priv; 4615 4616 mutex_lock(&il->mutex); 4617 D_MAC80211("enter: type %d, addr %pM\n", vif->type, vif->addr); 4618 4619 WARN_ON(il->vif != vif); 4620 il->vif = NULL; 4621 il->iw_mode = NL80211_IFTYPE_UNSPECIFIED; 4622 il_teardown_interface(il, vif); 4623 eth_zero_addr(il->bssid); 4624 4625 D_MAC80211("leave\n"); 4626 mutex_unlock(&il->mutex); 4627 } 4628 EXPORT_SYMBOL(il_mac_remove_interface); 4629 4630 int 4631 il_alloc_txq_mem(struct il_priv *il) 4632 { 4633 if (!il->txq) 4634 il->txq = 4635 kcalloc(il->cfg->num_of_queues, 4636 sizeof(struct il_tx_queue), 4637 GFP_KERNEL); 4638 if (!il->txq) { 4639 IL_ERR("Not enough memory for txq\n"); 4640 return -ENOMEM; 4641 } 4642 return 0; 4643 } 4644 EXPORT_SYMBOL(il_alloc_txq_mem); 4645 4646 void 4647 il_free_txq_mem(struct il_priv *il) 4648 { 4649 kfree(il->txq); 4650 il->txq = NULL; 4651 } 4652 EXPORT_SYMBOL(il_free_txq_mem); 4653 4654 int 4655 il_force_reset(struct il_priv *il, bool external) 4656 { 4657 struct il_force_reset *force_reset; 4658 4659 if (test_bit(S_EXIT_PENDING, &il->status)) 4660 return -EINVAL; 4661 4662 force_reset = &il->force_reset; 4663 force_reset->reset_request_count++; 4664 if (!external) { 4665 if (force_reset->last_force_reset_jiffies && 4666 time_after(force_reset->last_force_reset_jiffies + 4667 force_reset->reset_duration, jiffies)) { 4668 D_INFO("force reset rejected\n"); 4669 force_reset->reset_reject_count++; 4670 return -EAGAIN; 4671 } 4672 } 4673 force_reset->reset_success_count++; 4674 force_reset->last_force_reset_jiffies = jiffies; 4675 4676 /* 4677 * if the request is from external(ex: debugfs), 4678 * then always perform the request in regardless the module 4679 * parameter setting 4680 * if the request is from internal (uCode error or driver 4681 * detect failure), then fw_restart module parameter 4682 * need to be check before performing firmware reload 4683 */ 4684 4685 if (!external && !il->cfg->mod_params->restart_fw) { 4686 D_INFO("Cancel firmware reload based on " 4687 "module parameter setting\n"); 4688 return 0; 4689 } 4690 4691 IL_ERR("On demand firmware reload\n"); 4692 4693 /* Set the FW error flag -- cleared on il_down */ 4694 set_bit(S_FW_ERROR, &il->status); 4695 wake_up(&il->wait_command_queue); 4696 /* 4697 * Keep the restart process from trying to send host 4698 * commands by clearing the INIT status bit 4699 */ 4700 clear_bit(S_READY, &il->status); 4701 queue_work(il->workqueue, &il->restart); 4702 4703 return 0; 4704 } 4705 EXPORT_SYMBOL(il_force_reset); 4706 4707 int 4708 il_mac_change_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 4709 enum nl80211_iftype newtype, bool newp2p) 4710 { 4711 struct il_priv *il = hw->priv; 4712 int err; 4713 4714 mutex_lock(&il->mutex); 4715 D_MAC80211("enter: type %d, addr %pM newtype %d newp2p %d\n", 4716 vif->type, vif->addr, newtype, newp2p); 4717 4718 if (newp2p) { 4719 err = -EOPNOTSUPP; 4720 goto out; 4721 } 4722 4723 if (!il->vif || !il_is_ready_rf(il)) { 4724 /* 4725 * Huh? But wait ... this can maybe happen when 4726 * we're in the middle of a firmware restart! 4727 */ 4728 err = -EBUSY; 4729 goto out; 4730 } 4731 4732 /* success */ 4733 vif->type = newtype; 4734 vif->p2p = false; 4735 il->iw_mode = newtype; 4736 il_teardown_interface(il, vif); 4737 err = 0; 4738 4739 out: 4740 D_MAC80211("leave err %d\n", err); 4741 mutex_unlock(&il->mutex); 4742 4743 return err; 4744 } 4745 EXPORT_SYMBOL(il_mac_change_interface); 4746 4747 void il_mac_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 4748 u32 queues, bool drop) 4749 { 4750 struct il_priv *il = hw->priv; 4751 unsigned long timeout = jiffies + msecs_to_jiffies(500); 4752 int i; 4753 4754 mutex_lock(&il->mutex); 4755 D_MAC80211("enter\n"); 4756 4757 if (il->txq == NULL) 4758 goto out; 4759 4760 for (i = 0; i < il->hw_params.max_txq_num; i++) { 4761 struct il_queue *q; 4762 4763 if (i == il->cmd_queue) 4764 continue; 4765 4766 q = &il->txq[i].q; 4767 if (q->read_ptr == q->write_ptr) 4768 continue; 4769 4770 if (time_after(jiffies, timeout)) { 4771 IL_ERR("Failed to flush queue %d\n", q->id); 4772 break; 4773 } 4774 4775 msleep(20); 4776 } 4777 out: 4778 D_MAC80211("leave\n"); 4779 mutex_unlock(&il->mutex); 4780 } 4781 EXPORT_SYMBOL(il_mac_flush); 4782 4783 /* 4784 * On every watchdog tick we check (latest) time stamp. If it does not 4785 * change during timeout period and queue is not empty we reset firmware. 4786 */ 4787 static int 4788 il_check_stuck_queue(struct il_priv *il, int cnt) 4789 { 4790 struct il_tx_queue *txq = &il->txq[cnt]; 4791 struct il_queue *q = &txq->q; 4792 unsigned long timeout; 4793 unsigned long now = jiffies; 4794 int ret; 4795 4796 if (q->read_ptr == q->write_ptr) { 4797 txq->time_stamp = now; 4798 return 0; 4799 } 4800 4801 timeout = 4802 txq->time_stamp + 4803 msecs_to_jiffies(il->cfg->wd_timeout); 4804 4805 if (time_after(now, timeout)) { 4806 IL_ERR("Queue %d stuck for %u ms.\n", q->id, 4807 jiffies_to_msecs(now - txq->time_stamp)); 4808 ret = il_force_reset(il, false); 4809 return (ret == -EAGAIN) ? 0 : 1; 4810 } 4811 4812 return 0; 4813 } 4814 4815 /* 4816 * Making watchdog tick be a quarter of timeout assure we will 4817 * discover the queue hung between timeout and 1.25*timeout 4818 */ 4819 #define IL_WD_TICK(timeout) ((timeout) / 4) 4820 4821 /* 4822 * Watchdog timer callback, we check each tx queue for stuck, if if hung 4823 * we reset the firmware. If everything is fine just rearm the timer. 4824 */ 4825 void 4826 il_bg_watchdog(struct timer_list *t) 4827 { 4828 struct il_priv *il = from_timer(il, t, watchdog); 4829 int cnt; 4830 unsigned long timeout; 4831 4832 if (test_bit(S_EXIT_PENDING, &il->status)) 4833 return; 4834 4835 timeout = il->cfg->wd_timeout; 4836 if (timeout == 0) 4837 return; 4838 4839 /* monitor and check for stuck cmd queue */ 4840 if (il_check_stuck_queue(il, il->cmd_queue)) 4841 return; 4842 4843 /* monitor and check for other stuck queues */ 4844 for (cnt = 0; cnt < il->hw_params.max_txq_num; cnt++) { 4845 /* skip as we already checked the command queue */ 4846 if (cnt == il->cmd_queue) 4847 continue; 4848 if (il_check_stuck_queue(il, cnt)) 4849 return; 4850 } 4851 4852 mod_timer(&il->watchdog, 4853 jiffies + msecs_to_jiffies(IL_WD_TICK(timeout))); 4854 } 4855 EXPORT_SYMBOL(il_bg_watchdog); 4856 4857 void 4858 il_setup_watchdog(struct il_priv *il) 4859 { 4860 unsigned int timeout = il->cfg->wd_timeout; 4861 4862 if (timeout) 4863 mod_timer(&il->watchdog, 4864 jiffies + msecs_to_jiffies(IL_WD_TICK(timeout))); 4865 else 4866 del_timer(&il->watchdog); 4867 } 4868 EXPORT_SYMBOL(il_setup_watchdog); 4869 4870 /* 4871 * extended beacon time format 4872 * time in usec will be changed into a 32-bit value in extended:internal format 4873 * the extended part is the beacon counts 4874 * the internal part is the time in usec within one beacon interval 4875 */ 4876 u32 4877 il_usecs_to_beacons(struct il_priv *il, u32 usec, u32 beacon_interval) 4878 { 4879 u32 quot; 4880 u32 rem; 4881 u32 interval = beacon_interval * TIME_UNIT; 4882 4883 if (!interval || !usec) 4884 return 0; 4885 4886 quot = 4887 (usec / 4888 interval) & (il_beacon_time_mask_high(il, 4889 il->hw_params. 4890 beacon_time_tsf_bits) >> il-> 4891 hw_params.beacon_time_tsf_bits); 4892 rem = 4893 (usec % interval) & il_beacon_time_mask_low(il, 4894 il->hw_params. 4895 beacon_time_tsf_bits); 4896 4897 return (quot << il->hw_params.beacon_time_tsf_bits) + rem; 4898 } 4899 EXPORT_SYMBOL(il_usecs_to_beacons); 4900 4901 /* base is usually what we get from ucode with each received frame, 4902 * the same as HW timer counter counting down 4903 */ 4904 __le32 4905 il_add_beacon_time(struct il_priv *il, u32 base, u32 addon, 4906 u32 beacon_interval) 4907 { 4908 u32 base_low = base & il_beacon_time_mask_low(il, 4909 il->hw_params. 4910 beacon_time_tsf_bits); 4911 u32 addon_low = addon & il_beacon_time_mask_low(il, 4912 il->hw_params. 4913 beacon_time_tsf_bits); 4914 u32 interval = beacon_interval * TIME_UNIT; 4915 u32 res = (base & il_beacon_time_mask_high(il, 4916 il->hw_params. 4917 beacon_time_tsf_bits)) + 4918 (addon & il_beacon_time_mask_high(il, 4919 il->hw_params. 4920 beacon_time_tsf_bits)); 4921 4922 if (base_low > addon_low) 4923 res += base_low - addon_low; 4924 else if (base_low < addon_low) { 4925 res += interval + base_low - addon_low; 4926 res += (1 << il->hw_params.beacon_time_tsf_bits); 4927 } else 4928 res += (1 << il->hw_params.beacon_time_tsf_bits); 4929 4930 return cpu_to_le32(res); 4931 } 4932 EXPORT_SYMBOL(il_add_beacon_time); 4933 4934 #ifdef CONFIG_PM_SLEEP 4935 4936 static int 4937 il_pci_suspend(struct device *device) 4938 { 4939 struct il_priv *il = dev_get_drvdata(device); 4940 4941 /* 4942 * This function is called when system goes into suspend state 4943 * mac80211 will call il_mac_stop() from the mac80211 suspend function 4944 * first but since il_mac_stop() has no knowledge of who the caller is, 4945 * it will not call apm_ops.stop() to stop the DMA operation. 4946 * Calling apm_ops.stop here to make sure we stop the DMA. 4947 */ 4948 il_apm_stop(il); 4949 4950 return 0; 4951 } 4952 4953 static int 4954 il_pci_resume(struct device *device) 4955 { 4956 struct pci_dev *pdev = to_pci_dev(device); 4957 struct il_priv *il = pci_get_drvdata(pdev); 4958 bool hw_rfkill = false; 4959 4960 /* 4961 * We disable the RETRY_TIMEOUT register (0x41) to keep 4962 * PCI Tx retries from interfering with C3 CPU state. 4963 */ 4964 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00); 4965 4966 il_enable_interrupts(il); 4967 4968 if (!(_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)) 4969 hw_rfkill = true; 4970 4971 if (hw_rfkill) 4972 set_bit(S_RFKILL, &il->status); 4973 else 4974 clear_bit(S_RFKILL, &il->status); 4975 4976 wiphy_rfkill_set_hw_state(il->hw->wiphy, hw_rfkill); 4977 4978 return 0; 4979 } 4980 4981 SIMPLE_DEV_PM_OPS(il_pm_ops, il_pci_suspend, il_pci_resume); 4982 EXPORT_SYMBOL(il_pm_ops); 4983 4984 #endif /* CONFIG_PM_SLEEP */ 4985 4986 static void 4987 il_update_qos(struct il_priv *il) 4988 { 4989 if (test_bit(S_EXIT_PENDING, &il->status)) 4990 return; 4991 4992 il->qos_data.def_qos_parm.qos_flags = 0; 4993 4994 if (il->qos_data.qos_active) 4995 il->qos_data.def_qos_parm.qos_flags |= 4996 QOS_PARAM_FLG_UPDATE_EDCA_MSK; 4997 4998 if (il->ht.enabled) 4999 il->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK; 5000 5001 D_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n", 5002 il->qos_data.qos_active, il->qos_data.def_qos_parm.qos_flags); 5003 5004 il_send_cmd_pdu_async(il, C_QOS_PARAM, sizeof(struct il_qosparam_cmd), 5005 &il->qos_data.def_qos_parm, NULL); 5006 } 5007 5008 /* 5009 * il_mac_config - mac80211 config callback 5010 */ 5011 int 5012 il_mac_config(struct ieee80211_hw *hw, u32 changed) 5013 { 5014 struct il_priv *il = hw->priv; 5015 const struct il_channel_info *ch_info; 5016 struct ieee80211_conf *conf = &hw->conf; 5017 struct ieee80211_channel *channel = conf->chandef.chan; 5018 struct il_ht_config *ht_conf = &il->current_ht_config; 5019 unsigned long flags = 0; 5020 int ret = 0; 5021 u16 ch; 5022 int scan_active = 0; 5023 bool ht_changed = false; 5024 5025 mutex_lock(&il->mutex); 5026 D_MAC80211("enter: channel %d changed 0x%X\n", channel->hw_value, 5027 changed); 5028 5029 if (unlikely(test_bit(S_SCANNING, &il->status))) { 5030 scan_active = 1; 5031 D_MAC80211("scan active\n"); 5032 } 5033 5034 if (changed & 5035 (IEEE80211_CONF_CHANGE_SMPS | IEEE80211_CONF_CHANGE_CHANNEL)) { 5036 /* mac80211 uses static for non-HT which is what we want */ 5037 il->current_ht_config.smps = conf->smps_mode; 5038 5039 /* 5040 * Recalculate chain counts. 5041 * 5042 * If monitor mode is enabled then mac80211 will 5043 * set up the SM PS mode to OFF if an HT channel is 5044 * configured. 5045 */ 5046 if (il->ops->set_rxon_chain) 5047 il->ops->set_rxon_chain(il); 5048 } 5049 5050 /* during scanning mac80211 will delay channel setting until 5051 * scan finish with changed = 0 5052 */ 5053 if (!changed || (changed & IEEE80211_CONF_CHANGE_CHANNEL)) { 5054 5055 if (scan_active) 5056 goto set_ch_out; 5057 5058 ch = channel->hw_value; 5059 ch_info = il_get_channel_info(il, channel->band, ch); 5060 if (!il_is_channel_valid(ch_info)) { 5061 D_MAC80211("leave - invalid channel\n"); 5062 ret = -EINVAL; 5063 goto set_ch_out; 5064 } 5065 5066 if (il->iw_mode == NL80211_IFTYPE_ADHOC && 5067 !il_is_channel_ibss(ch_info)) { 5068 D_MAC80211("leave - not IBSS channel\n"); 5069 ret = -EINVAL; 5070 goto set_ch_out; 5071 } 5072 5073 spin_lock_irqsave(&il->lock, flags); 5074 5075 /* Configure HT40 channels */ 5076 if (il->ht.enabled != conf_is_ht(conf)) { 5077 il->ht.enabled = conf_is_ht(conf); 5078 ht_changed = true; 5079 } 5080 if (il->ht.enabled) { 5081 if (conf_is_ht40_minus(conf)) { 5082 il->ht.extension_chan_offset = 5083 IEEE80211_HT_PARAM_CHA_SEC_BELOW; 5084 il->ht.is_40mhz = true; 5085 } else if (conf_is_ht40_plus(conf)) { 5086 il->ht.extension_chan_offset = 5087 IEEE80211_HT_PARAM_CHA_SEC_ABOVE; 5088 il->ht.is_40mhz = true; 5089 } else { 5090 il->ht.extension_chan_offset = 5091 IEEE80211_HT_PARAM_CHA_SEC_NONE; 5092 il->ht.is_40mhz = false; 5093 } 5094 } else 5095 il->ht.is_40mhz = false; 5096 5097 /* 5098 * Default to no protection. Protection mode will 5099 * later be set from BSS config in il_ht_conf 5100 */ 5101 il->ht.protection = IEEE80211_HT_OP_MODE_PROTECTION_NONE; 5102 5103 /* if we are switching from ht to 2.4 clear flags 5104 * from any ht related info since 2.4 does not 5105 * support ht */ 5106 if ((le16_to_cpu(il->staging.channel) != ch)) 5107 il->staging.flags = 0; 5108 5109 il_set_rxon_channel(il, channel); 5110 il_set_rxon_ht(il, ht_conf); 5111 5112 il_set_flags_for_band(il, channel->band, il->vif); 5113 5114 spin_unlock_irqrestore(&il->lock, flags); 5115 5116 if (il->ops->update_bcast_stations) 5117 ret = il->ops->update_bcast_stations(il); 5118 5119 set_ch_out: 5120 /* The list of supported rates and rate mask can be different 5121 * for each band; since the band may have changed, reset 5122 * the rate mask to what mac80211 lists */ 5123 il_set_rate(il); 5124 } 5125 5126 if (changed & (IEEE80211_CONF_CHANGE_PS | IEEE80211_CONF_CHANGE_IDLE)) { 5127 il->power_data.ps_disabled = !(conf->flags & IEEE80211_CONF_PS); 5128 if (!il->power_data.ps_disabled) 5129 IL_WARN_ONCE("Enabling power save might cause firmware crashes\n"); 5130 ret = il_power_update_mode(il, false); 5131 if (ret) 5132 D_MAC80211("Error setting sleep level\n"); 5133 } 5134 5135 if (changed & IEEE80211_CONF_CHANGE_POWER) { 5136 D_MAC80211("TX Power old=%d new=%d\n", il->tx_power_user_lmt, 5137 conf->power_level); 5138 5139 il_set_tx_power(il, conf->power_level, false); 5140 } 5141 5142 if (!il_is_ready(il)) { 5143 D_MAC80211("leave - not ready\n"); 5144 goto out; 5145 } 5146 5147 if (scan_active) 5148 goto out; 5149 5150 if (memcmp(&il->active, &il->staging, sizeof(il->staging))) 5151 il_commit_rxon(il); 5152 else 5153 D_INFO("Not re-sending same RXON configuration.\n"); 5154 if (ht_changed) 5155 il_update_qos(il); 5156 5157 out: 5158 D_MAC80211("leave ret %d\n", ret); 5159 mutex_unlock(&il->mutex); 5160 5161 return ret; 5162 } 5163 EXPORT_SYMBOL(il_mac_config); 5164 5165 void 5166 il_mac_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif) 5167 { 5168 struct il_priv *il = hw->priv; 5169 unsigned long flags; 5170 5171 mutex_lock(&il->mutex); 5172 D_MAC80211("enter: type %d, addr %pM\n", vif->type, vif->addr); 5173 5174 spin_lock_irqsave(&il->lock, flags); 5175 5176 memset(&il->current_ht_config, 0, sizeof(struct il_ht_config)); 5177 5178 /* new association get rid of ibss beacon skb */ 5179 dev_kfree_skb(il->beacon_skb); 5180 il->beacon_skb = NULL; 5181 il->timestamp = 0; 5182 5183 spin_unlock_irqrestore(&il->lock, flags); 5184 5185 il_scan_cancel_timeout(il, 100); 5186 if (!il_is_ready_rf(il)) { 5187 D_MAC80211("leave - not ready\n"); 5188 mutex_unlock(&il->mutex); 5189 return; 5190 } 5191 5192 /* we are restarting association process */ 5193 il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK; 5194 il_commit_rxon(il); 5195 5196 il_set_rate(il); 5197 5198 D_MAC80211("leave\n"); 5199 mutex_unlock(&il->mutex); 5200 } 5201 EXPORT_SYMBOL(il_mac_reset_tsf); 5202 5203 static void 5204 il_ht_conf(struct il_priv *il, struct ieee80211_vif *vif) 5205 { 5206 struct il_ht_config *ht_conf = &il->current_ht_config; 5207 struct ieee80211_sta *sta; 5208 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf; 5209 5210 D_ASSOC("enter:\n"); 5211 5212 if (!il->ht.enabled) 5213 return; 5214 5215 il->ht.protection = 5216 bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION; 5217 il->ht.non_gf_sta_present = 5218 !!(bss_conf-> 5219 ht_operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT); 5220 5221 ht_conf->single_chain_sufficient = false; 5222 5223 switch (vif->type) { 5224 case NL80211_IFTYPE_STATION: 5225 rcu_read_lock(); 5226 sta = ieee80211_find_sta(vif, bss_conf->bssid); 5227 if (sta) { 5228 struct ieee80211_sta_ht_cap *ht_cap = &sta->ht_cap; 5229 int maxstreams; 5230 5231 maxstreams = 5232 (ht_cap->mcs. 5233 tx_params & IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK) 5234 >> IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT; 5235 maxstreams += 1; 5236 5237 if (ht_cap->mcs.rx_mask[1] == 0 && 5238 ht_cap->mcs.rx_mask[2] == 0) 5239 ht_conf->single_chain_sufficient = true; 5240 if (maxstreams <= 1) 5241 ht_conf->single_chain_sufficient = true; 5242 } else { 5243 /* 5244 * If at all, this can only happen through a race 5245 * when the AP disconnects us while we're still 5246 * setting up the connection, in that case mac80211 5247 * will soon tell us about that. 5248 */ 5249 ht_conf->single_chain_sufficient = true; 5250 } 5251 rcu_read_unlock(); 5252 break; 5253 case NL80211_IFTYPE_ADHOC: 5254 ht_conf->single_chain_sufficient = true; 5255 break; 5256 default: 5257 break; 5258 } 5259 5260 D_ASSOC("leave\n"); 5261 } 5262 5263 static inline void 5264 il_set_no_assoc(struct il_priv *il, struct ieee80211_vif *vif) 5265 { 5266 /* 5267 * inform the ucode that there is no longer an 5268 * association and that no more packets should be 5269 * sent 5270 */ 5271 il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK; 5272 il->staging.assoc_id = 0; 5273 il_commit_rxon(il); 5274 } 5275 5276 static void 5277 il_beacon_update(struct ieee80211_hw *hw, struct ieee80211_vif *vif) 5278 { 5279 struct il_priv *il = hw->priv; 5280 unsigned long flags; 5281 __le64 timestamp; 5282 struct sk_buff *skb = ieee80211_beacon_get(hw, vif); 5283 5284 if (!skb) 5285 return; 5286 5287 D_MAC80211("enter\n"); 5288 5289 lockdep_assert_held(&il->mutex); 5290 5291 if (!il->beacon_enabled) { 5292 IL_ERR("update beacon with no beaconing enabled\n"); 5293 dev_kfree_skb(skb); 5294 return; 5295 } 5296 5297 spin_lock_irqsave(&il->lock, flags); 5298 dev_kfree_skb(il->beacon_skb); 5299 il->beacon_skb = skb; 5300 5301 timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp; 5302 il->timestamp = le64_to_cpu(timestamp); 5303 5304 D_MAC80211("leave\n"); 5305 spin_unlock_irqrestore(&il->lock, flags); 5306 5307 if (!il_is_ready_rf(il)) { 5308 D_MAC80211("leave - RF not ready\n"); 5309 return; 5310 } 5311 5312 il->ops->post_associate(il); 5313 } 5314 5315 void 5316 il_mac_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 5317 struct ieee80211_bss_conf *bss_conf, u32 changes) 5318 { 5319 struct il_priv *il = hw->priv; 5320 int ret; 5321 5322 mutex_lock(&il->mutex); 5323 D_MAC80211("enter: changes 0x%x\n", changes); 5324 5325 if (!il_is_alive(il)) { 5326 D_MAC80211("leave - not alive\n"); 5327 mutex_unlock(&il->mutex); 5328 return; 5329 } 5330 5331 if (changes & BSS_CHANGED_QOS) { 5332 unsigned long flags; 5333 5334 spin_lock_irqsave(&il->lock, flags); 5335 il->qos_data.qos_active = bss_conf->qos; 5336 il_update_qos(il); 5337 spin_unlock_irqrestore(&il->lock, flags); 5338 } 5339 5340 if (changes & BSS_CHANGED_BEACON_ENABLED) { 5341 /* FIXME: can we remove beacon_enabled ? */ 5342 if (vif->bss_conf.enable_beacon) 5343 il->beacon_enabled = true; 5344 else 5345 il->beacon_enabled = false; 5346 } 5347 5348 if (changes & BSS_CHANGED_BSSID) { 5349 D_MAC80211("BSSID %pM\n", bss_conf->bssid); 5350 5351 /* 5352 * On passive channel we wait with blocked queues to see if 5353 * there is traffic on that channel. If no frame will be 5354 * received (what is very unlikely since scan detects AP on 5355 * that channel, but theoretically possible), mac80211 associate 5356 * procedure will time out and mac80211 will call us with NULL 5357 * bssid. We have to unblock queues on such condition. 5358 */ 5359 if (is_zero_ether_addr(bss_conf->bssid)) 5360 il_wake_queues_by_reason(il, IL_STOP_REASON_PASSIVE); 5361 5362 /* 5363 * If there is currently a HW scan going on in the background, 5364 * then we need to cancel it, otherwise sometimes we are not 5365 * able to authenticate (FIXME: why ?) 5366 */ 5367 if (il_scan_cancel_timeout(il, 100)) { 5368 D_MAC80211("leave - scan abort failed\n"); 5369 mutex_unlock(&il->mutex); 5370 return; 5371 } 5372 5373 /* mac80211 only sets assoc when in STATION mode */ 5374 memcpy(il->staging.bssid_addr, bss_conf->bssid, ETH_ALEN); 5375 5376 /* FIXME: currently needed in a few places */ 5377 memcpy(il->bssid, bss_conf->bssid, ETH_ALEN); 5378 } 5379 5380 /* 5381 * This needs to be after setting the BSSID in case 5382 * mac80211 decides to do both changes at once because 5383 * it will invoke post_associate. 5384 */ 5385 if (vif->type == NL80211_IFTYPE_ADHOC && (changes & BSS_CHANGED_BEACON)) 5386 il_beacon_update(hw, vif); 5387 5388 if (changes & BSS_CHANGED_ERP_PREAMBLE) { 5389 D_MAC80211("ERP_PREAMBLE %d\n", bss_conf->use_short_preamble); 5390 if (bss_conf->use_short_preamble) 5391 il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; 5392 else 5393 il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; 5394 } 5395 5396 if (changes & BSS_CHANGED_ERP_CTS_PROT) { 5397 D_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot); 5398 if (bss_conf->use_cts_prot && il->band != NL80211_BAND_5GHZ) 5399 il->staging.flags |= RXON_FLG_TGG_PROTECT_MSK; 5400 else 5401 il->staging.flags &= ~RXON_FLG_TGG_PROTECT_MSK; 5402 if (bss_conf->use_cts_prot) 5403 il->staging.flags |= RXON_FLG_SELF_CTS_EN; 5404 else 5405 il->staging.flags &= ~RXON_FLG_SELF_CTS_EN; 5406 } 5407 5408 if (changes & BSS_CHANGED_BASIC_RATES) { 5409 /* XXX use this information 5410 * 5411 * To do that, remove code from il_set_rate() and put something 5412 * like this here: 5413 * 5414 if (A-band) 5415 il->staging.ofdm_basic_rates = 5416 bss_conf->basic_rates; 5417 else 5418 il->staging.ofdm_basic_rates = 5419 bss_conf->basic_rates >> 4; 5420 il->staging.cck_basic_rates = 5421 bss_conf->basic_rates & 0xF; 5422 */ 5423 } 5424 5425 if (changes & BSS_CHANGED_HT) { 5426 il_ht_conf(il, vif); 5427 5428 if (il->ops->set_rxon_chain) 5429 il->ops->set_rxon_chain(il); 5430 } 5431 5432 if (changes & BSS_CHANGED_ASSOC) { 5433 D_MAC80211("ASSOC %d\n", bss_conf->assoc); 5434 if (bss_conf->assoc) { 5435 il->timestamp = bss_conf->sync_tsf; 5436 5437 if (!il_is_rfkill(il)) 5438 il->ops->post_associate(il); 5439 } else 5440 il_set_no_assoc(il, vif); 5441 } 5442 5443 if (changes && il_is_associated(il) && bss_conf->aid) { 5444 D_MAC80211("Changes (%#x) while associated\n", changes); 5445 ret = il_send_rxon_assoc(il); 5446 if (!ret) { 5447 /* Sync active_rxon with latest change. */ 5448 memcpy((void *)&il->active, &il->staging, 5449 sizeof(struct il_rxon_cmd)); 5450 } 5451 } 5452 5453 if (changes & BSS_CHANGED_BEACON_ENABLED) { 5454 if (vif->bss_conf.enable_beacon) { 5455 memcpy(il->staging.bssid_addr, bss_conf->bssid, 5456 ETH_ALEN); 5457 memcpy(il->bssid, bss_conf->bssid, ETH_ALEN); 5458 il->ops->config_ap(il); 5459 } else 5460 il_set_no_assoc(il, vif); 5461 } 5462 5463 if (changes & BSS_CHANGED_IBSS) { 5464 ret = il->ops->manage_ibss_station(il, vif, 5465 bss_conf->ibss_joined); 5466 if (ret) 5467 IL_ERR("failed to %s IBSS station %pM\n", 5468 bss_conf->ibss_joined ? "add" : "remove", 5469 bss_conf->bssid); 5470 } 5471 5472 D_MAC80211("leave\n"); 5473 mutex_unlock(&il->mutex); 5474 } 5475 EXPORT_SYMBOL(il_mac_bss_info_changed); 5476 5477 irqreturn_t 5478 il_isr(int irq, void *data) 5479 { 5480 struct il_priv *il = data; 5481 u32 inta, inta_mask; 5482 u32 inta_fh; 5483 unsigned long flags; 5484 if (!il) 5485 return IRQ_NONE; 5486 5487 spin_lock_irqsave(&il->lock, flags); 5488 5489 /* Disable (but don't clear!) interrupts here to avoid 5490 * back-to-back ISRs and sporadic interrupts from our NIC. 5491 * If we have something to service, the tasklet will re-enable ints. 5492 * If we *don't* have something, we'll re-enable before leaving here. */ 5493 inta_mask = _il_rd(il, CSR_INT_MASK); /* just for debug */ 5494 _il_wr(il, CSR_INT_MASK, 0x00000000); 5495 5496 /* Discover which interrupts are active/pending */ 5497 inta = _il_rd(il, CSR_INT); 5498 inta_fh = _il_rd(il, CSR_FH_INT_STATUS); 5499 5500 /* Ignore interrupt if there's nothing in NIC to service. 5501 * This may be due to IRQ shared with another device, 5502 * or due to sporadic interrupts thrown from our NIC. */ 5503 if (!inta && !inta_fh) { 5504 D_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n"); 5505 goto none; 5506 } 5507 5508 if (inta == 0xFFFFFFFF || (inta & 0xFFFFFFF0) == 0xa5a5a5a0) { 5509 /* Hardware disappeared. It might have already raised 5510 * an interrupt */ 5511 IL_WARN("HARDWARE GONE?? INTA == 0x%08x\n", inta); 5512 goto unplugged; 5513 } 5514 5515 D_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", inta, inta_mask, 5516 inta_fh); 5517 5518 inta &= ~CSR_INT_BIT_SCD; 5519 5520 /* il_irq_tasklet() will service interrupts and re-enable them */ 5521 if (likely(inta || inta_fh)) 5522 tasklet_schedule(&il->irq_tasklet); 5523 5524 unplugged: 5525 spin_unlock_irqrestore(&il->lock, flags); 5526 return IRQ_HANDLED; 5527 5528 none: 5529 /* re-enable interrupts here since we don't have anything to service. */ 5530 /* only Re-enable if disabled by irq */ 5531 if (test_bit(S_INT_ENABLED, &il->status)) 5532 il_enable_interrupts(il); 5533 spin_unlock_irqrestore(&il->lock, flags); 5534 return IRQ_NONE; 5535 } 5536 EXPORT_SYMBOL(il_isr); 5537 5538 /* 5539 * il_tx_cmd_protection: Set rts/cts. 3945 and 4965 only share this 5540 * function. 5541 */ 5542 void 5543 il_tx_cmd_protection(struct il_priv *il, struct ieee80211_tx_info *info, 5544 __le16 fc, __le32 *tx_flags) 5545 { 5546 if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) { 5547 *tx_flags |= TX_CMD_FLG_RTS_MSK; 5548 *tx_flags &= ~TX_CMD_FLG_CTS_MSK; 5549 *tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK; 5550 5551 if (!ieee80211_is_mgmt(fc)) 5552 return; 5553 5554 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) { 5555 case cpu_to_le16(IEEE80211_STYPE_AUTH): 5556 case cpu_to_le16(IEEE80211_STYPE_DEAUTH): 5557 case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ): 5558 case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ): 5559 *tx_flags &= ~TX_CMD_FLG_RTS_MSK; 5560 *tx_flags |= TX_CMD_FLG_CTS_MSK; 5561 break; 5562 } 5563 } else if (info->control.rates[0]. 5564 flags & IEEE80211_TX_RC_USE_CTS_PROTECT) { 5565 *tx_flags &= ~TX_CMD_FLG_RTS_MSK; 5566 *tx_flags |= TX_CMD_FLG_CTS_MSK; 5567 *tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK; 5568 } 5569 } 5570 EXPORT_SYMBOL(il_tx_cmd_protection); 5571