1 // SPDX-License-Identifier: GPL-2.0-only 2 /****************************************************************************** 3 * 4 * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved. 5 * 6 * Portions of this file are derived from the ipw3945 project, as well 7 * as portions of the ieee80211 subsystem header files. 8 * 9 * Contact Information: 10 * Intel Linux Wireless <ilw@linux.intel.com> 11 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 12 * 13 *****************************************************************************/ 14 15 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 16 17 #include <linux/kernel.h> 18 #include <linux/module.h> 19 #include <linux/init.h> 20 #include <linux/pci.h> 21 #include <linux/slab.h> 22 #include <linux/dma-mapping.h> 23 #include <linux/delay.h> 24 #include <linux/sched.h> 25 #include <linux/skbuff.h> 26 #include <linux/netdevice.h> 27 #include <linux/firmware.h> 28 #include <linux/etherdevice.h> 29 #include <linux/if_arp.h> 30 31 #include <net/ieee80211_radiotap.h> 32 #include <net/mac80211.h> 33 34 #include <asm/div64.h> 35 36 #define DRV_NAME "iwl3945" 37 38 #include "commands.h" 39 #include "common.h" 40 #include "3945.h" 41 #include "iwl-spectrum.h" 42 43 /* 44 * module name, copyright, version, etc. 45 */ 46 47 #define DRV_DESCRIPTION \ 48 "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux" 49 50 #ifdef CONFIG_IWLEGACY_DEBUG 51 #define VD "d" 52 #else 53 #define VD 54 #endif 55 56 /* 57 * add "s" to indicate spectrum measurement included. 58 * we add it here to be consistent with previous releases in which 59 * this was configurable. 60 */ 61 #define DRV_VERSION IWLWIFI_VERSION VD "s" 62 #define DRV_COPYRIGHT "Copyright(c) 2003-2011 Intel Corporation" 63 #define DRV_AUTHOR "<ilw@linux.intel.com>" 64 65 MODULE_DESCRIPTION(DRV_DESCRIPTION); 66 MODULE_VERSION(DRV_VERSION); 67 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR); 68 MODULE_LICENSE("GPL"); 69 70 /* module parameters */ 71 struct il_mod_params il3945_mod_params = { 72 .sw_crypto = 1, 73 .restart_fw = 1, 74 .disable_hw_scan = 1, 75 /* the rest are 0 by default */ 76 }; 77 78 /** 79 * il3945_get_antenna_flags - Get antenna flags for RXON command 80 * @il: eeprom and antenna fields are used to determine antenna flags 81 * 82 * il->eeprom39 is used to determine if antenna AUX/MAIN are reversed 83 * il3945_mod_params.antenna specifies the antenna diversity mode: 84 * 85 * IL_ANTENNA_DIVERSITY - NIC selects best antenna by itself 86 * IL_ANTENNA_MAIN - Force MAIN antenna 87 * IL_ANTENNA_AUX - Force AUX antenna 88 */ 89 __le32 90 il3945_get_antenna_flags(const struct il_priv *il) 91 { 92 struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom; 93 94 switch (il3945_mod_params.antenna) { 95 case IL_ANTENNA_DIVERSITY: 96 return 0; 97 98 case IL_ANTENNA_MAIN: 99 if (eeprom->antenna_switch_type) 100 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK; 101 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK; 102 103 case IL_ANTENNA_AUX: 104 if (eeprom->antenna_switch_type) 105 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK; 106 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK; 107 } 108 109 /* bad antenna selector value */ 110 IL_ERR("Bad antenna selector value (0x%x)\n", 111 il3945_mod_params.antenna); 112 113 return 0; /* "diversity" is default if error */ 114 } 115 116 static int 117 il3945_set_ccmp_dynamic_key_info(struct il_priv *il, 118 struct ieee80211_key_conf *keyconf, u8 sta_id) 119 { 120 unsigned long flags; 121 __le16 key_flags = 0; 122 int ret; 123 124 key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK); 125 key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS); 126 127 if (sta_id == il->hw_params.bcast_id) 128 key_flags |= STA_KEY_MULTICAST_MSK; 129 130 keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV; 131 keyconf->hw_key_idx = keyconf->keyidx; 132 key_flags &= ~STA_KEY_FLG_INVALID; 133 134 spin_lock_irqsave(&il->sta_lock, flags); 135 il->stations[sta_id].keyinfo.cipher = keyconf->cipher; 136 il->stations[sta_id].keyinfo.keylen = keyconf->keylen; 137 memcpy(il->stations[sta_id].keyinfo.key, keyconf->key, keyconf->keylen); 138 139 memcpy(il->stations[sta_id].sta.key.key, keyconf->key, keyconf->keylen); 140 141 if ((il->stations[sta_id].sta.key. 142 key_flags & STA_KEY_FLG_ENCRYPT_MSK) == STA_KEY_FLG_NO_ENC) 143 il->stations[sta_id].sta.key.key_offset = 144 il_get_free_ucode_key_idx(il); 145 /* else, we are overriding an existing key => no need to allocated room 146 * in uCode. */ 147 148 WARN(il->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET, 149 "no space for a new key"); 150 151 il->stations[sta_id].sta.key.key_flags = key_flags; 152 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; 153 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; 154 155 D_INFO("hwcrypto: modify ucode station key info\n"); 156 157 ret = il_send_add_sta(il, &il->stations[sta_id].sta, CMD_ASYNC); 158 159 spin_unlock_irqrestore(&il->sta_lock, flags); 160 161 return ret; 162 } 163 164 static int 165 il3945_set_tkip_dynamic_key_info(struct il_priv *il, 166 struct ieee80211_key_conf *keyconf, u8 sta_id) 167 { 168 return -EOPNOTSUPP; 169 } 170 171 static int 172 il3945_set_wep_dynamic_key_info(struct il_priv *il, 173 struct ieee80211_key_conf *keyconf, u8 sta_id) 174 { 175 return -EOPNOTSUPP; 176 } 177 178 static int 179 il3945_clear_sta_key_info(struct il_priv *il, u8 sta_id) 180 { 181 unsigned long flags; 182 struct il_addsta_cmd sta_cmd; 183 184 spin_lock_irqsave(&il->sta_lock, flags); 185 memset(&il->stations[sta_id].keyinfo, 0, sizeof(struct il_hw_key)); 186 memset(&il->stations[sta_id].sta.key, 0, sizeof(struct il4965_keyinfo)); 187 il->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC; 188 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; 189 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; 190 memcpy(&sta_cmd, &il->stations[sta_id].sta, 191 sizeof(struct il_addsta_cmd)); 192 spin_unlock_irqrestore(&il->sta_lock, flags); 193 194 D_INFO("hwcrypto: clear ucode station key info\n"); 195 return il_send_add_sta(il, &sta_cmd, CMD_SYNC); 196 } 197 198 static int 199 il3945_set_dynamic_key(struct il_priv *il, struct ieee80211_key_conf *keyconf, 200 u8 sta_id) 201 { 202 int ret = 0; 203 204 keyconf->hw_key_idx = HW_KEY_DYNAMIC; 205 206 switch (keyconf->cipher) { 207 case WLAN_CIPHER_SUITE_CCMP: 208 ret = il3945_set_ccmp_dynamic_key_info(il, keyconf, sta_id); 209 break; 210 case WLAN_CIPHER_SUITE_TKIP: 211 ret = il3945_set_tkip_dynamic_key_info(il, keyconf, sta_id); 212 break; 213 case WLAN_CIPHER_SUITE_WEP40: 214 case WLAN_CIPHER_SUITE_WEP104: 215 ret = il3945_set_wep_dynamic_key_info(il, keyconf, sta_id); 216 break; 217 default: 218 IL_ERR("Unknown alg: %s alg=%x\n", __func__, keyconf->cipher); 219 ret = -EINVAL; 220 } 221 222 D_WEP("Set dynamic key: alg=%x len=%d idx=%d sta=%d ret=%d\n", 223 keyconf->cipher, keyconf->keylen, keyconf->keyidx, sta_id, ret); 224 225 return ret; 226 } 227 228 static int 229 il3945_remove_static_key(struct il_priv *il) 230 { 231 return -EOPNOTSUPP; 232 } 233 234 static int 235 il3945_set_static_key(struct il_priv *il, struct ieee80211_key_conf *key) 236 { 237 if (key->cipher == WLAN_CIPHER_SUITE_WEP40 || 238 key->cipher == WLAN_CIPHER_SUITE_WEP104) 239 return -EOPNOTSUPP; 240 241 IL_ERR("Static key invalid: cipher %x\n", key->cipher); 242 return -EINVAL; 243 } 244 245 static void 246 il3945_clear_free_frames(struct il_priv *il) 247 { 248 struct list_head *element; 249 250 D_INFO("%d frames on pre-allocated heap on clear.\n", il->frames_count); 251 252 while (!list_empty(&il->free_frames)) { 253 element = il->free_frames.next; 254 list_del(element); 255 kfree(list_entry(element, struct il3945_frame, list)); 256 il->frames_count--; 257 } 258 259 if (il->frames_count) { 260 IL_WARN("%d frames still in use. Did we lose one?\n", 261 il->frames_count); 262 il->frames_count = 0; 263 } 264 } 265 266 static struct il3945_frame * 267 il3945_get_free_frame(struct il_priv *il) 268 { 269 struct il3945_frame *frame; 270 struct list_head *element; 271 if (list_empty(&il->free_frames)) { 272 frame = kzalloc_obj(*frame); 273 if (!frame) { 274 IL_ERR("Could not allocate frame!\n"); 275 return NULL; 276 } 277 278 il->frames_count++; 279 return frame; 280 } 281 282 element = il->free_frames.next; 283 list_del(element); 284 return list_entry(element, struct il3945_frame, list); 285 } 286 287 static void 288 il3945_free_frame(struct il_priv *il, struct il3945_frame *frame) 289 { 290 memset(frame, 0, sizeof(*frame)); 291 list_add(&frame->list, &il->free_frames); 292 } 293 294 unsigned int 295 il3945_fill_beacon_frame(struct il_priv *il, struct ieee80211_hdr *hdr, 296 int left) 297 { 298 299 if (!il_is_associated(il) || !il->beacon_skb) 300 return 0; 301 302 if (il->beacon_skb->len > left) 303 return 0; 304 305 memcpy(hdr, il->beacon_skb->data, il->beacon_skb->len); 306 307 return il->beacon_skb->len; 308 } 309 310 static int 311 il3945_send_beacon_cmd(struct il_priv *il) 312 { 313 struct il3945_frame *frame; 314 unsigned int frame_size; 315 int rc; 316 u8 rate; 317 318 frame = il3945_get_free_frame(il); 319 320 if (!frame) { 321 IL_ERR("Could not obtain free frame buffer for beacon " 322 "command.\n"); 323 return -ENOMEM; 324 } 325 326 rate = il_get_lowest_plcp(il); 327 328 frame_size = il3945_hw_get_beacon_cmd(il, frame, rate); 329 330 rc = il_send_cmd_pdu(il, C_TX_BEACON, frame_size, &frame->u.cmd[0]); 331 332 il3945_free_frame(il, frame); 333 334 return rc; 335 } 336 337 static void 338 il3945_unset_hw_params(struct il_priv *il) 339 { 340 if (il->_3945.shared_virt) 341 dma_free_coherent(&il->pci_dev->dev, 342 sizeof(struct il3945_shared), 343 il->_3945.shared_virt, il->_3945.shared_phys); 344 } 345 346 static void 347 il3945_build_tx_cmd_hwcrypto(struct il_priv *il, struct ieee80211_tx_info *info, 348 struct il_device_cmd *cmd, 349 struct sk_buff *skb_frag, int sta_id) 350 { 351 struct il3945_tx_cmd *tx_cmd = (struct il3945_tx_cmd *)cmd->cmd.payload; 352 struct il_hw_key *keyinfo = &il->stations[sta_id].keyinfo; 353 354 tx_cmd->sec_ctl = 0; 355 356 switch (keyinfo->cipher) { 357 case WLAN_CIPHER_SUITE_CCMP: 358 tx_cmd->sec_ctl = TX_CMD_SEC_CCM; 359 memcpy(tx_cmd->key, keyinfo->key, keyinfo->keylen); 360 D_TX("tx_cmd with AES hwcrypto\n"); 361 break; 362 363 case WLAN_CIPHER_SUITE_TKIP: 364 break; 365 366 case WLAN_CIPHER_SUITE_WEP104: 367 tx_cmd->sec_ctl |= TX_CMD_SEC_KEY128; 368 fallthrough; 369 case WLAN_CIPHER_SUITE_WEP40: 370 tx_cmd->sec_ctl |= 371 TX_CMD_SEC_WEP | (info->control.hw_key-> 372 hw_key_idx & TX_CMD_SEC_MSK) << 373 TX_CMD_SEC_SHIFT; 374 375 memcpy(&tx_cmd->key[3], keyinfo->key, keyinfo->keylen); 376 377 D_TX("Configuring packet for WEP encryption " "with key %d\n", 378 info->control.hw_key->hw_key_idx); 379 break; 380 381 default: 382 IL_ERR("Unknown encode cipher %x\n", keyinfo->cipher); 383 break; 384 } 385 } 386 387 /* 388 * handle build C_TX command notification. 389 */ 390 static void 391 il3945_build_tx_cmd_basic(struct il_priv *il, struct il_device_cmd *cmd, 392 struct ieee80211_tx_info *info, 393 struct ieee80211_hdr *hdr, u8 std_id) 394 { 395 struct il3945_tx_cmd *tx_cmd = (struct il3945_tx_cmd *)cmd->cmd.payload; 396 __le32 tx_flags = tx_cmd->tx_flags; 397 __le16 fc = hdr->frame_control; 398 399 tx_cmd->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE; 400 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) { 401 tx_flags |= TX_CMD_FLG_ACK_MSK; 402 if (ieee80211_is_mgmt(fc)) 403 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK; 404 if (ieee80211_is_probe_resp(fc) && 405 !(le16_to_cpu(hdr->seq_ctrl) & 0xf)) 406 tx_flags |= TX_CMD_FLG_TSF_MSK; 407 } else { 408 tx_flags &= (~TX_CMD_FLG_ACK_MSK); 409 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK; 410 } 411 412 tx_cmd->sta_id = std_id; 413 if (ieee80211_has_morefrags(fc)) 414 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK; 415 416 if (ieee80211_is_data_qos(fc)) { 417 u8 *qc = ieee80211_get_qos_ctl(hdr); 418 tx_cmd->tid_tspec = qc[0] & 0xf; 419 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK; 420 } else { 421 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK; 422 } 423 424 il_tx_cmd_protection(il, info, fc, &tx_flags); 425 426 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK); 427 if (ieee80211_is_mgmt(fc)) { 428 if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc)) 429 tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(3); 430 else 431 tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(2); 432 } else { 433 tx_cmd->timeout.pm_frame_timeout = 0; 434 } 435 436 tx_cmd->driver_txop = 0; 437 tx_cmd->tx_flags = tx_flags; 438 tx_cmd->next_frame_len = 0; 439 } 440 441 /* 442 * start C_TX command process 443 */ 444 static int 445 il3945_tx_skb(struct il_priv *il, 446 struct ieee80211_sta *sta, 447 struct sk_buff *skb) 448 { 449 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 450 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 451 struct il3945_tx_cmd *tx_cmd; 452 struct il_tx_queue *txq = NULL; 453 struct il_queue *q = NULL; 454 struct il_device_cmd *out_cmd; 455 struct il_cmd_meta *out_meta; 456 dma_addr_t phys_addr; 457 dma_addr_t txcmd_phys; 458 int txq_id = skb_get_queue_mapping(skb); 459 u16 len, idx, hdr_len; 460 u16 firstlen, secondlen; 461 u8 sta_id; 462 u8 tid = 0; 463 __le16 fc; 464 u8 wait_write_ptr = 0; 465 unsigned long flags; 466 467 spin_lock_irqsave(&il->lock, flags); 468 if (il_is_rfkill(il)) { 469 D_DROP("Dropping - RF KILL\n"); 470 goto drop_unlock; 471 } 472 473 if ((ieee80211_get_tx_rate(il->hw, info)->hw_value & 0xFF) == 474 IL_INVALID_RATE) { 475 IL_ERR("ERROR: No TX rate available.\n"); 476 goto drop_unlock; 477 } 478 479 fc = hdr->frame_control; 480 481 #ifdef CONFIG_IWLEGACY_DEBUG 482 if (ieee80211_is_auth(fc)) 483 D_TX("Sending AUTH frame\n"); 484 else if (ieee80211_is_assoc_req(fc)) 485 D_TX("Sending ASSOC frame\n"); 486 else if (ieee80211_is_reassoc_req(fc)) 487 D_TX("Sending REASSOC frame\n"); 488 #endif 489 490 spin_unlock_irqrestore(&il->lock, flags); 491 492 hdr_len = ieee80211_hdrlen(fc); 493 494 /* Find idx into station table for destination station */ 495 sta_id = il_sta_id_or_broadcast(il, sta); 496 if (sta_id == IL_INVALID_STATION) { 497 D_DROP("Dropping - INVALID STATION: %pM\n", hdr->addr1); 498 goto drop; 499 } 500 501 D_RATE("station Id %d\n", sta_id); 502 503 if (ieee80211_is_data_qos(fc)) { 504 u8 *qc = ieee80211_get_qos_ctl(hdr); 505 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK; 506 if (unlikely(tid >= MAX_TID_COUNT)) 507 goto drop; 508 } 509 510 /* Descriptor for chosen Tx queue */ 511 txq = &il->txq[txq_id]; 512 q = &txq->q; 513 514 if ((il_queue_space(q) < q->high_mark)) 515 goto drop; 516 517 spin_lock_irqsave(&il->lock, flags); 518 519 idx = il_get_cmd_idx(q, q->write_ptr, 0); 520 521 txq->skbs[q->write_ptr] = skb; 522 523 /* Init first empty entry in queue's array of Tx/cmd buffers */ 524 out_cmd = txq->cmd[idx]; 525 out_meta = &txq->meta[idx]; 526 tx_cmd = (struct il3945_tx_cmd *)out_cmd->cmd.payload; 527 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr)); 528 memset(tx_cmd, 0, sizeof(*tx_cmd)); 529 530 /* 531 * Set up the Tx-command (not MAC!) header. 532 * Store the chosen Tx queue and TFD idx within the sequence field; 533 * after Tx, uCode's Tx response will return this value so driver can 534 * locate the frame within the tx queue and do post-tx processing. 535 */ 536 out_cmd->hdr.cmd = C_TX; 537 out_cmd->hdr.sequence = 538 cpu_to_le16((u16) 539 (QUEUE_TO_SEQ(txq_id) | IDX_TO_SEQ(q->write_ptr))); 540 541 /* Copy MAC header from skb into command buffer */ 542 memcpy(tx_cmd->hdr, hdr, hdr_len); 543 544 if (info->control.hw_key) 545 il3945_build_tx_cmd_hwcrypto(il, info, out_cmd, skb, sta_id); 546 547 /* TODO need this for burst mode later on */ 548 il3945_build_tx_cmd_basic(il, out_cmd, info, hdr, sta_id); 549 550 il3945_hw_build_tx_cmd_rate(il, out_cmd, info, hdr, sta_id); 551 552 /* Total # bytes to be transmitted */ 553 tx_cmd->len = cpu_to_le16((u16) skb->len); 554 555 tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK; 556 tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK; 557 558 /* 559 * Use the first empty entry in this queue's command buffer array 560 * to contain the Tx command and MAC header concatenated together 561 * (payload data will be in another buffer). 562 * Size of this varies, due to varying MAC header length. 563 * If end is not dword aligned, we'll have 2 extra bytes at the end 564 * of the MAC header (device reads on dword boundaries). 565 * We'll tell device about this padding later. 566 */ 567 len = 568 sizeof(struct il3945_tx_cmd) + sizeof(struct il_cmd_header) + 569 hdr_len; 570 firstlen = (len + 3) & ~3; 571 572 /* Physical address of this Tx command's header (not MAC header!), 573 * within command buffer array. */ 574 txcmd_phys = dma_map_single(&il->pci_dev->dev, &out_cmd->hdr, firstlen, 575 DMA_TO_DEVICE); 576 if (unlikely(dma_mapping_error(&il->pci_dev->dev, txcmd_phys))) 577 goto drop_unlock; 578 579 /* Set up TFD's 2nd entry to point directly to remainder of skb, 580 * if any (802.11 null frames have no payload). */ 581 secondlen = skb->len - hdr_len; 582 if (secondlen > 0) { 583 phys_addr = dma_map_single(&il->pci_dev->dev, skb->data + hdr_len, 584 secondlen, DMA_TO_DEVICE); 585 if (unlikely(dma_mapping_error(&il->pci_dev->dev, phys_addr))) 586 goto drop_unlock; 587 } 588 589 /* Add buffer containing Tx command and MAC(!) header to TFD's 590 * first entry */ 591 il->ops->txq_attach_buf_to_tfd(il, txq, txcmd_phys, firstlen, 1, 0); 592 dma_unmap_addr_set(out_meta, mapping, txcmd_phys); 593 dma_unmap_len_set(out_meta, len, firstlen); 594 if (secondlen > 0) 595 il->ops->txq_attach_buf_to_tfd(il, txq, phys_addr, secondlen, 0, 596 U32_PAD(secondlen)); 597 598 if (!ieee80211_has_morefrags(hdr->frame_control)) { 599 txq->need_update = 1; 600 } else { 601 wait_write_ptr = 1; 602 txq->need_update = 0; 603 } 604 605 il_update_stats(il, true, fc, skb->len); 606 607 D_TX("sequence nr = 0X%x\n", le16_to_cpu(out_cmd->hdr.sequence)); 608 D_TX("tx_flags = 0X%x\n", le32_to_cpu(tx_cmd->tx_flags)); 609 il_print_hex_dump(il, IL_DL_TX, tx_cmd, sizeof(*tx_cmd)); 610 il_print_hex_dump(il, IL_DL_TX, (u8 *) tx_cmd->hdr, 611 ieee80211_hdrlen(fc)); 612 613 /* Tell device the write idx *just past* this latest filled TFD */ 614 q->write_ptr = il_queue_inc_wrap(q->write_ptr, q->n_bd); 615 il_txq_update_write_ptr(il, txq); 616 spin_unlock_irqrestore(&il->lock, flags); 617 618 if (il_queue_space(q) < q->high_mark && il->mac80211_registered) { 619 if (wait_write_ptr) { 620 spin_lock_irqsave(&il->lock, flags); 621 txq->need_update = 1; 622 il_txq_update_write_ptr(il, txq); 623 spin_unlock_irqrestore(&il->lock, flags); 624 } 625 626 il_stop_queue(il, txq); 627 } 628 629 return 0; 630 631 drop_unlock: 632 spin_unlock_irqrestore(&il->lock, flags); 633 drop: 634 return -1; 635 } 636 637 static int 638 il3945_get_measurement(struct il_priv *il, 639 struct ieee80211_measurement_params *params, u8 type) 640 { 641 struct il_spectrum_cmd spectrum; 642 struct il_rx_pkt *pkt; 643 struct il_host_cmd cmd = { 644 .id = C_SPECTRUM_MEASUREMENT, 645 .data = (void *)&spectrum, 646 .flags = CMD_WANT_SKB, 647 }; 648 u32 add_time = le64_to_cpu(params->start_time); 649 int rc; 650 int spectrum_resp_status; 651 int duration = le16_to_cpu(params->duration); 652 653 if (il_is_associated(il)) 654 add_time = 655 il_usecs_to_beacons(il, 656 le64_to_cpu(params->start_time) - 657 il->_3945.last_tsf, 658 le16_to_cpu(il->timing.beacon_interval)); 659 660 memset(&spectrum, 0, sizeof(spectrum)); 661 662 spectrum.channel_count = cpu_to_le16(1); 663 spectrum.flags = 664 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK; 665 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG; 666 cmd.len = sizeof(spectrum); 667 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len)); 668 669 if (il_is_associated(il)) 670 spectrum.start_time = 671 il_add_beacon_time(il, il->_3945.last_beacon_time, add_time, 672 le16_to_cpu(il->timing.beacon_interval)); 673 else 674 spectrum.start_time = 0; 675 676 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT); 677 spectrum.channels[0].channel = params->channel; 678 spectrum.channels[0].type = type; 679 if (il->active.flags & RXON_FLG_BAND_24G_MSK) 680 spectrum.flags |= 681 RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK | 682 RXON_FLG_TGG_PROTECT_MSK; 683 684 rc = il_send_cmd_sync(il, &cmd); 685 if (rc) 686 return rc; 687 688 pkt = (struct il_rx_pkt *)cmd.reply_page; 689 if (pkt->hdr.flags & IL_CMD_FAILED_MSK) { 690 IL_ERR("Bad return from N_RX_ON_ASSOC command\n"); 691 rc = -EIO; 692 } 693 694 spectrum_resp_status = le16_to_cpu(pkt->u.spectrum.status); 695 switch (spectrum_resp_status) { 696 case 0: /* Command will be handled */ 697 if (pkt->u.spectrum.id != 0xff) { 698 D_INFO("Replaced existing measurement: %d\n", 699 pkt->u.spectrum.id); 700 il->measurement_status &= ~MEASUREMENT_READY; 701 } 702 il->measurement_status |= MEASUREMENT_ACTIVE; 703 rc = 0; 704 break; 705 706 case 1: /* Command will not be handled */ 707 rc = -EAGAIN; 708 break; 709 } 710 711 il_free_pages(il, cmd.reply_page); 712 713 return rc; 714 } 715 716 static void 717 il3945_hdl_alive(struct il_priv *il, struct il_rx_buf *rxb) 718 { 719 struct il_rx_pkt *pkt = rxb_addr(rxb); 720 struct il_alive_resp *palive; 721 struct delayed_work *pwork; 722 723 palive = &pkt->u.alive_frame; 724 725 D_INFO("Alive ucode status 0x%08X revision " "0x%01X 0x%01X\n", 726 palive->is_valid, palive->ver_type, palive->ver_subtype); 727 728 if (palive->ver_subtype == INITIALIZE_SUBTYPE) { 729 D_INFO("Initialization Alive received.\n"); 730 memcpy(&il->card_alive_init, &pkt->u.alive_frame, 731 sizeof(struct il_alive_resp)); 732 pwork = &il->init_alive_start; 733 } else { 734 D_INFO("Runtime Alive received.\n"); 735 memcpy(&il->card_alive, &pkt->u.alive_frame, 736 sizeof(struct il_alive_resp)); 737 pwork = &il->alive_start; 738 il3945_disable_events(il); 739 } 740 741 /* We delay the ALIVE response by 5ms to 742 * give the HW RF Kill time to activate... */ 743 if (palive->is_valid == UCODE_VALID_OK) 744 queue_delayed_work(il->workqueue, pwork, msecs_to_jiffies(5)); 745 else 746 IL_WARN("uCode did not respond OK.\n"); 747 } 748 749 static void 750 il3945_hdl_add_sta(struct il_priv *il, struct il_rx_buf *rxb) 751 { 752 struct il_rx_pkt *pkt = rxb_addr(rxb); 753 754 D_RX("Received C_ADD_STA: 0x%02X\n", pkt->u.status); 755 } 756 757 static void 758 il3945_hdl_beacon(struct il_priv *il, struct il_rx_buf *rxb) 759 { 760 struct il_rx_pkt *pkt = rxb_addr(rxb); 761 struct il3945_beacon_notif *beacon = &(pkt->u.beacon_status); 762 #ifdef CONFIG_IWLEGACY_DEBUG 763 u8 rate = beacon->beacon_notify_hdr.rate; 764 765 D_RX("beacon status %x retries %d iss %d " "tsf %d %d rate %d\n", 766 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK, 767 beacon->beacon_notify_hdr.failure_frame, 768 le32_to_cpu(beacon->ibss_mgr_status), 769 le32_to_cpu(beacon->high_tsf), le32_to_cpu(beacon->low_tsf), rate); 770 #endif 771 772 il->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status); 773 774 } 775 776 /* Handle notification from uCode that card's power state is changing 777 * due to software, hardware, or critical temperature RFKILL */ 778 static void 779 il3945_hdl_card_state(struct il_priv *il, struct il_rx_buf *rxb) 780 { 781 struct il_rx_pkt *pkt = rxb_addr(rxb); 782 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags); 783 unsigned long status = il->status; 784 785 IL_WARN("Card state received: HW:%s SW:%s\n", 786 (flags & HW_CARD_DISABLED) ? "Kill" : "On", 787 (flags & SW_CARD_DISABLED) ? "Kill" : "On"); 788 789 _il_wr(il, CSR_UCODE_DRV_GP1_SET, CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); 790 791 if (flags & HW_CARD_DISABLED) 792 set_bit(S_RFKILL, &il->status); 793 else 794 clear_bit(S_RFKILL, &il->status); 795 796 il_scan_cancel(il); 797 798 if ((test_bit(S_RFKILL, &status) != 799 test_bit(S_RFKILL, &il->status))) 800 wiphy_rfkill_set_hw_state(il->hw->wiphy, 801 test_bit(S_RFKILL, &il->status)); 802 else 803 wake_up(&il->wait_command_queue); 804 } 805 806 /* 807 * il3945_setup_handlers - Initialize Rx handler callbacks 808 * 809 * Setup the RX handlers for each of the reply types sent from the uCode 810 * to the host. 811 * 812 * This function chains into the hardware specific files for them to setup 813 * any hardware specific handlers as well. 814 */ 815 static void 816 il3945_setup_handlers(struct il_priv *il) 817 { 818 il->handlers[N_ALIVE] = il3945_hdl_alive; 819 il->handlers[C_ADD_STA] = il3945_hdl_add_sta; 820 il->handlers[N_ERROR] = il_hdl_error; 821 il->handlers[N_CHANNEL_SWITCH] = il_hdl_csa; 822 il->handlers[N_SPECTRUM_MEASUREMENT] = il_hdl_spectrum_measurement; 823 il->handlers[N_PM_SLEEP] = il_hdl_pm_sleep; 824 il->handlers[N_PM_DEBUG_STATS] = il_hdl_pm_debug_stats; 825 il->handlers[N_BEACON] = il3945_hdl_beacon; 826 827 /* 828 * The same handler is used for both the REPLY to a discrete 829 * stats request from the host as well as for the periodic 830 * stats notifications (after received beacons) from the uCode. 831 */ 832 il->handlers[C_STATS] = il3945_hdl_c_stats; 833 il->handlers[N_STATS] = il3945_hdl_stats; 834 835 il_setup_rx_scan_handlers(il); 836 il->handlers[N_CARD_STATE] = il3945_hdl_card_state; 837 838 /* Set up hardware specific Rx handlers */ 839 il3945_hw_handler_setup(il); 840 } 841 842 /************************** RX-FUNCTIONS ****************************/ 843 /* 844 * Rx theory of operation 845 * 846 * The host allocates 32 DMA target addresses and passes the host address 847 * to the firmware at register IL_RFDS_TBL_LOWER + N * RFD_SIZE where N is 848 * 0 to 31 849 * 850 * Rx Queue Indexes 851 * The host/firmware share two idx registers for managing the Rx buffers. 852 * 853 * The READ idx maps to the first position that the firmware may be writing 854 * to -- the driver can read up to (but not including) this position and get 855 * good data. 856 * The READ idx is managed by the firmware once the card is enabled. 857 * 858 * The WRITE idx maps to the last position the driver has read from -- the 859 * position preceding WRITE is the last slot the firmware can place a packet. 860 * 861 * The queue is empty (no good data) if WRITE = READ - 1, and is full if 862 * WRITE = READ. 863 * 864 * During initialization, the host sets up the READ queue position to the first 865 * IDX position, and WRITE to the last (READ - 1 wrapped) 866 * 867 * When the firmware places a packet in a buffer, it will advance the READ idx 868 * and fire the RX interrupt. The driver can then query the READ idx and 869 * process as many packets as possible, moving the WRITE idx forward as it 870 * resets the Rx queue buffers with new memory. 871 * 872 * The management in the driver is as follows: 873 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When 874 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled 875 * to replenish the iwl->rxq->rx_free. 876 * + In il3945_rx_replenish (scheduled) if 'processed' != 'read' then the 877 * iwl->rxq is replenished and the READ IDX is updated (updating the 878 * 'processed' and 'read' driver idxes as well) 879 * + A received packet is processed and handed to the kernel network stack, 880 * detached from the iwl->rxq. The driver 'processed' idx is updated. 881 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free 882 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ 883 * IDX is not incremented and iwl->status(RX_STALLED) is set. If there 884 * were enough free buffers and RX_STALLED is set it is cleared. 885 * 886 * 887 * Driver sequence: 888 * 889 * il3945_rx_replenish() Replenishes rx_free list from rx_used, and calls 890 * il3945_rx_queue_restock 891 * il3945_rx_queue_restock() Moves available buffers from rx_free into Rx 892 * queue, updates firmware pointers, and updates 893 * the WRITE idx. If insufficient rx_free buffers 894 * are available, schedules il3945_rx_replenish 895 * 896 * -- enable interrupts -- 897 * ISR - il3945_rx() Detach il_rx_bufs from pool up to the 898 * READ IDX, detaching the SKB from the pool. 899 * Moves the packet buffer from queue to rx_used. 900 * Calls il3945_rx_queue_restock to refill any empty 901 * slots. 902 * ... 903 * 904 */ 905 906 /* 907 * il3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr 908 */ 909 static inline __le32 910 il3945_dma_addr2rbd_ptr(struct il_priv *il, dma_addr_t dma_addr) 911 { 912 return cpu_to_le32((u32) dma_addr); 913 } 914 915 /* 916 * il3945_rx_queue_restock - refill RX queue from pre-allocated pool 917 * 918 * If there are slots in the RX queue that need to be restocked, 919 * and we have free pre-allocated buffers, fill the ranks as much 920 * as we can, pulling from rx_free. 921 * 922 * This moves the 'write' idx forward to catch up with 'processed', and 923 * also updates the memory address in the firmware to reference the new 924 * target buffer. 925 */ 926 static void 927 il3945_rx_queue_restock(struct il_priv *il) 928 { 929 struct il_rx_queue *rxq = &il->rxq; 930 struct list_head *element; 931 struct il_rx_buf *rxb; 932 unsigned long flags; 933 934 spin_lock_irqsave(&rxq->lock, flags); 935 while (il_rx_queue_space(rxq) > 0 && rxq->free_count) { 936 /* Get next free Rx buffer, remove from free list */ 937 element = rxq->rx_free.next; 938 rxb = list_entry(element, struct il_rx_buf, list); 939 list_del(element); 940 941 /* Point to Rx buffer via next RBD in circular buffer */ 942 rxq->bd[rxq->write] = 943 il3945_dma_addr2rbd_ptr(il, rxb->page_dma); 944 rxq->queue[rxq->write] = rxb; 945 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK; 946 rxq->free_count--; 947 } 948 spin_unlock_irqrestore(&rxq->lock, flags); 949 /* If the pre-allocated buffer pool is dropping low, schedule to 950 * refill it */ 951 if (rxq->free_count <= RX_LOW_WATERMARK) 952 queue_work(il->workqueue, &il->rx_replenish); 953 954 /* If we've added more space for the firmware to place data, tell it. 955 * Increment device's write pointer in multiples of 8. */ 956 if (rxq->write_actual != (rxq->write & ~0x7) || 957 abs(rxq->write - rxq->read) > 7) { 958 spin_lock_irqsave(&rxq->lock, flags); 959 rxq->need_update = 1; 960 spin_unlock_irqrestore(&rxq->lock, flags); 961 il_rx_queue_update_write_ptr(il, rxq); 962 } 963 } 964 965 /* 966 * il3945_rx_replenish - Move all used packet from rx_used to rx_free 967 * 968 * When moving to rx_free an SKB is allocated for the slot. 969 * 970 * Also restock the Rx queue via il3945_rx_queue_restock. 971 * This is called as a scheduled work item (except for during initialization) 972 */ 973 static void 974 il3945_rx_allocate(struct il_priv *il, gfp_t priority) 975 { 976 struct il_rx_queue *rxq = &il->rxq; 977 struct list_head *element; 978 struct il_rx_buf *rxb; 979 struct page *page; 980 dma_addr_t page_dma; 981 unsigned long flags; 982 983 while (1) { 984 gfp_t gfp_mask = priority; 985 986 spin_lock_irqsave(&rxq->lock, flags); 987 if (list_empty(&rxq->rx_used)) { 988 spin_unlock_irqrestore(&rxq->lock, flags); 989 return; 990 } 991 spin_unlock_irqrestore(&rxq->lock, flags); 992 993 if (rxq->free_count > RX_LOW_WATERMARK) 994 gfp_mask |= __GFP_NOWARN; 995 996 if (il->hw_params.rx_page_order > 0) 997 gfp_mask |= __GFP_COMP; 998 999 /* Alloc a new receive buffer */ 1000 page = alloc_pages(gfp_mask, il->hw_params.rx_page_order); 1001 if (!page) { 1002 if (net_ratelimit()) 1003 D_INFO("Failed to allocate SKB buffer.\n"); 1004 if (rxq->free_count <= RX_LOW_WATERMARK && 1005 net_ratelimit()) 1006 IL_ERR("Failed to allocate SKB buffer with %pGg. " 1007 "Only %u free buffers remaining.\n", 1008 &gfp_mask, rxq->free_count); 1009 /* We don't reschedule replenish work here -- we will 1010 * call the restock method and if it still needs 1011 * more buffers it will schedule replenish */ 1012 break; 1013 } 1014 1015 /* Get physical address of RB/SKB */ 1016 page_dma = 1017 dma_map_page(&il->pci_dev->dev, page, 0, 1018 PAGE_SIZE << il->hw_params.rx_page_order, 1019 DMA_FROM_DEVICE); 1020 1021 if (unlikely(dma_mapping_error(&il->pci_dev->dev, page_dma))) { 1022 __free_pages(page, il->hw_params.rx_page_order); 1023 break; 1024 } 1025 1026 spin_lock_irqsave(&rxq->lock, flags); 1027 1028 if (list_empty(&rxq->rx_used)) { 1029 spin_unlock_irqrestore(&rxq->lock, flags); 1030 dma_unmap_page(&il->pci_dev->dev, page_dma, 1031 PAGE_SIZE << il->hw_params.rx_page_order, 1032 DMA_FROM_DEVICE); 1033 __free_pages(page, il->hw_params.rx_page_order); 1034 return; 1035 } 1036 1037 element = rxq->rx_used.next; 1038 rxb = list_entry(element, struct il_rx_buf, list); 1039 list_del(element); 1040 1041 rxb->page = page; 1042 rxb->page_dma = page_dma; 1043 list_add_tail(&rxb->list, &rxq->rx_free); 1044 rxq->free_count++; 1045 il->alloc_rxb_page++; 1046 1047 spin_unlock_irqrestore(&rxq->lock, flags); 1048 } 1049 } 1050 1051 void 1052 il3945_rx_queue_reset(struct il_priv *il, struct il_rx_queue *rxq) 1053 { 1054 unsigned long flags; 1055 int i; 1056 spin_lock_irqsave(&rxq->lock, flags); 1057 INIT_LIST_HEAD(&rxq->rx_free); 1058 INIT_LIST_HEAD(&rxq->rx_used); 1059 /* Fill the rx_used queue with _all_ of the Rx buffers */ 1060 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) { 1061 /* In the reset function, these buffers may have been allocated 1062 * to an SKB, so we need to unmap and free potential storage */ 1063 if (rxq->pool[i].page != NULL) { 1064 dma_unmap_page(&il->pci_dev->dev, 1065 rxq->pool[i].page_dma, 1066 PAGE_SIZE << il->hw_params.rx_page_order, 1067 DMA_FROM_DEVICE); 1068 __il_free_pages(il, rxq->pool[i].page); 1069 rxq->pool[i].page = NULL; 1070 } 1071 list_add_tail(&rxq->pool[i].list, &rxq->rx_used); 1072 } 1073 1074 /* Set us so that we have processed and used all buffers, but have 1075 * not restocked the Rx queue with fresh buffers */ 1076 rxq->read = rxq->write = 0; 1077 rxq->write_actual = 0; 1078 rxq->free_count = 0; 1079 spin_unlock_irqrestore(&rxq->lock, flags); 1080 } 1081 1082 void 1083 il3945_rx_replenish(void *data) 1084 { 1085 struct il_priv *il = data; 1086 unsigned long flags; 1087 1088 il3945_rx_allocate(il, GFP_KERNEL); 1089 1090 spin_lock_irqsave(&il->lock, flags); 1091 il3945_rx_queue_restock(il); 1092 spin_unlock_irqrestore(&il->lock, flags); 1093 } 1094 1095 static void 1096 il3945_rx_replenish_now(struct il_priv *il) 1097 { 1098 il3945_rx_allocate(il, GFP_ATOMIC); 1099 1100 il3945_rx_queue_restock(il); 1101 } 1102 1103 /* Assumes that the skb field of the buffers in 'pool' is kept accurate. 1104 * If an SKB has been detached, the POOL needs to have its SKB set to NULL 1105 * This free routine walks the list of POOL entries and if SKB is set to 1106 * non NULL it is unmapped and freed 1107 */ 1108 static void 1109 il3945_rx_queue_free(struct il_priv *il, struct il_rx_queue *rxq) 1110 { 1111 int i; 1112 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) { 1113 if (rxq->pool[i].page != NULL) { 1114 dma_unmap_page(&il->pci_dev->dev, 1115 rxq->pool[i].page_dma, 1116 PAGE_SIZE << il->hw_params.rx_page_order, 1117 DMA_FROM_DEVICE); 1118 __il_free_pages(il, rxq->pool[i].page); 1119 rxq->pool[i].page = NULL; 1120 } 1121 } 1122 1123 dma_free_coherent(&il->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd, 1124 rxq->bd_dma); 1125 dma_free_coherent(&il->pci_dev->dev, sizeof(struct il_rb_status), 1126 rxq->rb_stts, rxq->rb_stts_dma); 1127 rxq->bd = NULL; 1128 rxq->rb_stts = NULL; 1129 } 1130 1131 /* 1132 * il3945_rx_handle - Main entry function for receiving responses from uCode 1133 * 1134 * Uses the il->handlers callback function array to invoke 1135 * the appropriate handlers, including command responses, 1136 * frame-received notifications, and other notifications. 1137 */ 1138 static void 1139 il3945_rx_handle(struct il_priv *il) 1140 { 1141 struct il_rx_buf *rxb; 1142 struct il_rx_pkt *pkt; 1143 struct il_rx_queue *rxq = &il->rxq; 1144 u32 r, i; 1145 int reclaim; 1146 unsigned long flags; 1147 u8 fill_rx = 0; 1148 u32 count = 8; 1149 int total_empty = 0; 1150 1151 /* uCode's read idx (stored in shared DRAM) indicates the last Rx 1152 * buffer that the driver may process (last buffer filled by ucode). */ 1153 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF; 1154 i = rxq->read; 1155 1156 /* calculate total frames need to be restock after handling RX */ 1157 total_empty = r - rxq->write_actual; 1158 if (total_empty < 0) 1159 total_empty += RX_QUEUE_SIZE; 1160 1161 if (total_empty > (RX_QUEUE_SIZE / 2)) 1162 fill_rx = 1; 1163 /* Rx interrupt, but nothing sent from uCode */ 1164 if (i == r) 1165 D_RX("r = %d, i = %d\n", r, i); 1166 1167 while (i != r) { 1168 rxb = rxq->queue[i]; 1169 1170 /* If an RXB doesn't have a Rx queue slot associated with it, 1171 * then a bug has been introduced in the queue refilling 1172 * routines -- catch it here */ 1173 BUG_ON(rxb == NULL); 1174 1175 rxq->queue[i] = NULL; 1176 1177 dma_unmap_page(&il->pci_dev->dev, rxb->page_dma, 1178 PAGE_SIZE << il->hw_params.rx_page_order, 1179 DMA_FROM_DEVICE); 1180 pkt = rxb_addr(rxb); 1181 reclaim = il_need_reclaim(il, pkt); 1182 1183 /* Based on type of command response or notification, 1184 * handle those that need handling via function in 1185 * handlers table. See il3945_setup_handlers() */ 1186 if (il->handlers[pkt->hdr.cmd]) { 1187 D_RX("r = %d, i = %d, %s, 0x%02x\n", r, i, 1188 il_get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd); 1189 il->isr_stats.handlers[pkt->hdr.cmd]++; 1190 il->handlers[pkt->hdr.cmd] (il, rxb); 1191 } else { 1192 /* No handling needed */ 1193 D_RX("r %d i %d No handler needed for %s, 0x%02x\n", r, 1194 i, il_get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd); 1195 } 1196 1197 /* 1198 * XXX: After here, we should always check rxb->page 1199 * against NULL before touching it or its virtual 1200 * memory (pkt). Because some handler might have 1201 * already taken or freed the pages. 1202 */ 1203 1204 if (reclaim) { 1205 /* Invoke any callbacks, transfer the buffer to caller, 1206 * and fire off the (possibly) blocking il_send_cmd() 1207 * as we reclaim the driver command queue */ 1208 if (rxb->page) 1209 il_tx_cmd_complete(il, rxb); 1210 else 1211 IL_WARN("Claim null rxb?\n"); 1212 } 1213 1214 /* Reuse the page if possible. For notification packets and 1215 * SKBs that fail to Rx correctly, add them back into the 1216 * rx_free list for reuse later. */ 1217 spin_lock_irqsave(&rxq->lock, flags); 1218 if (rxb->page != NULL) { 1219 rxb->page_dma = 1220 dma_map_page(&il->pci_dev->dev, rxb->page, 0, 1221 PAGE_SIZE << il->hw_params.rx_page_order, 1222 DMA_FROM_DEVICE); 1223 if (unlikely(dma_mapping_error(&il->pci_dev->dev, 1224 rxb->page_dma))) { 1225 __il_free_pages(il, rxb->page); 1226 rxb->page = NULL; 1227 list_add_tail(&rxb->list, &rxq->rx_used); 1228 } else { 1229 list_add_tail(&rxb->list, &rxq->rx_free); 1230 rxq->free_count++; 1231 } 1232 } else 1233 list_add_tail(&rxb->list, &rxq->rx_used); 1234 1235 spin_unlock_irqrestore(&rxq->lock, flags); 1236 1237 i = (i + 1) & RX_QUEUE_MASK; 1238 /* If there are a lot of unused frames, 1239 * restock the Rx queue so ucode won't assert. */ 1240 if (fill_rx) { 1241 count++; 1242 if (count >= 8) { 1243 rxq->read = i; 1244 il3945_rx_replenish_now(il); 1245 count = 0; 1246 } 1247 } 1248 } 1249 1250 /* Backtrack one entry */ 1251 rxq->read = i; 1252 if (fill_rx) 1253 il3945_rx_replenish_now(il); 1254 else 1255 il3945_rx_queue_restock(il); 1256 } 1257 1258 /* call this function to flush any scheduled tasklet */ 1259 static inline void 1260 il3945_synchronize_irq(struct il_priv *il) 1261 { 1262 /* wait to make sure we flush pending tasklet */ 1263 synchronize_irq(il->pci_dev->irq); 1264 tasklet_kill(&il->irq_tasklet); 1265 } 1266 1267 static const char * 1268 il3945_desc_lookup(int i) 1269 { 1270 switch (i) { 1271 case 1: 1272 return "FAIL"; 1273 case 2: 1274 return "BAD_PARAM"; 1275 case 3: 1276 return "BAD_CHECKSUM"; 1277 case 4: 1278 return "NMI_INTERRUPT"; 1279 case 5: 1280 return "SYSASSERT"; 1281 case 6: 1282 return "FATAL_ERROR"; 1283 } 1284 1285 return "UNKNOWN"; 1286 } 1287 1288 #define ERROR_START_OFFSET (1 * sizeof(u32)) 1289 #define ERROR_ELEM_SIZE (7 * sizeof(u32)) 1290 1291 void 1292 il3945_dump_nic_error_log(struct il_priv *il) 1293 { 1294 u32 i; 1295 u32 desc, time, count, base, data1; 1296 u32 blink1, blink2, ilink1, ilink2; 1297 1298 base = le32_to_cpu(il->card_alive.error_event_table_ptr); 1299 1300 if (!il3945_hw_valid_rtc_data_addr(base)) { 1301 IL_ERR("Not valid error log pointer 0x%08X\n", base); 1302 return; 1303 } 1304 1305 count = il_read_targ_mem(il, base); 1306 1307 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) { 1308 IL_ERR("Start IWL Error Log Dump:\n"); 1309 IL_ERR("Status: 0x%08lX, count: %d\n", il->status, count); 1310 } 1311 1312 IL_ERR("Desc Time asrtPC blink2 " 1313 "ilink1 nmiPC Line\n"); 1314 for (i = ERROR_START_OFFSET; 1315 i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET; 1316 i += ERROR_ELEM_SIZE) { 1317 desc = il_read_targ_mem(il, base + i); 1318 time = il_read_targ_mem(il, base + i + 1 * sizeof(u32)); 1319 blink1 = il_read_targ_mem(il, base + i + 2 * sizeof(u32)); 1320 blink2 = il_read_targ_mem(il, base + i + 3 * sizeof(u32)); 1321 ilink1 = il_read_targ_mem(il, base + i + 4 * sizeof(u32)); 1322 ilink2 = il_read_targ_mem(il, base + i + 5 * sizeof(u32)); 1323 data1 = il_read_targ_mem(il, base + i + 6 * sizeof(u32)); 1324 1325 IL_ERR("%-13s (0x%X) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n", 1326 il3945_desc_lookup(desc), desc, time, blink1, blink2, 1327 ilink1, ilink2, data1); 1328 } 1329 } 1330 1331 static void 1332 il3945_irq_tasklet(struct tasklet_struct *t) 1333 { 1334 struct il_priv *il = from_tasklet(il, t, irq_tasklet); 1335 u32 inta, handled = 0; 1336 u32 inta_fh; 1337 unsigned long flags; 1338 #ifdef CONFIG_IWLEGACY_DEBUG 1339 u32 inta_mask; 1340 #endif 1341 1342 spin_lock_irqsave(&il->lock, flags); 1343 1344 /* Ack/clear/reset pending uCode interrupts. 1345 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS, 1346 * and will clear only when CSR_FH_INT_STATUS gets cleared. */ 1347 inta = _il_rd(il, CSR_INT); 1348 _il_wr(il, CSR_INT, inta); 1349 1350 /* Ack/clear/reset pending flow-handler (DMA) interrupts. 1351 * Any new interrupts that happen after this, either while we're 1352 * in this tasklet, or later, will show up in next ISR/tasklet. */ 1353 inta_fh = _il_rd(il, CSR_FH_INT_STATUS); 1354 _il_wr(il, CSR_FH_INT_STATUS, inta_fh); 1355 1356 #ifdef CONFIG_IWLEGACY_DEBUG 1357 if (il_get_debug_level(il) & IL_DL_ISR) { 1358 /* just for debug */ 1359 inta_mask = _il_rd(il, CSR_INT_MASK); 1360 D_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", inta, 1361 inta_mask, inta_fh); 1362 } 1363 #endif 1364 1365 spin_unlock_irqrestore(&il->lock, flags); 1366 1367 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not 1368 * atomic, make sure that inta covers all the interrupts that 1369 * we've discovered, even if FH interrupt came in just after 1370 * reading CSR_INT. */ 1371 if (inta_fh & CSR39_FH_INT_RX_MASK) 1372 inta |= CSR_INT_BIT_FH_RX; 1373 if (inta_fh & CSR39_FH_INT_TX_MASK) 1374 inta |= CSR_INT_BIT_FH_TX; 1375 1376 /* Now service all interrupt bits discovered above. */ 1377 if (inta & CSR_INT_BIT_HW_ERR) { 1378 IL_ERR("Hardware error detected. Restarting.\n"); 1379 1380 /* Tell the device to stop sending interrupts */ 1381 il_disable_interrupts(il); 1382 1383 il->isr_stats.hw++; 1384 il_irq_handle_error(il); 1385 1386 handled |= CSR_INT_BIT_HW_ERR; 1387 1388 return; 1389 } 1390 #ifdef CONFIG_IWLEGACY_DEBUG 1391 if (il_get_debug_level(il) & (IL_DL_ISR)) { 1392 /* NIC fires this, but we don't use it, redundant with WAKEUP */ 1393 if (inta & CSR_INT_BIT_SCD) { 1394 D_ISR("Scheduler finished to transmit " 1395 "the frame/frames.\n"); 1396 il->isr_stats.sch++; 1397 } 1398 1399 /* Alive notification via Rx interrupt will do the real work */ 1400 if (inta & CSR_INT_BIT_ALIVE) { 1401 D_ISR("Alive interrupt\n"); 1402 il->isr_stats.alive++; 1403 } 1404 } 1405 #endif 1406 /* Safely ignore these bits for debug checks below */ 1407 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE); 1408 1409 /* Error detected by uCode */ 1410 if (inta & CSR_INT_BIT_SW_ERR) { 1411 IL_ERR("Microcode SW error detected. " "Restarting 0x%X.\n", 1412 inta); 1413 il->isr_stats.sw++; 1414 il_irq_handle_error(il); 1415 handled |= CSR_INT_BIT_SW_ERR; 1416 } 1417 1418 /* uCode wakes up after power-down sleep */ 1419 if (inta & CSR_INT_BIT_WAKEUP) { 1420 D_ISR("Wakeup interrupt\n"); 1421 il_rx_queue_update_write_ptr(il, &il->rxq); 1422 1423 spin_lock_irqsave(&il->lock, flags); 1424 il_txq_update_write_ptr(il, &il->txq[0]); 1425 il_txq_update_write_ptr(il, &il->txq[1]); 1426 il_txq_update_write_ptr(il, &il->txq[2]); 1427 il_txq_update_write_ptr(il, &il->txq[3]); 1428 il_txq_update_write_ptr(il, &il->txq[4]); 1429 spin_unlock_irqrestore(&il->lock, flags); 1430 1431 il->isr_stats.wakeup++; 1432 handled |= CSR_INT_BIT_WAKEUP; 1433 } 1434 1435 /* All uCode command responses, including Tx command responses, 1436 * Rx "responses" (frame-received notification), and other 1437 * notifications from uCode come through here*/ 1438 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) { 1439 il3945_rx_handle(il); 1440 il->isr_stats.rx++; 1441 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX); 1442 } 1443 1444 if (inta & CSR_INT_BIT_FH_TX) { 1445 D_ISR("Tx interrupt\n"); 1446 il->isr_stats.tx++; 1447 1448 _il_wr(il, CSR_FH_INT_STATUS, (1 << 6)); 1449 il_wr(il, FH39_TCSR_CREDIT(FH39_SRVC_CHNL), 0x0); 1450 handled |= CSR_INT_BIT_FH_TX; 1451 } 1452 1453 if (inta & ~handled) { 1454 IL_ERR("Unhandled INTA bits 0x%08x\n", inta & ~handled); 1455 il->isr_stats.unhandled++; 1456 } 1457 1458 if (inta & ~il->inta_mask) { 1459 IL_WARN("Disabled INTA bits 0x%08x were pending\n", 1460 inta & ~il->inta_mask); 1461 IL_WARN(" with inta_fh = 0x%08x\n", inta_fh); 1462 } 1463 1464 /* Re-enable all interrupts */ 1465 /* only Re-enable if disabled by irq */ 1466 if (test_bit(S_INT_ENABLED, &il->status)) 1467 il_enable_interrupts(il); 1468 1469 #ifdef CONFIG_IWLEGACY_DEBUG 1470 if (il_get_debug_level(il) & (IL_DL_ISR)) { 1471 inta = _il_rd(il, CSR_INT); 1472 inta_mask = _il_rd(il, CSR_INT_MASK); 1473 inta_fh = _il_rd(il, CSR_FH_INT_STATUS); 1474 D_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, " 1475 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags); 1476 } 1477 #endif 1478 } 1479 1480 static int 1481 il3945_get_channels_for_scan(struct il_priv *il, enum nl80211_band band, 1482 u8 is_active, u8 n_probes, 1483 struct il3945_scan_channel *scan_ch, 1484 struct ieee80211_vif *vif) 1485 { 1486 struct ieee80211_channel *chan; 1487 const struct ieee80211_supported_band *sband; 1488 const struct il_channel_info *ch_info; 1489 u16 passive_dwell = 0; 1490 u16 active_dwell = 0; 1491 int added, i; 1492 1493 sband = il_get_hw_mode(il, band); 1494 if (!sband) 1495 return 0; 1496 1497 active_dwell = il_get_active_dwell_time(il, band, n_probes); 1498 passive_dwell = il_get_passive_dwell_time(il, band, vif); 1499 1500 if (passive_dwell <= active_dwell) 1501 passive_dwell = active_dwell + 1; 1502 1503 for (i = 0, added = 0; i < il->scan_request->n_channels; i++) { 1504 chan = il->scan_request->channels[i]; 1505 1506 if (chan->band != band) 1507 continue; 1508 1509 scan_ch->channel = chan->hw_value; 1510 1511 ch_info = il_get_channel_info(il, band, scan_ch->channel); 1512 if (!il_is_channel_valid(ch_info)) { 1513 D_SCAN("Channel %d is INVALID for this band.\n", 1514 scan_ch->channel); 1515 continue; 1516 } 1517 1518 scan_ch->active_dwell = cpu_to_le16(active_dwell); 1519 scan_ch->passive_dwell = cpu_to_le16(passive_dwell); 1520 /* If passive , set up for auto-switch 1521 * and use long active_dwell time. 1522 */ 1523 if (!is_active || il_is_channel_passive(ch_info) || 1524 (chan->flags & IEEE80211_CHAN_NO_IR)) { 1525 scan_ch->type = 0; /* passive */ 1526 if (IL_UCODE_API(il->ucode_ver) == 1) 1527 scan_ch->active_dwell = 1528 cpu_to_le16(passive_dwell - 1); 1529 } else { 1530 scan_ch->type = 1; /* active */ 1531 } 1532 1533 /* Set direct probe bits. These may be used both for active 1534 * scan channels (probes gets sent right away), 1535 * or for passive channels (probes get se sent only after 1536 * hearing clear Rx packet).*/ 1537 if (IL_UCODE_API(il->ucode_ver) >= 2) { 1538 if (n_probes) 1539 scan_ch->type |= IL39_SCAN_PROBE_MASK(n_probes); 1540 } else { 1541 /* uCode v1 does not allow setting direct probe bits on 1542 * passive channel. */ 1543 if ((scan_ch->type & 1) && n_probes) 1544 scan_ch->type |= IL39_SCAN_PROBE_MASK(n_probes); 1545 } 1546 1547 /* Set txpower levels to defaults */ 1548 scan_ch->tpc.dsp_atten = 110; 1549 /* scan_pwr_info->tpc.dsp_atten; */ 1550 1551 /*scan_pwr_info->tpc.tx_gain; */ 1552 if (band == NL80211_BAND_5GHZ) 1553 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3; 1554 else { 1555 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3)); 1556 /* NOTE: if we were doing 6Mb OFDM for scans we'd use 1557 * power level: 1558 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3; 1559 */ 1560 } 1561 1562 D_SCAN("Scanning %d [%s %d]\n", scan_ch->channel, 1563 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE", 1564 (scan_ch->type & 1) ? active_dwell : passive_dwell); 1565 1566 scan_ch++; 1567 added++; 1568 } 1569 1570 D_SCAN("total channels to scan %d\n", added); 1571 return added; 1572 } 1573 1574 static void 1575 il3945_init_hw_rates(struct il_priv *il, struct ieee80211_rate *rates) 1576 { 1577 int i; 1578 1579 for (i = 0; i < RATE_COUNT_LEGACY; i++) { 1580 rates[i].bitrate = il3945_rates[i].ieee * 5; 1581 rates[i].hw_value = i; /* Rate scaling will work on idxes */ 1582 rates[i].hw_value_short = i; 1583 rates[i].flags = 0; 1584 if (i > IL39_LAST_OFDM_RATE || i < IL_FIRST_OFDM_RATE) { 1585 /* 1586 * If CCK != 1M then set short preamble rate flag. 1587 */ 1588 rates[i].flags |= 1589 (il3945_rates[i].plcp == 1590 10) ? 0 : IEEE80211_RATE_SHORT_PREAMBLE; 1591 } 1592 } 1593 } 1594 1595 /****************************************************************************** 1596 * 1597 * uCode download functions 1598 * 1599 ******************************************************************************/ 1600 1601 static void 1602 il3945_dealloc_ucode_pci(struct il_priv *il) 1603 { 1604 il_free_fw_desc(il->pci_dev, &il->ucode_code); 1605 il_free_fw_desc(il->pci_dev, &il->ucode_data); 1606 il_free_fw_desc(il->pci_dev, &il->ucode_data_backup); 1607 il_free_fw_desc(il->pci_dev, &il->ucode_init); 1608 il_free_fw_desc(il->pci_dev, &il->ucode_init_data); 1609 il_free_fw_desc(il->pci_dev, &il->ucode_boot); 1610 } 1611 1612 /* 1613 * il3945_verify_inst_full - verify runtime uCode image in card vs. host, 1614 * looking at all data. 1615 */ 1616 static int 1617 il3945_verify_inst_full(struct il_priv *il, __le32 * image, u32 len) 1618 { 1619 u32 val; 1620 u32 save_len = len; 1621 int rc = 0; 1622 u32 errcnt; 1623 1624 D_INFO("ucode inst image size is %u\n", len); 1625 1626 il_wr(il, HBUS_TARG_MEM_RADDR, IL39_RTC_INST_LOWER_BOUND); 1627 1628 errcnt = 0; 1629 for (; len > 0; len -= sizeof(u32), image++) { 1630 /* read data comes through single port, auto-incr addr */ 1631 /* NOTE: Use the debugless read so we don't flood kernel log 1632 * if IL_DL_IO is set */ 1633 val = _il_rd(il, HBUS_TARG_MEM_RDAT); 1634 if (val != le32_to_cpu(*image)) { 1635 IL_ERR("uCode INST section is invalid at " 1636 "offset 0x%x, is 0x%x, s/b 0x%x\n", 1637 save_len - len, val, le32_to_cpu(*image)); 1638 rc = -EIO; 1639 errcnt++; 1640 if (errcnt >= 20) 1641 break; 1642 } 1643 } 1644 1645 if (!errcnt) 1646 D_INFO("ucode image in INSTRUCTION memory is good\n"); 1647 1648 return rc; 1649 } 1650 1651 /* 1652 * il3945_verify_inst_sparse - verify runtime uCode image in card vs. host, 1653 * using sample data 100 bytes apart. If these sample points are good, 1654 * it's a pretty good bet that everything between them is good, too. 1655 */ 1656 static int 1657 il3945_verify_inst_sparse(struct il_priv *il, __le32 * image, u32 len) 1658 { 1659 u32 val; 1660 int rc = 0; 1661 u32 errcnt = 0; 1662 u32 i; 1663 1664 D_INFO("ucode inst image size is %u\n", len); 1665 1666 for (i = 0; i < len; i += 100, image += 100 / sizeof(u32)) { 1667 /* read data comes through single port, auto-incr addr */ 1668 /* NOTE: Use the debugless read so we don't flood kernel log 1669 * if IL_DL_IO is set */ 1670 il_wr(il, HBUS_TARG_MEM_RADDR, i + IL39_RTC_INST_LOWER_BOUND); 1671 val = _il_rd(il, HBUS_TARG_MEM_RDAT); 1672 if (val != le32_to_cpu(*image)) { 1673 #if 0 /* Enable this if you want to see details */ 1674 IL_ERR("uCode INST section is invalid at " 1675 "offset 0x%x, is 0x%x, s/b 0x%x\n", i, val, 1676 *image); 1677 #endif 1678 rc = -EIO; 1679 errcnt++; 1680 if (errcnt >= 3) 1681 break; 1682 } 1683 } 1684 1685 return rc; 1686 } 1687 1688 /* 1689 * il3945_verify_ucode - determine which instruction image is in SRAM, 1690 * and verify its contents 1691 */ 1692 static int 1693 il3945_verify_ucode(struct il_priv *il) 1694 { 1695 __le32 *image; 1696 u32 len; 1697 int rc = 0; 1698 1699 /* Try bootstrap */ 1700 image = (__le32 *) il->ucode_boot.v_addr; 1701 len = il->ucode_boot.len; 1702 rc = il3945_verify_inst_sparse(il, image, len); 1703 if (rc == 0) { 1704 D_INFO("Bootstrap uCode is good in inst SRAM\n"); 1705 return 0; 1706 } 1707 1708 /* Try initialize */ 1709 image = (__le32 *) il->ucode_init.v_addr; 1710 len = il->ucode_init.len; 1711 rc = il3945_verify_inst_sparse(il, image, len); 1712 if (rc == 0) { 1713 D_INFO("Initialize uCode is good in inst SRAM\n"); 1714 return 0; 1715 } 1716 1717 /* Try runtime/protocol */ 1718 image = (__le32 *) il->ucode_code.v_addr; 1719 len = il->ucode_code.len; 1720 rc = il3945_verify_inst_sparse(il, image, len); 1721 if (rc == 0) { 1722 D_INFO("Runtime uCode is good in inst SRAM\n"); 1723 return 0; 1724 } 1725 1726 IL_ERR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n"); 1727 1728 /* Since nothing seems to match, show first several data entries in 1729 * instruction SRAM, so maybe visual inspection will give a clue. 1730 * Selection of bootstrap image (vs. other images) is arbitrary. */ 1731 image = (__le32 *) il->ucode_boot.v_addr; 1732 len = il->ucode_boot.len; 1733 rc = il3945_verify_inst_full(il, image, len); 1734 1735 return rc; 1736 } 1737 1738 static void 1739 il3945_nic_start(struct il_priv *il) 1740 { 1741 /* Remove all resets to allow NIC to operate */ 1742 _il_wr(il, CSR_RESET, 0); 1743 } 1744 1745 #define IL3945_UCODE_GET(item) \ 1746 static u32 il3945_ucode_get_##item(const struct il_ucode_header *ucode)\ 1747 { \ 1748 return le32_to_cpu(ucode->v1.item); \ 1749 } 1750 1751 static u32 1752 il3945_ucode_get_header_size(u32 api_ver) 1753 { 1754 return 24; 1755 } 1756 1757 static u8 * 1758 il3945_ucode_get_data(const struct il_ucode_header *ucode) 1759 { 1760 return (u8 *) ucode->v1.data; 1761 } 1762 1763 IL3945_UCODE_GET(inst_size); 1764 IL3945_UCODE_GET(data_size); 1765 IL3945_UCODE_GET(init_size); 1766 IL3945_UCODE_GET(init_data_size); 1767 IL3945_UCODE_GET(boot_size); 1768 1769 /* 1770 * il3945_read_ucode - Read uCode images from disk file. 1771 * 1772 * Copy into buffers for card to fetch via bus-mastering 1773 */ 1774 static int 1775 il3945_read_ucode(struct il_priv *il) 1776 { 1777 const struct il_ucode_header *ucode; 1778 int ret = -EINVAL, idx; 1779 const struct firmware *ucode_raw; 1780 /* firmware file name contains uCode/driver compatibility version */ 1781 const char *name_pre = il->cfg->fw_name_pre; 1782 const unsigned int api_max = il->cfg->ucode_api_max; 1783 const unsigned int api_min = il->cfg->ucode_api_min; 1784 char buf[25]; 1785 u8 *src; 1786 size_t len; 1787 u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size; 1788 1789 /* Ask kernel firmware_class module to get the boot firmware off disk. 1790 * request_firmware() is synchronous, file is in memory on return. */ 1791 for (idx = api_max; idx >= api_min; idx--) { 1792 sprintf(buf, "%s%u%s", name_pre, idx, ".ucode"); 1793 ret = request_firmware(&ucode_raw, buf, &il->pci_dev->dev); 1794 if (ret < 0) { 1795 IL_ERR("%s firmware file req failed: %d\n", buf, ret); 1796 if (ret == -ENOENT) 1797 continue; 1798 else 1799 goto error; 1800 } else { 1801 if (idx < api_max) 1802 IL_ERR("Loaded firmware %s, " 1803 "which is deprecated. " 1804 " Please use API v%u instead.\n", buf, 1805 api_max); 1806 D_INFO("Got firmware '%s' file " 1807 "(%zd bytes) from disk\n", buf, ucode_raw->size); 1808 break; 1809 } 1810 } 1811 1812 if (ret < 0) 1813 goto error; 1814 1815 /* Make sure that we got at least our header! */ 1816 if (ucode_raw->size < il3945_ucode_get_header_size(1)) { 1817 IL_ERR("File size way too small!\n"); 1818 ret = -EINVAL; 1819 goto err_release; 1820 } 1821 1822 /* Data from ucode file: header followed by uCode images */ 1823 ucode = (struct il_ucode_header *)ucode_raw->data; 1824 1825 il->ucode_ver = le32_to_cpu(ucode->ver); 1826 api_ver = IL_UCODE_API(il->ucode_ver); 1827 inst_size = il3945_ucode_get_inst_size(ucode); 1828 data_size = il3945_ucode_get_data_size(ucode); 1829 init_size = il3945_ucode_get_init_size(ucode); 1830 init_data_size = il3945_ucode_get_init_data_size(ucode); 1831 boot_size = il3945_ucode_get_boot_size(ucode); 1832 src = il3945_ucode_get_data(ucode); 1833 1834 /* api_ver should match the api version forming part of the 1835 * firmware filename ... but we don't check for that and only rely 1836 * on the API version read from firmware header from here on forward */ 1837 1838 if (api_ver < api_min || api_ver > api_max) { 1839 IL_ERR("Driver unable to support your firmware API. " 1840 "Driver supports v%u, firmware is v%u.\n", api_max, 1841 api_ver); 1842 il->ucode_ver = 0; 1843 ret = -EINVAL; 1844 goto err_release; 1845 } 1846 if (api_ver != api_max) 1847 IL_ERR("Firmware has old API version. Expected %u, " 1848 "got %u. New firmware can be obtained " 1849 "from http://www.intellinuxwireless.org.\n", api_max, 1850 api_ver); 1851 1852 IL_INFO("loaded firmware version %u.%u.%u.%u\n", 1853 IL_UCODE_MAJOR(il->ucode_ver), IL_UCODE_MINOR(il->ucode_ver), 1854 IL_UCODE_API(il->ucode_ver), IL_UCODE_SERIAL(il->ucode_ver)); 1855 1856 snprintf(il->hw->wiphy->fw_version, sizeof(il->hw->wiphy->fw_version), 1857 "%u.%u.%u.%u", IL_UCODE_MAJOR(il->ucode_ver), 1858 IL_UCODE_MINOR(il->ucode_ver), IL_UCODE_API(il->ucode_ver), 1859 IL_UCODE_SERIAL(il->ucode_ver)); 1860 1861 D_INFO("f/w package hdr ucode version raw = 0x%x\n", il->ucode_ver); 1862 D_INFO("f/w package hdr runtime inst size = %u\n", inst_size); 1863 D_INFO("f/w package hdr runtime data size = %u\n", data_size); 1864 D_INFO("f/w package hdr init inst size = %u\n", init_size); 1865 D_INFO("f/w package hdr init data size = %u\n", init_data_size); 1866 D_INFO("f/w package hdr boot inst size = %u\n", boot_size); 1867 1868 /* Verify size of file vs. image size info in file's header */ 1869 if (ucode_raw->size != 1870 il3945_ucode_get_header_size(api_ver) + inst_size + data_size + 1871 init_size + init_data_size + boot_size) { 1872 1873 D_INFO("uCode file size %zd does not match expected size\n", 1874 ucode_raw->size); 1875 ret = -EINVAL; 1876 goto err_release; 1877 } 1878 1879 /* Verify that uCode images will fit in card's SRAM */ 1880 if (inst_size > IL39_MAX_INST_SIZE) { 1881 D_INFO("uCode instr len %d too large to fit in\n", inst_size); 1882 ret = -EINVAL; 1883 goto err_release; 1884 } 1885 1886 if (data_size > IL39_MAX_DATA_SIZE) { 1887 D_INFO("uCode data len %d too large to fit in\n", data_size); 1888 ret = -EINVAL; 1889 goto err_release; 1890 } 1891 if (init_size > IL39_MAX_INST_SIZE) { 1892 D_INFO("uCode init instr len %d too large to fit in\n", 1893 init_size); 1894 ret = -EINVAL; 1895 goto err_release; 1896 } 1897 if (init_data_size > IL39_MAX_DATA_SIZE) { 1898 D_INFO("uCode init data len %d too large to fit in\n", 1899 init_data_size); 1900 ret = -EINVAL; 1901 goto err_release; 1902 } 1903 if (boot_size > IL39_MAX_BSM_SIZE) { 1904 D_INFO("uCode boot instr len %d too large to fit in\n", 1905 boot_size); 1906 ret = -EINVAL; 1907 goto err_release; 1908 } 1909 1910 /* Allocate ucode buffers for card's bus-master loading ... */ 1911 1912 /* Runtime instructions and 2 copies of data: 1913 * 1) unmodified from disk 1914 * 2) backup cache for save/restore during power-downs */ 1915 il->ucode_code.len = inst_size; 1916 il_alloc_fw_desc(il->pci_dev, &il->ucode_code); 1917 1918 il->ucode_data.len = data_size; 1919 il_alloc_fw_desc(il->pci_dev, &il->ucode_data); 1920 1921 il->ucode_data_backup.len = data_size; 1922 il_alloc_fw_desc(il->pci_dev, &il->ucode_data_backup); 1923 1924 if (!il->ucode_code.v_addr || !il->ucode_data.v_addr || 1925 !il->ucode_data_backup.v_addr) 1926 goto err_pci_alloc; 1927 1928 /* Initialization instructions and data */ 1929 if (init_size && init_data_size) { 1930 il->ucode_init.len = init_size; 1931 il_alloc_fw_desc(il->pci_dev, &il->ucode_init); 1932 1933 il->ucode_init_data.len = init_data_size; 1934 il_alloc_fw_desc(il->pci_dev, &il->ucode_init_data); 1935 1936 if (!il->ucode_init.v_addr || !il->ucode_init_data.v_addr) 1937 goto err_pci_alloc; 1938 } 1939 1940 /* Bootstrap (instructions only, no data) */ 1941 if (boot_size) { 1942 il->ucode_boot.len = boot_size; 1943 il_alloc_fw_desc(il->pci_dev, &il->ucode_boot); 1944 1945 if (!il->ucode_boot.v_addr) 1946 goto err_pci_alloc; 1947 } 1948 1949 /* Copy images into buffers for card's bus-master reads ... */ 1950 1951 /* Runtime instructions (first block of data in file) */ 1952 len = inst_size; 1953 D_INFO("Copying (but not loading) uCode instr len %zd\n", len); 1954 memcpy(il->ucode_code.v_addr, src, len); 1955 src += len; 1956 1957 D_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n", 1958 il->ucode_code.v_addr, (u32) il->ucode_code.p_addr); 1959 1960 /* Runtime data (2nd block) 1961 * NOTE: Copy into backup buffer will be done in il3945_up() */ 1962 len = data_size; 1963 D_INFO("Copying (but not loading) uCode data len %zd\n", len); 1964 memcpy(il->ucode_data.v_addr, src, len); 1965 memcpy(il->ucode_data_backup.v_addr, src, len); 1966 src += len; 1967 1968 /* Initialization instructions (3rd block) */ 1969 if (init_size) { 1970 len = init_size; 1971 D_INFO("Copying (but not loading) init instr len %zd\n", len); 1972 memcpy(il->ucode_init.v_addr, src, len); 1973 src += len; 1974 } 1975 1976 /* Initialization data (4th block) */ 1977 if (init_data_size) { 1978 len = init_data_size; 1979 D_INFO("Copying (but not loading) init data len %zd\n", len); 1980 memcpy(il->ucode_init_data.v_addr, src, len); 1981 src += len; 1982 } 1983 1984 /* Bootstrap instructions (5th block) */ 1985 len = boot_size; 1986 D_INFO("Copying (but not loading) boot instr len %zd\n", len); 1987 memcpy(il->ucode_boot.v_addr, src, len); 1988 1989 /* We have our copies now, allow OS release its copies */ 1990 release_firmware(ucode_raw); 1991 return 0; 1992 1993 err_pci_alloc: 1994 IL_ERR("failed to allocate pci memory\n"); 1995 ret = -ENOMEM; 1996 il3945_dealloc_ucode_pci(il); 1997 1998 err_release: 1999 release_firmware(ucode_raw); 2000 2001 error: 2002 return ret; 2003 } 2004 2005 /* 2006 * il3945_set_ucode_ptrs - Set uCode address location 2007 * 2008 * Tell initialization uCode where to find runtime uCode. 2009 * 2010 * BSM registers initially contain pointers to initialization uCode. 2011 * We need to replace them to load runtime uCode inst and data, 2012 * and to save runtime data when powering down. 2013 */ 2014 static int 2015 il3945_set_ucode_ptrs(struct il_priv *il) 2016 { 2017 dma_addr_t pinst; 2018 dma_addr_t pdata; 2019 2020 /* bits 31:0 for 3945 */ 2021 pinst = il->ucode_code.p_addr; 2022 pdata = il->ucode_data_backup.p_addr; 2023 2024 /* Tell bootstrap uCode where to find image to load */ 2025 il_wr_prph(il, BSM_DRAM_INST_PTR_REG, pinst); 2026 il_wr_prph(il, BSM_DRAM_DATA_PTR_REG, pdata); 2027 il_wr_prph(il, BSM_DRAM_DATA_BYTECOUNT_REG, il->ucode_data.len); 2028 2029 /* Inst byte count must be last to set up, bit 31 signals uCode 2030 * that all new ptr/size info is in place */ 2031 il_wr_prph(il, BSM_DRAM_INST_BYTECOUNT_REG, 2032 il->ucode_code.len | BSM_DRAM_INST_LOAD); 2033 2034 D_INFO("Runtime uCode pointers are set.\n"); 2035 2036 return 0; 2037 } 2038 2039 /* 2040 * il3945_init_alive_start - Called after N_ALIVE notification received 2041 * 2042 * Called after N_ALIVE notification received from "initialize" uCode. 2043 * 2044 * Tell "initialize" uCode to go ahead and load the runtime uCode. 2045 */ 2046 static void 2047 il3945_init_alive_start(struct il_priv *il) 2048 { 2049 /* Check alive response for "valid" sign from uCode */ 2050 if (il->card_alive_init.is_valid != UCODE_VALID_OK) { 2051 /* We had an error bringing up the hardware, so take it 2052 * all the way back down so we can try again */ 2053 D_INFO("Initialize Alive failed.\n"); 2054 goto restart; 2055 } 2056 2057 /* Bootstrap uCode has loaded initialize uCode ... verify inst image. 2058 * This is a paranoid check, because we would not have gotten the 2059 * "initialize" alive if code weren't properly loaded. */ 2060 if (il3945_verify_ucode(il)) { 2061 /* Runtime instruction load was bad; 2062 * take it all the way back down so we can try again */ 2063 D_INFO("Bad \"initialize\" uCode load.\n"); 2064 goto restart; 2065 } 2066 2067 /* Send pointers to protocol/runtime uCode image ... init code will 2068 * load and launch runtime uCode, which will send us another "Alive" 2069 * notification. */ 2070 D_INFO("Initialization Alive received.\n"); 2071 if (il3945_set_ucode_ptrs(il)) { 2072 /* Runtime instruction load won't happen; 2073 * take it all the way back down so we can try again */ 2074 D_INFO("Couldn't set up uCode pointers.\n"); 2075 goto restart; 2076 } 2077 return; 2078 2079 restart: 2080 queue_work(il->workqueue, &il->restart); 2081 } 2082 2083 /* 2084 * il3945_alive_start - called after N_ALIVE notification received 2085 * from protocol/runtime uCode (initialization uCode's 2086 * Alive gets handled by il3945_init_alive_start()). 2087 */ 2088 static void 2089 il3945_alive_start(struct il_priv *il) 2090 { 2091 int thermal_spin = 0; 2092 u32 rfkill; 2093 2094 D_INFO("Runtime Alive received.\n"); 2095 2096 if (il->card_alive.is_valid != UCODE_VALID_OK) { 2097 /* We had an error bringing up the hardware, so take it 2098 * all the way back down so we can try again */ 2099 D_INFO("Alive failed.\n"); 2100 goto restart; 2101 } 2102 2103 /* Initialize uCode has loaded Runtime uCode ... verify inst image. 2104 * This is a paranoid check, because we would not have gotten the 2105 * "runtime" alive if code weren't properly loaded. */ 2106 if (il3945_verify_ucode(il)) { 2107 /* Runtime instruction load was bad; 2108 * take it all the way back down so we can try again */ 2109 D_INFO("Bad runtime uCode load.\n"); 2110 goto restart; 2111 } 2112 2113 rfkill = il_rd_prph(il, APMG_RFKILL_REG); 2114 D_INFO("RFKILL status: 0x%x\n", rfkill); 2115 2116 if (rfkill & 0x1) { 2117 clear_bit(S_RFKILL, &il->status); 2118 /* if RFKILL is not on, then wait for thermal 2119 * sensor in adapter to kick in */ 2120 while (il3945_hw_get_temperature(il) == 0) { 2121 thermal_spin++; 2122 udelay(10); 2123 } 2124 2125 if (thermal_spin) 2126 D_INFO("Thermal calibration took %dus\n", 2127 thermal_spin * 10); 2128 } else 2129 set_bit(S_RFKILL, &il->status); 2130 2131 /* After the ALIVE response, we can send commands to 3945 uCode */ 2132 set_bit(S_ALIVE, &il->status); 2133 2134 /* Enable watchdog to monitor the driver tx queues */ 2135 il_setup_watchdog(il); 2136 2137 if (il_is_rfkill(il)) 2138 return; 2139 2140 ieee80211_wake_queues(il->hw); 2141 2142 il->active_rate = RATES_MASK_3945; 2143 2144 il_power_update_mode(il, true); 2145 2146 if (il_is_associated(il)) { 2147 struct il3945_rxon_cmd *active_rxon = 2148 (struct il3945_rxon_cmd *)(&il->active); 2149 2150 il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK; 2151 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK; 2152 } else { 2153 /* Initialize our rx_config data */ 2154 il_connection_init_rx_config(il); 2155 } 2156 2157 /* Configure Bluetooth device coexistence support */ 2158 il_send_bt_config(il); 2159 2160 set_bit(S_READY, &il->status); 2161 2162 /* Configure the adapter for unassociated operation */ 2163 il3945_commit_rxon(il); 2164 2165 il3945_reg_txpower_periodic(il); 2166 2167 D_INFO("ALIVE processing complete.\n"); 2168 wake_up(&il->wait_command_queue); 2169 2170 return; 2171 2172 restart: 2173 queue_work(il->workqueue, &il->restart); 2174 } 2175 2176 static void il3945_cancel_deferred_work(struct il_priv *il); 2177 2178 static void 2179 __il3945_down(struct il_priv *il) 2180 { 2181 unsigned long flags; 2182 int exit_pending; 2183 2184 D_INFO(DRV_NAME " is going down\n"); 2185 2186 il_scan_cancel_timeout(il, 200); 2187 2188 exit_pending = test_and_set_bit(S_EXIT_PENDING, &il->status); 2189 2190 /* Stop TX queues watchdog. We need to have S_EXIT_PENDING bit set 2191 * to prevent rearm timer */ 2192 timer_delete_sync(&il->watchdog); 2193 2194 /* Station information will now be cleared in device */ 2195 il_clear_ucode_stations(il); 2196 il_dealloc_bcast_stations(il); 2197 il_clear_driver_stations(il); 2198 2199 /* Unblock any waiting calls */ 2200 wake_up_all(&il->wait_command_queue); 2201 2202 /* Wipe out the EXIT_PENDING status bit if we are not actually 2203 * exiting the module */ 2204 if (!exit_pending) 2205 clear_bit(S_EXIT_PENDING, &il->status); 2206 2207 /* stop and reset the on-board processor */ 2208 _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET); 2209 2210 /* tell the device to stop sending interrupts */ 2211 spin_lock_irqsave(&il->lock, flags); 2212 il_disable_interrupts(il); 2213 spin_unlock_irqrestore(&il->lock, flags); 2214 il3945_synchronize_irq(il); 2215 2216 if (il->mac80211_registered) 2217 ieee80211_stop_queues(il->hw); 2218 2219 /* If we have not previously called il3945_init() then 2220 * clear all bits but the RF Kill bits and return */ 2221 if (!il_is_init(il)) { 2222 il->status = 2223 test_bit(S_RFKILL, &il->status) << S_RFKILL | 2224 test_bit(S_GEO_CONFIGURED, &il->status) << S_GEO_CONFIGURED | 2225 test_bit(S_EXIT_PENDING, &il->status) << S_EXIT_PENDING; 2226 goto exit; 2227 } 2228 2229 /* ...otherwise clear out all the status bits but the RF Kill 2230 * bit and continue taking the NIC down. */ 2231 il->status &= 2232 test_bit(S_RFKILL, &il->status) << S_RFKILL | 2233 test_bit(S_GEO_CONFIGURED, &il->status) << S_GEO_CONFIGURED | 2234 test_bit(S_FW_ERROR, &il->status) << S_FW_ERROR | 2235 test_bit(S_EXIT_PENDING, &il->status) << S_EXIT_PENDING; 2236 2237 /* 2238 * We disabled and synchronized interrupt, and priv->mutex is taken, so 2239 * here is the only thread which will program device registers, but 2240 * still have lockdep assertions, so we are taking reg_lock. 2241 */ 2242 spin_lock_irq(&il->reg_lock); 2243 /* FIXME: il_grab_nic_access if rfkill is off ? */ 2244 2245 il3945_hw_txq_ctx_stop(il); 2246 il3945_hw_rxq_stop(il); 2247 /* Power-down device's busmaster DMA clocks */ 2248 _il_wr_prph(il, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT); 2249 udelay(5); 2250 /* Stop the device, and put it in low power state */ 2251 _il_apm_stop(il); 2252 2253 spin_unlock_irq(&il->reg_lock); 2254 2255 il3945_hw_txq_ctx_free(il); 2256 exit: 2257 memset(&il->card_alive, 0, sizeof(struct il_alive_resp)); 2258 dev_kfree_skb(il->beacon_skb); 2259 il->beacon_skb = NULL; 2260 2261 /* clear out any free frames */ 2262 il3945_clear_free_frames(il); 2263 } 2264 2265 static void 2266 il3945_down(struct il_priv *il) 2267 { 2268 mutex_lock(&il->mutex); 2269 __il3945_down(il); 2270 mutex_unlock(&il->mutex); 2271 2272 il3945_cancel_deferred_work(il); 2273 } 2274 2275 #define MAX_HW_RESTARTS 5 2276 2277 static int 2278 il3945_alloc_bcast_station(struct il_priv *il) 2279 { 2280 unsigned long flags; 2281 u8 sta_id; 2282 2283 spin_lock_irqsave(&il->sta_lock, flags); 2284 sta_id = il_prep_station(il, il_bcast_addr, false, NULL); 2285 if (sta_id == IL_INVALID_STATION) { 2286 IL_ERR("Unable to prepare broadcast station\n"); 2287 spin_unlock_irqrestore(&il->sta_lock, flags); 2288 2289 return -EINVAL; 2290 } 2291 2292 il->stations[sta_id].used |= IL_STA_DRIVER_ACTIVE; 2293 il->stations[sta_id].used |= IL_STA_BCAST; 2294 spin_unlock_irqrestore(&il->sta_lock, flags); 2295 2296 return 0; 2297 } 2298 2299 static int 2300 __il3945_up(struct il_priv *il) 2301 { 2302 int rc, i; 2303 2304 rc = il3945_alloc_bcast_station(il); 2305 if (rc) 2306 return rc; 2307 2308 if (test_bit(S_EXIT_PENDING, &il->status)) { 2309 IL_WARN("Exit pending; will not bring the NIC up\n"); 2310 return -EIO; 2311 } 2312 2313 if (!il->ucode_data_backup.v_addr || !il->ucode_data.v_addr) { 2314 IL_ERR("ucode not available for device bring up\n"); 2315 return -EIO; 2316 } 2317 2318 /* If platform's RF_KILL switch is NOT set to KILL */ 2319 if (_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW) 2320 clear_bit(S_RFKILL, &il->status); 2321 else { 2322 set_bit(S_RFKILL, &il->status); 2323 return -ERFKILL; 2324 } 2325 2326 _il_wr(il, CSR_INT, 0xFFFFFFFF); 2327 2328 rc = il3945_hw_nic_init(il); 2329 if (rc) { 2330 IL_ERR("Unable to int nic\n"); 2331 return rc; 2332 } 2333 2334 /* make sure rfkill handshake bits are cleared */ 2335 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); 2336 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); 2337 2338 /* clear (again), then enable host interrupts */ 2339 _il_wr(il, CSR_INT, 0xFFFFFFFF); 2340 il_enable_interrupts(il); 2341 2342 /* really make sure rfkill handshake bits are cleared */ 2343 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); 2344 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); 2345 2346 /* Copy original ucode data image from disk into backup cache. 2347 * This will be used to initialize the on-board processor's 2348 * data SRAM for a clean start when the runtime program first loads. */ 2349 memcpy(il->ucode_data_backup.v_addr, il->ucode_data.v_addr, 2350 il->ucode_data.len); 2351 2352 /* We return success when we resume from suspend and rf_kill is on. */ 2353 if (test_bit(S_RFKILL, &il->status)) 2354 return 0; 2355 2356 for (i = 0; i < MAX_HW_RESTARTS; i++) { 2357 2358 /* load bootstrap state machine, 2359 * load bootstrap program into processor's memory, 2360 * prepare to load the "initialize" uCode */ 2361 rc = il->ops->load_ucode(il); 2362 2363 if (rc) { 2364 IL_ERR("Unable to set up bootstrap uCode: %d\n", rc); 2365 continue; 2366 } 2367 2368 /* start card; "initialize" will load runtime ucode */ 2369 il3945_nic_start(il); 2370 2371 D_INFO(DRV_NAME " is coming up\n"); 2372 2373 return 0; 2374 } 2375 2376 set_bit(S_EXIT_PENDING, &il->status); 2377 __il3945_down(il); 2378 clear_bit(S_EXIT_PENDING, &il->status); 2379 2380 /* tried to restart and config the device for as long as our 2381 * patience could withstand */ 2382 IL_ERR("Unable to initialize device after %d attempts.\n", i); 2383 return -EIO; 2384 } 2385 2386 /***************************************************************************** 2387 * 2388 * Workqueue callbacks 2389 * 2390 *****************************************************************************/ 2391 2392 static void 2393 il3945_bg_init_alive_start(struct work_struct *data) 2394 { 2395 struct il_priv *il = 2396 container_of(data, struct il_priv, init_alive_start.work); 2397 2398 mutex_lock(&il->mutex); 2399 if (test_bit(S_EXIT_PENDING, &il->status)) 2400 goto out; 2401 2402 il3945_init_alive_start(il); 2403 out: 2404 mutex_unlock(&il->mutex); 2405 } 2406 2407 static void 2408 il3945_bg_alive_start(struct work_struct *data) 2409 { 2410 struct il_priv *il = 2411 container_of(data, struct il_priv, alive_start.work); 2412 2413 mutex_lock(&il->mutex); 2414 if (test_bit(S_EXIT_PENDING, &il->status) || il->txq == NULL) 2415 goto out; 2416 2417 il3945_alive_start(il); 2418 out: 2419 mutex_unlock(&il->mutex); 2420 } 2421 2422 /* 2423 * 3945 cannot interrupt driver when hardware rf kill switch toggles; 2424 * driver must poll CSR_GP_CNTRL_REG register for change. This register 2425 * *is* readable even when device has been SW_RESET into low power mode 2426 * (e.g. during RF KILL). 2427 */ 2428 static void 2429 il3945_rfkill_poll(struct work_struct *data) 2430 { 2431 struct il_priv *il = 2432 container_of(data, struct il_priv, _3945.rfkill_poll.work); 2433 bool old_rfkill = test_bit(S_RFKILL, &il->status); 2434 bool new_rfkill = 2435 !(_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW); 2436 2437 if (new_rfkill != old_rfkill) { 2438 if (new_rfkill) 2439 set_bit(S_RFKILL, &il->status); 2440 else 2441 clear_bit(S_RFKILL, &il->status); 2442 2443 wiphy_rfkill_set_hw_state(il->hw->wiphy, new_rfkill); 2444 2445 D_RF_KILL("RF_KILL bit toggled to %s.\n", 2446 new_rfkill ? "disable radio" : "enable radio"); 2447 } 2448 2449 /* Keep this running, even if radio now enabled. This will be 2450 * cancelled in mac_start() if system decides to start again */ 2451 queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll, 2452 round_jiffies_relative(2 * HZ)); 2453 2454 } 2455 2456 int 2457 il3945_request_scan(struct il_priv *il, struct ieee80211_vif *vif) 2458 { 2459 struct il_host_cmd cmd = { 2460 .id = C_SCAN, 2461 .len = sizeof(struct il3945_scan_cmd), 2462 .flags = CMD_SIZE_HUGE, 2463 }; 2464 struct il3945_scan_cmd *scan; 2465 u8 n_probes = 0; 2466 enum nl80211_band band; 2467 bool is_active = false; 2468 int ret; 2469 u16 len; 2470 2471 lockdep_assert_held(&il->mutex); 2472 2473 if (!il->scan_cmd) { 2474 il->scan_cmd = 2475 kmalloc(sizeof(struct il3945_scan_cmd) + IL_MAX_SCAN_SIZE, 2476 GFP_KERNEL); 2477 if (!il->scan_cmd) { 2478 D_SCAN("Fail to allocate scan memory\n"); 2479 return -ENOMEM; 2480 } 2481 } 2482 scan = il->scan_cmd; 2483 memset(scan, 0, sizeof(struct il3945_scan_cmd) + IL_MAX_SCAN_SIZE); 2484 2485 scan->quiet_plcp_th = IL_PLCP_QUIET_THRESH; 2486 scan->quiet_time = IL_ACTIVE_QUIET_TIME; 2487 2488 if (il_is_associated(il)) { 2489 u16 interval; 2490 u32 extra; 2491 u32 suspend_time = 100; 2492 u32 scan_suspend_time = 100; 2493 2494 D_INFO("Scanning while associated...\n"); 2495 2496 interval = vif->bss_conf.beacon_int; 2497 2498 scan->suspend_time = 0; 2499 scan->max_out_time = cpu_to_le32(200 * 1024); 2500 if (!interval) 2501 interval = suspend_time; 2502 /* 2503 * suspend time format: 2504 * 0-19: beacon interval in usec (time before exec.) 2505 * 20-23: 0 2506 * 24-31: number of beacons (suspend between channels) 2507 */ 2508 2509 extra = (suspend_time / interval) << 24; 2510 scan_suspend_time = 2511 0xFF0FFFFF & (extra | ((suspend_time % interval) * 1024)); 2512 2513 scan->suspend_time = cpu_to_le32(scan_suspend_time); 2514 D_SCAN("suspend_time 0x%X beacon interval %d\n", 2515 scan_suspend_time, interval); 2516 } 2517 2518 if (il->scan_request->n_ssids) { 2519 int i, p = 0; 2520 D_SCAN("Kicking off active scan\n"); 2521 for (i = 0; i < il->scan_request->n_ssids; i++) { 2522 /* always does wildcard anyway */ 2523 if (!il->scan_request->ssids[i].ssid_len) 2524 continue; 2525 scan->direct_scan[p].id = WLAN_EID_SSID; 2526 scan->direct_scan[p].len = 2527 il->scan_request->ssids[i].ssid_len; 2528 memcpy(scan->direct_scan[p].ssid, 2529 il->scan_request->ssids[i].ssid, 2530 il->scan_request->ssids[i].ssid_len); 2531 n_probes++; 2532 p++; 2533 } 2534 is_active = true; 2535 } else 2536 D_SCAN("Kicking off passive scan.\n"); 2537 2538 /* We don't build a direct scan probe request; the uCode will do 2539 * that based on the direct_mask added to each channel entry */ 2540 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK; 2541 scan->tx_cmd.sta_id = il->hw_params.bcast_id; 2542 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE; 2543 2544 /* flags + rate selection */ 2545 2546 switch (il->scan_band) { 2547 case NL80211_BAND_2GHZ: 2548 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK; 2549 scan->tx_cmd.rate = RATE_1M_PLCP; 2550 band = NL80211_BAND_2GHZ; 2551 break; 2552 case NL80211_BAND_5GHZ: 2553 scan->tx_cmd.rate = RATE_6M_PLCP; 2554 band = NL80211_BAND_5GHZ; 2555 break; 2556 default: 2557 IL_WARN("Invalid scan band\n"); 2558 return -EIO; 2559 } 2560 2561 /* 2562 * If active scaning is requested but a certain channel is marked 2563 * passive, we can do active scanning if we detect transmissions. For 2564 * passive only scanning disable switching to active on any channel. 2565 */ 2566 scan->good_CRC_th = 2567 is_active ? IL_GOOD_CRC_TH_DEFAULT : IL_GOOD_CRC_TH_NEVER; 2568 2569 len = 2570 il_fill_probe_req(il, (struct ieee80211_mgmt *)scan->data, 2571 vif->addr, il->scan_request->ie, 2572 il->scan_request->ie_len, 2573 IL_MAX_SCAN_SIZE - sizeof(*scan)); 2574 scan->tx_cmd.len = cpu_to_le16(len); 2575 2576 /* select Rx antennas */ 2577 scan->flags |= il3945_get_antenna_flags(il); 2578 2579 scan->channel_count = 2580 il3945_get_channels_for_scan(il, band, is_active, n_probes, 2581 (void *)&scan->data[len], vif); 2582 if (scan->channel_count == 0) { 2583 D_SCAN("channel count %d\n", scan->channel_count); 2584 return -EIO; 2585 } 2586 2587 cmd.len += 2588 le16_to_cpu(scan->tx_cmd.len) + 2589 scan->channel_count * sizeof(struct il3945_scan_channel); 2590 cmd.data = scan; 2591 scan->len = cpu_to_le16(cmd.len); 2592 2593 set_bit(S_SCAN_HW, &il->status); 2594 ret = il_send_cmd_sync(il, &cmd); 2595 if (ret) 2596 clear_bit(S_SCAN_HW, &il->status); 2597 return ret; 2598 } 2599 2600 void 2601 il3945_post_scan(struct il_priv *il) 2602 { 2603 /* 2604 * Since setting the RXON may have been deferred while 2605 * performing the scan, fire one off if needed 2606 */ 2607 if (memcmp(&il->staging, &il->active, sizeof(il->staging))) 2608 il3945_commit_rxon(il); 2609 } 2610 2611 static void 2612 il3945_bg_restart(struct work_struct *data) 2613 { 2614 struct il_priv *il = container_of(data, struct il_priv, restart); 2615 2616 if (test_bit(S_EXIT_PENDING, &il->status)) 2617 return; 2618 2619 if (test_and_clear_bit(S_FW_ERROR, &il->status)) { 2620 mutex_lock(&il->mutex); 2621 il->is_open = 0; 2622 mutex_unlock(&il->mutex); 2623 il3945_down(il); 2624 ieee80211_restart_hw(il->hw); 2625 } else { 2626 il3945_down(il); 2627 2628 mutex_lock(&il->mutex); 2629 if (test_bit(S_EXIT_PENDING, &il->status)) { 2630 mutex_unlock(&il->mutex); 2631 return; 2632 } 2633 2634 __il3945_up(il); 2635 mutex_unlock(&il->mutex); 2636 } 2637 } 2638 2639 static void 2640 il3945_bg_rx_replenish(struct work_struct *data) 2641 { 2642 struct il_priv *il = container_of(data, struct il_priv, rx_replenish); 2643 2644 mutex_lock(&il->mutex); 2645 if (test_bit(S_EXIT_PENDING, &il->status)) 2646 goto out; 2647 2648 il3945_rx_replenish(il); 2649 out: 2650 mutex_unlock(&il->mutex); 2651 } 2652 2653 void 2654 il3945_post_associate(struct il_priv *il) 2655 { 2656 int rc = 0; 2657 2658 if (!il->vif || !il->is_open) 2659 return; 2660 2661 D_ASSOC("Associated as %d to: %pM\n", il->vif->cfg.aid, 2662 il->active.bssid_addr); 2663 2664 if (test_bit(S_EXIT_PENDING, &il->status)) 2665 return; 2666 2667 il_scan_cancel_timeout(il, 200); 2668 2669 il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK; 2670 il3945_commit_rxon(il); 2671 2672 rc = il_send_rxon_timing(il); 2673 if (rc) 2674 IL_WARN("C_RXON_TIMING failed - " "Attempting to continue.\n"); 2675 2676 il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK; 2677 2678 il->staging.assoc_id = cpu_to_le16(il->vif->cfg.aid); 2679 2680 D_ASSOC("assoc id %d beacon interval %d\n", il->vif->cfg.aid, 2681 il->vif->bss_conf.beacon_int); 2682 2683 if (il->vif->bss_conf.use_short_preamble) 2684 il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; 2685 else 2686 il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; 2687 2688 if (il->staging.flags & RXON_FLG_BAND_24G_MSK) { 2689 if (il->vif->bss_conf.use_short_slot) 2690 il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK; 2691 else 2692 il->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK; 2693 } 2694 2695 il3945_commit_rxon(il); 2696 2697 switch (il->vif->type) { 2698 case NL80211_IFTYPE_STATION: 2699 il3945_rate_scale_init(il->hw, IL_AP_ID); 2700 break; 2701 case NL80211_IFTYPE_ADHOC: 2702 il3945_send_beacon_cmd(il); 2703 break; 2704 default: 2705 IL_ERR("%s Should not be called in %d mode\n", __func__, 2706 il->vif->type); 2707 break; 2708 } 2709 } 2710 2711 /***************************************************************************** 2712 * 2713 * mac80211 entry point functions 2714 * 2715 *****************************************************************************/ 2716 2717 #define UCODE_READY_TIMEOUT (2 * HZ) 2718 2719 static int 2720 il3945_mac_start(struct ieee80211_hw *hw) 2721 { 2722 struct il_priv *il = hw->priv; 2723 int ret; 2724 2725 /* we should be verifying the device is ready to be opened */ 2726 mutex_lock(&il->mutex); 2727 D_MAC80211("enter\n"); 2728 2729 /* fetch ucode file from disk, alloc and copy to bus-master buffers ... 2730 * ucode filename and max sizes are card-specific. */ 2731 2732 if (!il->ucode_code.len) { 2733 ret = il3945_read_ucode(il); 2734 if (ret) { 2735 IL_ERR("Could not read microcode: %d\n", ret); 2736 mutex_unlock(&il->mutex); 2737 goto out_release_irq; 2738 } 2739 } 2740 2741 ret = __il3945_up(il); 2742 2743 mutex_unlock(&il->mutex); 2744 2745 if (ret) 2746 goto out_release_irq; 2747 2748 D_INFO("Start UP work.\n"); 2749 2750 /* Wait for START_ALIVE from ucode. Otherwise callbacks from 2751 * mac80211 will not be run successfully. */ 2752 ret = wait_event_timeout(il->wait_command_queue, 2753 test_bit(S_READY, &il->status), 2754 UCODE_READY_TIMEOUT); 2755 if (!ret) { 2756 if (!test_bit(S_READY, &il->status)) { 2757 IL_ERR("Wait for START_ALIVE timeout after %dms.\n", 2758 jiffies_to_msecs(UCODE_READY_TIMEOUT)); 2759 ret = -ETIMEDOUT; 2760 goto out_release_irq; 2761 } 2762 } 2763 2764 /* ucode is running and will send rfkill notifications, 2765 * no need to poll the killswitch state anymore */ 2766 cancel_delayed_work(&il->_3945.rfkill_poll); 2767 2768 il->is_open = 1; 2769 D_MAC80211("leave\n"); 2770 return 0; 2771 2772 out_release_irq: 2773 il->is_open = 0; 2774 D_MAC80211("leave - failed\n"); 2775 return ret; 2776 } 2777 2778 static void 2779 il3945_mac_stop(struct ieee80211_hw *hw, bool suspend) 2780 { 2781 struct il_priv *il = hw->priv; 2782 2783 D_MAC80211("enter\n"); 2784 2785 if (!il->is_open) { 2786 D_MAC80211("leave - skip\n"); 2787 return; 2788 } 2789 2790 il->is_open = 0; 2791 2792 il3945_down(il); 2793 2794 flush_workqueue(il->workqueue); 2795 2796 /* start polling the killswitch state again */ 2797 queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll, 2798 round_jiffies_relative(2 * HZ)); 2799 2800 D_MAC80211("leave\n"); 2801 } 2802 2803 static void 2804 il3945_mac_tx(struct ieee80211_hw *hw, 2805 struct ieee80211_tx_control *control, 2806 struct sk_buff *skb) 2807 { 2808 struct il_priv *il = hw->priv; 2809 2810 D_MAC80211("enter\n"); 2811 2812 D_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len, 2813 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate); 2814 2815 if (il3945_tx_skb(il, control->sta, skb)) 2816 dev_kfree_skb_any(skb); 2817 2818 D_MAC80211("leave\n"); 2819 } 2820 2821 void 2822 il3945_config_ap(struct il_priv *il) 2823 { 2824 struct ieee80211_vif *vif = il->vif; 2825 int rc = 0; 2826 2827 if (test_bit(S_EXIT_PENDING, &il->status)) 2828 return; 2829 2830 /* The following should be done only at AP bring up */ 2831 if (!(il_is_associated(il))) { 2832 2833 /* RXON - unassoc (to set timing command) */ 2834 il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK; 2835 il3945_commit_rxon(il); 2836 2837 /* RXON Timing */ 2838 rc = il_send_rxon_timing(il); 2839 if (rc) 2840 IL_WARN("C_RXON_TIMING failed - " 2841 "Attempting to continue.\n"); 2842 2843 il->staging.assoc_id = 0; 2844 2845 if (vif->bss_conf.use_short_preamble) 2846 il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; 2847 else 2848 il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; 2849 2850 if (il->staging.flags & RXON_FLG_BAND_24G_MSK) { 2851 if (vif->bss_conf.use_short_slot) 2852 il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK; 2853 else 2854 il->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK; 2855 } 2856 /* restore RXON assoc */ 2857 il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK; 2858 il3945_commit_rxon(il); 2859 } 2860 il3945_send_beacon_cmd(il); 2861 } 2862 2863 static int 2864 il3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, 2865 struct ieee80211_vif *vif, struct ieee80211_sta *sta, 2866 struct ieee80211_key_conf *key) 2867 { 2868 struct il_priv *il = hw->priv; 2869 int ret = 0; 2870 u8 sta_id = IL_INVALID_STATION; 2871 u8 static_key; 2872 2873 D_MAC80211("enter\n"); 2874 2875 if (il3945_mod_params.sw_crypto) { 2876 D_MAC80211("leave - hwcrypto disabled\n"); 2877 return -EOPNOTSUPP; 2878 } 2879 2880 /* 2881 * To support IBSS RSN, don't program group keys in IBSS, the 2882 * hardware will then not attempt to decrypt the frames. 2883 */ 2884 if (vif->type == NL80211_IFTYPE_ADHOC && 2885 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) { 2886 D_MAC80211("leave - IBSS RSN\n"); 2887 return -EOPNOTSUPP; 2888 } 2889 2890 static_key = !il_is_associated(il); 2891 2892 if (!static_key) { 2893 sta_id = il_sta_id_or_broadcast(il, sta); 2894 if (sta_id == IL_INVALID_STATION) { 2895 D_MAC80211("leave - station not found\n"); 2896 return -EINVAL; 2897 } 2898 } 2899 2900 mutex_lock(&il->mutex); 2901 il_scan_cancel_timeout(il, 100); 2902 2903 switch (cmd) { 2904 case SET_KEY: 2905 if (static_key) 2906 ret = il3945_set_static_key(il, key); 2907 else 2908 ret = il3945_set_dynamic_key(il, key, sta_id); 2909 D_MAC80211("enable hwcrypto key\n"); 2910 break; 2911 case DISABLE_KEY: 2912 if (static_key) 2913 ret = il3945_remove_static_key(il); 2914 else 2915 ret = il3945_clear_sta_key_info(il, sta_id); 2916 D_MAC80211("disable hwcrypto key\n"); 2917 break; 2918 default: 2919 ret = -EINVAL; 2920 } 2921 2922 D_MAC80211("leave ret %d\n", ret); 2923 mutex_unlock(&il->mutex); 2924 2925 return ret; 2926 } 2927 2928 static int 2929 il3945_mac_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 2930 struct ieee80211_sta *sta) 2931 { 2932 struct il_priv *il = hw->priv; 2933 struct il3945_sta_priv *sta_priv = (void *)sta->drv_priv; 2934 int ret; 2935 bool is_ap = vif->type == NL80211_IFTYPE_STATION; 2936 u8 sta_id; 2937 2938 mutex_lock(&il->mutex); 2939 D_INFO("station %pM\n", sta->addr); 2940 sta_priv->common.sta_id = IL_INVALID_STATION; 2941 2942 ret = il_add_station_common(il, sta->addr, is_ap, sta, &sta_id); 2943 if (ret) { 2944 IL_ERR("Unable to add station %pM (%d)\n", sta->addr, ret); 2945 /* Should we return success if return code is EEXIST ? */ 2946 mutex_unlock(&il->mutex); 2947 return ret; 2948 } 2949 2950 sta_priv->common.sta_id = sta_id; 2951 2952 /* Initialize rate scaling */ 2953 D_INFO("Initializing rate scaling for station %pM\n", sta->addr); 2954 il3945_rs_rate_init(il, sta, sta_id); 2955 mutex_unlock(&il->mutex); 2956 2957 return 0; 2958 } 2959 2960 static void 2961 il3945_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags, 2962 unsigned int *total_flags, u64 multicast) 2963 { 2964 struct il_priv *il = hw->priv; 2965 __le32 filter_or = 0, filter_nand = 0; 2966 2967 #define CHK(test, flag) do { \ 2968 if (*total_flags & (test)) \ 2969 filter_or |= (flag); \ 2970 else \ 2971 filter_nand |= (flag); \ 2972 } while (0) 2973 2974 D_MAC80211("Enter: changed: 0x%x, total: 0x%x\n", changed_flags, 2975 *total_flags); 2976 2977 CHK(FIF_OTHER_BSS, RXON_FILTER_PROMISC_MSK); 2978 CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK); 2979 CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK); 2980 2981 #undef CHK 2982 2983 mutex_lock(&il->mutex); 2984 2985 il->staging.filter_flags &= ~filter_nand; 2986 il->staging.filter_flags |= filter_or; 2987 2988 /* 2989 * Not committing directly because hardware can perform a scan, 2990 * but even if hw is ready, committing here breaks for some reason, 2991 * we'll eventually commit the filter flags change anyway. 2992 */ 2993 2994 mutex_unlock(&il->mutex); 2995 2996 /* 2997 * Receiving all multicast frames is always enabled by the 2998 * default flags setup in il_connection_init_rx_config() 2999 * since we currently do not support programming multicast 3000 * filters into the device. 3001 */ 3002 *total_flags &= 3003 FIF_OTHER_BSS | FIF_ALLMULTI | 3004 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL; 3005 } 3006 3007 /***************************************************************************** 3008 * 3009 * sysfs attributes 3010 * 3011 *****************************************************************************/ 3012 3013 #ifdef CONFIG_IWLEGACY_DEBUG 3014 3015 /* 3016 * The following adds a new attribute to the sysfs representation 3017 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/) 3018 * used for controlling the debug level. 3019 * 3020 * See the level definitions in iwl for details. 3021 * 3022 * The debug_level being managed using sysfs below is a per device debug 3023 * level that is used instead of the global debug level if it (the per 3024 * device debug level) is set. 3025 */ 3026 static ssize_t 3027 il3945_show_debug_level(struct device *d, struct device_attribute *attr, 3028 char *buf) 3029 { 3030 struct il_priv *il = dev_get_drvdata(d); 3031 return sprintf(buf, "0x%08X\n", il_get_debug_level(il)); 3032 } 3033 3034 static ssize_t 3035 il3945_store_debug_level(struct device *d, struct device_attribute *attr, 3036 const char *buf, size_t count) 3037 { 3038 struct il_priv *il = dev_get_drvdata(d); 3039 unsigned long val; 3040 int ret; 3041 3042 ret = kstrtoul(buf, 0, &val); 3043 if (ret) 3044 IL_INFO("%s is not in hex or decimal form.\n", buf); 3045 else 3046 il->debug_level = val; 3047 3048 return strnlen(buf, count); 3049 } 3050 3051 static DEVICE_ATTR(debug_level, 0644, il3945_show_debug_level, 3052 il3945_store_debug_level); 3053 3054 #endif /* CONFIG_IWLEGACY_DEBUG */ 3055 3056 static ssize_t 3057 il3945_show_temperature(struct device *d, struct device_attribute *attr, 3058 char *buf) 3059 { 3060 struct il_priv *il = dev_get_drvdata(d); 3061 3062 if (!il_is_alive(il)) 3063 return -EAGAIN; 3064 3065 return sprintf(buf, "%d\n", il3945_hw_get_temperature(il)); 3066 } 3067 3068 static DEVICE_ATTR(temperature, 0444, il3945_show_temperature, NULL); 3069 3070 static ssize_t 3071 il3945_show_tx_power(struct device *d, struct device_attribute *attr, char *buf) 3072 { 3073 struct il_priv *il = dev_get_drvdata(d); 3074 return sprintf(buf, "%d\n", il->tx_power_user_lmt); 3075 } 3076 3077 static ssize_t 3078 il3945_store_tx_power(struct device *d, struct device_attribute *attr, 3079 const char *buf, size_t count) 3080 { 3081 struct il_priv *il = dev_get_drvdata(d); 3082 char *p = (char *)buf; 3083 u32 val; 3084 3085 val = simple_strtoul(p, &p, 10); 3086 if (p == buf) 3087 IL_INFO(": %s is not in decimal form.\n", buf); 3088 else 3089 il3945_hw_reg_set_txpower(il, val); 3090 3091 return count; 3092 } 3093 3094 static DEVICE_ATTR(tx_power, 0644, il3945_show_tx_power, il3945_store_tx_power); 3095 3096 static ssize_t 3097 il3945_show_flags(struct device *d, struct device_attribute *attr, char *buf) 3098 { 3099 struct il_priv *il = dev_get_drvdata(d); 3100 3101 return sprintf(buf, "0x%04X\n", il->active.flags); 3102 } 3103 3104 static ssize_t 3105 il3945_store_flags(struct device *d, struct device_attribute *attr, 3106 const char *buf, size_t count) 3107 { 3108 struct il_priv *il = dev_get_drvdata(d); 3109 u32 flags = simple_strtoul(buf, NULL, 0); 3110 3111 mutex_lock(&il->mutex); 3112 if (le32_to_cpu(il->staging.flags) != flags) { 3113 /* Cancel any currently running scans... */ 3114 if (il_scan_cancel_timeout(il, 100)) 3115 IL_WARN("Could not cancel scan.\n"); 3116 else { 3117 D_INFO("Committing rxon.flags = 0x%04X\n", flags); 3118 il->staging.flags = cpu_to_le32(flags); 3119 il3945_commit_rxon(il); 3120 } 3121 } 3122 mutex_unlock(&il->mutex); 3123 3124 return count; 3125 } 3126 3127 static DEVICE_ATTR(flags, 0644, il3945_show_flags, il3945_store_flags); 3128 3129 static ssize_t 3130 il3945_show_filter_flags(struct device *d, struct device_attribute *attr, 3131 char *buf) 3132 { 3133 struct il_priv *il = dev_get_drvdata(d); 3134 3135 return sprintf(buf, "0x%04X\n", le32_to_cpu(il->active.filter_flags)); 3136 } 3137 3138 static ssize_t 3139 il3945_store_filter_flags(struct device *d, struct device_attribute *attr, 3140 const char *buf, size_t count) 3141 { 3142 struct il_priv *il = dev_get_drvdata(d); 3143 u32 filter_flags = simple_strtoul(buf, NULL, 0); 3144 3145 mutex_lock(&il->mutex); 3146 if (le32_to_cpu(il->staging.filter_flags) != filter_flags) { 3147 /* Cancel any currently running scans... */ 3148 if (il_scan_cancel_timeout(il, 100)) 3149 IL_WARN("Could not cancel scan.\n"); 3150 else { 3151 D_INFO("Committing rxon.filter_flags = " "0x%04X\n", 3152 filter_flags); 3153 il->staging.filter_flags = cpu_to_le32(filter_flags); 3154 il3945_commit_rxon(il); 3155 } 3156 } 3157 mutex_unlock(&il->mutex); 3158 3159 return count; 3160 } 3161 3162 static DEVICE_ATTR(filter_flags, 0644, il3945_show_filter_flags, 3163 il3945_store_filter_flags); 3164 3165 static ssize_t 3166 il3945_show_measurement(struct device *d, struct device_attribute *attr, 3167 char *buf) 3168 { 3169 struct il_priv *il = dev_get_drvdata(d); 3170 struct il_spectrum_notification measure_report; 3171 u32 size = sizeof(measure_report), len = 0, ofs = 0; 3172 u8 *data = (u8 *) &measure_report; 3173 unsigned long flags; 3174 3175 spin_lock_irqsave(&il->lock, flags); 3176 if (!(il->measurement_status & MEASUREMENT_READY)) { 3177 spin_unlock_irqrestore(&il->lock, flags); 3178 return 0; 3179 } 3180 memcpy(&measure_report, &il->measure_report, size); 3181 il->measurement_status = 0; 3182 spin_unlock_irqrestore(&il->lock, flags); 3183 3184 while (size && PAGE_SIZE - len) { 3185 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len, 3186 PAGE_SIZE - len, true); 3187 len = strlen(buf); 3188 if (PAGE_SIZE - len) 3189 buf[len++] = '\n'; 3190 3191 ofs += 16; 3192 size -= min(size, 16U); 3193 } 3194 3195 return len; 3196 } 3197 3198 static ssize_t 3199 il3945_store_measurement(struct device *d, struct device_attribute *attr, 3200 const char *buf, size_t count) 3201 { 3202 struct il_priv *il = dev_get_drvdata(d); 3203 struct ieee80211_measurement_params params = { 3204 .channel = le16_to_cpu(il->active.channel), 3205 .start_time = cpu_to_le64(il->_3945.last_tsf), 3206 .duration = cpu_to_le16(1), 3207 }; 3208 u8 type = IL_MEASURE_BASIC; 3209 u8 buffer[32]; 3210 u8 channel; 3211 3212 if (count) { 3213 char *p = buffer; 3214 strscpy(buffer, buf, sizeof(buffer)); 3215 channel = simple_strtoul(p, NULL, 0); 3216 if (channel) 3217 params.channel = channel; 3218 3219 p = buffer; 3220 while (*p && *p != ' ') 3221 p++; 3222 if (*p) 3223 type = simple_strtoul(p + 1, NULL, 0); 3224 } 3225 3226 D_INFO("Invoking measurement of type %d on " "channel %d (for '%s')\n", 3227 type, params.channel, buf); 3228 mutex_lock(&il->mutex); 3229 il3945_get_measurement(il, ¶ms, type); 3230 mutex_unlock(&il->mutex); 3231 3232 return count; 3233 } 3234 3235 static DEVICE_ATTR(measurement, 0600, il3945_show_measurement, 3236 il3945_store_measurement); 3237 3238 static ssize_t 3239 il3945_store_retry_rate(struct device *d, struct device_attribute *attr, 3240 const char *buf, size_t count) 3241 { 3242 struct il_priv *il = dev_get_drvdata(d); 3243 3244 il->retry_rate = simple_strtoul(buf, NULL, 0); 3245 if (il->retry_rate <= 0) 3246 il->retry_rate = 1; 3247 3248 return count; 3249 } 3250 3251 static ssize_t 3252 il3945_show_retry_rate(struct device *d, struct device_attribute *attr, 3253 char *buf) 3254 { 3255 struct il_priv *il = dev_get_drvdata(d); 3256 return sprintf(buf, "%d", il->retry_rate); 3257 } 3258 3259 static DEVICE_ATTR(retry_rate, 0600, il3945_show_retry_rate, 3260 il3945_store_retry_rate); 3261 3262 static ssize_t 3263 il3945_show_channels(struct device *d, struct device_attribute *attr, char *buf) 3264 { 3265 /* all this shit doesn't belong into sysfs anyway */ 3266 return 0; 3267 } 3268 3269 static DEVICE_ATTR(channels, 0400, il3945_show_channels, NULL); 3270 3271 static ssize_t 3272 il3945_show_antenna(struct device *d, struct device_attribute *attr, char *buf) 3273 { 3274 struct il_priv *il = dev_get_drvdata(d); 3275 3276 if (!il_is_alive(il)) 3277 return -EAGAIN; 3278 3279 return sprintf(buf, "%d\n", il3945_mod_params.antenna); 3280 } 3281 3282 static ssize_t 3283 il3945_store_antenna(struct device *d, struct device_attribute *attr, 3284 const char *buf, size_t count) 3285 { 3286 struct il_priv *il __maybe_unused = dev_get_drvdata(d); 3287 int ant; 3288 3289 if (count == 0) 3290 return 0; 3291 3292 if (sscanf(buf, "%1i", &ant) != 1) { 3293 D_INFO("not in hex or decimal form.\n"); 3294 return count; 3295 } 3296 3297 if (ant >= 0 && ant <= 2) { 3298 D_INFO("Setting antenna select to %d.\n", ant); 3299 il3945_mod_params.antenna = (enum il3945_antenna)ant; 3300 } else 3301 D_INFO("Bad antenna select value %d.\n", ant); 3302 3303 return count; 3304 } 3305 3306 static DEVICE_ATTR(antenna, 0644, il3945_show_antenna, il3945_store_antenna); 3307 3308 static ssize_t 3309 il3945_show_status(struct device *d, struct device_attribute *attr, char *buf) 3310 { 3311 struct il_priv *il = dev_get_drvdata(d); 3312 if (!il_is_alive(il)) 3313 return -EAGAIN; 3314 return sprintf(buf, "0x%08x\n", (int)il->status); 3315 } 3316 3317 static DEVICE_ATTR(status, 0444, il3945_show_status, NULL); 3318 3319 static ssize_t 3320 il3945_dump_error_log(struct device *d, struct device_attribute *attr, 3321 const char *buf, size_t count) 3322 { 3323 struct il_priv *il = dev_get_drvdata(d); 3324 char *p = (char *)buf; 3325 3326 if (p[0] == '1') 3327 il3945_dump_nic_error_log(il); 3328 3329 return strnlen(buf, count); 3330 } 3331 3332 static DEVICE_ATTR(dump_errors, 0200, NULL, il3945_dump_error_log); 3333 3334 /***************************************************************************** 3335 * 3336 * driver setup and tear down 3337 * 3338 *****************************************************************************/ 3339 3340 static int 3341 il3945_setup_deferred_work(struct il_priv *il) 3342 { 3343 il->workqueue = create_singlethread_workqueue(DRV_NAME); 3344 if (!il->workqueue) 3345 return -ENOMEM; 3346 3347 init_waitqueue_head(&il->wait_command_queue); 3348 3349 INIT_WORK(&il->restart, il3945_bg_restart); 3350 INIT_WORK(&il->rx_replenish, il3945_bg_rx_replenish); 3351 INIT_DELAYED_WORK(&il->init_alive_start, il3945_bg_init_alive_start); 3352 INIT_DELAYED_WORK(&il->alive_start, il3945_bg_alive_start); 3353 INIT_DELAYED_WORK(&il->_3945.rfkill_poll, il3945_rfkill_poll); 3354 3355 il_setup_scan_deferred_work(il); 3356 3357 il3945_hw_setup_deferred_work(il); 3358 3359 timer_setup(&il->watchdog, il_bg_watchdog, 0); 3360 3361 tasklet_setup(&il->irq_tasklet, il3945_irq_tasklet); 3362 3363 return 0; 3364 } 3365 3366 static void 3367 il3945_cancel_deferred_work(struct il_priv *il) 3368 { 3369 il3945_hw_cancel_deferred_work(il); 3370 3371 cancel_delayed_work_sync(&il->init_alive_start); 3372 cancel_delayed_work(&il->alive_start); 3373 3374 il_cancel_scan_deferred_work(il); 3375 } 3376 3377 static struct attribute *il3945_sysfs_entries[] = { 3378 &dev_attr_antenna.attr, 3379 &dev_attr_channels.attr, 3380 &dev_attr_dump_errors.attr, 3381 &dev_attr_flags.attr, 3382 &dev_attr_filter_flags.attr, 3383 &dev_attr_measurement.attr, 3384 &dev_attr_retry_rate.attr, 3385 &dev_attr_status.attr, 3386 &dev_attr_temperature.attr, 3387 &dev_attr_tx_power.attr, 3388 #ifdef CONFIG_IWLEGACY_DEBUG 3389 &dev_attr_debug_level.attr, 3390 #endif 3391 NULL 3392 }; 3393 3394 static const struct attribute_group il3945_attribute_group = { 3395 .name = NULL, /* put in device directory */ 3396 .attrs = il3945_sysfs_entries, 3397 }; 3398 3399 static struct ieee80211_ops il3945_mac_ops __ro_after_init = { 3400 .add_chanctx = ieee80211_emulate_add_chanctx, 3401 .remove_chanctx = ieee80211_emulate_remove_chanctx, 3402 .change_chanctx = ieee80211_emulate_change_chanctx, 3403 .switch_vif_chanctx = ieee80211_emulate_switch_vif_chanctx, 3404 .tx = il3945_mac_tx, 3405 .wake_tx_queue = ieee80211_handle_wake_tx_queue, 3406 .start = il3945_mac_start, 3407 .stop = il3945_mac_stop, 3408 .add_interface = il_mac_add_interface, 3409 .remove_interface = il_mac_remove_interface, 3410 .change_interface = il_mac_change_interface, 3411 .config = il_mac_config, 3412 .configure_filter = il3945_configure_filter, 3413 .set_key = il3945_mac_set_key, 3414 .conf_tx = il_mac_conf_tx, 3415 .reset_tsf = il_mac_reset_tsf, 3416 .bss_info_changed = il_mac_bss_info_changed, 3417 .hw_scan = il_mac_hw_scan, 3418 .sta_add = il3945_mac_sta_add, 3419 .sta_remove = il_mac_sta_remove, 3420 .tx_last_beacon = il_mac_tx_last_beacon, 3421 .flush = il_mac_flush, 3422 }; 3423 3424 static int 3425 il3945_init_drv(struct il_priv *il) 3426 { 3427 int ret; 3428 struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom; 3429 3430 il->retry_rate = 1; 3431 il->beacon_skb = NULL; 3432 3433 spin_lock_init(&il->sta_lock); 3434 spin_lock_init(&il->hcmd_lock); 3435 3436 INIT_LIST_HEAD(&il->free_frames); 3437 3438 mutex_init(&il->mutex); 3439 3440 il->ieee_channels = NULL; 3441 il->ieee_rates = NULL; 3442 il->band = NL80211_BAND_2GHZ; 3443 3444 il->iw_mode = NL80211_IFTYPE_STATION; 3445 il->missed_beacon_threshold = IL_MISSED_BEACON_THRESHOLD_DEF; 3446 3447 /* initialize force reset */ 3448 il->force_reset.reset_duration = IL_DELAY_NEXT_FORCE_FW_RELOAD; 3449 3450 if (eeprom->version < EEPROM_3945_EEPROM_VERSION) { 3451 IL_WARN("Unsupported EEPROM version: 0x%04X\n", 3452 eeprom->version); 3453 ret = -EINVAL; 3454 goto err; 3455 } 3456 ret = il_init_channel_map(il); 3457 if (ret) { 3458 IL_ERR("initializing regulatory failed: %d\n", ret); 3459 goto err; 3460 } 3461 3462 /* Set up txpower settings in driver for all channels */ 3463 if (il3945_txpower_set_from_eeprom(il)) { 3464 ret = -EIO; 3465 goto err_free_channel_map; 3466 } 3467 3468 ret = il_init_geos(il); 3469 if (ret) { 3470 IL_ERR("initializing geos failed: %d\n", ret); 3471 goto err_free_channel_map; 3472 } 3473 il3945_init_hw_rates(il, il->ieee_rates); 3474 3475 return 0; 3476 3477 err_free_channel_map: 3478 il_free_channel_map(il); 3479 err: 3480 return ret; 3481 } 3482 3483 #define IL3945_MAX_PROBE_REQUEST 200 3484 3485 static int 3486 il3945_setup_mac(struct il_priv *il) 3487 { 3488 int ret; 3489 struct ieee80211_hw *hw = il->hw; 3490 3491 hw->rate_control_algorithm = "iwl-3945-rs"; 3492 hw->sta_data_size = sizeof(struct il3945_sta_priv); 3493 hw->vif_data_size = sizeof(struct il_vif_priv); 3494 3495 /* Tell mac80211 our characteristics */ 3496 ieee80211_hw_set(hw, SUPPORTS_DYNAMIC_PS); 3497 ieee80211_hw_set(hw, SUPPORTS_PS); 3498 ieee80211_hw_set(hw, SIGNAL_DBM); 3499 ieee80211_hw_set(hw, SPECTRUM_MGMT); 3500 3501 hw->wiphy->interface_modes = 3502 BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_ADHOC); 3503 3504 hw->wiphy->flags |= WIPHY_FLAG_IBSS_RSN; 3505 hw->wiphy->regulatory_flags |= REGULATORY_CUSTOM_REG | 3506 REGULATORY_DISABLE_BEACON_HINTS; 3507 3508 hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT; 3509 3510 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945; 3511 /* we create the 802.11 header and a zero-length SSID element */ 3512 hw->wiphy->max_scan_ie_len = IL3945_MAX_PROBE_REQUEST - 24 - 2; 3513 3514 /* Default value; 4 EDCA QOS priorities */ 3515 hw->queues = 4; 3516 3517 if (il->bands[NL80211_BAND_2GHZ].n_channels) 3518 il->hw->wiphy->bands[NL80211_BAND_2GHZ] = 3519 &il->bands[NL80211_BAND_2GHZ]; 3520 3521 if (il->bands[NL80211_BAND_5GHZ].n_channels) 3522 il->hw->wiphy->bands[NL80211_BAND_5GHZ] = 3523 &il->bands[NL80211_BAND_5GHZ]; 3524 3525 il_leds_init(il); 3526 3527 wiphy_ext_feature_set(il->hw->wiphy, NL80211_EXT_FEATURE_CQM_RSSI_LIST); 3528 3529 ret = ieee80211_register_hw(il->hw); 3530 if (ret) { 3531 IL_ERR("Failed to register hw (error %d)\n", ret); 3532 return ret; 3533 } 3534 il->mac80211_registered = 1; 3535 3536 return 0; 3537 } 3538 3539 static int 3540 il3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 3541 { 3542 int err = 0; 3543 struct il_priv *il; 3544 struct ieee80211_hw *hw; 3545 struct il_cfg *cfg = (struct il_cfg *)(ent->driver_data); 3546 struct il3945_eeprom *eeprom; 3547 unsigned long flags; 3548 3549 /*********************** 3550 * 1. Allocating HW data 3551 * ********************/ 3552 3553 hw = ieee80211_alloc_hw(sizeof(struct il_priv), &il3945_mac_ops); 3554 if (!hw) { 3555 err = -ENOMEM; 3556 goto out; 3557 } 3558 il = hw->priv; 3559 il->hw = hw; 3560 SET_IEEE80211_DEV(hw, &pdev->dev); 3561 3562 il->cmd_queue = IL39_CMD_QUEUE_NUM; 3563 3564 D_INFO("*** LOAD DRIVER ***\n"); 3565 il->cfg = cfg; 3566 il->ops = &il3945_ops; 3567 #ifdef CONFIG_IWLEGACY_DEBUGFS 3568 il->debugfs_ops = &il3945_debugfs_ops; 3569 #endif 3570 il->pci_dev = pdev; 3571 il->inta_mask = CSR_INI_SET_MASK; 3572 3573 /*************************** 3574 * 2. Initializing PCI bus 3575 * *************************/ 3576 pci_disable_link_state(pdev, 3577 PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 | 3578 PCIE_LINK_STATE_CLKPM); 3579 3580 if (pci_enable_device(pdev)) { 3581 err = -ENODEV; 3582 goto out_ieee80211_free_hw; 3583 } 3584 3585 pci_set_master(pdev); 3586 3587 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); 3588 if (err) { 3589 IL_WARN("No suitable DMA available.\n"); 3590 goto out_pci_disable_device; 3591 } 3592 3593 pci_set_drvdata(pdev, il); 3594 err = pci_request_regions(pdev, DRV_NAME); 3595 if (err) 3596 goto out_pci_disable_device; 3597 3598 /*********************** 3599 * 3. Read REV Register 3600 * ********************/ 3601 il->hw_base = pci_ioremap_bar(pdev, 0); 3602 if (!il->hw_base) { 3603 err = -ENODEV; 3604 goto out_pci_release_regions; 3605 } 3606 3607 D_INFO("pci_resource_len = 0x%08llx\n", 3608 (unsigned long long)pci_resource_len(pdev, 0)); 3609 D_INFO("pci_resource_base = %p\n", il->hw_base); 3610 3611 /* We disable the RETRY_TIMEOUT register (0x41) to keep 3612 * PCI Tx retries from interfering with C3 CPU state */ 3613 pci_write_config_byte(pdev, 0x41, 0x00); 3614 3615 /* these spin locks will be used in apm_init and EEPROM access 3616 * we should init now 3617 */ 3618 spin_lock_init(&il->reg_lock); 3619 spin_lock_init(&il->lock); 3620 3621 /* 3622 * stop and reset the on-board processor just in case it is in a 3623 * strange state ... like being left stranded by a primary kernel 3624 * and this is now the kdump kernel trying to start up 3625 */ 3626 _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET); 3627 3628 /*********************** 3629 * 4. Read EEPROM 3630 * ********************/ 3631 3632 /* Read the EEPROM */ 3633 err = il_eeprom_init(il); 3634 if (err) { 3635 IL_ERR("Unable to init EEPROM\n"); 3636 goto out_iounmap; 3637 } 3638 /* MAC Address location in EEPROM same for 3945/4965 */ 3639 eeprom = (struct il3945_eeprom *)il->eeprom; 3640 D_INFO("MAC address: %pM\n", eeprom->mac_address); 3641 SET_IEEE80211_PERM_ADDR(il->hw, eeprom->mac_address); 3642 3643 /*********************** 3644 * 5. Setup HW Constants 3645 * ********************/ 3646 /* Device-specific setup */ 3647 err = il3945_hw_set_hw_params(il); 3648 if (err) { 3649 IL_ERR("failed to set hw settings\n"); 3650 goto out_eeprom_free; 3651 } 3652 3653 /*********************** 3654 * 6. Setup il 3655 * ********************/ 3656 3657 err = il3945_init_drv(il); 3658 if (err) { 3659 IL_ERR("initializing driver failed\n"); 3660 goto out_unset_hw_params; 3661 } 3662 3663 IL_INFO("Detected Intel Wireless WiFi Link %s\n", il->cfg->name); 3664 3665 /*********************** 3666 * 7. Setup Services 3667 * ********************/ 3668 3669 spin_lock_irqsave(&il->lock, flags); 3670 il_disable_interrupts(il); 3671 spin_unlock_irqrestore(&il->lock, flags); 3672 3673 pci_enable_msi(il->pci_dev); 3674 3675 err = request_irq(il->pci_dev->irq, il_isr, IRQF_SHARED, DRV_NAME, il); 3676 if (err) { 3677 IL_ERR("Error allocating IRQ %d\n", il->pci_dev->irq); 3678 goto out_disable_msi; 3679 } 3680 3681 err = sysfs_create_group(&pdev->dev.kobj, &il3945_attribute_group); 3682 if (err) { 3683 IL_ERR("failed to create sysfs device attributes\n"); 3684 goto out_release_irq; 3685 } 3686 3687 il_set_rxon_channel(il, &il->bands[NL80211_BAND_2GHZ].channels[5]); 3688 err = il3945_setup_deferred_work(il); 3689 if (err) 3690 goto out_remove_sysfs; 3691 3692 il3945_setup_handlers(il); 3693 il_power_initialize(il); 3694 3695 /********************************* 3696 * 8. Setup and Register mac80211 3697 * *******************************/ 3698 3699 il_enable_interrupts(il); 3700 3701 err = il3945_setup_mac(il); 3702 if (err) 3703 goto out_destroy_workqueue; 3704 3705 il_dbgfs_register(il, DRV_NAME); 3706 3707 /* Start monitoring the killswitch */ 3708 queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll, 2 * HZ); 3709 3710 return 0; 3711 3712 out_destroy_workqueue: 3713 destroy_workqueue(il->workqueue); 3714 il->workqueue = NULL; 3715 out_remove_sysfs: 3716 sysfs_remove_group(&pdev->dev.kobj, &il3945_attribute_group); 3717 out_release_irq: 3718 free_irq(il->pci_dev->irq, il); 3719 out_disable_msi: 3720 pci_disable_msi(il->pci_dev); 3721 il_free_geos(il); 3722 il_free_channel_map(il); 3723 out_unset_hw_params: 3724 il3945_unset_hw_params(il); 3725 out_eeprom_free: 3726 il_eeprom_free(il); 3727 out_iounmap: 3728 iounmap(il->hw_base); 3729 out_pci_release_regions: 3730 pci_release_regions(pdev); 3731 out_pci_disable_device: 3732 pci_disable_device(pdev); 3733 out_ieee80211_free_hw: 3734 ieee80211_free_hw(il->hw); 3735 out: 3736 return err; 3737 } 3738 3739 static void 3740 il3945_pci_remove(struct pci_dev *pdev) 3741 { 3742 struct il_priv *il = pci_get_drvdata(pdev); 3743 unsigned long flags; 3744 3745 if (!il) 3746 return; 3747 3748 D_INFO("*** UNLOAD DRIVER ***\n"); 3749 3750 il_dbgfs_unregister(il); 3751 3752 set_bit(S_EXIT_PENDING, &il->status); 3753 3754 il_leds_exit(il); 3755 3756 if (il->mac80211_registered) { 3757 ieee80211_unregister_hw(il->hw); 3758 il->mac80211_registered = 0; 3759 } else { 3760 il3945_down(il); 3761 } 3762 3763 /* 3764 * Make sure device is reset to low power before unloading driver. 3765 * This may be redundant with il_down(), but there are paths to 3766 * run il_down() without calling apm_ops.stop(), and there are 3767 * paths to avoid running il_down() at all before leaving driver. 3768 * This (inexpensive) call *makes sure* device is reset. 3769 */ 3770 il_apm_stop(il); 3771 3772 /* make sure we flush any pending irq or 3773 * tasklet for the driver 3774 */ 3775 spin_lock_irqsave(&il->lock, flags); 3776 il_disable_interrupts(il); 3777 spin_unlock_irqrestore(&il->lock, flags); 3778 3779 il3945_synchronize_irq(il); 3780 3781 sysfs_remove_group(&pdev->dev.kobj, &il3945_attribute_group); 3782 3783 cancel_delayed_work_sync(&il->_3945.rfkill_poll); 3784 3785 il3945_dealloc_ucode_pci(il); 3786 3787 if (il->rxq.bd) 3788 il3945_rx_queue_free(il, &il->rxq); 3789 il3945_hw_txq_ctx_free(il); 3790 3791 il3945_unset_hw_params(il); 3792 3793 /*netif_stop_queue(dev); */ 3794 3795 /* ieee80211_unregister_hw calls il3945_mac_stop, which flushes 3796 * il->workqueue... so we can't take down the workqueue 3797 * until now... */ 3798 destroy_workqueue(il->workqueue); 3799 il->workqueue = NULL; 3800 3801 free_irq(pdev->irq, il); 3802 pci_disable_msi(pdev); 3803 3804 iounmap(il->hw_base); 3805 pci_release_regions(pdev); 3806 pci_disable_device(pdev); 3807 3808 il_free_channel_map(il); 3809 il_free_geos(il); 3810 kfree(il->scan_cmd); 3811 dev_kfree_skb(il->beacon_skb); 3812 ieee80211_free_hw(il->hw); 3813 } 3814 3815 /***************************************************************************** 3816 * 3817 * driver and module entry point 3818 * 3819 *****************************************************************************/ 3820 3821 static struct pci_driver il3945_driver = { 3822 .name = DRV_NAME, 3823 .id_table = il3945_hw_card_ids, 3824 .probe = il3945_pci_probe, 3825 .remove = il3945_pci_remove, 3826 .driver.pm = IL_LEGACY_PM_OPS, 3827 }; 3828 3829 static int __init 3830 il3945_init(void) 3831 { 3832 3833 int ret; 3834 pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n"); 3835 pr_info(DRV_COPYRIGHT "\n"); 3836 3837 /* 3838 * Disabling hardware scan means that mac80211 will perform scans 3839 * "the hard way", rather than using device's scan. 3840 */ 3841 if (il3945_mod_params.disable_hw_scan) { 3842 pr_info("hw_scan is disabled\n"); 3843 il3945_mac_ops.hw_scan = NULL; 3844 } 3845 3846 ret = il3945_rate_control_register(); 3847 if (ret) { 3848 pr_err("Unable to register rate control algorithm: %d\n", ret); 3849 return ret; 3850 } 3851 3852 ret = pci_register_driver(&il3945_driver); 3853 if (ret) { 3854 pr_err("Unable to initialize PCI module\n"); 3855 goto error_register; 3856 } 3857 3858 return ret; 3859 3860 error_register: 3861 il3945_rate_control_unregister(); 3862 return ret; 3863 } 3864 3865 static void __exit 3866 il3945_exit(void) 3867 { 3868 pci_unregister_driver(&il3945_driver); 3869 il3945_rate_control_unregister(); 3870 } 3871 3872 MODULE_FIRMWARE(IL3945_MODULE_FIRMWARE(IL3945_UCODE_API_MAX)); 3873 3874 module_param_named(antenna, il3945_mod_params.antenna, int, 0444); 3875 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])"); 3876 module_param_named(swcrypto, il3945_mod_params.sw_crypto, int, 0444); 3877 MODULE_PARM_DESC(swcrypto, "using software crypto (default 1 [software])"); 3878 module_param_named(disable_hw_scan, il3945_mod_params.disable_hw_scan, int, 3879 0444); 3880 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 1)"); 3881 #ifdef CONFIG_IWLEGACY_DEBUG 3882 module_param_named(debug, il_debug_level, uint, 0644); 3883 MODULE_PARM_DESC(debug, "debug output mask"); 3884 #endif 3885 module_param_named(fw_restart, il3945_mod_params.restart_fw, int, 0444); 3886 MODULE_PARM_DESC(fw_restart, "restart firmware in case of error"); 3887 3888 module_exit(il3945_exit); 3889 module_init(il3945_init); 3890