1*423e3ce3SKalle Valo /* 2*423e3ce3SKalle Valo 3*423e3ce3SKalle Valo Broadcom B43legacy wireless driver 4*423e3ce3SKalle Valo 5*423e3ce3SKalle Valo Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>, 6*423e3ce3SKalle Valo Stefano Brivio <stefano.brivio@polimi.it> 7*423e3ce3SKalle Valo Michael Buesch <m@bues.ch> 8*423e3ce3SKalle Valo Danny van Dyk <kugelfang@gentoo.org> 9*423e3ce3SKalle Valo Andreas Jaggi <andreas.jaggi@waterwave.ch> 10*423e3ce3SKalle Valo Copyright (c) 2007 Larry Finger <Larry.Finger@lwfinger.net> 11*423e3ce3SKalle Valo 12*423e3ce3SKalle Valo Some parts of the code in this file are derived from the ipw2200 13*423e3ce3SKalle Valo driver Copyright(c) 2003 - 2004 Intel Corporation. 14*423e3ce3SKalle Valo 15*423e3ce3SKalle Valo This program is free software; you can redistribute it and/or modify 16*423e3ce3SKalle Valo it under the terms of the GNU General Public License as published by 17*423e3ce3SKalle Valo the Free Software Foundation; either version 2 of the License, or 18*423e3ce3SKalle Valo (at your option) any later version. 19*423e3ce3SKalle Valo 20*423e3ce3SKalle Valo This program is distributed in the hope that it will be useful, 21*423e3ce3SKalle Valo but WITHOUT ANY WARRANTY; without even the implied warranty of 22*423e3ce3SKalle Valo MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 23*423e3ce3SKalle Valo GNU General Public License for more details. 24*423e3ce3SKalle Valo 25*423e3ce3SKalle Valo You should have received a copy of the GNU General Public License 26*423e3ce3SKalle Valo along with this program; see the file COPYING. If not, write to 27*423e3ce3SKalle Valo the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor, 28*423e3ce3SKalle Valo Boston, MA 02110-1301, USA. 29*423e3ce3SKalle Valo 30*423e3ce3SKalle Valo */ 31*423e3ce3SKalle Valo 32*423e3ce3SKalle Valo #ifndef B43legacy_PHY_H_ 33*423e3ce3SKalle Valo #define B43legacy_PHY_H_ 34*423e3ce3SKalle Valo 35*423e3ce3SKalle Valo #include <linux/types.h> 36*423e3ce3SKalle Valo 37*423e3ce3SKalle Valo enum { 38*423e3ce3SKalle Valo B43legacy_ANTENNA0, /* Antenna 0 */ 39*423e3ce3SKalle Valo B43legacy_ANTENNA1, /* Antenna 0 */ 40*423e3ce3SKalle Valo B43legacy_ANTENNA_AUTO1, /* Automatic, starting with antenna 1 */ 41*423e3ce3SKalle Valo B43legacy_ANTENNA_AUTO0, /* Automatic, starting with antenna 0 */ 42*423e3ce3SKalle Valo 43*423e3ce3SKalle Valo B43legacy_ANTENNA_AUTO = B43legacy_ANTENNA_AUTO0, 44*423e3ce3SKalle Valo B43legacy_ANTENNA_DEFAULT = B43legacy_ANTENNA_AUTO, 45*423e3ce3SKalle Valo }; 46*423e3ce3SKalle Valo 47*423e3ce3SKalle Valo enum { 48*423e3ce3SKalle Valo B43legacy_INTERFMODE_NONE, 49*423e3ce3SKalle Valo B43legacy_INTERFMODE_NONWLAN, 50*423e3ce3SKalle Valo B43legacy_INTERFMODE_MANUALWLAN, 51*423e3ce3SKalle Valo B43legacy_INTERFMODE_AUTOWLAN, 52*423e3ce3SKalle Valo }; 53*423e3ce3SKalle Valo 54*423e3ce3SKalle Valo /*** PHY Registers ***/ 55*423e3ce3SKalle Valo 56*423e3ce3SKalle Valo /* Routing */ 57*423e3ce3SKalle Valo #define B43legacy_PHYROUTE_OFDM_GPHY 0x400 58*423e3ce3SKalle Valo #define B43legacy_PHYROUTE_EXT_GPHY 0x800 59*423e3ce3SKalle Valo 60*423e3ce3SKalle Valo /* Base registers. */ 61*423e3ce3SKalle Valo #define B43legacy_PHY_BASE(reg) (reg) 62*423e3ce3SKalle Valo /* OFDM (A) registers of a G-PHY */ 63*423e3ce3SKalle Valo #define B43legacy_PHY_OFDM(reg) ((reg) | B43legacy_PHYROUTE_OFDM_GPHY) 64*423e3ce3SKalle Valo /* Extended G-PHY registers */ 65*423e3ce3SKalle Valo #define B43legacy_PHY_EXTG(reg) ((reg) | B43legacy_PHYROUTE_EXT_GPHY) 66*423e3ce3SKalle Valo 67*423e3ce3SKalle Valo 68*423e3ce3SKalle Valo /* Extended G-PHY Registers */ 69*423e3ce3SKalle Valo #define B43legacy_PHY_CLASSCTL B43legacy_PHY_EXTG(0x02) /* Classify control */ 70*423e3ce3SKalle Valo #define B43legacy_PHY_GTABCTL B43legacy_PHY_EXTG(0x03) /* G-PHY table control (see below) */ 71*423e3ce3SKalle Valo #define B43legacy_PHY_GTABOFF 0x03FF /* G-PHY table offset (see below) */ 72*423e3ce3SKalle Valo #define B43legacy_PHY_GTABNR 0xFC00 /* G-PHY table number (see below) */ 73*423e3ce3SKalle Valo #define B43legacy_PHY_GTABNR_SHIFT 10 74*423e3ce3SKalle Valo #define B43legacy_PHY_GTABDATA B43legacy_PHY_EXTG(0x04) /* G-PHY table data */ 75*423e3ce3SKalle Valo #define B43legacy_PHY_LO_MASK B43legacy_PHY_EXTG(0x0F) /* Local Oscillator control mask */ 76*423e3ce3SKalle Valo #define B43legacy_PHY_LO_CTL B43legacy_PHY_EXTG(0x10) /* Local Oscillator control */ 77*423e3ce3SKalle Valo #define B43legacy_PHY_RFOVER B43legacy_PHY_EXTG(0x11) /* RF override */ 78*423e3ce3SKalle Valo #define B43legacy_PHY_RFOVERVAL B43legacy_PHY_EXTG(0x12) /* RF override value */ 79*423e3ce3SKalle Valo /*** OFDM table numbers ***/ 80*423e3ce3SKalle Valo #define B43legacy_OFDMTAB(number, offset) \ 81*423e3ce3SKalle Valo (((number) << B43legacy_PHY_OTABLENR_SHIFT) \ 82*423e3ce3SKalle Valo | (offset)) 83*423e3ce3SKalle Valo #define B43legacy_OFDMTAB_AGC1 B43legacy_OFDMTAB(0x00, 0) 84*423e3ce3SKalle Valo #define B43legacy_OFDMTAB_GAIN0 B43legacy_OFDMTAB(0x00, 0) 85*423e3ce3SKalle Valo #define B43legacy_OFDMTAB_GAINX B43legacy_OFDMTAB(0x01, 0) 86*423e3ce3SKalle Valo #define B43legacy_OFDMTAB_GAIN1 B43legacy_OFDMTAB(0x01, 4) 87*423e3ce3SKalle Valo #define B43legacy_OFDMTAB_AGC3 B43legacy_OFDMTAB(0x02, 0) 88*423e3ce3SKalle Valo #define B43legacy_OFDMTAB_GAIN2 B43legacy_OFDMTAB(0x02, 3) 89*423e3ce3SKalle Valo #define B43legacy_OFDMTAB_LNAHPFGAIN1 B43legacy_OFDMTAB(0x03, 0) 90*423e3ce3SKalle Valo #define B43legacy_OFDMTAB_WRSSI B43legacy_OFDMTAB(0x04, 0) 91*423e3ce3SKalle Valo #define B43legacy_OFDMTAB_LNAHPFGAIN2 B43legacy_OFDMTAB(0x04, 0) 92*423e3ce3SKalle Valo #define B43legacy_OFDMTAB_NOISESCALE B43legacy_OFDMTAB(0x05, 0) 93*423e3ce3SKalle Valo #define B43legacy_OFDMTAB_AGC2 B43legacy_OFDMTAB(0x06, 0) 94*423e3ce3SKalle Valo #define B43legacy_OFDMTAB_ROTOR B43legacy_OFDMTAB(0x08, 0) 95*423e3ce3SKalle Valo #define B43legacy_OFDMTAB_ADVRETARD B43legacy_OFDMTAB(0x09, 0) 96*423e3ce3SKalle Valo #define B43legacy_OFDMTAB_DAC B43legacy_OFDMTAB(0x0C, 0) 97*423e3ce3SKalle Valo #define B43legacy_OFDMTAB_DC B43legacy_OFDMTAB(0x0E, 7) 98*423e3ce3SKalle Valo #define B43legacy_OFDMTAB_PWRDYN2 B43legacy_OFDMTAB(0x0E, 12) 99*423e3ce3SKalle Valo #define B43legacy_OFDMTAB_LNAGAIN B43legacy_OFDMTAB(0x0E, 13) 100*423e3ce3SKalle Valo 101*423e3ce3SKalle Valo #define B43legacy_OFDMTAB_LPFGAIN B43legacy_OFDMTAB(0x0F, 12) 102*423e3ce3SKalle Valo #define B43legacy_OFDMTAB_RSSI B43legacy_OFDMTAB(0x10, 0) 103*423e3ce3SKalle Valo 104*423e3ce3SKalle Valo #define B43legacy_OFDMTAB_AGC1_R1 B43legacy_OFDMTAB(0x13, 0) 105*423e3ce3SKalle Valo #define B43legacy_OFDMTAB_GAINX_R1 B43legacy_OFDMTAB(0x14, 0) 106*423e3ce3SKalle Valo #define B43legacy_OFDMTAB_MINSIGSQ B43legacy_OFDMTAB(0x14, 1) 107*423e3ce3SKalle Valo #define B43legacy_OFDMTAB_AGC3_R1 B43legacy_OFDMTAB(0x15, 0) 108*423e3ce3SKalle Valo #define B43legacy_OFDMTAB_WRSSI_R1 B43legacy_OFDMTAB(0x15, 4) 109*423e3ce3SKalle Valo #define B43legacy_OFDMTAB_TSSI B43legacy_OFDMTAB(0x15, 0) 110*423e3ce3SKalle Valo #define B43legacy_OFDMTAB_DACRFPABB B43legacy_OFDMTAB(0x16, 0) 111*423e3ce3SKalle Valo #define B43legacy_OFDMTAB_DACOFF B43legacy_OFDMTAB(0x17, 0) 112*423e3ce3SKalle Valo #define B43legacy_OFDMTAB_DCBIAS B43legacy_OFDMTAB(0x18, 0) 113*423e3ce3SKalle Valo 114*423e3ce3SKalle Valo void b43legacy_put_attenuation_into_ranges(int *_bbatt, int *_rfatt); 115*423e3ce3SKalle Valo 116*423e3ce3SKalle Valo /* OFDM (A) PHY Registers */ 117*423e3ce3SKalle Valo #define B43legacy_PHY_VERSION_OFDM B43legacy_PHY_OFDM(0x00) /* Versioning register for A-PHY */ 118*423e3ce3SKalle Valo #define B43legacy_PHY_BBANDCFG B43legacy_PHY_OFDM(0x01) /* Baseband config */ 119*423e3ce3SKalle Valo #define B43legacy_PHY_BBANDCFG_RXANT 0x180 /* RX Antenna selection */ 120*423e3ce3SKalle Valo #define B43legacy_PHY_BBANDCFG_RXANT_SHIFT 7 121*423e3ce3SKalle Valo #define B43legacy_PHY_PWRDOWN B43legacy_PHY_OFDM(0x03) /* Powerdown */ 122*423e3ce3SKalle Valo #define B43legacy_PHY_CRSTHRES1 B43legacy_PHY_OFDM(0x06) /* CRS Threshold 1 */ 123*423e3ce3SKalle Valo #define B43legacy_PHY_LNAHPFCTL B43legacy_PHY_OFDM(0x1C) /* LNA/HPF control */ 124*423e3ce3SKalle Valo #define B43legacy_PHY_ADIVRELATED B43legacy_PHY_OFDM(0x27) /* FIXME rename */ 125*423e3ce3SKalle Valo #define B43legacy_PHY_CRS0 B43legacy_PHY_OFDM(0x29) 126*423e3ce3SKalle Valo #define B43legacy_PHY_ANTDWELL B43legacy_PHY_OFDM(0x2B) /* Antenna dwell */ 127*423e3ce3SKalle Valo #define B43legacy_PHY_ANTDWELL_AUTODIV1 0x0100 /* Automatic RX diversity start antenna */ 128*423e3ce3SKalle Valo #define B43legacy_PHY_ENCORE B43legacy_PHY_OFDM(0x49) /* "Encore" (RangeMax / BroadRange) */ 129*423e3ce3SKalle Valo #define B43legacy_PHY_ENCORE_EN 0x0200 /* Encore enable */ 130*423e3ce3SKalle Valo #define B43legacy_PHY_LMS B43legacy_PHY_OFDM(0x55) 131*423e3ce3SKalle Valo #define B43legacy_PHY_OFDM61 B43legacy_PHY_OFDM(0x61) /* FIXME rename */ 132*423e3ce3SKalle Valo #define B43legacy_PHY_OFDM61_10 0x0010 /* FIXME rename */ 133*423e3ce3SKalle Valo #define B43legacy_PHY_IQBAL B43legacy_PHY_OFDM(0x69) /* I/Q balance */ 134*423e3ce3SKalle Valo #define B43legacy_PHY_OTABLECTL B43legacy_PHY_OFDM(0x72) /* OFDM table control (see below) */ 135*423e3ce3SKalle Valo #define B43legacy_PHY_OTABLEOFF 0x03FF /* OFDM table offset (see below) */ 136*423e3ce3SKalle Valo #define B43legacy_PHY_OTABLENR 0xFC00 /* OFDM table number (see below) */ 137*423e3ce3SKalle Valo #define B43legacy_PHY_OTABLENR_SHIFT 10 138*423e3ce3SKalle Valo #define B43legacy_PHY_OTABLEI B43legacy_PHY_OFDM(0x73) /* OFDM table data I */ 139*423e3ce3SKalle Valo #define B43legacy_PHY_OTABLEQ B43legacy_PHY_OFDM(0x74) /* OFDM table data Q */ 140*423e3ce3SKalle Valo #define B43legacy_PHY_HPWR_TSSICTL B43legacy_PHY_OFDM(0x78) /* Hardware power TSSI control */ 141*423e3ce3SKalle Valo #define B43legacy_PHY_NRSSITHRES B43legacy_PHY_OFDM(0x8A) /* NRSSI threshold */ 142*423e3ce3SKalle Valo #define B43legacy_PHY_ANTWRSETT B43legacy_PHY_OFDM(0x8C) /* Antenna WR settle */ 143*423e3ce3SKalle Valo #define B43legacy_PHY_ANTWRSETT_ARXDIV 0x2000 /* Automatic RX diversity enabled */ 144*423e3ce3SKalle Valo #define B43legacy_PHY_CLIPPWRDOWNT B43legacy_PHY_OFDM(0x93) /* Clip powerdown threshold */ 145*423e3ce3SKalle Valo #define B43legacy_PHY_OFDM9B B43legacy_PHY_OFDM(0x9B) /* FIXME rename */ 146*423e3ce3SKalle Valo #define B43legacy_PHY_N1P1GAIN B43legacy_PHY_OFDM(0xA0) 147*423e3ce3SKalle Valo #define B43legacy_PHY_P1P2GAIN B43legacy_PHY_OFDM(0xA1) 148*423e3ce3SKalle Valo #define B43legacy_PHY_N1N2GAIN B43legacy_PHY_OFDM(0xA2) 149*423e3ce3SKalle Valo #define B43legacy_PHY_CLIPTHRES B43legacy_PHY_OFDM(0xA3) 150*423e3ce3SKalle Valo #define B43legacy_PHY_CLIPN1P2THRES B43legacy_PHY_OFDM(0xA4) 151*423e3ce3SKalle Valo #define B43legacy_PHY_DIVSRCHIDX B43legacy_PHY_OFDM(0xA8) /* Divider search gain/index */ 152*423e3ce3SKalle Valo #define B43legacy_PHY_CLIPP2THRES B43legacy_PHY_OFDM(0xA9) 153*423e3ce3SKalle Valo #define B43legacy_PHY_CLIPP3THRES B43legacy_PHY_OFDM(0xAA) 154*423e3ce3SKalle Valo #define B43legacy_PHY_DIVP1P2GAIN B43legacy_PHY_OFDM(0xAB) 155*423e3ce3SKalle Valo #define B43legacy_PHY_DIVSRCHGAINBACK B43legacy_PHY_OFDM(0xAD) /* Divider search gain back */ 156*423e3ce3SKalle Valo #define B43legacy_PHY_DIVSRCHGAINCHNG B43legacy_PHY_OFDM(0xAE) /* Divider search gain change */ 157*423e3ce3SKalle Valo #define B43legacy_PHY_CRSTHRES1_R1 B43legacy_PHY_OFDM(0xC0) /* CRS Threshold 1 (rev 1 only) */ 158*423e3ce3SKalle Valo #define B43legacy_PHY_CRSTHRES2_R1 B43legacy_PHY_OFDM(0xC1) /* CRS Threshold 2 (rev 1 only) */ 159*423e3ce3SKalle Valo #define B43legacy_PHY_TSSIP_LTBASE B43legacy_PHY_OFDM(0x380) /* TSSI power lookup table base */ 160*423e3ce3SKalle Valo #define B43legacy_PHY_DC_LTBASE B43legacy_PHY_OFDM(0x3A0) /* DC lookup table base */ 161*423e3ce3SKalle Valo #define B43legacy_PHY_GAIN_LTBASE B43legacy_PHY_OFDM(0x3C0) /* Gain lookup table base */ 162*423e3ce3SKalle Valo 163*423e3ce3SKalle Valo void b43legacy_put_attenuation_into_ranges(int *_bbatt, int *_rfatt); 164*423e3ce3SKalle Valo 165*423e3ce3SKalle Valo /* Masks for the different PHY versioning registers. */ 166*423e3ce3SKalle Valo #define B43legacy_PHYVER_ANALOG 0xF000 167*423e3ce3SKalle Valo #define B43legacy_PHYVER_ANALOG_SHIFT 12 168*423e3ce3SKalle Valo #define B43legacy_PHYVER_TYPE 0x0F00 169*423e3ce3SKalle Valo #define B43legacy_PHYVER_TYPE_SHIFT 8 170*423e3ce3SKalle Valo #define B43legacy_PHYVER_VERSION 0x00FF 171*423e3ce3SKalle Valo 172*423e3ce3SKalle Valo struct b43legacy_wldev; 173*423e3ce3SKalle Valo 174*423e3ce3SKalle Valo void b43legacy_phy_lock(struct b43legacy_wldev *dev); 175*423e3ce3SKalle Valo void b43legacy_phy_unlock(struct b43legacy_wldev *dev); 176*423e3ce3SKalle Valo 177*423e3ce3SKalle Valo /* Card uses the loopback gain stuff */ 178*423e3ce3SKalle Valo #define has_loopback_gain(phy) \ 179*423e3ce3SKalle Valo (((phy)->rev > 1) || ((phy)->gmode)) 180*423e3ce3SKalle Valo 181*423e3ce3SKalle Valo u16 b43legacy_phy_read(struct b43legacy_wldev *dev, u16 offset); 182*423e3ce3SKalle Valo void b43legacy_phy_write(struct b43legacy_wldev *dev, u16 offset, u16 val); 183*423e3ce3SKalle Valo 184*423e3ce3SKalle Valo int b43legacy_phy_init_tssi2dbm_table(struct b43legacy_wldev *dev); 185*423e3ce3SKalle Valo int b43legacy_phy_init(struct b43legacy_wldev *dev); 186*423e3ce3SKalle Valo 187*423e3ce3SKalle Valo void b43legacy_set_rx_antenna(struct b43legacy_wldev *dev, int antenna); 188*423e3ce3SKalle Valo 189*423e3ce3SKalle Valo void b43legacy_phy_set_antenna_diversity(struct b43legacy_wldev *dev); 190*423e3ce3SKalle Valo void b43legacy_phy_calibrate(struct b43legacy_wldev *dev); 191*423e3ce3SKalle Valo int b43legacy_phy_connect(struct b43legacy_wldev *dev, int connect); 192*423e3ce3SKalle Valo 193*423e3ce3SKalle Valo void b43legacy_phy_lo_b_measure(struct b43legacy_wldev *dev); 194*423e3ce3SKalle Valo void b43legacy_phy_lo_g_measure(struct b43legacy_wldev *dev); 195*423e3ce3SKalle Valo void b43legacy_phy_xmitpower(struct b43legacy_wldev *dev); 196*423e3ce3SKalle Valo 197*423e3ce3SKalle Valo /* Adjust the LocalOscillator to the saved values. 198*423e3ce3SKalle Valo * "fixed" is only set to 1 once in initialization. Set to 0 otherwise. 199*423e3ce3SKalle Valo */ 200*423e3ce3SKalle Valo void b43legacy_phy_lo_adjust(struct b43legacy_wldev *dev, int fixed); 201*423e3ce3SKalle Valo void b43legacy_phy_lo_mark_all_unused(struct b43legacy_wldev *dev); 202*423e3ce3SKalle Valo 203*423e3ce3SKalle Valo void b43legacy_phy_set_baseband_attenuation(struct b43legacy_wldev *dev, 204*423e3ce3SKalle Valo u16 baseband_attenuation); 205*423e3ce3SKalle Valo 206*423e3ce3SKalle Valo void b43legacy_power_saving_ctl_bits(struct b43legacy_wldev *dev, 207*423e3ce3SKalle Valo int bit25, int bit26); 208*423e3ce3SKalle Valo 209*423e3ce3SKalle Valo #endif /* B43legacy_PHY_H_ */ 210