1 /* 2 * Copyright (c) 2012-2016 Qualcomm Atheros, Inc. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #ifndef __WIL6210_H__ 18 #define __WIL6210_H__ 19 20 #include <linux/etherdevice.h> 21 #include <linux/netdevice.h> 22 #include <linux/wireless.h> 23 #include <net/cfg80211.h> 24 #include <linux/timex.h> 25 #include <linux/types.h> 26 #include "wmi.h" 27 #include "wil_platform.h" 28 29 extern bool no_fw_recovery; 30 extern unsigned int mtu_max; 31 extern unsigned short rx_ring_overflow_thrsh; 32 extern int agg_wsize; 33 extern u32 vring_idle_trsh; 34 extern bool rx_align_2; 35 extern bool debug_fw; 36 extern bool disable_ap_sme; 37 38 #define WIL_NAME "wil6210" 39 #define WIL_FW_NAME_DEFAULT "wil6210.fw" /* code Sparrow B0 */ 40 #define WIL_FW_NAME_SPARROW_PLUS "wil6210_sparrow_plus.fw" /* code Sparrow D0 */ 41 #define WIL_BOARD_FILE_NAME "wil6210.brd" /* board & radio parameters */ 42 43 #define WIL_MAX_BUS_REQUEST_KBPS 800000 /* ~6.1Gbps */ 44 45 /** 46 * extract bits [@b0:@b1] (inclusive) from the value @x 47 * it should be @b0 <= @b1, or result is incorrect 48 */ 49 static inline u32 WIL_GET_BITS(u32 x, int b0, int b1) 50 { 51 return (x >> b0) & ((1 << (b1 - b0 + 1)) - 1); 52 } 53 54 #define WIL6210_MEM_SIZE (2*1024*1024UL) 55 56 #define WIL_TX_Q_LEN_DEFAULT (4000) 57 #define WIL_RX_RING_SIZE_ORDER_DEFAULT (10) 58 #define WIL_TX_RING_SIZE_ORDER_DEFAULT (12) 59 #define WIL_BCAST_RING_SIZE_ORDER_DEFAULT (7) 60 #define WIL_BCAST_MCS0_LIMIT (1024) /* limit for MCS0 frame size */ 61 /* limit ring size in range [32..32k] */ 62 #define WIL_RING_SIZE_ORDER_MIN (5) 63 #define WIL_RING_SIZE_ORDER_MAX (15) 64 #define WIL6210_MAX_TX_RINGS (24) /* HW limit */ 65 #define WIL6210_MAX_CID (8) /* HW limit */ 66 #define WIL6210_NAPI_BUDGET (16) /* arbitrary */ 67 #define WIL_MAX_AMPDU_SIZE (64 * 1024) /* FW/HW limit */ 68 #define WIL_MAX_AGG_WSIZE (32) /* FW/HW limit */ 69 /* Hardware offload block adds the following: 70 * 26 bytes - 3-address QoS data header 71 * 8 bytes - IV + EIV (for GCMP) 72 * 8 bytes - SNAP 73 * 16 bytes - MIC (for GCMP) 74 * 4 bytes - CRC 75 */ 76 #define WIL_MAX_MPDU_OVERHEAD (62) 77 78 /* Calculate MAC buffer size for the firmware. It includes all overhead, 79 * as it will go over the air, and need to be 8 byte aligned 80 */ 81 static inline u32 wil_mtu2macbuf(u32 mtu) 82 { 83 return ALIGN(mtu + WIL_MAX_MPDU_OVERHEAD, 8); 84 } 85 86 /* MTU for Ethernet need to take into account 8-byte SNAP header 87 * to be added when encapsulating Ethernet frame into 802.11 88 */ 89 #define WIL_MAX_ETH_MTU (IEEE80211_MAX_DATA_LEN_DMG - 8) 90 /* Max supported by wil6210 value for interrupt threshold is 5sec. */ 91 #define WIL6210_ITR_TRSH_MAX (5000000) 92 #define WIL6210_ITR_TX_INTERFRAME_TIMEOUT_DEFAULT (13) /* usec */ 93 #define WIL6210_ITR_RX_INTERFRAME_TIMEOUT_DEFAULT (13) /* usec */ 94 #define WIL6210_ITR_TX_MAX_BURST_DURATION_DEFAULT (500) /* usec */ 95 #define WIL6210_ITR_RX_MAX_BURST_DURATION_DEFAULT (500) /* usec */ 96 #define WIL6210_FW_RECOVERY_RETRIES (5) /* try to recover this many times */ 97 #define WIL6210_FW_RECOVERY_TO msecs_to_jiffies(5000) 98 #define WIL6210_SCAN_TO msecs_to_jiffies(10000) 99 #define WIL6210_DISCONNECT_TO_MS (2000) 100 #define WIL6210_RX_HIGH_TRSH_INIT (0) 101 #define WIL6210_RX_HIGH_TRSH_DEFAULT \ 102 (1 << (WIL_RX_RING_SIZE_ORDER_DEFAULT - 3)) 103 #define WIL_MAX_DMG_AID 254 /* for DMG only 1-254 allowed (see 104 * 802.11REVmc/D5.0, section 9.4.1.8) 105 */ 106 /* Hardware definitions begin */ 107 108 /* 109 * Mapping 110 * RGF File | Host addr | FW addr 111 * | | 112 * user_rgf | 0x000000 | 0x880000 113 * dma_rgf | 0x001000 | 0x881000 114 * pcie_rgf | 0x002000 | 0x882000 115 * | | 116 */ 117 118 /* Where various structures placed in host address space */ 119 #define WIL6210_FW_HOST_OFF (0x880000UL) 120 121 #define HOSTADDR(fwaddr) (fwaddr - WIL6210_FW_HOST_OFF) 122 123 /* 124 * Interrupt control registers block 125 * 126 * each interrupt controlled by the same bit in all registers 127 */ 128 struct RGF_ICR { 129 u32 ICC; /* Cause Control, RW: 0 - W1C, 1 - COR */ 130 u32 ICR; /* Cause, W1C/COR depending on ICC */ 131 u32 ICM; /* Cause masked (ICR & ~IMV), W1C/COR depending on ICC */ 132 u32 ICS; /* Cause Set, WO */ 133 u32 IMV; /* Mask, RW+S/C */ 134 u32 IMS; /* Mask Set, write 1 to set */ 135 u32 IMC; /* Mask Clear, write 1 to clear */ 136 } __packed; 137 138 /* registers - FW addresses */ 139 #define RGF_USER_USAGE_1 (0x880004) 140 #define RGF_USER_USAGE_6 (0x880018) 141 #define BIT_USER_OOB_MODE BIT(31) 142 #define RGF_USER_HW_MACHINE_STATE (0x8801dc) 143 #define HW_MACHINE_BOOT_DONE (0x3fffffd) 144 #define RGF_USER_USER_CPU_0 (0x8801e0) 145 #define BIT_USER_USER_CPU_MAN_RST BIT(1) /* user_cpu_man_rst */ 146 #define RGF_USER_MAC_CPU_0 (0x8801fc) 147 #define BIT_USER_MAC_CPU_MAN_RST BIT(1) /* mac_cpu_man_rst */ 148 #define RGF_USER_USER_SCRATCH_PAD (0x8802bc) 149 #define RGF_USER_BL (0x880A3C) /* Boot Loader */ 150 #define RGF_USER_FW_REV_ID (0x880a8c) /* chip revision */ 151 #define RGF_USER_CLKS_CTL_0 (0x880abc) 152 #define BIT_USER_CLKS_CAR_AHB_SW_SEL BIT(1) /* ref clk/PLL */ 153 #define BIT_USER_CLKS_RST_PWGD BIT(11) /* reset on "power good" */ 154 #define RGF_USER_CLKS_CTL_SW_RST_VEC_0 (0x880b04) 155 #define RGF_USER_CLKS_CTL_SW_RST_VEC_1 (0x880b08) 156 #define RGF_USER_CLKS_CTL_SW_RST_VEC_2 (0x880b0c) 157 #define RGF_USER_CLKS_CTL_SW_RST_VEC_3 (0x880b10) 158 #define RGF_USER_CLKS_CTL_SW_RST_MASK_0 (0x880b14) 159 #define BIT_HPAL_PERST_FROM_PAD BIT(6) 160 #define BIT_CAR_PERST_RST BIT(7) 161 #define RGF_USER_USER_ICR (0x880b4c) /* struct RGF_ICR */ 162 #define BIT_USER_USER_ICR_SW_INT_2 BIT(18) 163 #define RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_0 (0x880c18) 164 #define RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_1 (0x880c2c) 165 #define RGF_USER_SPARROW_M_4 (0x880c50) /* Sparrow */ 166 #define BIT_SPARROW_M_4_SEL_SLEEP_OR_REF BIT(2) 167 168 #define RGF_DMA_EP_TX_ICR (0x881bb4) /* struct RGF_ICR */ 169 #define BIT_DMA_EP_TX_ICR_TX_DONE BIT(0) 170 #define BIT_DMA_EP_TX_ICR_TX_DONE_N(n) BIT(n+1) /* n = [0..23] */ 171 #define RGF_DMA_EP_RX_ICR (0x881bd0) /* struct RGF_ICR */ 172 #define BIT_DMA_EP_RX_ICR_RX_DONE BIT(0) 173 #define BIT_DMA_EP_RX_ICR_RX_HTRSH BIT(1) 174 #define RGF_DMA_EP_MISC_ICR (0x881bec) /* struct RGF_ICR */ 175 #define BIT_DMA_EP_MISC_ICR_RX_HTRSH BIT(0) 176 #define BIT_DMA_EP_MISC_ICR_TX_NO_ACT BIT(1) 177 #define BIT_DMA_EP_MISC_ICR_HALP BIT(27) 178 #define BIT_DMA_EP_MISC_ICR_FW_INT(n) BIT(28+n) /* n = [0..3] */ 179 180 /* Legacy interrupt moderation control (before Sparrow v2)*/ 181 #define RGF_DMA_ITR_CNT_TRSH (0x881c5c) 182 #define RGF_DMA_ITR_CNT_DATA (0x881c60) 183 #define RGF_DMA_ITR_CNT_CRL (0x881c64) 184 #define BIT_DMA_ITR_CNT_CRL_EN BIT(0) 185 #define BIT_DMA_ITR_CNT_CRL_EXT_TICK BIT(1) 186 #define BIT_DMA_ITR_CNT_CRL_FOREVER BIT(2) 187 #define BIT_DMA_ITR_CNT_CRL_CLR BIT(3) 188 #define BIT_DMA_ITR_CNT_CRL_REACH_TRSH BIT(4) 189 190 /* Offload control (Sparrow B0+) */ 191 #define RGF_DMA_OFUL_NID_0 (0x881cd4) 192 #define BIT_DMA_OFUL_NID_0_RX_EXT_TR_EN BIT(0) 193 #define BIT_DMA_OFUL_NID_0_TX_EXT_TR_EN BIT(1) 194 #define BIT_DMA_OFUL_NID_0_RX_EXT_A3_SRC BIT(2) 195 #define BIT_DMA_OFUL_NID_0_TX_EXT_A3_SRC BIT(3) 196 197 /* New (sparrow v2+) interrupt moderation control */ 198 #define RGF_DMA_ITR_TX_DESQ_NO_MOD (0x881d40) 199 #define RGF_DMA_ITR_TX_CNT_TRSH (0x881d34) 200 #define RGF_DMA_ITR_TX_CNT_DATA (0x881d38) 201 #define RGF_DMA_ITR_TX_CNT_CTL (0x881d3c) 202 #define BIT_DMA_ITR_TX_CNT_CTL_EN BIT(0) 203 #define BIT_DMA_ITR_TX_CNT_CTL_EXT_TIC_SEL BIT(1) 204 #define BIT_DMA_ITR_TX_CNT_CTL_FOREVER BIT(2) 205 #define BIT_DMA_ITR_TX_CNT_CTL_CLR BIT(3) 206 #define BIT_DMA_ITR_TX_CNT_CTL_REACHED_TRESH BIT(4) 207 #define BIT_DMA_ITR_TX_CNT_CTL_CROSS_EN BIT(5) 208 #define BIT_DMA_ITR_TX_CNT_CTL_FREE_RUNNIG BIT(6) 209 #define RGF_DMA_ITR_TX_IDL_CNT_TRSH (0x881d60) 210 #define RGF_DMA_ITR_TX_IDL_CNT_DATA (0x881d64) 211 #define RGF_DMA_ITR_TX_IDL_CNT_CTL (0x881d68) 212 #define BIT_DMA_ITR_TX_IDL_CNT_CTL_EN BIT(0) 213 #define BIT_DMA_ITR_TX_IDL_CNT_CTL_EXT_TIC_SEL BIT(1) 214 #define BIT_DMA_ITR_TX_IDL_CNT_CTL_FOREVER BIT(2) 215 #define BIT_DMA_ITR_TX_IDL_CNT_CTL_CLR BIT(3) 216 #define BIT_DMA_ITR_TX_IDL_CNT_CTL_REACHED_TRESH BIT(4) 217 #define RGF_DMA_ITR_RX_DESQ_NO_MOD (0x881d50) 218 #define RGF_DMA_ITR_RX_CNT_TRSH (0x881d44) 219 #define RGF_DMA_ITR_RX_CNT_DATA (0x881d48) 220 #define RGF_DMA_ITR_RX_CNT_CTL (0x881d4c) 221 #define BIT_DMA_ITR_RX_CNT_CTL_EN BIT(0) 222 #define BIT_DMA_ITR_RX_CNT_CTL_EXT_TIC_SEL BIT(1) 223 #define BIT_DMA_ITR_RX_CNT_CTL_FOREVER BIT(2) 224 #define BIT_DMA_ITR_RX_CNT_CTL_CLR BIT(3) 225 #define BIT_DMA_ITR_RX_CNT_CTL_REACHED_TRESH BIT(4) 226 #define BIT_DMA_ITR_RX_CNT_CTL_CROSS_EN BIT(5) 227 #define BIT_DMA_ITR_RX_CNT_CTL_FREE_RUNNIG BIT(6) 228 #define RGF_DMA_ITR_RX_IDL_CNT_TRSH (0x881d54) 229 #define RGF_DMA_ITR_RX_IDL_CNT_DATA (0x881d58) 230 #define RGF_DMA_ITR_RX_IDL_CNT_CTL (0x881d5c) 231 #define BIT_DMA_ITR_RX_IDL_CNT_CTL_EN BIT(0) 232 #define BIT_DMA_ITR_RX_IDL_CNT_CTL_EXT_TIC_SEL BIT(1) 233 #define BIT_DMA_ITR_RX_IDL_CNT_CTL_FOREVER BIT(2) 234 #define BIT_DMA_ITR_RX_IDL_CNT_CTL_CLR BIT(3) 235 #define BIT_DMA_ITR_RX_IDL_CNT_CTL_REACHED_TRESH BIT(4) 236 237 #define RGF_DMA_PSEUDO_CAUSE (0x881c68) 238 #define RGF_DMA_PSEUDO_CAUSE_MASK_SW (0x881c6c) 239 #define RGF_DMA_PSEUDO_CAUSE_MASK_FW (0x881c70) 240 #define BIT_DMA_PSEUDO_CAUSE_RX BIT(0) 241 #define BIT_DMA_PSEUDO_CAUSE_TX BIT(1) 242 #define BIT_DMA_PSEUDO_CAUSE_MISC BIT(2) 243 244 #define RGF_HP_CTRL (0x88265c) 245 #define RGF_PCIE_LOS_COUNTER_CTL (0x882dc4) 246 247 /* MAC timer, usec, for packet lifetime */ 248 #define RGF_MAC_MTRL_COUNTER_0 (0x886aa8) 249 250 #define RGF_CAF_ICR (0x88946c) /* struct RGF_ICR */ 251 #define RGF_CAF_OSC_CONTROL (0x88afa4) 252 #define BIT_CAF_OSC_XTAL_EN BIT(0) 253 #define RGF_CAF_PLL_LOCK_STATUS (0x88afec) 254 #define BIT_CAF_OSC_DIG_XTAL_STABLE BIT(0) 255 256 #define RGF_USER_JTAG_DEV_ID (0x880b34) /* device ID */ 257 #define JTAG_DEV_ID_SPARROW (0x2632072f) 258 259 #define RGF_USER_REVISION_ID (0x88afe4) 260 #define RGF_USER_REVISION_ID_MASK (3) 261 #define REVISION_ID_SPARROW_B0 (0x0) 262 #define REVISION_ID_SPARROW_D0 (0x3) 263 264 /* crash codes for FW/Ucode stored here */ 265 #define RGF_FW_ASSERT_CODE (0x91f020) 266 #define RGF_UCODE_ASSERT_CODE (0x91f028) 267 268 enum { 269 HW_VER_UNKNOWN, 270 HW_VER_SPARROW_B0, /* REVISION_ID_SPARROW_B0 */ 271 HW_VER_SPARROW_D0, /* REVISION_ID_SPARROW_D0 */ 272 }; 273 274 /* popular locations */ 275 #define RGF_MBOX RGF_USER_USER_SCRATCH_PAD 276 #define HOST_MBOX HOSTADDR(RGF_MBOX) 277 #define SW_INT_MBOX BIT_USER_USER_ICR_SW_INT_2 278 279 /* ISR register bits */ 280 #define ISR_MISC_FW_READY BIT_DMA_EP_MISC_ICR_FW_INT(0) 281 #define ISR_MISC_MBOX_EVT BIT_DMA_EP_MISC_ICR_FW_INT(1) 282 #define ISR_MISC_FW_ERROR BIT_DMA_EP_MISC_ICR_FW_INT(3) 283 284 /* Hardware definitions end */ 285 struct fw_map { 286 u32 from; /* linker address - from, inclusive */ 287 u32 to; /* linker address - to, exclusive */ 288 u32 host; /* PCI/Host address - BAR0 + 0x880000 */ 289 const char *name; /* for debugfs */ 290 bool fw; /* true if FW mapping, false if UCODE mapping */ 291 }; 292 293 /* array size should be in sync with actual definition in the wmi.c */ 294 extern const struct fw_map fw_mapping[10]; 295 296 /** 297 * mk_cidxtid - construct @cidxtid field 298 * @cid: CID value 299 * @tid: TID value 300 * 301 * @cidxtid field encoded as bits 0..3 - CID; 4..7 - TID 302 */ 303 static inline u8 mk_cidxtid(u8 cid, u8 tid) 304 { 305 return ((tid & 0xf) << 4) | (cid & 0xf); 306 } 307 308 /** 309 * parse_cidxtid - parse @cidxtid field 310 * @cid: store CID value here 311 * @tid: store TID value here 312 * 313 * @cidxtid field encoded as bits 0..3 - CID; 4..7 - TID 314 */ 315 static inline void parse_cidxtid(u8 cidxtid, u8 *cid, u8 *tid) 316 { 317 *cid = cidxtid & 0xf; 318 *tid = (cidxtid >> 4) & 0xf; 319 } 320 321 struct wil6210_mbox_ring { 322 u32 base; 323 u16 entry_size; /* max. size of mbox entry, incl. all headers */ 324 u16 size; 325 u32 tail; 326 u32 head; 327 } __packed; 328 329 struct wil6210_mbox_ring_desc { 330 __le32 sync; 331 __le32 addr; 332 } __packed; 333 334 /* at HOST_OFF_WIL6210_MBOX_CTL */ 335 struct wil6210_mbox_ctl { 336 struct wil6210_mbox_ring tx; 337 struct wil6210_mbox_ring rx; 338 } __packed; 339 340 struct wil6210_mbox_hdr { 341 __le16 seq; 342 __le16 len; /* payload, bytes after this header */ 343 __le16 type; 344 u8 flags; 345 u8 reserved; 346 } __packed; 347 348 #define WIL_MBOX_HDR_TYPE_WMI (0) 349 350 /* max. value for wil6210_mbox_hdr.len */ 351 #define MAX_MBOXITEM_SIZE (240) 352 353 struct pending_wmi_event { 354 struct list_head list; 355 struct { 356 struct wil6210_mbox_hdr hdr; 357 struct wmi_cmd_hdr wmi; 358 u8 data[0]; 359 } __packed event; 360 }; 361 362 enum { /* for wil_ctx.mapped_as */ 363 wil_mapped_as_none = 0, 364 wil_mapped_as_single = 1, 365 wil_mapped_as_page = 2, 366 }; 367 368 /** 369 * struct wil_ctx - software context for Vring descriptor 370 */ 371 struct wil_ctx { 372 struct sk_buff *skb; 373 u8 nr_frags; 374 u8 mapped_as; 375 }; 376 377 union vring_desc; 378 379 struct vring { 380 dma_addr_t pa; 381 volatile union vring_desc *va; /* vring_desc[size], WriteBack by DMA */ 382 u16 size; /* number of vring_desc elements */ 383 u32 swtail; 384 u32 swhead; 385 u32 hwtail; /* write here to inform hw */ 386 struct wil_ctx *ctx; /* ctx[size] - software context */ 387 }; 388 389 /** 390 * Additional data for Tx Vring 391 */ 392 struct vring_tx_data { 393 bool dot1x_open; 394 int enabled; 395 cycles_t idle, last_idle, begin; 396 u8 agg_wsize; /* agreed aggregation window, 0 - no agg */ 397 u16 agg_timeout; 398 u8 agg_amsdu; 399 bool addba_in_progress; /* if set, agg_xxx is for request in progress */ 400 spinlock_t lock; 401 }; 402 403 enum { /* for wil6210_priv.status */ 404 wil_status_fwready = 0, /* FW operational */ 405 wil_status_fwconnecting, 406 wil_status_fwconnected, 407 wil_status_dontscan, 408 wil_status_mbox_ready, /* MBOX structures ready */ 409 wil_status_irqen, /* FIXME: interrupts enabled - for debug */ 410 wil_status_napi_en, /* NAPI enabled protected by wil->mutex */ 411 wil_status_resetting, /* reset in progress */ 412 wil_status_last /* keep last */ 413 }; 414 415 struct pci_dev; 416 417 /** 418 * struct tid_ampdu_rx - TID aggregation information (Rx). 419 * 420 * @reorder_buf: buffer to reorder incoming aggregated MPDUs 421 * @reorder_time: jiffies when skb was added 422 * @session_timer: check if peer keeps Tx-ing on the TID (by timeout value) 423 * @reorder_timer: releases expired frames from the reorder buffer. 424 * @last_rx: jiffies of last rx activity 425 * @head_seq_num: head sequence number in reordering buffer. 426 * @stored_mpdu_num: number of MPDUs in reordering buffer 427 * @ssn: Starting Sequence Number expected to be aggregated. 428 * @buf_size: buffer size for incoming A-MPDUs 429 * @timeout: reset timer value (in TUs). 430 * @ssn_last_drop: SSN of the last dropped frame 431 * @total: total number of processed incoming frames 432 * @drop_dup: duplicate frames dropped for this reorder buffer 433 * @drop_old: old frames dropped for this reorder buffer 434 * @dialog_token: dialog token for aggregation session 435 * @first_time: true when this buffer used 1-st time 436 */ 437 struct wil_tid_ampdu_rx { 438 struct sk_buff **reorder_buf; 439 unsigned long *reorder_time; 440 struct timer_list session_timer; 441 struct timer_list reorder_timer; 442 unsigned long last_rx; 443 u16 head_seq_num; 444 u16 stored_mpdu_num; 445 u16 ssn; 446 u16 buf_size; 447 u16 timeout; 448 u16 ssn_last_drop; 449 unsigned long long total; /* frames processed */ 450 unsigned long long drop_dup; 451 unsigned long long drop_old; 452 u8 dialog_token; 453 bool first_time; /* is it 1-st time this buffer used? */ 454 }; 455 456 /** 457 * struct wil_tid_crypto_rx_single - TID crypto information (Rx). 458 * 459 * @pn: GCMP PN for the session 460 * @key_set: valid key present 461 */ 462 struct wil_tid_crypto_rx_single { 463 u8 pn[IEEE80211_GCMP_PN_LEN]; 464 bool key_set; 465 }; 466 467 struct wil_tid_crypto_rx { 468 struct wil_tid_crypto_rx_single key_id[4]; 469 }; 470 471 struct wil_p2p_info { 472 struct ieee80211_channel listen_chan; 473 u8 discovery_started; 474 u8 p2p_dev_started; 475 u64 cookie; 476 struct wireless_dev *pending_listen_wdev; 477 unsigned int listen_duration; 478 struct timer_list discovery_timer; /* listen/search duration */ 479 struct work_struct discovery_expired_work; /* listen/search expire */ 480 struct work_struct delayed_listen_work; /* listen after scan done */ 481 }; 482 483 enum wil_sta_status { 484 wil_sta_unused = 0, 485 wil_sta_conn_pending = 1, 486 wil_sta_connected = 2, 487 }; 488 489 #define WIL_STA_TID_NUM (16) 490 #define WIL_MCS_MAX (12) /* Maximum MCS supported */ 491 492 struct wil_net_stats { 493 unsigned long rx_packets; 494 unsigned long tx_packets; 495 unsigned long rx_bytes; 496 unsigned long tx_bytes; 497 unsigned long tx_errors; 498 unsigned long rx_dropped; 499 unsigned long rx_non_data_frame; 500 unsigned long rx_short_frame; 501 unsigned long rx_large_frame; 502 unsigned long rx_replay; 503 u16 last_mcs_rx; 504 u64 rx_per_mcs[WIL_MCS_MAX + 1]; 505 }; 506 507 /** 508 * struct wil_sta_info - data for peer 509 * 510 * Peer identified by its CID (connection ID) 511 * NIC performs beam forming for each peer; 512 * if no beam forming done, frame exchange is not 513 * possible. 514 */ 515 struct wil_sta_info { 516 u8 addr[ETH_ALEN]; 517 enum wil_sta_status status; 518 struct wil_net_stats stats; 519 /* Rx BACK */ 520 struct wil_tid_ampdu_rx *tid_rx[WIL_STA_TID_NUM]; 521 spinlock_t tid_rx_lock; /* guarding tid_rx array */ 522 unsigned long tid_rx_timer_expired[BITS_TO_LONGS(WIL_STA_TID_NUM)]; 523 unsigned long tid_rx_stop_requested[BITS_TO_LONGS(WIL_STA_TID_NUM)]; 524 struct wil_tid_crypto_rx tid_crypto_rx[WIL_STA_TID_NUM]; 525 struct wil_tid_crypto_rx group_crypto_rx; 526 u8 aid; /* 1-254; 0 if unknown/not reported */ 527 }; 528 529 enum { 530 fw_recovery_idle = 0, 531 fw_recovery_pending = 1, 532 fw_recovery_running = 2, 533 }; 534 535 enum { 536 hw_capability_last 537 }; 538 539 struct wil_probe_client_req { 540 struct list_head list; 541 u64 cookie; 542 u8 cid; 543 }; 544 545 struct pmc_ctx { 546 /* alloc, free, and read operations must own the lock */ 547 struct mutex lock; 548 struct vring_tx_desc *pring_va; 549 dma_addr_t pring_pa; 550 struct desc_alloc_info *descriptors; 551 int last_cmd_status; 552 int num_descriptors; 553 int descriptor_size; 554 }; 555 556 struct wil_halp { 557 struct mutex lock; /* protect halp ref_cnt */ 558 unsigned int ref_cnt; 559 struct completion comp; 560 }; 561 562 struct wil_blob_wrapper { 563 struct wil6210_priv *wil; 564 struct debugfs_blob_wrapper blob; 565 }; 566 567 #define WIL_LED_MAX_ID (2) 568 #define WIL_LED_INVALID_ID (0xF) 569 #define WIL_LED_BLINK_ON_SLOW_MS (300) 570 #define WIL_LED_BLINK_OFF_SLOW_MS (300) 571 #define WIL_LED_BLINK_ON_MED_MS (200) 572 #define WIL_LED_BLINK_OFF_MED_MS (200) 573 #define WIL_LED_BLINK_ON_FAST_MS (100) 574 #define WIL_LED_BLINK_OFF_FAST_MS (100) 575 enum { 576 WIL_LED_TIME_SLOW = 0, 577 WIL_LED_TIME_MED, 578 WIL_LED_TIME_FAST, 579 WIL_LED_TIME_LAST, 580 }; 581 582 struct blink_on_off_time { 583 u32 on_ms; 584 u32 off_ms; 585 }; 586 587 extern struct blink_on_off_time led_blink_time[WIL_LED_TIME_LAST]; 588 extern u8 led_id; 589 extern u8 led_polarity; 590 591 struct wil6210_priv { 592 struct pci_dev *pdev; 593 struct wireless_dev *wdev; 594 void __iomem *csr; 595 DECLARE_BITMAP(status, wil_status_last); 596 u8 fw_version[ETHTOOL_FWVERS_LEN]; 597 u32 hw_version; 598 u8 chip_revision; 599 const char *hw_name; 600 const char *wil_fw_name; 601 DECLARE_BITMAP(hw_capabilities, hw_capability_last); 602 DECLARE_BITMAP(fw_capabilities, WMI_FW_CAPABILITY_MAX); 603 u8 n_mids; /* number of additional MIDs as reported by FW */ 604 u32 recovery_count; /* num of FW recovery attempts in a short time */ 605 u32 recovery_state; /* FW recovery state machine */ 606 unsigned long last_fw_recovery; /* jiffies of last fw recovery */ 607 wait_queue_head_t wq; /* for all wait_event() use */ 608 /* profile */ 609 u32 monitor_flags; 610 u32 privacy; /* secure connection? */ 611 u8 hidden_ssid; /* relevant in AP mode */ 612 u16 channel; /* relevant in AP mode */ 613 int sinfo_gen; 614 u32 ap_isolate; /* no intra-BSS communication */ 615 /* interrupt moderation */ 616 u32 tx_max_burst_duration; 617 u32 tx_interframe_timeout; 618 u32 rx_max_burst_duration; 619 u32 rx_interframe_timeout; 620 /* cached ISR registers */ 621 u32 isr_misc; 622 /* mailbox related */ 623 struct mutex wmi_mutex; 624 struct wil6210_mbox_ctl mbox_ctl; 625 struct completion wmi_ready; 626 struct completion wmi_call; 627 u16 wmi_seq; 628 u16 reply_id; /**< wait for this WMI event */ 629 void *reply_buf; 630 u16 reply_size; 631 struct workqueue_struct *wmi_wq; /* for deferred calls */ 632 struct work_struct wmi_event_worker; 633 struct workqueue_struct *wq_service; 634 struct work_struct disconnect_worker; 635 struct work_struct fw_error_worker; /* for FW error recovery */ 636 struct timer_list connect_timer; 637 struct timer_list scan_timer; /* detect scan timeout */ 638 struct list_head pending_wmi_ev; 639 /* 640 * protect pending_wmi_ev 641 * - fill in IRQ from wil6210_irq_misc, 642 * - consumed in thread by wmi_event_worker 643 */ 644 spinlock_t wmi_ev_lock; 645 spinlock_t net_queue_lock; /* guarding stop/wake netif queue */ 646 int net_queue_stopped; /* netif_tx_stop_all_queues invoked */ 647 struct napi_struct napi_rx; 648 struct napi_struct napi_tx; 649 /* keep alive */ 650 struct list_head probe_client_pending; 651 struct mutex probe_client_mutex; /* protect @probe_client_pending */ 652 struct work_struct probe_client_worker; 653 /* DMA related */ 654 struct vring vring_rx; 655 struct vring vring_tx[WIL6210_MAX_TX_RINGS]; 656 struct vring_tx_data vring_tx_data[WIL6210_MAX_TX_RINGS]; 657 u8 vring2cid_tid[WIL6210_MAX_TX_RINGS][2]; /* [0] - CID, [1] - TID */ 658 struct wil_sta_info sta[WIL6210_MAX_CID]; 659 int bcast_vring; 660 /* scan */ 661 struct cfg80211_scan_request *scan_request; 662 663 struct mutex mutex; /* for wil6210_priv access in wil_{up|down} */ 664 /* statistics */ 665 atomic_t isr_count_rx, isr_count_tx; 666 /* debugfs */ 667 struct dentry *debug; 668 struct wil_blob_wrapper blobs[ARRAY_SIZE(fw_mapping)]; 669 u8 discovery_mode; 670 u8 abft_len; 671 672 void *platform_handle; 673 struct wil_platform_ops platform_ops; 674 675 struct pmc_ctx pmc; 676 677 bool pbss; 678 679 struct wil_p2p_info p2p; 680 681 /* P2P_DEVICE vif */ 682 struct wireless_dev *p2p_wdev; 683 struct mutex p2p_wdev_mutex; /* protect @p2p_wdev and @scan_request */ 684 struct wireless_dev *radio_wdev; 685 686 /* High Access Latency Policy voting */ 687 struct wil_halp halp; 688 689 #ifdef CONFIG_PM 690 #ifdef CONFIG_PM_SLEEP 691 struct notifier_block pm_notify; 692 #endif /* CONFIG_PM_SLEEP */ 693 #endif /* CONFIG_PM */ 694 }; 695 696 #define wil_to_wiphy(i) (i->wdev->wiphy) 697 #define wil_to_dev(i) (wiphy_dev(wil_to_wiphy(i))) 698 #define wiphy_to_wil(w) (struct wil6210_priv *)(wiphy_priv(w)) 699 #define wil_to_wdev(i) (i->wdev) 700 #define wdev_to_wil(w) (struct wil6210_priv *)(wdev_priv(w)) 701 #define wil_to_ndev(i) (wil_to_wdev(i)->netdev) 702 #define ndev_to_wil(n) (wdev_to_wil(n->ieee80211_ptr)) 703 704 __printf(2, 3) 705 void wil_dbg_trace(struct wil6210_priv *wil, const char *fmt, ...); 706 __printf(2, 3) 707 void __wil_err(struct wil6210_priv *wil, const char *fmt, ...); 708 __printf(2, 3) 709 void __wil_err_ratelimited(struct wil6210_priv *wil, const char *fmt, ...); 710 __printf(2, 3) 711 void __wil_info(struct wil6210_priv *wil, const char *fmt, ...); 712 __printf(2, 3) 713 void wil_dbg_ratelimited(const struct wil6210_priv *wil, const char *fmt, ...); 714 #define wil_dbg(wil, fmt, arg...) do { \ 715 netdev_dbg(wil_to_ndev(wil), fmt, ##arg); \ 716 wil_dbg_trace(wil, fmt, ##arg); \ 717 } while (0) 718 719 #define wil_dbg_irq(wil, fmt, arg...) wil_dbg(wil, "DBG[ IRQ]" fmt, ##arg) 720 #define wil_dbg_txrx(wil, fmt, arg...) wil_dbg(wil, "DBG[TXRX]" fmt, ##arg) 721 #define wil_dbg_wmi(wil, fmt, arg...) wil_dbg(wil, "DBG[ WMI]" fmt, ##arg) 722 #define wil_dbg_misc(wil, fmt, arg...) wil_dbg(wil, "DBG[MISC]" fmt, ##arg) 723 #define wil_dbg_pm(wil, fmt, arg...) wil_dbg(wil, "DBG[ PM ]" fmt, ##arg) 724 #define wil_err(wil, fmt, arg...) __wil_err(wil, "%s: " fmt, __func__, ##arg) 725 #define wil_info(wil, fmt, arg...) __wil_info(wil, "%s: " fmt, __func__, ##arg) 726 #define wil_err_ratelimited(wil, fmt, arg...) \ 727 __wil_err_ratelimited(wil, "%s: " fmt, __func__, ##arg) 728 729 /* target operations */ 730 /* register read */ 731 static inline u32 wil_r(struct wil6210_priv *wil, u32 reg) 732 { 733 return readl(wil->csr + HOSTADDR(reg)); 734 } 735 736 /* register write. wmb() to make sure it is completed */ 737 static inline void wil_w(struct wil6210_priv *wil, u32 reg, u32 val) 738 { 739 writel(val, wil->csr + HOSTADDR(reg)); 740 wmb(); /* wait for write to propagate to the HW */ 741 } 742 743 /* register set = read, OR, write */ 744 static inline void wil_s(struct wil6210_priv *wil, u32 reg, u32 val) 745 { 746 wil_w(wil, reg, wil_r(wil, reg) | val); 747 } 748 749 /* register clear = read, AND with inverted, write */ 750 static inline void wil_c(struct wil6210_priv *wil, u32 reg, u32 val) 751 { 752 wil_w(wil, reg, wil_r(wil, reg) & ~val); 753 } 754 755 #if defined(CONFIG_DYNAMIC_DEBUG) 756 #define wil_hex_dump_txrx(prefix_str, prefix_type, rowsize, \ 757 groupsize, buf, len, ascii) \ 758 print_hex_dump_debug("DBG[TXRX]" prefix_str,\ 759 prefix_type, rowsize, \ 760 groupsize, buf, len, ascii) 761 762 #define wil_hex_dump_wmi(prefix_str, prefix_type, rowsize, \ 763 groupsize, buf, len, ascii) \ 764 print_hex_dump_debug("DBG[ WMI]" prefix_str,\ 765 prefix_type, rowsize, \ 766 groupsize, buf, len, ascii) 767 #else /* defined(CONFIG_DYNAMIC_DEBUG) */ 768 static inline 769 void wil_hex_dump_txrx(const char *prefix_str, int prefix_type, int rowsize, 770 int groupsize, const void *buf, size_t len, bool ascii) 771 { 772 } 773 774 static inline 775 void wil_hex_dump_wmi(const char *prefix_str, int prefix_type, int rowsize, 776 int groupsize, const void *buf, size_t len, bool ascii) 777 { 778 } 779 #endif /* defined(CONFIG_DYNAMIC_DEBUG) */ 780 781 void wil_memcpy_fromio_32(void *dst, const volatile void __iomem *src, 782 size_t count); 783 void wil_memcpy_toio_32(volatile void __iomem *dst, const void *src, 784 size_t count); 785 void wil_memcpy_fromio_halp_vote(struct wil6210_priv *wil, void *dst, 786 const volatile void __iomem *src, 787 size_t count); 788 void wil_memcpy_toio_halp_vote(struct wil6210_priv *wil, 789 volatile void __iomem *dst, 790 const void *src, size_t count); 791 792 void *wil_if_alloc(struct device *dev); 793 void wil_if_free(struct wil6210_priv *wil); 794 int wil_if_add(struct wil6210_priv *wil); 795 void wil_if_remove(struct wil6210_priv *wil); 796 int wil_priv_init(struct wil6210_priv *wil); 797 void wil_priv_deinit(struct wil6210_priv *wil); 798 int wil_reset(struct wil6210_priv *wil, bool no_fw); 799 void wil_fw_error_recovery(struct wil6210_priv *wil); 800 void wil_set_recovery_state(struct wil6210_priv *wil, int state); 801 bool wil_is_recovery_blocked(struct wil6210_priv *wil); 802 int wil_up(struct wil6210_priv *wil); 803 int __wil_up(struct wil6210_priv *wil); 804 int wil_down(struct wil6210_priv *wil); 805 int __wil_down(struct wil6210_priv *wil); 806 void wil_mbox_ring_le2cpus(struct wil6210_mbox_ring *r); 807 int wil_find_cid(struct wil6210_priv *wil, const u8 *mac); 808 void wil_set_ethtoolops(struct net_device *ndev); 809 810 void __iomem *wmi_buffer(struct wil6210_priv *wil, __le32 ptr); 811 void __iomem *wmi_addr(struct wil6210_priv *wil, u32 ptr); 812 int wmi_read_hdr(struct wil6210_priv *wil, __le32 ptr, 813 struct wil6210_mbox_hdr *hdr); 814 int wmi_send(struct wil6210_priv *wil, u16 cmdid, void *buf, u16 len); 815 void wmi_recv_cmd(struct wil6210_priv *wil); 816 int wmi_call(struct wil6210_priv *wil, u16 cmdid, void *buf, u16 len, 817 u16 reply_id, void *reply, u8 reply_size, int to_msec); 818 void wmi_event_worker(struct work_struct *work); 819 void wmi_event_flush(struct wil6210_priv *wil); 820 int wmi_set_ssid(struct wil6210_priv *wil, u8 ssid_len, const void *ssid); 821 int wmi_get_ssid(struct wil6210_priv *wil, u8 *ssid_len, void *ssid); 822 int wmi_set_channel(struct wil6210_priv *wil, int channel); 823 int wmi_get_channel(struct wil6210_priv *wil, int *channel); 824 int wmi_del_cipher_key(struct wil6210_priv *wil, u8 key_index, 825 const void *mac_addr, int key_usage); 826 int wmi_add_cipher_key(struct wil6210_priv *wil, u8 key_index, 827 const void *mac_addr, int key_len, const void *key, 828 int key_usage); 829 int wmi_echo(struct wil6210_priv *wil); 830 int wmi_set_ie(struct wil6210_priv *wil, u8 type, u16 ie_len, const void *ie); 831 int wmi_rx_chain_add(struct wil6210_priv *wil, struct vring *vring); 832 int wmi_rxon(struct wil6210_priv *wil, bool on); 833 int wmi_get_temperature(struct wil6210_priv *wil, u32 *t_m, u32 *t_r); 834 int wmi_disconnect_sta(struct wil6210_priv *wil, const u8 *mac, 835 u16 reason, bool full_disconnect, bool del_sta); 836 int wmi_addba(struct wil6210_priv *wil, u8 ringid, u8 size, u16 timeout); 837 int wmi_delba_tx(struct wil6210_priv *wil, u8 ringid, u16 reason); 838 int wmi_delba_rx(struct wil6210_priv *wil, u8 cidxtid, u16 reason); 839 int wmi_addba_rx_resp(struct wil6210_priv *wil, u8 cid, u8 tid, u8 token, 840 u16 status, bool amsdu, u16 agg_wsize, u16 timeout); 841 int wmi_ps_dev_profile_cfg(struct wil6210_priv *wil, 842 enum wmi_ps_profile_type ps_profile); 843 int wmi_set_mgmt_retry(struct wil6210_priv *wil, u8 retry_short); 844 int wmi_get_mgmt_retry(struct wil6210_priv *wil, u8 *retry_short); 845 int wmi_new_sta(struct wil6210_priv *wil, const u8 *mac, u8 aid); 846 int wil_addba_rx_request(struct wil6210_priv *wil, u8 cidxtid, 847 u8 dialog_token, __le16 ba_param_set, 848 __le16 ba_timeout, __le16 ba_seq_ctrl); 849 int wil_addba_tx_request(struct wil6210_priv *wil, u8 ringid, u16 wsize); 850 851 void wil6210_clear_irq(struct wil6210_priv *wil); 852 int wil6210_init_irq(struct wil6210_priv *wil, int irq, bool use_msi); 853 void wil6210_fini_irq(struct wil6210_priv *wil, int irq); 854 void wil_mask_irq(struct wil6210_priv *wil); 855 void wil_unmask_irq(struct wil6210_priv *wil); 856 void wil_configure_interrupt_moderation(struct wil6210_priv *wil); 857 void wil_disable_irq(struct wil6210_priv *wil); 858 void wil_enable_irq(struct wil6210_priv *wil); 859 void wil6210_mask_halp(struct wil6210_priv *wil); 860 861 /* P2P */ 862 bool wil_p2p_is_social_scan(struct cfg80211_scan_request *request); 863 void wil_p2p_discovery_timer_fn(ulong x); 864 int wil_p2p_search(struct wil6210_priv *wil, 865 struct cfg80211_scan_request *request); 866 int wil_p2p_listen(struct wil6210_priv *wil, struct wireless_dev *wdev, 867 unsigned int duration, struct ieee80211_channel *chan, 868 u64 *cookie); 869 u8 wil_p2p_stop_discovery(struct wil6210_priv *wil); 870 int wil_p2p_cancel_listen(struct wil6210_priv *wil, u64 cookie); 871 void wil_p2p_listen_expired(struct work_struct *work); 872 void wil_p2p_search_expired(struct work_struct *work); 873 void wil_p2p_stop_radio_operations(struct wil6210_priv *wil); 874 void wil_p2p_delayed_listen_work(struct work_struct *work); 875 876 /* WMI for P2P */ 877 int wmi_p2p_cfg(struct wil6210_priv *wil, int channel, int bi); 878 int wmi_start_listen(struct wil6210_priv *wil); 879 int wmi_start_search(struct wil6210_priv *wil); 880 int wmi_stop_discovery(struct wil6210_priv *wil); 881 882 int wil_cfg80211_mgmt_tx(struct wiphy *wiphy, struct wireless_dev *wdev, 883 struct cfg80211_mgmt_tx_params *params, 884 u64 *cookie); 885 886 int wil6210_debugfs_init(struct wil6210_priv *wil); 887 void wil6210_debugfs_remove(struct wil6210_priv *wil); 888 int wil_cid_fill_sinfo(struct wil6210_priv *wil, int cid, 889 struct station_info *sinfo); 890 891 struct wireless_dev *wil_cfg80211_init(struct device *dev); 892 void wil_wdev_free(struct wil6210_priv *wil); 893 void wil_p2p_wdev_free(struct wil6210_priv *wil); 894 895 int wmi_set_mac_address(struct wil6210_priv *wil, void *addr); 896 int wmi_pcp_start(struct wil6210_priv *wil, int bi, u8 wmi_nettype, 897 u8 chan, u8 hidden_ssid, u8 is_go); 898 int wmi_pcp_stop(struct wil6210_priv *wil); 899 int wmi_led_cfg(struct wil6210_priv *wil, bool enable); 900 int wmi_abort_scan(struct wil6210_priv *wil); 901 void wil_abort_scan(struct wil6210_priv *wil, bool sync); 902 903 void wil6210_disconnect(struct wil6210_priv *wil, const u8 *bssid, 904 u16 reason_code, bool from_event); 905 void wil_probe_client_flush(struct wil6210_priv *wil); 906 void wil_probe_client_worker(struct work_struct *work); 907 908 int wil_rx_init(struct wil6210_priv *wil, u16 size); 909 void wil_rx_fini(struct wil6210_priv *wil); 910 911 /* TX API */ 912 int wil_vring_init_tx(struct wil6210_priv *wil, int id, int size, 913 int cid, int tid); 914 void wil_vring_fini_tx(struct wil6210_priv *wil, int id); 915 int wil_tx_init(struct wil6210_priv *wil, int cid); 916 int wil_vring_init_bcast(struct wil6210_priv *wil, int id, int size); 917 int wil_bcast_init(struct wil6210_priv *wil); 918 void wil_bcast_fini(struct wil6210_priv *wil); 919 920 void wil_update_net_queues(struct wil6210_priv *wil, struct vring *vring, 921 bool should_stop); 922 void wil_update_net_queues_bh(struct wil6210_priv *wil, struct vring *vring, 923 bool check_stop); 924 netdev_tx_t wil_start_xmit(struct sk_buff *skb, struct net_device *ndev); 925 int wil_tx_complete(struct wil6210_priv *wil, int ringid); 926 void wil6210_unmask_irq_tx(struct wil6210_priv *wil); 927 928 /* RX API */ 929 void wil_rx_handle(struct wil6210_priv *wil, int *quota); 930 void wil6210_unmask_irq_rx(struct wil6210_priv *wil); 931 932 int wil_iftype_nl2wmi(enum nl80211_iftype type); 933 934 int wil_ioctl(struct wil6210_priv *wil, void __user *data, int cmd); 935 int wil_request_firmware(struct wil6210_priv *wil, const char *name, 936 bool load); 937 bool wil_fw_verify_file_exists(struct wil6210_priv *wil, const char *name); 938 939 int wil_can_suspend(struct wil6210_priv *wil, bool is_runtime); 940 int wil_suspend(struct wil6210_priv *wil, bool is_runtime); 941 int wil_resume(struct wil6210_priv *wil, bool is_runtime); 942 943 int wil_fw_copy_crash_dump(struct wil6210_priv *wil, void *dest, u32 size); 944 void wil_fw_core_dump(struct wil6210_priv *wil); 945 946 void wil_halp_vote(struct wil6210_priv *wil); 947 void wil_halp_unvote(struct wil6210_priv *wil); 948 void wil6210_set_halp(struct wil6210_priv *wil); 949 void wil6210_clear_halp(struct wil6210_priv *wil); 950 951 #endif /* __WIL6210_H__ */ 952