1 /* 2 * Atheros CARL9170 driver 3 * 4 * 802.11 xmit & status routines 5 * 6 * Copyright 2008, Johannes Berg <johannes@sipsolutions.net> 7 * Copyright 2009, 2010, Christian Lamparter <chunkeey@googlemail.com> 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation; either version 2 of the License, or 12 * (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; see the file COPYING. If not, see 21 * http://www.gnu.org/licenses/. 22 * 23 * This file incorporates work covered by the following copyright and 24 * permission notice: 25 * Copyright (c) 2007-2008 Atheros Communications, Inc. 26 * 27 * Permission to use, copy, modify, and/or distribute this software for any 28 * purpose with or without fee is hereby granted, provided that the above 29 * copyright notice and this permission notice appear in all copies. 30 * 31 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 32 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 33 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 34 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 35 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 36 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 37 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 38 */ 39 40 #include <linux/init.h> 41 #include <linux/slab.h> 42 #include <linux/module.h> 43 #include <linux/etherdevice.h> 44 #include <net/mac80211.h> 45 #include "carl9170.h" 46 #include "hw.h" 47 #include "cmd.h" 48 49 static inline unsigned int __carl9170_get_queue(struct ar9170 *ar, 50 unsigned int queue) 51 { 52 if (unlikely(modparam_noht)) { 53 return queue; 54 } else { 55 /* 56 * This is just another workaround, until 57 * someone figures out how to get QoS and 58 * AMPDU to play nicely together. 59 */ 60 61 return 2; /* AC_BE */ 62 } 63 } 64 65 static inline unsigned int carl9170_get_queue(struct ar9170 *ar, 66 struct sk_buff *skb) 67 { 68 return __carl9170_get_queue(ar, skb_get_queue_mapping(skb)); 69 } 70 71 static bool is_mem_full(struct ar9170 *ar) 72 { 73 return (DIV_ROUND_UP(IEEE80211_MAX_FRAME_LEN, ar->fw.mem_block_size) > 74 atomic_read(&ar->mem_free_blocks)); 75 } 76 77 static void carl9170_tx_accounting(struct ar9170 *ar, struct sk_buff *skb) 78 { 79 int queue, i; 80 bool mem_full; 81 82 atomic_inc(&ar->tx_total_queued); 83 84 queue = skb_get_queue_mapping(skb); 85 spin_lock_bh(&ar->tx_stats_lock); 86 87 /* 88 * The driver has to accept the frame, regardless if the queue is 89 * full to the brim, or not. We have to do the queuing internally, 90 * since mac80211 assumes that a driver which can operate with 91 * aggregated frames does not reject frames for this reason. 92 */ 93 ar->tx_stats[queue].len++; 94 ar->tx_stats[queue].count++; 95 96 mem_full = is_mem_full(ar); 97 for (i = 0; i < ar->hw->queues; i++) { 98 if (mem_full || ar->tx_stats[i].len >= ar->tx_stats[i].limit) { 99 ieee80211_stop_queue(ar->hw, i); 100 ar->queue_stop_timeout[i] = jiffies; 101 } 102 } 103 104 spin_unlock_bh(&ar->tx_stats_lock); 105 } 106 107 /* needs rcu_read_lock */ 108 static struct ieee80211_sta *__carl9170_get_tx_sta(struct ar9170 *ar, 109 struct sk_buff *skb) 110 { 111 struct _carl9170_tx_superframe *super = (void *) skb->data; 112 struct ieee80211_hdr *hdr = (void *) super->frame_data; 113 struct ieee80211_vif *vif; 114 unsigned int vif_id; 115 116 vif_id = (super->s.misc & CARL9170_TX_SUPER_MISC_VIF_ID) >> 117 CARL9170_TX_SUPER_MISC_VIF_ID_S; 118 119 if (WARN_ON_ONCE(vif_id >= AR9170_MAX_VIRTUAL_MAC)) 120 return NULL; 121 122 vif = rcu_dereference(ar->vif_priv[vif_id].vif); 123 if (unlikely(!vif)) 124 return NULL; 125 126 /* 127 * Normally we should use wrappers like ieee80211_get_DA to get 128 * the correct peer ieee80211_sta. 129 * 130 * But there is a problem with indirect traffic (broadcasts, or 131 * data which is designated for other stations) in station mode. 132 * The frame will be directed to the AP for distribution and not 133 * to the actual destination. 134 */ 135 136 return ieee80211_find_sta(vif, hdr->addr1); 137 } 138 139 static void carl9170_tx_ps_unblock(struct ar9170 *ar, struct sk_buff *skb) 140 { 141 struct ieee80211_sta *sta; 142 struct carl9170_sta_info *sta_info; 143 144 rcu_read_lock(); 145 sta = __carl9170_get_tx_sta(ar, skb); 146 if (unlikely(!sta)) 147 goto out_rcu; 148 149 sta_info = (struct carl9170_sta_info *) sta->drv_priv; 150 if (atomic_dec_return(&sta_info->pending_frames) == 0) 151 ieee80211_sta_block_awake(ar->hw, sta, false); 152 153 out_rcu: 154 rcu_read_unlock(); 155 } 156 157 static void carl9170_tx_accounting_free(struct ar9170 *ar, struct sk_buff *skb) 158 { 159 int queue; 160 161 queue = skb_get_queue_mapping(skb); 162 163 spin_lock_bh(&ar->tx_stats_lock); 164 165 ar->tx_stats[queue].len--; 166 167 if (!is_mem_full(ar)) { 168 unsigned int i; 169 for (i = 0; i < ar->hw->queues; i++) { 170 if (ar->tx_stats[i].len >= CARL9170_NUM_TX_LIMIT_SOFT) 171 continue; 172 173 if (ieee80211_queue_stopped(ar->hw, i)) { 174 unsigned long tmp; 175 176 tmp = jiffies - ar->queue_stop_timeout[i]; 177 if (tmp > ar->max_queue_stop_timeout[i]) 178 ar->max_queue_stop_timeout[i] = tmp; 179 } 180 181 ieee80211_wake_queue(ar->hw, i); 182 } 183 } 184 185 spin_unlock_bh(&ar->tx_stats_lock); 186 187 if (atomic_dec_and_test(&ar->tx_total_queued)) 188 complete(&ar->tx_flush); 189 } 190 191 static int carl9170_alloc_dev_space(struct ar9170 *ar, struct sk_buff *skb) 192 { 193 struct _carl9170_tx_superframe *super = (void *) skb->data; 194 unsigned int chunks; 195 int cookie = -1; 196 197 atomic_inc(&ar->mem_allocs); 198 199 chunks = DIV_ROUND_UP(skb->len, ar->fw.mem_block_size); 200 if (unlikely(atomic_sub_return(chunks, &ar->mem_free_blocks) < 0)) { 201 atomic_add(chunks, &ar->mem_free_blocks); 202 return -ENOSPC; 203 } 204 205 spin_lock_bh(&ar->mem_lock); 206 cookie = bitmap_find_free_region(ar->mem_bitmap, ar->fw.mem_blocks, 0); 207 spin_unlock_bh(&ar->mem_lock); 208 209 if (unlikely(cookie < 0)) { 210 atomic_add(chunks, &ar->mem_free_blocks); 211 return -ENOSPC; 212 } 213 214 super = (void *) skb->data; 215 216 /* 217 * Cookie #0 serves two special purposes: 218 * 1. The firmware might use it generate BlockACK frames 219 * in responds of an incoming BlockAckReqs. 220 * 221 * 2. Prevent double-free bugs. 222 */ 223 super->s.cookie = (u8) cookie + 1; 224 return 0; 225 } 226 227 static void carl9170_release_dev_space(struct ar9170 *ar, struct sk_buff *skb) 228 { 229 struct _carl9170_tx_superframe *super = (void *) skb->data; 230 int cookie; 231 232 /* make a local copy of the cookie */ 233 cookie = super->s.cookie; 234 /* invalidate cookie */ 235 super->s.cookie = 0; 236 237 /* 238 * Do a out-of-bounds check on the cookie: 239 * 240 * * cookie "0" is reserved and won't be assigned to any 241 * out-going frame. Internally however, it is used to 242 * mark no longer/un-accounted frames and serves as a 243 * cheap way of preventing frames from being freed 244 * twice by _accident_. NB: There is a tiny race... 245 * 246 * * obviously, cookie number is limited by the amount 247 * of available memory blocks, so the number can 248 * never execeed the mem_blocks count. 249 */ 250 if (unlikely(WARN_ON_ONCE(cookie == 0) || 251 WARN_ON_ONCE(cookie > ar->fw.mem_blocks))) 252 return; 253 254 atomic_add(DIV_ROUND_UP(skb->len, ar->fw.mem_block_size), 255 &ar->mem_free_blocks); 256 257 spin_lock_bh(&ar->mem_lock); 258 bitmap_release_region(ar->mem_bitmap, cookie - 1, 0); 259 spin_unlock_bh(&ar->mem_lock); 260 } 261 262 /* Called from any context */ 263 static void carl9170_tx_release(struct kref *ref) 264 { 265 struct ar9170 *ar; 266 struct carl9170_tx_info *arinfo; 267 struct ieee80211_tx_info *txinfo; 268 struct sk_buff *skb; 269 270 arinfo = container_of(ref, struct carl9170_tx_info, ref); 271 txinfo = container_of((void *) arinfo, struct ieee80211_tx_info, 272 rate_driver_data); 273 skb = container_of((void *) txinfo, struct sk_buff, cb); 274 275 ar = arinfo->ar; 276 if (WARN_ON_ONCE(!ar)) 277 return; 278 279 BUILD_BUG_ON( 280 offsetof(struct ieee80211_tx_info, status.ampdu_ack_len) != 23); 281 282 memset(&txinfo->status.ampdu_ack_len, 0, 283 sizeof(struct ieee80211_tx_info) - 284 offsetof(struct ieee80211_tx_info, status.ampdu_ack_len)); 285 286 if (atomic_read(&ar->tx_total_queued)) 287 ar->tx_schedule = true; 288 289 if (txinfo->flags & IEEE80211_TX_CTL_AMPDU) { 290 if (!atomic_read(&ar->tx_ampdu_upload)) 291 ar->tx_ampdu_schedule = true; 292 293 if (txinfo->flags & IEEE80211_TX_STAT_AMPDU) { 294 struct _carl9170_tx_superframe *super; 295 296 super = (void *)skb->data; 297 txinfo->status.ampdu_len = super->s.rix; 298 txinfo->status.ampdu_ack_len = super->s.cnt; 299 } else if ((txinfo->flags & IEEE80211_TX_STAT_ACK) && 300 !(txinfo->flags & IEEE80211_TX_CTL_REQ_TX_STATUS)) { 301 /* 302 * drop redundant tx_status reports: 303 * 304 * 1. ampdu_ack_len of the final tx_status does 305 * include the feedback of this particular frame. 306 * 307 * 2. tx_status_irqsafe only queues up to 128 308 * tx feedback reports and discards the rest. 309 * 310 * 3. minstrel_ht is picky, it only accepts 311 * reports of frames with the TX_STATUS_AMPDU flag. 312 * 313 * 4. mac80211 is not particularly interested in 314 * feedback either [CTL_REQ_TX_STATUS not set] 315 */ 316 317 dev_kfree_skb_any(skb); 318 return; 319 } else { 320 /* 321 * Either the frame transmission has failed or 322 * mac80211 requested tx status. 323 */ 324 } 325 } 326 327 skb_pull(skb, sizeof(struct _carl9170_tx_superframe)); 328 ieee80211_tx_status_irqsafe(ar->hw, skb); 329 } 330 331 void carl9170_tx_get_skb(struct sk_buff *skb) 332 { 333 struct carl9170_tx_info *arinfo = (void *) 334 (IEEE80211_SKB_CB(skb))->rate_driver_data; 335 kref_get(&arinfo->ref); 336 } 337 338 int carl9170_tx_put_skb(struct sk_buff *skb) 339 { 340 struct carl9170_tx_info *arinfo = (void *) 341 (IEEE80211_SKB_CB(skb))->rate_driver_data; 342 343 return kref_put(&arinfo->ref, carl9170_tx_release); 344 } 345 346 /* Caller must hold the tid_info->lock & rcu_read_lock */ 347 static void carl9170_tx_shift_bm(struct ar9170 *ar, 348 struct carl9170_sta_tid *tid_info, u16 seq) 349 { 350 u16 off; 351 352 off = SEQ_DIFF(seq, tid_info->bsn); 353 354 if (WARN_ON_ONCE(off >= CARL9170_BAW_BITS)) 355 return; 356 357 /* 358 * Sanity check. For each MPDU we set the bit in bitmap and 359 * clear it once we received the tx_status. 360 * But if the bit is already cleared then we've been bitten 361 * by a bug. 362 */ 363 WARN_ON_ONCE(!test_and_clear_bit(off, tid_info->bitmap)); 364 365 off = SEQ_DIFF(tid_info->snx, tid_info->bsn); 366 if (WARN_ON_ONCE(off >= CARL9170_BAW_BITS)) 367 return; 368 369 if (!bitmap_empty(tid_info->bitmap, off)) 370 off = find_first_bit(tid_info->bitmap, off); 371 372 tid_info->bsn += off; 373 tid_info->bsn &= 0x0fff; 374 375 bitmap_shift_right(tid_info->bitmap, tid_info->bitmap, 376 off, CARL9170_BAW_BITS); 377 } 378 379 static void carl9170_tx_status_process_ampdu(struct ar9170 *ar, 380 struct sk_buff *skb, struct ieee80211_tx_info *txinfo) 381 { 382 struct _carl9170_tx_superframe *super = (void *) skb->data; 383 struct ieee80211_hdr *hdr = (void *) super->frame_data; 384 struct ieee80211_sta *sta; 385 struct carl9170_sta_info *sta_info; 386 struct carl9170_sta_tid *tid_info; 387 u8 tid; 388 389 if (!(txinfo->flags & IEEE80211_TX_CTL_AMPDU) || 390 txinfo->flags & IEEE80211_TX_CTL_INJECTED || 391 (!(super->f.mac_control & cpu_to_le16(AR9170_TX_MAC_AGGR)))) 392 return; 393 394 rcu_read_lock(); 395 sta = __carl9170_get_tx_sta(ar, skb); 396 if (unlikely(!sta)) 397 goto out_rcu; 398 399 tid = get_tid_h(hdr); 400 401 sta_info = (void *) sta->drv_priv; 402 tid_info = rcu_dereference(sta_info->agg[tid]); 403 if (!tid_info) 404 goto out_rcu; 405 406 spin_lock_bh(&tid_info->lock); 407 if (likely(tid_info->state >= CARL9170_TID_STATE_IDLE)) 408 carl9170_tx_shift_bm(ar, tid_info, get_seq_h(hdr)); 409 410 if (sta_info->stats[tid].clear) { 411 sta_info->stats[tid].clear = false; 412 sta_info->stats[tid].req = false; 413 sta_info->stats[tid].ampdu_len = 0; 414 sta_info->stats[tid].ampdu_ack_len = 0; 415 } 416 417 sta_info->stats[tid].ampdu_len++; 418 if (txinfo->status.rates[0].count == 1) 419 sta_info->stats[tid].ampdu_ack_len++; 420 421 if (!(txinfo->flags & IEEE80211_TX_STAT_ACK)) 422 sta_info->stats[tid].req = true; 423 424 if (super->f.mac_control & cpu_to_le16(AR9170_TX_MAC_IMM_BA)) { 425 super->s.rix = sta_info->stats[tid].ampdu_len; 426 super->s.cnt = sta_info->stats[tid].ampdu_ack_len; 427 txinfo->flags |= IEEE80211_TX_STAT_AMPDU; 428 if (sta_info->stats[tid].req) 429 txinfo->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK; 430 431 sta_info->stats[tid].clear = true; 432 } 433 spin_unlock_bh(&tid_info->lock); 434 435 out_rcu: 436 rcu_read_unlock(); 437 } 438 439 void carl9170_tx_status(struct ar9170 *ar, struct sk_buff *skb, 440 const bool success) 441 { 442 struct ieee80211_tx_info *txinfo; 443 444 carl9170_tx_accounting_free(ar, skb); 445 446 txinfo = IEEE80211_SKB_CB(skb); 447 448 if (success) 449 txinfo->flags |= IEEE80211_TX_STAT_ACK; 450 else 451 ar->tx_ack_failures++; 452 453 if (txinfo->flags & IEEE80211_TX_CTL_AMPDU) 454 carl9170_tx_status_process_ampdu(ar, skb, txinfo); 455 456 carl9170_tx_ps_unblock(ar, skb); 457 carl9170_tx_put_skb(skb); 458 } 459 460 /* This function may be called form any context */ 461 void carl9170_tx_callback(struct ar9170 *ar, struct sk_buff *skb) 462 { 463 struct ieee80211_tx_info *txinfo = IEEE80211_SKB_CB(skb); 464 465 atomic_dec(&ar->tx_total_pending); 466 467 if (txinfo->flags & IEEE80211_TX_CTL_AMPDU) 468 atomic_dec(&ar->tx_ampdu_upload); 469 470 if (carl9170_tx_put_skb(skb)) 471 tasklet_hi_schedule(&ar->usb_tasklet); 472 } 473 474 static struct sk_buff *carl9170_get_queued_skb(struct ar9170 *ar, u8 cookie, 475 struct sk_buff_head *queue) 476 { 477 struct sk_buff *skb; 478 479 spin_lock_bh(&queue->lock); 480 skb_queue_walk(queue, skb) { 481 struct _carl9170_tx_superframe *txc = (void *) skb->data; 482 483 if (txc->s.cookie != cookie) 484 continue; 485 486 __skb_unlink(skb, queue); 487 spin_unlock_bh(&queue->lock); 488 489 carl9170_release_dev_space(ar, skb); 490 return skb; 491 } 492 spin_unlock_bh(&queue->lock); 493 494 return NULL; 495 } 496 497 static void carl9170_tx_fill_rateinfo(struct ar9170 *ar, unsigned int rix, 498 unsigned int tries, struct ieee80211_tx_info *txinfo) 499 { 500 unsigned int i; 501 502 for (i = 0; i < IEEE80211_TX_MAX_RATES; i++) { 503 if (txinfo->status.rates[i].idx < 0) 504 break; 505 506 if (i == rix) { 507 txinfo->status.rates[i].count = tries; 508 i++; 509 break; 510 } 511 } 512 513 for (; i < IEEE80211_TX_MAX_RATES; i++) { 514 txinfo->status.rates[i].idx = -1; 515 txinfo->status.rates[i].count = 0; 516 } 517 } 518 519 static void carl9170_check_queue_stop_timeout(struct ar9170 *ar) 520 { 521 int i; 522 struct sk_buff *skb; 523 struct ieee80211_tx_info *txinfo; 524 struct carl9170_tx_info *arinfo; 525 bool restart = false; 526 527 for (i = 0; i < ar->hw->queues; i++) { 528 spin_lock_bh(&ar->tx_status[i].lock); 529 530 skb = skb_peek(&ar->tx_status[i]); 531 532 if (!skb) 533 goto next; 534 535 txinfo = IEEE80211_SKB_CB(skb); 536 arinfo = (void *) txinfo->rate_driver_data; 537 538 if (time_is_before_jiffies(arinfo->timeout + 539 msecs_to_jiffies(CARL9170_QUEUE_STUCK_TIMEOUT)) == true) 540 restart = true; 541 542 next: 543 spin_unlock_bh(&ar->tx_status[i].lock); 544 } 545 546 if (restart) { 547 /* 548 * At least one queue has been stuck for long enough. 549 * Give the device a kick and hope it gets back to 550 * work. 551 * 552 * possible reasons may include: 553 * - frames got lost/corrupted (bad connection to the device) 554 * - stalled rx processing/usb controller hiccups 555 * - firmware errors/bugs 556 * - every bug you can think of. 557 * - all bugs you can't... 558 * - ... 559 */ 560 carl9170_restart(ar, CARL9170_RR_STUCK_TX); 561 } 562 } 563 564 static void carl9170_tx_ampdu_timeout(struct ar9170 *ar) 565 { 566 struct carl9170_sta_tid *iter; 567 struct sk_buff *skb; 568 struct ieee80211_tx_info *txinfo; 569 struct carl9170_tx_info *arinfo; 570 struct ieee80211_sta *sta; 571 572 rcu_read_lock(); 573 list_for_each_entry_rcu(iter, &ar->tx_ampdu_list, list) { 574 if (iter->state < CARL9170_TID_STATE_IDLE) 575 continue; 576 577 spin_lock_bh(&iter->lock); 578 skb = skb_peek(&iter->queue); 579 if (!skb) 580 goto unlock; 581 582 txinfo = IEEE80211_SKB_CB(skb); 583 arinfo = (void *)txinfo->rate_driver_data; 584 if (time_is_after_jiffies(arinfo->timeout + 585 msecs_to_jiffies(CARL9170_QUEUE_TIMEOUT))) 586 goto unlock; 587 588 sta = __carl9170_get_tx_sta(ar, skb); 589 if (WARN_ON(!sta)) 590 goto unlock; 591 592 ieee80211_stop_tx_ba_session(sta, iter->tid); 593 unlock: 594 spin_unlock_bh(&iter->lock); 595 596 } 597 rcu_read_unlock(); 598 } 599 600 void carl9170_tx_janitor(struct work_struct *work) 601 { 602 struct ar9170 *ar = container_of(work, struct ar9170, 603 tx_janitor.work); 604 if (!IS_STARTED(ar)) 605 return; 606 607 ar->tx_janitor_last_run = jiffies; 608 609 carl9170_check_queue_stop_timeout(ar); 610 carl9170_tx_ampdu_timeout(ar); 611 612 if (!atomic_read(&ar->tx_total_queued)) 613 return; 614 615 ieee80211_queue_delayed_work(ar->hw, &ar->tx_janitor, 616 msecs_to_jiffies(CARL9170_TX_TIMEOUT)); 617 } 618 619 static void __carl9170_tx_process_status(struct ar9170 *ar, 620 const uint8_t cookie, const uint8_t info) 621 { 622 struct sk_buff *skb; 623 struct ieee80211_tx_info *txinfo; 624 unsigned int r, t, q; 625 bool success = true; 626 627 q = ar9170_qmap[info & CARL9170_TX_STATUS_QUEUE]; 628 629 skb = carl9170_get_queued_skb(ar, cookie, &ar->tx_status[q]); 630 if (!skb) { 631 /* 632 * We have lost the race to another thread. 633 */ 634 635 return ; 636 } 637 638 txinfo = IEEE80211_SKB_CB(skb); 639 640 if (!(info & CARL9170_TX_STATUS_SUCCESS)) 641 success = false; 642 643 r = (info & CARL9170_TX_STATUS_RIX) >> CARL9170_TX_STATUS_RIX_S; 644 t = (info & CARL9170_TX_STATUS_TRIES) >> CARL9170_TX_STATUS_TRIES_S; 645 646 carl9170_tx_fill_rateinfo(ar, r, t, txinfo); 647 carl9170_tx_status(ar, skb, success); 648 } 649 650 void carl9170_tx_process_status(struct ar9170 *ar, 651 const struct carl9170_rsp *cmd) 652 { 653 unsigned int i; 654 655 for (i = 0; i < cmd->hdr.ext; i++) { 656 if (WARN_ON(i > ((cmd->hdr.len / 2) + 1))) { 657 print_hex_dump_bytes("UU:", DUMP_PREFIX_NONE, 658 (void *) cmd, cmd->hdr.len + 4); 659 break; 660 } 661 662 __carl9170_tx_process_status(ar, cmd->_tx_status[i].cookie, 663 cmd->_tx_status[i].info); 664 } 665 } 666 667 static void carl9170_tx_rate_tpc_chains(struct ar9170 *ar, 668 struct ieee80211_tx_info *info, struct ieee80211_tx_rate *txrate, 669 unsigned int *phyrate, unsigned int *tpc, unsigned int *chains) 670 { 671 struct ieee80211_rate *rate = NULL; 672 u8 *txpower; 673 unsigned int idx; 674 675 idx = txrate->idx; 676 *tpc = 0; 677 *phyrate = 0; 678 679 if (txrate->flags & IEEE80211_TX_RC_MCS) { 680 if (txrate->flags & IEEE80211_TX_RC_40_MHZ_WIDTH) { 681 /* +1 dBm for HT40 */ 682 *tpc += 2; 683 684 if (info->band == IEEE80211_BAND_2GHZ) 685 txpower = ar->power_2G_ht40; 686 else 687 txpower = ar->power_5G_ht40; 688 } else { 689 if (info->band == IEEE80211_BAND_2GHZ) 690 txpower = ar->power_2G_ht20; 691 else 692 txpower = ar->power_5G_ht20; 693 } 694 695 *phyrate = txrate->idx; 696 *tpc += txpower[idx & 7]; 697 } else { 698 if (info->band == IEEE80211_BAND_2GHZ) { 699 if (idx < 4) 700 txpower = ar->power_2G_cck; 701 else 702 txpower = ar->power_2G_ofdm; 703 } else { 704 txpower = ar->power_5G_leg; 705 idx += 4; 706 } 707 708 rate = &__carl9170_ratetable[idx]; 709 *tpc += txpower[(rate->hw_value & 0x30) >> 4]; 710 *phyrate = rate->hw_value & 0xf; 711 } 712 713 if (ar->eeprom.tx_mask == 1) { 714 *chains = AR9170_TX_PHY_TXCHAIN_1; 715 } else { 716 if (!(txrate->flags & IEEE80211_TX_RC_MCS) && 717 rate && rate->bitrate >= 360) 718 *chains = AR9170_TX_PHY_TXCHAIN_1; 719 else 720 *chains = AR9170_TX_PHY_TXCHAIN_2; 721 } 722 } 723 724 static __le32 carl9170_tx_physet(struct ar9170 *ar, 725 struct ieee80211_tx_info *info, struct ieee80211_tx_rate *txrate) 726 { 727 unsigned int power = 0, chains = 0, phyrate = 0; 728 __le32 tmp; 729 730 tmp = cpu_to_le32(0); 731 732 if (txrate->flags & IEEE80211_TX_RC_40_MHZ_WIDTH) 733 tmp |= cpu_to_le32(AR9170_TX_PHY_BW_40MHZ << 734 AR9170_TX_PHY_BW_S); 735 /* this works because 40 MHz is 2 and dup is 3 */ 736 if (txrate->flags & IEEE80211_TX_RC_DUP_DATA) 737 tmp |= cpu_to_le32(AR9170_TX_PHY_BW_40MHZ_DUP << 738 AR9170_TX_PHY_BW_S); 739 740 if (txrate->flags & IEEE80211_TX_RC_SHORT_GI) 741 tmp |= cpu_to_le32(AR9170_TX_PHY_SHORT_GI); 742 743 if (txrate->flags & IEEE80211_TX_RC_MCS) { 744 SET_VAL(AR9170_TX_PHY_MCS, phyrate, txrate->idx); 745 746 /* heavy clip control */ 747 tmp |= cpu_to_le32((txrate->idx & 0x7) << 748 AR9170_TX_PHY_TX_HEAVY_CLIP_S); 749 750 tmp |= cpu_to_le32(AR9170_TX_PHY_MOD_HT); 751 752 /* 753 * green field preamble does not work. 754 * 755 * if (txrate->flags & IEEE80211_TX_RC_GREEN_FIELD) 756 * tmp |= cpu_to_le32(AR9170_TX_PHY_GREENFIELD); 757 */ 758 } else { 759 if (info->band == IEEE80211_BAND_2GHZ) { 760 if (txrate->idx <= AR9170_TX_PHY_RATE_CCK_11M) 761 tmp |= cpu_to_le32(AR9170_TX_PHY_MOD_CCK); 762 else 763 tmp |= cpu_to_le32(AR9170_TX_PHY_MOD_OFDM); 764 } else { 765 tmp |= cpu_to_le32(AR9170_TX_PHY_MOD_OFDM); 766 } 767 768 /* 769 * short preamble seems to be broken too. 770 * 771 * if (txrate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE) 772 * tmp |= cpu_to_le32(AR9170_TX_PHY_SHORT_PREAMBLE); 773 */ 774 } 775 carl9170_tx_rate_tpc_chains(ar, info, txrate, 776 &phyrate, &power, &chains); 777 778 tmp |= cpu_to_le32(SET_CONSTVAL(AR9170_TX_PHY_MCS, phyrate)); 779 tmp |= cpu_to_le32(SET_CONSTVAL(AR9170_TX_PHY_TX_PWR, power)); 780 tmp |= cpu_to_le32(SET_CONSTVAL(AR9170_TX_PHY_TXCHAIN, chains)); 781 return tmp; 782 } 783 784 static bool carl9170_tx_rts_check(struct ar9170 *ar, 785 struct ieee80211_tx_rate *rate, 786 bool ampdu, bool multi) 787 { 788 switch (ar->erp_mode) { 789 case CARL9170_ERP_AUTO: 790 if (ampdu) 791 break; 792 793 case CARL9170_ERP_MAC80211: 794 if (!(rate->flags & IEEE80211_TX_RC_USE_RTS_CTS)) 795 break; 796 797 case CARL9170_ERP_RTS: 798 if (likely(!multi)) 799 return true; 800 801 default: 802 break; 803 } 804 805 return false; 806 } 807 808 static bool carl9170_tx_cts_check(struct ar9170 *ar, 809 struct ieee80211_tx_rate *rate) 810 { 811 switch (ar->erp_mode) { 812 case CARL9170_ERP_AUTO: 813 case CARL9170_ERP_MAC80211: 814 if (!(rate->flags & IEEE80211_TX_RC_USE_CTS_PROTECT)) 815 break; 816 817 case CARL9170_ERP_CTS: 818 return true; 819 820 default: 821 break; 822 } 823 824 return false; 825 } 826 827 static int carl9170_tx_prepare(struct ar9170 *ar, struct sk_buff *skb) 828 { 829 struct ieee80211_hdr *hdr; 830 struct _carl9170_tx_superframe *txc; 831 struct carl9170_vif_info *cvif; 832 struct ieee80211_tx_info *info; 833 struct ieee80211_tx_rate *txrate; 834 struct ieee80211_sta *sta; 835 struct carl9170_tx_info *arinfo; 836 unsigned int hw_queue; 837 int i; 838 __le16 mac_tmp; 839 u16 len; 840 bool ampdu, no_ack; 841 842 BUILD_BUG_ON(sizeof(*arinfo) > sizeof(info->rate_driver_data)); 843 BUILD_BUG_ON(sizeof(struct _carl9170_tx_superdesc) != 844 CARL9170_TX_SUPERDESC_LEN); 845 846 BUILD_BUG_ON(sizeof(struct _ar9170_tx_hwdesc) != 847 AR9170_TX_HWDESC_LEN); 848 849 BUILD_BUG_ON(IEEE80211_TX_MAX_RATES < CARL9170_TX_MAX_RATES); 850 851 BUILD_BUG_ON(AR9170_MAX_VIRTUAL_MAC > 852 ((CARL9170_TX_SUPER_MISC_VIF_ID >> 853 CARL9170_TX_SUPER_MISC_VIF_ID_S) + 1)); 854 855 hw_queue = ar9170_qmap[carl9170_get_queue(ar, skb)]; 856 857 hdr = (void *)skb->data; 858 info = IEEE80211_SKB_CB(skb); 859 len = skb->len; 860 861 /* 862 * Note: If the frame was sent through a monitor interface, 863 * the ieee80211_vif pointer can be NULL. 864 */ 865 if (likely(info->control.vif)) 866 cvif = (void *) info->control.vif->drv_priv; 867 else 868 cvif = NULL; 869 870 sta = info->control.sta; 871 872 txc = (void *)skb_push(skb, sizeof(*txc)); 873 memset(txc, 0, sizeof(*txc)); 874 875 SET_VAL(CARL9170_TX_SUPER_MISC_QUEUE, txc->s.misc, hw_queue); 876 877 if (likely(cvif)) 878 SET_VAL(CARL9170_TX_SUPER_MISC_VIF_ID, txc->s.misc, cvif->id); 879 880 if (unlikely(info->flags & IEEE80211_TX_CTL_SEND_AFTER_DTIM)) 881 txc->s.misc |= CARL9170_TX_SUPER_MISC_CAB; 882 883 if (unlikely(info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ)) 884 txc->s.misc |= CARL9170_TX_SUPER_MISC_ASSIGN_SEQ; 885 886 if (unlikely(ieee80211_is_probe_resp(hdr->frame_control))) 887 txc->s.misc |= CARL9170_TX_SUPER_MISC_FILL_IN_TSF; 888 889 mac_tmp = cpu_to_le16(AR9170_TX_MAC_HW_DURATION | 890 AR9170_TX_MAC_BACKOFF); 891 mac_tmp |= cpu_to_le16((hw_queue << AR9170_TX_MAC_QOS_S) & 892 AR9170_TX_MAC_QOS); 893 894 no_ack = !!(info->flags & IEEE80211_TX_CTL_NO_ACK); 895 if (unlikely(no_ack)) 896 mac_tmp |= cpu_to_le16(AR9170_TX_MAC_NO_ACK); 897 898 if (info->control.hw_key) { 899 len += info->control.hw_key->icv_len; 900 901 switch (info->control.hw_key->cipher) { 902 case WLAN_CIPHER_SUITE_WEP40: 903 case WLAN_CIPHER_SUITE_WEP104: 904 case WLAN_CIPHER_SUITE_TKIP: 905 mac_tmp |= cpu_to_le16(AR9170_TX_MAC_ENCR_RC4); 906 break; 907 case WLAN_CIPHER_SUITE_CCMP: 908 mac_tmp |= cpu_to_le16(AR9170_TX_MAC_ENCR_AES); 909 break; 910 default: 911 WARN_ON(1); 912 goto err_out; 913 } 914 } 915 916 ampdu = !!(info->flags & IEEE80211_TX_CTL_AMPDU); 917 if (ampdu) { 918 unsigned int density, factor; 919 920 if (unlikely(!sta || !cvif)) 921 goto err_out; 922 923 factor = min_t(unsigned int, 1u, sta->ht_cap.ampdu_factor); 924 density = sta->ht_cap.ampdu_density; 925 926 if (density) { 927 /* 928 * Watch out! 929 * 930 * Otus uses slightly different density values than 931 * those from the 802.11n spec. 932 */ 933 934 density = max_t(unsigned int, density + 1, 7u); 935 } 936 937 SET_VAL(CARL9170_TX_SUPER_AMPDU_DENSITY, 938 txc->s.ampdu_settings, density); 939 940 SET_VAL(CARL9170_TX_SUPER_AMPDU_FACTOR, 941 txc->s.ampdu_settings, factor); 942 943 for (i = 0; i < CARL9170_TX_MAX_RATES; i++) { 944 txrate = &info->control.rates[i]; 945 if (txrate->idx >= 0) { 946 txc->s.ri[i] = 947 CARL9170_TX_SUPER_RI_AMPDU; 948 949 if (WARN_ON(!(txrate->flags & 950 IEEE80211_TX_RC_MCS))) { 951 /* 952 * Not sure if it's even possible 953 * to aggregate non-ht rates with 954 * this HW. 955 */ 956 goto err_out; 957 } 958 continue; 959 } 960 961 txrate->idx = 0; 962 txrate->count = ar->hw->max_rate_tries; 963 } 964 965 mac_tmp |= cpu_to_le16(AR9170_TX_MAC_AGGR); 966 } 967 968 /* 969 * NOTE: For the first rate, the ERP & AMPDU flags are directly 970 * taken from mac_control. For all fallback rate, the firmware 971 * updates the mac_control flags from the rate info field. 972 */ 973 for (i = 1; i < CARL9170_TX_MAX_RATES; i++) { 974 txrate = &info->control.rates[i]; 975 if (txrate->idx < 0) 976 break; 977 978 SET_VAL(CARL9170_TX_SUPER_RI_TRIES, txc->s.ri[i], 979 txrate->count); 980 981 if (carl9170_tx_rts_check(ar, txrate, ampdu, no_ack)) 982 txc->s.ri[i] |= (AR9170_TX_MAC_PROT_RTS << 983 CARL9170_TX_SUPER_RI_ERP_PROT_S); 984 else if (carl9170_tx_cts_check(ar, txrate)) 985 txc->s.ri[i] |= (AR9170_TX_MAC_PROT_CTS << 986 CARL9170_TX_SUPER_RI_ERP_PROT_S); 987 988 txc->s.rr[i - 1] = carl9170_tx_physet(ar, info, txrate); 989 } 990 991 txrate = &info->control.rates[0]; 992 SET_VAL(CARL9170_TX_SUPER_RI_TRIES, txc->s.ri[0], txrate->count); 993 994 if (carl9170_tx_rts_check(ar, txrate, ampdu, no_ack)) 995 mac_tmp |= cpu_to_le16(AR9170_TX_MAC_PROT_RTS); 996 else if (carl9170_tx_cts_check(ar, txrate)) 997 mac_tmp |= cpu_to_le16(AR9170_TX_MAC_PROT_CTS); 998 999 txc->s.len = cpu_to_le16(skb->len); 1000 txc->f.length = cpu_to_le16(len + FCS_LEN); 1001 txc->f.mac_control = mac_tmp; 1002 txc->f.phy_control = carl9170_tx_physet(ar, info, txrate); 1003 1004 arinfo = (void *)info->rate_driver_data; 1005 arinfo->timeout = jiffies; 1006 arinfo->ar = ar; 1007 kref_init(&arinfo->ref); 1008 return 0; 1009 1010 err_out: 1011 skb_pull(skb, sizeof(*txc)); 1012 return -EINVAL; 1013 } 1014 1015 static void carl9170_set_immba(struct ar9170 *ar, struct sk_buff *skb) 1016 { 1017 struct _carl9170_tx_superframe *super; 1018 1019 super = (void *) skb->data; 1020 super->f.mac_control |= cpu_to_le16(AR9170_TX_MAC_IMM_BA); 1021 } 1022 1023 static void carl9170_set_ampdu_params(struct ar9170 *ar, struct sk_buff *skb) 1024 { 1025 struct _carl9170_tx_superframe *super; 1026 int tmp; 1027 1028 super = (void *) skb->data; 1029 1030 tmp = (super->s.ampdu_settings & CARL9170_TX_SUPER_AMPDU_DENSITY) << 1031 CARL9170_TX_SUPER_AMPDU_DENSITY_S; 1032 1033 /* 1034 * If you haven't noticed carl9170_tx_prepare has already filled 1035 * in all ampdu spacing & factor parameters. 1036 * Now it's the time to check whenever the settings have to be 1037 * updated by the firmware, or if everything is still the same. 1038 * 1039 * There's no sane way to handle different density values with 1040 * this hardware, so we may as well just do the compare in the 1041 * driver. 1042 */ 1043 1044 if (tmp != ar->current_density) { 1045 ar->current_density = tmp; 1046 super->s.ampdu_settings |= 1047 CARL9170_TX_SUPER_AMPDU_COMMIT_DENSITY; 1048 } 1049 1050 tmp = (super->s.ampdu_settings & CARL9170_TX_SUPER_AMPDU_FACTOR) << 1051 CARL9170_TX_SUPER_AMPDU_FACTOR_S; 1052 1053 if (tmp != ar->current_factor) { 1054 ar->current_factor = tmp; 1055 super->s.ampdu_settings |= 1056 CARL9170_TX_SUPER_AMPDU_COMMIT_FACTOR; 1057 } 1058 } 1059 1060 static bool carl9170_tx_rate_check(struct ar9170 *ar, struct sk_buff *_dest, 1061 struct sk_buff *_src) 1062 { 1063 struct _carl9170_tx_superframe *dest, *src; 1064 1065 dest = (void *) _dest->data; 1066 src = (void *) _src->data; 1067 1068 /* 1069 * The mac80211 rate control algorithm expects that all MPDUs in 1070 * an AMPDU share the same tx vectors. 1071 * This is not really obvious right now, because the hardware 1072 * does the AMPDU setup according to its own rulebook. 1073 * Our nicely assembled, strictly monotonic increasing mpdu 1074 * chains will be broken up, mashed back together... 1075 */ 1076 1077 return (dest->f.phy_control == src->f.phy_control); 1078 } 1079 1080 static void carl9170_tx_ampdu(struct ar9170 *ar) 1081 { 1082 struct sk_buff_head agg; 1083 struct carl9170_sta_tid *tid_info; 1084 struct sk_buff *skb, *first; 1085 unsigned int i = 0, done_ampdus = 0; 1086 u16 seq, queue, tmpssn; 1087 1088 atomic_inc(&ar->tx_ampdu_scheduler); 1089 ar->tx_ampdu_schedule = false; 1090 1091 if (atomic_read(&ar->tx_ampdu_upload)) 1092 return; 1093 1094 if (!ar->tx_ampdu_list_len) 1095 return; 1096 1097 __skb_queue_head_init(&agg); 1098 1099 rcu_read_lock(); 1100 tid_info = rcu_dereference(ar->tx_ampdu_iter); 1101 if (WARN_ON_ONCE(!tid_info)) { 1102 rcu_read_unlock(); 1103 return; 1104 } 1105 1106 retry: 1107 list_for_each_entry_continue_rcu(tid_info, &ar->tx_ampdu_list, list) { 1108 i++; 1109 1110 if (tid_info->state < CARL9170_TID_STATE_PROGRESS) 1111 continue; 1112 1113 queue = TID_TO_WME_AC(tid_info->tid); 1114 1115 spin_lock_bh(&tid_info->lock); 1116 if (tid_info->state != CARL9170_TID_STATE_XMIT) 1117 goto processed; 1118 1119 tid_info->counter++; 1120 first = skb_peek(&tid_info->queue); 1121 tmpssn = carl9170_get_seq(first); 1122 seq = tid_info->snx; 1123 1124 if (unlikely(tmpssn != seq)) { 1125 tid_info->state = CARL9170_TID_STATE_IDLE; 1126 1127 goto processed; 1128 } 1129 1130 while ((skb = skb_peek(&tid_info->queue))) { 1131 /* strict 0, 1, ..., n - 1, n frame sequence order */ 1132 if (unlikely(carl9170_get_seq(skb) != seq)) 1133 break; 1134 1135 /* don't upload more than AMPDU FACTOR allows. */ 1136 if (unlikely(SEQ_DIFF(tid_info->snx, tid_info->bsn) >= 1137 (tid_info->max - 1))) 1138 break; 1139 1140 if (!carl9170_tx_rate_check(ar, skb, first)) 1141 break; 1142 1143 atomic_inc(&ar->tx_ampdu_upload); 1144 tid_info->snx = seq = SEQ_NEXT(seq); 1145 __skb_unlink(skb, &tid_info->queue); 1146 1147 __skb_queue_tail(&agg, skb); 1148 1149 if (skb_queue_len(&agg) >= CARL9170_NUM_TX_AGG_MAX) 1150 break; 1151 } 1152 1153 if (skb_queue_empty(&tid_info->queue) || 1154 carl9170_get_seq(skb_peek(&tid_info->queue)) != 1155 tid_info->snx) { 1156 /* 1157 * stop TID, if A-MPDU frames are still missing, 1158 * or whenever the queue is empty. 1159 */ 1160 1161 tid_info->state = CARL9170_TID_STATE_IDLE; 1162 } 1163 done_ampdus++; 1164 1165 processed: 1166 spin_unlock_bh(&tid_info->lock); 1167 1168 if (skb_queue_empty(&agg)) 1169 continue; 1170 1171 /* apply ampdu spacing & factor settings */ 1172 carl9170_set_ampdu_params(ar, skb_peek(&agg)); 1173 1174 /* set aggregation push bit */ 1175 carl9170_set_immba(ar, skb_peek_tail(&agg)); 1176 1177 spin_lock_bh(&ar->tx_pending[queue].lock); 1178 skb_queue_splice_tail_init(&agg, &ar->tx_pending[queue]); 1179 spin_unlock_bh(&ar->tx_pending[queue].lock); 1180 ar->tx_schedule = true; 1181 } 1182 if ((done_ampdus++ == 0) && (i++ == 0)) 1183 goto retry; 1184 1185 rcu_assign_pointer(ar->tx_ampdu_iter, tid_info); 1186 rcu_read_unlock(); 1187 } 1188 1189 static struct sk_buff *carl9170_tx_pick_skb(struct ar9170 *ar, 1190 struct sk_buff_head *queue) 1191 { 1192 struct sk_buff *skb; 1193 struct ieee80211_tx_info *info; 1194 struct carl9170_tx_info *arinfo; 1195 1196 BUILD_BUG_ON(sizeof(*arinfo) > sizeof(info->rate_driver_data)); 1197 1198 spin_lock_bh(&queue->lock); 1199 skb = skb_peek(queue); 1200 if (unlikely(!skb)) 1201 goto err_unlock; 1202 1203 if (carl9170_alloc_dev_space(ar, skb)) 1204 goto err_unlock; 1205 1206 __skb_unlink(skb, queue); 1207 spin_unlock_bh(&queue->lock); 1208 1209 info = IEEE80211_SKB_CB(skb); 1210 arinfo = (void *) info->rate_driver_data; 1211 1212 arinfo->timeout = jiffies; 1213 return skb; 1214 1215 err_unlock: 1216 spin_unlock_bh(&queue->lock); 1217 return NULL; 1218 } 1219 1220 void carl9170_tx_drop(struct ar9170 *ar, struct sk_buff *skb) 1221 { 1222 struct _carl9170_tx_superframe *super; 1223 uint8_t q = 0; 1224 1225 ar->tx_dropped++; 1226 1227 super = (void *)skb->data; 1228 SET_VAL(CARL9170_TX_SUPER_MISC_QUEUE, q, 1229 ar9170_qmap[carl9170_get_queue(ar, skb)]); 1230 __carl9170_tx_process_status(ar, super->s.cookie, q); 1231 } 1232 1233 static bool carl9170_tx_ps_drop(struct ar9170 *ar, struct sk_buff *skb) 1234 { 1235 struct ieee80211_sta *sta; 1236 struct carl9170_sta_info *sta_info; 1237 1238 rcu_read_lock(); 1239 sta = __carl9170_get_tx_sta(ar, skb); 1240 if (!sta) 1241 goto out_rcu; 1242 1243 sta_info = (void *) sta->drv_priv; 1244 if (unlikely(sta_info->sleeping)) { 1245 struct ieee80211_tx_info *tx_info; 1246 1247 rcu_read_unlock(); 1248 1249 tx_info = IEEE80211_SKB_CB(skb); 1250 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) 1251 atomic_dec(&ar->tx_ampdu_upload); 1252 1253 tx_info->flags |= IEEE80211_TX_STAT_TX_FILTERED; 1254 carl9170_tx_status(ar, skb, false); 1255 return true; 1256 } 1257 1258 out_rcu: 1259 rcu_read_unlock(); 1260 return false; 1261 } 1262 1263 static void carl9170_tx(struct ar9170 *ar) 1264 { 1265 struct sk_buff *skb; 1266 unsigned int i, q; 1267 bool schedule_garbagecollector = false; 1268 1269 ar->tx_schedule = false; 1270 1271 if (unlikely(!IS_STARTED(ar))) 1272 return; 1273 1274 carl9170_usb_handle_tx_err(ar); 1275 1276 for (i = 0; i < ar->hw->queues; i++) { 1277 while (!skb_queue_empty(&ar->tx_pending[i])) { 1278 skb = carl9170_tx_pick_skb(ar, &ar->tx_pending[i]); 1279 if (unlikely(!skb)) 1280 break; 1281 1282 if (unlikely(carl9170_tx_ps_drop(ar, skb))) 1283 continue; 1284 1285 atomic_inc(&ar->tx_total_pending); 1286 1287 q = __carl9170_get_queue(ar, i); 1288 /* 1289 * NB: tx_status[i] vs. tx_status[q], 1290 * TODO: Move into pick_skb or alloc_dev_space. 1291 */ 1292 skb_queue_tail(&ar->tx_status[q], skb); 1293 1294 /* 1295 * increase ref count to "2". 1296 * Ref counting is the easiest way to solve the 1297 * race between the urb's completion routine: 1298 * carl9170_tx_callback 1299 * and wlan tx status functions: 1300 * carl9170_tx_status/janitor. 1301 */ 1302 carl9170_tx_get_skb(skb); 1303 1304 carl9170_usb_tx(ar, skb); 1305 schedule_garbagecollector = true; 1306 } 1307 } 1308 1309 if (!schedule_garbagecollector) 1310 return; 1311 1312 ieee80211_queue_delayed_work(ar->hw, &ar->tx_janitor, 1313 msecs_to_jiffies(CARL9170_TX_TIMEOUT)); 1314 } 1315 1316 static bool carl9170_tx_ampdu_queue(struct ar9170 *ar, 1317 struct ieee80211_sta *sta, struct sk_buff *skb) 1318 { 1319 struct _carl9170_tx_superframe *super = (void *) skb->data; 1320 struct carl9170_sta_info *sta_info; 1321 struct carl9170_sta_tid *agg; 1322 struct sk_buff *iter; 1323 u16 tid, seq, qseq, off; 1324 bool run = false; 1325 1326 tid = carl9170_get_tid(skb); 1327 seq = carl9170_get_seq(skb); 1328 sta_info = (void *) sta->drv_priv; 1329 1330 rcu_read_lock(); 1331 agg = rcu_dereference(sta_info->agg[tid]); 1332 1333 if (!agg) 1334 goto err_unlock_rcu; 1335 1336 spin_lock_bh(&agg->lock); 1337 if (unlikely(agg->state < CARL9170_TID_STATE_IDLE)) 1338 goto err_unlock; 1339 1340 /* check if sequence is within the BA window */ 1341 if (unlikely(!BAW_WITHIN(agg->bsn, CARL9170_BAW_BITS, seq))) 1342 goto err_unlock; 1343 1344 if (WARN_ON_ONCE(!BAW_WITHIN(agg->snx, CARL9170_BAW_BITS, seq))) 1345 goto err_unlock; 1346 1347 off = SEQ_DIFF(seq, agg->bsn); 1348 if (WARN_ON_ONCE(test_and_set_bit(off, agg->bitmap))) 1349 goto err_unlock; 1350 1351 if (likely(BAW_WITHIN(agg->hsn, CARL9170_BAW_BITS, seq))) { 1352 __skb_queue_tail(&agg->queue, skb); 1353 agg->hsn = seq; 1354 goto queued; 1355 } 1356 1357 skb_queue_reverse_walk(&agg->queue, iter) { 1358 qseq = carl9170_get_seq(iter); 1359 1360 if (BAW_WITHIN(qseq, CARL9170_BAW_BITS, seq)) { 1361 __skb_queue_after(&agg->queue, iter, skb); 1362 goto queued; 1363 } 1364 } 1365 1366 __skb_queue_head(&agg->queue, skb); 1367 queued: 1368 1369 if (unlikely(agg->state != CARL9170_TID_STATE_XMIT)) { 1370 if (agg->snx == carl9170_get_seq(skb_peek(&agg->queue))) { 1371 agg->state = CARL9170_TID_STATE_XMIT; 1372 run = true; 1373 } 1374 } 1375 1376 spin_unlock_bh(&agg->lock); 1377 rcu_read_unlock(); 1378 1379 return run; 1380 1381 err_unlock: 1382 spin_unlock_bh(&agg->lock); 1383 1384 err_unlock_rcu: 1385 rcu_read_unlock(); 1386 super->f.mac_control &= ~cpu_to_le16(AR9170_TX_MAC_AGGR); 1387 carl9170_tx_status(ar, skb, false); 1388 ar->tx_dropped++; 1389 return false; 1390 } 1391 1392 void carl9170_op_tx(struct ieee80211_hw *hw, struct sk_buff *skb) 1393 { 1394 struct ar9170 *ar = hw->priv; 1395 struct ieee80211_tx_info *info; 1396 struct ieee80211_sta *sta; 1397 bool run; 1398 1399 if (unlikely(!IS_STARTED(ar))) 1400 goto err_free; 1401 1402 info = IEEE80211_SKB_CB(skb); 1403 sta = info->control.sta; 1404 1405 if (unlikely(carl9170_tx_prepare(ar, skb))) 1406 goto err_free; 1407 1408 carl9170_tx_accounting(ar, skb); 1409 /* 1410 * from now on, one has to use carl9170_tx_status to free 1411 * all ressouces which are associated with the frame. 1412 */ 1413 1414 if (sta) { 1415 struct carl9170_sta_info *stai = (void *) sta->drv_priv; 1416 atomic_inc(&stai->pending_frames); 1417 } 1418 1419 if (info->flags & IEEE80211_TX_CTL_AMPDU) { 1420 run = carl9170_tx_ampdu_queue(ar, sta, skb); 1421 if (run) 1422 carl9170_tx_ampdu(ar); 1423 1424 } else { 1425 unsigned int queue = skb_get_queue_mapping(skb); 1426 1427 skb_queue_tail(&ar->tx_pending[queue], skb); 1428 } 1429 1430 carl9170_tx(ar); 1431 return; 1432 1433 err_free: 1434 ar->tx_dropped++; 1435 dev_kfree_skb_any(skb); 1436 } 1437 1438 void carl9170_tx_scheduler(struct ar9170 *ar) 1439 { 1440 1441 if (ar->tx_ampdu_schedule) 1442 carl9170_tx_ampdu(ar); 1443 1444 if (ar->tx_schedule) 1445 carl9170_tx(ar); 1446 } 1447 1448 int carl9170_update_beacon(struct ar9170 *ar, const bool submit) 1449 { 1450 struct sk_buff *skb = NULL; 1451 struct carl9170_vif_info *cvif; 1452 struct ieee80211_tx_info *txinfo; 1453 struct ieee80211_tx_rate *rate; 1454 __le32 *data, *old = NULL; 1455 unsigned int plcp, power, chains; 1456 u32 word, ht1, off, addr, len; 1457 int i = 0, err = 0; 1458 1459 rcu_read_lock(); 1460 cvif = rcu_dereference(ar->beacon_iter); 1461 retry: 1462 if (ar->vifs == 0 || !cvif) 1463 goto out_unlock; 1464 1465 list_for_each_entry_continue_rcu(cvif, &ar->vif_list, list) { 1466 if (cvif->active && cvif->enable_beacon) 1467 goto found; 1468 } 1469 1470 if (!ar->beacon_enabled || i++) 1471 goto out_unlock; 1472 1473 goto retry; 1474 1475 found: 1476 rcu_assign_pointer(ar->beacon_iter, cvif); 1477 1478 skb = ieee80211_beacon_get_tim(ar->hw, carl9170_get_vif(cvif), 1479 NULL, NULL); 1480 1481 if (!skb) { 1482 err = -ENOMEM; 1483 goto err_free; 1484 } 1485 1486 txinfo = IEEE80211_SKB_CB(skb); 1487 spin_lock_bh(&ar->beacon_lock); 1488 data = (__le32 *)skb->data; 1489 if (cvif->beacon) 1490 old = (__le32 *)cvif->beacon->data; 1491 1492 off = cvif->id * AR9170_MAC_BCN_LENGTH_MAX; 1493 addr = ar->fw.beacon_addr + off; 1494 len = roundup(skb->len + FCS_LEN, 4); 1495 1496 if ((off + len) > ar->fw.beacon_max_len) { 1497 if (net_ratelimit()) { 1498 wiphy_err(ar->hw->wiphy, "beacon does not " 1499 "fit into device memory!\n"); 1500 } 1501 err = -EINVAL; 1502 goto err_unlock; 1503 } 1504 1505 if (len > AR9170_MAC_BCN_LENGTH_MAX) { 1506 if (net_ratelimit()) { 1507 wiphy_err(ar->hw->wiphy, "no support for beacons " 1508 "bigger than %d (yours:%d).\n", 1509 AR9170_MAC_BCN_LENGTH_MAX, len); 1510 } 1511 1512 err = -EMSGSIZE; 1513 goto err_unlock; 1514 } 1515 1516 ht1 = AR9170_MAC_BCN_HT1_TX_ANT0; 1517 rate = &txinfo->control.rates[0]; 1518 carl9170_tx_rate_tpc_chains(ar, txinfo, rate, &plcp, &power, &chains); 1519 if (!(txinfo->control.rates[0].flags & IEEE80211_TX_RC_MCS)) { 1520 if (plcp <= AR9170_TX_PHY_RATE_CCK_11M) 1521 plcp |= ((skb->len + FCS_LEN) << (3 + 16)) + 0x0400; 1522 else 1523 plcp |= ((skb->len + FCS_LEN) << 16) + 0x0010; 1524 } else { 1525 ht1 |= AR9170_MAC_BCN_HT1_HT_EN; 1526 if (rate->flags & IEEE80211_TX_RC_SHORT_GI) 1527 plcp |= AR9170_MAC_BCN_HT2_SGI; 1528 1529 if (rate->flags & IEEE80211_TX_RC_40_MHZ_WIDTH) { 1530 ht1 |= AR9170_MAC_BCN_HT1_BWC_40M_SHARED; 1531 plcp |= AR9170_MAC_BCN_HT2_BW40; 1532 } 1533 if (rate->flags & IEEE80211_TX_RC_DUP_DATA) { 1534 ht1 |= AR9170_MAC_BCN_HT1_BWC_40M_DUP; 1535 plcp |= AR9170_MAC_BCN_HT2_BW40; 1536 } 1537 1538 SET_VAL(AR9170_MAC_BCN_HT2_LEN, plcp, skb->len + FCS_LEN); 1539 } 1540 1541 SET_VAL(AR9170_MAC_BCN_HT1_PWR_CTRL, ht1, 7); 1542 SET_VAL(AR9170_MAC_BCN_HT1_TPC, ht1, power); 1543 SET_VAL(AR9170_MAC_BCN_HT1_CHAIN_MASK, ht1, chains); 1544 if (chains == AR9170_TX_PHY_TXCHAIN_2) 1545 ht1 |= AR9170_MAC_BCN_HT1_TX_ANT1; 1546 1547 carl9170_async_regwrite_begin(ar); 1548 carl9170_async_regwrite(AR9170_MAC_REG_BCN_HT1, ht1); 1549 if (!(txinfo->control.rates[0].flags & IEEE80211_TX_RC_MCS)) 1550 carl9170_async_regwrite(AR9170_MAC_REG_BCN_PLCP, plcp); 1551 else 1552 carl9170_async_regwrite(AR9170_MAC_REG_BCN_HT2, plcp); 1553 1554 for (i = 0; i < DIV_ROUND_UP(skb->len, 4); i++) { 1555 /* 1556 * XXX: This accesses beyond skb data for up 1557 * to the last 3 bytes!! 1558 */ 1559 1560 if (old && (data[i] == old[i])) 1561 continue; 1562 1563 word = le32_to_cpu(data[i]); 1564 carl9170_async_regwrite(addr + 4 * i, word); 1565 } 1566 carl9170_async_regwrite_finish(); 1567 1568 dev_kfree_skb_any(cvif->beacon); 1569 cvif->beacon = NULL; 1570 1571 err = carl9170_async_regwrite_result(); 1572 if (!err) 1573 cvif->beacon = skb; 1574 spin_unlock_bh(&ar->beacon_lock); 1575 if (err) 1576 goto err_free; 1577 1578 if (submit) { 1579 err = carl9170_bcn_ctrl(ar, cvif->id, 1580 CARL9170_BCN_CTRL_CAB_TRIGGER, 1581 addr, skb->len + FCS_LEN); 1582 1583 if (err) 1584 goto err_free; 1585 } 1586 out_unlock: 1587 rcu_read_unlock(); 1588 return 0; 1589 1590 err_unlock: 1591 spin_unlock_bh(&ar->beacon_lock); 1592 1593 err_free: 1594 rcu_read_unlock(); 1595 dev_kfree_skb_any(skb); 1596 return err; 1597 } 1598