1 /* 2 * Copyright (c) 2008-2011 Atheros Communications Inc. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #include <linux/nl80211.h> 18 #include <linux/delay.h> 19 #include "ath9k.h" 20 #include "btcoex.h" 21 22 static u8 parse_mpdudensity(u8 mpdudensity) 23 { 24 /* 25 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing": 26 * 0 for no restriction 27 * 1 for 1/4 us 28 * 2 for 1/2 us 29 * 3 for 1 us 30 * 4 for 2 us 31 * 5 for 4 us 32 * 6 for 8 us 33 * 7 for 16 us 34 */ 35 switch (mpdudensity) { 36 case 0: 37 return 0; 38 case 1: 39 case 2: 40 case 3: 41 /* Our lower layer calculations limit our precision to 42 1 microsecond */ 43 return 1; 44 case 4: 45 return 2; 46 case 5: 47 return 4; 48 case 6: 49 return 8; 50 case 7: 51 return 16; 52 default: 53 return 0; 54 } 55 } 56 57 static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq) 58 { 59 bool pending = false; 60 61 spin_lock_bh(&txq->axq_lock); 62 63 if (txq->axq_depth || !list_empty(&txq->axq_acq)) 64 pending = true; 65 66 spin_unlock_bh(&txq->axq_lock); 67 return pending; 68 } 69 70 static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode) 71 { 72 unsigned long flags; 73 bool ret; 74 75 spin_lock_irqsave(&sc->sc_pm_lock, flags); 76 ret = ath9k_hw_setpower(sc->sc_ah, mode); 77 spin_unlock_irqrestore(&sc->sc_pm_lock, flags); 78 79 return ret; 80 } 81 82 void ath9k_ps_wakeup(struct ath_softc *sc) 83 { 84 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 85 unsigned long flags; 86 enum ath9k_power_mode power_mode; 87 88 spin_lock_irqsave(&sc->sc_pm_lock, flags); 89 if (++sc->ps_usecount != 1) 90 goto unlock; 91 92 power_mode = sc->sc_ah->power_mode; 93 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE); 94 95 /* 96 * While the hardware is asleep, the cycle counters contain no 97 * useful data. Better clear them now so that they don't mess up 98 * survey data results. 99 */ 100 if (power_mode != ATH9K_PM_AWAKE) { 101 spin_lock(&common->cc_lock); 102 ath_hw_cycle_counters_update(common); 103 memset(&common->cc_survey, 0, sizeof(common->cc_survey)); 104 spin_unlock(&common->cc_lock); 105 } 106 107 unlock: 108 spin_unlock_irqrestore(&sc->sc_pm_lock, flags); 109 } 110 111 void ath9k_ps_restore(struct ath_softc *sc) 112 { 113 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 114 enum ath9k_power_mode mode; 115 unsigned long flags; 116 117 spin_lock_irqsave(&sc->sc_pm_lock, flags); 118 if (--sc->ps_usecount != 0) 119 goto unlock; 120 121 if (sc->ps_idle && (sc->ps_flags & PS_WAIT_FOR_TX_ACK)) 122 mode = ATH9K_PM_FULL_SLEEP; 123 else if (sc->ps_enabled && 124 !(sc->ps_flags & (PS_WAIT_FOR_BEACON | 125 PS_WAIT_FOR_CAB | 126 PS_WAIT_FOR_PSPOLL_DATA | 127 PS_WAIT_FOR_TX_ACK))) 128 mode = ATH9K_PM_NETWORK_SLEEP; 129 else 130 goto unlock; 131 132 spin_lock(&common->cc_lock); 133 ath_hw_cycle_counters_update(common); 134 spin_unlock(&common->cc_lock); 135 136 ath9k_hw_setpower(sc->sc_ah, mode); 137 138 unlock: 139 spin_unlock_irqrestore(&sc->sc_pm_lock, flags); 140 } 141 142 void ath_start_ani(struct ath_common *common) 143 { 144 struct ath_hw *ah = common->ah; 145 unsigned long timestamp = jiffies_to_msecs(jiffies); 146 struct ath_softc *sc = (struct ath_softc *) common->priv; 147 148 if (!(sc->sc_flags & SC_OP_ANI_RUN)) 149 return; 150 151 if (sc->sc_flags & SC_OP_OFFCHANNEL) 152 return; 153 154 common->ani.longcal_timer = timestamp; 155 common->ani.shortcal_timer = timestamp; 156 common->ani.checkani_timer = timestamp; 157 158 mod_timer(&common->ani.timer, 159 jiffies + 160 msecs_to_jiffies((u32)ah->config.ani_poll_interval)); 161 } 162 163 static void ath_update_survey_nf(struct ath_softc *sc, int channel) 164 { 165 struct ath_hw *ah = sc->sc_ah; 166 struct ath9k_channel *chan = &ah->channels[channel]; 167 struct survey_info *survey = &sc->survey[channel]; 168 169 if (chan->noisefloor) { 170 survey->filled |= SURVEY_INFO_NOISE_DBM; 171 survey->noise = ath9k_hw_getchan_noise(ah, chan); 172 } 173 } 174 175 /* 176 * Updates the survey statistics and returns the busy time since last 177 * update in %, if the measurement duration was long enough for the 178 * result to be useful, -1 otherwise. 179 */ 180 static int ath_update_survey_stats(struct ath_softc *sc) 181 { 182 struct ath_hw *ah = sc->sc_ah; 183 struct ath_common *common = ath9k_hw_common(ah); 184 int pos = ah->curchan - &ah->channels[0]; 185 struct survey_info *survey = &sc->survey[pos]; 186 struct ath_cycle_counters *cc = &common->cc_survey; 187 unsigned int div = common->clockrate * 1000; 188 int ret = 0; 189 190 if (!ah->curchan) 191 return -1; 192 193 if (ah->power_mode == ATH9K_PM_AWAKE) 194 ath_hw_cycle_counters_update(common); 195 196 if (cc->cycles > 0) { 197 survey->filled |= SURVEY_INFO_CHANNEL_TIME | 198 SURVEY_INFO_CHANNEL_TIME_BUSY | 199 SURVEY_INFO_CHANNEL_TIME_RX | 200 SURVEY_INFO_CHANNEL_TIME_TX; 201 survey->channel_time += cc->cycles / div; 202 survey->channel_time_busy += cc->rx_busy / div; 203 survey->channel_time_rx += cc->rx_frame / div; 204 survey->channel_time_tx += cc->tx_frame / div; 205 } 206 207 if (cc->cycles < div) 208 return -1; 209 210 if (cc->cycles > 0) 211 ret = cc->rx_busy * 100 / cc->cycles; 212 213 memset(cc, 0, sizeof(*cc)); 214 215 ath_update_survey_nf(sc, pos); 216 217 return ret; 218 } 219 220 static void __ath_cancel_work(struct ath_softc *sc) 221 { 222 cancel_work_sync(&sc->paprd_work); 223 cancel_work_sync(&sc->hw_check_work); 224 cancel_delayed_work_sync(&sc->tx_complete_work); 225 cancel_delayed_work_sync(&sc->hw_pll_work); 226 } 227 228 static void ath_cancel_work(struct ath_softc *sc) 229 { 230 __ath_cancel_work(sc); 231 cancel_work_sync(&sc->hw_reset_work); 232 } 233 234 static bool ath_prepare_reset(struct ath_softc *sc, bool retry_tx, bool flush) 235 { 236 struct ath_hw *ah = sc->sc_ah; 237 struct ath_common *common = ath9k_hw_common(ah); 238 bool ret; 239 240 ieee80211_stop_queues(sc->hw); 241 242 sc->hw_busy_count = 0; 243 del_timer_sync(&common->ani.timer); 244 245 ath9k_debug_samp_bb_mac(sc); 246 ath9k_hw_disable_interrupts(ah); 247 248 ret = ath_drain_all_txq(sc, retry_tx); 249 250 if (!ath_stoprecv(sc)) 251 ret = false; 252 253 if (!flush) { 254 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) 255 ath_rx_tasklet(sc, 1, true); 256 ath_rx_tasklet(sc, 1, false); 257 } else { 258 ath_flushrecv(sc); 259 } 260 261 return ret; 262 } 263 264 static bool ath_complete_reset(struct ath_softc *sc, bool start) 265 { 266 struct ath_hw *ah = sc->sc_ah; 267 struct ath_common *common = ath9k_hw_common(ah); 268 269 if (ath_startrecv(sc) != 0) { 270 ath_err(common, "Unable to restart recv logic\n"); 271 return false; 272 } 273 274 ath9k_cmn_update_txpow(ah, sc->curtxpow, 275 sc->config.txpowlimit, &sc->curtxpow); 276 ath9k_hw_set_interrupts(ah); 277 ath9k_hw_enable_interrupts(ah); 278 279 if (!(sc->sc_flags & (SC_OP_OFFCHANNEL)) && start) { 280 if (sc->sc_flags & SC_OP_BEACONS) 281 ath_set_beacon(sc); 282 283 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0); 284 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/2); 285 if (!common->disable_ani) 286 ath_start_ani(common); 287 } 288 289 if ((ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB) && sc->ant_rx != 3) { 290 struct ath_hw_antcomb_conf div_ant_conf; 291 u8 lna_conf; 292 293 ath9k_hw_antdiv_comb_conf_get(ah, &div_ant_conf); 294 295 if (sc->ant_rx == 1) 296 lna_conf = ATH_ANT_DIV_COMB_LNA1; 297 else 298 lna_conf = ATH_ANT_DIV_COMB_LNA2; 299 div_ant_conf.main_lna_conf = lna_conf; 300 div_ant_conf.alt_lna_conf = lna_conf; 301 302 ath9k_hw_antdiv_comb_conf_set(ah, &div_ant_conf); 303 } 304 305 ieee80211_wake_queues(sc->hw); 306 307 return true; 308 } 309 310 static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan, 311 bool retry_tx) 312 { 313 struct ath_hw *ah = sc->sc_ah; 314 struct ath_common *common = ath9k_hw_common(ah); 315 struct ath9k_hw_cal_data *caldata = NULL; 316 bool fastcc = true; 317 bool flush = false; 318 int r; 319 320 __ath_cancel_work(sc); 321 322 spin_lock_bh(&sc->sc_pcu_lock); 323 324 if (!(sc->sc_flags & SC_OP_OFFCHANNEL)) { 325 fastcc = false; 326 caldata = &sc->caldata; 327 } 328 329 if (!hchan) { 330 fastcc = false; 331 flush = true; 332 hchan = ah->curchan; 333 } 334 335 if (fastcc && (ah->chip_fullsleep || 336 !ath9k_hw_check_alive(ah))) 337 fastcc = false; 338 339 if (!ath_prepare_reset(sc, retry_tx, flush)) 340 fastcc = false; 341 342 ath_dbg(common, CONFIG, "Reset to %u MHz, HT40: %d fastcc: %d\n", 343 hchan->channel, !!(hchan->channelFlags & (CHANNEL_HT40MINUS | 344 CHANNEL_HT40PLUS)), 345 fastcc); 346 347 r = ath9k_hw_reset(ah, hchan, caldata, fastcc); 348 if (r) { 349 ath_err(common, 350 "Unable to reset channel, reset status %d\n", r); 351 goto out; 352 } 353 354 if (!ath_complete_reset(sc, true)) 355 r = -EIO; 356 357 out: 358 spin_unlock_bh(&sc->sc_pcu_lock); 359 return r; 360 } 361 362 363 /* 364 * Set/change channels. If the channel is really being changed, it's done 365 * by reseting the chip. To accomplish this we must first cleanup any pending 366 * DMA, then restart stuff. 367 */ 368 static int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw, 369 struct ath9k_channel *hchan) 370 { 371 int r; 372 373 if (sc->sc_flags & SC_OP_INVALID) 374 return -EIO; 375 376 ath9k_ps_wakeup(sc); 377 378 r = ath_reset_internal(sc, hchan, false); 379 380 ath9k_ps_restore(sc); 381 382 return r; 383 } 384 385 static void ath_paprd_activate(struct ath_softc *sc) 386 { 387 struct ath_hw *ah = sc->sc_ah; 388 struct ath9k_hw_cal_data *caldata = ah->caldata; 389 int chain; 390 391 if (!caldata || !caldata->paprd_done) 392 return; 393 394 ath9k_ps_wakeup(sc); 395 ar9003_paprd_enable(ah, false); 396 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) { 397 if (!(ah->txchainmask & BIT(chain))) 398 continue; 399 400 ar9003_paprd_populate_single_table(ah, caldata, chain); 401 } 402 403 ar9003_paprd_enable(ah, true); 404 ath9k_ps_restore(sc); 405 } 406 407 static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain) 408 { 409 struct ieee80211_hw *hw = sc->hw; 410 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); 411 struct ath_hw *ah = sc->sc_ah; 412 struct ath_common *common = ath9k_hw_common(ah); 413 struct ath_tx_control txctl; 414 int time_left; 415 416 memset(&txctl, 0, sizeof(txctl)); 417 txctl.txq = sc->tx.txq_map[WME_AC_BE]; 418 419 memset(tx_info, 0, sizeof(*tx_info)); 420 tx_info->band = hw->conf.channel->band; 421 tx_info->flags |= IEEE80211_TX_CTL_NO_ACK; 422 tx_info->control.rates[0].idx = 0; 423 tx_info->control.rates[0].count = 1; 424 tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS; 425 tx_info->control.rates[1].idx = -1; 426 427 init_completion(&sc->paprd_complete); 428 txctl.paprd = BIT(chain); 429 430 if (ath_tx_start(hw, skb, &txctl) != 0) { 431 ath_dbg(common, CALIBRATE, "PAPRD TX failed\n"); 432 dev_kfree_skb_any(skb); 433 return false; 434 } 435 436 time_left = wait_for_completion_timeout(&sc->paprd_complete, 437 msecs_to_jiffies(ATH_PAPRD_TIMEOUT)); 438 439 if (!time_left) 440 ath_dbg(common, CALIBRATE, 441 "Timeout waiting for paprd training on TX chain %d\n", 442 chain); 443 444 return !!time_left; 445 } 446 447 void ath_paprd_calibrate(struct work_struct *work) 448 { 449 struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work); 450 struct ieee80211_hw *hw = sc->hw; 451 struct ath_hw *ah = sc->sc_ah; 452 struct ieee80211_hdr *hdr; 453 struct sk_buff *skb = NULL; 454 struct ath9k_hw_cal_data *caldata = ah->caldata; 455 struct ath_common *common = ath9k_hw_common(ah); 456 int ftype; 457 int chain_ok = 0; 458 int chain; 459 int len = 1800; 460 461 if (!caldata) 462 return; 463 464 ath9k_ps_wakeup(sc); 465 466 if (ar9003_paprd_init_table(ah) < 0) 467 goto fail_paprd; 468 469 skb = alloc_skb(len, GFP_KERNEL); 470 if (!skb) 471 goto fail_paprd; 472 473 skb_put(skb, len); 474 memset(skb->data, 0, len); 475 hdr = (struct ieee80211_hdr *)skb->data; 476 ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC; 477 hdr->frame_control = cpu_to_le16(ftype); 478 hdr->duration_id = cpu_to_le16(10); 479 memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN); 480 memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN); 481 memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN); 482 483 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) { 484 if (!(ah->txchainmask & BIT(chain))) 485 continue; 486 487 chain_ok = 0; 488 489 ath_dbg(common, CALIBRATE, 490 "Sending PAPRD frame for thermal measurement on chain %d\n", 491 chain); 492 if (!ath_paprd_send_frame(sc, skb, chain)) 493 goto fail_paprd; 494 495 ar9003_paprd_setup_gain_table(ah, chain); 496 497 ath_dbg(common, CALIBRATE, 498 "Sending PAPRD training frame on chain %d\n", chain); 499 if (!ath_paprd_send_frame(sc, skb, chain)) 500 goto fail_paprd; 501 502 if (!ar9003_paprd_is_done(ah)) { 503 ath_dbg(common, CALIBRATE, 504 "PAPRD not yet done on chain %d\n", chain); 505 break; 506 } 507 508 if (ar9003_paprd_create_curve(ah, caldata, chain)) { 509 ath_dbg(common, CALIBRATE, 510 "PAPRD create curve failed on chain %d\n", 511 chain); 512 break; 513 } 514 515 chain_ok = 1; 516 } 517 kfree_skb(skb); 518 519 if (chain_ok) { 520 caldata->paprd_done = true; 521 ath_paprd_activate(sc); 522 } 523 524 fail_paprd: 525 ath9k_ps_restore(sc); 526 } 527 528 /* 529 * This routine performs the periodic noise floor calibration function 530 * that is used to adjust and optimize the chip performance. This 531 * takes environmental changes (location, temperature) into account. 532 * When the task is complete, it reschedules itself depending on the 533 * appropriate interval that was calculated. 534 */ 535 void ath_ani_calibrate(unsigned long data) 536 { 537 struct ath_softc *sc = (struct ath_softc *)data; 538 struct ath_hw *ah = sc->sc_ah; 539 struct ath_common *common = ath9k_hw_common(ah); 540 bool longcal = false; 541 bool shortcal = false; 542 bool aniflag = false; 543 unsigned int timestamp = jiffies_to_msecs(jiffies); 544 u32 cal_interval, short_cal_interval, long_cal_interval; 545 unsigned long flags; 546 547 if (ah->caldata && ah->caldata->nfcal_interference) 548 long_cal_interval = ATH_LONG_CALINTERVAL_INT; 549 else 550 long_cal_interval = ATH_LONG_CALINTERVAL; 551 552 short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ? 553 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL; 554 555 /* Only calibrate if awake */ 556 if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE) 557 goto set_timer; 558 559 ath9k_ps_wakeup(sc); 560 561 /* Long calibration runs independently of short calibration. */ 562 if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) { 563 longcal = true; 564 common->ani.longcal_timer = timestamp; 565 } 566 567 /* Short calibration applies only while caldone is false */ 568 if (!common->ani.caldone) { 569 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) { 570 shortcal = true; 571 common->ani.shortcal_timer = timestamp; 572 common->ani.resetcal_timer = timestamp; 573 } 574 } else { 575 if ((timestamp - common->ani.resetcal_timer) >= 576 ATH_RESTART_CALINTERVAL) { 577 common->ani.caldone = ath9k_hw_reset_calvalid(ah); 578 if (common->ani.caldone) 579 common->ani.resetcal_timer = timestamp; 580 } 581 } 582 583 /* Verify whether we must check ANI */ 584 if (sc->sc_ah->config.enable_ani 585 && (timestamp - common->ani.checkani_timer) >= 586 ah->config.ani_poll_interval) { 587 aniflag = true; 588 common->ani.checkani_timer = timestamp; 589 } 590 591 /* Call ANI routine if necessary */ 592 if (aniflag) { 593 spin_lock_irqsave(&common->cc_lock, flags); 594 ath9k_hw_ani_monitor(ah, ah->curchan); 595 ath_update_survey_stats(sc); 596 spin_unlock_irqrestore(&common->cc_lock, flags); 597 } 598 599 /* Perform calibration if necessary */ 600 if (longcal || shortcal) { 601 common->ani.caldone = 602 ath9k_hw_calibrate(ah, ah->curchan, 603 ah->rxchainmask, longcal); 604 } 605 606 ath_dbg(common, ANI, 607 "Calibration @%lu finished: %s %s %s, caldone: %s\n", 608 jiffies, 609 longcal ? "long" : "", shortcal ? "short" : "", 610 aniflag ? "ani" : "", common->ani.caldone ? "true" : "false"); 611 612 ath9k_ps_restore(sc); 613 614 set_timer: 615 /* 616 * Set timer interval based on previous results. 617 * The interval must be the shortest necessary to satisfy ANI, 618 * short calibration and long calibration. 619 */ 620 ath9k_debug_samp_bb_mac(sc); 621 cal_interval = ATH_LONG_CALINTERVAL; 622 if (sc->sc_ah->config.enable_ani) 623 cal_interval = min(cal_interval, 624 (u32)ah->config.ani_poll_interval); 625 if (!common->ani.caldone) 626 cal_interval = min(cal_interval, (u32)short_cal_interval); 627 628 mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval)); 629 if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) { 630 if (!ah->caldata->paprd_done) 631 ieee80211_queue_work(sc->hw, &sc->paprd_work); 632 else if (!ah->paprd_table_write_done) 633 ath_paprd_activate(sc); 634 } 635 } 636 637 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta, 638 struct ieee80211_vif *vif) 639 { 640 struct ath_node *an; 641 an = (struct ath_node *)sta->drv_priv; 642 643 #ifdef CONFIG_ATH9K_DEBUGFS 644 spin_lock(&sc->nodes_lock); 645 list_add(&an->list, &sc->nodes); 646 spin_unlock(&sc->nodes_lock); 647 #endif 648 an->sta = sta; 649 an->vif = vif; 650 if (sc->sc_flags & SC_OP_TXAGGR) { 651 ath_tx_node_init(sc, an); 652 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR + 653 sta->ht_cap.ampdu_factor); 654 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density); 655 } 656 } 657 658 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta) 659 { 660 struct ath_node *an = (struct ath_node *)sta->drv_priv; 661 662 #ifdef CONFIG_ATH9K_DEBUGFS 663 spin_lock(&sc->nodes_lock); 664 list_del(&an->list); 665 spin_unlock(&sc->nodes_lock); 666 an->sta = NULL; 667 #endif 668 669 if (sc->sc_flags & SC_OP_TXAGGR) 670 ath_tx_node_cleanup(sc, an); 671 } 672 673 674 void ath9k_tasklet(unsigned long data) 675 { 676 struct ath_softc *sc = (struct ath_softc *)data; 677 struct ath_hw *ah = sc->sc_ah; 678 struct ath_common *common = ath9k_hw_common(ah); 679 680 u32 status = sc->intrstatus; 681 u32 rxmask; 682 683 ath9k_ps_wakeup(sc); 684 spin_lock(&sc->sc_pcu_lock); 685 686 if ((status & ATH9K_INT_FATAL) || 687 (status & ATH9K_INT_BB_WATCHDOG)) { 688 #ifdef CONFIG_ATH9K_DEBUGFS 689 enum ath_reset_type type; 690 691 if (status & ATH9K_INT_FATAL) 692 type = RESET_TYPE_FATAL_INT; 693 else 694 type = RESET_TYPE_BB_WATCHDOG; 695 696 RESET_STAT_INC(sc, type); 697 #endif 698 ieee80211_queue_work(sc->hw, &sc->hw_reset_work); 699 goto out; 700 } 701 702 /* 703 * Only run the baseband hang check if beacons stop working in AP or 704 * IBSS mode, because it has a high false positive rate. For station 705 * mode it should not be necessary, since the upper layers will detect 706 * this through a beacon miss automatically and the following channel 707 * change will trigger a hardware reset anyway 708 */ 709 if (ath9k_hw_numtxpending(ah, sc->beacon.beaconq) != 0 && 710 !ath9k_hw_check_alive(ah)) 711 ieee80211_queue_work(sc->hw, &sc->hw_check_work); 712 713 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) { 714 /* 715 * TSF sync does not look correct; remain awake to sync with 716 * the next Beacon. 717 */ 718 ath_dbg(common, PS, "TSFOOR - Sync with next Beacon\n"); 719 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC; 720 } 721 722 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) 723 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL | 724 ATH9K_INT_RXORN); 725 else 726 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN); 727 728 if (status & rxmask) { 729 /* Check for high priority Rx first */ 730 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) && 731 (status & ATH9K_INT_RXHP)) 732 ath_rx_tasklet(sc, 0, true); 733 734 ath_rx_tasklet(sc, 0, false); 735 } 736 737 if (status & ATH9K_INT_TX) { 738 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) 739 ath_tx_edma_tasklet(sc); 740 else 741 ath_tx_tasklet(sc); 742 } 743 744 if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_3WIRE) 745 if (status & ATH9K_INT_GENTIMER) 746 ath_gen_timer_isr(sc->sc_ah); 747 748 if ((status & ATH9K_INT_MCI) && ATH9K_HW_CAP_MCI) 749 ath_mci_intr(sc); 750 751 out: 752 /* re-enable hardware interrupt */ 753 ath9k_hw_enable_interrupts(ah); 754 755 spin_unlock(&sc->sc_pcu_lock); 756 ath9k_ps_restore(sc); 757 } 758 759 irqreturn_t ath_isr(int irq, void *dev) 760 { 761 #define SCHED_INTR ( \ 762 ATH9K_INT_FATAL | \ 763 ATH9K_INT_BB_WATCHDOG | \ 764 ATH9K_INT_RXORN | \ 765 ATH9K_INT_RXEOL | \ 766 ATH9K_INT_RX | \ 767 ATH9K_INT_RXLP | \ 768 ATH9K_INT_RXHP | \ 769 ATH9K_INT_TX | \ 770 ATH9K_INT_BMISS | \ 771 ATH9K_INT_CST | \ 772 ATH9K_INT_TSFOOR | \ 773 ATH9K_INT_GENTIMER | \ 774 ATH9K_INT_MCI) 775 776 struct ath_softc *sc = dev; 777 struct ath_hw *ah = sc->sc_ah; 778 struct ath_common *common = ath9k_hw_common(ah); 779 enum ath9k_int status; 780 bool sched = false; 781 782 /* 783 * The hardware is not ready/present, don't 784 * touch anything. Note this can happen early 785 * on if the IRQ is shared. 786 */ 787 if (sc->sc_flags & SC_OP_INVALID) 788 return IRQ_NONE; 789 790 791 /* shared irq, not for us */ 792 793 if (!ath9k_hw_intrpend(ah)) 794 return IRQ_NONE; 795 796 /* 797 * Figure out the reason(s) for the interrupt. Note 798 * that the hal returns a pseudo-ISR that may include 799 * bits we haven't explicitly enabled so we mask the 800 * value to insure we only process bits we requested. 801 */ 802 ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */ 803 status &= ah->imask; /* discard unasked-for bits */ 804 805 /* 806 * If there are no status bits set, then this interrupt was not 807 * for me (should have been caught above). 808 */ 809 if (!status) 810 return IRQ_NONE; 811 812 /* Cache the status */ 813 sc->intrstatus = status; 814 815 if (status & SCHED_INTR) 816 sched = true; 817 818 /* 819 * If a FATAL or RXORN interrupt is received, we have to reset the 820 * chip immediately. 821 */ 822 if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) && 823 !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA))) 824 goto chip_reset; 825 826 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) && 827 (status & ATH9K_INT_BB_WATCHDOG)) { 828 829 spin_lock(&common->cc_lock); 830 ath_hw_cycle_counters_update(common); 831 ar9003_hw_bb_watchdog_dbg_info(ah); 832 spin_unlock(&common->cc_lock); 833 834 goto chip_reset; 835 } 836 837 if (status & ATH9K_INT_SWBA) 838 tasklet_schedule(&sc->bcon_tasklet); 839 840 if (status & ATH9K_INT_TXURN) 841 ath9k_hw_updatetxtriglevel(ah, true); 842 843 if (status & ATH9K_INT_RXEOL) { 844 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN); 845 ath9k_hw_set_interrupts(ah); 846 } 847 848 if (status & ATH9K_INT_MIB) { 849 /* 850 * Disable interrupts until we service the MIB 851 * interrupt; otherwise it will continue to 852 * fire. 853 */ 854 ath9k_hw_disable_interrupts(ah); 855 /* 856 * Let the hal handle the event. We assume 857 * it will clear whatever condition caused 858 * the interrupt. 859 */ 860 spin_lock(&common->cc_lock); 861 ath9k_hw_proc_mib_event(ah); 862 spin_unlock(&common->cc_lock); 863 ath9k_hw_enable_interrupts(ah); 864 } 865 866 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) 867 if (status & ATH9K_INT_TIM_TIMER) { 868 if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle)) 869 goto chip_reset; 870 /* Clear RxAbort bit so that we can 871 * receive frames */ 872 ath9k_setpower(sc, ATH9K_PM_AWAKE); 873 ath9k_hw_setrxabort(sc->sc_ah, 0); 874 sc->ps_flags |= PS_WAIT_FOR_BEACON; 875 } 876 877 chip_reset: 878 879 ath_debug_stat_interrupt(sc, status); 880 881 if (sched) { 882 /* turn off every interrupt */ 883 ath9k_hw_disable_interrupts(ah); 884 tasklet_schedule(&sc->intr_tq); 885 } 886 887 return IRQ_HANDLED; 888 889 #undef SCHED_INTR 890 } 891 892 static int ath_reset(struct ath_softc *sc, bool retry_tx) 893 { 894 int r; 895 896 ath9k_ps_wakeup(sc); 897 898 r = ath_reset_internal(sc, NULL, retry_tx); 899 900 if (retry_tx) { 901 int i; 902 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) { 903 if (ATH_TXQ_SETUP(sc, i)) { 904 spin_lock_bh(&sc->tx.txq[i].axq_lock); 905 ath_txq_schedule(sc, &sc->tx.txq[i]); 906 spin_unlock_bh(&sc->tx.txq[i].axq_lock); 907 } 908 } 909 } 910 911 ath9k_ps_restore(sc); 912 913 return r; 914 } 915 916 void ath_reset_work(struct work_struct *work) 917 { 918 struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work); 919 920 ath_reset(sc, true); 921 } 922 923 void ath_hw_check(struct work_struct *work) 924 { 925 struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work); 926 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 927 unsigned long flags; 928 int busy; 929 930 ath9k_ps_wakeup(sc); 931 if (ath9k_hw_check_alive(sc->sc_ah)) 932 goto out; 933 934 spin_lock_irqsave(&common->cc_lock, flags); 935 busy = ath_update_survey_stats(sc); 936 spin_unlock_irqrestore(&common->cc_lock, flags); 937 938 ath_dbg(common, RESET, "Possible baseband hang, busy=%d (try %d)\n", 939 busy, sc->hw_busy_count + 1); 940 if (busy >= 99) { 941 if (++sc->hw_busy_count >= 3) { 942 RESET_STAT_INC(sc, RESET_TYPE_BB_HANG); 943 ieee80211_queue_work(sc->hw, &sc->hw_reset_work); 944 } 945 946 } else if (busy >= 0) 947 sc->hw_busy_count = 0; 948 949 out: 950 ath9k_ps_restore(sc); 951 } 952 953 static void ath_hw_pll_rx_hang_check(struct ath_softc *sc, u32 pll_sqsum) 954 { 955 static int count; 956 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 957 958 if (pll_sqsum >= 0x40000) { 959 count++; 960 if (count == 3) { 961 /* Rx is hung for more than 500ms. Reset it */ 962 ath_dbg(common, RESET, "Possible RX hang, resetting\n"); 963 RESET_STAT_INC(sc, RESET_TYPE_PLL_HANG); 964 ieee80211_queue_work(sc->hw, &sc->hw_reset_work); 965 count = 0; 966 } 967 } else 968 count = 0; 969 } 970 971 void ath_hw_pll_work(struct work_struct *work) 972 { 973 struct ath_softc *sc = container_of(work, struct ath_softc, 974 hw_pll_work.work); 975 u32 pll_sqsum; 976 977 if (AR_SREV_9485(sc->sc_ah)) { 978 979 ath9k_ps_wakeup(sc); 980 pll_sqsum = ar9003_get_pll_sqsum_dvc(sc->sc_ah); 981 ath9k_ps_restore(sc); 982 983 ath_hw_pll_rx_hang_check(sc, pll_sqsum); 984 985 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/5); 986 } 987 } 988 989 /**********************/ 990 /* mac80211 callbacks */ 991 /**********************/ 992 993 static int ath9k_start(struct ieee80211_hw *hw) 994 { 995 struct ath_softc *sc = hw->priv; 996 struct ath_hw *ah = sc->sc_ah; 997 struct ath_common *common = ath9k_hw_common(ah); 998 struct ieee80211_channel *curchan = hw->conf.channel; 999 struct ath9k_channel *init_channel; 1000 int r; 1001 1002 ath_dbg(common, CONFIG, 1003 "Starting driver with initial channel: %d MHz\n", 1004 curchan->center_freq); 1005 1006 ath9k_ps_wakeup(sc); 1007 1008 mutex_lock(&sc->mutex); 1009 1010 /* setup initial channel */ 1011 sc->chan_idx = curchan->hw_value; 1012 1013 init_channel = ath9k_cmn_get_curchannel(hw, ah); 1014 1015 /* Reset SERDES registers */ 1016 ath9k_hw_configpcipowersave(ah, false); 1017 1018 /* 1019 * The basic interface to setting the hardware in a good 1020 * state is ``reset''. On return the hardware is known to 1021 * be powered up and with interrupts disabled. This must 1022 * be followed by initialization of the appropriate bits 1023 * and then setup of the interrupt mask. 1024 */ 1025 spin_lock_bh(&sc->sc_pcu_lock); 1026 1027 atomic_set(&ah->intr_ref_cnt, -1); 1028 1029 r = ath9k_hw_reset(ah, init_channel, ah->caldata, false); 1030 if (r) { 1031 ath_err(common, 1032 "Unable to reset hardware; reset status %d (freq %u MHz)\n", 1033 r, curchan->center_freq); 1034 spin_unlock_bh(&sc->sc_pcu_lock); 1035 goto mutex_unlock; 1036 } 1037 1038 /* Setup our intr mask. */ 1039 ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL | 1040 ATH9K_INT_RXORN | ATH9K_INT_FATAL | 1041 ATH9K_INT_GLOBAL; 1042 1043 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) 1044 ah->imask |= ATH9K_INT_RXHP | 1045 ATH9K_INT_RXLP | 1046 ATH9K_INT_BB_WATCHDOG; 1047 else 1048 ah->imask |= ATH9K_INT_RX; 1049 1050 ah->imask |= ATH9K_INT_GTT; 1051 1052 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT) 1053 ah->imask |= ATH9K_INT_CST; 1054 1055 if (ah->caps.hw_caps & ATH9K_HW_CAP_MCI) 1056 ah->imask |= ATH9K_INT_MCI; 1057 1058 sc->sc_flags &= ~SC_OP_INVALID; 1059 sc->sc_ah->is_monitoring = false; 1060 1061 /* Disable BMISS interrupt when we're not associated */ 1062 ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS); 1063 1064 if (!ath_complete_reset(sc, false)) { 1065 r = -EIO; 1066 spin_unlock_bh(&sc->sc_pcu_lock); 1067 goto mutex_unlock; 1068 } 1069 1070 if (ah->led_pin >= 0) { 1071 ath9k_hw_cfg_output(ah, ah->led_pin, 1072 AR_GPIO_OUTPUT_MUX_AS_OUTPUT); 1073 ath9k_hw_set_gpio(ah, ah->led_pin, 0); 1074 } 1075 1076 /* 1077 * Reset key cache to sane defaults (all entries cleared) instead of 1078 * semi-random values after suspend/resume. 1079 */ 1080 ath9k_cmn_init_crypto(sc->sc_ah); 1081 1082 spin_unlock_bh(&sc->sc_pcu_lock); 1083 1084 if ((ath9k_hw_get_btcoex_scheme(ah) != ATH_BTCOEX_CFG_NONE) && 1085 !ah->btcoex_hw.enabled) { 1086 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_MCI)) 1087 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT, 1088 AR_STOMP_LOW_WLAN_WGHT); 1089 ath9k_hw_btcoex_enable(ah); 1090 1091 if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_3WIRE) 1092 ath9k_btcoex_timer_resume(sc); 1093 } 1094 1095 if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en) 1096 common->bus_ops->extn_synch_en(common); 1097 1098 mutex_unlock: 1099 mutex_unlock(&sc->mutex); 1100 1101 ath9k_ps_restore(sc); 1102 1103 return r; 1104 } 1105 1106 static void ath9k_tx(struct ieee80211_hw *hw, struct sk_buff *skb) 1107 { 1108 struct ath_softc *sc = hw->priv; 1109 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 1110 struct ath_tx_control txctl; 1111 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data; 1112 1113 if (sc->ps_enabled) { 1114 /* 1115 * mac80211 does not set PM field for normal data frames, so we 1116 * need to update that based on the current PS mode. 1117 */ 1118 if (ieee80211_is_data(hdr->frame_control) && 1119 !ieee80211_is_nullfunc(hdr->frame_control) && 1120 !ieee80211_has_pm(hdr->frame_control)) { 1121 ath_dbg(common, PS, 1122 "Add PM=1 for a TX frame while in PS mode\n"); 1123 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM); 1124 } 1125 } 1126 1127 /* 1128 * Cannot tx while the hardware is in full sleep, it first needs a full 1129 * chip reset to recover from that 1130 */ 1131 if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_FULL_SLEEP)) 1132 goto exit; 1133 1134 if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) { 1135 /* 1136 * We are using PS-Poll and mac80211 can request TX while in 1137 * power save mode. Need to wake up hardware for the TX to be 1138 * completed and if needed, also for RX of buffered frames. 1139 */ 1140 ath9k_ps_wakeup(sc); 1141 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) 1142 ath9k_hw_setrxabort(sc->sc_ah, 0); 1143 if (ieee80211_is_pspoll(hdr->frame_control)) { 1144 ath_dbg(common, PS, 1145 "Sending PS-Poll to pick a buffered frame\n"); 1146 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA; 1147 } else { 1148 ath_dbg(common, PS, "Wake up to complete TX\n"); 1149 sc->ps_flags |= PS_WAIT_FOR_TX_ACK; 1150 } 1151 /* 1152 * The actual restore operation will happen only after 1153 * the sc_flags bit is cleared. We are just dropping 1154 * the ps_usecount here. 1155 */ 1156 ath9k_ps_restore(sc); 1157 } 1158 1159 memset(&txctl, 0, sizeof(struct ath_tx_control)); 1160 txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)]; 1161 1162 ath_dbg(common, XMIT, "transmitting packet, skb: %p\n", skb); 1163 1164 if (ath_tx_start(hw, skb, &txctl) != 0) { 1165 ath_dbg(common, XMIT, "TX failed\n"); 1166 goto exit; 1167 } 1168 1169 return; 1170 exit: 1171 dev_kfree_skb_any(skb); 1172 } 1173 1174 static void ath9k_stop(struct ieee80211_hw *hw) 1175 { 1176 struct ath_softc *sc = hw->priv; 1177 struct ath_hw *ah = sc->sc_ah; 1178 struct ath_common *common = ath9k_hw_common(ah); 1179 bool prev_idle; 1180 1181 mutex_lock(&sc->mutex); 1182 1183 ath_cancel_work(sc); 1184 1185 if (sc->sc_flags & SC_OP_INVALID) { 1186 ath_dbg(common, ANY, "Device not present\n"); 1187 mutex_unlock(&sc->mutex); 1188 return; 1189 } 1190 1191 /* Ensure HW is awake when we try to shut it down. */ 1192 ath9k_ps_wakeup(sc); 1193 1194 if (ah->btcoex_hw.enabled && 1195 ath9k_hw_get_btcoex_scheme(ah) != ATH_BTCOEX_CFG_NONE) { 1196 ath9k_hw_btcoex_disable(ah); 1197 if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_3WIRE) 1198 ath9k_btcoex_timer_pause(sc); 1199 ath_mci_flush_profile(&sc->btcoex.mci); 1200 } 1201 1202 spin_lock_bh(&sc->sc_pcu_lock); 1203 1204 /* prevent tasklets to enable interrupts once we disable them */ 1205 ah->imask &= ~ATH9K_INT_GLOBAL; 1206 1207 /* make sure h/w will not generate any interrupt 1208 * before setting the invalid flag. */ 1209 ath9k_hw_disable_interrupts(ah); 1210 1211 spin_unlock_bh(&sc->sc_pcu_lock); 1212 1213 /* we can now sync irq and kill any running tasklets, since we already 1214 * disabled interrupts and not holding a spin lock */ 1215 synchronize_irq(sc->irq); 1216 tasklet_kill(&sc->intr_tq); 1217 tasklet_kill(&sc->bcon_tasklet); 1218 1219 prev_idle = sc->ps_idle; 1220 sc->ps_idle = true; 1221 1222 spin_lock_bh(&sc->sc_pcu_lock); 1223 1224 if (ah->led_pin >= 0) { 1225 ath9k_hw_set_gpio(ah, ah->led_pin, 1); 1226 ath9k_hw_cfg_gpio_input(ah, ah->led_pin); 1227 } 1228 1229 ath_prepare_reset(sc, false, true); 1230 1231 if (sc->rx.frag) { 1232 dev_kfree_skb_any(sc->rx.frag); 1233 sc->rx.frag = NULL; 1234 } 1235 1236 if (!ah->curchan) 1237 ah->curchan = ath9k_cmn_get_curchannel(hw, ah); 1238 1239 ath9k_hw_reset(ah, ah->curchan, ah->caldata, false); 1240 ath9k_hw_phy_disable(ah); 1241 1242 ath9k_hw_configpcipowersave(ah, true); 1243 1244 spin_unlock_bh(&sc->sc_pcu_lock); 1245 1246 ath9k_ps_restore(sc); 1247 1248 sc->sc_flags |= SC_OP_INVALID; 1249 sc->ps_idle = prev_idle; 1250 1251 mutex_unlock(&sc->mutex); 1252 1253 ath_dbg(common, CONFIG, "Driver halt\n"); 1254 } 1255 1256 bool ath9k_uses_beacons(int type) 1257 { 1258 switch (type) { 1259 case NL80211_IFTYPE_AP: 1260 case NL80211_IFTYPE_ADHOC: 1261 case NL80211_IFTYPE_MESH_POINT: 1262 return true; 1263 default: 1264 return false; 1265 } 1266 } 1267 1268 static void ath9k_reclaim_beacon(struct ath_softc *sc, 1269 struct ieee80211_vif *vif) 1270 { 1271 struct ath_vif *avp = (void *)vif->drv_priv; 1272 1273 ath9k_set_beaconing_status(sc, false); 1274 ath_beacon_return(sc, avp); 1275 ath9k_set_beaconing_status(sc, true); 1276 sc->sc_flags &= ~SC_OP_BEACONS; 1277 } 1278 1279 static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif) 1280 { 1281 struct ath9k_vif_iter_data *iter_data = data; 1282 int i; 1283 1284 if (iter_data->hw_macaddr) 1285 for (i = 0; i < ETH_ALEN; i++) 1286 iter_data->mask[i] &= 1287 ~(iter_data->hw_macaddr[i] ^ mac[i]); 1288 1289 switch (vif->type) { 1290 case NL80211_IFTYPE_AP: 1291 iter_data->naps++; 1292 break; 1293 case NL80211_IFTYPE_STATION: 1294 iter_data->nstations++; 1295 break; 1296 case NL80211_IFTYPE_ADHOC: 1297 iter_data->nadhocs++; 1298 break; 1299 case NL80211_IFTYPE_MESH_POINT: 1300 iter_data->nmeshes++; 1301 break; 1302 case NL80211_IFTYPE_WDS: 1303 iter_data->nwds++; 1304 break; 1305 default: 1306 iter_data->nothers++; 1307 break; 1308 } 1309 } 1310 1311 /* Called with sc->mutex held. */ 1312 void ath9k_calculate_iter_data(struct ieee80211_hw *hw, 1313 struct ieee80211_vif *vif, 1314 struct ath9k_vif_iter_data *iter_data) 1315 { 1316 struct ath_softc *sc = hw->priv; 1317 struct ath_hw *ah = sc->sc_ah; 1318 struct ath_common *common = ath9k_hw_common(ah); 1319 1320 /* 1321 * Use the hardware MAC address as reference, the hardware uses it 1322 * together with the BSSID mask when matching addresses. 1323 */ 1324 memset(iter_data, 0, sizeof(*iter_data)); 1325 iter_data->hw_macaddr = common->macaddr; 1326 memset(&iter_data->mask, 0xff, ETH_ALEN); 1327 1328 if (vif) 1329 ath9k_vif_iter(iter_data, vif->addr, vif); 1330 1331 /* Get list of all active MAC addresses */ 1332 ieee80211_iterate_active_interfaces_atomic(sc->hw, ath9k_vif_iter, 1333 iter_data); 1334 } 1335 1336 /* Called with sc->mutex held. */ 1337 static void ath9k_calculate_summary_state(struct ieee80211_hw *hw, 1338 struct ieee80211_vif *vif) 1339 { 1340 struct ath_softc *sc = hw->priv; 1341 struct ath_hw *ah = sc->sc_ah; 1342 struct ath_common *common = ath9k_hw_common(ah); 1343 struct ath9k_vif_iter_data iter_data; 1344 1345 ath9k_calculate_iter_data(hw, vif, &iter_data); 1346 1347 /* Set BSSID mask. */ 1348 memcpy(common->bssidmask, iter_data.mask, ETH_ALEN); 1349 ath_hw_setbssidmask(common); 1350 1351 /* Set op-mode & TSF */ 1352 if (iter_data.naps > 0) { 1353 ath9k_hw_set_tsfadjust(ah, 1); 1354 sc->sc_flags |= SC_OP_TSF_RESET; 1355 ah->opmode = NL80211_IFTYPE_AP; 1356 } else { 1357 ath9k_hw_set_tsfadjust(ah, 0); 1358 sc->sc_flags &= ~SC_OP_TSF_RESET; 1359 1360 if (iter_data.nmeshes) 1361 ah->opmode = NL80211_IFTYPE_MESH_POINT; 1362 else if (iter_data.nwds) 1363 ah->opmode = NL80211_IFTYPE_AP; 1364 else if (iter_data.nadhocs) 1365 ah->opmode = NL80211_IFTYPE_ADHOC; 1366 else 1367 ah->opmode = NL80211_IFTYPE_STATION; 1368 } 1369 1370 /* 1371 * Enable MIB interrupts when there are hardware phy counters. 1372 */ 1373 if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0) { 1374 if (ah->config.enable_ani) 1375 ah->imask |= ATH9K_INT_MIB; 1376 ah->imask |= ATH9K_INT_TSFOOR; 1377 } else { 1378 ah->imask &= ~ATH9K_INT_MIB; 1379 ah->imask &= ~ATH9K_INT_TSFOOR; 1380 } 1381 1382 ath9k_hw_set_interrupts(ah); 1383 1384 /* Set up ANI */ 1385 if (iter_data.naps > 0) { 1386 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER; 1387 1388 if (!common->disable_ani) { 1389 sc->sc_flags |= SC_OP_ANI_RUN; 1390 ath_start_ani(common); 1391 } 1392 1393 } else { 1394 sc->sc_flags &= ~SC_OP_ANI_RUN; 1395 del_timer_sync(&common->ani.timer); 1396 } 1397 } 1398 1399 /* Called with sc->mutex held, vif counts set up properly. */ 1400 static void ath9k_do_vif_add_setup(struct ieee80211_hw *hw, 1401 struct ieee80211_vif *vif) 1402 { 1403 struct ath_softc *sc = hw->priv; 1404 1405 ath9k_calculate_summary_state(hw, vif); 1406 1407 if (ath9k_uses_beacons(vif->type)) { 1408 int error; 1409 /* This may fail because upper levels do not have beacons 1410 * properly configured yet. That's OK, we assume it 1411 * will be properly configured and then we will be notified 1412 * in the info_changed method and set up beacons properly 1413 * there. 1414 */ 1415 ath9k_set_beaconing_status(sc, false); 1416 error = ath_beacon_alloc(sc, vif); 1417 if (!error) 1418 ath_beacon_config(sc, vif); 1419 ath9k_set_beaconing_status(sc, true); 1420 } 1421 } 1422 1423 1424 static int ath9k_add_interface(struct ieee80211_hw *hw, 1425 struct ieee80211_vif *vif) 1426 { 1427 struct ath_softc *sc = hw->priv; 1428 struct ath_hw *ah = sc->sc_ah; 1429 struct ath_common *common = ath9k_hw_common(ah); 1430 int ret = 0; 1431 1432 ath9k_ps_wakeup(sc); 1433 mutex_lock(&sc->mutex); 1434 1435 switch (vif->type) { 1436 case NL80211_IFTYPE_STATION: 1437 case NL80211_IFTYPE_WDS: 1438 case NL80211_IFTYPE_ADHOC: 1439 case NL80211_IFTYPE_AP: 1440 case NL80211_IFTYPE_MESH_POINT: 1441 break; 1442 default: 1443 ath_err(common, "Interface type %d not yet supported\n", 1444 vif->type); 1445 ret = -EOPNOTSUPP; 1446 goto out; 1447 } 1448 1449 if (ath9k_uses_beacons(vif->type)) { 1450 if (sc->nbcnvifs >= ATH_BCBUF) { 1451 ath_err(common, "Not enough beacon buffers when adding" 1452 " new interface of type: %i\n", 1453 vif->type); 1454 ret = -ENOBUFS; 1455 goto out; 1456 } 1457 } 1458 1459 if ((ah->opmode == NL80211_IFTYPE_ADHOC) || 1460 ((vif->type == NL80211_IFTYPE_ADHOC) && 1461 sc->nvifs > 0)) { 1462 ath_err(common, "Cannot create ADHOC interface when other" 1463 " interfaces already exist.\n"); 1464 ret = -EINVAL; 1465 goto out; 1466 } 1467 1468 ath_dbg(common, CONFIG, "Attach a VIF of type: %d\n", vif->type); 1469 1470 sc->nvifs++; 1471 1472 ath9k_do_vif_add_setup(hw, vif); 1473 out: 1474 mutex_unlock(&sc->mutex); 1475 ath9k_ps_restore(sc); 1476 return ret; 1477 } 1478 1479 static int ath9k_change_interface(struct ieee80211_hw *hw, 1480 struct ieee80211_vif *vif, 1481 enum nl80211_iftype new_type, 1482 bool p2p) 1483 { 1484 struct ath_softc *sc = hw->priv; 1485 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 1486 int ret = 0; 1487 1488 ath_dbg(common, CONFIG, "Change Interface\n"); 1489 mutex_lock(&sc->mutex); 1490 ath9k_ps_wakeup(sc); 1491 1492 /* See if new interface type is valid. */ 1493 if ((new_type == NL80211_IFTYPE_ADHOC) && 1494 (sc->nvifs > 1)) { 1495 ath_err(common, "When using ADHOC, it must be the only" 1496 " interface.\n"); 1497 ret = -EINVAL; 1498 goto out; 1499 } 1500 1501 if (ath9k_uses_beacons(new_type) && 1502 !ath9k_uses_beacons(vif->type)) { 1503 if (sc->nbcnvifs >= ATH_BCBUF) { 1504 ath_err(common, "No beacon slot available\n"); 1505 ret = -ENOBUFS; 1506 goto out; 1507 } 1508 } 1509 1510 /* Clean up old vif stuff */ 1511 if (ath9k_uses_beacons(vif->type)) 1512 ath9k_reclaim_beacon(sc, vif); 1513 1514 /* Add new settings */ 1515 vif->type = new_type; 1516 vif->p2p = p2p; 1517 1518 ath9k_do_vif_add_setup(hw, vif); 1519 out: 1520 ath9k_ps_restore(sc); 1521 mutex_unlock(&sc->mutex); 1522 return ret; 1523 } 1524 1525 static void ath9k_remove_interface(struct ieee80211_hw *hw, 1526 struct ieee80211_vif *vif) 1527 { 1528 struct ath_softc *sc = hw->priv; 1529 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 1530 1531 ath_dbg(common, CONFIG, "Detach Interface\n"); 1532 1533 ath9k_ps_wakeup(sc); 1534 mutex_lock(&sc->mutex); 1535 1536 sc->nvifs--; 1537 1538 /* Reclaim beacon resources */ 1539 if (ath9k_uses_beacons(vif->type)) 1540 ath9k_reclaim_beacon(sc, vif); 1541 1542 ath9k_calculate_summary_state(hw, NULL); 1543 1544 mutex_unlock(&sc->mutex); 1545 ath9k_ps_restore(sc); 1546 } 1547 1548 static void ath9k_enable_ps(struct ath_softc *sc) 1549 { 1550 struct ath_hw *ah = sc->sc_ah; 1551 1552 sc->ps_enabled = true; 1553 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) { 1554 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) { 1555 ah->imask |= ATH9K_INT_TIM_TIMER; 1556 ath9k_hw_set_interrupts(ah); 1557 } 1558 ath9k_hw_setrxabort(ah, 1); 1559 } 1560 } 1561 1562 static void ath9k_disable_ps(struct ath_softc *sc) 1563 { 1564 struct ath_hw *ah = sc->sc_ah; 1565 1566 sc->ps_enabled = false; 1567 ath9k_hw_setpower(ah, ATH9K_PM_AWAKE); 1568 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) { 1569 ath9k_hw_setrxabort(ah, 0); 1570 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON | 1571 PS_WAIT_FOR_CAB | 1572 PS_WAIT_FOR_PSPOLL_DATA | 1573 PS_WAIT_FOR_TX_ACK); 1574 if (ah->imask & ATH9K_INT_TIM_TIMER) { 1575 ah->imask &= ~ATH9K_INT_TIM_TIMER; 1576 ath9k_hw_set_interrupts(ah); 1577 } 1578 } 1579 1580 } 1581 1582 static int ath9k_config(struct ieee80211_hw *hw, u32 changed) 1583 { 1584 struct ath_softc *sc = hw->priv; 1585 struct ath_hw *ah = sc->sc_ah; 1586 struct ath_common *common = ath9k_hw_common(ah); 1587 struct ieee80211_conf *conf = &hw->conf; 1588 1589 ath9k_ps_wakeup(sc); 1590 mutex_lock(&sc->mutex); 1591 1592 /* 1593 * Leave this as the first check because we need to turn on the 1594 * radio if it was disabled before prior to processing the rest 1595 * of the changes. Likewise we must only disable the radio towards 1596 * the end. 1597 */ 1598 if (changed & IEEE80211_CONF_CHANGE_IDLE) { 1599 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE); 1600 if (sc->ps_idle) 1601 ath_cancel_work(sc); 1602 } 1603 1604 /* 1605 * We just prepare to enable PS. We have to wait until our AP has 1606 * ACK'd our null data frame to disable RX otherwise we'll ignore 1607 * those ACKs and end up retransmitting the same null data frames. 1608 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode. 1609 */ 1610 if (changed & IEEE80211_CONF_CHANGE_PS) { 1611 unsigned long flags; 1612 spin_lock_irqsave(&sc->sc_pm_lock, flags); 1613 if (conf->flags & IEEE80211_CONF_PS) 1614 ath9k_enable_ps(sc); 1615 else 1616 ath9k_disable_ps(sc); 1617 spin_unlock_irqrestore(&sc->sc_pm_lock, flags); 1618 } 1619 1620 if (changed & IEEE80211_CONF_CHANGE_MONITOR) { 1621 if (conf->flags & IEEE80211_CONF_MONITOR) { 1622 ath_dbg(common, CONFIG, "Monitor mode is enabled\n"); 1623 sc->sc_ah->is_monitoring = true; 1624 } else { 1625 ath_dbg(common, CONFIG, "Monitor mode is disabled\n"); 1626 sc->sc_ah->is_monitoring = false; 1627 } 1628 } 1629 1630 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) { 1631 struct ieee80211_channel *curchan = hw->conf.channel; 1632 int pos = curchan->hw_value; 1633 int old_pos = -1; 1634 unsigned long flags; 1635 1636 if (ah->curchan) 1637 old_pos = ah->curchan - &ah->channels[0]; 1638 1639 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) 1640 sc->sc_flags |= SC_OP_OFFCHANNEL; 1641 else 1642 sc->sc_flags &= ~SC_OP_OFFCHANNEL; 1643 1644 ath_dbg(common, CONFIG, "Set channel: %d MHz type: %d\n", 1645 curchan->center_freq, conf->channel_type); 1646 1647 /* update survey stats for the old channel before switching */ 1648 spin_lock_irqsave(&common->cc_lock, flags); 1649 ath_update_survey_stats(sc); 1650 spin_unlock_irqrestore(&common->cc_lock, flags); 1651 1652 /* 1653 * Preserve the current channel values, before updating 1654 * the same channel 1655 */ 1656 if (ah->curchan && (old_pos == pos)) 1657 ath9k_hw_getnf(ah, ah->curchan); 1658 1659 ath9k_cmn_update_ichannel(&sc->sc_ah->channels[pos], 1660 curchan, conf->channel_type); 1661 1662 /* 1663 * If the operating channel changes, change the survey in-use flags 1664 * along with it. 1665 * Reset the survey data for the new channel, unless we're switching 1666 * back to the operating channel from an off-channel operation. 1667 */ 1668 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) && 1669 sc->cur_survey != &sc->survey[pos]) { 1670 1671 if (sc->cur_survey) 1672 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE; 1673 1674 sc->cur_survey = &sc->survey[pos]; 1675 1676 memset(sc->cur_survey, 0, sizeof(struct survey_info)); 1677 sc->cur_survey->filled |= SURVEY_INFO_IN_USE; 1678 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) { 1679 memset(&sc->survey[pos], 0, sizeof(struct survey_info)); 1680 } 1681 1682 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) { 1683 ath_err(common, "Unable to set channel\n"); 1684 mutex_unlock(&sc->mutex); 1685 return -EINVAL; 1686 } 1687 1688 /* 1689 * The most recent snapshot of channel->noisefloor for the old 1690 * channel is only available after the hardware reset. Copy it to 1691 * the survey stats now. 1692 */ 1693 if (old_pos >= 0) 1694 ath_update_survey_nf(sc, old_pos); 1695 } 1696 1697 if (changed & IEEE80211_CONF_CHANGE_POWER) { 1698 ath_dbg(common, CONFIG, "Set power: %d\n", conf->power_level); 1699 sc->config.txpowlimit = 2 * conf->power_level; 1700 ath9k_cmn_update_txpow(ah, sc->curtxpow, 1701 sc->config.txpowlimit, &sc->curtxpow); 1702 } 1703 1704 mutex_unlock(&sc->mutex); 1705 ath9k_ps_restore(sc); 1706 1707 return 0; 1708 } 1709 1710 #define SUPPORTED_FILTERS \ 1711 (FIF_PROMISC_IN_BSS | \ 1712 FIF_ALLMULTI | \ 1713 FIF_CONTROL | \ 1714 FIF_PSPOLL | \ 1715 FIF_OTHER_BSS | \ 1716 FIF_BCN_PRBRESP_PROMISC | \ 1717 FIF_PROBE_REQ | \ 1718 FIF_FCSFAIL) 1719 1720 /* FIXME: sc->sc_full_reset ? */ 1721 static void ath9k_configure_filter(struct ieee80211_hw *hw, 1722 unsigned int changed_flags, 1723 unsigned int *total_flags, 1724 u64 multicast) 1725 { 1726 struct ath_softc *sc = hw->priv; 1727 u32 rfilt; 1728 1729 changed_flags &= SUPPORTED_FILTERS; 1730 *total_flags &= SUPPORTED_FILTERS; 1731 1732 sc->rx.rxfilter = *total_flags; 1733 ath9k_ps_wakeup(sc); 1734 rfilt = ath_calcrxfilter(sc); 1735 ath9k_hw_setrxfilter(sc->sc_ah, rfilt); 1736 ath9k_ps_restore(sc); 1737 1738 ath_dbg(ath9k_hw_common(sc->sc_ah), CONFIG, "Set HW RX filter: 0x%x\n", 1739 rfilt); 1740 } 1741 1742 static int ath9k_sta_add(struct ieee80211_hw *hw, 1743 struct ieee80211_vif *vif, 1744 struct ieee80211_sta *sta) 1745 { 1746 struct ath_softc *sc = hw->priv; 1747 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 1748 struct ath_node *an = (struct ath_node *) sta->drv_priv; 1749 struct ieee80211_key_conf ps_key = { }; 1750 1751 ath_node_attach(sc, sta, vif); 1752 1753 if (vif->type != NL80211_IFTYPE_AP && 1754 vif->type != NL80211_IFTYPE_AP_VLAN) 1755 return 0; 1756 1757 an->ps_key = ath_key_config(common, vif, sta, &ps_key); 1758 1759 return 0; 1760 } 1761 1762 static void ath9k_del_ps_key(struct ath_softc *sc, 1763 struct ieee80211_vif *vif, 1764 struct ieee80211_sta *sta) 1765 { 1766 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 1767 struct ath_node *an = (struct ath_node *) sta->drv_priv; 1768 struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key }; 1769 1770 if (!an->ps_key) 1771 return; 1772 1773 ath_key_delete(common, &ps_key); 1774 } 1775 1776 static int ath9k_sta_remove(struct ieee80211_hw *hw, 1777 struct ieee80211_vif *vif, 1778 struct ieee80211_sta *sta) 1779 { 1780 struct ath_softc *sc = hw->priv; 1781 1782 ath9k_del_ps_key(sc, vif, sta); 1783 ath_node_detach(sc, sta); 1784 1785 return 0; 1786 } 1787 1788 static void ath9k_sta_notify(struct ieee80211_hw *hw, 1789 struct ieee80211_vif *vif, 1790 enum sta_notify_cmd cmd, 1791 struct ieee80211_sta *sta) 1792 { 1793 struct ath_softc *sc = hw->priv; 1794 struct ath_node *an = (struct ath_node *) sta->drv_priv; 1795 1796 if (!(sc->sc_flags & SC_OP_TXAGGR)) 1797 return; 1798 1799 switch (cmd) { 1800 case STA_NOTIFY_SLEEP: 1801 an->sleeping = true; 1802 ath_tx_aggr_sleep(sta, sc, an); 1803 break; 1804 case STA_NOTIFY_AWAKE: 1805 an->sleeping = false; 1806 ath_tx_aggr_wakeup(sc, an); 1807 break; 1808 } 1809 } 1810 1811 static int ath9k_conf_tx(struct ieee80211_hw *hw, 1812 struct ieee80211_vif *vif, u16 queue, 1813 const struct ieee80211_tx_queue_params *params) 1814 { 1815 struct ath_softc *sc = hw->priv; 1816 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 1817 struct ath_txq *txq; 1818 struct ath9k_tx_queue_info qi; 1819 int ret = 0; 1820 1821 if (queue >= WME_NUM_AC) 1822 return 0; 1823 1824 txq = sc->tx.txq_map[queue]; 1825 1826 ath9k_ps_wakeup(sc); 1827 mutex_lock(&sc->mutex); 1828 1829 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info)); 1830 1831 qi.tqi_aifs = params->aifs; 1832 qi.tqi_cwmin = params->cw_min; 1833 qi.tqi_cwmax = params->cw_max; 1834 qi.tqi_burstTime = params->txop; 1835 1836 ath_dbg(common, CONFIG, 1837 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n", 1838 queue, txq->axq_qnum, params->aifs, params->cw_min, 1839 params->cw_max, params->txop); 1840 1841 ret = ath_txq_update(sc, txq->axq_qnum, &qi); 1842 if (ret) 1843 ath_err(common, "TXQ Update failed\n"); 1844 1845 if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) 1846 if (queue == WME_AC_BE && !ret) 1847 ath_beaconq_config(sc); 1848 1849 mutex_unlock(&sc->mutex); 1850 ath9k_ps_restore(sc); 1851 1852 return ret; 1853 } 1854 1855 static int ath9k_set_key(struct ieee80211_hw *hw, 1856 enum set_key_cmd cmd, 1857 struct ieee80211_vif *vif, 1858 struct ieee80211_sta *sta, 1859 struct ieee80211_key_conf *key) 1860 { 1861 struct ath_softc *sc = hw->priv; 1862 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 1863 int ret = 0; 1864 1865 if (ath9k_modparam_nohwcrypt) 1866 return -ENOSPC; 1867 1868 if ((vif->type == NL80211_IFTYPE_ADHOC || 1869 vif->type == NL80211_IFTYPE_MESH_POINT) && 1870 (key->cipher == WLAN_CIPHER_SUITE_TKIP || 1871 key->cipher == WLAN_CIPHER_SUITE_CCMP) && 1872 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) { 1873 /* 1874 * For now, disable hw crypto for the RSN IBSS group keys. This 1875 * could be optimized in the future to use a modified key cache 1876 * design to support per-STA RX GTK, but until that gets 1877 * implemented, use of software crypto for group addressed 1878 * frames is a acceptable to allow RSN IBSS to be used. 1879 */ 1880 return -EOPNOTSUPP; 1881 } 1882 1883 mutex_lock(&sc->mutex); 1884 ath9k_ps_wakeup(sc); 1885 ath_dbg(common, CONFIG, "Set HW Key\n"); 1886 1887 switch (cmd) { 1888 case SET_KEY: 1889 if (sta) 1890 ath9k_del_ps_key(sc, vif, sta); 1891 1892 ret = ath_key_config(common, vif, sta, key); 1893 if (ret >= 0) { 1894 key->hw_key_idx = ret; 1895 /* push IV and Michael MIC generation to stack */ 1896 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV; 1897 if (key->cipher == WLAN_CIPHER_SUITE_TKIP) 1898 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC; 1899 if (sc->sc_ah->sw_mgmt_crypto && 1900 key->cipher == WLAN_CIPHER_SUITE_CCMP) 1901 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT; 1902 ret = 0; 1903 } 1904 break; 1905 case DISABLE_KEY: 1906 ath_key_delete(common, key); 1907 break; 1908 default: 1909 ret = -EINVAL; 1910 } 1911 1912 ath9k_ps_restore(sc); 1913 mutex_unlock(&sc->mutex); 1914 1915 return ret; 1916 } 1917 static void ath9k_bss_iter(void *data, u8 *mac, struct ieee80211_vif *vif) 1918 { 1919 struct ath_softc *sc = data; 1920 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 1921 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf; 1922 struct ath_vif *avp = (void *)vif->drv_priv; 1923 1924 /* 1925 * Skip iteration if primary station vif's bss info 1926 * was not changed 1927 */ 1928 if (sc->sc_flags & SC_OP_PRIM_STA_VIF) 1929 return; 1930 1931 if (bss_conf->assoc) { 1932 sc->sc_flags |= SC_OP_PRIM_STA_VIF; 1933 avp->primary_sta_vif = true; 1934 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN); 1935 common->curaid = bss_conf->aid; 1936 ath9k_hw_write_associd(sc->sc_ah); 1937 ath_dbg(common, CONFIG, "Bss Info ASSOC %d, bssid: %pM\n", 1938 bss_conf->aid, common->curbssid); 1939 ath_beacon_config(sc, vif); 1940 /* 1941 * Request a re-configuration of Beacon related timers 1942 * on the receipt of the first Beacon frame (i.e., 1943 * after time sync with the AP). 1944 */ 1945 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON; 1946 /* Reset rssi stats */ 1947 sc->last_rssi = ATH_RSSI_DUMMY_MARKER; 1948 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER; 1949 1950 if (!common->disable_ani) { 1951 sc->sc_flags |= SC_OP_ANI_RUN; 1952 ath_start_ani(common); 1953 } 1954 1955 } 1956 } 1957 1958 static void ath9k_config_bss(struct ath_softc *sc, struct ieee80211_vif *vif) 1959 { 1960 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 1961 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf; 1962 struct ath_vif *avp = (void *)vif->drv_priv; 1963 1964 if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION) 1965 return; 1966 1967 /* Reconfigure bss info */ 1968 if (avp->primary_sta_vif && !bss_conf->assoc) { 1969 ath_dbg(common, CONFIG, "Bss Info DISASSOC %d, bssid %pM\n", 1970 common->curaid, common->curbssid); 1971 sc->sc_flags &= ~(SC_OP_PRIM_STA_VIF | SC_OP_BEACONS); 1972 avp->primary_sta_vif = false; 1973 memset(common->curbssid, 0, ETH_ALEN); 1974 common->curaid = 0; 1975 } 1976 1977 ieee80211_iterate_active_interfaces_atomic( 1978 sc->hw, ath9k_bss_iter, sc); 1979 1980 /* 1981 * None of station vifs are associated. 1982 * Clear bssid & aid 1983 */ 1984 if (!(sc->sc_flags & SC_OP_PRIM_STA_VIF)) { 1985 ath9k_hw_write_associd(sc->sc_ah); 1986 /* Stop ANI */ 1987 sc->sc_flags &= ~SC_OP_ANI_RUN; 1988 del_timer_sync(&common->ani.timer); 1989 memset(&sc->caldata, 0, sizeof(sc->caldata)); 1990 } 1991 } 1992 1993 static void ath9k_bss_info_changed(struct ieee80211_hw *hw, 1994 struct ieee80211_vif *vif, 1995 struct ieee80211_bss_conf *bss_conf, 1996 u32 changed) 1997 { 1998 struct ath_softc *sc = hw->priv; 1999 struct ath_hw *ah = sc->sc_ah; 2000 struct ath_common *common = ath9k_hw_common(ah); 2001 struct ath_vif *avp = (void *)vif->drv_priv; 2002 int slottime; 2003 int error; 2004 2005 ath9k_ps_wakeup(sc); 2006 mutex_lock(&sc->mutex); 2007 2008 if (changed & BSS_CHANGED_BSSID) { 2009 ath9k_config_bss(sc, vif); 2010 2011 ath_dbg(common, CONFIG, "BSSID: %pM aid: 0x%x\n", 2012 common->curbssid, common->curaid); 2013 } 2014 2015 if (changed & BSS_CHANGED_IBSS) { 2016 /* There can be only one vif available */ 2017 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN); 2018 common->curaid = bss_conf->aid; 2019 ath9k_hw_write_associd(sc->sc_ah); 2020 2021 if (bss_conf->ibss_joined) { 2022 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER; 2023 2024 if (!common->disable_ani) { 2025 sc->sc_flags |= SC_OP_ANI_RUN; 2026 ath_start_ani(common); 2027 } 2028 2029 } else { 2030 sc->sc_flags &= ~SC_OP_ANI_RUN; 2031 del_timer_sync(&common->ani.timer); 2032 } 2033 } 2034 2035 /* Enable transmission of beacons (AP, IBSS, MESH) */ 2036 if ((changed & BSS_CHANGED_BEACON) || 2037 ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) { 2038 ath9k_set_beaconing_status(sc, false); 2039 error = ath_beacon_alloc(sc, vif); 2040 if (!error) 2041 ath_beacon_config(sc, vif); 2042 ath9k_set_beaconing_status(sc, true); 2043 } 2044 2045 if (changed & BSS_CHANGED_ERP_SLOT) { 2046 if (bss_conf->use_short_slot) 2047 slottime = 9; 2048 else 2049 slottime = 20; 2050 if (vif->type == NL80211_IFTYPE_AP) { 2051 /* 2052 * Defer update, so that connected stations can adjust 2053 * their settings at the same time. 2054 * See beacon.c for more details 2055 */ 2056 sc->beacon.slottime = slottime; 2057 sc->beacon.updateslot = UPDATE; 2058 } else { 2059 ah->slottime = slottime; 2060 ath9k_hw_init_global_settings(ah); 2061 } 2062 } 2063 2064 /* Disable transmission of beacons */ 2065 if ((changed & BSS_CHANGED_BEACON_ENABLED) && 2066 !bss_conf->enable_beacon) { 2067 ath9k_set_beaconing_status(sc, false); 2068 avp->is_bslot_active = false; 2069 ath9k_set_beaconing_status(sc, true); 2070 } 2071 2072 if (changed & BSS_CHANGED_BEACON_INT) { 2073 /* 2074 * In case of AP mode, the HW TSF has to be reset 2075 * when the beacon interval changes. 2076 */ 2077 if (vif->type == NL80211_IFTYPE_AP) { 2078 sc->sc_flags |= SC_OP_TSF_RESET; 2079 ath9k_set_beaconing_status(sc, false); 2080 error = ath_beacon_alloc(sc, vif); 2081 if (!error) 2082 ath_beacon_config(sc, vif); 2083 ath9k_set_beaconing_status(sc, true); 2084 } else 2085 ath_beacon_config(sc, vif); 2086 } 2087 2088 if (changed & BSS_CHANGED_ERP_PREAMBLE) { 2089 ath_dbg(common, CONFIG, "BSS Changed PREAMBLE %d\n", 2090 bss_conf->use_short_preamble); 2091 if (bss_conf->use_short_preamble) 2092 sc->sc_flags |= SC_OP_PREAMBLE_SHORT; 2093 else 2094 sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT; 2095 } 2096 2097 if (changed & BSS_CHANGED_ERP_CTS_PROT) { 2098 ath_dbg(common, CONFIG, "BSS Changed CTS PROT %d\n", 2099 bss_conf->use_cts_prot); 2100 if (bss_conf->use_cts_prot && 2101 hw->conf.channel->band != IEEE80211_BAND_5GHZ) 2102 sc->sc_flags |= SC_OP_PROTECT_ENABLE; 2103 else 2104 sc->sc_flags &= ~SC_OP_PROTECT_ENABLE; 2105 } 2106 2107 mutex_unlock(&sc->mutex); 2108 ath9k_ps_restore(sc); 2109 } 2110 2111 static u64 ath9k_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif) 2112 { 2113 struct ath_softc *sc = hw->priv; 2114 u64 tsf; 2115 2116 mutex_lock(&sc->mutex); 2117 ath9k_ps_wakeup(sc); 2118 tsf = ath9k_hw_gettsf64(sc->sc_ah); 2119 ath9k_ps_restore(sc); 2120 mutex_unlock(&sc->mutex); 2121 2122 return tsf; 2123 } 2124 2125 static void ath9k_set_tsf(struct ieee80211_hw *hw, 2126 struct ieee80211_vif *vif, 2127 u64 tsf) 2128 { 2129 struct ath_softc *sc = hw->priv; 2130 2131 mutex_lock(&sc->mutex); 2132 ath9k_ps_wakeup(sc); 2133 ath9k_hw_settsf64(sc->sc_ah, tsf); 2134 ath9k_ps_restore(sc); 2135 mutex_unlock(&sc->mutex); 2136 } 2137 2138 static void ath9k_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif) 2139 { 2140 struct ath_softc *sc = hw->priv; 2141 2142 mutex_lock(&sc->mutex); 2143 2144 ath9k_ps_wakeup(sc); 2145 ath9k_hw_reset_tsf(sc->sc_ah); 2146 ath9k_ps_restore(sc); 2147 2148 mutex_unlock(&sc->mutex); 2149 } 2150 2151 static int ath9k_ampdu_action(struct ieee80211_hw *hw, 2152 struct ieee80211_vif *vif, 2153 enum ieee80211_ampdu_mlme_action action, 2154 struct ieee80211_sta *sta, 2155 u16 tid, u16 *ssn, u8 buf_size) 2156 { 2157 struct ath_softc *sc = hw->priv; 2158 int ret = 0; 2159 2160 local_bh_disable(); 2161 2162 switch (action) { 2163 case IEEE80211_AMPDU_RX_START: 2164 if (!(sc->sc_flags & SC_OP_RXAGGR)) 2165 ret = -ENOTSUPP; 2166 break; 2167 case IEEE80211_AMPDU_RX_STOP: 2168 break; 2169 case IEEE80211_AMPDU_TX_START: 2170 if (!(sc->sc_flags & SC_OP_TXAGGR)) 2171 return -EOPNOTSUPP; 2172 2173 ath9k_ps_wakeup(sc); 2174 ret = ath_tx_aggr_start(sc, sta, tid, ssn); 2175 if (!ret) 2176 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid); 2177 ath9k_ps_restore(sc); 2178 break; 2179 case IEEE80211_AMPDU_TX_STOP: 2180 ath9k_ps_wakeup(sc); 2181 ath_tx_aggr_stop(sc, sta, tid); 2182 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid); 2183 ath9k_ps_restore(sc); 2184 break; 2185 case IEEE80211_AMPDU_TX_OPERATIONAL: 2186 ath9k_ps_wakeup(sc); 2187 ath_tx_aggr_resume(sc, sta, tid); 2188 ath9k_ps_restore(sc); 2189 break; 2190 default: 2191 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n"); 2192 } 2193 2194 local_bh_enable(); 2195 2196 return ret; 2197 } 2198 2199 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx, 2200 struct survey_info *survey) 2201 { 2202 struct ath_softc *sc = hw->priv; 2203 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 2204 struct ieee80211_supported_band *sband; 2205 struct ieee80211_channel *chan; 2206 unsigned long flags; 2207 int pos; 2208 2209 spin_lock_irqsave(&common->cc_lock, flags); 2210 if (idx == 0) 2211 ath_update_survey_stats(sc); 2212 2213 sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ]; 2214 if (sband && idx >= sband->n_channels) { 2215 idx -= sband->n_channels; 2216 sband = NULL; 2217 } 2218 2219 if (!sband) 2220 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ]; 2221 2222 if (!sband || idx >= sband->n_channels) { 2223 spin_unlock_irqrestore(&common->cc_lock, flags); 2224 return -ENOENT; 2225 } 2226 2227 chan = &sband->channels[idx]; 2228 pos = chan->hw_value; 2229 memcpy(survey, &sc->survey[pos], sizeof(*survey)); 2230 survey->channel = chan; 2231 spin_unlock_irqrestore(&common->cc_lock, flags); 2232 2233 return 0; 2234 } 2235 2236 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class) 2237 { 2238 struct ath_softc *sc = hw->priv; 2239 struct ath_hw *ah = sc->sc_ah; 2240 2241 mutex_lock(&sc->mutex); 2242 ah->coverage_class = coverage_class; 2243 2244 ath9k_ps_wakeup(sc); 2245 ath9k_hw_init_global_settings(ah); 2246 ath9k_ps_restore(sc); 2247 2248 mutex_unlock(&sc->mutex); 2249 } 2250 2251 static void ath9k_flush(struct ieee80211_hw *hw, bool drop) 2252 { 2253 struct ath_softc *sc = hw->priv; 2254 struct ath_hw *ah = sc->sc_ah; 2255 struct ath_common *common = ath9k_hw_common(ah); 2256 int timeout = 200; /* ms */ 2257 int i, j; 2258 bool drain_txq; 2259 2260 mutex_lock(&sc->mutex); 2261 cancel_delayed_work_sync(&sc->tx_complete_work); 2262 2263 if (ah->ah_flags & AH_UNPLUGGED) { 2264 ath_dbg(common, ANY, "Device has been unplugged!\n"); 2265 mutex_unlock(&sc->mutex); 2266 return; 2267 } 2268 2269 if (sc->sc_flags & SC_OP_INVALID) { 2270 ath_dbg(common, ANY, "Device not present\n"); 2271 mutex_unlock(&sc->mutex); 2272 return; 2273 } 2274 2275 for (j = 0; j < timeout; j++) { 2276 bool npend = false; 2277 2278 if (j) 2279 usleep_range(1000, 2000); 2280 2281 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) { 2282 if (!ATH_TXQ_SETUP(sc, i)) 2283 continue; 2284 2285 npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i]); 2286 2287 if (npend) 2288 break; 2289 } 2290 2291 if (!npend) 2292 break; 2293 } 2294 2295 if (drop) { 2296 ath9k_ps_wakeup(sc); 2297 spin_lock_bh(&sc->sc_pcu_lock); 2298 drain_txq = ath_drain_all_txq(sc, false); 2299 spin_unlock_bh(&sc->sc_pcu_lock); 2300 2301 if (!drain_txq) 2302 ath_reset(sc, false); 2303 2304 ath9k_ps_restore(sc); 2305 ieee80211_wake_queues(hw); 2306 } 2307 2308 ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0); 2309 mutex_unlock(&sc->mutex); 2310 } 2311 2312 static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw) 2313 { 2314 struct ath_softc *sc = hw->priv; 2315 int i; 2316 2317 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) { 2318 if (!ATH_TXQ_SETUP(sc, i)) 2319 continue; 2320 2321 if (ath9k_has_pending_frames(sc, &sc->tx.txq[i])) 2322 return true; 2323 } 2324 return false; 2325 } 2326 2327 static int ath9k_tx_last_beacon(struct ieee80211_hw *hw) 2328 { 2329 struct ath_softc *sc = hw->priv; 2330 struct ath_hw *ah = sc->sc_ah; 2331 struct ieee80211_vif *vif; 2332 struct ath_vif *avp; 2333 struct ath_buf *bf; 2334 struct ath_tx_status ts; 2335 int status; 2336 2337 vif = sc->beacon.bslot[0]; 2338 if (!vif) 2339 return 0; 2340 2341 avp = (void *)vif->drv_priv; 2342 if (!avp->is_bslot_active) 2343 return 0; 2344 2345 if (!sc->beacon.tx_processed) { 2346 tasklet_disable(&sc->bcon_tasklet); 2347 2348 bf = avp->av_bcbuf; 2349 if (!bf || !bf->bf_mpdu) 2350 goto skip; 2351 2352 status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts); 2353 if (status == -EINPROGRESS) 2354 goto skip; 2355 2356 sc->beacon.tx_processed = true; 2357 sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK); 2358 2359 skip: 2360 tasklet_enable(&sc->bcon_tasklet); 2361 } 2362 2363 return sc->beacon.tx_last; 2364 } 2365 2366 static int ath9k_get_stats(struct ieee80211_hw *hw, 2367 struct ieee80211_low_level_stats *stats) 2368 { 2369 struct ath_softc *sc = hw->priv; 2370 struct ath_hw *ah = sc->sc_ah; 2371 struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats; 2372 2373 stats->dot11ACKFailureCount = mib_stats->ackrcv_bad; 2374 stats->dot11RTSFailureCount = mib_stats->rts_bad; 2375 stats->dot11FCSErrorCount = mib_stats->fcs_bad; 2376 stats->dot11RTSSuccessCount = mib_stats->rts_good; 2377 return 0; 2378 } 2379 2380 static u32 fill_chainmask(u32 cap, u32 new) 2381 { 2382 u32 filled = 0; 2383 int i; 2384 2385 for (i = 0; cap && new; i++, cap >>= 1) { 2386 if (!(cap & BIT(0))) 2387 continue; 2388 2389 if (new & BIT(0)) 2390 filled |= BIT(i); 2391 2392 new >>= 1; 2393 } 2394 2395 return filled; 2396 } 2397 2398 static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant) 2399 { 2400 struct ath_softc *sc = hw->priv; 2401 struct ath_hw *ah = sc->sc_ah; 2402 2403 if (!rx_ant || !tx_ant) 2404 return -EINVAL; 2405 2406 sc->ant_rx = rx_ant; 2407 sc->ant_tx = tx_ant; 2408 2409 if (ah->caps.rx_chainmask == 1) 2410 return 0; 2411 2412 /* AR9100 runs into calibration issues if not all rx chains are enabled */ 2413 if (AR_SREV_9100(ah)) 2414 ah->rxchainmask = 0x7; 2415 else 2416 ah->rxchainmask = fill_chainmask(ah->caps.rx_chainmask, rx_ant); 2417 2418 ah->txchainmask = fill_chainmask(ah->caps.tx_chainmask, tx_ant); 2419 ath9k_reload_chainmask_settings(sc); 2420 2421 return 0; 2422 } 2423 2424 static int ath9k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant) 2425 { 2426 struct ath_softc *sc = hw->priv; 2427 2428 *tx_ant = sc->ant_tx; 2429 *rx_ant = sc->ant_rx; 2430 return 0; 2431 } 2432 2433 struct ieee80211_ops ath9k_ops = { 2434 .tx = ath9k_tx, 2435 .start = ath9k_start, 2436 .stop = ath9k_stop, 2437 .add_interface = ath9k_add_interface, 2438 .change_interface = ath9k_change_interface, 2439 .remove_interface = ath9k_remove_interface, 2440 .config = ath9k_config, 2441 .configure_filter = ath9k_configure_filter, 2442 .sta_add = ath9k_sta_add, 2443 .sta_remove = ath9k_sta_remove, 2444 .sta_notify = ath9k_sta_notify, 2445 .conf_tx = ath9k_conf_tx, 2446 .bss_info_changed = ath9k_bss_info_changed, 2447 .set_key = ath9k_set_key, 2448 .get_tsf = ath9k_get_tsf, 2449 .set_tsf = ath9k_set_tsf, 2450 .reset_tsf = ath9k_reset_tsf, 2451 .ampdu_action = ath9k_ampdu_action, 2452 .get_survey = ath9k_get_survey, 2453 .rfkill_poll = ath9k_rfkill_poll_state, 2454 .set_coverage_class = ath9k_set_coverage_class, 2455 .flush = ath9k_flush, 2456 .tx_frames_pending = ath9k_tx_frames_pending, 2457 .tx_last_beacon = ath9k_tx_last_beacon, 2458 .get_stats = ath9k_get_stats, 2459 .set_antenna = ath9k_set_antenna, 2460 .get_antenna = ath9k_get_antenna, 2461 }; 2462