1 /* 2 * Copyright (c) 2012 Qualcomm Atheros, Inc. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #include "ath9k.h" 18 19 /* 20 * TX polling - checks if the TX engine is stuck somewhere 21 * and issues a chip reset if so. 22 */ 23 void ath_tx_complete_poll_work(struct work_struct *work) 24 { 25 struct ath_softc *sc = container_of(work, struct ath_softc, 26 tx_complete_work.work); 27 struct ath_txq *txq; 28 int i; 29 bool needreset = false; 30 31 32 if (sc->tx99_state) { 33 ath_dbg(ath9k_hw_common(sc->sc_ah), RESET, 34 "skip tx hung detection on tx99\n"); 35 return; 36 } 37 38 for (i = 0; i < IEEE80211_NUM_ACS; i++) { 39 txq = sc->tx.txq_map[i]; 40 41 ath_txq_lock(sc, txq); 42 if (txq->axq_depth) { 43 if (txq->axq_tx_inprogress) { 44 needreset = true; 45 ath_txq_unlock(sc, txq); 46 break; 47 } else { 48 txq->axq_tx_inprogress = true; 49 } 50 } 51 ath_txq_unlock(sc, txq); 52 } 53 54 if (needreset) { 55 ath_dbg(ath9k_hw_common(sc->sc_ah), RESET, 56 "tx hung, resetting the chip\n"); 57 ath9k_queue_reset(sc, RESET_TYPE_TX_HANG); 58 return; 59 } 60 61 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 62 msecs_to_jiffies(ATH_TX_COMPLETE_POLL_INT)); 63 } 64 65 /* 66 * Checks if the BB/MAC is hung. 67 */ 68 void ath_hw_check(struct work_struct *work) 69 { 70 struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work); 71 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 72 unsigned long flags; 73 int busy; 74 u8 is_alive, nbeacon = 1; 75 enum ath_reset_type type; 76 77 ath9k_ps_wakeup(sc); 78 is_alive = ath9k_hw_check_alive(sc->sc_ah); 79 80 if ((is_alive && !AR_SREV_9300(sc->sc_ah)) || sc->tx99_state) 81 goto out; 82 else if (!is_alive && AR_SREV_9300(sc->sc_ah)) { 83 ath_dbg(common, RESET, 84 "DCU stuck is detected. Schedule chip reset\n"); 85 type = RESET_TYPE_MAC_HANG; 86 goto sched_reset; 87 } 88 89 spin_lock_irqsave(&common->cc_lock, flags); 90 busy = ath_update_survey_stats(sc); 91 spin_unlock_irqrestore(&common->cc_lock, flags); 92 93 ath_dbg(common, RESET, "Possible baseband hang, busy=%d (try %d)\n", 94 busy, sc->hw_busy_count + 1); 95 if (busy >= 99) { 96 if (++sc->hw_busy_count >= 3) { 97 type = RESET_TYPE_BB_HANG; 98 goto sched_reset; 99 } 100 } else if (busy >= 0) { 101 sc->hw_busy_count = 0; 102 nbeacon = 3; 103 } 104 105 ath_start_rx_poll(sc, nbeacon); 106 goto out; 107 108 sched_reset: 109 ath9k_queue_reset(sc, type); 110 out: 111 ath9k_ps_restore(sc); 112 } 113 114 /* 115 * PLL-WAR for AR9485/AR9340 116 */ 117 static bool ath_hw_pll_rx_hang_check(struct ath_softc *sc, u32 pll_sqsum) 118 { 119 static int count; 120 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 121 122 if (pll_sqsum >= 0x40000) { 123 count++; 124 if (count == 3) { 125 ath_dbg(common, RESET, "PLL WAR, resetting the chip\n"); 126 ath9k_queue_reset(sc, RESET_TYPE_PLL_HANG); 127 count = 0; 128 return true; 129 } 130 } else { 131 count = 0; 132 } 133 134 return false; 135 } 136 137 void ath_hw_pll_work(struct work_struct *work) 138 { 139 u32 pll_sqsum; 140 struct ath_softc *sc = container_of(work, struct ath_softc, 141 hw_pll_work.work); 142 /* 143 * ensure that the PLL WAR is executed only 144 * after the STA is associated (or) if the 145 * beaconing had started in interfaces that 146 * uses beacons. 147 */ 148 if (!test_bit(SC_OP_BEACONS, &sc->sc_flags)) 149 return; 150 151 if (sc->tx99_state) 152 return; 153 154 ath9k_ps_wakeup(sc); 155 pll_sqsum = ar9003_get_pll_sqsum_dvc(sc->sc_ah); 156 ath9k_ps_restore(sc); 157 if (ath_hw_pll_rx_hang_check(sc, pll_sqsum)) 158 return; 159 160 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, 161 msecs_to_jiffies(ATH_PLL_WORK_INTERVAL)); 162 } 163 164 /* 165 * RX Polling - monitors baseband hangs. 166 */ 167 void ath_start_rx_poll(struct ath_softc *sc, u8 nbeacon) 168 { 169 if (!AR_SREV_9300(sc->sc_ah)) 170 return; 171 172 if (!test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags)) 173 return; 174 175 mod_timer(&sc->rx_poll_timer, jiffies + msecs_to_jiffies 176 (nbeacon * sc->cur_beacon_conf.beacon_interval)); 177 } 178 179 void ath_rx_poll(unsigned long data) 180 { 181 struct ath_softc *sc = (struct ath_softc *)data; 182 183 if (!test_bit(SC_OP_INVALID, &sc->sc_flags)) 184 ieee80211_queue_work(sc->hw, &sc->hw_check_work); 185 } 186 187 /* 188 * PA Pre-distortion. 189 */ 190 static void ath_paprd_activate(struct ath_softc *sc) 191 { 192 struct ath_hw *ah = sc->sc_ah; 193 struct ath_common *common = ath9k_hw_common(ah); 194 struct ath9k_hw_cal_data *caldata = ah->caldata; 195 int chain; 196 197 if (!caldata || !test_bit(PAPRD_DONE, &caldata->cal_flags)) { 198 ath_dbg(common, CALIBRATE, "Failed to activate PAPRD\n"); 199 return; 200 } 201 202 ar9003_paprd_enable(ah, false); 203 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) { 204 if (!(ah->txchainmask & BIT(chain))) 205 continue; 206 207 ar9003_paprd_populate_single_table(ah, caldata, chain); 208 } 209 210 ath_dbg(common, CALIBRATE, "Activating PAPRD\n"); 211 ar9003_paprd_enable(ah, true); 212 } 213 214 static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain) 215 { 216 struct ieee80211_hw *hw = sc->hw; 217 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); 218 struct ath_hw *ah = sc->sc_ah; 219 struct ath_common *common = ath9k_hw_common(ah); 220 struct ath_tx_control txctl; 221 int time_left; 222 223 memset(&txctl, 0, sizeof(txctl)); 224 txctl.txq = sc->tx.txq_map[IEEE80211_AC_BE]; 225 226 memset(tx_info, 0, sizeof(*tx_info)); 227 tx_info->band = hw->conf.chandef.chan->band; 228 tx_info->flags |= IEEE80211_TX_CTL_NO_ACK; 229 tx_info->control.rates[0].idx = 0; 230 tx_info->control.rates[0].count = 1; 231 tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS; 232 tx_info->control.rates[1].idx = -1; 233 234 init_completion(&sc->paprd_complete); 235 txctl.paprd = BIT(chain); 236 237 if (ath_tx_start(hw, skb, &txctl) != 0) { 238 ath_dbg(common, CALIBRATE, "PAPRD TX failed\n"); 239 dev_kfree_skb_any(skb); 240 return false; 241 } 242 243 time_left = wait_for_completion_timeout(&sc->paprd_complete, 244 msecs_to_jiffies(ATH_PAPRD_TIMEOUT)); 245 246 if (!time_left) 247 ath_dbg(common, CALIBRATE, 248 "Timeout waiting for paprd training on TX chain %d\n", 249 chain); 250 251 return !!time_left; 252 } 253 254 void ath_paprd_calibrate(struct work_struct *work) 255 { 256 struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work); 257 struct ieee80211_hw *hw = sc->hw; 258 struct ath_hw *ah = sc->sc_ah; 259 struct ieee80211_hdr *hdr; 260 struct sk_buff *skb = NULL; 261 struct ath9k_hw_cal_data *caldata = ah->caldata; 262 struct ath_common *common = ath9k_hw_common(ah); 263 int ftype; 264 int chain_ok = 0; 265 int chain; 266 int len = 1800; 267 int ret; 268 269 if (!caldata || 270 !test_bit(PAPRD_PACKET_SENT, &caldata->cal_flags) || 271 test_bit(PAPRD_DONE, &caldata->cal_flags)) { 272 ath_dbg(common, CALIBRATE, "Skipping PAPRD calibration\n"); 273 return; 274 } 275 276 ath9k_ps_wakeup(sc); 277 278 if (ar9003_paprd_init_table(ah) < 0) 279 goto fail_paprd; 280 281 skb = alloc_skb(len, GFP_KERNEL); 282 if (!skb) 283 goto fail_paprd; 284 285 skb_put(skb, len); 286 memset(skb->data, 0, len); 287 hdr = (struct ieee80211_hdr *)skb->data; 288 ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC; 289 hdr->frame_control = cpu_to_le16(ftype); 290 hdr->duration_id = cpu_to_le16(10); 291 memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN); 292 memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN); 293 memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN); 294 295 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) { 296 if (!(ah->txchainmask & BIT(chain))) 297 continue; 298 299 chain_ok = 0; 300 ar9003_paprd_setup_gain_table(ah, chain); 301 302 ath_dbg(common, CALIBRATE, 303 "Sending PAPRD training frame on chain %d\n", chain); 304 if (!ath_paprd_send_frame(sc, skb, chain)) 305 goto fail_paprd; 306 307 if (!ar9003_paprd_is_done(ah)) { 308 ath_dbg(common, CALIBRATE, 309 "PAPRD not yet done on chain %d\n", chain); 310 break; 311 } 312 313 ret = ar9003_paprd_create_curve(ah, caldata, chain); 314 if (ret == -EINPROGRESS) { 315 ath_dbg(common, CALIBRATE, 316 "PAPRD curve on chain %d needs to be re-trained\n", 317 chain); 318 break; 319 } else if (ret) { 320 ath_dbg(common, CALIBRATE, 321 "PAPRD create curve failed on chain %d\n", 322 chain); 323 break; 324 } 325 326 chain_ok = 1; 327 } 328 kfree_skb(skb); 329 330 if (chain_ok) { 331 set_bit(PAPRD_DONE, &caldata->cal_flags); 332 ath_paprd_activate(sc); 333 } 334 335 fail_paprd: 336 ath9k_ps_restore(sc); 337 } 338 339 /* 340 * ANI performs periodic noise floor calibration 341 * that is used to adjust and optimize the chip performance. This 342 * takes environmental changes (location, temperature) into account. 343 * When the task is complete, it reschedules itself depending on the 344 * appropriate interval that was calculated. 345 */ 346 void ath_ani_calibrate(unsigned long data) 347 { 348 struct ath_softc *sc = (struct ath_softc *)data; 349 struct ath_hw *ah = sc->sc_ah; 350 struct ath_common *common = ath9k_hw_common(ah); 351 bool longcal = false; 352 bool shortcal = false; 353 bool aniflag = false; 354 unsigned int timestamp = jiffies_to_msecs(jiffies); 355 u32 cal_interval, short_cal_interval, long_cal_interval; 356 unsigned long flags; 357 358 if (ah->caldata && test_bit(NFCAL_INTF, &ah->caldata->cal_flags)) 359 long_cal_interval = ATH_LONG_CALINTERVAL_INT; 360 else 361 long_cal_interval = ATH_LONG_CALINTERVAL; 362 363 short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ? 364 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL; 365 366 /* Only calibrate if awake */ 367 if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE) { 368 if (++ah->ani_skip_count >= ATH_ANI_MAX_SKIP_COUNT) { 369 spin_lock_irqsave(&sc->sc_pm_lock, flags); 370 sc->ps_flags |= PS_WAIT_FOR_ANI; 371 spin_unlock_irqrestore(&sc->sc_pm_lock, flags); 372 } 373 goto set_timer; 374 } 375 ah->ani_skip_count = 0; 376 spin_lock_irqsave(&sc->sc_pm_lock, flags); 377 sc->ps_flags &= ~PS_WAIT_FOR_ANI; 378 spin_unlock_irqrestore(&sc->sc_pm_lock, flags); 379 380 ath9k_ps_wakeup(sc); 381 382 /* Long calibration runs independently of short calibration. */ 383 if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) { 384 longcal = true; 385 common->ani.longcal_timer = timestamp; 386 } 387 388 /* Short calibration applies only while caldone is false */ 389 if (!common->ani.caldone) { 390 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) { 391 shortcal = true; 392 common->ani.shortcal_timer = timestamp; 393 common->ani.resetcal_timer = timestamp; 394 } 395 } else { 396 if ((timestamp - common->ani.resetcal_timer) >= 397 ATH_RESTART_CALINTERVAL) { 398 common->ani.caldone = ath9k_hw_reset_calvalid(ah); 399 if (common->ani.caldone) 400 common->ani.resetcal_timer = timestamp; 401 } 402 } 403 404 /* Verify whether we must check ANI */ 405 if ((timestamp - common->ani.checkani_timer) >= ah->config.ani_poll_interval) { 406 aniflag = true; 407 common->ani.checkani_timer = timestamp; 408 } 409 410 /* Call ANI routine if necessary */ 411 if (aniflag) { 412 spin_lock_irqsave(&common->cc_lock, flags); 413 ath9k_hw_ani_monitor(ah, ah->curchan); 414 ath_update_survey_stats(sc); 415 spin_unlock_irqrestore(&common->cc_lock, flags); 416 } 417 418 /* Perform calibration if necessary */ 419 if (longcal || shortcal) { 420 common->ani.caldone = 421 ath9k_hw_calibrate(ah, ah->curchan, 422 ah->rxchainmask, longcal); 423 } 424 425 ath_dbg(common, ANI, 426 "Calibration @%lu finished: %s %s %s, caldone: %s\n", 427 jiffies, 428 longcal ? "long" : "", shortcal ? "short" : "", 429 aniflag ? "ani" : "", common->ani.caldone ? "true" : "false"); 430 431 ath9k_ps_restore(sc); 432 433 set_timer: 434 /* 435 * Set timer interval based on previous results. 436 * The interval must be the shortest necessary to satisfy ANI, 437 * short calibration and long calibration. 438 */ 439 cal_interval = ATH_LONG_CALINTERVAL; 440 cal_interval = min(cal_interval, (u32)ah->config.ani_poll_interval); 441 if (!common->ani.caldone) 442 cal_interval = min(cal_interval, (u32)short_cal_interval); 443 444 mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval)); 445 446 if (ar9003_is_paprd_enabled(ah) && ah->caldata) { 447 if (!test_bit(PAPRD_DONE, &ah->caldata->cal_flags)) { 448 ieee80211_queue_work(sc->hw, &sc->paprd_work); 449 } else if (!ah->paprd_table_write_done) { 450 ath9k_ps_wakeup(sc); 451 ath_paprd_activate(sc); 452 ath9k_ps_restore(sc); 453 } 454 } 455 } 456 457 void ath_start_ani(struct ath_softc *sc) 458 { 459 struct ath_hw *ah = sc->sc_ah; 460 struct ath_common *common = ath9k_hw_common(ah); 461 unsigned long timestamp = jiffies_to_msecs(jiffies); 462 463 if (common->disable_ani || 464 !test_bit(SC_OP_ANI_RUN, &sc->sc_flags) || 465 (sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)) 466 return; 467 468 common->ani.longcal_timer = timestamp; 469 common->ani.shortcal_timer = timestamp; 470 common->ani.checkani_timer = timestamp; 471 472 ath_dbg(common, ANI, "Starting ANI\n"); 473 mod_timer(&common->ani.timer, 474 jiffies + msecs_to_jiffies((u32)ah->config.ani_poll_interval)); 475 } 476 477 void ath_stop_ani(struct ath_softc *sc) 478 { 479 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 480 481 ath_dbg(common, ANI, "Stopping ANI\n"); 482 del_timer_sync(&common->ani.timer); 483 } 484 485 void ath_check_ani(struct ath_softc *sc) 486 { 487 struct ath_hw *ah = sc->sc_ah; 488 struct ath_beacon_config *cur_conf = &sc->cur_beacon_conf; 489 490 /* 491 * Check for the various conditions in which ANI has to 492 * be stopped. 493 */ 494 if (ah->opmode == NL80211_IFTYPE_ADHOC) { 495 if (!cur_conf->enable_beacon) 496 goto stop_ani; 497 } else if (ah->opmode == NL80211_IFTYPE_AP) { 498 if (!cur_conf->enable_beacon) { 499 /* 500 * Disable ANI only when there are no 501 * associated stations. 502 */ 503 if (!test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags)) 504 goto stop_ani; 505 } 506 } else if (ah->opmode == NL80211_IFTYPE_STATION) { 507 if (!test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags)) 508 goto stop_ani; 509 } 510 511 if (!test_bit(SC_OP_ANI_RUN, &sc->sc_flags)) { 512 set_bit(SC_OP_ANI_RUN, &sc->sc_flags); 513 ath_start_ani(sc); 514 } 515 516 return; 517 518 stop_ani: 519 clear_bit(SC_OP_ANI_RUN, &sc->sc_flags); 520 ath_stop_ani(sc); 521 } 522 523 void ath_update_survey_nf(struct ath_softc *sc, int channel) 524 { 525 struct ath_hw *ah = sc->sc_ah; 526 struct ath9k_channel *chan = &ah->channels[channel]; 527 struct survey_info *survey = &sc->survey[channel]; 528 529 if (chan->noisefloor) { 530 survey->filled |= SURVEY_INFO_NOISE_DBM; 531 survey->noise = ath9k_hw_getchan_noise(ah, chan, 532 chan->noisefloor); 533 } 534 } 535 536 /* 537 * Updates the survey statistics and returns the busy time since last 538 * update in %, if the measurement duration was long enough for the 539 * result to be useful, -1 otherwise. 540 */ 541 int ath_update_survey_stats(struct ath_softc *sc) 542 { 543 struct ath_hw *ah = sc->sc_ah; 544 struct ath_common *common = ath9k_hw_common(ah); 545 int pos = ah->curchan - &ah->channels[0]; 546 struct survey_info *survey = &sc->survey[pos]; 547 struct ath_cycle_counters *cc = &common->cc_survey; 548 unsigned int div = common->clockrate * 1000; 549 int ret = 0; 550 551 if (!ah->curchan) 552 return -1; 553 554 if (ah->power_mode == ATH9K_PM_AWAKE) 555 ath_hw_cycle_counters_update(common); 556 557 if (cc->cycles > 0) { 558 survey->filled |= SURVEY_INFO_CHANNEL_TIME | 559 SURVEY_INFO_CHANNEL_TIME_BUSY | 560 SURVEY_INFO_CHANNEL_TIME_RX | 561 SURVEY_INFO_CHANNEL_TIME_TX; 562 survey->channel_time += cc->cycles / div; 563 survey->channel_time_busy += cc->rx_busy / div; 564 survey->channel_time_rx += cc->rx_frame / div; 565 survey->channel_time_tx += cc->tx_frame / div; 566 } 567 568 if (cc->cycles < div) 569 return -1; 570 571 if (cc->cycles > 0) 572 ret = cc->rx_busy * 100 / cc->cycles; 573 574 memset(cc, 0, sizeof(*cc)); 575 576 ath_update_survey_nf(sc, pos); 577 578 return ret; 579 } 580