1 /* 2 * Copyright (c) 2010-2011 Atheros Communications Inc. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 18 19 #include "htc.h" 20 21 MODULE_AUTHOR("Atheros Communications"); 22 MODULE_LICENSE("Dual BSD/GPL"); 23 MODULE_DESCRIPTION("Atheros driver 802.11n HTC based wireless devices"); 24 25 static unsigned int ath9k_debug = ATH_DBG_DEFAULT; 26 module_param_named(debug, ath9k_debug, uint, 0); 27 MODULE_PARM_DESC(debug, "Debugging mask"); 28 29 int htc_modparam_nohwcrypt; 30 module_param_named(nohwcrypt, htc_modparam_nohwcrypt, int, 0444); 31 MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption"); 32 33 static int ath9k_htc_btcoex_enable; 34 module_param_named(btcoex_enable, ath9k_htc_btcoex_enable, int, 0444); 35 MODULE_PARM_DESC(btcoex_enable, "Enable wifi-BT coexistence"); 36 37 static int ath9k_ps_enable; 38 module_param_named(ps_enable, ath9k_ps_enable, int, 0444); 39 MODULE_PARM_DESC(ps_enable, "Enable WLAN PowerSave"); 40 41 #ifdef CONFIG_MAC80211_LEDS 42 int ath9k_htc_led_blink = 1; 43 module_param_named(blink, ath9k_htc_led_blink, int, 0444); 44 MODULE_PARM_DESC(blink, "Enable LED blink on activity"); 45 46 static const struct ieee80211_tpt_blink ath9k_htc_tpt_blink[] = { 47 { .throughput = 0 * 1024, .blink_time = 334 }, 48 { .throughput = 1 * 1024, .blink_time = 260 }, 49 { .throughput = 5 * 1024, .blink_time = 220 }, 50 { .throughput = 10 * 1024, .blink_time = 190 }, 51 { .throughput = 20 * 1024, .blink_time = 170 }, 52 { .throughput = 50 * 1024, .blink_time = 150 }, 53 { .throughput = 70 * 1024, .blink_time = 130 }, 54 { .throughput = 100 * 1024, .blink_time = 110 }, 55 { .throughput = 200 * 1024, .blink_time = 80 }, 56 { .throughput = 300 * 1024, .blink_time = 50 }, 57 }; 58 #endif 59 60 static void ath9k_htc_op_ps_wakeup(struct ath_common *common) 61 { 62 ath9k_htc_ps_wakeup((struct ath9k_htc_priv *) common->priv); 63 } 64 65 static void ath9k_htc_op_ps_restore(struct ath_common *common) 66 { 67 ath9k_htc_ps_restore((struct ath9k_htc_priv *) common->priv); 68 } 69 70 static struct ath_ps_ops ath9k_htc_ps_ops = { 71 .wakeup = ath9k_htc_op_ps_wakeup, 72 .restore = ath9k_htc_op_ps_restore, 73 }; 74 75 static int ath9k_htc_wait_for_target(struct ath9k_htc_priv *priv) 76 { 77 unsigned long time_left; 78 79 if (atomic_read(&priv->htc->tgt_ready) > 0) { 80 atomic_dec(&priv->htc->tgt_ready); 81 return 0; 82 } 83 84 /* Firmware can take up to 50ms to get ready, to be safe use 1 second */ 85 time_left = wait_for_completion_timeout(&priv->htc->target_wait, HZ); 86 if (!time_left) { 87 dev_err(priv->dev, "ath9k_htc: Target is unresponsive\n"); 88 return -ETIMEDOUT; 89 } 90 91 atomic_dec(&priv->htc->tgt_ready); 92 93 return 0; 94 } 95 96 static void ath9k_deinit_priv(struct ath9k_htc_priv *priv) 97 { 98 ath9k_hw_deinit(priv->ah); 99 kfree(priv->ah); 100 priv->ah = NULL; 101 } 102 103 static void ath9k_deinit_device(struct ath9k_htc_priv *priv) 104 { 105 struct ieee80211_hw *hw = priv->hw; 106 107 wiphy_rfkill_stop_polling(hw->wiphy); 108 ath9k_deinit_leds(priv); 109 ath9k_htc_deinit_debug(priv); 110 ieee80211_unregister_hw(hw); 111 ath9k_rx_cleanup(priv); 112 ath9k_tx_cleanup(priv); 113 ath9k_deinit_priv(priv); 114 } 115 116 static inline int ath9k_htc_connect_svc(struct ath9k_htc_priv *priv, 117 u16 service_id, 118 void (*tx) (void *, 119 struct sk_buff *, 120 enum htc_endpoint_id, 121 bool txok), 122 enum htc_endpoint_id *ep_id) 123 { 124 struct htc_service_connreq req; 125 126 memset(&req, 0, sizeof(struct htc_service_connreq)); 127 128 req.service_id = service_id; 129 req.ep_callbacks.priv = priv; 130 req.ep_callbacks.rx = ath9k_htc_rxep; 131 req.ep_callbacks.tx = tx; 132 133 return htc_connect_service(priv->htc, &req, ep_id); 134 } 135 136 static int ath9k_init_htc_services(struct ath9k_htc_priv *priv, u16 devid, 137 u32 drv_info) 138 { 139 int ret; 140 141 /* WMI CMD*/ 142 ret = ath9k_wmi_connect(priv->htc, priv->wmi, &priv->wmi_cmd_ep); 143 if (ret) 144 goto err; 145 146 /* Beacon */ 147 ret = ath9k_htc_connect_svc(priv, WMI_BEACON_SVC, ath9k_htc_beaconep, 148 &priv->beacon_ep); 149 if (ret) 150 goto err; 151 152 /* CAB */ 153 ret = ath9k_htc_connect_svc(priv, WMI_CAB_SVC, ath9k_htc_txep, 154 &priv->cab_ep); 155 if (ret) 156 goto err; 157 158 159 /* UAPSD */ 160 ret = ath9k_htc_connect_svc(priv, WMI_UAPSD_SVC, ath9k_htc_txep, 161 &priv->uapsd_ep); 162 if (ret) 163 goto err; 164 165 /* MGMT */ 166 ret = ath9k_htc_connect_svc(priv, WMI_MGMT_SVC, ath9k_htc_txep, 167 &priv->mgmt_ep); 168 if (ret) 169 goto err; 170 171 /* DATA BE */ 172 ret = ath9k_htc_connect_svc(priv, WMI_DATA_BE_SVC, ath9k_htc_txep, 173 &priv->data_be_ep); 174 if (ret) 175 goto err; 176 177 /* DATA BK */ 178 ret = ath9k_htc_connect_svc(priv, WMI_DATA_BK_SVC, ath9k_htc_txep, 179 &priv->data_bk_ep); 180 if (ret) 181 goto err; 182 183 /* DATA VI */ 184 ret = ath9k_htc_connect_svc(priv, WMI_DATA_VI_SVC, ath9k_htc_txep, 185 &priv->data_vi_ep); 186 if (ret) 187 goto err; 188 189 /* DATA VO */ 190 ret = ath9k_htc_connect_svc(priv, WMI_DATA_VO_SVC, ath9k_htc_txep, 191 &priv->data_vo_ep); 192 if (ret) 193 goto err; 194 195 /* 196 * Setup required credits before initializing HTC. 197 * This is a bit hacky, but, since queuing is done in 198 * the HIF layer, shouldn't matter much. 199 */ 200 201 if (IS_AR7010_DEVICE(drv_info)) 202 priv->htc->credits = 45; 203 else 204 priv->htc->credits = 33; 205 206 ret = htc_init(priv->htc); 207 if (ret) 208 goto err; 209 210 dev_info(priv->dev, "ath9k_htc: HTC initialized with %d credits\n", 211 priv->htc->credits); 212 213 return 0; 214 215 err: 216 dev_err(priv->dev, "ath9k_htc: Unable to initialize HTC services\n"); 217 return ret; 218 } 219 220 static void ath9k_reg_notifier(struct wiphy *wiphy, 221 struct regulatory_request *request) 222 { 223 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy); 224 struct ath9k_htc_priv *priv = hw->priv; 225 226 ath_reg_notifier_apply(wiphy, request, 227 ath9k_hw_regulatory(priv->ah)); 228 } 229 230 static unsigned int ath9k_regread(void *hw_priv, u32 reg_offset) 231 { 232 struct ath_hw *ah = (struct ath_hw *) hw_priv; 233 struct ath_common *common = ath9k_hw_common(ah); 234 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv; 235 __be32 val, reg = cpu_to_be32(reg_offset); 236 int r; 237 238 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_READ_CMDID, 239 (u8 *) ®, sizeof(reg), 240 (u8 *) &val, sizeof(val), 241 100); 242 if (unlikely(r)) { 243 ath_dbg(common, WMI, "REGISTER READ FAILED: (0x%04x, %d)\n", 244 reg_offset, r); 245 return -EIO; 246 } 247 248 return be32_to_cpu(val); 249 } 250 251 static void ath9k_multi_regread(void *hw_priv, u32 *addr, 252 u32 *val, u16 count) 253 { 254 struct ath_hw *ah = (struct ath_hw *) hw_priv; 255 struct ath_common *common = ath9k_hw_common(ah); 256 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv; 257 __be32 tmpaddr[8]; 258 __be32 tmpval[8]; 259 int i, ret; 260 261 for (i = 0; i < count; i++) { 262 tmpaddr[i] = cpu_to_be32(addr[i]); 263 } 264 265 ret = ath9k_wmi_cmd(priv->wmi, WMI_REG_READ_CMDID, 266 (u8 *)tmpaddr , sizeof(u32) * count, 267 (u8 *)tmpval, sizeof(u32) * count, 268 100); 269 if (unlikely(ret)) { 270 ath_dbg(common, WMI, 271 "Multiple REGISTER READ FAILED (count: %d)\n", count); 272 } 273 274 for (i = 0; i < count; i++) { 275 val[i] = be32_to_cpu(tmpval[i]); 276 } 277 } 278 279 static void ath9k_regwrite_multi(struct ath_common *common) 280 { 281 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv; 282 u32 rsp_status; 283 int r; 284 285 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID, 286 (u8 *) &priv->wmi->multi_write, 287 sizeof(struct register_write) * priv->wmi->multi_write_idx, 288 (u8 *) &rsp_status, sizeof(rsp_status), 289 100); 290 if (unlikely(r)) { 291 ath_dbg(common, WMI, 292 "REGISTER WRITE FAILED, multi len: %d\n", 293 priv->wmi->multi_write_idx); 294 } 295 priv->wmi->multi_write_idx = 0; 296 } 297 298 static void ath9k_regwrite_single(void *hw_priv, u32 val, u32 reg_offset) 299 { 300 struct ath_hw *ah = (struct ath_hw *) hw_priv; 301 struct ath_common *common = ath9k_hw_common(ah); 302 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv; 303 const __be32 buf[2] = { 304 cpu_to_be32(reg_offset), 305 cpu_to_be32(val), 306 }; 307 int r; 308 309 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID, 310 (u8 *) &buf, sizeof(buf), 311 (u8 *) &val, sizeof(val), 312 100); 313 if (unlikely(r)) { 314 ath_dbg(common, WMI, "REGISTER WRITE FAILED:(0x%04x, %d)\n", 315 reg_offset, r); 316 } 317 } 318 319 static void ath9k_regwrite_buffer(void *hw_priv, u32 val, u32 reg_offset) 320 { 321 struct ath_hw *ah = (struct ath_hw *) hw_priv; 322 struct ath_common *common = ath9k_hw_common(ah); 323 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv; 324 325 mutex_lock(&priv->wmi->multi_write_mutex); 326 327 /* Store the register/value */ 328 priv->wmi->multi_write[priv->wmi->multi_write_idx].reg = 329 cpu_to_be32(reg_offset); 330 priv->wmi->multi_write[priv->wmi->multi_write_idx].val = 331 cpu_to_be32(val); 332 333 priv->wmi->multi_write_idx++; 334 335 /* If the buffer is full, send it out. */ 336 if (priv->wmi->multi_write_idx == MAX_CMD_NUMBER) 337 ath9k_regwrite_multi(common); 338 339 mutex_unlock(&priv->wmi->multi_write_mutex); 340 } 341 342 static void ath9k_regwrite(void *hw_priv, u32 val, u32 reg_offset) 343 { 344 struct ath_hw *ah = (struct ath_hw *) hw_priv; 345 struct ath_common *common = ath9k_hw_common(ah); 346 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv; 347 348 if (atomic_read(&priv->wmi->mwrite_cnt)) 349 ath9k_regwrite_buffer(hw_priv, val, reg_offset); 350 else 351 ath9k_regwrite_single(hw_priv, val, reg_offset); 352 } 353 354 static void ath9k_enable_regwrite_buffer(void *hw_priv) 355 { 356 struct ath_hw *ah = (struct ath_hw *) hw_priv; 357 struct ath_common *common = ath9k_hw_common(ah); 358 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv; 359 360 atomic_inc(&priv->wmi->mwrite_cnt); 361 } 362 363 static void ath9k_regwrite_flush(void *hw_priv) 364 { 365 struct ath_hw *ah = (struct ath_hw *) hw_priv; 366 struct ath_common *common = ath9k_hw_common(ah); 367 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv; 368 369 atomic_dec(&priv->wmi->mwrite_cnt); 370 371 mutex_lock(&priv->wmi->multi_write_mutex); 372 373 if (priv->wmi->multi_write_idx) 374 ath9k_regwrite_multi(common); 375 376 mutex_unlock(&priv->wmi->multi_write_mutex); 377 } 378 379 static void ath9k_reg_rmw_buffer(void *hw_priv, 380 u32 reg_offset, u32 set, u32 clr) 381 { 382 struct ath_hw *ah = (struct ath_hw *) hw_priv; 383 struct ath_common *common = ath9k_hw_common(ah); 384 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv; 385 u32 rsp_status; 386 int r; 387 388 mutex_lock(&priv->wmi->multi_rmw_mutex); 389 390 /* Store the register/value */ 391 priv->wmi->multi_rmw[priv->wmi->multi_rmw_idx].reg = 392 cpu_to_be32(reg_offset); 393 priv->wmi->multi_rmw[priv->wmi->multi_rmw_idx].set = 394 cpu_to_be32(set); 395 priv->wmi->multi_rmw[priv->wmi->multi_rmw_idx].clr = 396 cpu_to_be32(clr); 397 398 priv->wmi->multi_rmw_idx++; 399 400 /* If the buffer is full, send it out. */ 401 if (priv->wmi->multi_rmw_idx == MAX_RMW_CMD_NUMBER) { 402 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_RMW_CMDID, 403 (u8 *) &priv->wmi->multi_rmw, 404 sizeof(struct register_write) * priv->wmi->multi_rmw_idx, 405 (u8 *) &rsp_status, sizeof(rsp_status), 406 100); 407 if (unlikely(r)) { 408 ath_dbg(common, WMI, 409 "REGISTER RMW FAILED, multi len: %d\n", 410 priv->wmi->multi_rmw_idx); 411 } 412 priv->wmi->multi_rmw_idx = 0; 413 } 414 415 mutex_unlock(&priv->wmi->multi_rmw_mutex); 416 } 417 418 static void ath9k_reg_rmw_flush(void *hw_priv) 419 { 420 struct ath_hw *ah = (struct ath_hw *) hw_priv; 421 struct ath_common *common = ath9k_hw_common(ah); 422 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv; 423 u32 rsp_status; 424 int r; 425 426 if (test_bit(HTC_FWFLAG_NO_RMW, &priv->fw_flags)) 427 return; 428 429 atomic_dec(&priv->wmi->m_rmw_cnt); 430 431 mutex_lock(&priv->wmi->multi_rmw_mutex); 432 433 if (priv->wmi->multi_rmw_idx) { 434 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_RMW_CMDID, 435 (u8 *) &priv->wmi->multi_rmw, 436 sizeof(struct register_rmw) * priv->wmi->multi_rmw_idx, 437 (u8 *) &rsp_status, sizeof(rsp_status), 438 100); 439 if (unlikely(r)) { 440 ath_dbg(common, WMI, 441 "REGISTER RMW FAILED, multi len: %d\n", 442 priv->wmi->multi_rmw_idx); 443 } 444 priv->wmi->multi_rmw_idx = 0; 445 } 446 447 mutex_unlock(&priv->wmi->multi_rmw_mutex); 448 } 449 450 static void ath9k_enable_rmw_buffer(void *hw_priv) 451 { 452 struct ath_hw *ah = (struct ath_hw *) hw_priv; 453 struct ath_common *common = ath9k_hw_common(ah); 454 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv; 455 456 if (test_bit(HTC_FWFLAG_NO_RMW, &priv->fw_flags)) 457 return; 458 459 atomic_inc(&priv->wmi->m_rmw_cnt); 460 } 461 462 static u32 ath9k_reg_rmw_single(void *hw_priv, 463 u32 reg_offset, u32 set, u32 clr) 464 { 465 struct ath_hw *ah = (struct ath_hw *) hw_priv; 466 struct ath_common *common = ath9k_hw_common(ah); 467 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv; 468 struct register_rmw buf, buf_ret; 469 int ret; 470 u32 val = 0; 471 472 buf.reg = cpu_to_be32(reg_offset); 473 buf.set = cpu_to_be32(set); 474 buf.clr = cpu_to_be32(clr); 475 476 ret = ath9k_wmi_cmd(priv->wmi, WMI_REG_RMW_CMDID, 477 (u8 *) &buf, sizeof(buf), 478 (u8 *) &buf_ret, sizeof(buf_ret), 479 100); 480 if (unlikely(ret)) { 481 ath_dbg(common, WMI, "REGISTER RMW FAILED:(0x%04x, %d)\n", 482 reg_offset, ret); 483 } 484 return val; 485 } 486 487 static u32 ath9k_reg_rmw(void *hw_priv, u32 reg_offset, u32 set, u32 clr) 488 { 489 struct ath_hw *ah = (struct ath_hw *) hw_priv; 490 struct ath_common *common = ath9k_hw_common(ah); 491 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv; 492 493 if (test_bit(HTC_FWFLAG_NO_RMW, &priv->fw_flags)) { 494 u32 val; 495 496 val = REG_READ(ah, reg_offset); 497 val &= ~clr; 498 val |= set; 499 REG_WRITE(ah, reg_offset, val); 500 501 return 0; 502 } 503 504 if (atomic_read(&priv->wmi->m_rmw_cnt)) 505 ath9k_reg_rmw_buffer(hw_priv, reg_offset, set, clr); 506 else 507 ath9k_reg_rmw_single(hw_priv, reg_offset, set, clr); 508 509 return 0; 510 } 511 512 static void ath_usb_read_cachesize(struct ath_common *common, int *csz) 513 { 514 *csz = L1_CACHE_BYTES >> 2; 515 } 516 517 static bool ath_usb_eeprom_read(struct ath_common *common, u32 off, u16 *data) 518 { 519 struct ath_hw *ah = (struct ath_hw *) common->ah; 520 521 (void)REG_READ(ah, AR5416_EEPROM_OFFSET + (off << AR5416_EEPROM_S)); 522 523 if (!ath9k_hw_wait(ah, 524 AR_EEPROM_STATUS_DATA, 525 AR_EEPROM_STATUS_DATA_BUSY | 526 AR_EEPROM_STATUS_DATA_PROT_ACCESS, 0, 527 AH_WAIT_TIMEOUT)) 528 return false; 529 530 *data = MS(REG_READ(ah, AR_EEPROM_STATUS_DATA), 531 AR_EEPROM_STATUS_DATA_VAL); 532 533 return true; 534 } 535 536 static const struct ath_bus_ops ath9k_usb_bus_ops = { 537 .ath_bus_type = ATH_USB, 538 .read_cachesize = ath_usb_read_cachesize, 539 .eeprom_read = ath_usb_eeprom_read, 540 }; 541 542 static int ath9k_init_queues(struct ath9k_htc_priv *priv) 543 { 544 struct ath_common *common = ath9k_hw_common(priv->ah); 545 int i; 546 547 for (i = 0; i < ARRAY_SIZE(priv->hwq_map); i++) 548 priv->hwq_map[i] = -1; 549 550 priv->beacon.beaconq = ath9k_hw_beaconq_setup(priv->ah); 551 if (priv->beacon.beaconq == -1) { 552 ath_err(common, "Unable to setup BEACON xmit queue\n"); 553 goto err; 554 } 555 556 priv->cabq = ath9k_htc_cabq_setup(priv); 557 if (priv->cabq == -1) { 558 ath_err(common, "Unable to setup CAB xmit queue\n"); 559 goto err; 560 } 561 562 if (!ath9k_htc_txq_setup(priv, IEEE80211_AC_BE)) { 563 ath_err(common, "Unable to setup xmit queue for BE traffic\n"); 564 goto err; 565 } 566 567 if (!ath9k_htc_txq_setup(priv, IEEE80211_AC_BK)) { 568 ath_err(common, "Unable to setup xmit queue for BK traffic\n"); 569 goto err; 570 } 571 if (!ath9k_htc_txq_setup(priv, IEEE80211_AC_VI)) { 572 ath_err(common, "Unable to setup xmit queue for VI traffic\n"); 573 goto err; 574 } 575 if (!ath9k_htc_txq_setup(priv, IEEE80211_AC_VO)) { 576 ath_err(common, "Unable to setup xmit queue for VO traffic\n"); 577 goto err; 578 } 579 580 return 0; 581 582 err: 583 return -EINVAL; 584 } 585 586 static void ath9k_init_misc(struct ath9k_htc_priv *priv) 587 { 588 struct ath_common *common = ath9k_hw_common(priv->ah); 589 590 memcpy(common->bssidmask, ath_bcast_mac, ETH_ALEN); 591 592 common->last_rssi = ATH_RSSI_DUMMY_MARKER; 593 priv->ah->opmode = NL80211_IFTYPE_STATION; 594 595 priv->spec_priv.ah = priv->ah; 596 priv->spec_priv.spec_config.enabled = 0; 597 priv->spec_priv.spec_config.short_repeat = true; 598 priv->spec_priv.spec_config.count = 8; 599 priv->spec_priv.spec_config.endless = false; 600 priv->spec_priv.spec_config.period = 0x12; 601 priv->spec_priv.spec_config.fft_period = 0x02; 602 } 603 604 static int ath9k_init_priv(struct ath9k_htc_priv *priv, 605 u16 devid, char *product, 606 u32 drv_info) 607 { 608 struct ath_hw *ah = NULL; 609 struct ath_common *common; 610 int i, ret = 0, csz = 0; 611 612 ah = kzalloc(sizeof(struct ath_hw), GFP_KERNEL); 613 if (!ah) 614 return -ENOMEM; 615 616 ah->dev = priv->dev; 617 ah->hw = priv->hw; 618 ah->hw_version.devid = devid; 619 ah->hw_version.usbdev = drv_info; 620 ah->ah_flags |= AH_USE_EEPROM; 621 ah->reg_ops.read = ath9k_regread; 622 ah->reg_ops.multi_read = ath9k_multi_regread; 623 ah->reg_ops.write = ath9k_regwrite; 624 ah->reg_ops.enable_write_buffer = ath9k_enable_regwrite_buffer; 625 ah->reg_ops.write_flush = ath9k_regwrite_flush; 626 ah->reg_ops.enable_rmw_buffer = ath9k_enable_rmw_buffer; 627 ah->reg_ops.rmw_flush = ath9k_reg_rmw_flush; 628 ah->reg_ops.rmw = ath9k_reg_rmw; 629 priv->ah = ah; 630 631 common = ath9k_hw_common(ah); 632 common->ops = &ah->reg_ops; 633 common->ps_ops = &ath9k_htc_ps_ops; 634 common->bus_ops = &ath9k_usb_bus_ops; 635 common->ah = ah; 636 common->hw = priv->hw; 637 common->priv = priv; 638 common->debug_mask = ath9k_debug; 639 common->btcoex_enabled = ath9k_htc_btcoex_enable == 1; 640 set_bit(ATH_OP_INVALID, &common->op_flags); 641 642 spin_lock_init(&priv->beacon_lock); 643 spin_lock_init(&priv->tx.tx_lock); 644 mutex_init(&priv->mutex); 645 mutex_init(&priv->htc_pm_lock); 646 tasklet_init(&priv->rx_tasklet, ath9k_rx_tasklet, 647 (unsigned long)priv); 648 tasklet_init(&priv->tx_failed_tasklet, ath9k_tx_failed_tasklet, 649 (unsigned long)priv); 650 INIT_DELAYED_WORK(&priv->ani_work, ath9k_htc_ani_work); 651 INIT_WORK(&priv->ps_work, ath9k_ps_work); 652 INIT_WORK(&priv->fatal_work, ath9k_fatal_work); 653 setup_timer(&priv->tx.cleanup_timer, ath9k_htc_tx_cleanup_timer, 654 (unsigned long)priv); 655 656 /* 657 * Cache line size is used to size and align various 658 * structures used to communicate with the hardware. 659 */ 660 ath_read_cachesize(common, &csz); 661 common->cachelsz = csz << 2; /* convert to bytes */ 662 663 ret = ath9k_hw_init(ah); 664 if (ret) { 665 ath_err(common, 666 "Unable to initialize hardware; initialization status: %d\n", 667 ret); 668 goto err_hw; 669 } 670 671 ret = ath9k_init_queues(priv); 672 if (ret) 673 goto err_queues; 674 675 for (i = 0; i < ATH9K_HTC_MAX_BCN_VIF; i++) 676 priv->beacon.bslot[i] = NULL; 677 priv->beacon.slottime = ATH9K_SLOT_TIME_9; 678 679 ath9k_cmn_init_channels_rates(common); 680 ath9k_cmn_init_crypto(ah); 681 ath9k_init_misc(priv); 682 ath9k_htc_init_btcoex(priv, product); 683 684 return 0; 685 686 err_queues: 687 ath9k_hw_deinit(ah); 688 err_hw: 689 690 kfree(ah); 691 priv->ah = NULL; 692 693 return ret; 694 } 695 696 static const struct ieee80211_iface_limit if_limits[] = { 697 { .max = 2, .types = BIT(NL80211_IFTYPE_STATION) | 698 BIT(NL80211_IFTYPE_P2P_CLIENT) }, 699 { .max = 2, .types = BIT(NL80211_IFTYPE_AP) | 700 #ifdef CONFIG_MAC80211_MESH 701 BIT(NL80211_IFTYPE_MESH_POINT) | 702 #endif 703 BIT(NL80211_IFTYPE_P2P_GO) }, 704 }; 705 706 static const struct ieee80211_iface_combination if_comb = { 707 .limits = if_limits, 708 .n_limits = ARRAY_SIZE(if_limits), 709 .max_interfaces = 2, 710 .num_different_channels = 1, 711 }; 712 713 static void ath9k_set_hw_capab(struct ath9k_htc_priv *priv, 714 struct ieee80211_hw *hw) 715 { 716 struct ath_hw *ah = priv->ah; 717 struct ath_common *common = ath9k_hw_common(priv->ah); 718 struct base_eep_header *pBase; 719 720 ieee80211_hw_set(hw, HOST_BROADCAST_PS_BUFFERING); 721 ieee80211_hw_set(hw, MFP_CAPABLE); 722 ieee80211_hw_set(hw, REPORTS_TX_ACK_STATUS); 723 ieee80211_hw_set(hw, PS_NULLFUNC_STACK); 724 ieee80211_hw_set(hw, RX_INCLUDES_FCS); 725 ieee80211_hw_set(hw, HAS_RATE_CONTROL); 726 ieee80211_hw_set(hw, SPECTRUM_MGMT); 727 ieee80211_hw_set(hw, SIGNAL_DBM); 728 ieee80211_hw_set(hw, AMPDU_AGGREGATION); 729 730 if (ath9k_ps_enable) 731 ieee80211_hw_set(hw, SUPPORTS_PS); 732 733 hw->wiphy->interface_modes = 734 BIT(NL80211_IFTYPE_STATION) | 735 BIT(NL80211_IFTYPE_ADHOC) | 736 BIT(NL80211_IFTYPE_AP) | 737 BIT(NL80211_IFTYPE_P2P_GO) | 738 BIT(NL80211_IFTYPE_P2P_CLIENT) | 739 BIT(NL80211_IFTYPE_MESH_POINT); 740 741 hw->wiphy->iface_combinations = &if_comb; 742 hw->wiphy->n_iface_combinations = 1; 743 744 hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT; 745 746 hw->wiphy->flags |= WIPHY_FLAG_IBSS_RSN | 747 WIPHY_FLAG_HAS_REMAIN_ON_CHANNEL | 748 WIPHY_FLAG_HAS_CHANNEL_SWITCH; 749 750 hw->wiphy->flags |= WIPHY_FLAG_SUPPORTS_TDLS; 751 752 hw->queues = 4; 753 hw->max_listen_interval = 1; 754 755 hw->vif_data_size = sizeof(struct ath9k_htc_vif); 756 hw->sta_data_size = sizeof(struct ath9k_htc_sta); 757 758 /* tx_frame_hdr is larger than tx_mgmt_hdr anyway */ 759 hw->extra_tx_headroom = sizeof(struct tx_frame_hdr) + 760 sizeof(struct htc_frame_hdr) + 4; 761 762 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ) 763 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = 764 &common->sbands[IEEE80211_BAND_2GHZ]; 765 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ) 766 hw->wiphy->bands[IEEE80211_BAND_5GHZ] = 767 &common->sbands[IEEE80211_BAND_5GHZ]; 768 769 ath9k_cmn_reload_chainmask(ah); 770 771 pBase = ath9k_htc_get_eeprom_base(priv); 772 if (pBase) { 773 hw->wiphy->available_antennas_rx = pBase->rxMask; 774 hw->wiphy->available_antennas_tx = pBase->txMask; 775 } 776 777 SET_IEEE80211_PERM_ADDR(hw, common->macaddr); 778 } 779 780 static int ath9k_init_firmware_version(struct ath9k_htc_priv *priv) 781 { 782 struct ieee80211_hw *hw = priv->hw; 783 struct wmi_fw_version cmd_rsp; 784 int ret; 785 786 memset(&cmd_rsp, 0, sizeof(cmd_rsp)); 787 788 WMI_CMD(WMI_GET_FW_VERSION); 789 if (ret) 790 return -EINVAL; 791 792 priv->fw_version_major = be16_to_cpu(cmd_rsp.major); 793 priv->fw_version_minor = be16_to_cpu(cmd_rsp.minor); 794 795 snprintf(hw->wiphy->fw_version, sizeof(hw->wiphy->fw_version), "%d.%d", 796 priv->fw_version_major, 797 priv->fw_version_minor); 798 799 dev_info(priv->dev, "ath9k_htc: FW Version: %d.%d\n", 800 priv->fw_version_major, 801 priv->fw_version_minor); 802 803 /* 804 * Check if the available FW matches the driver's 805 * required version. 806 */ 807 if (priv->fw_version_major != MAJOR_VERSION_REQ || 808 priv->fw_version_minor < MINOR_VERSION_REQ) { 809 dev_err(priv->dev, "ath9k_htc: Please upgrade to FW version %d.%d\n", 810 MAJOR_VERSION_REQ, MINOR_VERSION_REQ); 811 return -EINVAL; 812 } 813 814 if (priv->fw_version_major == 1 && priv->fw_version_minor < 4) 815 set_bit(HTC_FWFLAG_NO_RMW, &priv->fw_flags); 816 817 dev_info(priv->dev, "FW RMW support: %s\n", 818 test_bit(HTC_FWFLAG_NO_RMW, &priv->fw_flags) ? "Off" : "On"); 819 820 return 0; 821 } 822 823 static int ath9k_init_device(struct ath9k_htc_priv *priv, 824 u16 devid, char *product, u32 drv_info) 825 { 826 struct ieee80211_hw *hw = priv->hw; 827 struct ath_common *common; 828 struct ath_hw *ah; 829 int error = 0; 830 struct ath_regulatory *reg; 831 char hw_name[64]; 832 833 /* Bring up device */ 834 error = ath9k_init_priv(priv, devid, product, drv_info); 835 if (error != 0) 836 goto err_init; 837 838 ah = priv->ah; 839 common = ath9k_hw_common(ah); 840 ath9k_set_hw_capab(priv, hw); 841 842 error = ath9k_init_firmware_version(priv); 843 if (error != 0) 844 goto err_fw; 845 846 /* Initialize regulatory */ 847 error = ath_regd_init(&common->regulatory, priv->hw->wiphy, 848 ath9k_reg_notifier); 849 if (error) 850 goto err_regd; 851 852 reg = &common->regulatory; 853 854 /* Setup TX */ 855 error = ath9k_tx_init(priv); 856 if (error != 0) 857 goto err_tx; 858 859 /* Setup RX */ 860 error = ath9k_rx_init(priv); 861 if (error != 0) 862 goto err_rx; 863 864 ath9k_hw_disable(priv->ah); 865 #ifdef CONFIG_MAC80211_LEDS 866 /* must be initialized before ieee80211_register_hw */ 867 priv->led_cdev.default_trigger = ieee80211_create_tpt_led_trigger(priv->hw, 868 IEEE80211_TPT_LEDTRIG_FL_RADIO, ath9k_htc_tpt_blink, 869 ARRAY_SIZE(ath9k_htc_tpt_blink)); 870 #endif 871 872 /* Register with mac80211 */ 873 error = ieee80211_register_hw(hw); 874 if (error) 875 goto err_register; 876 877 /* Handle world regulatory */ 878 if (!ath_is_world_regd(reg)) { 879 error = regulatory_hint(hw->wiphy, reg->alpha2); 880 if (error) 881 goto err_world; 882 } 883 884 error = ath9k_htc_init_debug(priv->ah); 885 if (error) { 886 ath_err(common, "Unable to create debugfs files\n"); 887 goto err_world; 888 } 889 890 ath_dbg(common, CONFIG, 891 "WMI:%d, BCN:%d, CAB:%d, UAPSD:%d, MGMT:%d, BE:%d, BK:%d, VI:%d, VO:%d\n", 892 priv->wmi_cmd_ep, 893 priv->beacon_ep, 894 priv->cab_ep, 895 priv->uapsd_ep, 896 priv->mgmt_ep, 897 priv->data_be_ep, 898 priv->data_bk_ep, 899 priv->data_vi_ep, 900 priv->data_vo_ep); 901 902 ath9k_hw_name(priv->ah, hw_name, sizeof(hw_name)); 903 wiphy_info(hw->wiphy, "%s\n", hw_name); 904 905 ath9k_init_leds(priv); 906 ath9k_start_rfkill_poll(priv); 907 908 return 0; 909 910 err_world: 911 ieee80211_unregister_hw(hw); 912 err_register: 913 ath9k_rx_cleanup(priv); 914 err_rx: 915 ath9k_tx_cleanup(priv); 916 err_tx: 917 /* Nothing */ 918 err_regd: 919 /* Nothing */ 920 err_fw: 921 ath9k_deinit_priv(priv); 922 err_init: 923 return error; 924 } 925 926 int ath9k_htc_probe_device(struct htc_target *htc_handle, struct device *dev, 927 u16 devid, char *product, u32 drv_info) 928 { 929 struct ieee80211_hw *hw; 930 struct ath9k_htc_priv *priv; 931 int ret; 932 933 hw = ieee80211_alloc_hw(sizeof(struct ath9k_htc_priv), &ath9k_htc_ops); 934 if (!hw) 935 return -ENOMEM; 936 937 priv = hw->priv; 938 priv->hw = hw; 939 priv->htc = htc_handle; 940 priv->dev = dev; 941 htc_handle->drv_priv = priv; 942 SET_IEEE80211_DEV(hw, priv->dev); 943 944 ret = ath9k_htc_wait_for_target(priv); 945 if (ret) 946 goto err_free; 947 948 priv->wmi = ath9k_init_wmi(priv); 949 if (!priv->wmi) { 950 ret = -EINVAL; 951 goto err_free; 952 } 953 954 ret = ath9k_init_htc_services(priv, devid, drv_info); 955 if (ret) 956 goto err_init; 957 958 ret = ath9k_init_device(priv, devid, product, drv_info); 959 if (ret) 960 goto err_init; 961 962 return 0; 963 964 err_init: 965 ath9k_deinit_wmi(priv); 966 err_free: 967 ieee80211_free_hw(hw); 968 return ret; 969 } 970 971 void ath9k_htc_disconnect_device(struct htc_target *htc_handle, bool hotunplug) 972 { 973 if (htc_handle->drv_priv) { 974 975 /* Check if the device has been yanked out. */ 976 if (hotunplug) 977 htc_handle->drv_priv->ah->ah_flags |= AH_UNPLUGGED; 978 979 ath9k_deinit_device(htc_handle->drv_priv); 980 ath9k_deinit_wmi(htc_handle->drv_priv); 981 ieee80211_free_hw(htc_handle->drv_priv->hw); 982 } 983 } 984 985 #ifdef CONFIG_PM 986 987 void ath9k_htc_suspend(struct htc_target *htc_handle) 988 { 989 ath9k_htc_setpower(htc_handle->drv_priv, ATH9K_PM_FULL_SLEEP); 990 } 991 992 int ath9k_htc_resume(struct htc_target *htc_handle) 993 { 994 struct ath9k_htc_priv *priv = htc_handle->drv_priv; 995 int ret; 996 997 ret = ath9k_htc_wait_for_target(priv); 998 if (ret) 999 return ret; 1000 1001 ret = ath9k_init_htc_services(priv, priv->ah->hw_version.devid, 1002 priv->ah->hw_version.usbdev); 1003 ath9k_configure_leds(priv); 1004 1005 return ret; 1006 } 1007 #endif 1008 1009 static int __init ath9k_htc_init(void) 1010 { 1011 if (ath9k_hif_usb_init() < 0) { 1012 pr_err("No USB devices found, driver not installed\n"); 1013 return -ENODEV; 1014 } 1015 1016 return 0; 1017 } 1018 module_init(ath9k_htc_init); 1019 1020 static void __exit ath9k_htc_exit(void) 1021 { 1022 ath9k_hif_usb_exit(); 1023 pr_info("Driver unloaded\n"); 1024 } 1025 module_exit(ath9k_htc_exit); 1026