1 /* 2 * Copyright (c) 2010-2011 Atheros Communications Inc. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 18 19 #include "htc.h" 20 21 MODULE_AUTHOR("Atheros Communications"); 22 MODULE_LICENSE("Dual BSD/GPL"); 23 MODULE_DESCRIPTION("Atheros driver 802.11n HTC based wireless devices"); 24 25 static unsigned int ath9k_debug = ATH_DBG_DEFAULT; 26 module_param_named(debug, ath9k_debug, uint, 0); 27 MODULE_PARM_DESC(debug, "Debugging mask"); 28 29 int htc_modparam_nohwcrypt; 30 module_param_named(nohwcrypt, htc_modparam_nohwcrypt, int, 0444); 31 MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption"); 32 33 static int ath9k_htc_btcoex_enable; 34 module_param_named(btcoex_enable, ath9k_htc_btcoex_enable, int, 0444); 35 MODULE_PARM_DESC(btcoex_enable, "Enable wifi-BT coexistence"); 36 37 #define CHAN2G(_freq, _idx) { \ 38 .center_freq = (_freq), \ 39 .hw_value = (_idx), \ 40 .max_power = 20, \ 41 } 42 43 #define CHAN5G(_freq, _idx) { \ 44 .band = IEEE80211_BAND_5GHZ, \ 45 .center_freq = (_freq), \ 46 .hw_value = (_idx), \ 47 .max_power = 20, \ 48 } 49 50 static struct ieee80211_channel ath9k_2ghz_channels[] = { 51 CHAN2G(2412, 0), /* Channel 1 */ 52 CHAN2G(2417, 1), /* Channel 2 */ 53 CHAN2G(2422, 2), /* Channel 3 */ 54 CHAN2G(2427, 3), /* Channel 4 */ 55 CHAN2G(2432, 4), /* Channel 5 */ 56 CHAN2G(2437, 5), /* Channel 6 */ 57 CHAN2G(2442, 6), /* Channel 7 */ 58 CHAN2G(2447, 7), /* Channel 8 */ 59 CHAN2G(2452, 8), /* Channel 9 */ 60 CHAN2G(2457, 9), /* Channel 10 */ 61 CHAN2G(2462, 10), /* Channel 11 */ 62 CHAN2G(2467, 11), /* Channel 12 */ 63 CHAN2G(2472, 12), /* Channel 13 */ 64 CHAN2G(2484, 13), /* Channel 14 */ 65 }; 66 67 static struct ieee80211_channel ath9k_5ghz_channels[] = { 68 /* _We_ call this UNII 1 */ 69 CHAN5G(5180, 14), /* Channel 36 */ 70 CHAN5G(5200, 15), /* Channel 40 */ 71 CHAN5G(5220, 16), /* Channel 44 */ 72 CHAN5G(5240, 17), /* Channel 48 */ 73 /* _We_ call this UNII 2 */ 74 CHAN5G(5260, 18), /* Channel 52 */ 75 CHAN5G(5280, 19), /* Channel 56 */ 76 CHAN5G(5300, 20), /* Channel 60 */ 77 CHAN5G(5320, 21), /* Channel 64 */ 78 /* _We_ call this "Middle band" */ 79 CHAN5G(5500, 22), /* Channel 100 */ 80 CHAN5G(5520, 23), /* Channel 104 */ 81 CHAN5G(5540, 24), /* Channel 108 */ 82 CHAN5G(5560, 25), /* Channel 112 */ 83 CHAN5G(5580, 26), /* Channel 116 */ 84 CHAN5G(5600, 27), /* Channel 120 */ 85 CHAN5G(5620, 28), /* Channel 124 */ 86 CHAN5G(5640, 29), /* Channel 128 */ 87 CHAN5G(5660, 30), /* Channel 132 */ 88 CHAN5G(5680, 31), /* Channel 136 */ 89 CHAN5G(5700, 32), /* Channel 140 */ 90 /* _We_ call this UNII 3 */ 91 CHAN5G(5745, 33), /* Channel 149 */ 92 CHAN5G(5765, 34), /* Channel 153 */ 93 CHAN5G(5785, 35), /* Channel 157 */ 94 CHAN5G(5805, 36), /* Channel 161 */ 95 CHAN5G(5825, 37), /* Channel 165 */ 96 }; 97 98 /* Atheros hardware rate code addition for short premble */ 99 #define SHPCHECK(__hw_rate, __flags) \ 100 ((__flags & IEEE80211_RATE_SHORT_PREAMBLE) ? (__hw_rate | 0x04) : 0) 101 102 #define RATE(_bitrate, _hw_rate, _flags) { \ 103 .bitrate = (_bitrate), \ 104 .flags = (_flags), \ 105 .hw_value = (_hw_rate), \ 106 .hw_value_short = (SHPCHECK(_hw_rate, _flags)) \ 107 } 108 109 static struct ieee80211_rate ath9k_legacy_rates[] = { 110 RATE(10, 0x1b, 0), 111 RATE(20, 0x1a, IEEE80211_RATE_SHORT_PREAMBLE), /* shortp : 0x1e */ 112 RATE(55, 0x19, IEEE80211_RATE_SHORT_PREAMBLE), /* shortp: 0x1d */ 113 RATE(110, 0x18, IEEE80211_RATE_SHORT_PREAMBLE), /* short: 0x1c */ 114 RATE(60, 0x0b, 0), 115 RATE(90, 0x0f, 0), 116 RATE(120, 0x0a, 0), 117 RATE(180, 0x0e, 0), 118 RATE(240, 0x09, 0), 119 RATE(360, 0x0d, 0), 120 RATE(480, 0x08, 0), 121 RATE(540, 0x0c, 0), 122 }; 123 124 #ifdef CONFIG_MAC80211_LEDS 125 static const struct ieee80211_tpt_blink ath9k_htc_tpt_blink[] = { 126 { .throughput = 0 * 1024, .blink_time = 334 }, 127 { .throughput = 1 * 1024, .blink_time = 260 }, 128 { .throughput = 5 * 1024, .blink_time = 220 }, 129 { .throughput = 10 * 1024, .blink_time = 190 }, 130 { .throughput = 20 * 1024, .blink_time = 170 }, 131 { .throughput = 50 * 1024, .blink_time = 150 }, 132 { .throughput = 70 * 1024, .blink_time = 130 }, 133 { .throughput = 100 * 1024, .blink_time = 110 }, 134 { .throughput = 200 * 1024, .blink_time = 80 }, 135 { .throughput = 300 * 1024, .blink_time = 50 }, 136 }; 137 #endif 138 139 static int ath9k_htc_wait_for_target(struct ath9k_htc_priv *priv) 140 { 141 int time_left; 142 143 if (atomic_read(&priv->htc->tgt_ready) > 0) { 144 atomic_dec(&priv->htc->tgt_ready); 145 return 0; 146 } 147 148 /* Firmware can take up to 50ms to get ready, to be safe use 1 second */ 149 time_left = wait_for_completion_timeout(&priv->htc->target_wait, HZ); 150 if (!time_left) { 151 dev_err(priv->dev, "ath9k_htc: Target is unresponsive\n"); 152 return -ETIMEDOUT; 153 } 154 155 atomic_dec(&priv->htc->tgt_ready); 156 157 return 0; 158 } 159 160 static void ath9k_deinit_priv(struct ath9k_htc_priv *priv) 161 { 162 ath9k_hw_deinit(priv->ah); 163 kfree(priv->ah); 164 priv->ah = NULL; 165 } 166 167 static void ath9k_deinit_device(struct ath9k_htc_priv *priv) 168 { 169 struct ieee80211_hw *hw = priv->hw; 170 171 wiphy_rfkill_stop_polling(hw->wiphy); 172 ath9k_deinit_leds(priv); 173 ieee80211_unregister_hw(hw); 174 ath9k_rx_cleanup(priv); 175 ath9k_tx_cleanup(priv); 176 ath9k_deinit_priv(priv); 177 } 178 179 static inline int ath9k_htc_connect_svc(struct ath9k_htc_priv *priv, 180 u16 service_id, 181 void (*tx) (void *, 182 struct sk_buff *, 183 enum htc_endpoint_id, 184 bool txok), 185 enum htc_endpoint_id *ep_id) 186 { 187 struct htc_service_connreq req; 188 189 memset(&req, 0, sizeof(struct htc_service_connreq)); 190 191 req.service_id = service_id; 192 req.ep_callbacks.priv = priv; 193 req.ep_callbacks.rx = ath9k_htc_rxep; 194 req.ep_callbacks.tx = tx; 195 196 return htc_connect_service(priv->htc, &req, ep_id); 197 } 198 199 static int ath9k_init_htc_services(struct ath9k_htc_priv *priv, u16 devid, 200 u32 drv_info) 201 { 202 int ret; 203 204 /* WMI CMD*/ 205 ret = ath9k_wmi_connect(priv->htc, priv->wmi, &priv->wmi_cmd_ep); 206 if (ret) 207 goto err; 208 209 /* Beacon */ 210 ret = ath9k_htc_connect_svc(priv, WMI_BEACON_SVC, ath9k_htc_beaconep, 211 &priv->beacon_ep); 212 if (ret) 213 goto err; 214 215 /* CAB */ 216 ret = ath9k_htc_connect_svc(priv, WMI_CAB_SVC, ath9k_htc_txep, 217 &priv->cab_ep); 218 if (ret) 219 goto err; 220 221 222 /* UAPSD */ 223 ret = ath9k_htc_connect_svc(priv, WMI_UAPSD_SVC, ath9k_htc_txep, 224 &priv->uapsd_ep); 225 if (ret) 226 goto err; 227 228 /* MGMT */ 229 ret = ath9k_htc_connect_svc(priv, WMI_MGMT_SVC, ath9k_htc_txep, 230 &priv->mgmt_ep); 231 if (ret) 232 goto err; 233 234 /* DATA BE */ 235 ret = ath9k_htc_connect_svc(priv, WMI_DATA_BE_SVC, ath9k_htc_txep, 236 &priv->data_be_ep); 237 if (ret) 238 goto err; 239 240 /* DATA BK */ 241 ret = ath9k_htc_connect_svc(priv, WMI_DATA_BK_SVC, ath9k_htc_txep, 242 &priv->data_bk_ep); 243 if (ret) 244 goto err; 245 246 /* DATA VI */ 247 ret = ath9k_htc_connect_svc(priv, WMI_DATA_VI_SVC, ath9k_htc_txep, 248 &priv->data_vi_ep); 249 if (ret) 250 goto err; 251 252 /* DATA VO */ 253 ret = ath9k_htc_connect_svc(priv, WMI_DATA_VO_SVC, ath9k_htc_txep, 254 &priv->data_vo_ep); 255 if (ret) 256 goto err; 257 258 /* 259 * Setup required credits before initializing HTC. 260 * This is a bit hacky, but, since queuing is done in 261 * the HIF layer, shouldn't matter much. 262 */ 263 264 if (IS_AR7010_DEVICE(drv_info)) 265 priv->htc->credits = 45; 266 else 267 priv->htc->credits = 33; 268 269 ret = htc_init(priv->htc); 270 if (ret) 271 goto err; 272 273 dev_info(priv->dev, "ath9k_htc: HTC initialized with %d credits\n", 274 priv->htc->credits); 275 276 return 0; 277 278 err: 279 dev_err(priv->dev, "ath9k_htc: Unable to initialize HTC services\n"); 280 return ret; 281 } 282 283 static int ath9k_reg_notifier(struct wiphy *wiphy, 284 struct regulatory_request *request) 285 { 286 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy); 287 struct ath9k_htc_priv *priv = hw->priv; 288 289 return ath_reg_notifier_apply(wiphy, request, 290 ath9k_hw_regulatory(priv->ah)); 291 } 292 293 static unsigned int ath9k_regread(void *hw_priv, u32 reg_offset) 294 { 295 struct ath_hw *ah = (struct ath_hw *) hw_priv; 296 struct ath_common *common = ath9k_hw_common(ah); 297 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv; 298 __be32 val, reg = cpu_to_be32(reg_offset); 299 int r; 300 301 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_READ_CMDID, 302 (u8 *) ®, sizeof(reg), 303 (u8 *) &val, sizeof(val), 304 100); 305 if (unlikely(r)) { 306 ath_dbg(common, WMI, "REGISTER READ FAILED: (0x%04x, %d)\n", 307 reg_offset, r); 308 return -EIO; 309 } 310 311 return be32_to_cpu(val); 312 } 313 314 static void ath9k_multi_regread(void *hw_priv, u32 *addr, 315 u32 *val, u16 count) 316 { 317 struct ath_hw *ah = (struct ath_hw *) hw_priv; 318 struct ath_common *common = ath9k_hw_common(ah); 319 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv; 320 __be32 tmpaddr[8]; 321 __be32 tmpval[8]; 322 int i, ret; 323 324 for (i = 0; i < count; i++) { 325 tmpaddr[i] = cpu_to_be32(addr[i]); 326 } 327 328 ret = ath9k_wmi_cmd(priv->wmi, WMI_REG_READ_CMDID, 329 (u8 *)tmpaddr , sizeof(u32) * count, 330 (u8 *)tmpval, sizeof(u32) * count, 331 100); 332 if (unlikely(ret)) { 333 ath_dbg(common, WMI, 334 "Multiple REGISTER READ FAILED (count: %d)\n", count); 335 } 336 337 for (i = 0; i < count; i++) { 338 val[i] = be32_to_cpu(tmpval[i]); 339 } 340 } 341 342 static void ath9k_regwrite_single(void *hw_priv, u32 val, u32 reg_offset) 343 { 344 struct ath_hw *ah = (struct ath_hw *) hw_priv; 345 struct ath_common *common = ath9k_hw_common(ah); 346 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv; 347 const __be32 buf[2] = { 348 cpu_to_be32(reg_offset), 349 cpu_to_be32(val), 350 }; 351 int r; 352 353 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID, 354 (u8 *) &buf, sizeof(buf), 355 (u8 *) &val, sizeof(val), 356 100); 357 if (unlikely(r)) { 358 ath_dbg(common, WMI, "REGISTER WRITE FAILED:(0x%04x, %d)\n", 359 reg_offset, r); 360 } 361 } 362 363 static void ath9k_regwrite_buffer(void *hw_priv, u32 val, u32 reg_offset) 364 { 365 struct ath_hw *ah = (struct ath_hw *) hw_priv; 366 struct ath_common *common = ath9k_hw_common(ah); 367 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv; 368 u32 rsp_status; 369 int r; 370 371 mutex_lock(&priv->wmi->multi_write_mutex); 372 373 /* Store the register/value */ 374 priv->wmi->multi_write[priv->wmi->multi_write_idx].reg = 375 cpu_to_be32(reg_offset); 376 priv->wmi->multi_write[priv->wmi->multi_write_idx].val = 377 cpu_to_be32(val); 378 379 priv->wmi->multi_write_idx++; 380 381 /* If the buffer is full, send it out. */ 382 if (priv->wmi->multi_write_idx == MAX_CMD_NUMBER) { 383 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID, 384 (u8 *) &priv->wmi->multi_write, 385 sizeof(struct register_write) * priv->wmi->multi_write_idx, 386 (u8 *) &rsp_status, sizeof(rsp_status), 387 100); 388 if (unlikely(r)) { 389 ath_dbg(common, WMI, 390 "REGISTER WRITE FAILED, multi len: %d\n", 391 priv->wmi->multi_write_idx); 392 } 393 priv->wmi->multi_write_idx = 0; 394 } 395 396 mutex_unlock(&priv->wmi->multi_write_mutex); 397 } 398 399 static void ath9k_regwrite(void *hw_priv, u32 val, u32 reg_offset) 400 { 401 struct ath_hw *ah = (struct ath_hw *) hw_priv; 402 struct ath_common *common = ath9k_hw_common(ah); 403 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv; 404 405 if (atomic_read(&priv->wmi->mwrite_cnt)) 406 ath9k_regwrite_buffer(hw_priv, val, reg_offset); 407 else 408 ath9k_regwrite_single(hw_priv, val, reg_offset); 409 } 410 411 static void ath9k_enable_regwrite_buffer(void *hw_priv) 412 { 413 struct ath_hw *ah = (struct ath_hw *) hw_priv; 414 struct ath_common *common = ath9k_hw_common(ah); 415 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv; 416 417 atomic_inc(&priv->wmi->mwrite_cnt); 418 } 419 420 static void ath9k_regwrite_flush(void *hw_priv) 421 { 422 struct ath_hw *ah = (struct ath_hw *) hw_priv; 423 struct ath_common *common = ath9k_hw_common(ah); 424 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv; 425 u32 rsp_status; 426 int r; 427 428 atomic_dec(&priv->wmi->mwrite_cnt); 429 430 mutex_lock(&priv->wmi->multi_write_mutex); 431 432 if (priv->wmi->multi_write_idx) { 433 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID, 434 (u8 *) &priv->wmi->multi_write, 435 sizeof(struct register_write) * priv->wmi->multi_write_idx, 436 (u8 *) &rsp_status, sizeof(rsp_status), 437 100); 438 if (unlikely(r)) { 439 ath_dbg(common, WMI, 440 "REGISTER WRITE FAILED, multi len: %d\n", 441 priv->wmi->multi_write_idx); 442 } 443 priv->wmi->multi_write_idx = 0; 444 } 445 446 mutex_unlock(&priv->wmi->multi_write_mutex); 447 } 448 449 static u32 ath9k_reg_rmw(void *hw_priv, u32 reg_offset, u32 set, u32 clr) 450 { 451 u32 val; 452 453 val = ath9k_regread(hw_priv, reg_offset); 454 val &= ~clr; 455 val |= set; 456 ath9k_regwrite(hw_priv, val, reg_offset); 457 return val; 458 } 459 460 static void ath_usb_read_cachesize(struct ath_common *common, int *csz) 461 { 462 *csz = L1_CACHE_BYTES >> 2; 463 } 464 465 static bool ath_usb_eeprom_read(struct ath_common *common, u32 off, u16 *data) 466 { 467 struct ath_hw *ah = (struct ath_hw *) common->ah; 468 469 (void)REG_READ(ah, AR5416_EEPROM_OFFSET + (off << AR5416_EEPROM_S)); 470 471 if (!ath9k_hw_wait(ah, 472 AR_EEPROM_STATUS_DATA, 473 AR_EEPROM_STATUS_DATA_BUSY | 474 AR_EEPROM_STATUS_DATA_PROT_ACCESS, 0, 475 AH_WAIT_TIMEOUT)) 476 return false; 477 478 *data = MS(REG_READ(ah, AR_EEPROM_STATUS_DATA), 479 AR_EEPROM_STATUS_DATA_VAL); 480 481 return true; 482 } 483 484 static const struct ath_bus_ops ath9k_usb_bus_ops = { 485 .ath_bus_type = ATH_USB, 486 .read_cachesize = ath_usb_read_cachesize, 487 .eeprom_read = ath_usb_eeprom_read, 488 }; 489 490 static void setup_ht_cap(struct ath9k_htc_priv *priv, 491 struct ieee80211_sta_ht_cap *ht_info) 492 { 493 struct ath_common *common = ath9k_hw_common(priv->ah); 494 u8 tx_streams, rx_streams; 495 int i; 496 497 ht_info->ht_supported = true; 498 ht_info->cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 | 499 IEEE80211_HT_CAP_SM_PS | 500 IEEE80211_HT_CAP_SGI_40 | 501 IEEE80211_HT_CAP_DSSSCCK40; 502 503 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_SGI_20) 504 ht_info->cap |= IEEE80211_HT_CAP_SGI_20; 505 506 ht_info->cap |= (1 << IEEE80211_HT_CAP_RX_STBC_SHIFT); 507 508 ht_info->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K; 509 ht_info->ampdu_density = IEEE80211_HT_MPDU_DENSITY_8; 510 511 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs)); 512 513 /* ath9k_htc supports only 1 or 2 stream devices */ 514 tx_streams = ath9k_cmn_count_streams(priv->ah->txchainmask, 2); 515 rx_streams = ath9k_cmn_count_streams(priv->ah->rxchainmask, 2); 516 517 ath_dbg(common, CONFIG, "TX streams %d, RX streams: %d\n", 518 tx_streams, rx_streams); 519 520 if (tx_streams != rx_streams) { 521 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF; 522 ht_info->mcs.tx_params |= ((tx_streams - 1) << 523 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT); 524 } 525 526 for (i = 0; i < rx_streams; i++) 527 ht_info->mcs.rx_mask[i] = 0xff; 528 529 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_DEFINED; 530 } 531 532 static int ath9k_init_queues(struct ath9k_htc_priv *priv) 533 { 534 struct ath_common *common = ath9k_hw_common(priv->ah); 535 int i; 536 537 for (i = 0; i < ARRAY_SIZE(priv->hwq_map); i++) 538 priv->hwq_map[i] = -1; 539 540 priv->beaconq = ath9k_hw_beaconq_setup(priv->ah); 541 if (priv->beaconq == -1) { 542 ath_err(common, "Unable to setup BEACON xmit queue\n"); 543 goto err; 544 } 545 546 priv->cabq = ath9k_htc_cabq_setup(priv); 547 if (priv->cabq == -1) { 548 ath_err(common, "Unable to setup CAB xmit queue\n"); 549 goto err; 550 } 551 552 if (!ath9k_htc_txq_setup(priv, IEEE80211_AC_BE)) { 553 ath_err(common, "Unable to setup xmit queue for BE traffic\n"); 554 goto err; 555 } 556 557 if (!ath9k_htc_txq_setup(priv, IEEE80211_AC_BK)) { 558 ath_err(common, "Unable to setup xmit queue for BK traffic\n"); 559 goto err; 560 } 561 if (!ath9k_htc_txq_setup(priv, IEEE80211_AC_VI)) { 562 ath_err(common, "Unable to setup xmit queue for VI traffic\n"); 563 goto err; 564 } 565 if (!ath9k_htc_txq_setup(priv, IEEE80211_AC_VO)) { 566 ath_err(common, "Unable to setup xmit queue for VO traffic\n"); 567 goto err; 568 } 569 570 return 0; 571 572 err: 573 return -EINVAL; 574 } 575 576 static void ath9k_init_channels_rates(struct ath9k_htc_priv *priv) 577 { 578 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ) { 579 priv->sbands[IEEE80211_BAND_2GHZ].channels = 580 ath9k_2ghz_channels; 581 priv->sbands[IEEE80211_BAND_2GHZ].band = IEEE80211_BAND_2GHZ; 582 priv->sbands[IEEE80211_BAND_2GHZ].n_channels = 583 ARRAY_SIZE(ath9k_2ghz_channels); 584 priv->sbands[IEEE80211_BAND_2GHZ].bitrates = ath9k_legacy_rates; 585 priv->sbands[IEEE80211_BAND_2GHZ].n_bitrates = 586 ARRAY_SIZE(ath9k_legacy_rates); 587 } 588 589 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ) { 590 priv->sbands[IEEE80211_BAND_5GHZ].channels = ath9k_5ghz_channels; 591 priv->sbands[IEEE80211_BAND_5GHZ].band = IEEE80211_BAND_5GHZ; 592 priv->sbands[IEEE80211_BAND_5GHZ].n_channels = 593 ARRAY_SIZE(ath9k_5ghz_channels); 594 priv->sbands[IEEE80211_BAND_5GHZ].bitrates = 595 ath9k_legacy_rates + 4; 596 priv->sbands[IEEE80211_BAND_5GHZ].n_bitrates = 597 ARRAY_SIZE(ath9k_legacy_rates) - 4; 598 } 599 } 600 601 static void ath9k_init_misc(struct ath9k_htc_priv *priv) 602 { 603 struct ath_common *common = ath9k_hw_common(priv->ah); 604 605 memcpy(common->bssidmask, ath_bcast_mac, ETH_ALEN); 606 607 priv->ah->opmode = NL80211_IFTYPE_STATION; 608 } 609 610 static int ath9k_init_priv(struct ath9k_htc_priv *priv, 611 u16 devid, char *product, 612 u32 drv_info) 613 { 614 struct ath_hw *ah = NULL; 615 struct ath_common *common; 616 int i, ret = 0, csz = 0; 617 618 set_bit(OP_INVALID, &priv->op_flags); 619 620 ah = kzalloc(sizeof(struct ath_hw), GFP_KERNEL); 621 if (!ah) 622 return -ENOMEM; 623 624 ah->hw_version.devid = devid; 625 ah->hw_version.usbdev = drv_info; 626 ah->ah_flags |= AH_USE_EEPROM; 627 ah->reg_ops.read = ath9k_regread; 628 ah->reg_ops.multi_read = ath9k_multi_regread; 629 ah->reg_ops.write = ath9k_regwrite; 630 ah->reg_ops.enable_write_buffer = ath9k_enable_regwrite_buffer; 631 ah->reg_ops.write_flush = ath9k_regwrite_flush; 632 ah->reg_ops.rmw = ath9k_reg_rmw; 633 priv->ah = ah; 634 635 common = ath9k_hw_common(ah); 636 common->ops = &ah->reg_ops; 637 common->bus_ops = &ath9k_usb_bus_ops; 638 common->ah = ah; 639 common->hw = priv->hw; 640 common->priv = priv; 641 common->debug_mask = ath9k_debug; 642 common->btcoex_enabled = ath9k_htc_btcoex_enable == 1; 643 644 spin_lock_init(&priv->beacon_lock); 645 spin_lock_init(&priv->tx.tx_lock); 646 mutex_init(&priv->mutex); 647 mutex_init(&priv->htc_pm_lock); 648 tasklet_init(&priv->rx_tasklet, ath9k_rx_tasklet, 649 (unsigned long)priv); 650 tasklet_init(&priv->tx_failed_tasklet, ath9k_tx_failed_tasklet, 651 (unsigned long)priv); 652 INIT_DELAYED_WORK(&priv->ani_work, ath9k_htc_ani_work); 653 INIT_WORK(&priv->ps_work, ath9k_ps_work); 654 INIT_WORK(&priv->fatal_work, ath9k_fatal_work); 655 setup_timer(&priv->tx.cleanup_timer, ath9k_htc_tx_cleanup_timer, 656 (unsigned long)priv); 657 658 /* 659 * Cache line size is used to size and align various 660 * structures used to communicate with the hardware. 661 */ 662 ath_read_cachesize(common, &csz); 663 common->cachelsz = csz << 2; /* convert to bytes */ 664 665 ret = ath9k_hw_init(ah); 666 if (ret) { 667 ath_err(common, 668 "Unable to initialize hardware; initialization status: %d\n", 669 ret); 670 goto err_hw; 671 } 672 673 ret = ath9k_init_queues(priv); 674 if (ret) 675 goto err_queues; 676 677 for (i = 0; i < ATH9K_HTC_MAX_BCN_VIF; i++) 678 priv->cur_beacon_conf.bslot[i] = NULL; 679 680 ath9k_cmn_init_crypto(ah); 681 ath9k_init_channels_rates(priv); 682 ath9k_init_misc(priv); 683 ath9k_htc_init_btcoex(priv, product); 684 685 return 0; 686 687 err_queues: 688 ath9k_hw_deinit(ah); 689 err_hw: 690 691 kfree(ah); 692 priv->ah = NULL; 693 694 return ret; 695 } 696 697 static const struct ieee80211_iface_limit if_limits[] = { 698 { .max = 2, .types = BIT(NL80211_IFTYPE_STATION) | 699 BIT(NL80211_IFTYPE_P2P_CLIENT) }, 700 { .max = 2, .types = BIT(NL80211_IFTYPE_AP) | 701 BIT(NL80211_IFTYPE_P2P_GO) }, 702 }; 703 704 static const struct ieee80211_iface_combination if_comb = { 705 .limits = if_limits, 706 .n_limits = ARRAY_SIZE(if_limits), 707 .max_interfaces = 2, 708 .num_different_channels = 1, 709 }; 710 711 static void ath9k_set_hw_capab(struct ath9k_htc_priv *priv, 712 struct ieee80211_hw *hw) 713 { 714 struct ath_common *common = ath9k_hw_common(priv->ah); 715 716 hw->flags = IEEE80211_HW_SIGNAL_DBM | 717 IEEE80211_HW_AMPDU_AGGREGATION | 718 IEEE80211_HW_SPECTRUM_MGMT | 719 IEEE80211_HW_HAS_RATE_CONTROL | 720 IEEE80211_HW_RX_INCLUDES_FCS | 721 IEEE80211_HW_SUPPORTS_PS | 722 IEEE80211_HW_PS_NULLFUNC_STACK | 723 IEEE80211_HW_REPORTS_TX_ACK_STATUS | 724 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING; 725 726 hw->wiphy->interface_modes = 727 BIT(NL80211_IFTYPE_STATION) | 728 BIT(NL80211_IFTYPE_ADHOC) | 729 BIT(NL80211_IFTYPE_AP) | 730 BIT(NL80211_IFTYPE_P2P_GO) | 731 BIT(NL80211_IFTYPE_P2P_CLIENT); 732 733 hw->wiphy->iface_combinations = &if_comb; 734 hw->wiphy->n_iface_combinations = 1; 735 736 hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT; 737 738 hw->wiphy->flags |= WIPHY_FLAG_IBSS_RSN | 739 WIPHY_FLAG_HAS_REMAIN_ON_CHANNEL; 740 741 hw->queues = 4; 742 hw->channel_change_time = 5000; 743 hw->max_listen_interval = 1; 744 745 hw->vif_data_size = sizeof(struct ath9k_htc_vif); 746 hw->sta_data_size = sizeof(struct ath9k_htc_sta); 747 748 /* tx_frame_hdr is larger than tx_mgmt_hdr anyway */ 749 hw->extra_tx_headroom = sizeof(struct tx_frame_hdr) + 750 sizeof(struct htc_frame_hdr) + 4; 751 752 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ) 753 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = 754 &priv->sbands[IEEE80211_BAND_2GHZ]; 755 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ) 756 hw->wiphy->bands[IEEE80211_BAND_5GHZ] = 757 &priv->sbands[IEEE80211_BAND_5GHZ]; 758 759 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_HT) { 760 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ) 761 setup_ht_cap(priv, 762 &priv->sbands[IEEE80211_BAND_2GHZ].ht_cap); 763 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ) 764 setup_ht_cap(priv, 765 &priv->sbands[IEEE80211_BAND_5GHZ].ht_cap); 766 } 767 768 SET_IEEE80211_PERM_ADDR(hw, common->macaddr); 769 } 770 771 static int ath9k_init_firmware_version(struct ath9k_htc_priv *priv) 772 { 773 struct ieee80211_hw *hw = priv->hw; 774 struct wmi_fw_version cmd_rsp; 775 int ret; 776 777 memset(&cmd_rsp, 0, sizeof(cmd_rsp)); 778 779 WMI_CMD(WMI_GET_FW_VERSION); 780 if (ret) 781 return -EINVAL; 782 783 priv->fw_version_major = be16_to_cpu(cmd_rsp.major); 784 priv->fw_version_minor = be16_to_cpu(cmd_rsp.minor); 785 786 snprintf(hw->wiphy->fw_version, ETHTOOL_BUSINFO_LEN, "%d.%d", 787 priv->fw_version_major, 788 priv->fw_version_minor); 789 790 dev_info(priv->dev, "ath9k_htc: FW Version: %d.%d\n", 791 priv->fw_version_major, 792 priv->fw_version_minor); 793 794 /* 795 * Check if the available FW matches the driver's 796 * required version. 797 */ 798 if (priv->fw_version_major != MAJOR_VERSION_REQ || 799 priv->fw_version_minor != MINOR_VERSION_REQ) { 800 dev_err(priv->dev, "ath9k_htc: Please upgrade to FW version %d.%d\n", 801 MAJOR_VERSION_REQ, MINOR_VERSION_REQ); 802 return -EINVAL; 803 } 804 805 return 0; 806 } 807 808 static int ath9k_init_device(struct ath9k_htc_priv *priv, 809 u16 devid, char *product, u32 drv_info) 810 { 811 struct ieee80211_hw *hw = priv->hw; 812 struct ath_common *common; 813 struct ath_hw *ah; 814 int error = 0; 815 struct ath_regulatory *reg; 816 char hw_name[64]; 817 818 /* Bring up device */ 819 error = ath9k_init_priv(priv, devid, product, drv_info); 820 if (error != 0) 821 goto err_init; 822 823 ah = priv->ah; 824 common = ath9k_hw_common(ah); 825 ath9k_set_hw_capab(priv, hw); 826 827 error = ath9k_init_firmware_version(priv); 828 if (error != 0) 829 goto err_fw; 830 831 /* Initialize regulatory */ 832 error = ath_regd_init(&common->regulatory, priv->hw->wiphy, 833 ath9k_reg_notifier); 834 if (error) 835 goto err_regd; 836 837 reg = &common->regulatory; 838 839 /* Setup TX */ 840 error = ath9k_tx_init(priv); 841 if (error != 0) 842 goto err_tx; 843 844 /* Setup RX */ 845 error = ath9k_rx_init(priv); 846 if (error != 0) 847 goto err_rx; 848 849 #ifdef CONFIG_MAC80211_LEDS 850 /* must be initialized before ieee80211_register_hw */ 851 priv->led_cdev.default_trigger = ieee80211_create_tpt_led_trigger(priv->hw, 852 IEEE80211_TPT_LEDTRIG_FL_RADIO, ath9k_htc_tpt_blink, 853 ARRAY_SIZE(ath9k_htc_tpt_blink)); 854 #endif 855 856 /* Register with mac80211 */ 857 error = ieee80211_register_hw(hw); 858 if (error) 859 goto err_register; 860 861 /* Handle world regulatory */ 862 if (!ath_is_world_regd(reg)) { 863 error = regulatory_hint(hw->wiphy, reg->alpha2); 864 if (error) 865 goto err_world; 866 } 867 868 error = ath9k_htc_init_debug(priv->ah); 869 if (error) { 870 ath_err(common, "Unable to create debugfs files\n"); 871 goto err_world; 872 } 873 874 ath_dbg(common, CONFIG, 875 "WMI:%d, BCN:%d, CAB:%d, UAPSD:%d, MGMT:%d, BE:%d, BK:%d, VI:%d, VO:%d\n", 876 priv->wmi_cmd_ep, 877 priv->beacon_ep, 878 priv->cab_ep, 879 priv->uapsd_ep, 880 priv->mgmt_ep, 881 priv->data_be_ep, 882 priv->data_bk_ep, 883 priv->data_vi_ep, 884 priv->data_vo_ep); 885 886 ath9k_hw_name(priv->ah, hw_name, sizeof(hw_name)); 887 wiphy_info(hw->wiphy, "%s\n", hw_name); 888 889 ath9k_init_leds(priv); 890 ath9k_start_rfkill_poll(priv); 891 892 return 0; 893 894 err_world: 895 ieee80211_unregister_hw(hw); 896 err_register: 897 ath9k_rx_cleanup(priv); 898 err_rx: 899 ath9k_tx_cleanup(priv); 900 err_tx: 901 /* Nothing */ 902 err_regd: 903 /* Nothing */ 904 err_fw: 905 ath9k_deinit_priv(priv); 906 err_init: 907 return error; 908 } 909 910 int ath9k_htc_probe_device(struct htc_target *htc_handle, struct device *dev, 911 u16 devid, char *product, u32 drv_info) 912 { 913 struct ieee80211_hw *hw; 914 struct ath9k_htc_priv *priv; 915 int ret; 916 917 hw = ieee80211_alloc_hw(sizeof(struct ath9k_htc_priv), &ath9k_htc_ops); 918 if (!hw) 919 return -ENOMEM; 920 921 priv = hw->priv; 922 priv->hw = hw; 923 priv->htc = htc_handle; 924 priv->dev = dev; 925 htc_handle->drv_priv = priv; 926 SET_IEEE80211_DEV(hw, priv->dev); 927 928 ret = ath9k_htc_wait_for_target(priv); 929 if (ret) 930 goto err_free; 931 932 priv->wmi = ath9k_init_wmi(priv); 933 if (!priv->wmi) { 934 ret = -EINVAL; 935 goto err_free; 936 } 937 938 ret = ath9k_init_htc_services(priv, devid, drv_info); 939 if (ret) 940 goto err_init; 941 942 ret = ath9k_init_device(priv, devid, product, drv_info); 943 if (ret) 944 goto err_init; 945 946 return 0; 947 948 err_init: 949 ath9k_deinit_wmi(priv); 950 err_free: 951 ieee80211_free_hw(hw); 952 return ret; 953 } 954 955 void ath9k_htc_disconnect_device(struct htc_target *htc_handle, bool hotunplug) 956 { 957 if (htc_handle->drv_priv) { 958 959 /* Check if the device has been yanked out. */ 960 if (hotunplug) 961 htc_handle->drv_priv->ah->ah_flags |= AH_UNPLUGGED; 962 963 ath9k_deinit_device(htc_handle->drv_priv); 964 ath9k_deinit_wmi(htc_handle->drv_priv); 965 ieee80211_free_hw(htc_handle->drv_priv->hw); 966 } 967 } 968 969 #ifdef CONFIG_PM 970 971 void ath9k_htc_suspend(struct htc_target *htc_handle) 972 { 973 ath9k_htc_setpower(htc_handle->drv_priv, ATH9K_PM_FULL_SLEEP); 974 } 975 976 int ath9k_htc_resume(struct htc_target *htc_handle) 977 { 978 struct ath9k_htc_priv *priv = htc_handle->drv_priv; 979 int ret; 980 981 ret = ath9k_htc_wait_for_target(priv); 982 if (ret) 983 return ret; 984 985 ret = ath9k_init_htc_services(priv, priv->ah->hw_version.devid, 986 priv->ah->hw_version.usbdev); 987 return ret; 988 } 989 #endif 990 991 static int __init ath9k_htc_init(void) 992 { 993 if (ath9k_hif_usb_init() < 0) { 994 pr_err("No USB devices found, driver not installed\n"); 995 return -ENODEV; 996 } 997 998 return 0; 999 } 1000 module_init(ath9k_htc_init); 1001 1002 static void __exit ath9k_htc_exit(void) 1003 { 1004 ath9k_hif_usb_exit(); 1005 pr_info("Driver unloaded\n"); 1006 } 1007 module_exit(ath9k_htc_exit); 1008