1 /* 2 * Copyright (c) 2010-2011 Atheros Communications Inc. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #include "htc.h" 18 19 MODULE_AUTHOR("Atheros Communications"); 20 MODULE_LICENSE("Dual BSD/GPL"); 21 MODULE_DESCRIPTION("Atheros driver 802.11n HTC based wireless devices"); 22 23 static unsigned int ath9k_debug = ATH_DBG_DEFAULT; 24 module_param_named(debug, ath9k_debug, uint, 0); 25 MODULE_PARM_DESC(debug, "Debugging mask"); 26 27 int htc_modparam_nohwcrypt; 28 module_param_named(nohwcrypt, htc_modparam_nohwcrypt, int, 0444); 29 MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption"); 30 31 #define CHAN2G(_freq, _idx) { \ 32 .center_freq = (_freq), \ 33 .hw_value = (_idx), \ 34 .max_power = 20, \ 35 } 36 37 #define CHAN5G(_freq, _idx) { \ 38 .band = IEEE80211_BAND_5GHZ, \ 39 .center_freq = (_freq), \ 40 .hw_value = (_idx), \ 41 .max_power = 20, \ 42 } 43 44 #define ATH_HTC_BTCOEX_PRODUCT_ID "wb193" 45 46 static struct ieee80211_channel ath9k_2ghz_channels[] = { 47 CHAN2G(2412, 0), /* Channel 1 */ 48 CHAN2G(2417, 1), /* Channel 2 */ 49 CHAN2G(2422, 2), /* Channel 3 */ 50 CHAN2G(2427, 3), /* Channel 4 */ 51 CHAN2G(2432, 4), /* Channel 5 */ 52 CHAN2G(2437, 5), /* Channel 6 */ 53 CHAN2G(2442, 6), /* Channel 7 */ 54 CHAN2G(2447, 7), /* Channel 8 */ 55 CHAN2G(2452, 8), /* Channel 9 */ 56 CHAN2G(2457, 9), /* Channel 10 */ 57 CHAN2G(2462, 10), /* Channel 11 */ 58 CHAN2G(2467, 11), /* Channel 12 */ 59 CHAN2G(2472, 12), /* Channel 13 */ 60 CHAN2G(2484, 13), /* Channel 14 */ 61 }; 62 63 static struct ieee80211_channel ath9k_5ghz_channels[] = { 64 /* _We_ call this UNII 1 */ 65 CHAN5G(5180, 14), /* Channel 36 */ 66 CHAN5G(5200, 15), /* Channel 40 */ 67 CHAN5G(5220, 16), /* Channel 44 */ 68 CHAN5G(5240, 17), /* Channel 48 */ 69 /* _We_ call this UNII 2 */ 70 CHAN5G(5260, 18), /* Channel 52 */ 71 CHAN5G(5280, 19), /* Channel 56 */ 72 CHAN5G(5300, 20), /* Channel 60 */ 73 CHAN5G(5320, 21), /* Channel 64 */ 74 /* _We_ call this "Middle band" */ 75 CHAN5G(5500, 22), /* Channel 100 */ 76 CHAN5G(5520, 23), /* Channel 104 */ 77 CHAN5G(5540, 24), /* Channel 108 */ 78 CHAN5G(5560, 25), /* Channel 112 */ 79 CHAN5G(5580, 26), /* Channel 116 */ 80 CHAN5G(5600, 27), /* Channel 120 */ 81 CHAN5G(5620, 28), /* Channel 124 */ 82 CHAN5G(5640, 29), /* Channel 128 */ 83 CHAN5G(5660, 30), /* Channel 132 */ 84 CHAN5G(5680, 31), /* Channel 136 */ 85 CHAN5G(5700, 32), /* Channel 140 */ 86 /* _We_ call this UNII 3 */ 87 CHAN5G(5745, 33), /* Channel 149 */ 88 CHAN5G(5765, 34), /* Channel 153 */ 89 CHAN5G(5785, 35), /* Channel 157 */ 90 CHAN5G(5805, 36), /* Channel 161 */ 91 CHAN5G(5825, 37), /* Channel 165 */ 92 }; 93 94 /* Atheros hardware rate code addition for short premble */ 95 #define SHPCHECK(__hw_rate, __flags) \ 96 ((__flags & IEEE80211_RATE_SHORT_PREAMBLE) ? (__hw_rate | 0x04) : 0) 97 98 #define RATE(_bitrate, _hw_rate, _flags) { \ 99 .bitrate = (_bitrate), \ 100 .flags = (_flags), \ 101 .hw_value = (_hw_rate), \ 102 .hw_value_short = (SHPCHECK(_hw_rate, _flags)) \ 103 } 104 105 static struct ieee80211_rate ath9k_legacy_rates[] = { 106 RATE(10, 0x1b, 0), 107 RATE(20, 0x1a, IEEE80211_RATE_SHORT_PREAMBLE), /* shortp : 0x1e */ 108 RATE(55, 0x19, IEEE80211_RATE_SHORT_PREAMBLE), /* shortp: 0x1d */ 109 RATE(110, 0x18, IEEE80211_RATE_SHORT_PREAMBLE), /* short: 0x1c */ 110 RATE(60, 0x0b, 0), 111 RATE(90, 0x0f, 0), 112 RATE(120, 0x0a, 0), 113 RATE(180, 0x0e, 0), 114 RATE(240, 0x09, 0), 115 RATE(360, 0x0d, 0), 116 RATE(480, 0x08, 0), 117 RATE(540, 0x0c, 0), 118 }; 119 120 #ifdef CONFIG_MAC80211_LEDS 121 static const struct ieee80211_tpt_blink ath9k_htc_tpt_blink[] = { 122 { .throughput = 0 * 1024, .blink_time = 334 }, 123 { .throughput = 1 * 1024, .blink_time = 260 }, 124 { .throughput = 5 * 1024, .blink_time = 220 }, 125 { .throughput = 10 * 1024, .blink_time = 190 }, 126 { .throughput = 20 * 1024, .blink_time = 170 }, 127 { .throughput = 50 * 1024, .blink_time = 150 }, 128 { .throughput = 70 * 1024, .blink_time = 130 }, 129 { .throughput = 100 * 1024, .blink_time = 110 }, 130 { .throughput = 200 * 1024, .blink_time = 80 }, 131 { .throughput = 300 * 1024, .blink_time = 50 }, 132 }; 133 #endif 134 135 static int ath9k_htc_wait_for_target(struct ath9k_htc_priv *priv) 136 { 137 int time_left; 138 139 if (atomic_read(&priv->htc->tgt_ready) > 0) { 140 atomic_dec(&priv->htc->tgt_ready); 141 return 0; 142 } 143 144 /* Firmware can take up to 50ms to get ready, to be safe use 1 second */ 145 time_left = wait_for_completion_timeout(&priv->htc->target_wait, HZ); 146 if (!time_left) { 147 dev_err(priv->dev, "ath9k_htc: Target is unresponsive\n"); 148 return -ETIMEDOUT; 149 } 150 151 atomic_dec(&priv->htc->tgt_ready); 152 153 return 0; 154 } 155 156 static void ath9k_deinit_priv(struct ath9k_htc_priv *priv) 157 { 158 ath9k_hw_deinit(priv->ah); 159 kfree(priv->ah); 160 priv->ah = NULL; 161 } 162 163 static void ath9k_deinit_device(struct ath9k_htc_priv *priv) 164 { 165 struct ieee80211_hw *hw = priv->hw; 166 167 wiphy_rfkill_stop_polling(hw->wiphy); 168 ath9k_deinit_leds(priv); 169 ieee80211_unregister_hw(hw); 170 ath9k_rx_cleanup(priv); 171 ath9k_tx_cleanup(priv); 172 ath9k_deinit_priv(priv); 173 } 174 175 static inline int ath9k_htc_connect_svc(struct ath9k_htc_priv *priv, 176 u16 service_id, 177 void (*tx) (void *, 178 struct sk_buff *, 179 enum htc_endpoint_id, 180 bool txok), 181 enum htc_endpoint_id *ep_id) 182 { 183 struct htc_service_connreq req; 184 185 memset(&req, 0, sizeof(struct htc_service_connreq)); 186 187 req.service_id = service_id; 188 req.ep_callbacks.priv = priv; 189 req.ep_callbacks.rx = ath9k_htc_rxep; 190 req.ep_callbacks.tx = tx; 191 192 return htc_connect_service(priv->htc, &req, ep_id); 193 } 194 195 static int ath9k_init_htc_services(struct ath9k_htc_priv *priv, u16 devid, 196 u32 drv_info) 197 { 198 int ret; 199 200 /* WMI CMD*/ 201 ret = ath9k_wmi_connect(priv->htc, priv->wmi, &priv->wmi_cmd_ep); 202 if (ret) 203 goto err; 204 205 /* Beacon */ 206 ret = ath9k_htc_connect_svc(priv, WMI_BEACON_SVC, ath9k_htc_beaconep, 207 &priv->beacon_ep); 208 if (ret) 209 goto err; 210 211 /* CAB */ 212 ret = ath9k_htc_connect_svc(priv, WMI_CAB_SVC, ath9k_htc_txep, 213 &priv->cab_ep); 214 if (ret) 215 goto err; 216 217 218 /* UAPSD */ 219 ret = ath9k_htc_connect_svc(priv, WMI_UAPSD_SVC, ath9k_htc_txep, 220 &priv->uapsd_ep); 221 if (ret) 222 goto err; 223 224 /* MGMT */ 225 ret = ath9k_htc_connect_svc(priv, WMI_MGMT_SVC, ath9k_htc_txep, 226 &priv->mgmt_ep); 227 if (ret) 228 goto err; 229 230 /* DATA BE */ 231 ret = ath9k_htc_connect_svc(priv, WMI_DATA_BE_SVC, ath9k_htc_txep, 232 &priv->data_be_ep); 233 if (ret) 234 goto err; 235 236 /* DATA BK */ 237 ret = ath9k_htc_connect_svc(priv, WMI_DATA_BK_SVC, ath9k_htc_txep, 238 &priv->data_bk_ep); 239 if (ret) 240 goto err; 241 242 /* DATA VI */ 243 ret = ath9k_htc_connect_svc(priv, WMI_DATA_VI_SVC, ath9k_htc_txep, 244 &priv->data_vi_ep); 245 if (ret) 246 goto err; 247 248 /* DATA VO */ 249 ret = ath9k_htc_connect_svc(priv, WMI_DATA_VO_SVC, ath9k_htc_txep, 250 &priv->data_vo_ep); 251 if (ret) 252 goto err; 253 254 /* 255 * Setup required credits before initializing HTC. 256 * This is a bit hacky, but, since queuing is done in 257 * the HIF layer, shouldn't matter much. 258 */ 259 260 if (IS_AR7010_DEVICE(drv_info)) 261 priv->htc->credits = 45; 262 else 263 priv->htc->credits = 33; 264 265 ret = htc_init(priv->htc); 266 if (ret) 267 goto err; 268 269 dev_info(priv->dev, "ath9k_htc: HTC initialized with %d credits\n", 270 priv->htc->credits); 271 272 return 0; 273 274 err: 275 dev_err(priv->dev, "ath9k_htc: Unable to initialize HTC services\n"); 276 return ret; 277 } 278 279 static int ath9k_reg_notifier(struct wiphy *wiphy, 280 struct regulatory_request *request) 281 { 282 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy); 283 struct ath9k_htc_priv *priv = hw->priv; 284 285 return ath_reg_notifier_apply(wiphy, request, 286 ath9k_hw_regulatory(priv->ah)); 287 } 288 289 static unsigned int ath9k_regread(void *hw_priv, u32 reg_offset) 290 { 291 struct ath_hw *ah = (struct ath_hw *) hw_priv; 292 struct ath_common *common = ath9k_hw_common(ah); 293 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv; 294 __be32 val, reg = cpu_to_be32(reg_offset); 295 int r; 296 297 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_READ_CMDID, 298 (u8 *) ®, sizeof(reg), 299 (u8 *) &val, sizeof(val), 300 100); 301 if (unlikely(r)) { 302 ath_dbg(common, ATH_DBG_WMI, 303 "REGISTER READ FAILED: (0x%04x, %d)\n", 304 reg_offset, r); 305 return -EIO; 306 } 307 308 return be32_to_cpu(val); 309 } 310 311 static void ath9k_multi_regread(void *hw_priv, u32 *addr, 312 u32 *val, u16 count) 313 { 314 struct ath_hw *ah = (struct ath_hw *) hw_priv; 315 struct ath_common *common = ath9k_hw_common(ah); 316 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv; 317 __be32 tmpaddr[8]; 318 __be32 tmpval[8]; 319 int i, ret; 320 321 for (i = 0; i < count; i++) { 322 tmpaddr[i] = cpu_to_be32(addr[i]); 323 } 324 325 ret = ath9k_wmi_cmd(priv->wmi, WMI_REG_READ_CMDID, 326 (u8 *)tmpaddr , sizeof(u32) * count, 327 (u8 *)tmpval, sizeof(u32) * count, 328 100); 329 if (unlikely(ret)) { 330 ath_dbg(common, ATH_DBG_WMI, 331 "Multiple REGISTER READ FAILED (count: %d)\n", count); 332 } 333 334 for (i = 0; i < count; i++) { 335 val[i] = be32_to_cpu(tmpval[i]); 336 } 337 } 338 339 static void ath9k_regwrite_single(void *hw_priv, u32 val, u32 reg_offset) 340 { 341 struct ath_hw *ah = (struct ath_hw *) hw_priv; 342 struct ath_common *common = ath9k_hw_common(ah); 343 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv; 344 const __be32 buf[2] = { 345 cpu_to_be32(reg_offset), 346 cpu_to_be32(val), 347 }; 348 int r; 349 350 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID, 351 (u8 *) &buf, sizeof(buf), 352 (u8 *) &val, sizeof(val), 353 100); 354 if (unlikely(r)) { 355 ath_dbg(common, ATH_DBG_WMI, 356 "REGISTER WRITE FAILED:(0x%04x, %d)\n", 357 reg_offset, r); 358 } 359 } 360 361 static void ath9k_regwrite_buffer(void *hw_priv, u32 val, u32 reg_offset) 362 { 363 struct ath_hw *ah = (struct ath_hw *) hw_priv; 364 struct ath_common *common = ath9k_hw_common(ah); 365 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv; 366 u32 rsp_status; 367 int r; 368 369 mutex_lock(&priv->wmi->multi_write_mutex); 370 371 /* Store the register/value */ 372 priv->wmi->multi_write[priv->wmi->multi_write_idx].reg = 373 cpu_to_be32(reg_offset); 374 priv->wmi->multi_write[priv->wmi->multi_write_idx].val = 375 cpu_to_be32(val); 376 377 priv->wmi->multi_write_idx++; 378 379 /* If the buffer is full, send it out. */ 380 if (priv->wmi->multi_write_idx == MAX_CMD_NUMBER) { 381 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID, 382 (u8 *) &priv->wmi->multi_write, 383 sizeof(struct register_write) * priv->wmi->multi_write_idx, 384 (u8 *) &rsp_status, sizeof(rsp_status), 385 100); 386 if (unlikely(r)) { 387 ath_dbg(common, ATH_DBG_WMI, 388 "REGISTER WRITE FAILED, multi len: %d\n", 389 priv->wmi->multi_write_idx); 390 } 391 priv->wmi->multi_write_idx = 0; 392 } 393 394 mutex_unlock(&priv->wmi->multi_write_mutex); 395 } 396 397 static void ath9k_regwrite(void *hw_priv, u32 val, u32 reg_offset) 398 { 399 struct ath_hw *ah = (struct ath_hw *) hw_priv; 400 struct ath_common *common = ath9k_hw_common(ah); 401 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv; 402 403 if (atomic_read(&priv->wmi->mwrite_cnt)) 404 ath9k_regwrite_buffer(hw_priv, val, reg_offset); 405 else 406 ath9k_regwrite_single(hw_priv, val, reg_offset); 407 } 408 409 static void ath9k_enable_regwrite_buffer(void *hw_priv) 410 { 411 struct ath_hw *ah = (struct ath_hw *) hw_priv; 412 struct ath_common *common = ath9k_hw_common(ah); 413 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv; 414 415 atomic_inc(&priv->wmi->mwrite_cnt); 416 } 417 418 static void ath9k_regwrite_flush(void *hw_priv) 419 { 420 struct ath_hw *ah = (struct ath_hw *) hw_priv; 421 struct ath_common *common = ath9k_hw_common(ah); 422 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv; 423 u32 rsp_status; 424 int r; 425 426 atomic_dec(&priv->wmi->mwrite_cnt); 427 428 mutex_lock(&priv->wmi->multi_write_mutex); 429 430 if (priv->wmi->multi_write_idx) { 431 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID, 432 (u8 *) &priv->wmi->multi_write, 433 sizeof(struct register_write) * priv->wmi->multi_write_idx, 434 (u8 *) &rsp_status, sizeof(rsp_status), 435 100); 436 if (unlikely(r)) { 437 ath_dbg(common, ATH_DBG_WMI, 438 "REGISTER WRITE FAILED, multi len: %d\n", 439 priv->wmi->multi_write_idx); 440 } 441 priv->wmi->multi_write_idx = 0; 442 } 443 444 mutex_unlock(&priv->wmi->multi_write_mutex); 445 } 446 447 static u32 ath9k_reg_rmw(void *hw_priv, u32 reg_offset, u32 set, u32 clr) 448 { 449 u32 val; 450 451 val = ath9k_regread(hw_priv, reg_offset); 452 val &= ~clr; 453 val |= set; 454 ath9k_regwrite(hw_priv, val, reg_offset); 455 return val; 456 } 457 458 static void ath_usb_read_cachesize(struct ath_common *common, int *csz) 459 { 460 *csz = L1_CACHE_BYTES >> 2; 461 } 462 463 static bool ath_usb_eeprom_read(struct ath_common *common, u32 off, u16 *data) 464 { 465 struct ath_hw *ah = (struct ath_hw *) common->ah; 466 467 (void)REG_READ(ah, AR5416_EEPROM_OFFSET + (off << AR5416_EEPROM_S)); 468 469 if (!ath9k_hw_wait(ah, 470 AR_EEPROM_STATUS_DATA, 471 AR_EEPROM_STATUS_DATA_BUSY | 472 AR_EEPROM_STATUS_DATA_PROT_ACCESS, 0, 473 AH_WAIT_TIMEOUT)) 474 return false; 475 476 *data = MS(REG_READ(ah, AR_EEPROM_STATUS_DATA), 477 AR_EEPROM_STATUS_DATA_VAL); 478 479 return true; 480 } 481 482 static const struct ath_bus_ops ath9k_usb_bus_ops = { 483 .ath_bus_type = ATH_USB, 484 .read_cachesize = ath_usb_read_cachesize, 485 .eeprom_read = ath_usb_eeprom_read, 486 }; 487 488 static void setup_ht_cap(struct ath9k_htc_priv *priv, 489 struct ieee80211_sta_ht_cap *ht_info) 490 { 491 struct ath_common *common = ath9k_hw_common(priv->ah); 492 u8 tx_streams, rx_streams; 493 int i; 494 495 ht_info->ht_supported = true; 496 ht_info->cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 | 497 IEEE80211_HT_CAP_SM_PS | 498 IEEE80211_HT_CAP_SGI_40 | 499 IEEE80211_HT_CAP_DSSSCCK40; 500 501 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_SGI_20) 502 ht_info->cap |= IEEE80211_HT_CAP_SGI_20; 503 504 ht_info->cap |= (1 << IEEE80211_HT_CAP_RX_STBC_SHIFT); 505 506 ht_info->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K; 507 ht_info->ampdu_density = IEEE80211_HT_MPDU_DENSITY_8; 508 509 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs)); 510 511 /* ath9k_htc supports only 1 or 2 stream devices */ 512 tx_streams = ath9k_cmn_count_streams(priv->ah->txchainmask, 2); 513 rx_streams = ath9k_cmn_count_streams(priv->ah->rxchainmask, 2); 514 515 ath_dbg(common, ATH_DBG_CONFIG, 516 "TX streams %d, RX streams: %d\n", 517 tx_streams, rx_streams); 518 519 if (tx_streams != rx_streams) { 520 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF; 521 ht_info->mcs.tx_params |= ((tx_streams - 1) << 522 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT); 523 } 524 525 for (i = 0; i < rx_streams; i++) 526 ht_info->mcs.rx_mask[i] = 0xff; 527 528 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_DEFINED; 529 } 530 531 static int ath9k_init_queues(struct ath9k_htc_priv *priv) 532 { 533 struct ath_common *common = ath9k_hw_common(priv->ah); 534 int i; 535 536 for (i = 0; i < ARRAY_SIZE(priv->hwq_map); i++) 537 priv->hwq_map[i] = -1; 538 539 priv->beaconq = ath9k_hw_beaconq_setup(priv->ah); 540 if (priv->beaconq == -1) { 541 ath_err(common, "Unable to setup BEACON xmit queue\n"); 542 goto err; 543 } 544 545 priv->cabq = ath9k_htc_cabq_setup(priv); 546 if (priv->cabq == -1) { 547 ath_err(common, "Unable to setup CAB xmit queue\n"); 548 goto err; 549 } 550 551 if (!ath9k_htc_txq_setup(priv, WME_AC_BE)) { 552 ath_err(common, "Unable to setup xmit queue for BE traffic\n"); 553 goto err; 554 } 555 556 if (!ath9k_htc_txq_setup(priv, WME_AC_BK)) { 557 ath_err(common, "Unable to setup xmit queue for BK traffic\n"); 558 goto err; 559 } 560 if (!ath9k_htc_txq_setup(priv, WME_AC_VI)) { 561 ath_err(common, "Unable to setup xmit queue for VI traffic\n"); 562 goto err; 563 } 564 if (!ath9k_htc_txq_setup(priv, WME_AC_VO)) { 565 ath_err(common, "Unable to setup xmit queue for VO traffic\n"); 566 goto err; 567 } 568 569 return 0; 570 571 err: 572 return -EINVAL; 573 } 574 575 static void ath9k_init_channels_rates(struct ath9k_htc_priv *priv) 576 { 577 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ) { 578 priv->sbands[IEEE80211_BAND_2GHZ].channels = 579 ath9k_2ghz_channels; 580 priv->sbands[IEEE80211_BAND_2GHZ].band = IEEE80211_BAND_2GHZ; 581 priv->sbands[IEEE80211_BAND_2GHZ].n_channels = 582 ARRAY_SIZE(ath9k_2ghz_channels); 583 priv->sbands[IEEE80211_BAND_2GHZ].bitrates = ath9k_legacy_rates; 584 priv->sbands[IEEE80211_BAND_2GHZ].n_bitrates = 585 ARRAY_SIZE(ath9k_legacy_rates); 586 } 587 588 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ) { 589 priv->sbands[IEEE80211_BAND_5GHZ].channels = ath9k_5ghz_channels; 590 priv->sbands[IEEE80211_BAND_5GHZ].band = IEEE80211_BAND_5GHZ; 591 priv->sbands[IEEE80211_BAND_5GHZ].n_channels = 592 ARRAY_SIZE(ath9k_5ghz_channels); 593 priv->sbands[IEEE80211_BAND_5GHZ].bitrates = 594 ath9k_legacy_rates + 4; 595 priv->sbands[IEEE80211_BAND_5GHZ].n_bitrates = 596 ARRAY_SIZE(ath9k_legacy_rates) - 4; 597 } 598 } 599 600 static void ath9k_init_misc(struct ath9k_htc_priv *priv) 601 { 602 struct ath_common *common = ath9k_hw_common(priv->ah); 603 604 memcpy(common->bssidmask, ath_bcast_mac, ETH_ALEN); 605 606 priv->ah->opmode = NL80211_IFTYPE_STATION; 607 } 608 609 static void ath9k_init_btcoex(struct ath9k_htc_priv *priv) 610 { 611 int qnum; 612 613 switch (priv->ah->btcoex_hw.scheme) { 614 case ATH_BTCOEX_CFG_NONE: 615 break; 616 case ATH_BTCOEX_CFG_3WIRE: 617 priv->ah->btcoex_hw.btactive_gpio = 7; 618 priv->ah->btcoex_hw.btpriority_gpio = 6; 619 priv->ah->btcoex_hw.wlanactive_gpio = 8; 620 priv->btcoex.bt_stomp_type = ATH_BTCOEX_STOMP_LOW; 621 ath9k_hw_btcoex_init_3wire(priv->ah); 622 ath_htc_init_btcoex_work(priv); 623 qnum = priv->hwq_map[WME_AC_BE]; 624 ath9k_hw_init_btcoex_hw(priv->ah, qnum); 625 break; 626 default: 627 WARN_ON(1); 628 break; 629 } 630 } 631 632 static int ath9k_init_priv(struct ath9k_htc_priv *priv, 633 u16 devid, char *product, 634 u32 drv_info) 635 { 636 struct ath_hw *ah = NULL; 637 struct ath_common *common; 638 int i, ret = 0, csz = 0; 639 640 priv->op_flags |= OP_INVALID; 641 642 ah = kzalloc(sizeof(struct ath_hw), GFP_KERNEL); 643 if (!ah) 644 return -ENOMEM; 645 646 ah->hw_version.devid = devid; 647 ah->hw_version.usbdev = drv_info; 648 ah->ah_flags |= AH_USE_EEPROM; 649 ah->reg_ops.read = ath9k_regread; 650 ah->reg_ops.multi_read = ath9k_multi_regread; 651 ah->reg_ops.write = ath9k_regwrite; 652 ah->reg_ops.enable_write_buffer = ath9k_enable_regwrite_buffer; 653 ah->reg_ops.write_flush = ath9k_regwrite_flush; 654 ah->reg_ops.rmw = ath9k_reg_rmw; 655 priv->ah = ah; 656 657 common = ath9k_hw_common(ah); 658 common->ops = &ah->reg_ops; 659 common->bus_ops = &ath9k_usb_bus_ops; 660 common->ah = ah; 661 common->hw = priv->hw; 662 common->priv = priv; 663 common->debug_mask = ath9k_debug; 664 665 spin_lock_init(&priv->beacon_lock); 666 spin_lock_init(&priv->tx.tx_lock); 667 mutex_init(&priv->mutex); 668 mutex_init(&priv->htc_pm_lock); 669 tasklet_init(&priv->rx_tasklet, ath9k_rx_tasklet, 670 (unsigned long)priv); 671 tasklet_init(&priv->tx_failed_tasklet, ath9k_tx_failed_tasklet, 672 (unsigned long)priv); 673 INIT_DELAYED_WORK(&priv->ani_work, ath9k_htc_ani_work); 674 INIT_WORK(&priv->ps_work, ath9k_ps_work); 675 INIT_WORK(&priv->fatal_work, ath9k_fatal_work); 676 setup_timer(&priv->tx.cleanup_timer, ath9k_htc_tx_cleanup_timer, 677 (unsigned long)priv); 678 679 /* 680 * Cache line size is used to size and align various 681 * structures used to communicate with the hardware. 682 */ 683 ath_read_cachesize(common, &csz); 684 common->cachelsz = csz << 2; /* convert to bytes */ 685 686 ret = ath9k_hw_init(ah); 687 if (ret) { 688 ath_err(common, 689 "Unable to initialize hardware; initialization status: %d\n", 690 ret); 691 goto err_hw; 692 } 693 694 ret = ath9k_init_queues(priv); 695 if (ret) 696 goto err_queues; 697 698 for (i = 0; i < ATH9K_HTC_MAX_BCN_VIF; i++) 699 priv->cur_beacon_conf.bslot[i] = NULL; 700 701 ath9k_cmn_init_crypto(ah); 702 ath9k_init_channels_rates(priv); 703 ath9k_init_misc(priv); 704 705 if (product && strncmp(product, ATH_HTC_BTCOEX_PRODUCT_ID, 5) == 0) { 706 ah->btcoex_hw.scheme = ATH_BTCOEX_CFG_3WIRE; 707 ath9k_init_btcoex(priv); 708 } 709 710 return 0; 711 712 err_queues: 713 ath9k_hw_deinit(ah); 714 err_hw: 715 716 kfree(ah); 717 priv->ah = NULL; 718 719 return ret; 720 } 721 722 static void ath9k_set_hw_capab(struct ath9k_htc_priv *priv, 723 struct ieee80211_hw *hw) 724 { 725 struct ath_common *common = ath9k_hw_common(priv->ah); 726 727 hw->flags = IEEE80211_HW_SIGNAL_DBM | 728 IEEE80211_HW_AMPDU_AGGREGATION | 729 IEEE80211_HW_SPECTRUM_MGMT | 730 IEEE80211_HW_HAS_RATE_CONTROL | 731 IEEE80211_HW_RX_INCLUDES_FCS | 732 IEEE80211_HW_SUPPORTS_PS | 733 IEEE80211_HW_PS_NULLFUNC_STACK | 734 IEEE80211_HW_REPORTS_TX_ACK_STATUS | 735 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING; 736 737 hw->wiphy->interface_modes = 738 BIT(NL80211_IFTYPE_STATION) | 739 BIT(NL80211_IFTYPE_ADHOC) | 740 BIT(NL80211_IFTYPE_AP) | 741 BIT(NL80211_IFTYPE_P2P_GO) | 742 BIT(NL80211_IFTYPE_P2P_CLIENT); 743 744 hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT; 745 746 hw->queues = 4; 747 hw->channel_change_time = 5000; 748 hw->max_listen_interval = 10; 749 750 hw->vif_data_size = sizeof(struct ath9k_htc_vif); 751 hw->sta_data_size = sizeof(struct ath9k_htc_sta); 752 753 /* tx_frame_hdr is larger than tx_mgmt_hdr anyway */ 754 hw->extra_tx_headroom = sizeof(struct tx_frame_hdr) + 755 sizeof(struct htc_frame_hdr) + 4; 756 757 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ) 758 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = 759 &priv->sbands[IEEE80211_BAND_2GHZ]; 760 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ) 761 hw->wiphy->bands[IEEE80211_BAND_5GHZ] = 762 &priv->sbands[IEEE80211_BAND_5GHZ]; 763 764 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_HT) { 765 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ) 766 setup_ht_cap(priv, 767 &priv->sbands[IEEE80211_BAND_2GHZ].ht_cap); 768 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ) 769 setup_ht_cap(priv, 770 &priv->sbands[IEEE80211_BAND_5GHZ].ht_cap); 771 } 772 773 SET_IEEE80211_PERM_ADDR(hw, common->macaddr); 774 } 775 776 static int ath9k_init_firmware_version(struct ath9k_htc_priv *priv) 777 { 778 struct ieee80211_hw *hw = priv->hw; 779 struct wmi_fw_version cmd_rsp; 780 int ret; 781 782 memset(&cmd_rsp, 0, sizeof(cmd_rsp)); 783 784 WMI_CMD(WMI_GET_FW_VERSION); 785 if (ret) 786 return -EINVAL; 787 788 priv->fw_version_major = be16_to_cpu(cmd_rsp.major); 789 priv->fw_version_minor = be16_to_cpu(cmd_rsp.minor); 790 791 snprintf(hw->wiphy->fw_version, ETHTOOL_BUSINFO_LEN, "%d.%d", 792 priv->fw_version_major, 793 priv->fw_version_minor); 794 795 dev_info(priv->dev, "ath9k_htc: FW Version: %d.%d\n", 796 priv->fw_version_major, 797 priv->fw_version_minor); 798 799 /* 800 * Check if the available FW matches the driver's 801 * required version. 802 */ 803 if (priv->fw_version_major != MAJOR_VERSION_REQ || 804 priv->fw_version_minor != MINOR_VERSION_REQ) { 805 dev_err(priv->dev, "ath9k_htc: Please upgrade to FW version %d.%d\n", 806 MAJOR_VERSION_REQ, MINOR_VERSION_REQ); 807 return -EINVAL; 808 } 809 810 return 0; 811 } 812 813 static int ath9k_init_device(struct ath9k_htc_priv *priv, 814 u16 devid, char *product, u32 drv_info) 815 { 816 struct ieee80211_hw *hw = priv->hw; 817 struct ath_common *common; 818 struct ath_hw *ah; 819 int error = 0; 820 struct ath_regulatory *reg; 821 char hw_name[64]; 822 823 /* Bring up device */ 824 error = ath9k_init_priv(priv, devid, product, drv_info); 825 if (error != 0) 826 goto err_init; 827 828 ah = priv->ah; 829 common = ath9k_hw_common(ah); 830 ath9k_set_hw_capab(priv, hw); 831 832 error = ath9k_init_firmware_version(priv); 833 if (error != 0) 834 goto err_fw; 835 836 /* Initialize regulatory */ 837 error = ath_regd_init(&common->regulatory, priv->hw->wiphy, 838 ath9k_reg_notifier); 839 if (error) 840 goto err_regd; 841 842 reg = &common->regulatory; 843 844 /* Setup TX */ 845 error = ath9k_tx_init(priv); 846 if (error != 0) 847 goto err_tx; 848 849 /* Setup RX */ 850 error = ath9k_rx_init(priv); 851 if (error != 0) 852 goto err_rx; 853 854 #ifdef CONFIG_MAC80211_LEDS 855 /* must be initialized before ieee80211_register_hw */ 856 priv->led_cdev.default_trigger = ieee80211_create_tpt_led_trigger(priv->hw, 857 IEEE80211_TPT_LEDTRIG_FL_RADIO, ath9k_htc_tpt_blink, 858 ARRAY_SIZE(ath9k_htc_tpt_blink)); 859 #endif 860 861 /* Register with mac80211 */ 862 error = ieee80211_register_hw(hw); 863 if (error) 864 goto err_register; 865 866 /* Handle world regulatory */ 867 if (!ath_is_world_regd(reg)) { 868 error = regulatory_hint(hw->wiphy, reg->alpha2); 869 if (error) 870 goto err_world; 871 } 872 873 error = ath9k_htc_init_debug(priv->ah); 874 if (error) { 875 ath_err(common, "Unable to create debugfs files\n"); 876 goto err_world; 877 } 878 879 ath_dbg(common, ATH_DBG_CONFIG, 880 "WMI:%d, BCN:%d, CAB:%d, UAPSD:%d, MGMT:%d, " 881 "BE:%d, BK:%d, VI:%d, VO:%d\n", 882 priv->wmi_cmd_ep, 883 priv->beacon_ep, 884 priv->cab_ep, 885 priv->uapsd_ep, 886 priv->mgmt_ep, 887 priv->data_be_ep, 888 priv->data_bk_ep, 889 priv->data_vi_ep, 890 priv->data_vo_ep); 891 892 ath9k_hw_name(priv->ah, hw_name, sizeof(hw_name)); 893 wiphy_info(hw->wiphy, "%s\n", hw_name); 894 895 ath9k_init_leds(priv); 896 ath9k_start_rfkill_poll(priv); 897 898 return 0; 899 900 err_world: 901 ieee80211_unregister_hw(hw); 902 err_register: 903 ath9k_rx_cleanup(priv); 904 err_rx: 905 ath9k_tx_cleanup(priv); 906 err_tx: 907 /* Nothing */ 908 err_regd: 909 /* Nothing */ 910 err_fw: 911 ath9k_deinit_priv(priv); 912 err_init: 913 return error; 914 } 915 916 int ath9k_htc_probe_device(struct htc_target *htc_handle, struct device *dev, 917 u16 devid, char *product, u32 drv_info) 918 { 919 struct ieee80211_hw *hw; 920 struct ath9k_htc_priv *priv; 921 int ret; 922 923 hw = ieee80211_alloc_hw(sizeof(struct ath9k_htc_priv), &ath9k_htc_ops); 924 if (!hw) 925 return -ENOMEM; 926 927 priv = hw->priv; 928 priv->hw = hw; 929 priv->htc = htc_handle; 930 priv->dev = dev; 931 htc_handle->drv_priv = priv; 932 SET_IEEE80211_DEV(hw, priv->dev); 933 934 ret = ath9k_htc_wait_for_target(priv); 935 if (ret) 936 goto err_free; 937 938 priv->wmi = ath9k_init_wmi(priv); 939 if (!priv->wmi) { 940 ret = -EINVAL; 941 goto err_free; 942 } 943 944 ret = ath9k_init_htc_services(priv, devid, drv_info); 945 if (ret) 946 goto err_init; 947 948 ret = ath9k_init_device(priv, devid, product, drv_info); 949 if (ret) 950 goto err_init; 951 952 return 0; 953 954 err_init: 955 ath9k_deinit_wmi(priv); 956 err_free: 957 ieee80211_free_hw(hw); 958 return ret; 959 } 960 961 void ath9k_htc_disconnect_device(struct htc_target *htc_handle, bool hotunplug) 962 { 963 if (htc_handle->drv_priv) { 964 965 /* Check if the device has been yanked out. */ 966 if (hotunplug) 967 htc_handle->drv_priv->ah->ah_flags |= AH_UNPLUGGED; 968 969 ath9k_deinit_device(htc_handle->drv_priv); 970 ath9k_deinit_wmi(htc_handle->drv_priv); 971 ieee80211_free_hw(htc_handle->drv_priv->hw); 972 } 973 } 974 975 #ifdef CONFIG_PM 976 977 void ath9k_htc_suspend(struct htc_target *htc_handle) 978 { 979 ath9k_htc_setpower(htc_handle->drv_priv, ATH9K_PM_FULL_SLEEP); 980 } 981 982 int ath9k_htc_resume(struct htc_target *htc_handle) 983 { 984 struct ath9k_htc_priv *priv = htc_handle->drv_priv; 985 int ret; 986 987 ret = ath9k_htc_wait_for_target(priv); 988 if (ret) 989 return ret; 990 991 ret = ath9k_init_htc_services(priv, priv->ah->hw_version.devid, 992 priv->ah->hw_version.usbdev); 993 return ret; 994 } 995 #endif 996 997 static int __init ath9k_htc_init(void) 998 { 999 if (ath9k_hif_usb_init() < 0) { 1000 printk(KERN_ERR 1001 "ath9k_htc: No USB devices found," 1002 " driver not installed.\n"); 1003 return -ENODEV; 1004 } 1005 1006 return 0; 1007 } 1008 module_init(ath9k_htc_init); 1009 1010 static void __exit ath9k_htc_exit(void) 1011 { 1012 ath9k_hif_usb_exit(); 1013 printk(KERN_INFO "ath9k_htc: Driver unloaded\n"); 1014 } 1015 module_exit(ath9k_htc_exit); 1016