1 /* 2 * Copyright (c) 2008-2011 Atheros Communications Inc. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #ifndef ATH9K_H 18 #define ATH9K_H 19 20 #include <linux/etherdevice.h> 21 #include <linux/device.h> 22 #include <linux/interrupt.h> 23 #include <linux/leds.h> 24 #include <linux/completion.h> 25 26 #include "debug.h" 27 #include "common.h" 28 #include "mci.h" 29 #include "dfs.h" 30 31 /* 32 * Header for the ath9k.ko driver core *only* -- hw code nor any other driver 33 * should rely on this file or its contents. 34 */ 35 36 struct ath_node; 37 38 /* Macro to expand scalars to 64-bit objects */ 39 40 #define ito64(x) (sizeof(x) == 1) ? \ 41 (((unsigned long long int)(x)) & (0xff)) : \ 42 (sizeof(x) == 2) ? \ 43 (((unsigned long long int)(x)) & 0xffff) : \ 44 ((sizeof(x) == 4) ? \ 45 (((unsigned long long int)(x)) & 0xffffffff) : \ 46 (unsigned long long int)(x)) 47 48 /* increment with wrap-around */ 49 #define INCR(_l, _sz) do { \ 50 (_l)++; \ 51 (_l) &= ((_sz) - 1); \ 52 } while (0) 53 54 /* decrement with wrap-around */ 55 #define DECR(_l, _sz) do { \ 56 (_l)--; \ 57 (_l) &= ((_sz) - 1); \ 58 } while (0) 59 60 #define TSF_TO_TU(_h,_l) \ 61 ((((u32)(_h)) << 22) | (((u32)(_l)) >> 10)) 62 63 #define ATH_TXQ_SETUP(sc, i) ((sc)->tx.txqsetup & (1<<i)) 64 65 struct ath_config { 66 u16 txpowlimit; 67 }; 68 69 /*************************/ 70 /* Descriptor Management */ 71 /*************************/ 72 73 #define ATH_TXBUF_RESET(_bf) do { \ 74 (_bf)->bf_lastbf = NULL; \ 75 (_bf)->bf_next = NULL; \ 76 memset(&((_bf)->bf_state), 0, \ 77 sizeof(struct ath_buf_state)); \ 78 } while (0) 79 80 /** 81 * enum buffer_type - Buffer type flags 82 * 83 * @BUF_AMPDU: This buffer is an ampdu, as part of an aggregate (during TX) 84 * @BUF_AGGR: Indicates whether the buffer can be aggregated 85 * (used in aggregation scheduling) 86 */ 87 enum buffer_type { 88 BUF_AMPDU = BIT(0), 89 BUF_AGGR = BIT(1), 90 }; 91 92 #define bf_isampdu(bf) (bf->bf_state.bf_type & BUF_AMPDU) 93 #define bf_isaggr(bf) (bf->bf_state.bf_type & BUF_AGGR) 94 95 #define ATH_TXSTATUS_RING_SIZE 512 96 97 #define DS2PHYS(_dd, _ds) \ 98 ((_dd)->dd_desc_paddr + ((caddr_t)(_ds) - (caddr_t)(_dd)->dd_desc)) 99 #define ATH_DESC_4KB_BOUND_CHECK(_daddr) ((((_daddr) & 0xFFF) > 0xF7F) ? 1 : 0) 100 #define ATH_DESC_4KB_BOUND_NUM_SKIPPED(_len) ((_len) / 4096) 101 102 struct ath_descdma { 103 void *dd_desc; 104 dma_addr_t dd_desc_paddr; 105 u32 dd_desc_len; 106 }; 107 108 int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd, 109 struct list_head *head, const char *name, 110 int nbuf, int ndesc, bool is_tx); 111 112 /***********/ 113 /* RX / TX */ 114 /***********/ 115 116 #define ATH_RXBUF 512 117 #define ATH_TXBUF 512 118 #define ATH_TXBUF_RESERVE 5 119 #define ATH_MAX_QDEPTH (ATH_TXBUF / 4 - ATH_TXBUF_RESERVE) 120 #define ATH_TXMAXTRY 13 121 122 #define TID_TO_WME_AC(_tid) \ 123 ((((_tid) == 0) || ((_tid) == 3)) ? IEEE80211_AC_BE : \ 124 (((_tid) == 1) || ((_tid) == 2)) ? IEEE80211_AC_BK : \ 125 (((_tid) == 4) || ((_tid) == 5)) ? IEEE80211_AC_VI : \ 126 IEEE80211_AC_VO) 127 128 #define ATH_AGGR_DELIM_SZ 4 129 #define ATH_AGGR_MINPLEN 256 /* in bytes, minimum packet length */ 130 /* number of delimiters for encryption padding */ 131 #define ATH_AGGR_ENCRYPTDELIM 10 132 /* minimum h/w qdepth to be sustained to maximize aggregation */ 133 #define ATH_AGGR_MIN_QDEPTH 2 134 /* minimum h/w qdepth for non-aggregated traffic */ 135 #define ATH_NON_AGGR_MIN_QDEPTH 8 136 137 #define IEEE80211_SEQ_SEQ_SHIFT 4 138 #define IEEE80211_SEQ_MAX 4096 139 #define IEEE80211_WEP_IVLEN 3 140 #define IEEE80211_WEP_KIDLEN 1 141 #define IEEE80211_WEP_CRCLEN 4 142 #define IEEE80211_MAX_MPDU_LEN (3840 + FCS_LEN + \ 143 (IEEE80211_WEP_IVLEN + \ 144 IEEE80211_WEP_KIDLEN + \ 145 IEEE80211_WEP_CRCLEN)) 146 147 /* return whether a bit at index _n in bitmap _bm is set 148 * _sz is the size of the bitmap */ 149 #define ATH_BA_ISSET(_bm, _n) (((_n) < (WME_BA_BMP_SIZE)) && \ 150 ((_bm)[(_n) >> 5] & (1 << ((_n) & 31)))) 151 152 /* return block-ack bitmap index given sequence and starting sequence */ 153 #define ATH_BA_INDEX(_st, _seq) (((_seq) - (_st)) & (IEEE80211_SEQ_MAX - 1)) 154 155 /* return the seqno for _start + _offset */ 156 #define ATH_BA_INDEX2SEQ(_seq, _offset) (((_seq) + (_offset)) & (IEEE80211_SEQ_MAX - 1)) 157 158 /* returns delimiter padding required given the packet length */ 159 #define ATH_AGGR_GET_NDELIM(_len) \ 160 (((_len) >= ATH_AGGR_MINPLEN) ? 0 : \ 161 DIV_ROUND_UP(ATH_AGGR_MINPLEN - (_len), ATH_AGGR_DELIM_SZ)) 162 163 #define BAW_WITHIN(_start, _bawsz, _seqno) \ 164 ((((_seqno) - (_start)) & 4095) < (_bawsz)) 165 166 #define ATH_AN_2_TID(_an, _tidno) (&(_an)->tid[(_tidno)]) 167 168 #define IS_CCK_RATE(rate) ((rate >= 0x18) && (rate <= 0x1e)) 169 170 #define ATH_TX_COMPLETE_POLL_INT 1000 171 172 #define ATH_TXFIFO_DEPTH 8 173 struct ath_txq { 174 int mac80211_qnum; /* mac80211 queue number, -1 means not mac80211 Q */ 175 u32 axq_qnum; /* ath9k hardware queue number */ 176 void *axq_link; 177 struct list_head axq_q; 178 spinlock_t axq_lock; 179 u32 axq_depth; 180 u32 axq_ampdu_depth; 181 bool stopped; 182 bool axq_tx_inprogress; 183 struct list_head axq_acq; 184 struct list_head txq_fifo[ATH_TXFIFO_DEPTH]; 185 u8 txq_headidx; 186 u8 txq_tailidx; 187 int pending_frames; 188 struct sk_buff_head complete_q; 189 }; 190 191 struct ath_atx_ac { 192 struct ath_txq *txq; 193 struct list_head list; 194 struct list_head tid_q; 195 bool clear_ps_filter; 196 bool sched; 197 }; 198 199 struct ath_frame_info { 200 struct ath_buf *bf; 201 int framelen; 202 enum ath9k_key_type keytype; 203 u8 keyix; 204 u8 rtscts_rate; 205 u8 retries : 7; 206 u8 baw_tracked : 1; 207 }; 208 209 struct ath_rxbuf { 210 struct list_head list; 211 struct sk_buff *bf_mpdu; 212 void *bf_desc; 213 dma_addr_t bf_daddr; 214 dma_addr_t bf_buf_addr; 215 }; 216 217 struct ath_buf_state { 218 u8 bf_type; 219 u8 bfs_paprd; 220 u8 ndelim; 221 bool stale; 222 u16 seqno; 223 unsigned long bfs_paprd_timestamp; 224 }; 225 226 struct ath_buf { 227 struct list_head list; 228 struct ath_buf *bf_lastbf; /* last buf of this unit (a frame or 229 an aggregate) */ 230 struct ath_buf *bf_next; /* next subframe in the aggregate */ 231 struct sk_buff *bf_mpdu; /* enclosing frame structure */ 232 void *bf_desc; /* virtual addr of desc */ 233 dma_addr_t bf_daddr; /* physical addr of desc */ 234 dma_addr_t bf_buf_addr; /* physical addr of data buffer, for DMA */ 235 struct ieee80211_tx_rate rates[4]; 236 struct ath_buf_state bf_state; 237 }; 238 239 struct ath_atx_tid { 240 struct list_head list; 241 struct sk_buff_head buf_q; 242 struct sk_buff_head retry_q; 243 struct ath_node *an; 244 struct ath_atx_ac *ac; 245 unsigned long tx_buf[BITS_TO_LONGS(ATH_TID_MAX_BUFS)]; 246 u16 seq_start; 247 u16 seq_next; 248 u16 baw_size; 249 u8 tidno; 250 int baw_head; /* first un-acked tx buffer */ 251 int baw_tail; /* next unused tx buffer slot */ 252 253 s8 bar_index; 254 bool sched; 255 bool paused; 256 bool active; 257 }; 258 259 struct ath_node { 260 struct ath_softc *sc; 261 struct ieee80211_sta *sta; /* station struct we're part of */ 262 struct ieee80211_vif *vif; /* interface with which we're associated */ 263 struct ath_atx_tid tid[IEEE80211_NUM_TIDS]; 264 struct ath_atx_ac ac[IEEE80211_NUM_ACS]; 265 266 u16 maxampdu; 267 u8 mpdudensity; 268 s8 ps_key; 269 270 bool sleeping; 271 bool no_ps_filter; 272 }; 273 274 struct ath_tx_control { 275 struct ath_txq *txq; 276 struct ath_node *an; 277 u8 paprd; 278 struct ieee80211_sta *sta; 279 }; 280 281 #define ATH_TX_ERROR 0x01 282 283 /** 284 * @txq_map: Index is mac80211 queue number. This is 285 * not necessarily the same as the hardware queue number 286 * (axq_qnum). 287 */ 288 struct ath_tx { 289 u16 seq_no; 290 u32 txqsetup; 291 spinlock_t txbuflock; 292 struct list_head txbuf; 293 struct ath_txq txq[ATH9K_NUM_TX_QUEUES]; 294 struct ath_descdma txdma; 295 struct ath_txq *txq_map[IEEE80211_NUM_ACS]; 296 struct ath_txq *uapsdq; 297 u32 txq_max_pending[IEEE80211_NUM_ACS]; 298 u16 max_aggr_framelen[IEEE80211_NUM_ACS][4][32]; 299 }; 300 301 struct ath_rx_edma { 302 struct sk_buff_head rx_fifo; 303 u32 rx_fifo_hwsize; 304 }; 305 306 struct ath_rx { 307 u8 defant; 308 u8 rxotherant; 309 bool discard_next; 310 u32 *rxlink; 311 u32 num_pkts; 312 unsigned int rxfilter; 313 struct list_head rxbuf; 314 struct ath_descdma rxdma; 315 struct ath_rx_edma rx_edma[ATH9K_RX_QUEUE_MAX]; 316 317 struct ath_rxbuf *buf_hold; 318 struct sk_buff *frag; 319 320 u32 ampdu_ref; 321 }; 322 323 int ath_startrecv(struct ath_softc *sc); 324 bool ath_stoprecv(struct ath_softc *sc); 325 u32 ath_calcrxfilter(struct ath_softc *sc); 326 int ath_rx_init(struct ath_softc *sc, int nbufs); 327 void ath_rx_cleanup(struct ath_softc *sc); 328 int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp); 329 struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype); 330 void ath_txq_lock(struct ath_softc *sc, struct ath_txq *txq); 331 void ath_txq_unlock(struct ath_softc *sc, struct ath_txq *txq); 332 void ath_txq_unlock_complete(struct ath_softc *sc, struct ath_txq *txq); 333 void ath_tx_cleanupq(struct ath_softc *sc, struct ath_txq *txq); 334 bool ath_drain_all_txq(struct ath_softc *sc); 335 void ath_draintxq(struct ath_softc *sc, struct ath_txq *txq); 336 void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an); 337 void ath_tx_node_cleanup(struct ath_softc *sc, struct ath_node *an); 338 void ath_txq_schedule(struct ath_softc *sc, struct ath_txq *txq); 339 int ath_tx_init(struct ath_softc *sc, int nbufs); 340 int ath_txq_update(struct ath_softc *sc, int qnum, 341 struct ath9k_tx_queue_info *q); 342 void ath_update_max_aggr_framelen(struct ath_softc *sc, int queue, int txop); 343 int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb, 344 struct ath_tx_control *txctl); 345 void ath_tx_cabq(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 346 struct sk_buff *skb); 347 void ath_tx_tasklet(struct ath_softc *sc); 348 void ath_tx_edma_tasklet(struct ath_softc *sc); 349 int ath_tx_aggr_start(struct ath_softc *sc, struct ieee80211_sta *sta, 350 u16 tid, u16 *ssn); 351 void ath_tx_aggr_stop(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid); 352 void ath_tx_aggr_resume(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid); 353 354 void ath_tx_aggr_wakeup(struct ath_softc *sc, struct ath_node *an); 355 void ath_tx_aggr_sleep(struct ieee80211_sta *sta, struct ath_softc *sc, 356 struct ath_node *an); 357 void ath9k_release_buffered_frames(struct ieee80211_hw *hw, 358 struct ieee80211_sta *sta, 359 u16 tids, int nframes, 360 enum ieee80211_frame_release_type reason, 361 bool more_data); 362 363 /********/ 364 /* VIFs */ 365 /********/ 366 367 struct ath_vif { 368 struct ath_node mcast_node; 369 int av_bslot; 370 bool primary_sta_vif; 371 __le64 tsf_adjust; /* TSF adjustment for staggered beacons */ 372 struct ath_buf *av_bcbuf; 373 }; 374 375 /*******************/ 376 /* Beacon Handling */ 377 /*******************/ 378 379 /* 380 * Regardless of the number of beacons we stagger, (i.e. regardless of the 381 * number of BSSIDs) if a given beacon does not go out even after waiting this 382 * number of beacon intervals, the game's up. 383 */ 384 #define BSTUCK_THRESH 9 385 #define ATH_BCBUF 8 386 #define ATH_DEFAULT_BINTVAL 100 /* TU */ 387 #define ATH_DEFAULT_BMISS_LIMIT 10 388 #define IEEE80211_MS_TO_TU(x) (((x) * 1000) / 1024) 389 390 struct ath_beacon_config { 391 int beacon_interval; 392 u16 listen_interval; 393 u16 dtim_period; 394 u16 bmiss_timeout; 395 u8 dtim_count; 396 bool enable_beacon; 397 bool ibss_creator; 398 }; 399 400 struct ath_beacon { 401 enum { 402 OK, /* no change needed */ 403 UPDATE, /* update pending */ 404 COMMIT /* beacon sent, commit change */ 405 } updateslot; /* slot time update fsm */ 406 407 u32 beaconq; 408 u32 bmisscnt; 409 u32 bc_tstamp; 410 struct ieee80211_vif *bslot[ATH_BCBUF]; 411 int slottime; 412 int slotupdate; 413 struct ath9k_tx_queue_info beacon_qi; 414 struct ath_descdma bdma; 415 struct ath_txq *cabq; 416 struct list_head bbuf; 417 418 bool tx_processed; 419 bool tx_last; 420 }; 421 422 void ath9k_beacon_tasklet(unsigned long data); 423 bool ath9k_allow_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif); 424 void ath9k_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif, 425 u32 changed); 426 void ath9k_beacon_assign_slot(struct ath_softc *sc, struct ieee80211_vif *vif); 427 void ath9k_beacon_remove_slot(struct ath_softc *sc, struct ieee80211_vif *vif); 428 void ath9k_set_tsfadjust(struct ath_softc *sc, struct ieee80211_vif *vif); 429 void ath9k_set_beacon(struct ath_softc *sc); 430 bool ath9k_csa_is_finished(struct ath_softc *sc); 431 432 /*******************/ 433 /* Link Monitoring */ 434 /*******************/ 435 436 #define ATH_STA_SHORT_CALINTERVAL 1000 /* 1 second */ 437 #define ATH_AP_SHORT_CALINTERVAL 100 /* 100 ms */ 438 #define ATH_ANI_POLLINTERVAL_OLD 100 /* 100 ms */ 439 #define ATH_ANI_POLLINTERVAL_NEW 1000 /* 1000 ms */ 440 #define ATH_LONG_CALINTERVAL_INT 1000 /* 1000 ms */ 441 #define ATH_LONG_CALINTERVAL 30000 /* 30 seconds */ 442 #define ATH_RESTART_CALINTERVAL 1200000 /* 20 minutes */ 443 #define ATH_ANI_MAX_SKIP_COUNT 10 444 445 #define ATH_PAPRD_TIMEOUT 100 /* msecs */ 446 #define ATH_PLL_WORK_INTERVAL 100 447 448 void ath_tx_complete_poll_work(struct work_struct *work); 449 void ath_reset_work(struct work_struct *work); 450 void ath_hw_check(struct work_struct *work); 451 void ath_hw_pll_work(struct work_struct *work); 452 void ath_rx_poll(unsigned long data); 453 void ath_start_rx_poll(struct ath_softc *sc, u8 nbeacon); 454 void ath_paprd_calibrate(struct work_struct *work); 455 void ath_ani_calibrate(unsigned long data); 456 void ath_start_ani(struct ath_softc *sc); 457 void ath_stop_ani(struct ath_softc *sc); 458 void ath_check_ani(struct ath_softc *sc); 459 int ath_update_survey_stats(struct ath_softc *sc); 460 void ath_update_survey_nf(struct ath_softc *sc, int channel); 461 void ath9k_queue_reset(struct ath_softc *sc, enum ath_reset_type type); 462 463 /**********/ 464 /* BTCOEX */ 465 /**********/ 466 467 #define ATH_DUMP_BTCOEX(_s, _val) \ 468 do { \ 469 len += scnprintf(buf + len, size - len, \ 470 "%20s : %10d\n", _s, (_val)); \ 471 } while (0) 472 473 enum bt_op_flags { 474 BT_OP_PRIORITY_DETECTED, 475 BT_OP_SCAN, 476 }; 477 478 struct ath_btcoex { 479 bool hw_timer_enabled; 480 spinlock_t btcoex_lock; 481 struct timer_list period_timer; /* Timer for BT period */ 482 u32 bt_priority_cnt; 483 unsigned long bt_priority_time; 484 unsigned long op_flags; 485 int bt_stomp_type; /* Types of BT stomping */ 486 u32 btcoex_no_stomp; /* in usec */ 487 u32 btcoex_period; /* in msec */ 488 u32 btscan_no_stomp; /* in usec */ 489 u32 duty_cycle; 490 u32 bt_wait_time; 491 int rssi_count; 492 struct ath_gen_timer *no_stomp_timer; /* Timer for no BT stomping */ 493 struct ath_mci_profile mci; 494 u8 stomp_audio; 495 }; 496 497 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT 498 int ath9k_init_btcoex(struct ath_softc *sc); 499 void ath9k_deinit_btcoex(struct ath_softc *sc); 500 void ath9k_start_btcoex(struct ath_softc *sc); 501 void ath9k_stop_btcoex(struct ath_softc *sc); 502 void ath9k_btcoex_timer_resume(struct ath_softc *sc); 503 void ath9k_btcoex_timer_pause(struct ath_softc *sc); 504 void ath9k_btcoex_handle_interrupt(struct ath_softc *sc, u32 status); 505 u16 ath9k_btcoex_aggr_limit(struct ath_softc *sc, u32 max_4ms_framelen); 506 void ath9k_btcoex_stop_gen_timer(struct ath_softc *sc); 507 int ath9k_dump_btcoex(struct ath_softc *sc, u8 *buf, u32 size); 508 #else 509 static inline int ath9k_init_btcoex(struct ath_softc *sc) 510 { 511 return 0; 512 } 513 static inline void ath9k_deinit_btcoex(struct ath_softc *sc) 514 { 515 } 516 static inline void ath9k_start_btcoex(struct ath_softc *sc) 517 { 518 } 519 static inline void ath9k_stop_btcoex(struct ath_softc *sc) 520 { 521 } 522 static inline void ath9k_btcoex_handle_interrupt(struct ath_softc *sc, 523 u32 status) 524 { 525 } 526 static inline u16 ath9k_btcoex_aggr_limit(struct ath_softc *sc, 527 u32 max_4ms_framelen) 528 { 529 return 0; 530 } 531 static inline void ath9k_btcoex_stop_gen_timer(struct ath_softc *sc) 532 { 533 } 534 static inline int ath9k_dump_btcoex(struct ath_softc *sc, u8 *buf, u32 size) 535 { 536 return 0; 537 } 538 #endif /* CONFIG_ATH9K_BTCOEX_SUPPORT */ 539 540 struct ath9k_wow_pattern { 541 u8 pattern_bytes[MAX_PATTERN_SIZE]; 542 u8 mask_bytes[MAX_PATTERN_SIZE]; 543 u32 pattern_len; 544 }; 545 546 /********************/ 547 /* LED Control */ 548 /********************/ 549 550 #define ATH_LED_PIN_DEF 1 551 #define ATH_LED_PIN_9287 8 552 #define ATH_LED_PIN_9300 10 553 #define ATH_LED_PIN_9485 6 554 #define ATH_LED_PIN_9462 4 555 556 #ifdef CONFIG_MAC80211_LEDS 557 void ath_init_leds(struct ath_softc *sc); 558 void ath_deinit_leds(struct ath_softc *sc); 559 void ath_fill_led_pin(struct ath_softc *sc); 560 #else 561 static inline void ath_init_leds(struct ath_softc *sc) 562 { 563 } 564 565 static inline void ath_deinit_leds(struct ath_softc *sc) 566 { 567 } 568 static inline void ath_fill_led_pin(struct ath_softc *sc) 569 { 570 } 571 #endif 572 573 /*******************************/ 574 /* Antenna diversity/combining */ 575 /*******************************/ 576 577 #define ATH_ANT_RX_CURRENT_SHIFT 4 578 #define ATH_ANT_RX_MAIN_SHIFT 2 579 #define ATH_ANT_RX_MASK 0x3 580 581 #define ATH_ANT_DIV_COMB_SHORT_SCAN_INTR 50 582 #define ATH_ANT_DIV_COMB_SHORT_SCAN_PKTCOUNT 0x100 583 #define ATH_ANT_DIV_COMB_MAX_PKTCOUNT 0x200 584 #define ATH_ANT_DIV_COMB_INIT_COUNT 95 585 #define ATH_ANT_DIV_COMB_MAX_COUNT 100 586 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO 30 587 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO2 20 588 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO_LOW_RSSI 50 589 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO2_LOW_RSSI 50 590 591 #define ATH_ANT_DIV_COMB_LNA1_DELTA_HI -4 592 #define ATH_ANT_DIV_COMB_LNA1_DELTA_MID -2 593 #define ATH_ANT_DIV_COMB_LNA1_DELTA_LOW 2 594 595 struct ath_ant_comb { 596 u16 count; 597 u16 total_pkt_count; 598 bool scan; 599 bool scan_not_start; 600 int main_total_rssi; 601 int alt_total_rssi; 602 int alt_recv_cnt; 603 int main_recv_cnt; 604 int rssi_lna1; 605 int rssi_lna2; 606 int rssi_add; 607 int rssi_sub; 608 int rssi_first; 609 int rssi_second; 610 int rssi_third; 611 int ant_ratio; 612 int ant_ratio2; 613 bool alt_good; 614 int quick_scan_cnt; 615 enum ath9k_ant_div_comb_lna_conf main_conf; 616 enum ath9k_ant_div_comb_lna_conf first_quick_scan_conf; 617 enum ath9k_ant_div_comb_lna_conf second_quick_scan_conf; 618 bool first_ratio; 619 bool second_ratio; 620 unsigned long scan_start_time; 621 622 /* 623 * Card-specific config values. 624 */ 625 int low_rssi_thresh; 626 int fast_div_bias; 627 }; 628 629 void ath_ant_comb_scan(struct ath_softc *sc, struct ath_rx_status *rs); 630 631 /********************/ 632 /* Main driver core */ 633 /********************/ 634 635 #define ATH9K_PCI_CUS198 0x0001 636 #define ATH9K_PCI_CUS230 0x0002 637 #define ATH9K_PCI_CUS217 0x0004 638 #define ATH9K_PCI_CUS252 0x0008 639 #define ATH9K_PCI_WOW 0x0010 640 #define ATH9K_PCI_BT_ANT_DIV 0x0020 641 #define ATH9K_PCI_D3_L1_WAR 0x0040 642 #define ATH9K_PCI_AR9565_1ANT 0x0080 643 #define ATH9K_PCI_AR9565_2ANT 0x0100 644 #define ATH9K_PCI_NO_PLL_PWRSAVE 0x0200 645 646 /* 647 * Default cache line size, in bytes. 648 * Used when PCI device not fully initialized by bootrom/BIOS 649 */ 650 #define DEFAULT_CACHELINE 32 651 #define ATH_REGCLASSIDS_MAX 10 652 #define ATH_CABQ_READY_TIME 80 /* % of beacon interval */ 653 #define ATH_MAX_SW_RETRIES 30 654 #define ATH_CHAN_MAX 255 655 656 #define ATH_TXPOWER_MAX 100 /* .5 dBm units */ 657 #define ATH_RATE_DUMMY_MARKER 0 658 659 enum sc_op_flags { 660 SC_OP_INVALID, 661 SC_OP_BEACONS, 662 SC_OP_ANI_RUN, 663 SC_OP_PRIM_STA_VIF, 664 SC_OP_HW_RESET, 665 SC_OP_SCANNING, 666 }; 667 668 /* Powersave flags */ 669 #define PS_WAIT_FOR_BEACON BIT(0) 670 #define PS_WAIT_FOR_CAB BIT(1) 671 #define PS_WAIT_FOR_PSPOLL_DATA BIT(2) 672 #define PS_WAIT_FOR_TX_ACK BIT(3) 673 #define PS_BEACON_SYNC BIT(4) 674 #define PS_WAIT_FOR_ANI BIT(5) 675 676 struct ath_rate_table; 677 678 struct ath9k_vif_iter_data { 679 u8 hw_macaddr[ETH_ALEN]; /* address of the first vif */ 680 u8 mask[ETH_ALEN]; /* bssid mask */ 681 bool has_hw_macaddr; 682 683 int naps; /* number of AP vifs */ 684 int nmeshes; /* number of mesh vifs */ 685 int nstations; /* number of station vifs */ 686 int nwds; /* number of WDS vifs */ 687 int nadhocs; /* number of adhoc vifs */ 688 }; 689 690 /* enum spectral_mode: 691 * 692 * @SPECTRAL_DISABLED: spectral mode is disabled 693 * @SPECTRAL_BACKGROUND: hardware sends samples when it is not busy with 694 * something else. 695 * @SPECTRAL_MANUAL: spectral scan is enabled, triggering for samples 696 * is performed manually. 697 * @SPECTRAL_CHANSCAN: Like manual, but also triggered when changing channels 698 * during a channel scan. 699 */ 700 enum spectral_mode { 701 SPECTRAL_DISABLED = 0, 702 SPECTRAL_BACKGROUND, 703 SPECTRAL_MANUAL, 704 SPECTRAL_CHANSCAN, 705 }; 706 707 struct ath_softc { 708 struct ieee80211_hw *hw; 709 struct device *dev; 710 711 struct survey_info *cur_survey; 712 struct survey_info survey[ATH9K_NUM_CHANNELS]; 713 714 struct tasklet_struct intr_tq; 715 struct tasklet_struct bcon_tasklet; 716 struct ath_hw *sc_ah; 717 void __iomem *mem; 718 int irq; 719 spinlock_t sc_serial_rw; 720 spinlock_t sc_pm_lock; 721 spinlock_t sc_pcu_lock; 722 struct mutex mutex; 723 struct work_struct paprd_work; 724 struct work_struct hw_check_work; 725 struct work_struct hw_reset_work; 726 struct completion paprd_complete; 727 728 unsigned int hw_busy_count; 729 unsigned long sc_flags; 730 unsigned long driver_data; 731 732 u32 intrstatus; 733 u16 ps_flags; /* PS_* */ 734 u16 curtxpow; 735 bool ps_enabled; 736 bool ps_idle; 737 short nbcnvifs; 738 short nvifs; 739 unsigned long ps_usecount; 740 741 struct ath_config config; 742 struct ath_rx rx; 743 struct ath_tx tx; 744 struct ath_beacon beacon; 745 struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS]; 746 747 #ifdef CONFIG_MAC80211_LEDS 748 bool led_registered; 749 char led_name[32]; 750 struct led_classdev led_cdev; 751 #endif 752 753 struct ath9k_hw_cal_data caldata; 754 int last_rssi; 755 756 #ifdef CONFIG_ATH9K_DEBUGFS 757 struct ath9k_debug debug; 758 #endif 759 struct ath_beacon_config cur_beacon_conf; 760 struct delayed_work tx_complete_work; 761 struct delayed_work hw_pll_work; 762 struct timer_list rx_poll_timer; 763 764 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT 765 struct ath_btcoex btcoex; 766 struct ath_mci_coex mci_coex; 767 struct work_struct mci_work; 768 #endif 769 770 struct ath_descdma txsdma; 771 struct ieee80211_vif *csa_vif; 772 773 struct ath_ant_comb ant_comb; 774 u8 ant_tx, ant_rx; 775 struct dfs_pattern_detector *dfs_detector; 776 u32 wow_enabled; 777 /* relay(fs) channel for spectral scan */ 778 struct rchan *rfs_chan_spec_scan; 779 enum spectral_mode spectral_mode; 780 struct ath_spec_scan spec_config; 781 782 struct ieee80211_vif *tx99_vif; 783 struct sk_buff *tx99_skb; 784 bool tx99_state; 785 s16 tx99_power; 786 787 #ifdef CONFIG_PM_SLEEP 788 atomic_t wow_got_bmiss_intr; 789 atomic_t wow_sleep_proc_intr; /* in the middle of WoW sleep ? */ 790 u32 wow_intr_before_sleep; 791 #endif 792 }; 793 794 #define SPECTRAL_SCAN_BITMASK 0x10 795 /* Radar info packet format, used for DFS and spectral formats. */ 796 struct ath_radar_info { 797 u8 pulse_length_pri; 798 u8 pulse_length_ext; 799 u8 pulse_bw_info; 800 } __packed; 801 802 /* The HT20 spectral data has 4 bytes of additional information at it's end. 803 * 804 * [7:0]: all bins {max_magnitude[1:0], bitmap_weight[5:0]} 805 * [7:0]: all bins max_magnitude[9:2] 806 * [7:0]: all bins {max_index[5:0], max_magnitude[11:10]} 807 * [3:0]: max_exp (shift amount to size max bin to 8-bit unsigned) 808 */ 809 struct ath_ht20_mag_info { 810 u8 all_bins[3]; 811 u8 max_exp; 812 } __packed; 813 814 #define SPECTRAL_HT20_NUM_BINS 56 815 816 /* WARNING: don't actually use this struct! MAC may vary the amount of 817 * data by -1/+2. This struct is for reference only. 818 */ 819 struct ath_ht20_fft_packet { 820 u8 data[SPECTRAL_HT20_NUM_BINS]; 821 struct ath_ht20_mag_info mag_info; 822 struct ath_radar_info radar_info; 823 } __packed; 824 825 #define SPECTRAL_HT20_TOTAL_DATA_LEN (sizeof(struct ath_ht20_fft_packet)) 826 827 /* Dynamic 20/40 mode: 828 * 829 * [7:0]: lower bins {max_magnitude[1:0], bitmap_weight[5:0]} 830 * [7:0]: lower bins max_magnitude[9:2] 831 * [7:0]: lower bins {max_index[5:0], max_magnitude[11:10]} 832 * [7:0]: upper bins {max_magnitude[1:0], bitmap_weight[5:0]} 833 * [7:0]: upper bins max_magnitude[9:2] 834 * [7:0]: upper bins {max_index[5:0], max_magnitude[11:10]} 835 * [3:0]: max_exp (shift amount to size max bin to 8-bit unsigned) 836 */ 837 struct ath_ht20_40_mag_info { 838 u8 lower_bins[3]; 839 u8 upper_bins[3]; 840 u8 max_exp; 841 } __packed; 842 843 #define SPECTRAL_HT20_40_NUM_BINS 128 844 845 /* WARNING: don't actually use this struct! MAC may vary the amount of 846 * data. This struct is for reference only. 847 */ 848 struct ath_ht20_40_fft_packet { 849 u8 data[SPECTRAL_HT20_40_NUM_BINS]; 850 struct ath_ht20_40_mag_info mag_info; 851 struct ath_radar_info radar_info; 852 } __packed; 853 854 855 #define SPECTRAL_HT20_40_TOTAL_DATA_LEN (sizeof(struct ath_ht20_40_fft_packet)) 856 857 /* grabs the max magnitude from the all/upper/lower bins */ 858 static inline u16 spectral_max_magnitude(u8 *bins) 859 { 860 return (bins[0] & 0xc0) >> 6 | 861 (bins[1] & 0xff) << 2 | 862 (bins[2] & 0x03) << 10; 863 } 864 865 /* return the max magnitude from the all/upper/lower bins */ 866 static inline u8 spectral_max_index(u8 *bins) 867 { 868 s8 m = (bins[2] & 0xfc) >> 2; 869 870 /* TODO: this still doesn't always report the right values ... */ 871 if (m > 32) 872 m |= 0xe0; 873 else 874 m &= ~0xe0; 875 876 return m + 29; 877 } 878 879 /* return the bitmap weight from the all/upper/lower bins */ 880 static inline u8 spectral_bitmap_weight(u8 *bins) 881 { 882 return bins[0] & 0x3f; 883 } 884 885 /* FFT sample format given to userspace via debugfs. 886 * 887 * Please keep the type/length at the front position and change 888 * other fields after adding another sample type 889 * 890 * TODO: this might need rework when switching to nl80211-based 891 * interface. 892 */ 893 enum ath_fft_sample_type { 894 ATH_FFT_SAMPLE_HT20 = 1, 895 ATH_FFT_SAMPLE_HT20_40, 896 }; 897 898 struct fft_sample_tlv { 899 u8 type; /* see ath_fft_sample */ 900 __be16 length; 901 /* type dependent data follows */ 902 } __packed; 903 904 struct fft_sample_ht20 { 905 struct fft_sample_tlv tlv; 906 907 u8 max_exp; 908 909 __be16 freq; 910 s8 rssi; 911 s8 noise; 912 913 __be16 max_magnitude; 914 u8 max_index; 915 u8 bitmap_weight; 916 917 __be64 tsf; 918 919 u8 data[SPECTRAL_HT20_NUM_BINS]; 920 } __packed; 921 922 struct fft_sample_ht20_40 { 923 struct fft_sample_tlv tlv; 924 925 u8 channel_type; 926 __be16 freq; 927 928 s8 lower_rssi; 929 s8 upper_rssi; 930 931 __be64 tsf; 932 933 s8 lower_noise; 934 s8 upper_noise; 935 936 __be16 lower_max_magnitude; 937 __be16 upper_max_magnitude; 938 939 u8 lower_max_index; 940 u8 upper_max_index; 941 942 u8 lower_bitmap_weight; 943 u8 upper_bitmap_weight; 944 945 u8 max_exp; 946 947 u8 data[SPECTRAL_HT20_40_NUM_BINS]; 948 } __packed; 949 950 int ath9k_tx99_init(struct ath_softc *sc); 951 void ath9k_tx99_deinit(struct ath_softc *sc); 952 int ath9k_tx99_send(struct ath_softc *sc, struct sk_buff *skb, 953 struct ath_tx_control *txctl); 954 955 void ath9k_tasklet(unsigned long data); 956 int ath_cabq_update(struct ath_softc *); 957 958 static inline void ath_read_cachesize(struct ath_common *common, int *csz) 959 { 960 common->bus_ops->read_cachesize(common, csz); 961 } 962 963 extern struct ieee80211_ops ath9k_ops; 964 extern int ath9k_modparam_nohwcrypt; 965 extern int led_blink; 966 extern bool is_ath9k_unloaded; 967 968 u8 ath9k_parse_mpdudensity(u8 mpdudensity); 969 irqreturn_t ath_isr(int irq, void *dev); 970 int ath9k_init_device(u16 devid, struct ath_softc *sc, 971 const struct ath_bus_ops *bus_ops); 972 void ath9k_deinit_device(struct ath_softc *sc); 973 void ath9k_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw); 974 void ath9k_reload_chainmask_settings(struct ath_softc *sc); 975 976 void ath9k_spectral_scan_trigger(struct ieee80211_hw *hw); 977 int ath9k_spectral_scan_config(struct ieee80211_hw *hw, 978 enum spectral_mode spectral_mode); 979 980 981 #ifdef CONFIG_ATH9K_PCI 982 int ath_pci_init(void); 983 void ath_pci_exit(void); 984 #else 985 static inline int ath_pci_init(void) { return 0; }; 986 static inline void ath_pci_exit(void) {}; 987 #endif 988 989 #ifdef CONFIG_ATH9K_AHB 990 int ath_ahb_init(void); 991 void ath_ahb_exit(void); 992 #else 993 static inline int ath_ahb_init(void) { return 0; }; 994 static inline void ath_ahb_exit(void) {}; 995 #endif 996 997 void ath9k_ps_wakeup(struct ath_softc *sc); 998 void ath9k_ps_restore(struct ath_softc *sc); 999 1000 u8 ath_txchainmask_reduction(struct ath_softc *sc, u8 chainmask, u32 rate); 1001 1002 void ath_start_rfkill_poll(struct ath_softc *sc); 1003 void ath9k_rfkill_poll_state(struct ieee80211_hw *hw); 1004 void ath9k_calculate_iter_data(struct ieee80211_hw *hw, 1005 struct ieee80211_vif *vif, 1006 struct ath9k_vif_iter_data *iter_data); 1007 1008 #endif /* ATH9K_H */ 1009