1 2 /* 3 * Copyright (c) 2011 Atheros Communications Inc. 4 * Copyright (c) 2011-2012 Qualcomm Atheros, Inc. 5 * 6 * Permission to use, copy, modify, and/or distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 20 21 #include <linux/moduleparam.h> 22 #include <linux/errno.h> 23 #include <linux/export.h> 24 #include <linux/of.h> 25 #include <linux/mmc/sdio_func.h> 26 #include <linux/vmalloc.h> 27 28 #include "core.h" 29 #include "cfg80211.h" 30 #include "target.h" 31 #include "debug.h" 32 #include "hif-ops.h" 33 #include "htc-ops.h" 34 35 static const struct ath6kl_hw hw_list[] = { 36 { 37 .id = AR6003_HW_2_0_VERSION, 38 .name = "ar6003 hw 2.0", 39 .dataset_patch_addr = 0x57e884, 40 .app_load_addr = 0x543180, 41 .board_ext_data_addr = 0x57e500, 42 .reserved_ram_size = 6912, 43 .refclk_hz = 26000000, 44 .uarttx_pin = 8, 45 46 /* hw2.0 needs override address hardcoded */ 47 .app_start_override_addr = 0x944C00, 48 49 .fw = { 50 .dir = AR6003_HW_2_0_FW_DIR, 51 .otp = AR6003_HW_2_0_OTP_FILE, 52 .fw = AR6003_HW_2_0_FIRMWARE_FILE, 53 .tcmd = AR6003_HW_2_0_TCMD_FIRMWARE_FILE, 54 .patch = AR6003_HW_2_0_PATCH_FILE, 55 }, 56 57 .fw_board = AR6003_HW_2_0_BOARD_DATA_FILE, 58 .fw_default_board = AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE, 59 }, 60 { 61 .id = AR6003_HW_2_1_1_VERSION, 62 .name = "ar6003 hw 2.1.1", 63 .dataset_patch_addr = 0x57ff74, 64 .app_load_addr = 0x1234, 65 .board_ext_data_addr = 0x542330, 66 .reserved_ram_size = 512, 67 .refclk_hz = 26000000, 68 .uarttx_pin = 8, 69 .testscript_addr = 0x57ef74, 70 71 .fw = { 72 .dir = AR6003_HW_2_1_1_FW_DIR, 73 .otp = AR6003_HW_2_1_1_OTP_FILE, 74 .fw = AR6003_HW_2_1_1_FIRMWARE_FILE, 75 .tcmd = AR6003_HW_2_1_1_TCMD_FIRMWARE_FILE, 76 .patch = AR6003_HW_2_1_1_PATCH_FILE, 77 .utf = AR6003_HW_2_1_1_UTF_FIRMWARE_FILE, 78 .testscript = AR6003_HW_2_1_1_TESTSCRIPT_FILE, 79 }, 80 81 .fw_board = AR6003_HW_2_1_1_BOARD_DATA_FILE, 82 .fw_default_board = AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE, 83 }, 84 { 85 .id = AR6004_HW_1_0_VERSION, 86 .name = "ar6004 hw 1.0", 87 .dataset_patch_addr = 0x57e884, 88 .app_load_addr = 0x1234, 89 .board_ext_data_addr = 0x437000, 90 .reserved_ram_size = 19456, 91 .board_addr = 0x433900, 92 .refclk_hz = 26000000, 93 .uarttx_pin = 11, 94 95 .fw = { 96 .dir = AR6004_HW_1_0_FW_DIR, 97 .fw = AR6004_HW_1_0_FIRMWARE_FILE, 98 }, 99 100 .fw_board = AR6004_HW_1_0_BOARD_DATA_FILE, 101 .fw_default_board = AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE, 102 }, 103 { 104 .id = AR6004_HW_1_1_VERSION, 105 .name = "ar6004 hw 1.1", 106 .dataset_patch_addr = 0x57e884, 107 .app_load_addr = 0x1234, 108 .board_ext_data_addr = 0x437000, 109 .reserved_ram_size = 11264, 110 .board_addr = 0x43d400, 111 .refclk_hz = 40000000, 112 .uarttx_pin = 11, 113 114 .fw = { 115 .dir = AR6004_HW_1_1_FW_DIR, 116 .fw = AR6004_HW_1_1_FIRMWARE_FILE, 117 }, 118 119 .fw_board = AR6004_HW_1_1_BOARD_DATA_FILE, 120 .fw_default_board = AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE, 121 }, 122 }; 123 124 /* 125 * Include definitions here that can be used to tune the WLAN module 126 * behavior. Different customers can tune the behavior as per their needs, 127 * here. 128 */ 129 130 /* 131 * This configuration item enable/disable keepalive support. 132 * Keepalive support: In the absence of any data traffic to AP, null 133 * frames will be sent to the AP at periodic interval, to keep the association 134 * active. This configuration item defines the periodic interval. 135 * Use value of zero to disable keepalive support 136 * Default: 60 seconds 137 */ 138 #define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60 139 140 /* 141 * This configuration item sets the value of disconnect timeout 142 * Firmware delays sending the disconnec event to the host for this 143 * timeout after is gets disconnected from the current AP. 144 * If the firmware successly roams within the disconnect timeout 145 * it sends a new connect event 146 */ 147 #define WLAN_CONFIG_DISCONNECT_TIMEOUT 10 148 149 150 #define ATH6KL_DATA_OFFSET 64 151 struct sk_buff *ath6kl_buf_alloc(int size) 152 { 153 struct sk_buff *skb; 154 u16 reserved; 155 156 /* Add chacheline space at front and back of buffer */ 157 reserved = (2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET + 158 sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES; 159 skb = dev_alloc_skb(size + reserved); 160 161 if (skb) 162 skb_reserve(skb, reserved - L1_CACHE_BYTES); 163 return skb; 164 } 165 166 void ath6kl_init_profile_info(struct ath6kl_vif *vif) 167 { 168 vif->ssid_len = 0; 169 memset(vif->ssid, 0, sizeof(vif->ssid)); 170 171 vif->dot11_auth_mode = OPEN_AUTH; 172 vif->auth_mode = NONE_AUTH; 173 vif->prwise_crypto = NONE_CRYPT; 174 vif->prwise_crypto_len = 0; 175 vif->grp_crypto = NONE_CRYPT; 176 vif->grp_crypto_len = 0; 177 memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list)); 178 memset(vif->req_bssid, 0, sizeof(vif->req_bssid)); 179 memset(vif->bssid, 0, sizeof(vif->bssid)); 180 vif->bss_ch = 0; 181 } 182 183 static int ath6kl_set_host_app_area(struct ath6kl *ar) 184 { 185 u32 address, data; 186 struct host_app_area host_app_area; 187 188 /* Fetch the address of the host_app_area_s 189 * instance in the host interest area */ 190 address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest)); 191 address = TARG_VTOP(ar->target_type, address); 192 193 if (ath6kl_diag_read32(ar, address, &data)) 194 return -EIO; 195 196 address = TARG_VTOP(ar->target_type, data); 197 host_app_area.wmi_protocol_ver = cpu_to_le32(WMI_PROTOCOL_VERSION); 198 if (ath6kl_diag_write(ar, address, (u8 *) &host_app_area, 199 sizeof(struct host_app_area))) 200 return -EIO; 201 202 return 0; 203 } 204 205 static inline void set_ac2_ep_map(struct ath6kl *ar, 206 u8 ac, 207 enum htc_endpoint_id ep) 208 { 209 ar->ac2ep_map[ac] = ep; 210 ar->ep2ac_map[ep] = ac; 211 } 212 213 /* connect to a service */ 214 static int ath6kl_connectservice(struct ath6kl *ar, 215 struct htc_service_connect_req *con_req, 216 char *desc) 217 { 218 int status; 219 struct htc_service_connect_resp response; 220 221 memset(&response, 0, sizeof(response)); 222 223 status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response); 224 if (status) { 225 ath6kl_err("failed to connect to %s service status:%d\n", 226 desc, status); 227 return status; 228 } 229 230 switch (con_req->svc_id) { 231 case WMI_CONTROL_SVC: 232 if (test_bit(WMI_ENABLED, &ar->flag)) 233 ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint); 234 ar->ctrl_ep = response.endpoint; 235 break; 236 case WMI_DATA_BE_SVC: 237 set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint); 238 break; 239 case WMI_DATA_BK_SVC: 240 set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint); 241 break; 242 case WMI_DATA_VI_SVC: 243 set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint); 244 break; 245 case WMI_DATA_VO_SVC: 246 set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint); 247 break; 248 default: 249 ath6kl_err("service id is not mapped %d\n", con_req->svc_id); 250 return -EINVAL; 251 } 252 253 return 0; 254 } 255 256 static int ath6kl_init_service_ep(struct ath6kl *ar) 257 { 258 struct htc_service_connect_req connect; 259 260 memset(&connect, 0, sizeof(connect)); 261 262 /* these fields are the same for all service endpoints */ 263 connect.ep_cb.tx_comp_multi = ath6kl_tx_complete; 264 connect.ep_cb.rx = ath6kl_rx; 265 connect.ep_cb.rx_refill = ath6kl_rx_refill; 266 connect.ep_cb.tx_full = ath6kl_tx_queue_full; 267 268 /* 269 * Set the max queue depth so that our ath6kl_tx_queue_full handler 270 * gets called. 271 */ 272 connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH; 273 connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4; 274 if (!connect.ep_cb.rx_refill_thresh) 275 connect.ep_cb.rx_refill_thresh++; 276 277 /* connect to control service */ 278 connect.svc_id = WMI_CONTROL_SVC; 279 if (ath6kl_connectservice(ar, &connect, "WMI CONTROL")) 280 return -EIO; 281 282 connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN; 283 284 /* 285 * Limit the HTC message size on the send path, although e can 286 * receive A-MSDU frames of 4K, we will only send ethernet-sized 287 * (802.3) frames on the send path. 288 */ 289 connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH; 290 291 /* 292 * To reduce the amount of committed memory for larger A_MSDU 293 * frames, use the recv-alloc threshold mechanism for larger 294 * packets. 295 */ 296 connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE; 297 connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf; 298 299 /* 300 * For the remaining data services set the connection flag to 301 * reduce dribbling, if configured to do so. 302 */ 303 connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB; 304 connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK; 305 connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF; 306 307 connect.svc_id = WMI_DATA_BE_SVC; 308 309 if (ath6kl_connectservice(ar, &connect, "WMI DATA BE")) 310 return -EIO; 311 312 /* connect to back-ground map this to WMI LOW_PRI */ 313 connect.svc_id = WMI_DATA_BK_SVC; 314 if (ath6kl_connectservice(ar, &connect, "WMI DATA BK")) 315 return -EIO; 316 317 /* connect to Video service, map this to to HI PRI */ 318 connect.svc_id = WMI_DATA_VI_SVC; 319 if (ath6kl_connectservice(ar, &connect, "WMI DATA VI")) 320 return -EIO; 321 322 /* 323 * Connect to VO service, this is currently not mapped to a WMI 324 * priority stream due to historical reasons. WMI originally 325 * defined 3 priorities over 3 mailboxes We can change this when 326 * WMI is reworked so that priorities are not dependent on 327 * mailboxes. 328 */ 329 connect.svc_id = WMI_DATA_VO_SVC; 330 if (ath6kl_connectservice(ar, &connect, "WMI DATA VO")) 331 return -EIO; 332 333 return 0; 334 } 335 336 void ath6kl_init_control_info(struct ath6kl_vif *vif) 337 { 338 ath6kl_init_profile_info(vif); 339 vif->def_txkey_index = 0; 340 memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list)); 341 vif->ch_hint = 0; 342 } 343 344 /* 345 * Set HTC/Mbox operational parameters, this can only be called when the 346 * target is in the BMI phase. 347 */ 348 static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val, 349 u8 htc_ctrl_buf) 350 { 351 int status; 352 u32 blk_size; 353 354 blk_size = ar->mbox_info.block_size; 355 356 if (htc_ctrl_buf) 357 blk_size |= ((u32)htc_ctrl_buf) << 16; 358 359 /* set the host interest area for the block size */ 360 status = ath6kl_bmi_write_hi32(ar, hi_mbox_io_block_sz, blk_size); 361 if (status) { 362 ath6kl_err("bmi_write_memory for IO block size failed\n"); 363 goto out; 364 } 365 366 ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n", 367 blk_size, 368 ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz))); 369 370 if (mbox_isr_yield_val) { 371 /* set the host interest area for the mbox ISR yield limit */ 372 status = ath6kl_bmi_write_hi32(ar, hi_mbox_isr_yield_limit, 373 mbox_isr_yield_val); 374 if (status) { 375 ath6kl_err("bmi_write_memory for yield limit failed\n"); 376 goto out; 377 } 378 } 379 380 out: 381 return status; 382 } 383 384 static int ath6kl_target_config_wlan_params(struct ath6kl *ar, int idx) 385 { 386 int ret; 387 388 /* 389 * Configure the device for rx dot11 header rules. "0,0" are the 390 * default values. Required if checksum offload is needed. Set 391 * RxMetaVersion to 2. 392 */ 393 ret = ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi, idx, 394 ar->rx_meta_ver, 0, 0); 395 if (ret) { 396 ath6kl_err("unable to set the rx frame format: %d\n", ret); 397 return ret; 398 } 399 400 if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN) { 401 ret = ath6kl_wmi_pmparams_cmd(ar->wmi, idx, 0, 1, 0, 0, 1, 402 IGNORE_PS_FAIL_DURING_SCAN); 403 if (ret) { 404 ath6kl_err("unable to set power save fail event policy: %d\n", 405 ret); 406 return ret; 407 } 408 } 409 410 if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER)) { 411 ret = ath6kl_wmi_set_lpreamble_cmd(ar->wmi, idx, 0, 412 WMI_FOLLOW_BARKER_IN_ERP); 413 if (ret) { 414 ath6kl_err("unable to set barker preamble policy: %d\n", 415 ret); 416 return ret; 417 } 418 } 419 420 ret = ath6kl_wmi_set_keepalive_cmd(ar->wmi, idx, 421 WLAN_CONFIG_KEEP_ALIVE_INTERVAL); 422 if (ret) { 423 ath6kl_err("unable to set keep alive interval: %d\n", ret); 424 return ret; 425 } 426 427 ret = ath6kl_wmi_disctimeout_cmd(ar->wmi, idx, 428 WLAN_CONFIG_DISCONNECT_TIMEOUT); 429 if (ret) { 430 ath6kl_err("unable to set disconnect timeout: %d\n", ret); 431 return ret; 432 } 433 434 if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST)) { 435 ret = ath6kl_wmi_set_wmm_txop(ar->wmi, idx, WMI_TXOP_DISABLED); 436 if (ret) { 437 ath6kl_err("unable to set txop bursting: %d\n", ret); 438 return ret; 439 } 440 } 441 442 if (ar->p2p && (ar->vif_max == 1 || idx)) { 443 ret = ath6kl_wmi_info_req_cmd(ar->wmi, idx, 444 P2P_FLAG_CAPABILITIES_REQ | 445 P2P_FLAG_MACADDR_REQ | 446 P2P_FLAG_HMODEL_REQ); 447 if (ret) { 448 ath6kl_dbg(ATH6KL_DBG_TRC, "failed to request P2P " 449 "capabilities (%d) - assuming P2P not " 450 "supported\n", ret); 451 ar->p2p = false; 452 } 453 } 454 455 if (ar->p2p && (ar->vif_max == 1 || idx)) { 456 /* Enable Probe Request reporting for P2P */ 457 ret = ath6kl_wmi_probe_report_req_cmd(ar->wmi, idx, true); 458 if (ret) { 459 ath6kl_dbg(ATH6KL_DBG_TRC, "failed to enable Probe " 460 "Request reporting (%d)\n", ret); 461 } 462 } 463 464 return ret; 465 } 466 467 int ath6kl_configure_target(struct ath6kl *ar) 468 { 469 u32 param, ram_reserved_size; 470 u8 fw_iftype, fw_mode = 0, fw_submode = 0; 471 int i, status; 472 473 param = !!(ar->conf_flags & ATH6KL_CONF_UART_DEBUG); 474 if (ath6kl_bmi_write_hi32(ar, hi_serial_enable, param)) { 475 ath6kl_err("bmi_write_memory for uart debug failed\n"); 476 return -EIO; 477 } 478 479 /* 480 * Note: Even though the firmware interface type is 481 * chosen as BSS_STA for all three interfaces, can 482 * be configured to IBSS/AP as long as the fw submode 483 * remains normal mode (0 - AP, STA and IBSS). But 484 * due to an target assert in firmware only one interface is 485 * configured for now. 486 */ 487 fw_iftype = HI_OPTION_FW_MODE_BSS_STA; 488 489 for (i = 0; i < ar->vif_max; i++) 490 fw_mode |= fw_iftype << (i * HI_OPTION_FW_MODE_BITS); 491 492 /* 493 * Submodes when fw does not support dynamic interface 494 * switching: 495 * vif[0] - AP/STA/IBSS 496 * vif[1] - "P2P dev"/"P2P GO"/"P2P Client" 497 * vif[2] - "P2P dev"/"P2P GO"/"P2P Client" 498 * Otherwise, All the interface are initialized to p2p dev. 499 */ 500 501 if (test_bit(ATH6KL_FW_CAPABILITY_STA_P2PDEV_DUPLEX, 502 ar->fw_capabilities)) { 503 for (i = 0; i < ar->vif_max; i++) 504 fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV << 505 (i * HI_OPTION_FW_SUBMODE_BITS); 506 } else { 507 for (i = 0; i < ar->max_norm_iface; i++) 508 fw_submode |= HI_OPTION_FW_SUBMODE_NONE << 509 (i * HI_OPTION_FW_SUBMODE_BITS); 510 511 for (i = ar->max_norm_iface; i < ar->vif_max; i++) 512 fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV << 513 (i * HI_OPTION_FW_SUBMODE_BITS); 514 515 if (ar->p2p && ar->vif_max == 1) 516 fw_submode = HI_OPTION_FW_SUBMODE_P2PDEV; 517 } 518 519 if (ath6kl_bmi_write_hi32(ar, hi_app_host_interest, 520 HTC_PROTOCOL_VERSION) != 0) { 521 ath6kl_err("bmi_write_memory for htc version failed\n"); 522 return -EIO; 523 } 524 525 /* set the firmware mode to STA/IBSS/AP */ 526 param = 0; 527 528 if (ath6kl_bmi_read_hi32(ar, hi_option_flag, ¶m) != 0) { 529 ath6kl_err("bmi_read_memory for setting fwmode failed\n"); 530 return -EIO; 531 } 532 533 param |= (ar->vif_max << HI_OPTION_NUM_DEV_SHIFT); 534 param |= fw_mode << HI_OPTION_FW_MODE_SHIFT; 535 param |= fw_submode << HI_OPTION_FW_SUBMODE_SHIFT; 536 537 param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT); 538 param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT); 539 540 if (ath6kl_bmi_write_hi32(ar, hi_option_flag, param) != 0) { 541 ath6kl_err("bmi_write_memory for setting fwmode failed\n"); 542 return -EIO; 543 } 544 545 ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n"); 546 547 /* 548 * Hardcode the address use for the extended board data 549 * Ideally this should be pre-allocate by the OS at boot time 550 * But since it is a new feature and board data is loaded 551 * at init time, we have to workaround this from host. 552 * It is difficult to patch the firmware boot code, 553 * but possible in theory. 554 */ 555 556 if (ar->target_type == TARGET_TYPE_AR6003) { 557 param = ar->hw.board_ext_data_addr; 558 ram_reserved_size = ar->hw.reserved_ram_size; 559 560 if (ath6kl_bmi_write_hi32(ar, hi_board_ext_data, param) != 0) { 561 ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n"); 562 return -EIO; 563 } 564 565 if (ath6kl_bmi_write_hi32(ar, hi_end_ram_reserve_sz, 566 ram_reserved_size) != 0) { 567 ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n"); 568 return -EIO; 569 } 570 } 571 572 /* set the block size for the target */ 573 if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0)) 574 /* use default number of control buffers */ 575 return -EIO; 576 577 /* Configure GPIO AR600x UART */ 578 status = ath6kl_bmi_write_hi32(ar, hi_dbg_uart_txpin, 579 ar->hw.uarttx_pin); 580 if (status) 581 return status; 582 583 /* Configure target refclk_hz */ 584 status = ath6kl_bmi_write_hi32(ar, hi_refclk_hz, ar->hw.refclk_hz); 585 if (status) 586 return status; 587 588 return 0; 589 } 590 591 /* firmware upload */ 592 static int ath6kl_get_fw(struct ath6kl *ar, const char *filename, 593 u8 **fw, size_t *fw_len) 594 { 595 const struct firmware *fw_entry; 596 int ret; 597 598 ret = request_firmware(&fw_entry, filename, ar->dev); 599 if (ret) 600 return ret; 601 602 *fw_len = fw_entry->size; 603 *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL); 604 605 if (*fw == NULL) 606 ret = -ENOMEM; 607 608 release_firmware(fw_entry); 609 610 return ret; 611 } 612 613 #ifdef CONFIG_OF 614 /* 615 * Check the device tree for a board-id and use it to construct 616 * the pathname to the firmware file. Used (for now) to find a 617 * fallback to the "bdata.bin" file--typically a symlink to the 618 * appropriate board-specific file. 619 */ 620 static bool check_device_tree(struct ath6kl *ar) 621 { 622 static const char *board_id_prop = "atheros,board-id"; 623 struct device_node *node; 624 char board_filename[64]; 625 const char *board_id; 626 int ret; 627 628 for_each_compatible_node(node, NULL, "atheros,ath6kl") { 629 board_id = of_get_property(node, board_id_prop, NULL); 630 if (board_id == NULL) { 631 ath6kl_warn("No \"%s\" property on %s node.\n", 632 board_id_prop, node->name); 633 continue; 634 } 635 snprintf(board_filename, sizeof(board_filename), 636 "%s/bdata.%s.bin", ar->hw.fw.dir, board_id); 637 638 ret = ath6kl_get_fw(ar, board_filename, &ar->fw_board, 639 &ar->fw_board_len); 640 if (ret) { 641 ath6kl_err("Failed to get DT board file %s: %d\n", 642 board_filename, ret); 643 continue; 644 } 645 return true; 646 } 647 return false; 648 } 649 #else 650 static bool check_device_tree(struct ath6kl *ar) 651 { 652 return false; 653 } 654 #endif /* CONFIG_OF */ 655 656 static int ath6kl_fetch_board_file(struct ath6kl *ar) 657 { 658 const char *filename; 659 int ret; 660 661 if (ar->fw_board != NULL) 662 return 0; 663 664 if (WARN_ON(ar->hw.fw_board == NULL)) 665 return -EINVAL; 666 667 filename = ar->hw.fw_board; 668 669 ret = ath6kl_get_fw(ar, filename, &ar->fw_board, 670 &ar->fw_board_len); 671 if (ret == 0) { 672 /* managed to get proper board file */ 673 return 0; 674 } 675 676 if (check_device_tree(ar)) { 677 /* got board file from device tree */ 678 return 0; 679 } 680 681 /* there was no proper board file, try to use default instead */ 682 ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n", 683 filename, ret); 684 685 filename = ar->hw.fw_default_board; 686 687 ret = ath6kl_get_fw(ar, filename, &ar->fw_board, 688 &ar->fw_board_len); 689 if (ret) { 690 ath6kl_err("Failed to get default board file %s: %d\n", 691 filename, ret); 692 return ret; 693 } 694 695 ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n"); 696 ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n"); 697 698 return 0; 699 } 700 701 static int ath6kl_fetch_otp_file(struct ath6kl *ar) 702 { 703 char filename[100]; 704 int ret; 705 706 if (ar->fw_otp != NULL) 707 return 0; 708 709 if (ar->hw.fw.otp == NULL) { 710 ath6kl_dbg(ATH6KL_DBG_BOOT, 711 "no OTP file configured for this hw\n"); 712 return 0; 713 } 714 715 snprintf(filename, sizeof(filename), "%s/%s", 716 ar->hw.fw.dir, ar->hw.fw.otp); 717 718 ret = ath6kl_get_fw(ar, filename, &ar->fw_otp, 719 &ar->fw_otp_len); 720 if (ret) { 721 ath6kl_err("Failed to get OTP file %s: %d\n", 722 filename, ret); 723 return ret; 724 } 725 726 return 0; 727 } 728 729 static int ath6kl_fetch_testmode_file(struct ath6kl *ar) 730 { 731 char filename[100]; 732 int ret; 733 734 if (ar->testmode == 0) 735 return 0; 736 737 ath6kl_dbg(ATH6KL_DBG_BOOT, "testmode %d\n", ar->testmode); 738 739 if (ar->testmode == 2) { 740 if (ar->hw.fw.utf == NULL) { 741 ath6kl_warn("testmode 2 not supported\n"); 742 return -EOPNOTSUPP; 743 } 744 745 snprintf(filename, sizeof(filename), "%s/%s", 746 ar->hw.fw.dir, ar->hw.fw.utf); 747 } else { 748 if (ar->hw.fw.tcmd == NULL) { 749 ath6kl_warn("testmode 1 not supported\n"); 750 return -EOPNOTSUPP; 751 } 752 753 snprintf(filename, sizeof(filename), "%s/%s", 754 ar->hw.fw.dir, ar->hw.fw.tcmd); 755 } 756 757 set_bit(TESTMODE, &ar->flag); 758 759 ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len); 760 if (ret) { 761 ath6kl_err("Failed to get testmode %d firmware file %s: %d\n", 762 ar->testmode, filename, ret); 763 return ret; 764 } 765 766 return 0; 767 } 768 769 static int ath6kl_fetch_fw_file(struct ath6kl *ar) 770 { 771 char filename[100]; 772 int ret; 773 774 if (ar->fw != NULL) 775 return 0; 776 777 /* FIXME: remove WARN_ON() as we won't support FW API 1 for long */ 778 if (WARN_ON(ar->hw.fw.fw == NULL)) 779 return -EINVAL; 780 781 snprintf(filename, sizeof(filename), "%s/%s", 782 ar->hw.fw.dir, ar->hw.fw.fw); 783 784 ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len); 785 if (ret) { 786 ath6kl_err("Failed to get firmware file %s: %d\n", 787 filename, ret); 788 return ret; 789 } 790 791 return 0; 792 } 793 794 static int ath6kl_fetch_patch_file(struct ath6kl *ar) 795 { 796 char filename[100]; 797 int ret; 798 799 if (ar->fw_patch != NULL) 800 return 0; 801 802 if (ar->hw.fw.patch == NULL) 803 return 0; 804 805 snprintf(filename, sizeof(filename), "%s/%s", 806 ar->hw.fw.dir, ar->hw.fw.patch); 807 808 ret = ath6kl_get_fw(ar, filename, &ar->fw_patch, 809 &ar->fw_patch_len); 810 if (ret) { 811 ath6kl_err("Failed to get patch file %s: %d\n", 812 filename, ret); 813 return ret; 814 } 815 816 return 0; 817 } 818 819 static int ath6kl_fetch_testscript_file(struct ath6kl *ar) 820 { 821 char filename[100]; 822 int ret; 823 824 if (ar->testmode != 2) 825 return 0; 826 827 if (ar->fw_testscript != NULL) 828 return 0; 829 830 if (ar->hw.fw.testscript == NULL) 831 return 0; 832 833 snprintf(filename, sizeof(filename), "%s/%s", 834 ar->hw.fw.dir, ar->hw.fw.testscript); 835 836 ret = ath6kl_get_fw(ar, filename, &ar->fw_testscript, 837 &ar->fw_testscript_len); 838 if (ret) { 839 ath6kl_err("Failed to get testscript file %s: %d\n", 840 filename, ret); 841 return ret; 842 } 843 844 return 0; 845 } 846 847 static int ath6kl_fetch_fw_api1(struct ath6kl *ar) 848 { 849 int ret; 850 851 ret = ath6kl_fetch_otp_file(ar); 852 if (ret) 853 return ret; 854 855 ret = ath6kl_fetch_fw_file(ar); 856 if (ret) 857 return ret; 858 859 ret = ath6kl_fetch_patch_file(ar); 860 if (ret) 861 return ret; 862 863 ret = ath6kl_fetch_testscript_file(ar); 864 if (ret) 865 return ret; 866 867 return 0; 868 } 869 870 static int ath6kl_fetch_fw_apin(struct ath6kl *ar, const char *name) 871 { 872 size_t magic_len, len, ie_len; 873 const struct firmware *fw; 874 struct ath6kl_fw_ie *hdr; 875 char filename[100]; 876 const u8 *data; 877 int ret, ie_id, i, index, bit; 878 __le32 *val; 879 880 snprintf(filename, sizeof(filename), "%s/%s", ar->hw.fw.dir, name); 881 882 ret = request_firmware(&fw, filename, ar->dev); 883 if (ret) 884 return ret; 885 886 data = fw->data; 887 len = fw->size; 888 889 /* magic also includes the null byte, check that as well */ 890 magic_len = strlen(ATH6KL_FIRMWARE_MAGIC) + 1; 891 892 if (len < magic_len) { 893 ret = -EINVAL; 894 goto out; 895 } 896 897 if (memcmp(data, ATH6KL_FIRMWARE_MAGIC, magic_len) != 0) { 898 ret = -EINVAL; 899 goto out; 900 } 901 902 len -= magic_len; 903 data += magic_len; 904 905 /* loop elements */ 906 while (len > sizeof(struct ath6kl_fw_ie)) { 907 /* hdr is unaligned! */ 908 hdr = (struct ath6kl_fw_ie *) data; 909 910 ie_id = le32_to_cpup(&hdr->id); 911 ie_len = le32_to_cpup(&hdr->len); 912 913 len -= sizeof(*hdr); 914 data += sizeof(*hdr); 915 916 if (len < ie_len) { 917 ret = -EINVAL; 918 goto out; 919 } 920 921 switch (ie_id) { 922 case ATH6KL_FW_IE_OTP_IMAGE: 923 ath6kl_dbg(ATH6KL_DBG_BOOT, "found otp image ie (%zd B)\n", 924 ie_len); 925 926 ar->fw_otp = kmemdup(data, ie_len, GFP_KERNEL); 927 928 if (ar->fw_otp == NULL) { 929 ret = -ENOMEM; 930 goto out; 931 } 932 933 ar->fw_otp_len = ie_len; 934 break; 935 case ATH6KL_FW_IE_FW_IMAGE: 936 ath6kl_dbg(ATH6KL_DBG_BOOT, "found fw image ie (%zd B)\n", 937 ie_len); 938 939 /* in testmode we already might have a fw file */ 940 if (ar->fw != NULL) 941 break; 942 943 ar->fw = vmalloc(ie_len); 944 945 if (ar->fw == NULL) { 946 ret = -ENOMEM; 947 goto out; 948 } 949 950 memcpy(ar->fw, data, ie_len); 951 ar->fw_len = ie_len; 952 break; 953 case ATH6KL_FW_IE_PATCH_IMAGE: 954 ath6kl_dbg(ATH6KL_DBG_BOOT, "found patch image ie (%zd B)\n", 955 ie_len); 956 957 ar->fw_patch = kmemdup(data, ie_len, GFP_KERNEL); 958 959 if (ar->fw_patch == NULL) { 960 ret = -ENOMEM; 961 goto out; 962 } 963 964 ar->fw_patch_len = ie_len; 965 break; 966 case ATH6KL_FW_IE_RESERVED_RAM_SIZE: 967 val = (__le32 *) data; 968 ar->hw.reserved_ram_size = le32_to_cpup(val); 969 970 ath6kl_dbg(ATH6KL_DBG_BOOT, 971 "found reserved ram size ie 0x%d\n", 972 ar->hw.reserved_ram_size); 973 break; 974 case ATH6KL_FW_IE_CAPABILITIES: 975 if (ie_len < DIV_ROUND_UP(ATH6KL_FW_CAPABILITY_MAX, 8)) 976 break; 977 978 ath6kl_dbg(ATH6KL_DBG_BOOT, 979 "found firmware capabilities ie (%zd B)\n", 980 ie_len); 981 982 for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) { 983 index = i / 8; 984 bit = i % 8; 985 986 if (data[index] & (1 << bit)) 987 __set_bit(i, ar->fw_capabilities); 988 } 989 990 ath6kl_dbg_dump(ATH6KL_DBG_BOOT, "capabilities", "", 991 ar->fw_capabilities, 992 sizeof(ar->fw_capabilities)); 993 break; 994 case ATH6KL_FW_IE_PATCH_ADDR: 995 if (ie_len != sizeof(*val)) 996 break; 997 998 val = (__le32 *) data; 999 ar->hw.dataset_patch_addr = le32_to_cpup(val); 1000 1001 ath6kl_dbg(ATH6KL_DBG_BOOT, 1002 "found patch address ie 0x%x\n", 1003 ar->hw.dataset_patch_addr); 1004 break; 1005 case ATH6KL_FW_IE_BOARD_ADDR: 1006 if (ie_len != sizeof(*val)) 1007 break; 1008 1009 val = (__le32 *) data; 1010 ar->hw.board_addr = le32_to_cpup(val); 1011 1012 ath6kl_dbg(ATH6KL_DBG_BOOT, 1013 "found board address ie 0x%x\n", 1014 ar->hw.board_addr); 1015 break; 1016 case ATH6KL_FW_IE_VIF_MAX: 1017 if (ie_len != sizeof(*val)) 1018 break; 1019 1020 val = (__le32 *) data; 1021 ar->vif_max = min_t(unsigned int, le32_to_cpup(val), 1022 ATH6KL_VIF_MAX); 1023 1024 if (ar->vif_max > 1 && !ar->p2p) 1025 ar->max_norm_iface = 2; 1026 1027 ath6kl_dbg(ATH6KL_DBG_BOOT, 1028 "found vif max ie %d\n", ar->vif_max); 1029 break; 1030 default: 1031 ath6kl_dbg(ATH6KL_DBG_BOOT, "Unknown fw ie: %u\n", 1032 le32_to_cpup(&hdr->id)); 1033 break; 1034 } 1035 1036 len -= ie_len; 1037 data += ie_len; 1038 }; 1039 1040 ret = 0; 1041 out: 1042 release_firmware(fw); 1043 1044 return ret; 1045 } 1046 1047 int ath6kl_init_fetch_firmwares(struct ath6kl *ar) 1048 { 1049 int ret; 1050 1051 ret = ath6kl_fetch_board_file(ar); 1052 if (ret) 1053 return ret; 1054 1055 ret = ath6kl_fetch_testmode_file(ar); 1056 if (ret) 1057 return ret; 1058 1059 ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API3_FILE); 1060 if (ret == 0) { 1061 ar->fw_api = 3; 1062 goto out; 1063 } 1064 1065 ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API2_FILE); 1066 if (ret == 0) { 1067 ar->fw_api = 2; 1068 goto out; 1069 } 1070 1071 ret = ath6kl_fetch_fw_api1(ar); 1072 if (ret) 1073 return ret; 1074 1075 ar->fw_api = 1; 1076 1077 out: 1078 ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api %d\n", ar->fw_api); 1079 1080 return 0; 1081 } 1082 1083 static int ath6kl_upload_board_file(struct ath6kl *ar) 1084 { 1085 u32 board_address, board_ext_address, param; 1086 u32 board_data_size, board_ext_data_size; 1087 int ret; 1088 1089 if (WARN_ON(ar->fw_board == NULL)) 1090 return -ENOENT; 1091 1092 /* 1093 * Determine where in Target RAM to write Board Data. 1094 * For AR6004, host determine Target RAM address for 1095 * writing board data. 1096 */ 1097 if (ar->hw.board_addr != 0) { 1098 board_address = ar->hw.board_addr; 1099 ath6kl_bmi_write_hi32(ar, hi_board_data, 1100 board_address); 1101 } else { 1102 ath6kl_bmi_read_hi32(ar, hi_board_data, &board_address); 1103 } 1104 1105 /* determine where in target ram to write extended board data */ 1106 ath6kl_bmi_read_hi32(ar, hi_board_ext_data, &board_ext_address); 1107 1108 if (ar->target_type == TARGET_TYPE_AR6003 && 1109 board_ext_address == 0) { 1110 ath6kl_err("Failed to get board file target address.\n"); 1111 return -EINVAL; 1112 } 1113 1114 switch (ar->target_type) { 1115 case TARGET_TYPE_AR6003: 1116 board_data_size = AR6003_BOARD_DATA_SZ; 1117 board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ; 1118 if (ar->fw_board_len > (board_data_size + board_ext_data_size)) 1119 board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ_V2; 1120 break; 1121 case TARGET_TYPE_AR6004: 1122 board_data_size = AR6004_BOARD_DATA_SZ; 1123 board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ; 1124 break; 1125 default: 1126 WARN_ON(1); 1127 return -EINVAL; 1128 break; 1129 } 1130 1131 if (board_ext_address && 1132 ar->fw_board_len == (board_data_size + board_ext_data_size)) { 1133 1134 /* write extended board data */ 1135 ath6kl_dbg(ATH6KL_DBG_BOOT, 1136 "writing extended board data to 0x%x (%d B)\n", 1137 board_ext_address, board_ext_data_size); 1138 1139 ret = ath6kl_bmi_write(ar, board_ext_address, 1140 ar->fw_board + board_data_size, 1141 board_ext_data_size); 1142 if (ret) { 1143 ath6kl_err("Failed to write extended board data: %d\n", 1144 ret); 1145 return ret; 1146 } 1147 1148 /* record that extended board data is initialized */ 1149 param = (board_ext_data_size << 16) | 1; 1150 1151 ath6kl_bmi_write_hi32(ar, hi_board_ext_data_config, param); 1152 } 1153 1154 if (ar->fw_board_len < board_data_size) { 1155 ath6kl_err("Too small board file: %zu\n", ar->fw_board_len); 1156 ret = -EINVAL; 1157 return ret; 1158 } 1159 1160 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing board file to 0x%x (%d B)\n", 1161 board_address, board_data_size); 1162 1163 ret = ath6kl_bmi_write(ar, board_address, ar->fw_board, 1164 board_data_size); 1165 1166 if (ret) { 1167 ath6kl_err("Board file bmi write failed: %d\n", ret); 1168 return ret; 1169 } 1170 1171 /* record the fact that Board Data IS initialized */ 1172 ath6kl_bmi_write_hi32(ar, hi_board_data_initialized, 1); 1173 1174 return ret; 1175 } 1176 1177 static int ath6kl_upload_otp(struct ath6kl *ar) 1178 { 1179 u32 address, param; 1180 bool from_hw = false; 1181 int ret; 1182 1183 if (ar->fw_otp == NULL) 1184 return 0; 1185 1186 address = ar->hw.app_load_addr; 1187 1188 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing otp to 0x%x (%zd B)\n", address, 1189 ar->fw_otp_len); 1190 1191 ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp, 1192 ar->fw_otp_len); 1193 if (ret) { 1194 ath6kl_err("Failed to upload OTP file: %d\n", ret); 1195 return ret; 1196 } 1197 1198 /* read firmware start address */ 1199 ret = ath6kl_bmi_read_hi32(ar, hi_app_start, &address); 1200 1201 if (ret) { 1202 ath6kl_err("Failed to read hi_app_start: %d\n", ret); 1203 return ret; 1204 } 1205 1206 if (ar->hw.app_start_override_addr == 0) { 1207 ar->hw.app_start_override_addr = address; 1208 from_hw = true; 1209 } 1210 1211 ath6kl_dbg(ATH6KL_DBG_BOOT, "app_start_override_addr%s 0x%x\n", 1212 from_hw ? " (from hw)" : "", 1213 ar->hw.app_start_override_addr); 1214 1215 /* execute the OTP code */ 1216 ath6kl_dbg(ATH6KL_DBG_BOOT, "executing OTP at 0x%x\n", 1217 ar->hw.app_start_override_addr); 1218 param = 0; 1219 ath6kl_bmi_execute(ar, ar->hw.app_start_override_addr, ¶m); 1220 1221 return ret; 1222 } 1223 1224 static int ath6kl_upload_firmware(struct ath6kl *ar) 1225 { 1226 u32 address; 1227 int ret; 1228 1229 if (WARN_ON(ar->fw == NULL)) 1230 return 0; 1231 1232 address = ar->hw.app_load_addr; 1233 1234 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing firmware to 0x%x (%zd B)\n", 1235 address, ar->fw_len); 1236 1237 ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len); 1238 1239 if (ret) { 1240 ath6kl_err("Failed to write firmware: %d\n", ret); 1241 return ret; 1242 } 1243 1244 /* 1245 * Set starting address for firmware 1246 * Don't need to setup app_start override addr on AR6004 1247 */ 1248 if (ar->target_type != TARGET_TYPE_AR6004) { 1249 address = ar->hw.app_start_override_addr; 1250 ath6kl_bmi_set_app_start(ar, address); 1251 } 1252 return ret; 1253 } 1254 1255 static int ath6kl_upload_patch(struct ath6kl *ar) 1256 { 1257 u32 address; 1258 int ret; 1259 1260 if (ar->fw_patch == NULL) 1261 return 0; 1262 1263 address = ar->hw.dataset_patch_addr; 1264 1265 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing patch to 0x%x (%zd B)\n", 1266 address, ar->fw_patch_len); 1267 1268 ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len); 1269 if (ret) { 1270 ath6kl_err("Failed to write patch file: %d\n", ret); 1271 return ret; 1272 } 1273 1274 ath6kl_bmi_write_hi32(ar, hi_dset_list_head, address); 1275 1276 return 0; 1277 } 1278 1279 static int ath6kl_upload_testscript(struct ath6kl *ar) 1280 { 1281 u32 address; 1282 int ret; 1283 1284 if (ar->testmode != 2) 1285 return 0; 1286 1287 if (ar->fw_testscript == NULL) 1288 return 0; 1289 1290 address = ar->hw.testscript_addr; 1291 1292 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing testscript to 0x%x (%zd B)\n", 1293 address, ar->fw_testscript_len); 1294 1295 ret = ath6kl_bmi_write(ar, address, ar->fw_testscript, 1296 ar->fw_testscript_len); 1297 if (ret) { 1298 ath6kl_err("Failed to write testscript file: %d\n", ret); 1299 return ret; 1300 } 1301 1302 ath6kl_bmi_write_hi32(ar, hi_ota_testscript, address); 1303 ath6kl_bmi_write_hi32(ar, hi_end_ram_reserve_sz, 4096); 1304 ath6kl_bmi_write_hi32(ar, hi_test_apps_related, 1); 1305 1306 return 0; 1307 } 1308 1309 static int ath6kl_init_upload(struct ath6kl *ar) 1310 { 1311 u32 param, options, sleep, address; 1312 int status = 0; 1313 1314 if (ar->target_type != TARGET_TYPE_AR6003 && 1315 ar->target_type != TARGET_TYPE_AR6004) 1316 return -EINVAL; 1317 1318 /* temporarily disable system sleep */ 1319 address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS; 1320 status = ath6kl_bmi_reg_read(ar, address, ¶m); 1321 if (status) 1322 return status; 1323 1324 options = param; 1325 1326 param |= ATH6KL_OPTION_SLEEP_DISABLE; 1327 status = ath6kl_bmi_reg_write(ar, address, param); 1328 if (status) 1329 return status; 1330 1331 address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS; 1332 status = ath6kl_bmi_reg_read(ar, address, ¶m); 1333 if (status) 1334 return status; 1335 1336 sleep = param; 1337 1338 param |= SM(SYSTEM_SLEEP_DISABLE, 1); 1339 status = ath6kl_bmi_reg_write(ar, address, param); 1340 if (status) 1341 return status; 1342 1343 ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n", 1344 options, sleep); 1345 1346 /* program analog PLL register */ 1347 /* no need to control 40/44MHz clock on AR6004 */ 1348 if (ar->target_type != TARGET_TYPE_AR6004) { 1349 status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER, 1350 0xF9104001); 1351 1352 if (status) 1353 return status; 1354 1355 /* Run at 80/88MHz by default */ 1356 param = SM(CPU_CLOCK_STANDARD, 1); 1357 1358 address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS; 1359 status = ath6kl_bmi_reg_write(ar, address, param); 1360 if (status) 1361 return status; 1362 } 1363 1364 param = 0; 1365 address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS; 1366 param = SM(LPO_CAL_ENABLE, 1); 1367 status = ath6kl_bmi_reg_write(ar, address, param); 1368 if (status) 1369 return status; 1370 1371 /* WAR to avoid SDIO CRC err */ 1372 if (ar->version.target_ver == AR6003_HW_2_0_VERSION || 1373 ar->version.target_ver == AR6003_HW_2_1_1_VERSION) { 1374 ath6kl_err("temporary war to avoid sdio crc error\n"); 1375 1376 param = 0x20; 1377 1378 address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS; 1379 status = ath6kl_bmi_reg_write(ar, address, param); 1380 if (status) 1381 return status; 1382 1383 address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS; 1384 status = ath6kl_bmi_reg_write(ar, address, param); 1385 if (status) 1386 return status; 1387 1388 address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS; 1389 status = ath6kl_bmi_reg_write(ar, address, param); 1390 if (status) 1391 return status; 1392 1393 address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS; 1394 status = ath6kl_bmi_reg_write(ar, address, param); 1395 if (status) 1396 return status; 1397 } 1398 1399 /* write EEPROM data to Target RAM */ 1400 status = ath6kl_upload_board_file(ar); 1401 if (status) 1402 return status; 1403 1404 /* transfer One time Programmable data */ 1405 status = ath6kl_upload_otp(ar); 1406 if (status) 1407 return status; 1408 1409 /* Download Target firmware */ 1410 status = ath6kl_upload_firmware(ar); 1411 if (status) 1412 return status; 1413 1414 status = ath6kl_upload_patch(ar); 1415 if (status) 1416 return status; 1417 1418 /* Download the test script */ 1419 status = ath6kl_upload_testscript(ar); 1420 if (status) 1421 return status; 1422 1423 /* Restore system sleep */ 1424 address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS; 1425 status = ath6kl_bmi_reg_write(ar, address, sleep); 1426 if (status) 1427 return status; 1428 1429 address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS; 1430 param = options | 0x20; 1431 status = ath6kl_bmi_reg_write(ar, address, param); 1432 if (status) 1433 return status; 1434 1435 return status; 1436 } 1437 1438 int ath6kl_init_hw_params(struct ath6kl *ar) 1439 { 1440 const struct ath6kl_hw *uninitialized_var(hw); 1441 int i; 1442 1443 for (i = 0; i < ARRAY_SIZE(hw_list); i++) { 1444 hw = &hw_list[i]; 1445 1446 if (hw->id == ar->version.target_ver) 1447 break; 1448 } 1449 1450 if (i == ARRAY_SIZE(hw_list)) { 1451 ath6kl_err("Unsupported hardware version: 0x%x\n", 1452 ar->version.target_ver); 1453 return -EINVAL; 1454 } 1455 1456 ar->hw = *hw; 1457 1458 ath6kl_dbg(ATH6KL_DBG_BOOT, 1459 "target_ver 0x%x target_type 0x%x dataset_patch 0x%x app_load_addr 0x%x\n", 1460 ar->version.target_ver, ar->target_type, 1461 ar->hw.dataset_patch_addr, ar->hw.app_load_addr); 1462 ath6kl_dbg(ATH6KL_DBG_BOOT, 1463 "app_start_override_addr 0x%x board_ext_data_addr 0x%x reserved_ram_size 0x%x", 1464 ar->hw.app_start_override_addr, ar->hw.board_ext_data_addr, 1465 ar->hw.reserved_ram_size); 1466 ath6kl_dbg(ATH6KL_DBG_BOOT, 1467 "refclk_hz %d uarttx_pin %d", 1468 ar->hw.refclk_hz, ar->hw.uarttx_pin); 1469 1470 return 0; 1471 } 1472 1473 static const char *ath6kl_init_get_hif_name(enum ath6kl_hif_type type) 1474 { 1475 switch (type) { 1476 case ATH6KL_HIF_TYPE_SDIO: 1477 return "sdio"; 1478 case ATH6KL_HIF_TYPE_USB: 1479 return "usb"; 1480 } 1481 1482 return NULL; 1483 } 1484 1485 int ath6kl_init_hw_start(struct ath6kl *ar) 1486 { 1487 long timeleft; 1488 int ret, i; 1489 1490 ath6kl_dbg(ATH6KL_DBG_BOOT, "hw start\n"); 1491 1492 ret = ath6kl_hif_power_on(ar); 1493 if (ret) 1494 return ret; 1495 1496 ret = ath6kl_configure_target(ar); 1497 if (ret) 1498 goto err_power_off; 1499 1500 ret = ath6kl_init_upload(ar); 1501 if (ret) 1502 goto err_power_off; 1503 1504 /* Do we need to finish the BMI phase */ 1505 /* FIXME: return error from ath6kl_bmi_done() */ 1506 if (ath6kl_bmi_done(ar)) { 1507 ret = -EIO; 1508 goto err_power_off; 1509 } 1510 1511 /* 1512 * The reason we have to wait for the target here is that the 1513 * driver layer has to init BMI in order to set the host block 1514 * size. 1515 */ 1516 if (ath6kl_htc_wait_target(ar->htc_target)) { 1517 ret = -EIO; 1518 goto err_power_off; 1519 } 1520 1521 if (ath6kl_init_service_ep(ar)) { 1522 ret = -EIO; 1523 goto err_cleanup_scatter; 1524 } 1525 1526 /* setup credit distribution */ 1527 ath6kl_htc_credit_setup(ar->htc_target, &ar->credit_state_info); 1528 1529 /* start HTC */ 1530 ret = ath6kl_htc_start(ar->htc_target); 1531 if (ret) { 1532 /* FIXME: call this */ 1533 ath6kl_cookie_cleanup(ar); 1534 goto err_cleanup_scatter; 1535 } 1536 1537 /* Wait for Wmi event to be ready */ 1538 timeleft = wait_event_interruptible_timeout(ar->event_wq, 1539 test_bit(WMI_READY, 1540 &ar->flag), 1541 WMI_TIMEOUT); 1542 1543 ath6kl_dbg(ATH6KL_DBG_BOOT, "firmware booted\n"); 1544 1545 1546 if (test_and_clear_bit(FIRST_BOOT, &ar->flag)) { 1547 ath6kl_info("%s %s fw %s api %d%s\n", 1548 ar->hw.name, 1549 ath6kl_init_get_hif_name(ar->hif_type), 1550 ar->wiphy->fw_version, 1551 ar->fw_api, 1552 test_bit(TESTMODE, &ar->flag) ? " testmode" : ""); 1553 } 1554 1555 if (ar->version.abi_ver != ATH6KL_ABI_VERSION) { 1556 ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n", 1557 ATH6KL_ABI_VERSION, ar->version.abi_ver); 1558 ret = -EIO; 1559 goto err_htc_stop; 1560 } 1561 1562 if (!timeleft || signal_pending(current)) { 1563 ath6kl_err("wmi is not ready or wait was interrupted\n"); 1564 ret = -EIO; 1565 goto err_htc_stop; 1566 } 1567 1568 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__); 1569 1570 /* communicate the wmi protocol verision to the target */ 1571 /* FIXME: return error */ 1572 if ((ath6kl_set_host_app_area(ar)) != 0) 1573 ath6kl_err("unable to set the host app area\n"); 1574 1575 for (i = 0; i < ar->vif_max; i++) { 1576 ret = ath6kl_target_config_wlan_params(ar, i); 1577 if (ret) 1578 goto err_htc_stop; 1579 } 1580 1581 ar->state = ATH6KL_STATE_ON; 1582 1583 return 0; 1584 1585 err_htc_stop: 1586 ath6kl_htc_stop(ar->htc_target); 1587 err_cleanup_scatter: 1588 ath6kl_hif_cleanup_scatter(ar); 1589 err_power_off: 1590 ath6kl_hif_power_off(ar); 1591 1592 return ret; 1593 } 1594 1595 int ath6kl_init_hw_stop(struct ath6kl *ar) 1596 { 1597 int ret; 1598 1599 ath6kl_dbg(ATH6KL_DBG_BOOT, "hw stop\n"); 1600 1601 ath6kl_htc_stop(ar->htc_target); 1602 1603 ath6kl_hif_stop(ar); 1604 1605 ath6kl_bmi_reset(ar); 1606 1607 ret = ath6kl_hif_power_off(ar); 1608 if (ret) 1609 ath6kl_warn("failed to power off hif: %d\n", ret); 1610 1611 ar->state = ATH6KL_STATE_OFF; 1612 1613 return 0; 1614 } 1615 1616 /* FIXME: move this to cfg80211.c and rename to ath6kl_cfg80211_vif_stop() */ 1617 void ath6kl_cleanup_vif(struct ath6kl_vif *vif, bool wmi_ready) 1618 { 1619 static u8 bcast_mac[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; 1620 bool discon_issued; 1621 1622 netif_stop_queue(vif->ndev); 1623 1624 clear_bit(WLAN_ENABLED, &vif->flags); 1625 1626 if (wmi_ready) { 1627 discon_issued = test_bit(CONNECTED, &vif->flags) || 1628 test_bit(CONNECT_PEND, &vif->flags); 1629 ath6kl_disconnect(vif); 1630 del_timer(&vif->disconnect_timer); 1631 1632 if (discon_issued) 1633 ath6kl_disconnect_event(vif, DISCONNECT_CMD, 1634 (vif->nw_type & AP_NETWORK) ? 1635 bcast_mac : vif->bssid, 1636 0, NULL, 0); 1637 } 1638 1639 if (vif->scan_req) { 1640 cfg80211_scan_done(vif->scan_req, true); 1641 vif->scan_req = NULL; 1642 } 1643 } 1644 1645 void ath6kl_stop_txrx(struct ath6kl *ar) 1646 { 1647 struct ath6kl_vif *vif, *tmp_vif; 1648 int i; 1649 1650 set_bit(DESTROY_IN_PROGRESS, &ar->flag); 1651 1652 if (down_interruptible(&ar->sem)) { 1653 ath6kl_err("down_interruptible failed\n"); 1654 return; 1655 } 1656 1657 for (i = 0; i < AP_MAX_NUM_STA; i++) 1658 aggr_reset_state(ar->sta_list[i].aggr_conn); 1659 1660 spin_lock_bh(&ar->list_lock); 1661 list_for_each_entry_safe(vif, tmp_vif, &ar->vif_list, list) { 1662 list_del(&vif->list); 1663 spin_unlock_bh(&ar->list_lock); 1664 ath6kl_cleanup_vif(vif, test_bit(WMI_READY, &ar->flag)); 1665 rtnl_lock(); 1666 ath6kl_cfg80211_vif_cleanup(vif); 1667 rtnl_unlock(); 1668 spin_lock_bh(&ar->list_lock); 1669 } 1670 spin_unlock_bh(&ar->list_lock); 1671 1672 clear_bit(WMI_READY, &ar->flag); 1673 1674 /* 1675 * After wmi_shudown all WMI events will be dropped. We 1676 * need to cleanup the buffers allocated in AP mode and 1677 * give disconnect notification to stack, which usually 1678 * happens in the disconnect_event. Simulate the disconnect 1679 * event by calling the function directly. Sometimes 1680 * disconnect_event will be received when the debug logs 1681 * are collected. 1682 */ 1683 ath6kl_wmi_shutdown(ar->wmi); 1684 1685 clear_bit(WMI_ENABLED, &ar->flag); 1686 if (ar->htc_target) { 1687 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: shut down htc\n", __func__); 1688 ath6kl_htc_stop(ar->htc_target); 1689 } 1690 1691 /* 1692 * Try to reset the device if we can. The driver may have been 1693 * configure NOT to reset the target during a debug session. 1694 */ 1695 ath6kl_dbg(ATH6KL_DBG_TRC, 1696 "attempting to reset target on instance destroy\n"); 1697 ath6kl_reset_device(ar, ar->target_type, true, true); 1698 1699 clear_bit(WLAN_ENABLED, &ar->flag); 1700 1701 up(&ar->sem); 1702 } 1703 EXPORT_SYMBOL(ath6kl_stop_txrx); 1704