xref: /linux/drivers/net/wireless/ath/ath6kl/init.c (revision 990bd9151927ad55c7e3da3b05cf13ecfe7a31bf)
1bdcd8170SKalle Valo 
2bdcd8170SKalle Valo /*
3bdcd8170SKalle Valo  * Copyright (c) 2011 Atheros Communications Inc.
4bdcd8170SKalle Valo  *
5bdcd8170SKalle Valo  * Permission to use, copy, modify, and/or distribute this software for any
6bdcd8170SKalle Valo  * purpose with or without fee is hereby granted, provided that the above
7bdcd8170SKalle Valo  * copyright notice and this permission notice appear in all copies.
8bdcd8170SKalle Valo  *
9bdcd8170SKalle Valo  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10bdcd8170SKalle Valo  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11bdcd8170SKalle Valo  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12bdcd8170SKalle Valo  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13bdcd8170SKalle Valo  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14bdcd8170SKalle Valo  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15bdcd8170SKalle Valo  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16bdcd8170SKalle Valo  */
17bdcd8170SKalle Valo 
18c6efe578SStephen Rothwell #include <linux/moduleparam.h>
1992ecbff4SSam Leffler #include <linux/of.h>
20bdcd8170SKalle Valo #include <linux/mmc/sdio_func.h>
21bdcd8170SKalle Valo #include "core.h"
22bdcd8170SKalle Valo #include "cfg80211.h"
23bdcd8170SKalle Valo #include "target.h"
24bdcd8170SKalle Valo #include "debug.h"
25bdcd8170SKalle Valo #include "hif-ops.h"
26bdcd8170SKalle Valo 
27bdcd8170SKalle Valo unsigned int debug_mask;
28003353b0SKalle Valo static unsigned int testmode;
29bdcd8170SKalle Valo 
30bdcd8170SKalle Valo module_param(debug_mask, uint, 0644);
31003353b0SKalle Valo module_param(testmode, uint, 0644);
32bdcd8170SKalle Valo 
33bdcd8170SKalle Valo /*
34bdcd8170SKalle Valo  * Include definitions here that can be used to tune the WLAN module
35bdcd8170SKalle Valo  * behavior. Different customers can tune the behavior as per their needs,
36bdcd8170SKalle Valo  * here.
37bdcd8170SKalle Valo  */
38bdcd8170SKalle Valo 
39bdcd8170SKalle Valo /*
40bdcd8170SKalle Valo  * This configuration item enable/disable keepalive support.
41bdcd8170SKalle Valo  * Keepalive support: In the absence of any data traffic to AP, null
42bdcd8170SKalle Valo  * frames will be sent to the AP at periodic interval, to keep the association
43bdcd8170SKalle Valo  * active. This configuration item defines the periodic interval.
44bdcd8170SKalle Valo  * Use value of zero to disable keepalive support
45bdcd8170SKalle Valo  * Default: 60 seconds
46bdcd8170SKalle Valo  */
47bdcd8170SKalle Valo #define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60
48bdcd8170SKalle Valo 
49bdcd8170SKalle Valo /*
50bdcd8170SKalle Valo  * This configuration item sets the value of disconnect timeout
51bdcd8170SKalle Valo  * Firmware delays sending the disconnec event to the host for this
52bdcd8170SKalle Valo  * timeout after is gets disconnected from the current AP.
53bdcd8170SKalle Valo  * If the firmware successly roams within the disconnect timeout
54bdcd8170SKalle Valo  * it sends a new connect event
55bdcd8170SKalle Valo  */
56bdcd8170SKalle Valo #define WLAN_CONFIG_DISCONNECT_TIMEOUT 10
57bdcd8170SKalle Valo 
58bdcd8170SKalle Valo #define CONFIG_AR600x_DEBUG_UART_TX_PIN 8
59bdcd8170SKalle Valo 
60bdcd8170SKalle Valo #define ATH6KL_DATA_OFFSET    64
61bdcd8170SKalle Valo struct sk_buff *ath6kl_buf_alloc(int size)
62bdcd8170SKalle Valo {
63bdcd8170SKalle Valo 	struct sk_buff *skb;
64bdcd8170SKalle Valo 	u16 reserved;
65bdcd8170SKalle Valo 
66bdcd8170SKalle Valo 	/* Add chacheline space at front and back of buffer */
67bdcd8170SKalle Valo 	reserved = (2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET +
681df94a85SVasanthakumar Thiagarajan 		   sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES;
69bdcd8170SKalle Valo 	skb = dev_alloc_skb(size + reserved);
70bdcd8170SKalle Valo 
71bdcd8170SKalle Valo 	if (skb)
72bdcd8170SKalle Valo 		skb_reserve(skb, reserved - L1_CACHE_BYTES);
73bdcd8170SKalle Valo 	return skb;
74bdcd8170SKalle Valo }
75bdcd8170SKalle Valo 
76e29f25f5SVasanthakumar Thiagarajan void ath6kl_init_profile_info(struct ath6kl_vif *vif)
77bdcd8170SKalle Valo {
783450334fSVasanthakumar Thiagarajan 	vif->ssid_len = 0;
793450334fSVasanthakumar Thiagarajan 	memset(vif->ssid, 0, sizeof(vif->ssid));
803450334fSVasanthakumar Thiagarajan 
813450334fSVasanthakumar Thiagarajan 	vif->dot11_auth_mode = OPEN_AUTH;
823450334fSVasanthakumar Thiagarajan 	vif->auth_mode = NONE_AUTH;
833450334fSVasanthakumar Thiagarajan 	vif->prwise_crypto = NONE_CRYPT;
843450334fSVasanthakumar Thiagarajan 	vif->prwise_crypto_len = 0;
853450334fSVasanthakumar Thiagarajan 	vif->grp_crypto = NONE_CRYPT;
863450334fSVasanthakumar Thiagarajan 	vif->grp_crypto_len = 0;
876f2a73f9SVasanthakumar Thiagarajan 	memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
888c8b65e3SVasanthakumar Thiagarajan 	memset(vif->req_bssid, 0, sizeof(vif->req_bssid));
898c8b65e3SVasanthakumar Thiagarajan 	memset(vif->bssid, 0, sizeof(vif->bssid));
90f74bac54SVasanthakumar Thiagarajan 	vif->bss_ch = 0;
91f5938f24SVasanthakumar Thiagarajan 	vif->nw_type = vif->next_mode = INFRA_NETWORK;
92bdcd8170SKalle Valo }
93bdcd8170SKalle Valo 
94bdcd8170SKalle Valo static int ath6kl_set_host_app_area(struct ath6kl *ar)
95bdcd8170SKalle Valo {
96bdcd8170SKalle Valo 	u32 address, data;
97bdcd8170SKalle Valo 	struct host_app_area host_app_area;
98bdcd8170SKalle Valo 
99bdcd8170SKalle Valo 	/* Fetch the address of the host_app_area_s
100bdcd8170SKalle Valo 	 * instance in the host interest area */
101bdcd8170SKalle Valo 	address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest));
10231024d99SKevin Fang 	address = TARG_VTOP(ar->target_type, address);
103bdcd8170SKalle Valo 
104addb44beSKalle Valo 	if (ath6kl_diag_read32(ar, address, &data))
105bdcd8170SKalle Valo 		return -EIO;
106bdcd8170SKalle Valo 
10731024d99SKevin Fang 	address = TARG_VTOP(ar->target_type, data);
108cbf49a6fSKalle Valo 	host_app_area.wmi_protocol_ver = cpu_to_le32(WMI_PROTOCOL_VERSION);
109addb44beSKalle Valo 	if (ath6kl_diag_write(ar, address, (u8 *) &host_app_area,
110addb44beSKalle Valo 			      sizeof(struct host_app_area)))
111bdcd8170SKalle Valo 		return -EIO;
112bdcd8170SKalle Valo 
113bdcd8170SKalle Valo 	return 0;
114bdcd8170SKalle Valo }
115bdcd8170SKalle Valo 
116bdcd8170SKalle Valo static inline void set_ac2_ep_map(struct ath6kl *ar,
117bdcd8170SKalle Valo 				  u8 ac,
118bdcd8170SKalle Valo 				  enum htc_endpoint_id ep)
119bdcd8170SKalle Valo {
120bdcd8170SKalle Valo 	ar->ac2ep_map[ac] = ep;
121bdcd8170SKalle Valo 	ar->ep2ac_map[ep] = ac;
122bdcd8170SKalle Valo }
123bdcd8170SKalle Valo 
124bdcd8170SKalle Valo /* connect to a service */
125bdcd8170SKalle Valo static int ath6kl_connectservice(struct ath6kl *ar,
126bdcd8170SKalle Valo 				 struct htc_service_connect_req  *con_req,
127bdcd8170SKalle Valo 				 char *desc)
128bdcd8170SKalle Valo {
129bdcd8170SKalle Valo 	int status;
130bdcd8170SKalle Valo 	struct htc_service_connect_resp response;
131bdcd8170SKalle Valo 
132bdcd8170SKalle Valo 	memset(&response, 0, sizeof(response));
133bdcd8170SKalle Valo 
134ad226ec2SKalle Valo 	status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response);
135bdcd8170SKalle Valo 	if (status) {
136bdcd8170SKalle Valo 		ath6kl_err("failed to connect to %s service status:%d\n",
137bdcd8170SKalle Valo 			   desc, status);
138bdcd8170SKalle Valo 		return status;
139bdcd8170SKalle Valo 	}
140bdcd8170SKalle Valo 
141bdcd8170SKalle Valo 	switch (con_req->svc_id) {
142bdcd8170SKalle Valo 	case WMI_CONTROL_SVC:
143bdcd8170SKalle Valo 		if (test_bit(WMI_ENABLED, &ar->flag))
144bdcd8170SKalle Valo 			ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint);
145bdcd8170SKalle Valo 		ar->ctrl_ep = response.endpoint;
146bdcd8170SKalle Valo 		break;
147bdcd8170SKalle Valo 	case WMI_DATA_BE_SVC:
148bdcd8170SKalle Valo 		set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint);
149bdcd8170SKalle Valo 		break;
150bdcd8170SKalle Valo 	case WMI_DATA_BK_SVC:
151bdcd8170SKalle Valo 		set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint);
152bdcd8170SKalle Valo 		break;
153bdcd8170SKalle Valo 	case WMI_DATA_VI_SVC:
154bdcd8170SKalle Valo 		set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint);
155bdcd8170SKalle Valo 		break;
156bdcd8170SKalle Valo 	case WMI_DATA_VO_SVC:
157bdcd8170SKalle Valo 		set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint);
158bdcd8170SKalle Valo 		break;
159bdcd8170SKalle Valo 	default:
160bdcd8170SKalle Valo 		ath6kl_err("service id is not mapped %d\n", con_req->svc_id);
161bdcd8170SKalle Valo 		return -EINVAL;
162bdcd8170SKalle Valo 	}
163bdcd8170SKalle Valo 
164bdcd8170SKalle Valo 	return 0;
165bdcd8170SKalle Valo }
166bdcd8170SKalle Valo 
167bdcd8170SKalle Valo static int ath6kl_init_service_ep(struct ath6kl *ar)
168bdcd8170SKalle Valo {
169bdcd8170SKalle Valo 	struct htc_service_connect_req connect;
170bdcd8170SKalle Valo 
171bdcd8170SKalle Valo 	memset(&connect, 0, sizeof(connect));
172bdcd8170SKalle Valo 
173bdcd8170SKalle Valo 	/* these fields are the same for all service endpoints */
174bdcd8170SKalle Valo 	connect.ep_cb.rx = ath6kl_rx;
175bdcd8170SKalle Valo 	connect.ep_cb.rx_refill = ath6kl_rx_refill;
176bdcd8170SKalle Valo 	connect.ep_cb.tx_full = ath6kl_tx_queue_full;
177bdcd8170SKalle Valo 
178bdcd8170SKalle Valo 	/*
179bdcd8170SKalle Valo 	 * Set the max queue depth so that our ath6kl_tx_queue_full handler
180bdcd8170SKalle Valo 	 * gets called.
181bdcd8170SKalle Valo 	*/
182bdcd8170SKalle Valo 	connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH;
183bdcd8170SKalle Valo 	connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4;
184bdcd8170SKalle Valo 	if (!connect.ep_cb.rx_refill_thresh)
185bdcd8170SKalle Valo 		connect.ep_cb.rx_refill_thresh++;
186bdcd8170SKalle Valo 
187bdcd8170SKalle Valo 	/* connect to control service */
188bdcd8170SKalle Valo 	connect.svc_id = WMI_CONTROL_SVC;
189bdcd8170SKalle Valo 	if (ath6kl_connectservice(ar, &connect, "WMI CONTROL"))
190bdcd8170SKalle Valo 		return -EIO;
191bdcd8170SKalle Valo 
192bdcd8170SKalle Valo 	connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN;
193bdcd8170SKalle Valo 
194bdcd8170SKalle Valo 	/*
195bdcd8170SKalle Valo 	 * Limit the HTC message size on the send path, although e can
196bdcd8170SKalle Valo 	 * receive A-MSDU frames of 4K, we will only send ethernet-sized
197bdcd8170SKalle Valo 	 * (802.3) frames on the send path.
198bdcd8170SKalle Valo 	 */
199bdcd8170SKalle Valo 	connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH;
200bdcd8170SKalle Valo 
201bdcd8170SKalle Valo 	/*
202bdcd8170SKalle Valo 	 * To reduce the amount of committed memory for larger A_MSDU
203bdcd8170SKalle Valo 	 * frames, use the recv-alloc threshold mechanism for larger
204bdcd8170SKalle Valo 	 * packets.
205bdcd8170SKalle Valo 	 */
206bdcd8170SKalle Valo 	connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE;
207bdcd8170SKalle Valo 	connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf;
208bdcd8170SKalle Valo 
209bdcd8170SKalle Valo 	/*
210bdcd8170SKalle Valo 	 * For the remaining data services set the connection flag to
211bdcd8170SKalle Valo 	 * reduce dribbling, if configured to do so.
212bdcd8170SKalle Valo 	 */
213bdcd8170SKalle Valo 	connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB;
214bdcd8170SKalle Valo 	connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK;
215bdcd8170SKalle Valo 	connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF;
216bdcd8170SKalle Valo 
217bdcd8170SKalle Valo 	connect.svc_id = WMI_DATA_BE_SVC;
218bdcd8170SKalle Valo 
219bdcd8170SKalle Valo 	if (ath6kl_connectservice(ar, &connect, "WMI DATA BE"))
220bdcd8170SKalle Valo 		return -EIO;
221bdcd8170SKalle Valo 
222bdcd8170SKalle Valo 	/* connect to back-ground map this to WMI LOW_PRI */
223bdcd8170SKalle Valo 	connect.svc_id = WMI_DATA_BK_SVC;
224bdcd8170SKalle Valo 	if (ath6kl_connectservice(ar, &connect, "WMI DATA BK"))
225bdcd8170SKalle Valo 		return -EIO;
226bdcd8170SKalle Valo 
227bdcd8170SKalle Valo 	/* connect to Video service, map this to to HI PRI */
228bdcd8170SKalle Valo 	connect.svc_id = WMI_DATA_VI_SVC;
229bdcd8170SKalle Valo 	if (ath6kl_connectservice(ar, &connect, "WMI DATA VI"))
230bdcd8170SKalle Valo 		return -EIO;
231bdcd8170SKalle Valo 
232bdcd8170SKalle Valo 	/*
233bdcd8170SKalle Valo 	 * Connect to VO service, this is currently not mapped to a WMI
234bdcd8170SKalle Valo 	 * priority stream due to historical reasons. WMI originally
235bdcd8170SKalle Valo 	 * defined 3 priorities over 3 mailboxes We can change this when
236bdcd8170SKalle Valo 	 * WMI is reworked so that priorities are not dependent on
237bdcd8170SKalle Valo 	 * mailboxes.
238bdcd8170SKalle Valo 	 */
239bdcd8170SKalle Valo 	connect.svc_id = WMI_DATA_VO_SVC;
240bdcd8170SKalle Valo 	if (ath6kl_connectservice(ar, &connect, "WMI DATA VO"))
241bdcd8170SKalle Valo 		return -EIO;
242bdcd8170SKalle Valo 
243bdcd8170SKalle Valo 	return 0;
244bdcd8170SKalle Valo }
245bdcd8170SKalle Valo 
246e29f25f5SVasanthakumar Thiagarajan void ath6kl_init_control_info(struct ath6kl_vif *vif)
247bdcd8170SKalle Valo {
248e29f25f5SVasanthakumar Thiagarajan 	ath6kl_init_profile_info(vif);
2493450334fSVasanthakumar Thiagarajan 	vif->def_txkey_index = 0;
2506f2a73f9SVasanthakumar Thiagarajan 	memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
251f74bac54SVasanthakumar Thiagarajan 	vif->ch_hint = 0;
252bdcd8170SKalle Valo }
253bdcd8170SKalle Valo 
254bdcd8170SKalle Valo /*
255bdcd8170SKalle Valo  * Set HTC/Mbox operational parameters, this can only be called when the
256bdcd8170SKalle Valo  * target is in the BMI phase.
257bdcd8170SKalle Valo  */
258bdcd8170SKalle Valo static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val,
259bdcd8170SKalle Valo 				 u8 htc_ctrl_buf)
260bdcd8170SKalle Valo {
261bdcd8170SKalle Valo 	int status;
262bdcd8170SKalle Valo 	u32 blk_size;
263bdcd8170SKalle Valo 
264bdcd8170SKalle Valo 	blk_size = ar->mbox_info.block_size;
265bdcd8170SKalle Valo 
266bdcd8170SKalle Valo 	if (htc_ctrl_buf)
267bdcd8170SKalle Valo 		blk_size |=  ((u32)htc_ctrl_buf) << 16;
268bdcd8170SKalle Valo 
269bdcd8170SKalle Valo 	/* set the host interest area for the block size */
270bdcd8170SKalle Valo 	status = ath6kl_bmi_write(ar,
271bdcd8170SKalle Valo 			ath6kl_get_hi_item_addr(ar,
272bdcd8170SKalle Valo 			HI_ITEM(hi_mbox_io_block_sz)),
273bdcd8170SKalle Valo 			(u8 *)&blk_size,
274bdcd8170SKalle Valo 			4);
275bdcd8170SKalle Valo 	if (status) {
276bdcd8170SKalle Valo 		ath6kl_err("bmi_write_memory for IO block size failed\n");
277bdcd8170SKalle Valo 		goto out;
278bdcd8170SKalle Valo 	}
279bdcd8170SKalle Valo 
280bdcd8170SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n",
281bdcd8170SKalle Valo 		   blk_size,
282bdcd8170SKalle Valo 		   ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz)));
283bdcd8170SKalle Valo 
284bdcd8170SKalle Valo 	if (mbox_isr_yield_val) {
285bdcd8170SKalle Valo 		/* set the host interest area for the mbox ISR yield limit */
286bdcd8170SKalle Valo 		status = ath6kl_bmi_write(ar,
287bdcd8170SKalle Valo 				ath6kl_get_hi_item_addr(ar,
288bdcd8170SKalle Valo 				HI_ITEM(hi_mbox_isr_yield_limit)),
289bdcd8170SKalle Valo 				(u8 *)&mbox_isr_yield_val,
290bdcd8170SKalle Valo 				4);
291bdcd8170SKalle Valo 		if (status) {
292bdcd8170SKalle Valo 			ath6kl_err("bmi_write_memory for yield limit failed\n");
293bdcd8170SKalle Valo 			goto out;
294bdcd8170SKalle Valo 		}
295bdcd8170SKalle Valo 	}
296bdcd8170SKalle Valo 
297bdcd8170SKalle Valo out:
298bdcd8170SKalle Valo 	return status;
299bdcd8170SKalle Valo }
300bdcd8170SKalle Valo 
301bdcd8170SKalle Valo #define REG_DUMP_COUNT_AR6003   60
302bdcd8170SKalle Valo #define REGISTER_DUMP_LEN_MAX   60
303bdcd8170SKalle Valo 
304bdcd8170SKalle Valo static void ath6kl_dump_target_assert_info(struct ath6kl *ar)
305bdcd8170SKalle Valo {
306bdcd8170SKalle Valo 	u32 address;
307bdcd8170SKalle Valo 	u32 regdump_loc = 0;
308bdcd8170SKalle Valo 	int status;
309bdcd8170SKalle Valo 	u32 regdump_val[REGISTER_DUMP_LEN_MAX];
310bdcd8170SKalle Valo 	u32 i;
311bdcd8170SKalle Valo 
312bdcd8170SKalle Valo 	if (ar->target_type != TARGET_TYPE_AR6003)
313bdcd8170SKalle Valo 		return;
314bdcd8170SKalle Valo 
315bdcd8170SKalle Valo 	/* the reg dump pointer is copied to the host interest area */
316bdcd8170SKalle Valo 	address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_failure_state));
31731024d99SKevin Fang 	address = TARG_VTOP(ar->target_type, address);
318bdcd8170SKalle Valo 
319bdcd8170SKalle Valo 	/* read RAM location through diagnostic window */
320addb44beSKalle Valo 	status = ath6kl_diag_read32(ar, address, &regdump_loc);
321bdcd8170SKalle Valo 
322bdcd8170SKalle Valo 	if (status || !regdump_loc) {
323bdcd8170SKalle Valo 		ath6kl_err("failed to get ptr to register dump area\n");
324bdcd8170SKalle Valo 		return;
325bdcd8170SKalle Valo 	}
326bdcd8170SKalle Valo 
327bdcd8170SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_TRC, "location of register dump data: 0x%X\n",
328bdcd8170SKalle Valo 		regdump_loc);
32931024d99SKevin Fang 	regdump_loc = TARG_VTOP(ar->target_type, regdump_loc);
330bdcd8170SKalle Valo 
331bdcd8170SKalle Valo 	/* fetch register dump data */
332addb44beSKalle Valo 	status = ath6kl_diag_read(ar, regdump_loc, (u8 *)&regdump_val[0],
333addb44beSKalle Valo 				  REG_DUMP_COUNT_AR6003 * (sizeof(u32)));
334bdcd8170SKalle Valo 
335bdcd8170SKalle Valo 	if (status) {
336bdcd8170SKalle Valo 		ath6kl_err("failed to get register dump\n");
337bdcd8170SKalle Valo 		return;
338bdcd8170SKalle Valo 	}
339bdcd8170SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_TRC, "Register Dump:\n");
340bdcd8170SKalle Valo 
341bdcd8170SKalle Valo 	for (i = 0; i < REG_DUMP_COUNT_AR6003; i++)
342bdcd8170SKalle Valo 		ath6kl_dbg(ATH6KL_DBG_TRC, " %d :  0x%8.8X\n",
343bdcd8170SKalle Valo 			   i, regdump_val[i]);
344bdcd8170SKalle Valo 
345bdcd8170SKalle Valo }
346bdcd8170SKalle Valo 
347bdcd8170SKalle Valo void ath6kl_target_failure(struct ath6kl *ar)
348bdcd8170SKalle Valo {
349bdcd8170SKalle Valo 	ath6kl_err("target asserted\n");
350bdcd8170SKalle Valo 
351bdcd8170SKalle Valo 	/* try dumping target assertion information (if any) */
352bdcd8170SKalle Valo 	ath6kl_dump_target_assert_info(ar);
353bdcd8170SKalle Valo 
354bdcd8170SKalle Valo }
355bdcd8170SKalle Valo 
356bdcd8170SKalle Valo static int ath6kl_target_config_wlan_params(struct ath6kl *ar)
357bdcd8170SKalle Valo {
358bdcd8170SKalle Valo 	int status = 0;
3594dea08e0SJouni Malinen 	int ret;
360bdcd8170SKalle Valo 
361bdcd8170SKalle Valo 	/*
362bdcd8170SKalle Valo 	 * Configure the device for rx dot11 header rules. "0,0" are the
363bdcd8170SKalle Valo 	 * default values. Required if checksum offload is needed. Set
364bdcd8170SKalle Valo 	 * RxMetaVersion to 2.
365bdcd8170SKalle Valo 	 */
366bdcd8170SKalle Valo 	if (ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi,
367bdcd8170SKalle Valo 					       ar->rx_meta_ver, 0, 0)) {
368bdcd8170SKalle Valo 		ath6kl_err("unable to set the rx frame format\n");
369bdcd8170SKalle Valo 		status = -EIO;
370bdcd8170SKalle Valo 	}
371bdcd8170SKalle Valo 
372bdcd8170SKalle Valo 	if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN)
373bdcd8170SKalle Valo 		if ((ath6kl_wmi_pmparams_cmd(ar->wmi, 0, 1, 0, 0, 1,
374bdcd8170SKalle Valo 		     IGNORE_POWER_SAVE_FAIL_EVENT_DURING_SCAN)) != 0) {
375bdcd8170SKalle Valo 			ath6kl_err("unable to set power save fail event policy\n");
376bdcd8170SKalle Valo 			status = -EIO;
377bdcd8170SKalle Valo 		}
378bdcd8170SKalle Valo 
379bdcd8170SKalle Valo 	if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER))
380bdcd8170SKalle Valo 		if ((ath6kl_wmi_set_lpreamble_cmd(ar->wmi, 0,
381bdcd8170SKalle Valo 		     WMI_DONOT_IGNORE_BARKER_IN_ERP)) != 0) {
382bdcd8170SKalle Valo 			ath6kl_err("unable to set barker preamble policy\n");
383bdcd8170SKalle Valo 			status = -EIO;
384bdcd8170SKalle Valo 		}
385bdcd8170SKalle Valo 
386bdcd8170SKalle Valo 	if (ath6kl_wmi_set_keepalive_cmd(ar->wmi,
387bdcd8170SKalle Valo 			WLAN_CONFIG_KEEP_ALIVE_INTERVAL)) {
388bdcd8170SKalle Valo 		ath6kl_err("unable to set keep alive interval\n");
389bdcd8170SKalle Valo 		status = -EIO;
390bdcd8170SKalle Valo 	}
391bdcd8170SKalle Valo 
392bdcd8170SKalle Valo 	if (ath6kl_wmi_disctimeout_cmd(ar->wmi,
393bdcd8170SKalle Valo 			WLAN_CONFIG_DISCONNECT_TIMEOUT)) {
394bdcd8170SKalle Valo 		ath6kl_err("unable to set disconnect timeout\n");
395bdcd8170SKalle Valo 		status = -EIO;
396bdcd8170SKalle Valo 	}
397bdcd8170SKalle Valo 
398bdcd8170SKalle Valo 	if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST))
399bdcd8170SKalle Valo 		if (ath6kl_wmi_set_wmm_txop(ar->wmi, WMI_TXOP_DISABLED)) {
400bdcd8170SKalle Valo 			ath6kl_err("unable to set txop bursting\n");
401bdcd8170SKalle Valo 			status = -EIO;
402bdcd8170SKalle Valo 		}
403bdcd8170SKalle Valo 
4046bbc7c35SJouni Malinen 	if (ar->p2p) {
4056bbc7c35SJouni Malinen 		ret = ath6kl_wmi_info_req_cmd(ar->wmi,
4066bbc7c35SJouni Malinen 					      P2P_FLAG_CAPABILITIES_REQ |
4074dea08e0SJouni Malinen 					      P2P_FLAG_MACADDR_REQ |
4084dea08e0SJouni Malinen 					      P2P_FLAG_HMODEL_REQ);
4094dea08e0SJouni Malinen 		if (ret) {
4104dea08e0SJouni Malinen 			ath6kl_dbg(ATH6KL_DBG_TRC, "failed to request P2P "
4116bbc7c35SJouni Malinen 				   "capabilities (%d) - assuming P2P not "
4126bbc7c35SJouni Malinen 				   "supported\n", ret);
4136bbc7c35SJouni Malinen 			ar->p2p = 0;
4146bbc7c35SJouni Malinen 		}
4156bbc7c35SJouni Malinen 	}
4166bbc7c35SJouni Malinen 
4176bbc7c35SJouni Malinen 	if (ar->p2p) {
4186bbc7c35SJouni Malinen 		/* Enable Probe Request reporting for P2P */
4196bbc7c35SJouni Malinen 		ret = ath6kl_wmi_probe_report_req_cmd(ar->wmi, true);
4206bbc7c35SJouni Malinen 		if (ret) {
4216bbc7c35SJouni Malinen 			ath6kl_dbg(ATH6KL_DBG_TRC, "failed to enable Probe "
4226bbc7c35SJouni Malinen 				   "Request reporting (%d)\n", ret);
4236bbc7c35SJouni Malinen 		}
4244dea08e0SJouni Malinen 	}
4254dea08e0SJouni Malinen 
426bdcd8170SKalle Valo 	return status;
427bdcd8170SKalle Valo }
428bdcd8170SKalle Valo 
429bdcd8170SKalle Valo int ath6kl_configure_target(struct ath6kl *ar)
430bdcd8170SKalle Valo {
431bdcd8170SKalle Valo 	u32 param, ram_reserved_size;
432bdcd8170SKalle Valo 	u8 fw_iftype;
433bdcd8170SKalle Valo 
434dd3751f7SVasanthakumar Thiagarajan 	fw_iftype = HI_OPTION_FW_MODE_BSS_STA;
435bdcd8170SKalle Valo 
436bdcd8170SKalle Valo 	/* Tell target which HTC version it is used*/
437bdcd8170SKalle Valo 	param = HTC_PROTOCOL_VERSION;
438bdcd8170SKalle Valo 	if (ath6kl_bmi_write(ar,
439bdcd8170SKalle Valo 			     ath6kl_get_hi_item_addr(ar,
440bdcd8170SKalle Valo 			     HI_ITEM(hi_app_host_interest)),
441bdcd8170SKalle Valo 			     (u8 *)&param, 4) != 0) {
442bdcd8170SKalle Valo 		ath6kl_err("bmi_write_memory for htc version failed\n");
443bdcd8170SKalle Valo 		return -EIO;
444bdcd8170SKalle Valo 	}
445bdcd8170SKalle Valo 
446bdcd8170SKalle Valo 	/* set the firmware mode to STA/IBSS/AP */
447bdcd8170SKalle Valo 	param = 0;
448bdcd8170SKalle Valo 
449bdcd8170SKalle Valo 	if (ath6kl_bmi_read(ar,
450bdcd8170SKalle Valo 			    ath6kl_get_hi_item_addr(ar,
451bdcd8170SKalle Valo 			    HI_ITEM(hi_option_flag)),
452bdcd8170SKalle Valo 			    (u8 *)&param, 4) != 0) {
453bdcd8170SKalle Valo 		ath6kl_err("bmi_read_memory for setting fwmode failed\n");
454bdcd8170SKalle Valo 		return -EIO;
455bdcd8170SKalle Valo 	}
456bdcd8170SKalle Valo 
457bdcd8170SKalle Valo 	param |= (1 << HI_OPTION_NUM_DEV_SHIFT);
458bdcd8170SKalle Valo 	param |= (fw_iftype << HI_OPTION_FW_MODE_SHIFT);
4596bbc7c35SJouni Malinen 	if (ar->p2p && fw_iftype == HI_OPTION_FW_MODE_BSS_STA) {
4606bbc7c35SJouni Malinen 		param |= HI_OPTION_FW_SUBMODE_P2PDEV <<
4616bbc7c35SJouni Malinen 			HI_OPTION_FW_SUBMODE_SHIFT;
4626bbc7c35SJouni Malinen 	}
463bdcd8170SKalle Valo 	param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
464bdcd8170SKalle Valo 	param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
465bdcd8170SKalle Valo 
466bdcd8170SKalle Valo 	if (ath6kl_bmi_write(ar,
467bdcd8170SKalle Valo 			     ath6kl_get_hi_item_addr(ar,
468bdcd8170SKalle Valo 			     HI_ITEM(hi_option_flag)),
469bdcd8170SKalle Valo 			     (u8 *)&param,
470bdcd8170SKalle Valo 			     4) != 0) {
471bdcd8170SKalle Valo 		ath6kl_err("bmi_write_memory for setting fwmode failed\n");
472bdcd8170SKalle Valo 		return -EIO;
473bdcd8170SKalle Valo 	}
474bdcd8170SKalle Valo 
475bdcd8170SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n");
476bdcd8170SKalle Valo 
477bdcd8170SKalle Valo 	/*
478bdcd8170SKalle Valo 	 * Hardcode the address use for the extended board data
479bdcd8170SKalle Valo 	 * Ideally this should be pre-allocate by the OS at boot time
480bdcd8170SKalle Valo 	 * But since it is a new feature and board data is loaded
481bdcd8170SKalle Valo 	 * at init time, we have to workaround this from host.
482bdcd8170SKalle Valo 	 * It is difficult to patch the firmware boot code,
483bdcd8170SKalle Valo 	 * but possible in theory.
484bdcd8170SKalle Valo 	 */
485bdcd8170SKalle Valo 
486991b27eaSKalle Valo 	param = ar->hw.board_ext_data_addr;
487991b27eaSKalle Valo 	ram_reserved_size = ar->hw.reserved_ram_size;
488bdcd8170SKalle Valo 
489991b27eaSKalle Valo 	if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar,
490bdcd8170SKalle Valo 					HI_ITEM(hi_board_ext_data)),
491bdcd8170SKalle Valo 			     (u8 *)&param, 4) != 0) {
492bdcd8170SKalle Valo 		ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n");
493bdcd8170SKalle Valo 		return -EIO;
494bdcd8170SKalle Valo 	}
495991b27eaSKalle Valo 
496991b27eaSKalle Valo 	if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar,
497bdcd8170SKalle Valo 					HI_ITEM(hi_end_ram_reserve_sz)),
498bdcd8170SKalle Valo 			     (u8 *)&ram_reserved_size, 4) != 0) {
499bdcd8170SKalle Valo 		ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n");
500bdcd8170SKalle Valo 		return -EIO;
501bdcd8170SKalle Valo 	}
502bdcd8170SKalle Valo 
503bdcd8170SKalle Valo 	/* set the block size for the target */
504bdcd8170SKalle Valo 	if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0))
505bdcd8170SKalle Valo 		/* use default number of control buffers */
506bdcd8170SKalle Valo 		return -EIO;
507bdcd8170SKalle Valo 
508bdcd8170SKalle Valo 	return 0;
509bdcd8170SKalle Valo }
510bdcd8170SKalle Valo 
5118dafb70eSVasanthakumar Thiagarajan void ath6kl_core_free(struct ath6kl *ar)
512bdcd8170SKalle Valo {
5138dafb70eSVasanthakumar Thiagarajan 	wiphy_free(ar->wiphy);
514bdcd8170SKalle Valo }
515bdcd8170SKalle Valo 
5166db8fa53SVasanthakumar Thiagarajan void ath6kl_core_cleanup(struct ath6kl *ar)
517bdcd8170SKalle Valo {
5186db8fa53SVasanthakumar Thiagarajan 	destroy_workqueue(ar->ath6kl_wq);
519bdcd8170SKalle Valo 
5206db8fa53SVasanthakumar Thiagarajan 	if (ar->htc_target)
5216db8fa53SVasanthakumar Thiagarajan 		ath6kl_htc_cleanup(ar->htc_target);
5226db8fa53SVasanthakumar Thiagarajan 
5236db8fa53SVasanthakumar Thiagarajan 	ath6kl_cookie_cleanup(ar);
5246db8fa53SVasanthakumar Thiagarajan 
5256db8fa53SVasanthakumar Thiagarajan 	ath6kl_cleanup_amsdu_rxbufs(ar);
5266db8fa53SVasanthakumar Thiagarajan 
5276db8fa53SVasanthakumar Thiagarajan 	ath6kl_bmi_cleanup(ar);
5286db8fa53SVasanthakumar Thiagarajan 
5296db8fa53SVasanthakumar Thiagarajan 	ath6kl_debug_cleanup(ar);
5306db8fa53SVasanthakumar Thiagarajan 
5316db8fa53SVasanthakumar Thiagarajan 	kfree(ar->fw_board);
5326db8fa53SVasanthakumar Thiagarajan 	kfree(ar->fw_otp);
5336db8fa53SVasanthakumar Thiagarajan 	kfree(ar->fw);
5346db8fa53SVasanthakumar Thiagarajan 	kfree(ar->fw_patch);
5356db8fa53SVasanthakumar Thiagarajan 
5366db8fa53SVasanthakumar Thiagarajan 	ath6kl_deinit_ieee80211_hw(ar);
537bdcd8170SKalle Valo }
538bdcd8170SKalle Valo 
539bdcd8170SKalle Valo /* firmware upload */
540bdcd8170SKalle Valo static int ath6kl_get_fw(struct ath6kl *ar, const char *filename,
541bdcd8170SKalle Valo 			 u8 **fw, size_t *fw_len)
542bdcd8170SKalle Valo {
543bdcd8170SKalle Valo 	const struct firmware *fw_entry;
544bdcd8170SKalle Valo 	int ret;
545bdcd8170SKalle Valo 
546bdcd8170SKalle Valo 	ret = request_firmware(&fw_entry, filename, ar->dev);
547bdcd8170SKalle Valo 	if (ret)
548bdcd8170SKalle Valo 		return ret;
549bdcd8170SKalle Valo 
550bdcd8170SKalle Valo 	*fw_len = fw_entry->size;
551bdcd8170SKalle Valo 	*fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL);
552bdcd8170SKalle Valo 
553bdcd8170SKalle Valo 	if (*fw == NULL)
554bdcd8170SKalle Valo 		ret = -ENOMEM;
555bdcd8170SKalle Valo 
556bdcd8170SKalle Valo 	release_firmware(fw_entry);
557bdcd8170SKalle Valo 
558bdcd8170SKalle Valo 	return ret;
559bdcd8170SKalle Valo }
560bdcd8170SKalle Valo 
56192ecbff4SSam Leffler #ifdef CONFIG_OF
56292ecbff4SSam Leffler static const char *get_target_ver_dir(const struct ath6kl *ar)
56392ecbff4SSam Leffler {
56492ecbff4SSam Leffler 	switch (ar->version.target_ver) {
56592ecbff4SSam Leffler 	case AR6003_REV1_VERSION:
56692ecbff4SSam Leffler 		return "ath6k/AR6003/hw1.0";
56792ecbff4SSam Leffler 	case AR6003_REV2_VERSION:
56892ecbff4SSam Leffler 		return "ath6k/AR6003/hw2.0";
56992ecbff4SSam Leffler 	case AR6003_REV3_VERSION:
57092ecbff4SSam Leffler 		return "ath6k/AR6003/hw2.1.1";
57192ecbff4SSam Leffler 	}
57292ecbff4SSam Leffler 	ath6kl_warn("%s: unsupported target version 0x%x.\n", __func__,
57392ecbff4SSam Leffler 		    ar->version.target_ver);
57492ecbff4SSam Leffler 	return NULL;
57592ecbff4SSam Leffler }
57692ecbff4SSam Leffler 
57792ecbff4SSam Leffler /*
57892ecbff4SSam Leffler  * Check the device tree for a board-id and use it to construct
57992ecbff4SSam Leffler  * the pathname to the firmware file.  Used (for now) to find a
58092ecbff4SSam Leffler  * fallback to the "bdata.bin" file--typically a symlink to the
58192ecbff4SSam Leffler  * appropriate board-specific file.
58292ecbff4SSam Leffler  */
58392ecbff4SSam Leffler static bool check_device_tree(struct ath6kl *ar)
58492ecbff4SSam Leffler {
58592ecbff4SSam Leffler 	static const char *board_id_prop = "atheros,board-id";
58692ecbff4SSam Leffler 	struct device_node *node;
58792ecbff4SSam Leffler 	char board_filename[64];
58892ecbff4SSam Leffler 	const char *board_id;
58992ecbff4SSam Leffler 	int ret;
59092ecbff4SSam Leffler 
59192ecbff4SSam Leffler 	for_each_compatible_node(node, NULL, "atheros,ath6kl") {
59292ecbff4SSam Leffler 		board_id = of_get_property(node, board_id_prop, NULL);
59392ecbff4SSam Leffler 		if (board_id == NULL) {
59492ecbff4SSam Leffler 			ath6kl_warn("No \"%s\" property on %s node.\n",
59592ecbff4SSam Leffler 				    board_id_prop, node->name);
59692ecbff4SSam Leffler 			continue;
59792ecbff4SSam Leffler 		}
59892ecbff4SSam Leffler 		snprintf(board_filename, sizeof(board_filename),
59992ecbff4SSam Leffler 			 "%s/bdata.%s.bin", get_target_ver_dir(ar), board_id);
60092ecbff4SSam Leffler 
60192ecbff4SSam Leffler 		ret = ath6kl_get_fw(ar, board_filename, &ar->fw_board,
60292ecbff4SSam Leffler 				    &ar->fw_board_len);
60392ecbff4SSam Leffler 		if (ret) {
60492ecbff4SSam Leffler 			ath6kl_err("Failed to get DT board file %s: %d\n",
60592ecbff4SSam Leffler 				   board_filename, ret);
60692ecbff4SSam Leffler 			continue;
60792ecbff4SSam Leffler 		}
60892ecbff4SSam Leffler 		return true;
60992ecbff4SSam Leffler 	}
61092ecbff4SSam Leffler 	return false;
61192ecbff4SSam Leffler }
61292ecbff4SSam Leffler #else
61392ecbff4SSam Leffler static bool check_device_tree(struct ath6kl *ar)
61492ecbff4SSam Leffler {
61592ecbff4SSam Leffler 	return false;
61692ecbff4SSam Leffler }
61792ecbff4SSam Leffler #endif /* CONFIG_OF */
61892ecbff4SSam Leffler 
619bdcd8170SKalle Valo static int ath6kl_fetch_board_file(struct ath6kl *ar)
620bdcd8170SKalle Valo {
621bdcd8170SKalle Valo 	const char *filename;
622bdcd8170SKalle Valo 	int ret;
623bdcd8170SKalle Valo 
624772c31eeSKalle Valo 	if (ar->fw_board != NULL)
625772c31eeSKalle Valo 		return 0;
626772c31eeSKalle Valo 
627bdcd8170SKalle Valo 	switch (ar->version.target_ver) {
628bdcd8170SKalle Valo 	case AR6003_REV2_VERSION:
629bdcd8170SKalle Valo 		filename = AR6003_REV2_BOARD_DATA_FILE;
630bdcd8170SKalle Valo 		break;
63131024d99SKevin Fang 	case AR6004_REV1_VERSION:
63231024d99SKevin Fang 		filename = AR6004_REV1_BOARD_DATA_FILE;
63331024d99SKevin Fang 		break;
634bdcd8170SKalle Valo 	default:
635bdcd8170SKalle Valo 		filename = AR6003_REV3_BOARD_DATA_FILE;
636bdcd8170SKalle Valo 		break;
637bdcd8170SKalle Valo 	}
638bdcd8170SKalle Valo 
639bdcd8170SKalle Valo 	ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
640bdcd8170SKalle Valo 			    &ar->fw_board_len);
641bdcd8170SKalle Valo 	if (ret == 0) {
642bdcd8170SKalle Valo 		/* managed to get proper board file */
643bdcd8170SKalle Valo 		return 0;
644bdcd8170SKalle Valo 	}
645bdcd8170SKalle Valo 
64692ecbff4SSam Leffler 	if (check_device_tree(ar)) {
64792ecbff4SSam Leffler 		/* got board file from device tree */
64892ecbff4SSam Leffler 		return 0;
64992ecbff4SSam Leffler 	}
65092ecbff4SSam Leffler 
651bdcd8170SKalle Valo 	/* there was no proper board file, try to use default instead */
652bdcd8170SKalle Valo 	ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n",
653bdcd8170SKalle Valo 		    filename, ret);
654bdcd8170SKalle Valo 
655bdcd8170SKalle Valo 	switch (ar->version.target_ver) {
656bdcd8170SKalle Valo 	case AR6003_REV2_VERSION:
657bdcd8170SKalle Valo 		filename = AR6003_REV2_DEFAULT_BOARD_DATA_FILE;
658bdcd8170SKalle Valo 		break;
65931024d99SKevin Fang 	case AR6004_REV1_VERSION:
66031024d99SKevin Fang 		filename = AR6004_REV1_DEFAULT_BOARD_DATA_FILE;
66131024d99SKevin Fang 		break;
662bdcd8170SKalle Valo 	default:
663bdcd8170SKalle Valo 		filename = AR6003_REV3_DEFAULT_BOARD_DATA_FILE;
664bdcd8170SKalle Valo 		break;
665bdcd8170SKalle Valo 	}
666bdcd8170SKalle Valo 
667bdcd8170SKalle Valo 	ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
668bdcd8170SKalle Valo 			    &ar->fw_board_len);
669bdcd8170SKalle Valo 	if (ret) {
670bdcd8170SKalle Valo 		ath6kl_err("Failed to get default board file %s: %d\n",
671bdcd8170SKalle Valo 			   filename, ret);
672bdcd8170SKalle Valo 		return ret;
673bdcd8170SKalle Valo 	}
674bdcd8170SKalle Valo 
675bdcd8170SKalle Valo 	ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n");
676bdcd8170SKalle Valo 	ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n");
677bdcd8170SKalle Valo 
678bdcd8170SKalle Valo 	return 0;
679bdcd8170SKalle Valo }
680bdcd8170SKalle Valo 
681772c31eeSKalle Valo static int ath6kl_fetch_otp_file(struct ath6kl *ar)
682772c31eeSKalle Valo {
683772c31eeSKalle Valo 	const char *filename;
684772c31eeSKalle Valo 	int ret;
685772c31eeSKalle Valo 
686772c31eeSKalle Valo 	if (ar->fw_otp != NULL)
687772c31eeSKalle Valo 		return 0;
688772c31eeSKalle Valo 
689772c31eeSKalle Valo 	switch (ar->version.target_ver) {
690772c31eeSKalle Valo 	case AR6003_REV2_VERSION:
691772c31eeSKalle Valo 		filename = AR6003_REV2_OTP_FILE;
692772c31eeSKalle Valo 		break;
693772c31eeSKalle Valo 	case AR6004_REV1_VERSION:
694772c31eeSKalle Valo 		ath6kl_dbg(ATH6KL_DBG_TRC, "AR6004 doesn't need OTP file\n");
695772c31eeSKalle Valo 		return 0;
696772c31eeSKalle Valo 		break;
697772c31eeSKalle Valo 	default:
698772c31eeSKalle Valo 		filename = AR6003_REV3_OTP_FILE;
699772c31eeSKalle Valo 		break;
700772c31eeSKalle Valo 	}
701772c31eeSKalle Valo 
702772c31eeSKalle Valo 	ret = ath6kl_get_fw(ar, filename, &ar->fw_otp,
703772c31eeSKalle Valo 			    &ar->fw_otp_len);
704772c31eeSKalle Valo 	if (ret) {
705772c31eeSKalle Valo 		ath6kl_err("Failed to get OTP file %s: %d\n",
706772c31eeSKalle Valo 			   filename, ret);
707772c31eeSKalle Valo 		return ret;
708772c31eeSKalle Valo 	}
709772c31eeSKalle Valo 
710772c31eeSKalle Valo 	return 0;
711772c31eeSKalle Valo }
712772c31eeSKalle Valo 
713772c31eeSKalle Valo static int ath6kl_fetch_fw_file(struct ath6kl *ar)
714772c31eeSKalle Valo {
715772c31eeSKalle Valo 	const char *filename;
716772c31eeSKalle Valo 	int ret;
717772c31eeSKalle Valo 
718772c31eeSKalle Valo 	if (ar->fw != NULL)
719772c31eeSKalle Valo 		return 0;
720772c31eeSKalle Valo 
721772c31eeSKalle Valo 	if (testmode) {
722772c31eeSKalle Valo 		switch (ar->version.target_ver) {
723772c31eeSKalle Valo 		case AR6003_REV2_VERSION:
724772c31eeSKalle Valo 			filename = AR6003_REV2_TCMD_FIRMWARE_FILE;
725772c31eeSKalle Valo 			break;
726772c31eeSKalle Valo 		case AR6003_REV3_VERSION:
727772c31eeSKalle Valo 			filename = AR6003_REV3_TCMD_FIRMWARE_FILE;
728772c31eeSKalle Valo 			break;
729772c31eeSKalle Valo 		case AR6004_REV1_VERSION:
730772c31eeSKalle Valo 			ath6kl_warn("testmode not supported with ar6004\n");
731772c31eeSKalle Valo 			return -EOPNOTSUPP;
732772c31eeSKalle Valo 		default:
733772c31eeSKalle Valo 			ath6kl_warn("unknown target version: 0x%x\n",
734772c31eeSKalle Valo 				       ar->version.target_ver);
735772c31eeSKalle Valo 			return -EINVAL;
736772c31eeSKalle Valo 		}
737772c31eeSKalle Valo 
738772c31eeSKalle Valo 		set_bit(TESTMODE, &ar->flag);
739772c31eeSKalle Valo 
740772c31eeSKalle Valo 		goto get_fw;
741772c31eeSKalle Valo 	}
742772c31eeSKalle Valo 
743772c31eeSKalle Valo 	switch (ar->version.target_ver) {
744772c31eeSKalle Valo 	case AR6003_REV2_VERSION:
745772c31eeSKalle Valo 		filename = AR6003_REV2_FIRMWARE_FILE;
746772c31eeSKalle Valo 		break;
747772c31eeSKalle Valo 	case AR6004_REV1_VERSION:
748772c31eeSKalle Valo 		filename = AR6004_REV1_FIRMWARE_FILE;
749772c31eeSKalle Valo 		break;
750772c31eeSKalle Valo 	default:
751772c31eeSKalle Valo 		filename = AR6003_REV3_FIRMWARE_FILE;
752772c31eeSKalle Valo 		break;
753772c31eeSKalle Valo 	}
754772c31eeSKalle Valo 
755772c31eeSKalle Valo get_fw:
756772c31eeSKalle Valo 	ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
757772c31eeSKalle Valo 	if (ret) {
758772c31eeSKalle Valo 		ath6kl_err("Failed to get firmware file %s: %d\n",
759772c31eeSKalle Valo 			   filename, ret);
760772c31eeSKalle Valo 		return ret;
761772c31eeSKalle Valo 	}
762772c31eeSKalle Valo 
763772c31eeSKalle Valo 	return 0;
764772c31eeSKalle Valo }
765772c31eeSKalle Valo 
766772c31eeSKalle Valo static int ath6kl_fetch_patch_file(struct ath6kl *ar)
767772c31eeSKalle Valo {
768772c31eeSKalle Valo 	const char *filename;
769772c31eeSKalle Valo 	int ret;
770772c31eeSKalle Valo 
771772c31eeSKalle Valo 	switch (ar->version.target_ver) {
772772c31eeSKalle Valo 	case AR6003_REV2_VERSION:
773772c31eeSKalle Valo 		filename = AR6003_REV2_PATCH_FILE;
774772c31eeSKalle Valo 		break;
775772c31eeSKalle Valo 	case AR6004_REV1_VERSION:
776772c31eeSKalle Valo 		/* FIXME: implement for AR6004 */
777772c31eeSKalle Valo 		return 0;
778772c31eeSKalle Valo 		break;
779772c31eeSKalle Valo 	default:
780772c31eeSKalle Valo 		filename = AR6003_REV3_PATCH_FILE;
781772c31eeSKalle Valo 		break;
782772c31eeSKalle Valo 	}
783772c31eeSKalle Valo 
784772c31eeSKalle Valo 	if (ar->fw_patch == NULL) {
785772c31eeSKalle Valo 		ret = ath6kl_get_fw(ar, filename, &ar->fw_patch,
786772c31eeSKalle Valo 				    &ar->fw_patch_len);
787772c31eeSKalle Valo 		if (ret) {
788772c31eeSKalle Valo 			ath6kl_err("Failed to get patch file %s: %d\n",
789772c31eeSKalle Valo 				   filename, ret);
790772c31eeSKalle Valo 			return ret;
791772c31eeSKalle Valo 		}
792772c31eeSKalle Valo 	}
793772c31eeSKalle Valo 
794772c31eeSKalle Valo 	return 0;
795772c31eeSKalle Valo }
796772c31eeSKalle Valo 
79750d41234SKalle Valo static int ath6kl_fetch_fw_api1(struct ath6kl *ar)
798772c31eeSKalle Valo {
799772c31eeSKalle Valo 	int ret;
800772c31eeSKalle Valo 
801772c31eeSKalle Valo 	ret = ath6kl_fetch_otp_file(ar);
802772c31eeSKalle Valo 	if (ret)
803772c31eeSKalle Valo 		return ret;
804772c31eeSKalle Valo 
805772c31eeSKalle Valo 	ret = ath6kl_fetch_fw_file(ar);
806772c31eeSKalle Valo 	if (ret)
807772c31eeSKalle Valo 		return ret;
808772c31eeSKalle Valo 
809772c31eeSKalle Valo 	ret = ath6kl_fetch_patch_file(ar);
810772c31eeSKalle Valo 	if (ret)
811772c31eeSKalle Valo 		return ret;
812772c31eeSKalle Valo 
813772c31eeSKalle Valo 	return 0;
814772c31eeSKalle Valo }
815bdcd8170SKalle Valo 
81650d41234SKalle Valo static int ath6kl_fetch_fw_api2(struct ath6kl *ar)
81750d41234SKalle Valo {
81850d41234SKalle Valo 	size_t magic_len, len, ie_len;
81950d41234SKalle Valo 	const struct firmware *fw;
82050d41234SKalle Valo 	struct ath6kl_fw_ie *hdr;
82150d41234SKalle Valo 	const char *filename;
82250d41234SKalle Valo 	const u8 *data;
82397e0496dSKalle Valo 	int ret, ie_id, i, index, bit;
8248a137480SKalle Valo 	__le32 *val;
82550d41234SKalle Valo 
82650d41234SKalle Valo 	switch (ar->version.target_ver) {
82750d41234SKalle Valo 	case AR6003_REV2_VERSION:
82850d41234SKalle Valo 		filename = AR6003_REV2_FIRMWARE_2_FILE;
82950d41234SKalle Valo 		break;
83050d41234SKalle Valo 	case AR6003_REV3_VERSION:
83150d41234SKalle Valo 		filename = AR6003_REV3_FIRMWARE_2_FILE;
83250d41234SKalle Valo 		break;
83350d41234SKalle Valo 	case AR6004_REV1_VERSION:
83450d41234SKalle Valo 		filename = AR6004_REV1_FIRMWARE_2_FILE;
83550d41234SKalle Valo 		break;
83650d41234SKalle Valo 	default:
83750d41234SKalle Valo 		return -EOPNOTSUPP;
83850d41234SKalle Valo 	}
83950d41234SKalle Valo 
84050d41234SKalle Valo 	ret = request_firmware(&fw, filename, ar->dev);
84150d41234SKalle Valo 	if (ret)
84250d41234SKalle Valo 		return ret;
84350d41234SKalle Valo 
84450d41234SKalle Valo 	data = fw->data;
84550d41234SKalle Valo 	len = fw->size;
84650d41234SKalle Valo 
84750d41234SKalle Valo 	/* magic also includes the null byte, check that as well */
84850d41234SKalle Valo 	magic_len = strlen(ATH6KL_FIRMWARE_MAGIC) + 1;
84950d41234SKalle Valo 
85050d41234SKalle Valo 	if (len < magic_len) {
85150d41234SKalle Valo 		ret = -EINVAL;
85250d41234SKalle Valo 		goto out;
85350d41234SKalle Valo 	}
85450d41234SKalle Valo 
85550d41234SKalle Valo 	if (memcmp(data, ATH6KL_FIRMWARE_MAGIC, magic_len) != 0) {
85650d41234SKalle Valo 		ret = -EINVAL;
85750d41234SKalle Valo 		goto out;
85850d41234SKalle Valo 	}
85950d41234SKalle Valo 
86050d41234SKalle Valo 	len -= magic_len;
86150d41234SKalle Valo 	data += magic_len;
86250d41234SKalle Valo 
86350d41234SKalle Valo 	/* loop elements */
86450d41234SKalle Valo 	while (len > sizeof(struct ath6kl_fw_ie)) {
86550d41234SKalle Valo 		/* hdr is unaligned! */
86650d41234SKalle Valo 		hdr = (struct ath6kl_fw_ie *) data;
86750d41234SKalle Valo 
86850d41234SKalle Valo 		ie_id = le32_to_cpup(&hdr->id);
86950d41234SKalle Valo 		ie_len = le32_to_cpup(&hdr->len);
87050d41234SKalle Valo 
87150d41234SKalle Valo 		len -= sizeof(*hdr);
87250d41234SKalle Valo 		data += sizeof(*hdr);
87350d41234SKalle Valo 
87450d41234SKalle Valo 		if (len < ie_len) {
87550d41234SKalle Valo 			ret = -EINVAL;
87650d41234SKalle Valo 			goto out;
87750d41234SKalle Valo 		}
87850d41234SKalle Valo 
87950d41234SKalle Valo 		switch (ie_id) {
88050d41234SKalle Valo 		case ATH6KL_FW_IE_OTP_IMAGE:
881ef548626SKalle Valo 			ath6kl_dbg(ATH6KL_DBG_BOOT, "found otp image ie (%zd B)\n",
8826bc36431SKalle Valo 				ie_len);
8836bc36431SKalle Valo 
88450d41234SKalle Valo 			ar->fw_otp = kmemdup(data, ie_len, GFP_KERNEL);
88550d41234SKalle Valo 
88650d41234SKalle Valo 			if (ar->fw_otp == NULL) {
88750d41234SKalle Valo 				ret = -ENOMEM;
88850d41234SKalle Valo 				goto out;
88950d41234SKalle Valo 			}
89050d41234SKalle Valo 
89150d41234SKalle Valo 			ar->fw_otp_len = ie_len;
89250d41234SKalle Valo 			break;
89350d41234SKalle Valo 		case ATH6KL_FW_IE_FW_IMAGE:
894ef548626SKalle Valo 			ath6kl_dbg(ATH6KL_DBG_BOOT, "found fw image ie (%zd B)\n",
8956bc36431SKalle Valo 				ie_len);
8966bc36431SKalle Valo 
89750d41234SKalle Valo 			ar->fw = kmemdup(data, ie_len, GFP_KERNEL);
89850d41234SKalle Valo 
89950d41234SKalle Valo 			if (ar->fw == NULL) {
90050d41234SKalle Valo 				ret = -ENOMEM;
90150d41234SKalle Valo 				goto out;
90250d41234SKalle Valo 			}
90350d41234SKalle Valo 
90450d41234SKalle Valo 			ar->fw_len = ie_len;
90550d41234SKalle Valo 			break;
90650d41234SKalle Valo 		case ATH6KL_FW_IE_PATCH_IMAGE:
907ef548626SKalle Valo 			ath6kl_dbg(ATH6KL_DBG_BOOT, "found patch image ie (%zd B)\n",
9086bc36431SKalle Valo 				ie_len);
9096bc36431SKalle Valo 
91050d41234SKalle Valo 			ar->fw_patch = kmemdup(data, ie_len, GFP_KERNEL);
91150d41234SKalle Valo 
91250d41234SKalle Valo 			if (ar->fw_patch == NULL) {
91350d41234SKalle Valo 				ret = -ENOMEM;
91450d41234SKalle Valo 				goto out;
91550d41234SKalle Valo 			}
91650d41234SKalle Valo 
91750d41234SKalle Valo 			ar->fw_patch_len = ie_len;
91850d41234SKalle Valo 			break;
9198a137480SKalle Valo 		case ATH6KL_FW_IE_RESERVED_RAM_SIZE:
9208a137480SKalle Valo 			val = (__le32 *) data;
9218a137480SKalle Valo 			ar->hw.reserved_ram_size = le32_to_cpup(val);
9226bc36431SKalle Valo 
9236bc36431SKalle Valo 			ath6kl_dbg(ATH6KL_DBG_BOOT,
9246bc36431SKalle Valo 				   "found reserved ram size ie 0x%d\n",
9256bc36431SKalle Valo 				   ar->hw.reserved_ram_size);
9268a137480SKalle Valo 			break;
92797e0496dSKalle Valo 		case ATH6KL_FW_IE_CAPABILITIES:
9286bc36431SKalle Valo 			ath6kl_dbg(ATH6KL_DBG_BOOT,
929ef548626SKalle Valo 				   "found firmware capabilities ie (%zd B)\n",
9306bc36431SKalle Valo 				   ie_len);
9316bc36431SKalle Valo 
93297e0496dSKalle Valo 			for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) {
93397e0496dSKalle Valo 				index = ALIGN(i, 8) / 8;
93497e0496dSKalle Valo 				bit = i % 8;
93597e0496dSKalle Valo 
93697e0496dSKalle Valo 				if (data[index] & (1 << bit))
93797e0496dSKalle Valo 					__set_bit(i, ar->fw_capabilities);
93897e0496dSKalle Valo 			}
9396bc36431SKalle Valo 
9406bc36431SKalle Valo 			ath6kl_dbg_dump(ATH6KL_DBG_BOOT, "capabilities", "",
9416bc36431SKalle Valo 					ar->fw_capabilities,
9426bc36431SKalle Valo 					sizeof(ar->fw_capabilities));
94397e0496dSKalle Valo 			break;
9441b4304daSKalle Valo 		case ATH6KL_FW_IE_PATCH_ADDR:
9451b4304daSKalle Valo 			if (ie_len != sizeof(*val))
9461b4304daSKalle Valo 				break;
9471b4304daSKalle Valo 
9481b4304daSKalle Valo 			val = (__le32 *) data;
9491b4304daSKalle Valo 			ar->hw.dataset_patch_addr = le32_to_cpup(val);
9506bc36431SKalle Valo 
9516bc36431SKalle Valo 			ath6kl_dbg(ATH6KL_DBG_BOOT,
9526bc36431SKalle Valo 				   "found patch address ie 0x%d\n",
9536bc36431SKalle Valo 				   ar->hw.dataset_patch_addr);
9541b4304daSKalle Valo 			break;
95550d41234SKalle Valo 		default:
9566bc36431SKalle Valo 			ath6kl_dbg(ATH6KL_DBG_BOOT, "Unknown fw ie: %u\n",
95750d41234SKalle Valo 				   le32_to_cpup(&hdr->id));
95850d41234SKalle Valo 			break;
95950d41234SKalle Valo 		}
96050d41234SKalle Valo 
96150d41234SKalle Valo 		len -= ie_len;
96250d41234SKalle Valo 		data += ie_len;
96350d41234SKalle Valo 	};
96450d41234SKalle Valo 
96550d41234SKalle Valo 	ret = 0;
96650d41234SKalle Valo out:
96750d41234SKalle Valo 	release_firmware(fw);
96850d41234SKalle Valo 
96950d41234SKalle Valo 	return ret;
97050d41234SKalle Valo }
97150d41234SKalle Valo 
97250d41234SKalle Valo static int ath6kl_fetch_firmwares(struct ath6kl *ar)
97350d41234SKalle Valo {
97450d41234SKalle Valo 	int ret;
97550d41234SKalle Valo 
97650d41234SKalle Valo 	ret = ath6kl_fetch_board_file(ar);
97750d41234SKalle Valo 	if (ret)
97850d41234SKalle Valo 		return ret;
97950d41234SKalle Valo 
98050d41234SKalle Valo 	ret = ath6kl_fetch_fw_api2(ar);
9816bc36431SKalle Valo 	if (ret == 0) {
9826bc36431SKalle Valo 		ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api 2\n");
98350d41234SKalle Valo 		return 0;
9846bc36431SKalle Valo 	}
98550d41234SKalle Valo 
98650d41234SKalle Valo 	ret = ath6kl_fetch_fw_api1(ar);
98750d41234SKalle Valo 	if (ret)
98850d41234SKalle Valo 		return ret;
98950d41234SKalle Valo 
9906bc36431SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api 1\n");
9916bc36431SKalle Valo 
99250d41234SKalle Valo 	return 0;
99350d41234SKalle Valo }
99450d41234SKalle Valo 
995bdcd8170SKalle Valo static int ath6kl_upload_board_file(struct ath6kl *ar)
996bdcd8170SKalle Valo {
997bdcd8170SKalle Valo 	u32 board_address, board_ext_address, param;
99831024d99SKevin Fang 	u32 board_data_size, board_ext_data_size;
999bdcd8170SKalle Valo 	int ret;
1000bdcd8170SKalle Valo 
1001772c31eeSKalle Valo 	if (WARN_ON(ar->fw_board == NULL))
1002772c31eeSKalle Valo 		return -ENOENT;
1003bdcd8170SKalle Valo 
100431024d99SKevin Fang 	/*
100531024d99SKevin Fang 	 * Determine where in Target RAM to write Board Data.
100631024d99SKevin Fang 	 * For AR6004, host determine Target RAM address for
100731024d99SKevin Fang 	 * writing board data.
100831024d99SKevin Fang 	 */
100931024d99SKevin Fang 	if (ar->target_type == TARGET_TYPE_AR6004) {
101031024d99SKevin Fang 		board_address = AR6004_REV1_BOARD_DATA_ADDRESS;
101131024d99SKevin Fang 		ath6kl_bmi_write(ar,
101231024d99SKevin Fang 				ath6kl_get_hi_item_addr(ar,
101331024d99SKevin Fang 				HI_ITEM(hi_board_data)),
101431024d99SKevin Fang 				(u8 *) &board_address, 4);
101531024d99SKevin Fang 	} else {
1016bdcd8170SKalle Valo 		ath6kl_bmi_read(ar,
1017bdcd8170SKalle Valo 				ath6kl_get_hi_item_addr(ar,
1018bdcd8170SKalle Valo 				HI_ITEM(hi_board_data)),
1019bdcd8170SKalle Valo 				(u8 *) &board_address, 4);
102031024d99SKevin Fang 	}
102131024d99SKevin Fang 
1022bdcd8170SKalle Valo 	/* determine where in target ram to write extended board data */
1023bdcd8170SKalle Valo 	ath6kl_bmi_read(ar,
1024bdcd8170SKalle Valo 			ath6kl_get_hi_item_addr(ar,
1025bdcd8170SKalle Valo 			HI_ITEM(hi_board_ext_data)),
1026bdcd8170SKalle Valo 			(u8 *) &board_ext_address, 4);
1027bdcd8170SKalle Valo 
1028bdcd8170SKalle Valo 	if (board_ext_address == 0) {
1029bdcd8170SKalle Valo 		ath6kl_err("Failed to get board file target address.\n");
1030bdcd8170SKalle Valo 		return -EINVAL;
1031bdcd8170SKalle Valo 	}
1032bdcd8170SKalle Valo 
103331024d99SKevin Fang 	switch (ar->target_type) {
103431024d99SKevin Fang 	case TARGET_TYPE_AR6003:
103531024d99SKevin Fang 		board_data_size = AR6003_BOARD_DATA_SZ;
103631024d99SKevin Fang 		board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ;
103731024d99SKevin Fang 		break;
103831024d99SKevin Fang 	case TARGET_TYPE_AR6004:
103931024d99SKevin Fang 		board_data_size = AR6004_BOARD_DATA_SZ;
104031024d99SKevin Fang 		board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ;
104131024d99SKevin Fang 		break;
104231024d99SKevin Fang 	default:
104331024d99SKevin Fang 		WARN_ON(1);
104431024d99SKevin Fang 		return -EINVAL;
104531024d99SKevin Fang 		break;
104631024d99SKevin Fang 	}
104731024d99SKevin Fang 
104831024d99SKevin Fang 	if (ar->fw_board_len == (board_data_size +
104931024d99SKevin Fang 				 board_ext_data_size)) {
105031024d99SKevin Fang 
1051bdcd8170SKalle Valo 		/* write extended board data */
10526bc36431SKalle Valo 		ath6kl_dbg(ATH6KL_DBG_BOOT,
10536bc36431SKalle Valo 			   "writing extended board data to 0x%x (%d B)\n",
10546bc36431SKalle Valo 			   board_ext_address, board_ext_data_size);
10556bc36431SKalle Valo 
1056bdcd8170SKalle Valo 		ret = ath6kl_bmi_write(ar, board_ext_address,
105731024d99SKevin Fang 				       ar->fw_board + board_data_size,
105831024d99SKevin Fang 				       board_ext_data_size);
1059bdcd8170SKalle Valo 		if (ret) {
1060bdcd8170SKalle Valo 			ath6kl_err("Failed to write extended board data: %d\n",
1061bdcd8170SKalle Valo 				   ret);
1062bdcd8170SKalle Valo 			return ret;
1063bdcd8170SKalle Valo 		}
1064bdcd8170SKalle Valo 
1065bdcd8170SKalle Valo 		/* record that extended board data is initialized */
106631024d99SKevin Fang 		param = (board_ext_data_size << 16) | 1;
106731024d99SKevin Fang 
1068bdcd8170SKalle Valo 		ath6kl_bmi_write(ar,
1069bdcd8170SKalle Valo 				 ath6kl_get_hi_item_addr(ar,
1070bdcd8170SKalle Valo 				 HI_ITEM(hi_board_ext_data_config)),
1071bdcd8170SKalle Valo 				 (unsigned char *) &param, 4);
1072bdcd8170SKalle Valo 	}
1073bdcd8170SKalle Valo 
107431024d99SKevin Fang 	if (ar->fw_board_len < board_data_size) {
1075bdcd8170SKalle Valo 		ath6kl_err("Too small board file: %zu\n", ar->fw_board_len);
1076bdcd8170SKalle Valo 		ret = -EINVAL;
1077bdcd8170SKalle Valo 		return ret;
1078bdcd8170SKalle Valo 	}
1079bdcd8170SKalle Valo 
10806bc36431SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_BOOT, "writing board file to 0x%x (%d B)\n",
10816bc36431SKalle Valo 		   board_address, board_data_size);
10826bc36431SKalle Valo 
1083bdcd8170SKalle Valo 	ret = ath6kl_bmi_write(ar, board_address, ar->fw_board,
108431024d99SKevin Fang 			       board_data_size);
1085bdcd8170SKalle Valo 
1086bdcd8170SKalle Valo 	if (ret) {
1087bdcd8170SKalle Valo 		ath6kl_err("Board file bmi write failed: %d\n", ret);
1088bdcd8170SKalle Valo 		return ret;
1089bdcd8170SKalle Valo 	}
1090bdcd8170SKalle Valo 
1091bdcd8170SKalle Valo 	/* record the fact that Board Data IS initialized */
1092bdcd8170SKalle Valo 	param = 1;
1093bdcd8170SKalle Valo 	ath6kl_bmi_write(ar,
1094bdcd8170SKalle Valo 			 ath6kl_get_hi_item_addr(ar,
1095bdcd8170SKalle Valo 			 HI_ITEM(hi_board_data_initialized)),
1096bdcd8170SKalle Valo 			 (u8 *)&param, 4);
1097bdcd8170SKalle Valo 
1098bdcd8170SKalle Valo 	return ret;
1099bdcd8170SKalle Valo }
1100bdcd8170SKalle Valo 
1101bdcd8170SKalle Valo static int ath6kl_upload_otp(struct ath6kl *ar)
1102bdcd8170SKalle Valo {
1103bdcd8170SKalle Valo 	u32 address, param;
1104bef26a7fSKalle Valo 	bool from_hw = false;
1105bdcd8170SKalle Valo 	int ret;
1106bdcd8170SKalle Valo 
1107772c31eeSKalle Valo 	if (WARN_ON(ar->fw_otp == NULL))
1108772c31eeSKalle Valo 		return -ENOENT;
1109bdcd8170SKalle Valo 
1110a01ac414SKalle Valo 	address = ar->hw.app_load_addr;
1111bdcd8170SKalle Valo 
1112ef548626SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_BOOT, "writing otp to 0x%x (%zd B)\n", address,
11136bc36431SKalle Valo 		   ar->fw_otp_len);
11146bc36431SKalle Valo 
1115bdcd8170SKalle Valo 	ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp,
1116bdcd8170SKalle Valo 				       ar->fw_otp_len);
1117bdcd8170SKalle Valo 	if (ret) {
1118bdcd8170SKalle Valo 		ath6kl_err("Failed to upload OTP file: %d\n", ret);
1119bdcd8170SKalle Valo 		return ret;
1120bdcd8170SKalle Valo 	}
1121bdcd8170SKalle Valo 
1122639d0b89SKalle Valo 	/* read firmware start address */
1123639d0b89SKalle Valo 	ret = ath6kl_bmi_read(ar,
1124639d0b89SKalle Valo 			      ath6kl_get_hi_item_addr(ar,
1125639d0b89SKalle Valo 						      HI_ITEM(hi_app_start)),
1126639d0b89SKalle Valo 			      (u8 *) &address, sizeof(address));
1127639d0b89SKalle Valo 
1128639d0b89SKalle Valo 	if (ret) {
1129639d0b89SKalle Valo 		ath6kl_err("Failed to read hi_app_start: %d\n", ret);
1130639d0b89SKalle Valo 		return ret;
1131639d0b89SKalle Valo 	}
1132639d0b89SKalle Valo 
1133bef26a7fSKalle Valo 	if (ar->hw.app_start_override_addr == 0) {
1134639d0b89SKalle Valo 		ar->hw.app_start_override_addr = address;
1135bef26a7fSKalle Valo 		from_hw = true;
1136bef26a7fSKalle Valo 	}
1137639d0b89SKalle Valo 
1138bef26a7fSKalle Valo 	ath6kl_dbg(ATH6KL_DBG_BOOT, "app_start_override_addr%s 0x%x\n",
1139bef26a7fSKalle Valo 		   from_hw ? " (from hw)" : "",
11406bc36431SKalle Valo 		   ar->hw.app_start_override_addr);
11416bc36431SKalle Valo 
1142bdcd8170SKalle Valo 	/* execute the OTP code */
1143bef26a7fSKalle Valo 	ath6kl_dbg(ATH6KL_DBG_BOOT, "executing OTP at 0x%x\n",
1144bef26a7fSKalle Valo 		   ar->hw.app_start_override_addr);
1145bdcd8170SKalle Valo 	param = 0;
1146bef26a7fSKalle Valo 	ath6kl_bmi_execute(ar, ar->hw.app_start_override_addr, &param);
1147bdcd8170SKalle Valo 
1148bdcd8170SKalle Valo 	return ret;
1149bdcd8170SKalle Valo }
1150bdcd8170SKalle Valo 
1151bdcd8170SKalle Valo static int ath6kl_upload_firmware(struct ath6kl *ar)
1152bdcd8170SKalle Valo {
1153bdcd8170SKalle Valo 	u32 address;
1154bdcd8170SKalle Valo 	int ret;
1155bdcd8170SKalle Valo 
1156772c31eeSKalle Valo 	if (WARN_ON(ar->fw == NULL))
1157772c31eeSKalle Valo 		return -ENOENT;
1158bdcd8170SKalle Valo 
1159a01ac414SKalle Valo 	address = ar->hw.app_load_addr;
1160bdcd8170SKalle Valo 
1161ef548626SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_BOOT, "writing firmware to 0x%x (%zd B)\n",
11626bc36431SKalle Valo 		   address, ar->fw_len);
11636bc36431SKalle Valo 
1164bdcd8170SKalle Valo 	ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len);
1165bdcd8170SKalle Valo 
1166bdcd8170SKalle Valo 	if (ret) {
1167bdcd8170SKalle Valo 		ath6kl_err("Failed to write firmware: %d\n", ret);
1168bdcd8170SKalle Valo 		return ret;
1169bdcd8170SKalle Valo 	}
1170bdcd8170SKalle Valo 
117131024d99SKevin Fang 	/*
117231024d99SKevin Fang 	 * Set starting address for firmware
117331024d99SKevin Fang 	 * Don't need to setup app_start override addr on AR6004
117431024d99SKevin Fang 	 */
117531024d99SKevin Fang 	if (ar->target_type != TARGET_TYPE_AR6004) {
1176a01ac414SKalle Valo 		address = ar->hw.app_start_override_addr;
1177bdcd8170SKalle Valo 		ath6kl_bmi_set_app_start(ar, address);
117831024d99SKevin Fang 	}
1179bdcd8170SKalle Valo 	return ret;
1180bdcd8170SKalle Valo }
1181bdcd8170SKalle Valo 
1182bdcd8170SKalle Valo static int ath6kl_upload_patch(struct ath6kl *ar)
1183bdcd8170SKalle Valo {
1184bdcd8170SKalle Valo 	u32 address, param;
1185bdcd8170SKalle Valo 	int ret;
1186bdcd8170SKalle Valo 
1187772c31eeSKalle Valo 	if (WARN_ON(ar->fw_patch == NULL))
1188772c31eeSKalle Valo 		return -ENOENT;
1189bdcd8170SKalle Valo 
1190a01ac414SKalle Valo 	address = ar->hw.dataset_patch_addr;
1191bdcd8170SKalle Valo 
1192ef548626SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_BOOT, "writing patch to 0x%x (%zd B)\n",
11936bc36431SKalle Valo 		   address, ar->fw_patch_len);
11946bc36431SKalle Valo 
1195bdcd8170SKalle Valo 	ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len);
1196bdcd8170SKalle Valo 	if (ret) {
1197bdcd8170SKalle Valo 		ath6kl_err("Failed to write patch file: %d\n", ret);
1198bdcd8170SKalle Valo 		return ret;
1199bdcd8170SKalle Valo 	}
1200bdcd8170SKalle Valo 
1201bdcd8170SKalle Valo 	param = address;
1202bdcd8170SKalle Valo 	ath6kl_bmi_write(ar,
1203bdcd8170SKalle Valo 			 ath6kl_get_hi_item_addr(ar,
1204bdcd8170SKalle Valo 			 HI_ITEM(hi_dset_list_head)),
1205bdcd8170SKalle Valo 			 (unsigned char *) &param, 4);
1206bdcd8170SKalle Valo 
1207bdcd8170SKalle Valo 	return 0;
1208bdcd8170SKalle Valo }
1209bdcd8170SKalle Valo 
1210bdcd8170SKalle Valo static int ath6kl_init_upload(struct ath6kl *ar)
1211bdcd8170SKalle Valo {
1212bdcd8170SKalle Valo 	u32 param, options, sleep, address;
1213bdcd8170SKalle Valo 	int status = 0;
1214bdcd8170SKalle Valo 
121531024d99SKevin Fang 	if (ar->target_type != TARGET_TYPE_AR6003 &&
121631024d99SKevin Fang 		ar->target_type != TARGET_TYPE_AR6004)
1217bdcd8170SKalle Valo 		return -EINVAL;
1218bdcd8170SKalle Valo 
1219bdcd8170SKalle Valo 	/* temporarily disable system sleep */
1220bdcd8170SKalle Valo 	address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
1221bdcd8170SKalle Valo 	status = ath6kl_bmi_reg_read(ar, address, &param);
1222bdcd8170SKalle Valo 	if (status)
1223bdcd8170SKalle Valo 		return status;
1224bdcd8170SKalle Valo 
1225bdcd8170SKalle Valo 	options = param;
1226bdcd8170SKalle Valo 
1227bdcd8170SKalle Valo 	param |= ATH6KL_OPTION_SLEEP_DISABLE;
1228bdcd8170SKalle Valo 	status = ath6kl_bmi_reg_write(ar, address, param);
1229bdcd8170SKalle Valo 	if (status)
1230bdcd8170SKalle Valo 		return status;
1231bdcd8170SKalle Valo 
1232bdcd8170SKalle Valo 	address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
1233bdcd8170SKalle Valo 	status = ath6kl_bmi_reg_read(ar, address, &param);
1234bdcd8170SKalle Valo 	if (status)
1235bdcd8170SKalle Valo 		return status;
1236bdcd8170SKalle Valo 
1237bdcd8170SKalle Valo 	sleep = param;
1238bdcd8170SKalle Valo 
1239bdcd8170SKalle Valo 	param |= SM(SYSTEM_SLEEP_DISABLE, 1);
1240bdcd8170SKalle Valo 	status = ath6kl_bmi_reg_write(ar, address, param);
1241bdcd8170SKalle Valo 	if (status)
1242bdcd8170SKalle Valo 		return status;
1243bdcd8170SKalle Valo 
1244bdcd8170SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n",
1245bdcd8170SKalle Valo 		   options, sleep);
1246bdcd8170SKalle Valo 
1247bdcd8170SKalle Valo 	/* program analog PLL register */
124831024d99SKevin Fang 	/* no need to control 40/44MHz clock on AR6004 */
124931024d99SKevin Fang 	if (ar->target_type != TARGET_TYPE_AR6004) {
1250bdcd8170SKalle Valo 		status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER,
1251bdcd8170SKalle Valo 					      0xF9104001);
125231024d99SKevin Fang 
1253bdcd8170SKalle Valo 		if (status)
1254bdcd8170SKalle Valo 			return status;
1255bdcd8170SKalle Valo 
1256bdcd8170SKalle Valo 		/* Run at 80/88MHz by default */
1257bdcd8170SKalle Valo 		param = SM(CPU_CLOCK_STANDARD, 1);
1258bdcd8170SKalle Valo 
1259bdcd8170SKalle Valo 		address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS;
1260bdcd8170SKalle Valo 		status = ath6kl_bmi_reg_write(ar, address, param);
1261bdcd8170SKalle Valo 		if (status)
1262bdcd8170SKalle Valo 			return status;
126331024d99SKevin Fang 	}
1264bdcd8170SKalle Valo 
1265bdcd8170SKalle Valo 	param = 0;
1266bdcd8170SKalle Valo 	address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS;
1267bdcd8170SKalle Valo 	param = SM(LPO_CAL_ENABLE, 1);
1268bdcd8170SKalle Valo 	status = ath6kl_bmi_reg_write(ar, address, param);
1269bdcd8170SKalle Valo 	if (status)
1270bdcd8170SKalle Valo 		return status;
1271bdcd8170SKalle Valo 
1272bdcd8170SKalle Valo 	/* WAR to avoid SDIO CRC err */
1273bdcd8170SKalle Valo 	if (ar->version.target_ver == AR6003_REV2_VERSION) {
1274bdcd8170SKalle Valo 		ath6kl_err("temporary war to avoid sdio crc error\n");
1275bdcd8170SKalle Valo 
1276bdcd8170SKalle Valo 		param = 0x20;
1277bdcd8170SKalle Valo 
1278bdcd8170SKalle Valo 		address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS;
1279bdcd8170SKalle Valo 		status = ath6kl_bmi_reg_write(ar, address, param);
1280bdcd8170SKalle Valo 		if (status)
1281bdcd8170SKalle Valo 			return status;
1282bdcd8170SKalle Valo 
1283bdcd8170SKalle Valo 		address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS;
1284bdcd8170SKalle Valo 		status = ath6kl_bmi_reg_write(ar, address, param);
1285bdcd8170SKalle Valo 		if (status)
1286bdcd8170SKalle Valo 			return status;
1287bdcd8170SKalle Valo 
1288bdcd8170SKalle Valo 		address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS;
1289bdcd8170SKalle Valo 		status = ath6kl_bmi_reg_write(ar, address, param);
1290bdcd8170SKalle Valo 		if (status)
1291bdcd8170SKalle Valo 			return status;
1292bdcd8170SKalle Valo 
1293bdcd8170SKalle Valo 		address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS;
1294bdcd8170SKalle Valo 		status = ath6kl_bmi_reg_write(ar, address, param);
1295bdcd8170SKalle Valo 		if (status)
1296bdcd8170SKalle Valo 			return status;
1297bdcd8170SKalle Valo 	}
1298bdcd8170SKalle Valo 
1299bdcd8170SKalle Valo 	/* write EEPROM data to Target RAM */
1300bdcd8170SKalle Valo 	status = ath6kl_upload_board_file(ar);
1301bdcd8170SKalle Valo 	if (status)
1302bdcd8170SKalle Valo 		return status;
1303bdcd8170SKalle Valo 
1304bdcd8170SKalle Valo 	/* transfer One time Programmable data */
1305bdcd8170SKalle Valo 	status = ath6kl_upload_otp(ar);
1306bdcd8170SKalle Valo 	if (status)
1307bdcd8170SKalle Valo 		return status;
1308bdcd8170SKalle Valo 
1309bdcd8170SKalle Valo 	/* Download Target firmware */
1310bdcd8170SKalle Valo 	status = ath6kl_upload_firmware(ar);
1311bdcd8170SKalle Valo 	if (status)
1312bdcd8170SKalle Valo 		return status;
1313bdcd8170SKalle Valo 
1314bdcd8170SKalle Valo 	status = ath6kl_upload_patch(ar);
1315bdcd8170SKalle Valo 	if (status)
1316bdcd8170SKalle Valo 		return status;
1317bdcd8170SKalle Valo 
1318bdcd8170SKalle Valo 	/* Restore system sleep */
1319bdcd8170SKalle Valo 	address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
1320bdcd8170SKalle Valo 	status = ath6kl_bmi_reg_write(ar, address, sleep);
1321bdcd8170SKalle Valo 	if (status)
1322bdcd8170SKalle Valo 		return status;
1323bdcd8170SKalle Valo 
1324bdcd8170SKalle Valo 	address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
1325bdcd8170SKalle Valo 	param = options | 0x20;
1326bdcd8170SKalle Valo 	status = ath6kl_bmi_reg_write(ar, address, param);
1327bdcd8170SKalle Valo 	if (status)
1328bdcd8170SKalle Valo 		return status;
1329bdcd8170SKalle Valo 
1330bdcd8170SKalle Valo 	/* Configure GPIO AR6003 UART */
1331bdcd8170SKalle Valo 	param = CONFIG_AR600x_DEBUG_UART_TX_PIN;
1332bdcd8170SKalle Valo 	status = ath6kl_bmi_write(ar,
1333bdcd8170SKalle Valo 				  ath6kl_get_hi_item_addr(ar,
1334bdcd8170SKalle Valo 				  HI_ITEM(hi_dbg_uart_txpin)),
1335bdcd8170SKalle Valo 				  (u8 *)&param, 4);
1336bdcd8170SKalle Valo 
1337bdcd8170SKalle Valo 	return status;
1338bdcd8170SKalle Valo }
1339bdcd8170SKalle Valo 
1340a01ac414SKalle Valo static int ath6kl_init_hw_params(struct ath6kl *ar)
1341a01ac414SKalle Valo {
1342a01ac414SKalle Valo 	switch (ar->version.target_ver) {
1343a01ac414SKalle Valo 	case AR6003_REV2_VERSION:
1344a01ac414SKalle Valo 		ar->hw.dataset_patch_addr = AR6003_REV2_DATASET_PATCH_ADDRESS;
1345a01ac414SKalle Valo 		ar->hw.app_load_addr = AR6003_REV2_APP_LOAD_ADDRESS;
1346991b27eaSKalle Valo 		ar->hw.board_ext_data_addr = AR6003_REV2_BOARD_EXT_DATA_ADDRESS;
1347991b27eaSKalle Valo 		ar->hw.reserved_ram_size = AR6003_REV2_RAM_RESERVE_SIZE;
1348bef26a7fSKalle Valo 
1349bef26a7fSKalle Valo 		/* hw2.0 needs override address hardcoded */
1350bef26a7fSKalle Valo 		ar->hw.app_start_override_addr = 0x944C00;
1351bef26a7fSKalle Valo 
1352a01ac414SKalle Valo 		break;
1353a01ac414SKalle Valo 	case AR6003_REV3_VERSION:
1354a01ac414SKalle Valo 		ar->hw.dataset_patch_addr = AR6003_REV3_DATASET_PATCH_ADDRESS;
1355a01ac414SKalle Valo 		ar->hw.app_load_addr = 0x1234;
1356991b27eaSKalle Valo 		ar->hw.board_ext_data_addr = AR6003_REV3_BOARD_EXT_DATA_ADDRESS;
1357991b27eaSKalle Valo 		ar->hw.reserved_ram_size = AR6003_REV3_RAM_RESERVE_SIZE;
1358a01ac414SKalle Valo 		break;
1359a01ac414SKalle Valo 	case AR6004_REV1_VERSION:
1360a01ac414SKalle Valo 		ar->hw.dataset_patch_addr = AR6003_REV2_DATASET_PATCH_ADDRESS;
1361a01ac414SKalle Valo 		ar->hw.app_load_addr = AR6003_REV3_APP_LOAD_ADDRESS;
1362991b27eaSKalle Valo 		ar->hw.board_ext_data_addr = AR6004_REV1_BOARD_EXT_DATA_ADDRESS;
1363991b27eaSKalle Valo 		ar->hw.reserved_ram_size = AR6004_REV1_RAM_RESERVE_SIZE;
1364a01ac414SKalle Valo 		break;
1365a01ac414SKalle Valo 	default:
1366a01ac414SKalle Valo 		ath6kl_err("Unsupported hardware version: 0x%x\n",
1367a01ac414SKalle Valo 			   ar->version.target_ver);
1368a01ac414SKalle Valo 		return -EINVAL;
1369a01ac414SKalle Valo 	}
1370a01ac414SKalle Valo 
13716bc36431SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_BOOT,
13726bc36431SKalle Valo 		   "target_ver 0x%x target_type 0x%x dataset_patch 0x%x app_load_addr 0x%x\n",
13736bc36431SKalle Valo 		   ar->version.target_ver, ar->target_type,
13746bc36431SKalle Valo 		   ar->hw.dataset_patch_addr, ar->hw.app_load_addr);
13756bc36431SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_BOOT,
13766bc36431SKalle Valo 		   "app_start_override_addr 0x%x board_ext_data_addr 0x%x reserved_ram_size 0x%x",
13776bc36431SKalle Valo 		   ar->hw.app_start_override_addr, ar->hw.board_ext_data_addr,
13786bc36431SKalle Valo 		   ar->hw.reserved_ram_size);
13796bc36431SKalle Valo 
1380a01ac414SKalle Valo 	return 0;
1381a01ac414SKalle Valo }
1382a01ac414SKalle Valo 
1383521dffccSVasanthakumar Thiagarajan static int ath6kl_init(struct ath6kl *ar)
1384bdcd8170SKalle Valo {
1385bdcd8170SKalle Valo 	int status = 0;
1386bdcd8170SKalle Valo 	s32 timeleft;
13878dafb70eSVasanthakumar Thiagarajan 	struct net_device *ndev;
1388bdcd8170SKalle Valo 
1389bdcd8170SKalle Valo 	if (!ar)
1390bdcd8170SKalle Valo 		return -EIO;
1391bdcd8170SKalle Valo 
1392bdcd8170SKalle Valo 	/* Do we need to finish the BMI phase */
1393bdcd8170SKalle Valo 	if (ath6kl_bmi_done(ar)) {
1394bdcd8170SKalle Valo 		status = -EIO;
1395bdcd8170SKalle Valo 		goto ath6kl_init_done;
1396bdcd8170SKalle Valo 	}
1397bdcd8170SKalle Valo 
1398bdcd8170SKalle Valo 	/* Indicate that WMI is enabled (although not ready yet) */
1399bdcd8170SKalle Valo 	set_bit(WMI_ENABLED, &ar->flag);
14002865785eSVasanthakumar Thiagarajan 	ar->wmi = ath6kl_wmi_init(ar);
1401bdcd8170SKalle Valo 	if (!ar->wmi) {
1402bdcd8170SKalle Valo 		ath6kl_err("failed to initialize wmi\n");
1403bdcd8170SKalle Valo 		status = -EIO;
1404bdcd8170SKalle Valo 		goto ath6kl_init_done;
1405bdcd8170SKalle Valo 	}
1406bdcd8170SKalle Valo 
1407bdcd8170SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_TRC, "%s: got wmi @ 0x%p.\n", __func__, ar->wmi);
1408bdcd8170SKalle Valo 
14098dafb70eSVasanthakumar Thiagarajan 	status = ath6kl_register_ieee80211_hw(ar);
14108dafb70eSVasanthakumar Thiagarajan 	if (status)
14118dafb70eSVasanthakumar Thiagarajan 		goto err_node_cleanup;
14128dafb70eSVasanthakumar Thiagarajan 
14138dafb70eSVasanthakumar Thiagarajan 	status = ath6kl_debug_init(ar);
14148dafb70eSVasanthakumar Thiagarajan 	if (status) {
14158dafb70eSVasanthakumar Thiagarajan 		wiphy_unregister(ar->wiphy);
14168dafb70eSVasanthakumar Thiagarajan 		goto err_node_cleanup;
14178dafb70eSVasanthakumar Thiagarajan 	}
14188dafb70eSVasanthakumar Thiagarajan 
14198dafb70eSVasanthakumar Thiagarajan 	/* Add an initial station interface */
1420334234b5SVasanthakumar Thiagarajan 	ndev = ath6kl_interface_add(ar, "wlan%d", NL80211_IFTYPE_STATION, 0);
14218dafb70eSVasanthakumar Thiagarajan 	if (!ndev) {
14228dafb70eSVasanthakumar Thiagarajan 		ath6kl_err("Failed to instantiate a network device\n");
14238dafb70eSVasanthakumar Thiagarajan 		status = -ENOMEM;
14248dafb70eSVasanthakumar Thiagarajan 		wiphy_unregister(ar->wiphy);
14258dafb70eSVasanthakumar Thiagarajan 		goto err_debug_init;
14268dafb70eSVasanthakumar Thiagarajan 	}
14278dafb70eSVasanthakumar Thiagarajan 
14288dafb70eSVasanthakumar Thiagarajan 
14298dafb70eSVasanthakumar Thiagarajan 	ath6kl_dbg(ATH6KL_DBG_TRC, "%s: name=%s dev=0x%p, ar=0x%p\n",
143028ae58ddSVasanthakumar Thiagarajan 			__func__, ndev->name, ndev, ar);
14318dafb70eSVasanthakumar Thiagarajan 
1432bdcd8170SKalle Valo 	/*
1433bdcd8170SKalle Valo 	 * The reason we have to wait for the target here is that the
1434bdcd8170SKalle Valo 	 * driver layer has to init BMI in order to set the host block
1435bdcd8170SKalle Valo 	 * size.
1436bdcd8170SKalle Valo 	 */
1437ad226ec2SKalle Valo 	if (ath6kl_htc_wait_target(ar->htc_target)) {
1438bdcd8170SKalle Valo 		status = -EIO;
14398dafb70eSVasanthakumar Thiagarajan 		goto err_if_deinit;
1440bdcd8170SKalle Valo 	}
1441bdcd8170SKalle Valo 
1442bdcd8170SKalle Valo 	if (ath6kl_init_service_ep(ar)) {
1443bdcd8170SKalle Valo 		status = -EIO;
1444bdcd8170SKalle Valo 		goto err_cleanup_scatter;
1445bdcd8170SKalle Valo 	}
1446bdcd8170SKalle Valo 
1447bdcd8170SKalle Valo 	/* setup access class priority mappings */
1448bdcd8170SKalle Valo 	ar->ac_stream_pri_map[WMM_AC_BK] = 0; /* lowest  */
1449bdcd8170SKalle Valo 	ar->ac_stream_pri_map[WMM_AC_BE] = 1;
1450bdcd8170SKalle Valo 	ar->ac_stream_pri_map[WMM_AC_VI] = 2;
1451bdcd8170SKalle Valo 	ar->ac_stream_pri_map[WMM_AC_VO] = 3; /* highest */
1452bdcd8170SKalle Valo 
1453bdcd8170SKalle Valo 	/* give our connected endpoints some buffers */
1454bdcd8170SKalle Valo 	ath6kl_rx_refill(ar->htc_target, ar->ctrl_ep);
1455bdcd8170SKalle Valo 	ath6kl_rx_refill(ar->htc_target, ar->ac2ep_map[WMM_AC_BE]);
1456bdcd8170SKalle Valo 
1457bdcd8170SKalle Valo 	/* allocate some buffers that handle larger AMSDU frames */
1458bdcd8170SKalle Valo 	ath6kl_refill_amsdu_rxbufs(ar, ATH6KL_MAX_AMSDU_RX_BUFFERS);
1459bdcd8170SKalle Valo 
1460bdcd8170SKalle Valo 	/* setup credit distribution */
1461bdcd8170SKalle Valo 	ath6k_setup_credit_dist(ar->htc_target, &ar->credit_state_info);
1462bdcd8170SKalle Valo 
1463bdcd8170SKalle Valo 	ath6kl_cookie_init(ar);
1464bdcd8170SKalle Valo 
1465bdcd8170SKalle Valo 	/* start HTC */
1466ad226ec2SKalle Valo 	status = ath6kl_htc_start(ar->htc_target);
1467bdcd8170SKalle Valo 
1468bdcd8170SKalle Valo 	if (status) {
1469bdcd8170SKalle Valo 		ath6kl_cookie_cleanup(ar);
1470bdcd8170SKalle Valo 		goto err_rxbuf_cleanup;
1471bdcd8170SKalle Valo 	}
1472bdcd8170SKalle Valo 
1473bdcd8170SKalle Valo 	/* Wait for Wmi event to be ready */
1474bdcd8170SKalle Valo 	timeleft = wait_event_interruptible_timeout(ar->event_wq,
1475bdcd8170SKalle Valo 						    test_bit(WMI_READY,
1476bdcd8170SKalle Valo 							     &ar->flag),
1477bdcd8170SKalle Valo 						    WMI_TIMEOUT);
1478bdcd8170SKalle Valo 
14796bc36431SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_BOOT, "firmware booted\n");
14806bc36431SKalle Valo 
1481bdcd8170SKalle Valo 	if (ar->version.abi_ver != ATH6KL_ABI_VERSION) {
1482bdcd8170SKalle Valo 		ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n",
1483bdcd8170SKalle Valo 			   ATH6KL_ABI_VERSION, ar->version.abi_ver);
1484bdcd8170SKalle Valo 		status = -EIO;
1485bdcd8170SKalle Valo 		goto err_htc_stop;
1486bdcd8170SKalle Valo 	}
1487bdcd8170SKalle Valo 
1488bdcd8170SKalle Valo 	if (!timeleft || signal_pending(current)) {
1489bdcd8170SKalle Valo 		ath6kl_err("wmi is not ready or wait was interrupted\n");
1490bdcd8170SKalle Valo 		status = -EIO;
1491bdcd8170SKalle Valo 		goto err_htc_stop;
1492bdcd8170SKalle Valo 	}
1493bdcd8170SKalle Valo 
1494bdcd8170SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__);
1495bdcd8170SKalle Valo 
1496bdcd8170SKalle Valo 	/* communicate the wmi protocol verision to the target */
1497bdcd8170SKalle Valo 	if ((ath6kl_set_host_app_area(ar)) != 0)
1498bdcd8170SKalle Valo 		ath6kl_err("unable to set the host app area\n");
1499bdcd8170SKalle Valo 
1500bdcd8170SKalle Valo 	ar->conf_flags = ATH6KL_CONF_IGNORE_ERP_BARKER |
1501bdcd8170SKalle Valo 			 ATH6KL_CONF_ENABLE_11N | ATH6KL_CONF_ENABLE_TX_BURST;
1502bdcd8170SKalle Valo 
1503be98e3a4SVasanthakumar Thiagarajan 	ar->wiphy->flags |= WIPHY_FLAG_SUPPORTS_FW_ROAM |
1504562a7480SJohannes Berg 			    WIPHY_FLAG_HAVE_AP_SME;
1505011a36e1SVivek Natarajan 
1506bdcd8170SKalle Valo 	status = ath6kl_target_config_wlan_params(ar);
1507d66ea4f9SVasanthakumar Thiagarajan 	if (status)
1508d66ea4f9SVasanthakumar Thiagarajan 		goto err_htc_stop;
1509d66ea4f9SVasanthakumar Thiagarajan 
1510d66ea4f9SVasanthakumar Thiagarajan 	/*
1511d66ea4f9SVasanthakumar Thiagarajan 	 * Set mac address which is received in ready event
1512d66ea4f9SVasanthakumar Thiagarajan 	 * FIXME: Move to ath6kl_interface_add()
1513d66ea4f9SVasanthakumar Thiagarajan 	 */
1514d66ea4f9SVasanthakumar Thiagarajan 	memcpy(ndev->dev_addr, ar->mac_addr, ETH_ALEN);
1515d66ea4f9SVasanthakumar Thiagarajan 
1516d66ea4f9SVasanthakumar Thiagarajan 	return status;
1517bdcd8170SKalle Valo 
1518bdcd8170SKalle Valo err_htc_stop:
1519ad226ec2SKalle Valo 	ath6kl_htc_stop(ar->htc_target);
1520bdcd8170SKalle Valo err_rxbuf_cleanup:
1521ad226ec2SKalle Valo 	ath6kl_htc_flush_rx_buf(ar->htc_target);
1522bdcd8170SKalle Valo 	ath6kl_cleanup_amsdu_rxbufs(ar);
1523bdcd8170SKalle Valo err_cleanup_scatter:
1524bdcd8170SKalle Valo 	ath6kl_hif_cleanup_scatter(ar);
15258dafb70eSVasanthakumar Thiagarajan err_if_deinit:
1526108438bcSVasanthakumar Thiagarajan 	ath6kl_deinit_if_data(netdev_priv(ndev));
15278dafb70eSVasanthakumar Thiagarajan 	wiphy_unregister(ar->wiphy);
15288dafb70eSVasanthakumar Thiagarajan err_debug_init:
15298dafb70eSVasanthakumar Thiagarajan 	ath6kl_debug_cleanup(ar);
1530852bd9d9SVasanthakumar Thiagarajan err_node_cleanup:
1531bdcd8170SKalle Valo 	ath6kl_wmi_shutdown(ar->wmi);
1532bdcd8170SKalle Valo 	clear_bit(WMI_ENABLED, &ar->flag);
1533bdcd8170SKalle Valo 	ar->wmi = NULL;
1534bdcd8170SKalle Valo 
1535bdcd8170SKalle Valo ath6kl_init_done:
1536bdcd8170SKalle Valo 	return status;
1537bdcd8170SKalle Valo }
1538bdcd8170SKalle Valo 
1539bdcd8170SKalle Valo int ath6kl_core_init(struct ath6kl *ar)
1540bdcd8170SKalle Valo {
1541bdcd8170SKalle Valo 	int ret = 0;
1542bdcd8170SKalle Valo 	struct ath6kl_bmi_target_info targ_info;
1543bdcd8170SKalle Valo 
1544bdcd8170SKalle Valo 	ar->ath6kl_wq = create_singlethread_workqueue("ath6kl");
1545bdcd8170SKalle Valo 	if (!ar->ath6kl_wq)
1546bdcd8170SKalle Valo 		return -ENOMEM;
1547bdcd8170SKalle Valo 
1548bdcd8170SKalle Valo 	ret = ath6kl_bmi_init(ar);
1549bdcd8170SKalle Valo 	if (ret)
1550bdcd8170SKalle Valo 		goto err_wq;
1551bdcd8170SKalle Valo 
1552bdcd8170SKalle Valo 	ret = ath6kl_bmi_get_target_info(ar, &targ_info);
1553bdcd8170SKalle Valo 	if (ret)
1554bdcd8170SKalle Valo 		goto err_bmi_cleanup;
1555bdcd8170SKalle Valo 
1556bdcd8170SKalle Valo 	ar->version.target_ver = le32_to_cpu(targ_info.version);
1557bdcd8170SKalle Valo 	ar->target_type = le32_to_cpu(targ_info.type);
1558be98e3a4SVasanthakumar Thiagarajan 	ar->wiphy->hw_version = le32_to_cpu(targ_info.version);
1559bdcd8170SKalle Valo 
1560a01ac414SKalle Valo 	ret = ath6kl_init_hw_params(ar);
1561a01ac414SKalle Valo 	if (ret)
1562a01ac414SKalle Valo 		goto err_bmi_cleanup;
1563a01ac414SKalle Valo 
1564bdcd8170SKalle Valo 	ret = ath6kl_configure_target(ar);
1565bdcd8170SKalle Valo 	if (ret)
1566bdcd8170SKalle Valo 		goto err_bmi_cleanup;
1567bdcd8170SKalle Valo 
1568ad226ec2SKalle Valo 	ar->htc_target = ath6kl_htc_create(ar);
1569bdcd8170SKalle Valo 
1570bdcd8170SKalle Valo 	if (!ar->htc_target) {
1571bdcd8170SKalle Valo 		ret = -ENOMEM;
1572bdcd8170SKalle Valo 		goto err_bmi_cleanup;
1573bdcd8170SKalle Valo 	}
1574bdcd8170SKalle Valo 
1575772c31eeSKalle Valo 	ret = ath6kl_fetch_firmwares(ar);
1576772c31eeSKalle Valo 	if (ret)
1577772c31eeSKalle Valo 		goto err_htc_cleanup;
1578772c31eeSKalle Valo 
1579bdcd8170SKalle Valo 	ret = ath6kl_init_upload(ar);
1580bdcd8170SKalle Valo 	if (ret)
1581bdcd8170SKalle Valo 		goto err_htc_cleanup;
1582bdcd8170SKalle Valo 
1583521dffccSVasanthakumar Thiagarajan 	ret = ath6kl_init(ar);
1584bdcd8170SKalle Valo 	if (ret)
1585bdcd8170SKalle Valo 		goto err_htc_cleanup;
1586bdcd8170SKalle Valo 
1587bdcd8170SKalle Valo 	return ret;
1588bdcd8170SKalle Valo 
1589bdcd8170SKalle Valo err_htc_cleanup:
1590ad226ec2SKalle Valo 	ath6kl_htc_cleanup(ar->htc_target);
1591bdcd8170SKalle Valo err_bmi_cleanup:
1592bdcd8170SKalle Valo 	ath6kl_bmi_cleanup(ar);
1593bdcd8170SKalle Valo err_wq:
1594bdcd8170SKalle Valo 	destroy_workqueue(ar->ath6kl_wq);
15958dafb70eSVasanthakumar Thiagarajan 
1596bdcd8170SKalle Valo 	return ret;
1597bdcd8170SKalle Valo }
1598bdcd8170SKalle Valo 
15996db8fa53SVasanthakumar Thiagarajan static void ath6kl_cleanup_vif(struct ath6kl_vif *vif, bool wmi_ready)
16006db8fa53SVasanthakumar Thiagarajan {
16016db8fa53SVasanthakumar Thiagarajan 	static u8 bcast_mac[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
16026db8fa53SVasanthakumar Thiagarajan 	bool discon_issued;
16036db8fa53SVasanthakumar Thiagarajan 
16046db8fa53SVasanthakumar Thiagarajan 	netif_stop_queue(vif->ndev);
16056db8fa53SVasanthakumar Thiagarajan 
16066db8fa53SVasanthakumar Thiagarajan 	clear_bit(WLAN_ENABLED, &vif->flags);
16076db8fa53SVasanthakumar Thiagarajan 
16086db8fa53SVasanthakumar Thiagarajan 	if (wmi_ready) {
16096db8fa53SVasanthakumar Thiagarajan 		discon_issued = test_bit(CONNECTED, &vif->flags) ||
16106db8fa53SVasanthakumar Thiagarajan 				test_bit(CONNECT_PEND, &vif->flags);
16116db8fa53SVasanthakumar Thiagarajan 		ath6kl_disconnect(vif);
16126db8fa53SVasanthakumar Thiagarajan 		del_timer(&vif->disconnect_timer);
16136db8fa53SVasanthakumar Thiagarajan 
16146db8fa53SVasanthakumar Thiagarajan 		if (discon_issued)
16156db8fa53SVasanthakumar Thiagarajan 			ath6kl_disconnect_event(vif, DISCONNECT_CMD,
16166db8fa53SVasanthakumar Thiagarajan 						(vif->nw_type & AP_NETWORK) ?
16176db8fa53SVasanthakumar Thiagarajan 						bcast_mac : vif->bssid,
16186db8fa53SVasanthakumar Thiagarajan 						0, NULL, 0);
16196db8fa53SVasanthakumar Thiagarajan 	}
16206db8fa53SVasanthakumar Thiagarajan 
16216db8fa53SVasanthakumar Thiagarajan 	if (vif->scan_req) {
16226db8fa53SVasanthakumar Thiagarajan 		cfg80211_scan_done(vif->scan_req, true);
16236db8fa53SVasanthakumar Thiagarajan 		vif->scan_req = NULL;
16246db8fa53SVasanthakumar Thiagarajan 	}
16256db8fa53SVasanthakumar Thiagarajan 
16266db8fa53SVasanthakumar Thiagarajan 	ath6kl_deinit_if_data(vif);
16276db8fa53SVasanthakumar Thiagarajan }
16286db8fa53SVasanthakumar Thiagarajan 
1629bdcd8170SKalle Valo void ath6kl_stop_txrx(struct ath6kl *ar)
1630bdcd8170SKalle Valo {
1631*990bd915SVasanthakumar Thiagarajan 	struct ath6kl_vif *vif, *tmp_vif;
1632bdcd8170SKalle Valo 
1633bdcd8170SKalle Valo 	set_bit(DESTROY_IN_PROGRESS, &ar->flag);
1634bdcd8170SKalle Valo 
1635bdcd8170SKalle Valo 	if (down_interruptible(&ar->sem)) {
1636bdcd8170SKalle Valo 		ath6kl_err("down_interruptible failed\n");
1637bdcd8170SKalle Valo 		return;
1638bdcd8170SKalle Valo 	}
1639bdcd8170SKalle Valo 
1640*990bd915SVasanthakumar Thiagarajan 	spin_lock(&ar->list_lock);
1641*990bd915SVasanthakumar Thiagarajan 	list_for_each_entry_safe(vif, tmp_vif, &ar->vif_list, list) {
1642*990bd915SVasanthakumar Thiagarajan 		list_del(&vif->list);
1643*990bd915SVasanthakumar Thiagarajan 		spin_unlock(&ar->list_lock);
1644*990bd915SVasanthakumar Thiagarajan 		ath6kl_cleanup_vif(vif, test_bit(WMI_READY, &ar->flag));
1645*990bd915SVasanthakumar Thiagarajan 		spin_lock(&ar->list_lock);
1646*990bd915SVasanthakumar Thiagarajan 	}
1647*990bd915SVasanthakumar Thiagarajan 	spin_unlock(&ar->list_lock);
1648bdcd8170SKalle Valo 
16496db8fa53SVasanthakumar Thiagarajan 	clear_bit(WMI_READY, &ar->flag);
16506db8fa53SVasanthakumar Thiagarajan 
16516db8fa53SVasanthakumar Thiagarajan 	/*
16526db8fa53SVasanthakumar Thiagarajan 	 * After wmi_shudown all WMI events will be dropped. We
16536db8fa53SVasanthakumar Thiagarajan 	 * need to cleanup the buffers allocated in AP mode and
16546db8fa53SVasanthakumar Thiagarajan 	 * give disconnect notification to stack, which usually
16556db8fa53SVasanthakumar Thiagarajan 	 * happens in the disconnect_event. Simulate the disconnect
16566db8fa53SVasanthakumar Thiagarajan 	 * event by calling the function directly. Sometimes
16576db8fa53SVasanthakumar Thiagarajan 	 * disconnect_event will be received when the debug logs
16586db8fa53SVasanthakumar Thiagarajan 	 * are collected.
16596db8fa53SVasanthakumar Thiagarajan 	 */
16606db8fa53SVasanthakumar Thiagarajan 	ath6kl_wmi_shutdown(ar->wmi);
16616db8fa53SVasanthakumar Thiagarajan 
16626db8fa53SVasanthakumar Thiagarajan 	clear_bit(WMI_ENABLED, &ar->flag);
16636db8fa53SVasanthakumar Thiagarajan 	if (ar->htc_target) {
16646db8fa53SVasanthakumar Thiagarajan 		ath6kl_dbg(ATH6KL_DBG_TRC, "%s: shut down htc\n", __func__);
16656db8fa53SVasanthakumar Thiagarajan 		ath6kl_htc_stop(ar->htc_target);
1666bdcd8170SKalle Valo 	}
1667bdcd8170SKalle Valo 
1668bdcd8170SKalle Valo 	/*
16696db8fa53SVasanthakumar Thiagarajan 	 * Try to reset the device if we can. The driver may have been
16706db8fa53SVasanthakumar Thiagarajan 	 * configure NOT to reset the target during a debug session.
1671bdcd8170SKalle Valo 	 */
16726db8fa53SVasanthakumar Thiagarajan 	ath6kl_dbg(ATH6KL_DBG_TRC,
16736db8fa53SVasanthakumar Thiagarajan 			"attempting to reset target on instance destroy\n");
16746db8fa53SVasanthakumar Thiagarajan 	ath6kl_reset_device(ar, ar->target_type, true, true);
1675bdcd8170SKalle Valo 
16766db8fa53SVasanthakumar Thiagarajan 	clear_bit(WLAN_ENABLED, &ar->flag);
1677bdcd8170SKalle Valo }
1678