xref: /linux/drivers/net/wireless/ath/ath6kl/init.c (revision 76a9fbe27ec04420844ddf49b9e7a2f872222983)
1bdcd8170SKalle Valo 
2bdcd8170SKalle Valo /*
3bdcd8170SKalle Valo  * Copyright (c) 2011 Atheros Communications Inc.
4bdcd8170SKalle Valo  *
5bdcd8170SKalle Valo  * Permission to use, copy, modify, and/or distribute this software for any
6bdcd8170SKalle Valo  * purpose with or without fee is hereby granted, provided that the above
7bdcd8170SKalle Valo  * copyright notice and this permission notice appear in all copies.
8bdcd8170SKalle Valo  *
9bdcd8170SKalle Valo  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10bdcd8170SKalle Valo  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11bdcd8170SKalle Valo  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12bdcd8170SKalle Valo  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13bdcd8170SKalle Valo  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14bdcd8170SKalle Valo  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15bdcd8170SKalle Valo  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16bdcd8170SKalle Valo  */
17bdcd8170SKalle Valo 
18c6efe578SStephen Rothwell #include <linux/moduleparam.h>
19f7830202SSangwook Lee #include <linux/errno.h>
2092ecbff4SSam Leffler #include <linux/of.h>
21bdcd8170SKalle Valo #include <linux/mmc/sdio_func.h>
22bdcd8170SKalle Valo #include "core.h"
23bdcd8170SKalle Valo #include "cfg80211.h"
24bdcd8170SKalle Valo #include "target.h"
25bdcd8170SKalle Valo #include "debug.h"
26bdcd8170SKalle Valo #include "hif-ops.h"
27bdcd8170SKalle Valo 
28bdcd8170SKalle Valo unsigned int debug_mask;
29003353b0SKalle Valo static unsigned int testmode;
30bdcd8170SKalle Valo 
31bdcd8170SKalle Valo module_param(debug_mask, uint, 0644);
32003353b0SKalle Valo module_param(testmode, uint, 0644);
33bdcd8170SKalle Valo 
34bdcd8170SKalle Valo /*
35bdcd8170SKalle Valo  * Include definitions here that can be used to tune the WLAN module
36bdcd8170SKalle Valo  * behavior. Different customers can tune the behavior as per their needs,
37bdcd8170SKalle Valo  * here.
38bdcd8170SKalle Valo  */
39bdcd8170SKalle Valo 
40bdcd8170SKalle Valo /*
41bdcd8170SKalle Valo  * This configuration item enable/disable keepalive support.
42bdcd8170SKalle Valo  * Keepalive support: In the absence of any data traffic to AP, null
43bdcd8170SKalle Valo  * frames will be sent to the AP at periodic interval, to keep the association
44bdcd8170SKalle Valo  * active. This configuration item defines the periodic interval.
45bdcd8170SKalle Valo  * Use value of zero to disable keepalive support
46bdcd8170SKalle Valo  * Default: 60 seconds
47bdcd8170SKalle Valo  */
48bdcd8170SKalle Valo #define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60
49bdcd8170SKalle Valo 
50bdcd8170SKalle Valo /*
51bdcd8170SKalle Valo  * This configuration item sets the value of disconnect timeout
52bdcd8170SKalle Valo  * Firmware delays sending the disconnec event to the host for this
53bdcd8170SKalle Valo  * timeout after is gets disconnected from the current AP.
54bdcd8170SKalle Valo  * If the firmware successly roams within the disconnect timeout
55bdcd8170SKalle Valo  * it sends a new connect event
56bdcd8170SKalle Valo  */
57bdcd8170SKalle Valo #define WLAN_CONFIG_DISCONNECT_TIMEOUT 10
58bdcd8170SKalle Valo 
59bdcd8170SKalle Valo #define CONFIG_AR600x_DEBUG_UART_TX_PIN 8
60bdcd8170SKalle Valo 
61bdcd8170SKalle Valo #define ATH6KL_DATA_OFFSET    64
62bdcd8170SKalle Valo struct sk_buff *ath6kl_buf_alloc(int size)
63bdcd8170SKalle Valo {
64bdcd8170SKalle Valo 	struct sk_buff *skb;
65bdcd8170SKalle Valo 	u16 reserved;
66bdcd8170SKalle Valo 
67bdcd8170SKalle Valo 	/* Add chacheline space at front and back of buffer */
68bdcd8170SKalle Valo 	reserved = (2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET +
691df94a85SVasanthakumar Thiagarajan 		   sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES;
70bdcd8170SKalle Valo 	skb = dev_alloc_skb(size + reserved);
71bdcd8170SKalle Valo 
72bdcd8170SKalle Valo 	if (skb)
73bdcd8170SKalle Valo 		skb_reserve(skb, reserved - L1_CACHE_BYTES);
74bdcd8170SKalle Valo 	return skb;
75bdcd8170SKalle Valo }
76bdcd8170SKalle Valo 
77e29f25f5SVasanthakumar Thiagarajan void ath6kl_init_profile_info(struct ath6kl_vif *vif)
78bdcd8170SKalle Valo {
793450334fSVasanthakumar Thiagarajan 	vif->ssid_len = 0;
803450334fSVasanthakumar Thiagarajan 	memset(vif->ssid, 0, sizeof(vif->ssid));
813450334fSVasanthakumar Thiagarajan 
823450334fSVasanthakumar Thiagarajan 	vif->dot11_auth_mode = OPEN_AUTH;
833450334fSVasanthakumar Thiagarajan 	vif->auth_mode = NONE_AUTH;
843450334fSVasanthakumar Thiagarajan 	vif->prwise_crypto = NONE_CRYPT;
853450334fSVasanthakumar Thiagarajan 	vif->prwise_crypto_len = 0;
863450334fSVasanthakumar Thiagarajan 	vif->grp_crypto = NONE_CRYPT;
873450334fSVasanthakumar Thiagarajan 	vif->grp_crypto_len = 0;
886f2a73f9SVasanthakumar Thiagarajan 	memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
898c8b65e3SVasanthakumar Thiagarajan 	memset(vif->req_bssid, 0, sizeof(vif->req_bssid));
908c8b65e3SVasanthakumar Thiagarajan 	memset(vif->bssid, 0, sizeof(vif->bssid));
91f74bac54SVasanthakumar Thiagarajan 	vif->bss_ch = 0;
92bdcd8170SKalle Valo }
93bdcd8170SKalle Valo 
94bdcd8170SKalle Valo static int ath6kl_set_host_app_area(struct ath6kl *ar)
95bdcd8170SKalle Valo {
96bdcd8170SKalle Valo 	u32 address, data;
97bdcd8170SKalle Valo 	struct host_app_area host_app_area;
98bdcd8170SKalle Valo 
99bdcd8170SKalle Valo 	/* Fetch the address of the host_app_area_s
100bdcd8170SKalle Valo 	 * instance in the host interest area */
101bdcd8170SKalle Valo 	address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest));
10231024d99SKevin Fang 	address = TARG_VTOP(ar->target_type, address);
103bdcd8170SKalle Valo 
104addb44beSKalle Valo 	if (ath6kl_diag_read32(ar, address, &data))
105bdcd8170SKalle Valo 		return -EIO;
106bdcd8170SKalle Valo 
10731024d99SKevin Fang 	address = TARG_VTOP(ar->target_type, data);
108cbf49a6fSKalle Valo 	host_app_area.wmi_protocol_ver = cpu_to_le32(WMI_PROTOCOL_VERSION);
109addb44beSKalle Valo 	if (ath6kl_diag_write(ar, address, (u8 *) &host_app_area,
110addb44beSKalle Valo 			      sizeof(struct host_app_area)))
111bdcd8170SKalle Valo 		return -EIO;
112bdcd8170SKalle Valo 
113bdcd8170SKalle Valo 	return 0;
114bdcd8170SKalle Valo }
115bdcd8170SKalle Valo 
116bdcd8170SKalle Valo static inline void set_ac2_ep_map(struct ath6kl *ar,
117bdcd8170SKalle Valo 				  u8 ac,
118bdcd8170SKalle Valo 				  enum htc_endpoint_id ep)
119bdcd8170SKalle Valo {
120bdcd8170SKalle Valo 	ar->ac2ep_map[ac] = ep;
121bdcd8170SKalle Valo 	ar->ep2ac_map[ep] = ac;
122bdcd8170SKalle Valo }
123bdcd8170SKalle Valo 
124bdcd8170SKalle Valo /* connect to a service */
125bdcd8170SKalle Valo static int ath6kl_connectservice(struct ath6kl *ar,
126bdcd8170SKalle Valo 				 struct htc_service_connect_req  *con_req,
127bdcd8170SKalle Valo 				 char *desc)
128bdcd8170SKalle Valo {
129bdcd8170SKalle Valo 	int status;
130bdcd8170SKalle Valo 	struct htc_service_connect_resp response;
131bdcd8170SKalle Valo 
132bdcd8170SKalle Valo 	memset(&response, 0, sizeof(response));
133bdcd8170SKalle Valo 
134ad226ec2SKalle Valo 	status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response);
135bdcd8170SKalle Valo 	if (status) {
136bdcd8170SKalle Valo 		ath6kl_err("failed to connect to %s service status:%d\n",
137bdcd8170SKalle Valo 			   desc, status);
138bdcd8170SKalle Valo 		return status;
139bdcd8170SKalle Valo 	}
140bdcd8170SKalle Valo 
141bdcd8170SKalle Valo 	switch (con_req->svc_id) {
142bdcd8170SKalle Valo 	case WMI_CONTROL_SVC:
143bdcd8170SKalle Valo 		if (test_bit(WMI_ENABLED, &ar->flag))
144bdcd8170SKalle Valo 			ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint);
145bdcd8170SKalle Valo 		ar->ctrl_ep = response.endpoint;
146bdcd8170SKalle Valo 		break;
147bdcd8170SKalle Valo 	case WMI_DATA_BE_SVC:
148bdcd8170SKalle Valo 		set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint);
149bdcd8170SKalle Valo 		break;
150bdcd8170SKalle Valo 	case WMI_DATA_BK_SVC:
151bdcd8170SKalle Valo 		set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint);
152bdcd8170SKalle Valo 		break;
153bdcd8170SKalle Valo 	case WMI_DATA_VI_SVC:
154bdcd8170SKalle Valo 		set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint);
155bdcd8170SKalle Valo 		break;
156bdcd8170SKalle Valo 	case WMI_DATA_VO_SVC:
157bdcd8170SKalle Valo 		set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint);
158bdcd8170SKalle Valo 		break;
159bdcd8170SKalle Valo 	default:
160bdcd8170SKalle Valo 		ath6kl_err("service id is not mapped %d\n", con_req->svc_id);
161bdcd8170SKalle Valo 		return -EINVAL;
162bdcd8170SKalle Valo 	}
163bdcd8170SKalle Valo 
164bdcd8170SKalle Valo 	return 0;
165bdcd8170SKalle Valo }
166bdcd8170SKalle Valo 
167bdcd8170SKalle Valo static int ath6kl_init_service_ep(struct ath6kl *ar)
168bdcd8170SKalle Valo {
169bdcd8170SKalle Valo 	struct htc_service_connect_req connect;
170bdcd8170SKalle Valo 
171bdcd8170SKalle Valo 	memset(&connect, 0, sizeof(connect));
172bdcd8170SKalle Valo 
173bdcd8170SKalle Valo 	/* these fields are the same for all service endpoints */
174bdcd8170SKalle Valo 	connect.ep_cb.rx = ath6kl_rx;
175bdcd8170SKalle Valo 	connect.ep_cb.rx_refill = ath6kl_rx_refill;
176bdcd8170SKalle Valo 	connect.ep_cb.tx_full = ath6kl_tx_queue_full;
177bdcd8170SKalle Valo 
178bdcd8170SKalle Valo 	/*
179bdcd8170SKalle Valo 	 * Set the max queue depth so that our ath6kl_tx_queue_full handler
180bdcd8170SKalle Valo 	 * gets called.
181bdcd8170SKalle Valo 	*/
182bdcd8170SKalle Valo 	connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH;
183bdcd8170SKalle Valo 	connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4;
184bdcd8170SKalle Valo 	if (!connect.ep_cb.rx_refill_thresh)
185bdcd8170SKalle Valo 		connect.ep_cb.rx_refill_thresh++;
186bdcd8170SKalle Valo 
187bdcd8170SKalle Valo 	/* connect to control service */
188bdcd8170SKalle Valo 	connect.svc_id = WMI_CONTROL_SVC;
189bdcd8170SKalle Valo 	if (ath6kl_connectservice(ar, &connect, "WMI CONTROL"))
190bdcd8170SKalle Valo 		return -EIO;
191bdcd8170SKalle Valo 
192bdcd8170SKalle Valo 	connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN;
193bdcd8170SKalle Valo 
194bdcd8170SKalle Valo 	/*
195bdcd8170SKalle Valo 	 * Limit the HTC message size on the send path, although e can
196bdcd8170SKalle Valo 	 * receive A-MSDU frames of 4K, we will only send ethernet-sized
197bdcd8170SKalle Valo 	 * (802.3) frames on the send path.
198bdcd8170SKalle Valo 	 */
199bdcd8170SKalle Valo 	connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH;
200bdcd8170SKalle Valo 
201bdcd8170SKalle Valo 	/*
202bdcd8170SKalle Valo 	 * To reduce the amount of committed memory for larger A_MSDU
203bdcd8170SKalle Valo 	 * frames, use the recv-alloc threshold mechanism for larger
204bdcd8170SKalle Valo 	 * packets.
205bdcd8170SKalle Valo 	 */
206bdcd8170SKalle Valo 	connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE;
207bdcd8170SKalle Valo 	connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf;
208bdcd8170SKalle Valo 
209bdcd8170SKalle Valo 	/*
210bdcd8170SKalle Valo 	 * For the remaining data services set the connection flag to
211bdcd8170SKalle Valo 	 * reduce dribbling, if configured to do so.
212bdcd8170SKalle Valo 	 */
213bdcd8170SKalle Valo 	connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB;
214bdcd8170SKalle Valo 	connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK;
215bdcd8170SKalle Valo 	connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF;
216bdcd8170SKalle Valo 
217bdcd8170SKalle Valo 	connect.svc_id = WMI_DATA_BE_SVC;
218bdcd8170SKalle Valo 
219bdcd8170SKalle Valo 	if (ath6kl_connectservice(ar, &connect, "WMI DATA BE"))
220bdcd8170SKalle Valo 		return -EIO;
221bdcd8170SKalle Valo 
222bdcd8170SKalle Valo 	/* connect to back-ground map this to WMI LOW_PRI */
223bdcd8170SKalle Valo 	connect.svc_id = WMI_DATA_BK_SVC;
224bdcd8170SKalle Valo 	if (ath6kl_connectservice(ar, &connect, "WMI DATA BK"))
225bdcd8170SKalle Valo 		return -EIO;
226bdcd8170SKalle Valo 
227bdcd8170SKalle Valo 	/* connect to Video service, map this to to HI PRI */
228bdcd8170SKalle Valo 	connect.svc_id = WMI_DATA_VI_SVC;
229bdcd8170SKalle Valo 	if (ath6kl_connectservice(ar, &connect, "WMI DATA VI"))
230bdcd8170SKalle Valo 		return -EIO;
231bdcd8170SKalle Valo 
232bdcd8170SKalle Valo 	/*
233bdcd8170SKalle Valo 	 * Connect to VO service, this is currently not mapped to a WMI
234bdcd8170SKalle Valo 	 * priority stream due to historical reasons. WMI originally
235bdcd8170SKalle Valo 	 * defined 3 priorities over 3 mailboxes We can change this when
236bdcd8170SKalle Valo 	 * WMI is reworked so that priorities are not dependent on
237bdcd8170SKalle Valo 	 * mailboxes.
238bdcd8170SKalle Valo 	 */
239bdcd8170SKalle Valo 	connect.svc_id = WMI_DATA_VO_SVC;
240bdcd8170SKalle Valo 	if (ath6kl_connectservice(ar, &connect, "WMI DATA VO"))
241bdcd8170SKalle Valo 		return -EIO;
242bdcd8170SKalle Valo 
243bdcd8170SKalle Valo 	return 0;
244bdcd8170SKalle Valo }
245bdcd8170SKalle Valo 
246e29f25f5SVasanthakumar Thiagarajan void ath6kl_init_control_info(struct ath6kl_vif *vif)
247bdcd8170SKalle Valo {
248e29f25f5SVasanthakumar Thiagarajan 	ath6kl_init_profile_info(vif);
2493450334fSVasanthakumar Thiagarajan 	vif->def_txkey_index = 0;
2506f2a73f9SVasanthakumar Thiagarajan 	memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
251f74bac54SVasanthakumar Thiagarajan 	vif->ch_hint = 0;
252bdcd8170SKalle Valo }
253bdcd8170SKalle Valo 
254bdcd8170SKalle Valo /*
255bdcd8170SKalle Valo  * Set HTC/Mbox operational parameters, this can only be called when the
256bdcd8170SKalle Valo  * target is in the BMI phase.
257bdcd8170SKalle Valo  */
258bdcd8170SKalle Valo static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val,
259bdcd8170SKalle Valo 				 u8 htc_ctrl_buf)
260bdcd8170SKalle Valo {
261bdcd8170SKalle Valo 	int status;
262bdcd8170SKalle Valo 	u32 blk_size;
263bdcd8170SKalle Valo 
264bdcd8170SKalle Valo 	blk_size = ar->mbox_info.block_size;
265bdcd8170SKalle Valo 
266bdcd8170SKalle Valo 	if (htc_ctrl_buf)
267bdcd8170SKalle Valo 		blk_size |=  ((u32)htc_ctrl_buf) << 16;
268bdcd8170SKalle Valo 
269bdcd8170SKalle Valo 	/* set the host interest area for the block size */
270bdcd8170SKalle Valo 	status = ath6kl_bmi_write(ar,
271bdcd8170SKalle Valo 			ath6kl_get_hi_item_addr(ar,
272bdcd8170SKalle Valo 			HI_ITEM(hi_mbox_io_block_sz)),
273bdcd8170SKalle Valo 			(u8 *)&blk_size,
274bdcd8170SKalle Valo 			4);
275bdcd8170SKalle Valo 	if (status) {
276bdcd8170SKalle Valo 		ath6kl_err("bmi_write_memory for IO block size failed\n");
277bdcd8170SKalle Valo 		goto out;
278bdcd8170SKalle Valo 	}
279bdcd8170SKalle Valo 
280bdcd8170SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n",
281bdcd8170SKalle Valo 		   blk_size,
282bdcd8170SKalle Valo 		   ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz)));
283bdcd8170SKalle Valo 
284bdcd8170SKalle Valo 	if (mbox_isr_yield_val) {
285bdcd8170SKalle Valo 		/* set the host interest area for the mbox ISR yield limit */
286bdcd8170SKalle Valo 		status = ath6kl_bmi_write(ar,
287bdcd8170SKalle Valo 				ath6kl_get_hi_item_addr(ar,
288bdcd8170SKalle Valo 				HI_ITEM(hi_mbox_isr_yield_limit)),
289bdcd8170SKalle Valo 				(u8 *)&mbox_isr_yield_val,
290bdcd8170SKalle Valo 				4);
291bdcd8170SKalle Valo 		if (status) {
292bdcd8170SKalle Valo 			ath6kl_err("bmi_write_memory for yield limit failed\n");
293bdcd8170SKalle Valo 			goto out;
294bdcd8170SKalle Valo 		}
295bdcd8170SKalle Valo 	}
296bdcd8170SKalle Valo 
297bdcd8170SKalle Valo out:
298bdcd8170SKalle Valo 	return status;
299bdcd8170SKalle Valo }
300bdcd8170SKalle Valo 
3010ce59445SVasanthakumar Thiagarajan static int ath6kl_target_config_wlan_params(struct ath6kl *ar, int idx)
302bdcd8170SKalle Valo {
303bdcd8170SKalle Valo 	int status = 0;
3044dea08e0SJouni Malinen 	int ret;
305bdcd8170SKalle Valo 
306bdcd8170SKalle Valo 	/*
307bdcd8170SKalle Valo 	 * Configure the device for rx dot11 header rules. "0,0" are the
308bdcd8170SKalle Valo 	 * default values. Required if checksum offload is needed. Set
309bdcd8170SKalle Valo 	 * RxMetaVersion to 2.
310bdcd8170SKalle Valo 	 */
3110ce59445SVasanthakumar Thiagarajan 	if (ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi, idx,
312bdcd8170SKalle Valo 					       ar->rx_meta_ver, 0, 0)) {
313bdcd8170SKalle Valo 		ath6kl_err("unable to set the rx frame format\n");
314bdcd8170SKalle Valo 		status = -EIO;
315bdcd8170SKalle Valo 	}
316bdcd8170SKalle Valo 
317bdcd8170SKalle Valo 	if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN)
3180ce59445SVasanthakumar Thiagarajan 		if ((ath6kl_wmi_pmparams_cmd(ar->wmi, idx, 0, 1, 0, 0, 1,
319bdcd8170SKalle Valo 		     IGNORE_POWER_SAVE_FAIL_EVENT_DURING_SCAN)) != 0) {
320bdcd8170SKalle Valo 			ath6kl_err("unable to set power save fail event policy\n");
321bdcd8170SKalle Valo 			status = -EIO;
322bdcd8170SKalle Valo 		}
323bdcd8170SKalle Valo 
324bdcd8170SKalle Valo 	if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER))
3250ce59445SVasanthakumar Thiagarajan 		if ((ath6kl_wmi_set_lpreamble_cmd(ar->wmi, idx, 0,
326bdcd8170SKalle Valo 		     WMI_DONOT_IGNORE_BARKER_IN_ERP)) != 0) {
327bdcd8170SKalle Valo 			ath6kl_err("unable to set barker preamble policy\n");
328bdcd8170SKalle Valo 			status = -EIO;
329bdcd8170SKalle Valo 		}
330bdcd8170SKalle Valo 
3310ce59445SVasanthakumar Thiagarajan 	if (ath6kl_wmi_set_keepalive_cmd(ar->wmi, idx,
332bdcd8170SKalle Valo 			WLAN_CONFIG_KEEP_ALIVE_INTERVAL)) {
333bdcd8170SKalle Valo 		ath6kl_err("unable to set keep alive interval\n");
334bdcd8170SKalle Valo 		status = -EIO;
335bdcd8170SKalle Valo 	}
336bdcd8170SKalle Valo 
3370ce59445SVasanthakumar Thiagarajan 	if (ath6kl_wmi_disctimeout_cmd(ar->wmi, idx,
338bdcd8170SKalle Valo 			WLAN_CONFIG_DISCONNECT_TIMEOUT)) {
339bdcd8170SKalle Valo 		ath6kl_err("unable to set disconnect timeout\n");
340bdcd8170SKalle Valo 		status = -EIO;
341bdcd8170SKalle Valo 	}
342bdcd8170SKalle Valo 
343bdcd8170SKalle Valo 	if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST))
3440ce59445SVasanthakumar Thiagarajan 		if (ath6kl_wmi_set_wmm_txop(ar->wmi, idx, WMI_TXOP_DISABLED)) {
345bdcd8170SKalle Valo 			ath6kl_err("unable to set txop bursting\n");
346bdcd8170SKalle Valo 			status = -EIO;
347bdcd8170SKalle Valo 		}
348bdcd8170SKalle Valo 
3490ce59445SVasanthakumar Thiagarajan 	/*
3500ce59445SVasanthakumar Thiagarajan 	 * FIXME: Make sure p2p configurations are not applied to
3510ce59445SVasanthakumar Thiagarajan 	 * non-p2p capable interfaces when multivif support is enabled.
3520ce59445SVasanthakumar Thiagarajan 	 */
3536bbc7c35SJouni Malinen 	if (ar->p2p) {
3540ce59445SVasanthakumar Thiagarajan 		ret = ath6kl_wmi_info_req_cmd(ar->wmi, idx,
3556bbc7c35SJouni Malinen 					      P2P_FLAG_CAPABILITIES_REQ |
3564dea08e0SJouni Malinen 					      P2P_FLAG_MACADDR_REQ |
3574dea08e0SJouni Malinen 					      P2P_FLAG_HMODEL_REQ);
3584dea08e0SJouni Malinen 		if (ret) {
3594dea08e0SJouni Malinen 			ath6kl_dbg(ATH6KL_DBG_TRC, "failed to request P2P "
3606bbc7c35SJouni Malinen 				   "capabilities (%d) - assuming P2P not "
3616bbc7c35SJouni Malinen 				   "supported\n", ret);
3626bbc7c35SJouni Malinen 			ar->p2p = 0;
3636bbc7c35SJouni Malinen 		}
3646bbc7c35SJouni Malinen 	}
3656bbc7c35SJouni Malinen 
3660ce59445SVasanthakumar Thiagarajan 	/*
3670ce59445SVasanthakumar Thiagarajan 	 * FIXME: Make sure p2p configurations are not applied to
3680ce59445SVasanthakumar Thiagarajan 	 * non-p2p capable interfaces when multivif support is enabled.
3690ce59445SVasanthakumar Thiagarajan 	 */
3706bbc7c35SJouni Malinen 	if (ar->p2p) {
3716bbc7c35SJouni Malinen 		/* Enable Probe Request reporting for P2P */
3720ce59445SVasanthakumar Thiagarajan 		ret = ath6kl_wmi_probe_report_req_cmd(ar->wmi, idx, true);
3736bbc7c35SJouni Malinen 		if (ret) {
3746bbc7c35SJouni Malinen 			ath6kl_dbg(ATH6KL_DBG_TRC, "failed to enable Probe "
3756bbc7c35SJouni Malinen 				   "Request reporting (%d)\n", ret);
3766bbc7c35SJouni Malinen 		}
3774dea08e0SJouni Malinen 	}
3784dea08e0SJouni Malinen 
379bdcd8170SKalle Valo 	return status;
380bdcd8170SKalle Valo }
381bdcd8170SKalle Valo 
382bdcd8170SKalle Valo int ath6kl_configure_target(struct ath6kl *ar)
383bdcd8170SKalle Valo {
384bdcd8170SKalle Valo 	u32 param, ram_reserved_size;
3853226f68aSVasanthakumar Thiagarajan 	u8 fw_iftype, fw_mode = 0, fw_submode = 0;
3867b85832dSVasanthakumar Thiagarajan 	int i;
387bdcd8170SKalle Valo 
3887b85832dSVasanthakumar Thiagarajan 	/*
3897b85832dSVasanthakumar Thiagarajan 	 * Note: Even though the firmware interface type is
3907b85832dSVasanthakumar Thiagarajan 	 * chosen as BSS_STA for all three interfaces, can
3917b85832dSVasanthakumar Thiagarajan 	 * be configured to IBSS/AP as long as the fw submode
3927b85832dSVasanthakumar Thiagarajan 	 * remains normal mode (0 - AP, STA and IBSS). But
3937b85832dSVasanthakumar Thiagarajan 	 * due to an target assert in firmware only one interface is
3947b85832dSVasanthakumar Thiagarajan 	 * configured for now.
3957b85832dSVasanthakumar Thiagarajan 	 */
396dd3751f7SVasanthakumar Thiagarajan 	fw_iftype = HI_OPTION_FW_MODE_BSS_STA;
397bdcd8170SKalle Valo 
3987b85832dSVasanthakumar Thiagarajan 	for (i = 0; i < MAX_NUM_VIF; i++)
3997b85832dSVasanthakumar Thiagarajan 		fw_mode |= fw_iftype << (i * HI_OPTION_FW_MODE_BITS);
4007b85832dSVasanthakumar Thiagarajan 
4017b85832dSVasanthakumar Thiagarajan 	/*
4023226f68aSVasanthakumar Thiagarajan 	 * By default, submodes :
4033226f68aSVasanthakumar Thiagarajan 	 *		vif[0] - AP/STA/IBSS
4047b85832dSVasanthakumar Thiagarajan 	 *		vif[1] - "P2P dev"/"P2P GO"/"P2P Client"
4057b85832dSVasanthakumar Thiagarajan 	 *		vif[2] - "P2P dev"/"P2P GO"/"P2P Client"
4067b85832dSVasanthakumar Thiagarajan 	 */
4073226f68aSVasanthakumar Thiagarajan 
4083226f68aSVasanthakumar Thiagarajan 	for (i = 0; i < ar->max_norm_iface; i++)
4093226f68aSVasanthakumar Thiagarajan 		fw_submode |= HI_OPTION_FW_SUBMODE_NONE <<
4103226f68aSVasanthakumar Thiagarajan 			      (i * HI_OPTION_FW_SUBMODE_BITS);
4113226f68aSVasanthakumar Thiagarajan 
4123226f68aSVasanthakumar Thiagarajan 	for (i = ar->max_norm_iface; i < MAX_NUM_VIF; i++)
4133226f68aSVasanthakumar Thiagarajan 		fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV <<
4143226f68aSVasanthakumar Thiagarajan 			      (i * HI_OPTION_FW_SUBMODE_BITS);
4157b85832dSVasanthakumar Thiagarajan 
4167b85832dSVasanthakumar Thiagarajan 	/*
4177b85832dSVasanthakumar Thiagarajan 	 * FIXME: This needs to be removed once the multivif
4187b85832dSVasanthakumar Thiagarajan 	 * support is enabled.
4197b85832dSVasanthakumar Thiagarajan 	 */
4207b85832dSVasanthakumar Thiagarajan 	if (ar->p2p)
4217b85832dSVasanthakumar Thiagarajan 		fw_submode = HI_OPTION_FW_SUBMODE_P2PDEV;
4227b85832dSVasanthakumar Thiagarajan 
423bdcd8170SKalle Valo 	param = HTC_PROTOCOL_VERSION;
424bdcd8170SKalle Valo 	if (ath6kl_bmi_write(ar,
425bdcd8170SKalle Valo 			     ath6kl_get_hi_item_addr(ar,
426bdcd8170SKalle Valo 			     HI_ITEM(hi_app_host_interest)),
427bdcd8170SKalle Valo 			     (u8 *)&param, 4) != 0) {
428bdcd8170SKalle Valo 		ath6kl_err("bmi_write_memory for htc version failed\n");
429bdcd8170SKalle Valo 		return -EIO;
430bdcd8170SKalle Valo 	}
431bdcd8170SKalle Valo 
432bdcd8170SKalle Valo 	/* set the firmware mode to STA/IBSS/AP */
433bdcd8170SKalle Valo 	param = 0;
434bdcd8170SKalle Valo 
435bdcd8170SKalle Valo 	if (ath6kl_bmi_read(ar,
436bdcd8170SKalle Valo 			    ath6kl_get_hi_item_addr(ar,
437bdcd8170SKalle Valo 			    HI_ITEM(hi_option_flag)),
438bdcd8170SKalle Valo 			    (u8 *)&param, 4) != 0) {
439bdcd8170SKalle Valo 		ath6kl_err("bmi_read_memory for setting fwmode failed\n");
440bdcd8170SKalle Valo 		return -EIO;
441bdcd8170SKalle Valo 	}
442bdcd8170SKalle Valo 
4437b85832dSVasanthakumar Thiagarajan 	param |= (MAX_NUM_VIF << HI_OPTION_NUM_DEV_SHIFT);
4447b85832dSVasanthakumar Thiagarajan 	param |= fw_mode << HI_OPTION_FW_MODE_SHIFT;
4457b85832dSVasanthakumar Thiagarajan 	param |= fw_submode << HI_OPTION_FW_SUBMODE_SHIFT;
4467b85832dSVasanthakumar Thiagarajan 
447bdcd8170SKalle Valo 	param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
448bdcd8170SKalle Valo 	param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
449bdcd8170SKalle Valo 
450bdcd8170SKalle Valo 	if (ath6kl_bmi_write(ar,
451bdcd8170SKalle Valo 			     ath6kl_get_hi_item_addr(ar,
452bdcd8170SKalle Valo 			     HI_ITEM(hi_option_flag)),
453bdcd8170SKalle Valo 			     (u8 *)&param,
454bdcd8170SKalle Valo 			     4) != 0) {
455bdcd8170SKalle Valo 		ath6kl_err("bmi_write_memory for setting fwmode failed\n");
456bdcd8170SKalle Valo 		return -EIO;
457bdcd8170SKalle Valo 	}
458bdcd8170SKalle Valo 
459bdcd8170SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n");
460bdcd8170SKalle Valo 
461bdcd8170SKalle Valo 	/*
462bdcd8170SKalle Valo 	 * Hardcode the address use for the extended board data
463bdcd8170SKalle Valo 	 * Ideally this should be pre-allocate by the OS at boot time
464bdcd8170SKalle Valo 	 * But since it is a new feature and board data is loaded
465bdcd8170SKalle Valo 	 * at init time, we have to workaround this from host.
466bdcd8170SKalle Valo 	 * It is difficult to patch the firmware boot code,
467bdcd8170SKalle Valo 	 * but possible in theory.
468bdcd8170SKalle Valo 	 */
469bdcd8170SKalle Valo 
470991b27eaSKalle Valo 	param = ar->hw.board_ext_data_addr;
471991b27eaSKalle Valo 	ram_reserved_size = ar->hw.reserved_ram_size;
472bdcd8170SKalle Valo 
473991b27eaSKalle Valo 	if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar,
474bdcd8170SKalle Valo 					HI_ITEM(hi_board_ext_data)),
475bdcd8170SKalle Valo 			     (u8 *)&param, 4) != 0) {
476bdcd8170SKalle Valo 		ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n");
477bdcd8170SKalle Valo 		return -EIO;
478bdcd8170SKalle Valo 	}
479991b27eaSKalle Valo 
480991b27eaSKalle Valo 	if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar,
481bdcd8170SKalle Valo 					HI_ITEM(hi_end_ram_reserve_sz)),
482bdcd8170SKalle Valo 			     (u8 *)&ram_reserved_size, 4) != 0) {
483bdcd8170SKalle Valo 		ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n");
484bdcd8170SKalle Valo 		return -EIO;
485bdcd8170SKalle Valo 	}
486bdcd8170SKalle Valo 
487bdcd8170SKalle Valo 	/* set the block size for the target */
488bdcd8170SKalle Valo 	if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0))
489bdcd8170SKalle Valo 		/* use default number of control buffers */
490bdcd8170SKalle Valo 		return -EIO;
491bdcd8170SKalle Valo 
492bdcd8170SKalle Valo 	return 0;
493bdcd8170SKalle Valo }
494bdcd8170SKalle Valo 
4958dafb70eSVasanthakumar Thiagarajan void ath6kl_core_free(struct ath6kl *ar)
496bdcd8170SKalle Valo {
4978dafb70eSVasanthakumar Thiagarajan 	wiphy_free(ar->wiphy);
498bdcd8170SKalle Valo }
499bdcd8170SKalle Valo 
5006db8fa53SVasanthakumar Thiagarajan void ath6kl_core_cleanup(struct ath6kl *ar)
501bdcd8170SKalle Valo {
502b2e75698SKalle Valo 	ath6kl_hif_power_off(ar);
503b2e75698SKalle Valo 
5046db8fa53SVasanthakumar Thiagarajan 	destroy_workqueue(ar->ath6kl_wq);
505bdcd8170SKalle Valo 
5066db8fa53SVasanthakumar Thiagarajan 	if (ar->htc_target)
5076db8fa53SVasanthakumar Thiagarajan 		ath6kl_htc_cleanup(ar->htc_target);
5086db8fa53SVasanthakumar Thiagarajan 
5096db8fa53SVasanthakumar Thiagarajan 	ath6kl_cookie_cleanup(ar);
5106db8fa53SVasanthakumar Thiagarajan 
5116db8fa53SVasanthakumar Thiagarajan 	ath6kl_cleanup_amsdu_rxbufs(ar);
5126db8fa53SVasanthakumar Thiagarajan 
5136db8fa53SVasanthakumar Thiagarajan 	ath6kl_bmi_cleanup(ar);
5146db8fa53SVasanthakumar Thiagarajan 
5156db8fa53SVasanthakumar Thiagarajan 	ath6kl_debug_cleanup(ar);
5166db8fa53SVasanthakumar Thiagarajan 
5176db8fa53SVasanthakumar Thiagarajan 	kfree(ar->fw_board);
5186db8fa53SVasanthakumar Thiagarajan 	kfree(ar->fw_otp);
5196db8fa53SVasanthakumar Thiagarajan 	kfree(ar->fw);
5206db8fa53SVasanthakumar Thiagarajan 	kfree(ar->fw_patch);
5216db8fa53SVasanthakumar Thiagarajan 
5226db8fa53SVasanthakumar Thiagarajan 	ath6kl_deinit_ieee80211_hw(ar);
523bdcd8170SKalle Valo }
524bdcd8170SKalle Valo 
525bdcd8170SKalle Valo /* firmware upload */
526bdcd8170SKalle Valo static int ath6kl_get_fw(struct ath6kl *ar, const char *filename,
527bdcd8170SKalle Valo 			 u8 **fw, size_t *fw_len)
528bdcd8170SKalle Valo {
529bdcd8170SKalle Valo 	const struct firmware *fw_entry;
530bdcd8170SKalle Valo 	int ret;
531bdcd8170SKalle Valo 
532bdcd8170SKalle Valo 	ret = request_firmware(&fw_entry, filename, ar->dev);
533bdcd8170SKalle Valo 	if (ret)
534bdcd8170SKalle Valo 		return ret;
535bdcd8170SKalle Valo 
536bdcd8170SKalle Valo 	*fw_len = fw_entry->size;
537bdcd8170SKalle Valo 	*fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL);
538bdcd8170SKalle Valo 
539bdcd8170SKalle Valo 	if (*fw == NULL)
540bdcd8170SKalle Valo 		ret = -ENOMEM;
541bdcd8170SKalle Valo 
542bdcd8170SKalle Valo 	release_firmware(fw_entry);
543bdcd8170SKalle Valo 
544bdcd8170SKalle Valo 	return ret;
545bdcd8170SKalle Valo }
546bdcd8170SKalle Valo 
54792ecbff4SSam Leffler #ifdef CONFIG_OF
54892ecbff4SSam Leffler static const char *get_target_ver_dir(const struct ath6kl *ar)
54992ecbff4SSam Leffler {
55092ecbff4SSam Leffler 	switch (ar->version.target_ver) {
55192ecbff4SSam Leffler 	case AR6003_REV1_VERSION:
55292ecbff4SSam Leffler 		return "ath6k/AR6003/hw1.0";
55392ecbff4SSam Leffler 	case AR6003_REV2_VERSION:
55492ecbff4SSam Leffler 		return "ath6k/AR6003/hw2.0";
55592ecbff4SSam Leffler 	case AR6003_REV3_VERSION:
55692ecbff4SSam Leffler 		return "ath6k/AR6003/hw2.1.1";
55792ecbff4SSam Leffler 	}
55892ecbff4SSam Leffler 	ath6kl_warn("%s: unsupported target version 0x%x.\n", __func__,
55992ecbff4SSam Leffler 		    ar->version.target_ver);
56092ecbff4SSam Leffler 	return NULL;
56192ecbff4SSam Leffler }
56292ecbff4SSam Leffler 
56392ecbff4SSam Leffler /*
56492ecbff4SSam Leffler  * Check the device tree for a board-id and use it to construct
56592ecbff4SSam Leffler  * the pathname to the firmware file.  Used (for now) to find a
56692ecbff4SSam Leffler  * fallback to the "bdata.bin" file--typically a symlink to the
56792ecbff4SSam Leffler  * appropriate board-specific file.
56892ecbff4SSam Leffler  */
56992ecbff4SSam Leffler static bool check_device_tree(struct ath6kl *ar)
57092ecbff4SSam Leffler {
57192ecbff4SSam Leffler 	static const char *board_id_prop = "atheros,board-id";
57292ecbff4SSam Leffler 	struct device_node *node;
57392ecbff4SSam Leffler 	char board_filename[64];
57492ecbff4SSam Leffler 	const char *board_id;
57592ecbff4SSam Leffler 	int ret;
57692ecbff4SSam Leffler 
57792ecbff4SSam Leffler 	for_each_compatible_node(node, NULL, "atheros,ath6kl") {
57892ecbff4SSam Leffler 		board_id = of_get_property(node, board_id_prop, NULL);
57992ecbff4SSam Leffler 		if (board_id == NULL) {
58092ecbff4SSam Leffler 			ath6kl_warn("No \"%s\" property on %s node.\n",
58192ecbff4SSam Leffler 				    board_id_prop, node->name);
58292ecbff4SSam Leffler 			continue;
58392ecbff4SSam Leffler 		}
58492ecbff4SSam Leffler 		snprintf(board_filename, sizeof(board_filename),
58592ecbff4SSam Leffler 			 "%s/bdata.%s.bin", get_target_ver_dir(ar), board_id);
58692ecbff4SSam Leffler 
58792ecbff4SSam Leffler 		ret = ath6kl_get_fw(ar, board_filename, &ar->fw_board,
58892ecbff4SSam Leffler 				    &ar->fw_board_len);
58992ecbff4SSam Leffler 		if (ret) {
59092ecbff4SSam Leffler 			ath6kl_err("Failed to get DT board file %s: %d\n",
59192ecbff4SSam Leffler 				   board_filename, ret);
59292ecbff4SSam Leffler 			continue;
59392ecbff4SSam Leffler 		}
59492ecbff4SSam Leffler 		return true;
59592ecbff4SSam Leffler 	}
59692ecbff4SSam Leffler 	return false;
59792ecbff4SSam Leffler }
59892ecbff4SSam Leffler #else
59992ecbff4SSam Leffler static bool check_device_tree(struct ath6kl *ar)
60092ecbff4SSam Leffler {
60192ecbff4SSam Leffler 	return false;
60292ecbff4SSam Leffler }
60392ecbff4SSam Leffler #endif /* CONFIG_OF */
60492ecbff4SSam Leffler 
605bdcd8170SKalle Valo static int ath6kl_fetch_board_file(struct ath6kl *ar)
606bdcd8170SKalle Valo {
607bdcd8170SKalle Valo 	const char *filename;
608bdcd8170SKalle Valo 	int ret;
609bdcd8170SKalle Valo 
610772c31eeSKalle Valo 	if (ar->fw_board != NULL)
611772c31eeSKalle Valo 		return 0;
612772c31eeSKalle Valo 
613bdcd8170SKalle Valo 	switch (ar->version.target_ver) {
614bdcd8170SKalle Valo 	case AR6003_REV2_VERSION:
615bdcd8170SKalle Valo 		filename = AR6003_REV2_BOARD_DATA_FILE;
616bdcd8170SKalle Valo 		break;
61731024d99SKevin Fang 	case AR6004_REV1_VERSION:
61831024d99SKevin Fang 		filename = AR6004_REV1_BOARD_DATA_FILE;
61931024d99SKevin Fang 		break;
620bdcd8170SKalle Valo 	default:
621bdcd8170SKalle Valo 		filename = AR6003_REV3_BOARD_DATA_FILE;
622bdcd8170SKalle Valo 		break;
623bdcd8170SKalle Valo 	}
624bdcd8170SKalle Valo 
625bdcd8170SKalle Valo 	ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
626bdcd8170SKalle Valo 			    &ar->fw_board_len);
627bdcd8170SKalle Valo 	if (ret == 0) {
628bdcd8170SKalle Valo 		/* managed to get proper board file */
629bdcd8170SKalle Valo 		return 0;
630bdcd8170SKalle Valo 	}
631bdcd8170SKalle Valo 
63292ecbff4SSam Leffler 	if (check_device_tree(ar)) {
63392ecbff4SSam Leffler 		/* got board file from device tree */
63492ecbff4SSam Leffler 		return 0;
63592ecbff4SSam Leffler 	}
63692ecbff4SSam Leffler 
637bdcd8170SKalle Valo 	/* there was no proper board file, try to use default instead */
638bdcd8170SKalle Valo 	ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n",
639bdcd8170SKalle Valo 		    filename, ret);
640bdcd8170SKalle Valo 
641bdcd8170SKalle Valo 	switch (ar->version.target_ver) {
642bdcd8170SKalle Valo 	case AR6003_REV2_VERSION:
643bdcd8170SKalle Valo 		filename = AR6003_REV2_DEFAULT_BOARD_DATA_FILE;
644bdcd8170SKalle Valo 		break;
64531024d99SKevin Fang 	case AR6004_REV1_VERSION:
64631024d99SKevin Fang 		filename = AR6004_REV1_DEFAULT_BOARD_DATA_FILE;
64731024d99SKevin Fang 		break;
648bdcd8170SKalle Valo 	default:
649bdcd8170SKalle Valo 		filename = AR6003_REV3_DEFAULT_BOARD_DATA_FILE;
650bdcd8170SKalle Valo 		break;
651bdcd8170SKalle Valo 	}
652bdcd8170SKalle Valo 
653bdcd8170SKalle Valo 	ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
654bdcd8170SKalle Valo 			    &ar->fw_board_len);
655bdcd8170SKalle Valo 	if (ret) {
656bdcd8170SKalle Valo 		ath6kl_err("Failed to get default board file %s: %d\n",
657bdcd8170SKalle Valo 			   filename, ret);
658bdcd8170SKalle Valo 		return ret;
659bdcd8170SKalle Valo 	}
660bdcd8170SKalle Valo 
661bdcd8170SKalle Valo 	ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n");
662bdcd8170SKalle Valo 	ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n");
663bdcd8170SKalle Valo 
664bdcd8170SKalle Valo 	return 0;
665bdcd8170SKalle Valo }
666bdcd8170SKalle Valo 
667772c31eeSKalle Valo static int ath6kl_fetch_otp_file(struct ath6kl *ar)
668772c31eeSKalle Valo {
669772c31eeSKalle Valo 	const char *filename;
670772c31eeSKalle Valo 	int ret;
671772c31eeSKalle Valo 
672772c31eeSKalle Valo 	if (ar->fw_otp != NULL)
673772c31eeSKalle Valo 		return 0;
674772c31eeSKalle Valo 
675772c31eeSKalle Valo 	switch (ar->version.target_ver) {
676772c31eeSKalle Valo 	case AR6003_REV2_VERSION:
677772c31eeSKalle Valo 		filename = AR6003_REV2_OTP_FILE;
678772c31eeSKalle Valo 		break;
679772c31eeSKalle Valo 	case AR6004_REV1_VERSION:
680772c31eeSKalle Valo 		ath6kl_dbg(ATH6KL_DBG_TRC, "AR6004 doesn't need OTP file\n");
681772c31eeSKalle Valo 		return 0;
682772c31eeSKalle Valo 		break;
683772c31eeSKalle Valo 	default:
684772c31eeSKalle Valo 		filename = AR6003_REV3_OTP_FILE;
685772c31eeSKalle Valo 		break;
686772c31eeSKalle Valo 	}
687772c31eeSKalle Valo 
688772c31eeSKalle Valo 	ret = ath6kl_get_fw(ar, filename, &ar->fw_otp,
689772c31eeSKalle Valo 			    &ar->fw_otp_len);
690772c31eeSKalle Valo 	if (ret) {
691772c31eeSKalle Valo 		ath6kl_err("Failed to get OTP file %s: %d\n",
692772c31eeSKalle Valo 			   filename, ret);
693772c31eeSKalle Valo 		return ret;
694772c31eeSKalle Valo 	}
695772c31eeSKalle Valo 
696772c31eeSKalle Valo 	return 0;
697772c31eeSKalle Valo }
698772c31eeSKalle Valo 
699772c31eeSKalle Valo static int ath6kl_fetch_fw_file(struct ath6kl *ar)
700772c31eeSKalle Valo {
701772c31eeSKalle Valo 	const char *filename;
702772c31eeSKalle Valo 	int ret;
703772c31eeSKalle Valo 
704772c31eeSKalle Valo 	if (ar->fw != NULL)
705772c31eeSKalle Valo 		return 0;
706772c31eeSKalle Valo 
707772c31eeSKalle Valo 	if (testmode) {
708772c31eeSKalle Valo 		switch (ar->version.target_ver) {
709772c31eeSKalle Valo 		case AR6003_REV2_VERSION:
710772c31eeSKalle Valo 			filename = AR6003_REV2_TCMD_FIRMWARE_FILE;
711772c31eeSKalle Valo 			break;
712772c31eeSKalle Valo 		case AR6003_REV3_VERSION:
713772c31eeSKalle Valo 			filename = AR6003_REV3_TCMD_FIRMWARE_FILE;
714772c31eeSKalle Valo 			break;
715772c31eeSKalle Valo 		case AR6004_REV1_VERSION:
716772c31eeSKalle Valo 			ath6kl_warn("testmode not supported with ar6004\n");
717772c31eeSKalle Valo 			return -EOPNOTSUPP;
718772c31eeSKalle Valo 		default:
719772c31eeSKalle Valo 			ath6kl_warn("unknown target version: 0x%x\n",
720772c31eeSKalle Valo 				       ar->version.target_ver);
721772c31eeSKalle Valo 			return -EINVAL;
722772c31eeSKalle Valo 		}
723772c31eeSKalle Valo 
724772c31eeSKalle Valo 		set_bit(TESTMODE, &ar->flag);
725772c31eeSKalle Valo 
726772c31eeSKalle Valo 		goto get_fw;
727772c31eeSKalle Valo 	}
728772c31eeSKalle Valo 
729772c31eeSKalle Valo 	switch (ar->version.target_ver) {
730772c31eeSKalle Valo 	case AR6003_REV2_VERSION:
731772c31eeSKalle Valo 		filename = AR6003_REV2_FIRMWARE_FILE;
732772c31eeSKalle Valo 		break;
733772c31eeSKalle Valo 	case AR6004_REV1_VERSION:
734772c31eeSKalle Valo 		filename = AR6004_REV1_FIRMWARE_FILE;
735772c31eeSKalle Valo 		break;
736772c31eeSKalle Valo 	default:
737772c31eeSKalle Valo 		filename = AR6003_REV3_FIRMWARE_FILE;
738772c31eeSKalle Valo 		break;
739772c31eeSKalle Valo 	}
740772c31eeSKalle Valo 
741772c31eeSKalle Valo get_fw:
742772c31eeSKalle Valo 	ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
743772c31eeSKalle Valo 	if (ret) {
744772c31eeSKalle Valo 		ath6kl_err("Failed to get firmware file %s: %d\n",
745772c31eeSKalle Valo 			   filename, ret);
746772c31eeSKalle Valo 		return ret;
747772c31eeSKalle Valo 	}
748772c31eeSKalle Valo 
749772c31eeSKalle Valo 	return 0;
750772c31eeSKalle Valo }
751772c31eeSKalle Valo 
752772c31eeSKalle Valo static int ath6kl_fetch_patch_file(struct ath6kl *ar)
753772c31eeSKalle Valo {
754772c31eeSKalle Valo 	const char *filename;
755772c31eeSKalle Valo 	int ret;
756772c31eeSKalle Valo 
757772c31eeSKalle Valo 	switch (ar->version.target_ver) {
758772c31eeSKalle Valo 	case AR6003_REV2_VERSION:
759772c31eeSKalle Valo 		filename = AR6003_REV2_PATCH_FILE;
760772c31eeSKalle Valo 		break;
761772c31eeSKalle Valo 	case AR6004_REV1_VERSION:
762772c31eeSKalle Valo 		/* FIXME: implement for AR6004 */
763772c31eeSKalle Valo 		return 0;
764772c31eeSKalle Valo 		break;
765772c31eeSKalle Valo 	default:
766772c31eeSKalle Valo 		filename = AR6003_REV3_PATCH_FILE;
767772c31eeSKalle Valo 		break;
768772c31eeSKalle Valo 	}
769772c31eeSKalle Valo 
770772c31eeSKalle Valo 	if (ar->fw_patch == NULL) {
771772c31eeSKalle Valo 		ret = ath6kl_get_fw(ar, filename, &ar->fw_patch,
772772c31eeSKalle Valo 				    &ar->fw_patch_len);
773772c31eeSKalle Valo 		if (ret) {
774772c31eeSKalle Valo 			ath6kl_err("Failed to get patch file %s: %d\n",
775772c31eeSKalle Valo 				   filename, ret);
776772c31eeSKalle Valo 			return ret;
777772c31eeSKalle Valo 		}
778772c31eeSKalle Valo 	}
779772c31eeSKalle Valo 
780772c31eeSKalle Valo 	return 0;
781772c31eeSKalle Valo }
782772c31eeSKalle Valo 
78350d41234SKalle Valo static int ath6kl_fetch_fw_api1(struct ath6kl *ar)
784772c31eeSKalle Valo {
785772c31eeSKalle Valo 	int ret;
786772c31eeSKalle Valo 
787772c31eeSKalle Valo 	ret = ath6kl_fetch_otp_file(ar);
788772c31eeSKalle Valo 	if (ret)
789772c31eeSKalle Valo 		return ret;
790772c31eeSKalle Valo 
791772c31eeSKalle Valo 	ret = ath6kl_fetch_fw_file(ar);
792772c31eeSKalle Valo 	if (ret)
793772c31eeSKalle Valo 		return ret;
794772c31eeSKalle Valo 
795772c31eeSKalle Valo 	ret = ath6kl_fetch_patch_file(ar);
796772c31eeSKalle Valo 	if (ret)
797772c31eeSKalle Valo 		return ret;
798772c31eeSKalle Valo 
799772c31eeSKalle Valo 	return 0;
800772c31eeSKalle Valo }
801bdcd8170SKalle Valo 
80250d41234SKalle Valo static int ath6kl_fetch_fw_api2(struct ath6kl *ar)
80350d41234SKalle Valo {
80450d41234SKalle Valo 	size_t magic_len, len, ie_len;
80550d41234SKalle Valo 	const struct firmware *fw;
80650d41234SKalle Valo 	struct ath6kl_fw_ie *hdr;
80750d41234SKalle Valo 	const char *filename;
80850d41234SKalle Valo 	const u8 *data;
80997e0496dSKalle Valo 	int ret, ie_id, i, index, bit;
8108a137480SKalle Valo 	__le32 *val;
81150d41234SKalle Valo 
81250d41234SKalle Valo 	switch (ar->version.target_ver) {
81350d41234SKalle Valo 	case AR6003_REV2_VERSION:
81450d41234SKalle Valo 		filename = AR6003_REV2_FIRMWARE_2_FILE;
81550d41234SKalle Valo 		break;
81650d41234SKalle Valo 	case AR6003_REV3_VERSION:
81750d41234SKalle Valo 		filename = AR6003_REV3_FIRMWARE_2_FILE;
81850d41234SKalle Valo 		break;
81950d41234SKalle Valo 	case AR6004_REV1_VERSION:
82050d41234SKalle Valo 		filename = AR6004_REV1_FIRMWARE_2_FILE;
82150d41234SKalle Valo 		break;
82250d41234SKalle Valo 	default:
82350d41234SKalle Valo 		return -EOPNOTSUPP;
82450d41234SKalle Valo 	}
82550d41234SKalle Valo 
82650d41234SKalle Valo 	ret = request_firmware(&fw, filename, ar->dev);
82750d41234SKalle Valo 	if (ret)
82850d41234SKalle Valo 		return ret;
82950d41234SKalle Valo 
83050d41234SKalle Valo 	data = fw->data;
83150d41234SKalle Valo 	len = fw->size;
83250d41234SKalle Valo 
83350d41234SKalle Valo 	/* magic also includes the null byte, check that as well */
83450d41234SKalle Valo 	magic_len = strlen(ATH6KL_FIRMWARE_MAGIC) + 1;
83550d41234SKalle Valo 
83650d41234SKalle Valo 	if (len < magic_len) {
83750d41234SKalle Valo 		ret = -EINVAL;
83850d41234SKalle Valo 		goto out;
83950d41234SKalle Valo 	}
84050d41234SKalle Valo 
84150d41234SKalle Valo 	if (memcmp(data, ATH6KL_FIRMWARE_MAGIC, magic_len) != 0) {
84250d41234SKalle Valo 		ret = -EINVAL;
84350d41234SKalle Valo 		goto out;
84450d41234SKalle Valo 	}
84550d41234SKalle Valo 
84650d41234SKalle Valo 	len -= magic_len;
84750d41234SKalle Valo 	data += magic_len;
84850d41234SKalle Valo 
84950d41234SKalle Valo 	/* loop elements */
85050d41234SKalle Valo 	while (len > sizeof(struct ath6kl_fw_ie)) {
85150d41234SKalle Valo 		/* hdr is unaligned! */
85250d41234SKalle Valo 		hdr = (struct ath6kl_fw_ie *) data;
85350d41234SKalle Valo 
85450d41234SKalle Valo 		ie_id = le32_to_cpup(&hdr->id);
85550d41234SKalle Valo 		ie_len = le32_to_cpup(&hdr->len);
85650d41234SKalle Valo 
85750d41234SKalle Valo 		len -= sizeof(*hdr);
85850d41234SKalle Valo 		data += sizeof(*hdr);
85950d41234SKalle Valo 
86050d41234SKalle Valo 		if (len < ie_len) {
86150d41234SKalle Valo 			ret = -EINVAL;
86250d41234SKalle Valo 			goto out;
86350d41234SKalle Valo 		}
86450d41234SKalle Valo 
86550d41234SKalle Valo 		switch (ie_id) {
86650d41234SKalle Valo 		case ATH6KL_FW_IE_OTP_IMAGE:
867ef548626SKalle Valo 			ath6kl_dbg(ATH6KL_DBG_BOOT, "found otp image ie (%zd B)\n",
8686bc36431SKalle Valo 				ie_len);
8696bc36431SKalle Valo 
87050d41234SKalle Valo 			ar->fw_otp = kmemdup(data, ie_len, GFP_KERNEL);
87150d41234SKalle Valo 
87250d41234SKalle Valo 			if (ar->fw_otp == NULL) {
87350d41234SKalle Valo 				ret = -ENOMEM;
87450d41234SKalle Valo 				goto out;
87550d41234SKalle Valo 			}
87650d41234SKalle Valo 
87750d41234SKalle Valo 			ar->fw_otp_len = ie_len;
87850d41234SKalle Valo 			break;
87950d41234SKalle Valo 		case ATH6KL_FW_IE_FW_IMAGE:
880ef548626SKalle Valo 			ath6kl_dbg(ATH6KL_DBG_BOOT, "found fw image ie (%zd B)\n",
8816bc36431SKalle Valo 				ie_len);
8826bc36431SKalle Valo 
88350d41234SKalle Valo 			ar->fw = kmemdup(data, ie_len, GFP_KERNEL);
88450d41234SKalle Valo 
88550d41234SKalle Valo 			if (ar->fw == NULL) {
88650d41234SKalle Valo 				ret = -ENOMEM;
88750d41234SKalle Valo 				goto out;
88850d41234SKalle Valo 			}
88950d41234SKalle Valo 
89050d41234SKalle Valo 			ar->fw_len = ie_len;
89150d41234SKalle Valo 			break;
89250d41234SKalle Valo 		case ATH6KL_FW_IE_PATCH_IMAGE:
893ef548626SKalle Valo 			ath6kl_dbg(ATH6KL_DBG_BOOT, "found patch image ie (%zd B)\n",
8946bc36431SKalle Valo 				ie_len);
8956bc36431SKalle Valo 
89650d41234SKalle Valo 			ar->fw_patch = kmemdup(data, ie_len, GFP_KERNEL);
89750d41234SKalle Valo 
89850d41234SKalle Valo 			if (ar->fw_patch == NULL) {
89950d41234SKalle Valo 				ret = -ENOMEM;
90050d41234SKalle Valo 				goto out;
90150d41234SKalle Valo 			}
90250d41234SKalle Valo 
90350d41234SKalle Valo 			ar->fw_patch_len = ie_len;
90450d41234SKalle Valo 			break;
9058a137480SKalle Valo 		case ATH6KL_FW_IE_RESERVED_RAM_SIZE:
9068a137480SKalle Valo 			val = (__le32 *) data;
9078a137480SKalle Valo 			ar->hw.reserved_ram_size = le32_to_cpup(val);
9086bc36431SKalle Valo 
9096bc36431SKalle Valo 			ath6kl_dbg(ATH6KL_DBG_BOOT,
9106bc36431SKalle Valo 				   "found reserved ram size ie 0x%d\n",
9116bc36431SKalle Valo 				   ar->hw.reserved_ram_size);
9128a137480SKalle Valo 			break;
91397e0496dSKalle Valo 		case ATH6KL_FW_IE_CAPABILITIES:
9146bc36431SKalle Valo 			ath6kl_dbg(ATH6KL_DBG_BOOT,
915ef548626SKalle Valo 				   "found firmware capabilities ie (%zd B)\n",
9166bc36431SKalle Valo 				   ie_len);
9176bc36431SKalle Valo 
91897e0496dSKalle Valo 			for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) {
91997e0496dSKalle Valo 				index = ALIGN(i, 8) / 8;
92097e0496dSKalle Valo 				bit = i % 8;
92197e0496dSKalle Valo 
92297e0496dSKalle Valo 				if (data[index] & (1 << bit))
92397e0496dSKalle Valo 					__set_bit(i, ar->fw_capabilities);
92497e0496dSKalle Valo 			}
9256bc36431SKalle Valo 
9266bc36431SKalle Valo 			ath6kl_dbg_dump(ATH6KL_DBG_BOOT, "capabilities", "",
9276bc36431SKalle Valo 					ar->fw_capabilities,
9286bc36431SKalle Valo 					sizeof(ar->fw_capabilities));
92997e0496dSKalle Valo 			break;
9301b4304daSKalle Valo 		case ATH6KL_FW_IE_PATCH_ADDR:
9311b4304daSKalle Valo 			if (ie_len != sizeof(*val))
9321b4304daSKalle Valo 				break;
9331b4304daSKalle Valo 
9341b4304daSKalle Valo 			val = (__le32 *) data;
9351b4304daSKalle Valo 			ar->hw.dataset_patch_addr = le32_to_cpup(val);
9366bc36431SKalle Valo 
9376bc36431SKalle Valo 			ath6kl_dbg(ATH6KL_DBG_BOOT,
9386bc36431SKalle Valo 				   "found patch address ie 0x%d\n",
9396bc36431SKalle Valo 				   ar->hw.dataset_patch_addr);
9401b4304daSKalle Valo 			break;
94150d41234SKalle Valo 		default:
9426bc36431SKalle Valo 			ath6kl_dbg(ATH6KL_DBG_BOOT, "Unknown fw ie: %u\n",
94350d41234SKalle Valo 				   le32_to_cpup(&hdr->id));
94450d41234SKalle Valo 			break;
94550d41234SKalle Valo 		}
94650d41234SKalle Valo 
94750d41234SKalle Valo 		len -= ie_len;
94850d41234SKalle Valo 		data += ie_len;
94950d41234SKalle Valo 	};
95050d41234SKalle Valo 
95150d41234SKalle Valo 	ret = 0;
95250d41234SKalle Valo out:
95350d41234SKalle Valo 	release_firmware(fw);
95450d41234SKalle Valo 
95550d41234SKalle Valo 	return ret;
95650d41234SKalle Valo }
95750d41234SKalle Valo 
95850d41234SKalle Valo static int ath6kl_fetch_firmwares(struct ath6kl *ar)
95950d41234SKalle Valo {
96050d41234SKalle Valo 	int ret;
96150d41234SKalle Valo 
96250d41234SKalle Valo 	ret = ath6kl_fetch_board_file(ar);
96350d41234SKalle Valo 	if (ret)
96450d41234SKalle Valo 		return ret;
96550d41234SKalle Valo 
96650d41234SKalle Valo 	ret = ath6kl_fetch_fw_api2(ar);
9676bc36431SKalle Valo 	if (ret == 0) {
9686bc36431SKalle Valo 		ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api 2\n");
96950d41234SKalle Valo 		return 0;
9706bc36431SKalle Valo 	}
97150d41234SKalle Valo 
97250d41234SKalle Valo 	ret = ath6kl_fetch_fw_api1(ar);
97350d41234SKalle Valo 	if (ret)
97450d41234SKalle Valo 		return ret;
97550d41234SKalle Valo 
9766bc36431SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api 1\n");
9776bc36431SKalle Valo 
97850d41234SKalle Valo 	return 0;
97950d41234SKalle Valo }
98050d41234SKalle Valo 
981bdcd8170SKalle Valo static int ath6kl_upload_board_file(struct ath6kl *ar)
982bdcd8170SKalle Valo {
983bdcd8170SKalle Valo 	u32 board_address, board_ext_address, param;
98431024d99SKevin Fang 	u32 board_data_size, board_ext_data_size;
985bdcd8170SKalle Valo 	int ret;
986bdcd8170SKalle Valo 
987772c31eeSKalle Valo 	if (WARN_ON(ar->fw_board == NULL))
988772c31eeSKalle Valo 		return -ENOENT;
989bdcd8170SKalle Valo 
99031024d99SKevin Fang 	/*
99131024d99SKevin Fang 	 * Determine where in Target RAM to write Board Data.
99231024d99SKevin Fang 	 * For AR6004, host determine Target RAM address for
99331024d99SKevin Fang 	 * writing board data.
99431024d99SKevin Fang 	 */
99531024d99SKevin Fang 	if (ar->target_type == TARGET_TYPE_AR6004) {
99631024d99SKevin Fang 		board_address = AR6004_REV1_BOARD_DATA_ADDRESS;
99731024d99SKevin Fang 		ath6kl_bmi_write(ar,
99831024d99SKevin Fang 				ath6kl_get_hi_item_addr(ar,
99931024d99SKevin Fang 				HI_ITEM(hi_board_data)),
100031024d99SKevin Fang 				(u8 *) &board_address, 4);
100131024d99SKevin Fang 	} else {
1002bdcd8170SKalle Valo 		ath6kl_bmi_read(ar,
1003bdcd8170SKalle Valo 				ath6kl_get_hi_item_addr(ar,
1004bdcd8170SKalle Valo 				HI_ITEM(hi_board_data)),
1005bdcd8170SKalle Valo 				(u8 *) &board_address, 4);
100631024d99SKevin Fang 	}
100731024d99SKevin Fang 
1008bdcd8170SKalle Valo 	/* determine where in target ram to write extended board data */
1009bdcd8170SKalle Valo 	ath6kl_bmi_read(ar,
1010bdcd8170SKalle Valo 			ath6kl_get_hi_item_addr(ar,
1011bdcd8170SKalle Valo 			HI_ITEM(hi_board_ext_data)),
1012bdcd8170SKalle Valo 			(u8 *) &board_ext_address, 4);
1013bdcd8170SKalle Valo 
1014bdcd8170SKalle Valo 	if (board_ext_address == 0) {
1015bdcd8170SKalle Valo 		ath6kl_err("Failed to get board file target address.\n");
1016bdcd8170SKalle Valo 		return -EINVAL;
1017bdcd8170SKalle Valo 	}
1018bdcd8170SKalle Valo 
101931024d99SKevin Fang 	switch (ar->target_type) {
102031024d99SKevin Fang 	case TARGET_TYPE_AR6003:
102131024d99SKevin Fang 		board_data_size = AR6003_BOARD_DATA_SZ;
102231024d99SKevin Fang 		board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ;
102331024d99SKevin Fang 		break;
102431024d99SKevin Fang 	case TARGET_TYPE_AR6004:
102531024d99SKevin Fang 		board_data_size = AR6004_BOARD_DATA_SZ;
102631024d99SKevin Fang 		board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ;
102731024d99SKevin Fang 		break;
102831024d99SKevin Fang 	default:
102931024d99SKevin Fang 		WARN_ON(1);
103031024d99SKevin Fang 		return -EINVAL;
103131024d99SKevin Fang 		break;
103231024d99SKevin Fang 	}
103331024d99SKevin Fang 
103431024d99SKevin Fang 	if (ar->fw_board_len == (board_data_size +
103531024d99SKevin Fang 				 board_ext_data_size)) {
103631024d99SKevin Fang 
1037bdcd8170SKalle Valo 		/* write extended board data */
10386bc36431SKalle Valo 		ath6kl_dbg(ATH6KL_DBG_BOOT,
10396bc36431SKalle Valo 			   "writing extended board data to 0x%x (%d B)\n",
10406bc36431SKalle Valo 			   board_ext_address, board_ext_data_size);
10416bc36431SKalle Valo 
1042bdcd8170SKalle Valo 		ret = ath6kl_bmi_write(ar, board_ext_address,
104331024d99SKevin Fang 				       ar->fw_board + board_data_size,
104431024d99SKevin Fang 				       board_ext_data_size);
1045bdcd8170SKalle Valo 		if (ret) {
1046bdcd8170SKalle Valo 			ath6kl_err("Failed to write extended board data: %d\n",
1047bdcd8170SKalle Valo 				   ret);
1048bdcd8170SKalle Valo 			return ret;
1049bdcd8170SKalle Valo 		}
1050bdcd8170SKalle Valo 
1051bdcd8170SKalle Valo 		/* record that extended board data is initialized */
105231024d99SKevin Fang 		param = (board_ext_data_size << 16) | 1;
105331024d99SKevin Fang 
1054bdcd8170SKalle Valo 		ath6kl_bmi_write(ar,
1055bdcd8170SKalle Valo 				 ath6kl_get_hi_item_addr(ar,
1056bdcd8170SKalle Valo 				 HI_ITEM(hi_board_ext_data_config)),
1057bdcd8170SKalle Valo 				 (unsigned char *) &param, 4);
1058bdcd8170SKalle Valo 	}
1059bdcd8170SKalle Valo 
106031024d99SKevin Fang 	if (ar->fw_board_len < board_data_size) {
1061bdcd8170SKalle Valo 		ath6kl_err("Too small board file: %zu\n", ar->fw_board_len);
1062bdcd8170SKalle Valo 		ret = -EINVAL;
1063bdcd8170SKalle Valo 		return ret;
1064bdcd8170SKalle Valo 	}
1065bdcd8170SKalle Valo 
10666bc36431SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_BOOT, "writing board file to 0x%x (%d B)\n",
10676bc36431SKalle Valo 		   board_address, board_data_size);
10686bc36431SKalle Valo 
1069bdcd8170SKalle Valo 	ret = ath6kl_bmi_write(ar, board_address, ar->fw_board,
107031024d99SKevin Fang 			       board_data_size);
1071bdcd8170SKalle Valo 
1072bdcd8170SKalle Valo 	if (ret) {
1073bdcd8170SKalle Valo 		ath6kl_err("Board file bmi write failed: %d\n", ret);
1074bdcd8170SKalle Valo 		return ret;
1075bdcd8170SKalle Valo 	}
1076bdcd8170SKalle Valo 
1077bdcd8170SKalle Valo 	/* record the fact that Board Data IS initialized */
1078bdcd8170SKalle Valo 	param = 1;
1079bdcd8170SKalle Valo 	ath6kl_bmi_write(ar,
1080bdcd8170SKalle Valo 			 ath6kl_get_hi_item_addr(ar,
1081bdcd8170SKalle Valo 			 HI_ITEM(hi_board_data_initialized)),
1082bdcd8170SKalle Valo 			 (u8 *)&param, 4);
1083bdcd8170SKalle Valo 
1084bdcd8170SKalle Valo 	return ret;
1085bdcd8170SKalle Valo }
1086bdcd8170SKalle Valo 
1087bdcd8170SKalle Valo static int ath6kl_upload_otp(struct ath6kl *ar)
1088bdcd8170SKalle Valo {
1089bdcd8170SKalle Valo 	u32 address, param;
1090bef26a7fSKalle Valo 	bool from_hw = false;
1091bdcd8170SKalle Valo 	int ret;
1092bdcd8170SKalle Valo 
1093772c31eeSKalle Valo 	if (WARN_ON(ar->fw_otp == NULL))
1094772c31eeSKalle Valo 		return -ENOENT;
1095bdcd8170SKalle Valo 
1096a01ac414SKalle Valo 	address = ar->hw.app_load_addr;
1097bdcd8170SKalle Valo 
1098ef548626SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_BOOT, "writing otp to 0x%x (%zd B)\n", address,
10996bc36431SKalle Valo 		   ar->fw_otp_len);
11006bc36431SKalle Valo 
1101bdcd8170SKalle Valo 	ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp,
1102bdcd8170SKalle Valo 				       ar->fw_otp_len);
1103bdcd8170SKalle Valo 	if (ret) {
1104bdcd8170SKalle Valo 		ath6kl_err("Failed to upload OTP file: %d\n", ret);
1105bdcd8170SKalle Valo 		return ret;
1106bdcd8170SKalle Valo 	}
1107bdcd8170SKalle Valo 
1108639d0b89SKalle Valo 	/* read firmware start address */
1109639d0b89SKalle Valo 	ret = ath6kl_bmi_read(ar,
1110639d0b89SKalle Valo 			      ath6kl_get_hi_item_addr(ar,
1111639d0b89SKalle Valo 						      HI_ITEM(hi_app_start)),
1112639d0b89SKalle Valo 			      (u8 *) &address, sizeof(address));
1113639d0b89SKalle Valo 
1114639d0b89SKalle Valo 	if (ret) {
1115639d0b89SKalle Valo 		ath6kl_err("Failed to read hi_app_start: %d\n", ret);
1116639d0b89SKalle Valo 		return ret;
1117639d0b89SKalle Valo 	}
1118639d0b89SKalle Valo 
1119bef26a7fSKalle Valo 	if (ar->hw.app_start_override_addr == 0) {
1120639d0b89SKalle Valo 		ar->hw.app_start_override_addr = address;
1121bef26a7fSKalle Valo 		from_hw = true;
1122bef26a7fSKalle Valo 	}
1123639d0b89SKalle Valo 
1124bef26a7fSKalle Valo 	ath6kl_dbg(ATH6KL_DBG_BOOT, "app_start_override_addr%s 0x%x\n",
1125bef26a7fSKalle Valo 		   from_hw ? " (from hw)" : "",
11266bc36431SKalle Valo 		   ar->hw.app_start_override_addr);
11276bc36431SKalle Valo 
1128bdcd8170SKalle Valo 	/* execute the OTP code */
1129bef26a7fSKalle Valo 	ath6kl_dbg(ATH6KL_DBG_BOOT, "executing OTP at 0x%x\n",
1130bef26a7fSKalle Valo 		   ar->hw.app_start_override_addr);
1131bdcd8170SKalle Valo 	param = 0;
1132bef26a7fSKalle Valo 	ath6kl_bmi_execute(ar, ar->hw.app_start_override_addr, &param);
1133bdcd8170SKalle Valo 
1134bdcd8170SKalle Valo 	return ret;
1135bdcd8170SKalle Valo }
1136bdcd8170SKalle Valo 
1137bdcd8170SKalle Valo static int ath6kl_upload_firmware(struct ath6kl *ar)
1138bdcd8170SKalle Valo {
1139bdcd8170SKalle Valo 	u32 address;
1140bdcd8170SKalle Valo 	int ret;
1141bdcd8170SKalle Valo 
1142772c31eeSKalle Valo 	if (WARN_ON(ar->fw == NULL))
1143772c31eeSKalle Valo 		return -ENOENT;
1144bdcd8170SKalle Valo 
1145a01ac414SKalle Valo 	address = ar->hw.app_load_addr;
1146bdcd8170SKalle Valo 
1147ef548626SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_BOOT, "writing firmware to 0x%x (%zd B)\n",
11486bc36431SKalle Valo 		   address, ar->fw_len);
11496bc36431SKalle Valo 
1150bdcd8170SKalle Valo 	ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len);
1151bdcd8170SKalle Valo 
1152bdcd8170SKalle Valo 	if (ret) {
1153bdcd8170SKalle Valo 		ath6kl_err("Failed to write firmware: %d\n", ret);
1154bdcd8170SKalle Valo 		return ret;
1155bdcd8170SKalle Valo 	}
1156bdcd8170SKalle Valo 
115731024d99SKevin Fang 	/*
115831024d99SKevin Fang 	 * Set starting address for firmware
115931024d99SKevin Fang 	 * Don't need to setup app_start override addr on AR6004
116031024d99SKevin Fang 	 */
116131024d99SKevin Fang 	if (ar->target_type != TARGET_TYPE_AR6004) {
1162a01ac414SKalle Valo 		address = ar->hw.app_start_override_addr;
1163bdcd8170SKalle Valo 		ath6kl_bmi_set_app_start(ar, address);
116431024d99SKevin Fang 	}
1165bdcd8170SKalle Valo 	return ret;
1166bdcd8170SKalle Valo }
1167bdcd8170SKalle Valo 
1168bdcd8170SKalle Valo static int ath6kl_upload_patch(struct ath6kl *ar)
1169bdcd8170SKalle Valo {
1170bdcd8170SKalle Valo 	u32 address, param;
1171bdcd8170SKalle Valo 	int ret;
1172bdcd8170SKalle Valo 
1173772c31eeSKalle Valo 	if (WARN_ON(ar->fw_patch == NULL))
1174772c31eeSKalle Valo 		return -ENOENT;
1175bdcd8170SKalle Valo 
1176a01ac414SKalle Valo 	address = ar->hw.dataset_patch_addr;
1177bdcd8170SKalle Valo 
1178ef548626SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_BOOT, "writing patch to 0x%x (%zd B)\n",
11796bc36431SKalle Valo 		   address, ar->fw_patch_len);
11806bc36431SKalle Valo 
1181bdcd8170SKalle Valo 	ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len);
1182bdcd8170SKalle Valo 	if (ret) {
1183bdcd8170SKalle Valo 		ath6kl_err("Failed to write patch file: %d\n", ret);
1184bdcd8170SKalle Valo 		return ret;
1185bdcd8170SKalle Valo 	}
1186bdcd8170SKalle Valo 
1187bdcd8170SKalle Valo 	param = address;
1188bdcd8170SKalle Valo 	ath6kl_bmi_write(ar,
1189bdcd8170SKalle Valo 			 ath6kl_get_hi_item_addr(ar,
1190bdcd8170SKalle Valo 			 HI_ITEM(hi_dset_list_head)),
1191bdcd8170SKalle Valo 			 (unsigned char *) &param, 4);
1192bdcd8170SKalle Valo 
1193bdcd8170SKalle Valo 	return 0;
1194bdcd8170SKalle Valo }
1195bdcd8170SKalle Valo 
1196bdcd8170SKalle Valo static int ath6kl_init_upload(struct ath6kl *ar)
1197bdcd8170SKalle Valo {
1198bdcd8170SKalle Valo 	u32 param, options, sleep, address;
1199bdcd8170SKalle Valo 	int status = 0;
1200bdcd8170SKalle Valo 
120131024d99SKevin Fang 	if (ar->target_type != TARGET_TYPE_AR6003 &&
120231024d99SKevin Fang 		ar->target_type != TARGET_TYPE_AR6004)
1203bdcd8170SKalle Valo 		return -EINVAL;
1204bdcd8170SKalle Valo 
1205bdcd8170SKalle Valo 	/* temporarily disable system sleep */
1206bdcd8170SKalle Valo 	address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
1207bdcd8170SKalle Valo 	status = ath6kl_bmi_reg_read(ar, address, &param);
1208bdcd8170SKalle Valo 	if (status)
1209bdcd8170SKalle Valo 		return status;
1210bdcd8170SKalle Valo 
1211bdcd8170SKalle Valo 	options = param;
1212bdcd8170SKalle Valo 
1213bdcd8170SKalle Valo 	param |= ATH6KL_OPTION_SLEEP_DISABLE;
1214bdcd8170SKalle Valo 	status = ath6kl_bmi_reg_write(ar, address, param);
1215bdcd8170SKalle Valo 	if (status)
1216bdcd8170SKalle Valo 		return status;
1217bdcd8170SKalle Valo 
1218bdcd8170SKalle Valo 	address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
1219bdcd8170SKalle Valo 	status = ath6kl_bmi_reg_read(ar, address, &param);
1220bdcd8170SKalle Valo 	if (status)
1221bdcd8170SKalle Valo 		return status;
1222bdcd8170SKalle Valo 
1223bdcd8170SKalle Valo 	sleep = param;
1224bdcd8170SKalle Valo 
1225bdcd8170SKalle Valo 	param |= SM(SYSTEM_SLEEP_DISABLE, 1);
1226bdcd8170SKalle Valo 	status = ath6kl_bmi_reg_write(ar, address, param);
1227bdcd8170SKalle Valo 	if (status)
1228bdcd8170SKalle Valo 		return status;
1229bdcd8170SKalle Valo 
1230bdcd8170SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n",
1231bdcd8170SKalle Valo 		   options, sleep);
1232bdcd8170SKalle Valo 
1233bdcd8170SKalle Valo 	/* program analog PLL register */
123431024d99SKevin Fang 	/* no need to control 40/44MHz clock on AR6004 */
123531024d99SKevin Fang 	if (ar->target_type != TARGET_TYPE_AR6004) {
1236bdcd8170SKalle Valo 		status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER,
1237bdcd8170SKalle Valo 					      0xF9104001);
123831024d99SKevin Fang 
1239bdcd8170SKalle Valo 		if (status)
1240bdcd8170SKalle Valo 			return status;
1241bdcd8170SKalle Valo 
1242bdcd8170SKalle Valo 		/* Run at 80/88MHz by default */
1243bdcd8170SKalle Valo 		param = SM(CPU_CLOCK_STANDARD, 1);
1244bdcd8170SKalle Valo 
1245bdcd8170SKalle Valo 		address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS;
1246bdcd8170SKalle Valo 		status = ath6kl_bmi_reg_write(ar, address, param);
1247bdcd8170SKalle Valo 		if (status)
1248bdcd8170SKalle Valo 			return status;
124931024d99SKevin Fang 	}
1250bdcd8170SKalle Valo 
1251bdcd8170SKalle Valo 	param = 0;
1252bdcd8170SKalle Valo 	address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS;
1253bdcd8170SKalle Valo 	param = SM(LPO_CAL_ENABLE, 1);
1254bdcd8170SKalle Valo 	status = ath6kl_bmi_reg_write(ar, address, param);
1255bdcd8170SKalle Valo 	if (status)
1256bdcd8170SKalle Valo 		return status;
1257bdcd8170SKalle Valo 
1258bdcd8170SKalle Valo 	/* WAR to avoid SDIO CRC err */
1259bdcd8170SKalle Valo 	if (ar->version.target_ver == AR6003_REV2_VERSION) {
1260bdcd8170SKalle Valo 		ath6kl_err("temporary war to avoid sdio crc error\n");
1261bdcd8170SKalle Valo 
1262bdcd8170SKalle Valo 		param = 0x20;
1263bdcd8170SKalle Valo 
1264bdcd8170SKalle Valo 		address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS;
1265bdcd8170SKalle Valo 		status = ath6kl_bmi_reg_write(ar, address, param);
1266bdcd8170SKalle Valo 		if (status)
1267bdcd8170SKalle Valo 			return status;
1268bdcd8170SKalle Valo 
1269bdcd8170SKalle Valo 		address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS;
1270bdcd8170SKalle Valo 		status = ath6kl_bmi_reg_write(ar, address, param);
1271bdcd8170SKalle Valo 		if (status)
1272bdcd8170SKalle Valo 			return status;
1273bdcd8170SKalle Valo 
1274bdcd8170SKalle Valo 		address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS;
1275bdcd8170SKalle Valo 		status = ath6kl_bmi_reg_write(ar, address, param);
1276bdcd8170SKalle Valo 		if (status)
1277bdcd8170SKalle Valo 			return status;
1278bdcd8170SKalle Valo 
1279bdcd8170SKalle Valo 		address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS;
1280bdcd8170SKalle Valo 		status = ath6kl_bmi_reg_write(ar, address, param);
1281bdcd8170SKalle Valo 		if (status)
1282bdcd8170SKalle Valo 			return status;
1283bdcd8170SKalle Valo 	}
1284bdcd8170SKalle Valo 
1285bdcd8170SKalle Valo 	/* write EEPROM data to Target RAM */
1286bdcd8170SKalle Valo 	status = ath6kl_upload_board_file(ar);
1287bdcd8170SKalle Valo 	if (status)
1288bdcd8170SKalle Valo 		return status;
1289bdcd8170SKalle Valo 
1290bdcd8170SKalle Valo 	/* transfer One time Programmable data */
1291bdcd8170SKalle Valo 	status = ath6kl_upload_otp(ar);
1292bdcd8170SKalle Valo 	if (status)
1293bdcd8170SKalle Valo 		return status;
1294bdcd8170SKalle Valo 
1295bdcd8170SKalle Valo 	/* Download Target firmware */
1296bdcd8170SKalle Valo 	status = ath6kl_upload_firmware(ar);
1297bdcd8170SKalle Valo 	if (status)
1298bdcd8170SKalle Valo 		return status;
1299bdcd8170SKalle Valo 
1300bdcd8170SKalle Valo 	status = ath6kl_upload_patch(ar);
1301bdcd8170SKalle Valo 	if (status)
1302bdcd8170SKalle Valo 		return status;
1303bdcd8170SKalle Valo 
1304bdcd8170SKalle Valo 	/* Restore system sleep */
1305bdcd8170SKalle Valo 	address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
1306bdcd8170SKalle Valo 	status = ath6kl_bmi_reg_write(ar, address, sleep);
1307bdcd8170SKalle Valo 	if (status)
1308bdcd8170SKalle Valo 		return status;
1309bdcd8170SKalle Valo 
1310bdcd8170SKalle Valo 	address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
1311bdcd8170SKalle Valo 	param = options | 0x20;
1312bdcd8170SKalle Valo 	status = ath6kl_bmi_reg_write(ar, address, param);
1313bdcd8170SKalle Valo 	if (status)
1314bdcd8170SKalle Valo 		return status;
1315bdcd8170SKalle Valo 
1316bdcd8170SKalle Valo 	/* Configure GPIO AR6003 UART */
1317bdcd8170SKalle Valo 	param = CONFIG_AR600x_DEBUG_UART_TX_PIN;
1318bdcd8170SKalle Valo 	status = ath6kl_bmi_write(ar,
1319bdcd8170SKalle Valo 				  ath6kl_get_hi_item_addr(ar,
1320bdcd8170SKalle Valo 				  HI_ITEM(hi_dbg_uart_txpin)),
1321bdcd8170SKalle Valo 				  (u8 *)&param, 4);
1322bdcd8170SKalle Valo 
1323bdcd8170SKalle Valo 	return status;
1324bdcd8170SKalle Valo }
1325bdcd8170SKalle Valo 
1326a01ac414SKalle Valo static int ath6kl_init_hw_params(struct ath6kl *ar)
1327a01ac414SKalle Valo {
1328a01ac414SKalle Valo 	switch (ar->version.target_ver) {
1329a01ac414SKalle Valo 	case AR6003_REV2_VERSION:
1330a01ac414SKalle Valo 		ar->hw.dataset_patch_addr = AR6003_REV2_DATASET_PATCH_ADDRESS;
1331a01ac414SKalle Valo 		ar->hw.app_load_addr = AR6003_REV2_APP_LOAD_ADDRESS;
1332991b27eaSKalle Valo 		ar->hw.board_ext_data_addr = AR6003_REV2_BOARD_EXT_DATA_ADDRESS;
1333991b27eaSKalle Valo 		ar->hw.reserved_ram_size = AR6003_REV2_RAM_RESERVE_SIZE;
1334bef26a7fSKalle Valo 
1335bef26a7fSKalle Valo 		/* hw2.0 needs override address hardcoded */
1336bef26a7fSKalle Valo 		ar->hw.app_start_override_addr = 0x944C00;
1337bef26a7fSKalle Valo 
1338a01ac414SKalle Valo 		break;
1339a01ac414SKalle Valo 	case AR6003_REV3_VERSION:
1340a01ac414SKalle Valo 		ar->hw.dataset_patch_addr = AR6003_REV3_DATASET_PATCH_ADDRESS;
1341a01ac414SKalle Valo 		ar->hw.app_load_addr = 0x1234;
1342991b27eaSKalle Valo 		ar->hw.board_ext_data_addr = AR6003_REV3_BOARD_EXT_DATA_ADDRESS;
1343991b27eaSKalle Valo 		ar->hw.reserved_ram_size = AR6003_REV3_RAM_RESERVE_SIZE;
1344a01ac414SKalle Valo 		break;
1345a01ac414SKalle Valo 	case AR6004_REV1_VERSION:
1346a01ac414SKalle Valo 		ar->hw.dataset_patch_addr = AR6003_REV2_DATASET_PATCH_ADDRESS;
1347a01ac414SKalle Valo 		ar->hw.app_load_addr = AR6003_REV3_APP_LOAD_ADDRESS;
1348991b27eaSKalle Valo 		ar->hw.board_ext_data_addr = AR6004_REV1_BOARD_EXT_DATA_ADDRESS;
1349991b27eaSKalle Valo 		ar->hw.reserved_ram_size = AR6004_REV1_RAM_RESERVE_SIZE;
1350a01ac414SKalle Valo 		break;
1351a01ac414SKalle Valo 	default:
1352a01ac414SKalle Valo 		ath6kl_err("Unsupported hardware version: 0x%x\n",
1353a01ac414SKalle Valo 			   ar->version.target_ver);
1354a01ac414SKalle Valo 		return -EINVAL;
1355a01ac414SKalle Valo 	}
1356a01ac414SKalle Valo 
13576bc36431SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_BOOT,
13586bc36431SKalle Valo 		   "target_ver 0x%x target_type 0x%x dataset_patch 0x%x app_load_addr 0x%x\n",
13596bc36431SKalle Valo 		   ar->version.target_ver, ar->target_type,
13606bc36431SKalle Valo 		   ar->hw.dataset_patch_addr, ar->hw.app_load_addr);
13616bc36431SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_BOOT,
13626bc36431SKalle Valo 		   "app_start_override_addr 0x%x board_ext_data_addr 0x%x reserved_ram_size 0x%x",
13636bc36431SKalle Valo 		   ar->hw.app_start_override_addr, ar->hw.board_ext_data_addr,
13646bc36431SKalle Valo 		   ar->hw.reserved_ram_size);
13656bc36431SKalle Valo 
1366a01ac414SKalle Valo 	return 0;
1367a01ac414SKalle Valo }
1368a01ac414SKalle Valo 
13695fe4dffbSKalle Valo int ath6kl_init_hw_start(struct ath6kl *ar)
137020459ee2SKalle Valo {
137120459ee2SKalle Valo 	long timeleft;
137220459ee2SKalle Valo 	int ret, i;
137320459ee2SKalle Valo 
13745fe4dffbSKalle Valo 	ath6kl_dbg(ATH6KL_DBG_BOOT, "hw start\n");
13755fe4dffbSKalle Valo 
137620459ee2SKalle Valo 	ret = ath6kl_hif_power_on(ar);
137720459ee2SKalle Valo 	if (ret)
137820459ee2SKalle Valo 		return ret;
137920459ee2SKalle Valo 
138020459ee2SKalle Valo 	ret = ath6kl_configure_target(ar);
138120459ee2SKalle Valo 	if (ret)
138220459ee2SKalle Valo 		goto err_power_off;
138320459ee2SKalle Valo 
138420459ee2SKalle Valo 	ret = ath6kl_init_upload(ar);
138520459ee2SKalle Valo 	if (ret)
138620459ee2SKalle Valo 		goto err_power_off;
138720459ee2SKalle Valo 
138820459ee2SKalle Valo 	/* Do we need to finish the BMI phase */
138920459ee2SKalle Valo 	/* FIXME: return error from ath6kl_bmi_done() */
139020459ee2SKalle Valo 	if (ath6kl_bmi_done(ar)) {
139120459ee2SKalle Valo 		ret = -EIO;
139220459ee2SKalle Valo 		goto err_power_off;
139320459ee2SKalle Valo 	}
139420459ee2SKalle Valo 
139520459ee2SKalle Valo 	/*
139620459ee2SKalle Valo 	 * The reason we have to wait for the target here is that the
139720459ee2SKalle Valo 	 * driver layer has to init BMI in order to set the host block
139820459ee2SKalle Valo 	 * size.
139920459ee2SKalle Valo 	 */
140020459ee2SKalle Valo 	if (ath6kl_htc_wait_target(ar->htc_target)) {
140120459ee2SKalle Valo 		ret = -EIO;
140220459ee2SKalle Valo 		goto err_power_off;
140320459ee2SKalle Valo 	}
140420459ee2SKalle Valo 
140520459ee2SKalle Valo 	if (ath6kl_init_service_ep(ar)) {
140620459ee2SKalle Valo 		ret = -EIO;
140720459ee2SKalle Valo 		goto err_cleanup_scatter;
140820459ee2SKalle Valo 	}
140920459ee2SKalle Valo 
141020459ee2SKalle Valo 	/* setup credit distribution */
141120459ee2SKalle Valo 	ath6kl_credit_setup(ar->htc_target, &ar->credit_state_info);
141220459ee2SKalle Valo 
141320459ee2SKalle Valo 	/* start HTC */
141420459ee2SKalle Valo 	ret = ath6kl_htc_start(ar->htc_target);
141520459ee2SKalle Valo 	if (ret) {
141620459ee2SKalle Valo 		/* FIXME: call this */
141720459ee2SKalle Valo 		ath6kl_cookie_cleanup(ar);
141820459ee2SKalle Valo 		goto err_cleanup_scatter;
141920459ee2SKalle Valo 	}
142020459ee2SKalle Valo 
142120459ee2SKalle Valo 	/* Wait for Wmi event to be ready */
142220459ee2SKalle Valo 	timeleft = wait_event_interruptible_timeout(ar->event_wq,
142320459ee2SKalle Valo 						    test_bit(WMI_READY,
142420459ee2SKalle Valo 							     &ar->flag),
142520459ee2SKalle Valo 						    WMI_TIMEOUT);
142620459ee2SKalle Valo 
142720459ee2SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_BOOT, "firmware booted\n");
142820459ee2SKalle Valo 
142920459ee2SKalle Valo 	if (ar->version.abi_ver != ATH6KL_ABI_VERSION) {
143020459ee2SKalle Valo 		ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n",
143120459ee2SKalle Valo 			   ATH6KL_ABI_VERSION, ar->version.abi_ver);
143220459ee2SKalle Valo 		ret = -EIO;
143320459ee2SKalle Valo 		goto err_htc_stop;
143420459ee2SKalle Valo 	}
143520459ee2SKalle Valo 
143620459ee2SKalle Valo 	if (!timeleft || signal_pending(current)) {
143720459ee2SKalle Valo 		ath6kl_err("wmi is not ready or wait was interrupted\n");
143820459ee2SKalle Valo 		ret = -EIO;
143920459ee2SKalle Valo 		goto err_htc_stop;
144020459ee2SKalle Valo 	}
144120459ee2SKalle Valo 
144220459ee2SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__);
144320459ee2SKalle Valo 
144420459ee2SKalle Valo 	/* communicate the wmi protocol verision to the target */
144520459ee2SKalle Valo 	/* FIXME: return error */
144620459ee2SKalle Valo 	if ((ath6kl_set_host_app_area(ar)) != 0)
144720459ee2SKalle Valo 		ath6kl_err("unable to set the host app area\n");
144820459ee2SKalle Valo 
144920459ee2SKalle Valo 	for (i = 0; i < MAX_NUM_VIF; i++) {
145020459ee2SKalle Valo 		ret = ath6kl_target_config_wlan_params(ar, i);
145120459ee2SKalle Valo 		if (ret)
145220459ee2SKalle Valo 			goto err_htc_stop;
145320459ee2SKalle Valo 	}
145420459ee2SKalle Valo 
1455*76a9fbe2SKalle Valo 	ar->state = ATH6KL_STATE_ON;
1456*76a9fbe2SKalle Valo 
145720459ee2SKalle Valo 	return 0;
145820459ee2SKalle Valo 
145920459ee2SKalle Valo err_htc_stop:
146020459ee2SKalle Valo 	ath6kl_htc_stop(ar->htc_target);
146120459ee2SKalle Valo err_cleanup_scatter:
146220459ee2SKalle Valo 	ath6kl_hif_cleanup_scatter(ar);
146320459ee2SKalle Valo err_power_off:
146420459ee2SKalle Valo 	ath6kl_hif_power_off(ar);
146520459ee2SKalle Valo 
146620459ee2SKalle Valo 	return ret;
146720459ee2SKalle Valo }
146820459ee2SKalle Valo 
14695fe4dffbSKalle Valo int ath6kl_init_hw_stop(struct ath6kl *ar)
14705fe4dffbSKalle Valo {
14715fe4dffbSKalle Valo 	int ret;
14725fe4dffbSKalle Valo 
14735fe4dffbSKalle Valo 	ath6kl_dbg(ATH6KL_DBG_BOOT, "hw stop\n");
14745fe4dffbSKalle Valo 
14755fe4dffbSKalle Valo 	ath6kl_htc_stop(ar->htc_target);
14765fe4dffbSKalle Valo 
14775fe4dffbSKalle Valo 	ath6kl_hif_stop(ar);
14785fe4dffbSKalle Valo 
14795fe4dffbSKalle Valo 	ath6kl_bmi_reset(ar);
14805fe4dffbSKalle Valo 
14815fe4dffbSKalle Valo 	ret = ath6kl_hif_power_off(ar);
14825fe4dffbSKalle Valo 	if (ret)
14835fe4dffbSKalle Valo 		ath6kl_warn("failed to power off hif: %d\n", ret);
14845fe4dffbSKalle Valo 
1485*76a9fbe2SKalle Valo 	ar->state = ATH6KL_STATE_OFF;
1486*76a9fbe2SKalle Valo 
14875fe4dffbSKalle Valo 	return 0;
14885fe4dffbSKalle Valo }
14895fe4dffbSKalle Valo 
1490bdcd8170SKalle Valo int ath6kl_core_init(struct ath6kl *ar)
1491bdcd8170SKalle Valo {
1492bdcd8170SKalle Valo 	struct ath6kl_bmi_target_info targ_info;
149361448a93SKalle Valo 	struct net_device *ndev;
149420459ee2SKalle Valo 	int ret = 0, i;
1495bdcd8170SKalle Valo 
1496bdcd8170SKalle Valo 	ar->ath6kl_wq = create_singlethread_workqueue("ath6kl");
1497bdcd8170SKalle Valo 	if (!ar->ath6kl_wq)
1498bdcd8170SKalle Valo 		return -ENOMEM;
1499bdcd8170SKalle Valo 
1500bdcd8170SKalle Valo 	ret = ath6kl_bmi_init(ar);
1501bdcd8170SKalle Valo 	if (ret)
1502bdcd8170SKalle Valo 		goto err_wq;
1503bdcd8170SKalle Valo 
150420459ee2SKalle Valo 	/*
150520459ee2SKalle Valo 	 * Turn on power to get hardware (target) version and leave power
150620459ee2SKalle Valo 	 * on delibrately as we will boot the hardware anyway within few
150720459ee2SKalle Valo 	 * seconds.
150820459ee2SKalle Valo 	 */
1509b2e75698SKalle Valo 	ret = ath6kl_hif_power_on(ar);
1510bdcd8170SKalle Valo 	if (ret)
1511bdcd8170SKalle Valo 		goto err_bmi_cleanup;
1512bdcd8170SKalle Valo 
1513b2e75698SKalle Valo 	ret = ath6kl_bmi_get_target_info(ar, &targ_info);
1514b2e75698SKalle Valo 	if (ret)
1515b2e75698SKalle Valo 		goto err_power_off;
1516b2e75698SKalle Valo 
1517bdcd8170SKalle Valo 	ar->version.target_ver = le32_to_cpu(targ_info.version);
1518bdcd8170SKalle Valo 	ar->target_type = le32_to_cpu(targ_info.type);
1519be98e3a4SVasanthakumar Thiagarajan 	ar->wiphy->hw_version = le32_to_cpu(targ_info.version);
1520bdcd8170SKalle Valo 
1521a01ac414SKalle Valo 	ret = ath6kl_init_hw_params(ar);
1522a01ac414SKalle Valo 	if (ret)
1523b2e75698SKalle Valo 		goto err_power_off;
1524a01ac414SKalle Valo 
1525ad226ec2SKalle Valo 	ar->htc_target = ath6kl_htc_create(ar);
1526bdcd8170SKalle Valo 
1527bdcd8170SKalle Valo 	if (!ar->htc_target) {
1528bdcd8170SKalle Valo 		ret = -ENOMEM;
1529b2e75698SKalle Valo 		goto err_power_off;
1530bdcd8170SKalle Valo 	}
1531bdcd8170SKalle Valo 
1532772c31eeSKalle Valo 	ret = ath6kl_fetch_firmwares(ar);
1533772c31eeSKalle Valo 	if (ret)
1534772c31eeSKalle Valo 		goto err_htc_cleanup;
1535772c31eeSKalle Valo 
153661448a93SKalle Valo 	/* FIXME: we should free all firmwares in the error cases below */
153761448a93SKalle Valo 
153861448a93SKalle Valo 	/* Indicate that WMI is enabled (although not ready yet) */
153961448a93SKalle Valo 	set_bit(WMI_ENABLED, &ar->flag);
154061448a93SKalle Valo 	ar->wmi = ath6kl_wmi_init(ar);
154161448a93SKalle Valo 	if (!ar->wmi) {
154261448a93SKalle Valo 		ath6kl_err("failed to initialize wmi\n");
154361448a93SKalle Valo 		ret = -EIO;
154461448a93SKalle Valo 		goto err_htc_cleanup;
154561448a93SKalle Valo 	}
154661448a93SKalle Valo 
154761448a93SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_TRC, "%s: got wmi @ 0x%p.\n", __func__, ar->wmi);
154861448a93SKalle Valo 
154961448a93SKalle Valo 	ret = ath6kl_register_ieee80211_hw(ar);
155061448a93SKalle Valo 	if (ret)
155161448a93SKalle Valo 		goto err_node_cleanup;
155261448a93SKalle Valo 
155361448a93SKalle Valo 	ret = ath6kl_debug_init(ar);
155461448a93SKalle Valo 	if (ret) {
155561448a93SKalle Valo 		wiphy_unregister(ar->wiphy);
155661448a93SKalle Valo 		goto err_node_cleanup;
155761448a93SKalle Valo 	}
155861448a93SKalle Valo 
155961448a93SKalle Valo 	for (i = 0; i < MAX_NUM_VIF; i++)
156061448a93SKalle Valo 		ar->avail_idx_map |= BIT(i);
156161448a93SKalle Valo 
156261448a93SKalle Valo 	rtnl_lock();
156361448a93SKalle Valo 
156461448a93SKalle Valo 	/* Add an initial station interface */
156561448a93SKalle Valo 	ndev = ath6kl_interface_add(ar, "wlan%d", NL80211_IFTYPE_STATION, 0,
156661448a93SKalle Valo 				    INFRA_NETWORK);
156761448a93SKalle Valo 
156861448a93SKalle Valo 	rtnl_unlock();
156961448a93SKalle Valo 
157061448a93SKalle Valo 	if (!ndev) {
157161448a93SKalle Valo 		ath6kl_err("Failed to instantiate a network device\n");
157261448a93SKalle Valo 		ret = -ENOMEM;
157361448a93SKalle Valo 		wiphy_unregister(ar->wiphy);
157461448a93SKalle Valo 		goto err_debug_init;
157561448a93SKalle Valo 	}
157661448a93SKalle Valo 
157761448a93SKalle Valo 
157861448a93SKalle Valo 	ath6kl_dbg(ATH6KL_DBG_TRC, "%s: name=%s dev=0x%p, ar=0x%p\n",
157961448a93SKalle Valo 			__func__, ndev->name, ndev, ar);
158061448a93SKalle Valo 
158161448a93SKalle Valo 	/* setup access class priority mappings */
158261448a93SKalle Valo 	ar->ac_stream_pri_map[WMM_AC_BK] = 0; /* lowest  */
158361448a93SKalle Valo 	ar->ac_stream_pri_map[WMM_AC_BE] = 1;
158461448a93SKalle Valo 	ar->ac_stream_pri_map[WMM_AC_VI] = 2;
158561448a93SKalle Valo 	ar->ac_stream_pri_map[WMM_AC_VO] = 3; /* highest */
158661448a93SKalle Valo 
158761448a93SKalle Valo 	/* give our connected endpoints some buffers */
158861448a93SKalle Valo 	ath6kl_rx_refill(ar->htc_target, ar->ctrl_ep);
158961448a93SKalle Valo 	ath6kl_rx_refill(ar->htc_target, ar->ac2ep_map[WMM_AC_BE]);
159061448a93SKalle Valo 
159161448a93SKalle Valo 	/* allocate some buffers that handle larger AMSDU frames */
159261448a93SKalle Valo 	ath6kl_refill_amsdu_rxbufs(ar, ATH6KL_MAX_AMSDU_RX_BUFFERS);
159361448a93SKalle Valo 
159461448a93SKalle Valo 	ath6kl_cookie_init(ar);
159561448a93SKalle Valo 
159661448a93SKalle Valo 	ar->conf_flags = ATH6KL_CONF_IGNORE_ERP_BARKER |
159761448a93SKalle Valo 			 ATH6KL_CONF_ENABLE_11N | ATH6KL_CONF_ENABLE_TX_BURST;
159861448a93SKalle Valo 
159961448a93SKalle Valo 	ar->wiphy->flags |= WIPHY_FLAG_SUPPORTS_FW_ROAM |
160061448a93SKalle Valo 			    WIPHY_FLAG_HAVE_AP_SME;
160161448a93SKalle Valo 
16025fe4dffbSKalle Valo 	set_bit(FIRST_BOOT, &ar->flag);
16035fe4dffbSKalle Valo 
16045fe4dffbSKalle Valo 	ret = ath6kl_init_hw_start(ar);
160520459ee2SKalle Valo 	if (ret) {
16065fe4dffbSKalle Valo 		ath6kl_err("Failed to start hardware: %d\n", ret);
160720459ee2SKalle Valo 		goto err_rxbuf_cleanup;
160861448a93SKalle Valo 	}
160961448a93SKalle Valo 
161061448a93SKalle Valo 	/*
161161448a93SKalle Valo 	 * Set mac address which is received in ready event
161261448a93SKalle Valo 	 * FIXME: Move to ath6kl_interface_add()
161361448a93SKalle Valo 	 */
161461448a93SKalle Valo 	memcpy(ndev->dev_addr, ar->mac_addr, ETH_ALEN);
1615bdcd8170SKalle Valo 
16165fe4dffbSKalle Valo 	ret = ath6kl_init_hw_stop(ar);
16175fe4dffbSKalle Valo 	if (ret) {
16185fe4dffbSKalle Valo 		ath6kl_err("Failed to stop hardware: %d\n", ret);
16195fe4dffbSKalle Valo 		goto err_htc_cleanup;
16205fe4dffbSKalle Valo 	}
16215fe4dffbSKalle Valo 
1622bdcd8170SKalle Valo 	return ret;
1623bdcd8170SKalle Valo 
162461448a93SKalle Valo err_rxbuf_cleanup:
162561448a93SKalle Valo 	ath6kl_htc_flush_rx_buf(ar->htc_target);
162661448a93SKalle Valo 	ath6kl_cleanup_amsdu_rxbufs(ar);
162761448a93SKalle Valo 	rtnl_lock();
162861448a93SKalle Valo 	ath6kl_deinit_if_data(netdev_priv(ndev));
162961448a93SKalle Valo 	rtnl_unlock();
163061448a93SKalle Valo 	wiphy_unregister(ar->wiphy);
163161448a93SKalle Valo err_debug_init:
163261448a93SKalle Valo 	ath6kl_debug_cleanup(ar);
163361448a93SKalle Valo err_node_cleanup:
163461448a93SKalle Valo 	ath6kl_wmi_shutdown(ar->wmi);
163561448a93SKalle Valo 	clear_bit(WMI_ENABLED, &ar->flag);
163661448a93SKalle Valo 	ar->wmi = NULL;
1637bdcd8170SKalle Valo err_htc_cleanup:
1638ad226ec2SKalle Valo 	ath6kl_htc_cleanup(ar->htc_target);
1639b2e75698SKalle Valo err_power_off:
1640b2e75698SKalle Valo 	ath6kl_hif_power_off(ar);
1641bdcd8170SKalle Valo err_bmi_cleanup:
1642bdcd8170SKalle Valo 	ath6kl_bmi_cleanup(ar);
1643bdcd8170SKalle Valo err_wq:
1644bdcd8170SKalle Valo 	destroy_workqueue(ar->ath6kl_wq);
16458dafb70eSVasanthakumar Thiagarajan 
1646bdcd8170SKalle Valo 	return ret;
1647bdcd8170SKalle Valo }
1648bdcd8170SKalle Valo 
164955055976SVasanthakumar Thiagarajan void ath6kl_cleanup_vif(struct ath6kl_vif *vif, bool wmi_ready)
16506db8fa53SVasanthakumar Thiagarajan {
16516db8fa53SVasanthakumar Thiagarajan 	static u8 bcast_mac[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
16526db8fa53SVasanthakumar Thiagarajan 	bool discon_issued;
16536db8fa53SVasanthakumar Thiagarajan 
16546db8fa53SVasanthakumar Thiagarajan 	netif_stop_queue(vif->ndev);
16556db8fa53SVasanthakumar Thiagarajan 
16566db8fa53SVasanthakumar Thiagarajan 	clear_bit(WLAN_ENABLED, &vif->flags);
16576db8fa53SVasanthakumar Thiagarajan 
16586db8fa53SVasanthakumar Thiagarajan 	if (wmi_ready) {
16596db8fa53SVasanthakumar Thiagarajan 		discon_issued = test_bit(CONNECTED, &vif->flags) ||
16606db8fa53SVasanthakumar Thiagarajan 				test_bit(CONNECT_PEND, &vif->flags);
16616db8fa53SVasanthakumar Thiagarajan 		ath6kl_disconnect(vif);
16626db8fa53SVasanthakumar Thiagarajan 		del_timer(&vif->disconnect_timer);
16636db8fa53SVasanthakumar Thiagarajan 
16646db8fa53SVasanthakumar Thiagarajan 		if (discon_issued)
16656db8fa53SVasanthakumar Thiagarajan 			ath6kl_disconnect_event(vif, DISCONNECT_CMD,
16666db8fa53SVasanthakumar Thiagarajan 						(vif->nw_type & AP_NETWORK) ?
16676db8fa53SVasanthakumar Thiagarajan 						bcast_mac : vif->bssid,
16686db8fa53SVasanthakumar Thiagarajan 						0, NULL, 0);
16696db8fa53SVasanthakumar Thiagarajan 	}
16706db8fa53SVasanthakumar Thiagarajan 
16716db8fa53SVasanthakumar Thiagarajan 	if (vif->scan_req) {
16726db8fa53SVasanthakumar Thiagarajan 		cfg80211_scan_done(vif->scan_req, true);
16736db8fa53SVasanthakumar Thiagarajan 		vif->scan_req = NULL;
16746db8fa53SVasanthakumar Thiagarajan 	}
16756db8fa53SVasanthakumar Thiagarajan }
16766db8fa53SVasanthakumar Thiagarajan 
1677bdcd8170SKalle Valo void ath6kl_stop_txrx(struct ath6kl *ar)
1678bdcd8170SKalle Valo {
1679990bd915SVasanthakumar Thiagarajan 	struct ath6kl_vif *vif, *tmp_vif;
1680bdcd8170SKalle Valo 
1681bdcd8170SKalle Valo 	set_bit(DESTROY_IN_PROGRESS, &ar->flag);
1682bdcd8170SKalle Valo 
1683bdcd8170SKalle Valo 	if (down_interruptible(&ar->sem)) {
1684bdcd8170SKalle Valo 		ath6kl_err("down_interruptible failed\n");
1685bdcd8170SKalle Valo 		return;
1686bdcd8170SKalle Valo 	}
1687bdcd8170SKalle Valo 
1688990bd915SVasanthakumar Thiagarajan 	spin_lock(&ar->list_lock);
1689990bd915SVasanthakumar Thiagarajan 	list_for_each_entry_safe(vif, tmp_vif, &ar->vif_list, list) {
1690990bd915SVasanthakumar Thiagarajan 		list_del(&vif->list);
1691990bd915SVasanthakumar Thiagarajan 		spin_unlock(&ar->list_lock);
1692990bd915SVasanthakumar Thiagarajan 		ath6kl_cleanup_vif(vif, test_bit(WMI_READY, &ar->flag));
169327929723SVasanthakumar Thiagarajan 		rtnl_lock();
169427929723SVasanthakumar Thiagarajan 		ath6kl_deinit_if_data(vif);
169527929723SVasanthakumar Thiagarajan 		rtnl_unlock();
1696990bd915SVasanthakumar Thiagarajan 		spin_lock(&ar->list_lock);
1697990bd915SVasanthakumar Thiagarajan 	}
1698990bd915SVasanthakumar Thiagarajan 	spin_unlock(&ar->list_lock);
1699bdcd8170SKalle Valo 
17006db8fa53SVasanthakumar Thiagarajan 	clear_bit(WMI_READY, &ar->flag);
17016db8fa53SVasanthakumar Thiagarajan 
17026db8fa53SVasanthakumar Thiagarajan 	/*
17036db8fa53SVasanthakumar Thiagarajan 	 * After wmi_shudown all WMI events will be dropped. We
17046db8fa53SVasanthakumar Thiagarajan 	 * need to cleanup the buffers allocated in AP mode and
17056db8fa53SVasanthakumar Thiagarajan 	 * give disconnect notification to stack, which usually
17066db8fa53SVasanthakumar Thiagarajan 	 * happens in the disconnect_event. Simulate the disconnect
17076db8fa53SVasanthakumar Thiagarajan 	 * event by calling the function directly. Sometimes
17086db8fa53SVasanthakumar Thiagarajan 	 * disconnect_event will be received when the debug logs
17096db8fa53SVasanthakumar Thiagarajan 	 * are collected.
17106db8fa53SVasanthakumar Thiagarajan 	 */
17116db8fa53SVasanthakumar Thiagarajan 	ath6kl_wmi_shutdown(ar->wmi);
17126db8fa53SVasanthakumar Thiagarajan 
17136db8fa53SVasanthakumar Thiagarajan 	clear_bit(WMI_ENABLED, &ar->flag);
17146db8fa53SVasanthakumar Thiagarajan 	if (ar->htc_target) {
17156db8fa53SVasanthakumar Thiagarajan 		ath6kl_dbg(ATH6KL_DBG_TRC, "%s: shut down htc\n", __func__);
17166db8fa53SVasanthakumar Thiagarajan 		ath6kl_htc_stop(ar->htc_target);
1717bdcd8170SKalle Valo 	}
1718bdcd8170SKalle Valo 
1719bdcd8170SKalle Valo 	/*
17206db8fa53SVasanthakumar Thiagarajan 	 * Try to reset the device if we can. The driver may have been
17216db8fa53SVasanthakumar Thiagarajan 	 * configure NOT to reset the target during a debug session.
1722bdcd8170SKalle Valo 	 */
17236db8fa53SVasanthakumar Thiagarajan 	ath6kl_dbg(ATH6KL_DBG_TRC,
17246db8fa53SVasanthakumar Thiagarajan 			"attempting to reset target on instance destroy\n");
17256db8fa53SVasanthakumar Thiagarajan 	ath6kl_reset_device(ar, ar->target_type, true, true);
1726bdcd8170SKalle Valo 
17276db8fa53SVasanthakumar Thiagarajan 	clear_bit(WLAN_ENABLED, &ar->flag);
1728bdcd8170SKalle Valo }
1729