1bdcd8170SKalle Valo 2bdcd8170SKalle Valo /* 3bdcd8170SKalle Valo * Copyright (c) 2011 Atheros Communications Inc. 4bdcd8170SKalle Valo * 5bdcd8170SKalle Valo * Permission to use, copy, modify, and/or distribute this software for any 6bdcd8170SKalle Valo * purpose with or without fee is hereby granted, provided that the above 7bdcd8170SKalle Valo * copyright notice and this permission notice appear in all copies. 8bdcd8170SKalle Valo * 9bdcd8170SKalle Valo * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10bdcd8170SKalle Valo * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11bdcd8170SKalle Valo * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12bdcd8170SKalle Valo * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13bdcd8170SKalle Valo * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14bdcd8170SKalle Valo * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15bdcd8170SKalle Valo * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16bdcd8170SKalle Valo */ 17bdcd8170SKalle Valo 18c6efe578SStephen Rothwell #include <linux/moduleparam.h> 19f7830202SSangwook Lee #include <linux/errno.h> 2092ecbff4SSam Leffler #include <linux/of.h> 21bdcd8170SKalle Valo #include <linux/mmc/sdio_func.h> 22bdcd8170SKalle Valo #include "core.h" 23bdcd8170SKalle Valo #include "cfg80211.h" 24bdcd8170SKalle Valo #include "target.h" 25bdcd8170SKalle Valo #include "debug.h" 26bdcd8170SKalle Valo #include "hif-ops.h" 27bdcd8170SKalle Valo 28bdcd8170SKalle Valo unsigned int debug_mask; 29003353b0SKalle Valo static unsigned int testmode; 308277de15SKalle Valo static bool suspend_cutpower; 31bdcd8170SKalle Valo 32bdcd8170SKalle Valo module_param(debug_mask, uint, 0644); 33003353b0SKalle Valo module_param(testmode, uint, 0644); 348277de15SKalle Valo module_param(suspend_cutpower, bool, 0444); 35bdcd8170SKalle Valo 36bdcd8170SKalle Valo /* 37bdcd8170SKalle Valo * Include definitions here that can be used to tune the WLAN module 38bdcd8170SKalle Valo * behavior. Different customers can tune the behavior as per their needs, 39bdcd8170SKalle Valo * here. 40bdcd8170SKalle Valo */ 41bdcd8170SKalle Valo 42bdcd8170SKalle Valo /* 43bdcd8170SKalle Valo * This configuration item enable/disable keepalive support. 44bdcd8170SKalle Valo * Keepalive support: In the absence of any data traffic to AP, null 45bdcd8170SKalle Valo * frames will be sent to the AP at periodic interval, to keep the association 46bdcd8170SKalle Valo * active. This configuration item defines the periodic interval. 47bdcd8170SKalle Valo * Use value of zero to disable keepalive support 48bdcd8170SKalle Valo * Default: 60 seconds 49bdcd8170SKalle Valo */ 50bdcd8170SKalle Valo #define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60 51bdcd8170SKalle Valo 52bdcd8170SKalle Valo /* 53bdcd8170SKalle Valo * This configuration item sets the value of disconnect timeout 54bdcd8170SKalle Valo * Firmware delays sending the disconnec event to the host for this 55bdcd8170SKalle Valo * timeout after is gets disconnected from the current AP. 56bdcd8170SKalle Valo * If the firmware successly roams within the disconnect timeout 57bdcd8170SKalle Valo * it sends a new connect event 58bdcd8170SKalle Valo */ 59bdcd8170SKalle Valo #define WLAN_CONFIG_DISCONNECT_TIMEOUT 10 60bdcd8170SKalle Valo 61bdcd8170SKalle Valo #define CONFIG_AR600x_DEBUG_UART_TX_PIN 8 62bdcd8170SKalle Valo 63bdcd8170SKalle Valo #define ATH6KL_DATA_OFFSET 64 64bdcd8170SKalle Valo struct sk_buff *ath6kl_buf_alloc(int size) 65bdcd8170SKalle Valo { 66bdcd8170SKalle Valo struct sk_buff *skb; 67bdcd8170SKalle Valo u16 reserved; 68bdcd8170SKalle Valo 69bdcd8170SKalle Valo /* Add chacheline space at front and back of buffer */ 70bdcd8170SKalle Valo reserved = (2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET + 711df94a85SVasanthakumar Thiagarajan sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES; 72bdcd8170SKalle Valo skb = dev_alloc_skb(size + reserved); 73bdcd8170SKalle Valo 74bdcd8170SKalle Valo if (skb) 75bdcd8170SKalle Valo skb_reserve(skb, reserved - L1_CACHE_BYTES); 76bdcd8170SKalle Valo return skb; 77bdcd8170SKalle Valo } 78bdcd8170SKalle Valo 79e29f25f5SVasanthakumar Thiagarajan void ath6kl_init_profile_info(struct ath6kl_vif *vif) 80bdcd8170SKalle Valo { 813450334fSVasanthakumar Thiagarajan vif->ssid_len = 0; 823450334fSVasanthakumar Thiagarajan memset(vif->ssid, 0, sizeof(vif->ssid)); 833450334fSVasanthakumar Thiagarajan 843450334fSVasanthakumar Thiagarajan vif->dot11_auth_mode = OPEN_AUTH; 853450334fSVasanthakumar Thiagarajan vif->auth_mode = NONE_AUTH; 863450334fSVasanthakumar Thiagarajan vif->prwise_crypto = NONE_CRYPT; 873450334fSVasanthakumar Thiagarajan vif->prwise_crypto_len = 0; 883450334fSVasanthakumar Thiagarajan vif->grp_crypto = NONE_CRYPT; 893450334fSVasanthakumar Thiagarajan vif->grp_crypto_len = 0; 906f2a73f9SVasanthakumar Thiagarajan memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list)); 918c8b65e3SVasanthakumar Thiagarajan memset(vif->req_bssid, 0, sizeof(vif->req_bssid)); 928c8b65e3SVasanthakumar Thiagarajan memset(vif->bssid, 0, sizeof(vif->bssid)); 93f74bac54SVasanthakumar Thiagarajan vif->bss_ch = 0; 94bdcd8170SKalle Valo } 95bdcd8170SKalle Valo 96bdcd8170SKalle Valo static int ath6kl_set_host_app_area(struct ath6kl *ar) 97bdcd8170SKalle Valo { 98bdcd8170SKalle Valo u32 address, data; 99bdcd8170SKalle Valo struct host_app_area host_app_area; 100bdcd8170SKalle Valo 101bdcd8170SKalle Valo /* Fetch the address of the host_app_area_s 102bdcd8170SKalle Valo * instance in the host interest area */ 103bdcd8170SKalle Valo address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest)); 10431024d99SKevin Fang address = TARG_VTOP(ar->target_type, address); 105bdcd8170SKalle Valo 106addb44beSKalle Valo if (ath6kl_diag_read32(ar, address, &data)) 107bdcd8170SKalle Valo return -EIO; 108bdcd8170SKalle Valo 10931024d99SKevin Fang address = TARG_VTOP(ar->target_type, data); 110cbf49a6fSKalle Valo host_app_area.wmi_protocol_ver = cpu_to_le32(WMI_PROTOCOL_VERSION); 111addb44beSKalle Valo if (ath6kl_diag_write(ar, address, (u8 *) &host_app_area, 112addb44beSKalle Valo sizeof(struct host_app_area))) 113bdcd8170SKalle Valo return -EIO; 114bdcd8170SKalle Valo 115bdcd8170SKalle Valo return 0; 116bdcd8170SKalle Valo } 117bdcd8170SKalle Valo 118bdcd8170SKalle Valo static inline void set_ac2_ep_map(struct ath6kl *ar, 119bdcd8170SKalle Valo u8 ac, 120bdcd8170SKalle Valo enum htc_endpoint_id ep) 121bdcd8170SKalle Valo { 122bdcd8170SKalle Valo ar->ac2ep_map[ac] = ep; 123bdcd8170SKalle Valo ar->ep2ac_map[ep] = ac; 124bdcd8170SKalle Valo } 125bdcd8170SKalle Valo 126bdcd8170SKalle Valo /* connect to a service */ 127bdcd8170SKalle Valo static int ath6kl_connectservice(struct ath6kl *ar, 128bdcd8170SKalle Valo struct htc_service_connect_req *con_req, 129bdcd8170SKalle Valo char *desc) 130bdcd8170SKalle Valo { 131bdcd8170SKalle Valo int status; 132bdcd8170SKalle Valo struct htc_service_connect_resp response; 133bdcd8170SKalle Valo 134bdcd8170SKalle Valo memset(&response, 0, sizeof(response)); 135bdcd8170SKalle Valo 136ad226ec2SKalle Valo status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response); 137bdcd8170SKalle Valo if (status) { 138bdcd8170SKalle Valo ath6kl_err("failed to connect to %s service status:%d\n", 139bdcd8170SKalle Valo desc, status); 140bdcd8170SKalle Valo return status; 141bdcd8170SKalle Valo } 142bdcd8170SKalle Valo 143bdcd8170SKalle Valo switch (con_req->svc_id) { 144bdcd8170SKalle Valo case WMI_CONTROL_SVC: 145bdcd8170SKalle Valo if (test_bit(WMI_ENABLED, &ar->flag)) 146bdcd8170SKalle Valo ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint); 147bdcd8170SKalle Valo ar->ctrl_ep = response.endpoint; 148bdcd8170SKalle Valo break; 149bdcd8170SKalle Valo case WMI_DATA_BE_SVC: 150bdcd8170SKalle Valo set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint); 151bdcd8170SKalle Valo break; 152bdcd8170SKalle Valo case WMI_DATA_BK_SVC: 153bdcd8170SKalle Valo set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint); 154bdcd8170SKalle Valo break; 155bdcd8170SKalle Valo case WMI_DATA_VI_SVC: 156bdcd8170SKalle Valo set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint); 157bdcd8170SKalle Valo break; 158bdcd8170SKalle Valo case WMI_DATA_VO_SVC: 159bdcd8170SKalle Valo set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint); 160bdcd8170SKalle Valo break; 161bdcd8170SKalle Valo default: 162bdcd8170SKalle Valo ath6kl_err("service id is not mapped %d\n", con_req->svc_id); 163bdcd8170SKalle Valo return -EINVAL; 164bdcd8170SKalle Valo } 165bdcd8170SKalle Valo 166bdcd8170SKalle Valo return 0; 167bdcd8170SKalle Valo } 168bdcd8170SKalle Valo 169bdcd8170SKalle Valo static int ath6kl_init_service_ep(struct ath6kl *ar) 170bdcd8170SKalle Valo { 171bdcd8170SKalle Valo struct htc_service_connect_req connect; 172bdcd8170SKalle Valo 173bdcd8170SKalle Valo memset(&connect, 0, sizeof(connect)); 174bdcd8170SKalle Valo 175bdcd8170SKalle Valo /* these fields are the same for all service endpoints */ 176bdcd8170SKalle Valo connect.ep_cb.rx = ath6kl_rx; 177bdcd8170SKalle Valo connect.ep_cb.rx_refill = ath6kl_rx_refill; 178bdcd8170SKalle Valo connect.ep_cb.tx_full = ath6kl_tx_queue_full; 179bdcd8170SKalle Valo 180bdcd8170SKalle Valo /* 181bdcd8170SKalle Valo * Set the max queue depth so that our ath6kl_tx_queue_full handler 182bdcd8170SKalle Valo * gets called. 183bdcd8170SKalle Valo */ 184bdcd8170SKalle Valo connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH; 185bdcd8170SKalle Valo connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4; 186bdcd8170SKalle Valo if (!connect.ep_cb.rx_refill_thresh) 187bdcd8170SKalle Valo connect.ep_cb.rx_refill_thresh++; 188bdcd8170SKalle Valo 189bdcd8170SKalle Valo /* connect to control service */ 190bdcd8170SKalle Valo connect.svc_id = WMI_CONTROL_SVC; 191bdcd8170SKalle Valo if (ath6kl_connectservice(ar, &connect, "WMI CONTROL")) 192bdcd8170SKalle Valo return -EIO; 193bdcd8170SKalle Valo 194bdcd8170SKalle Valo connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN; 195bdcd8170SKalle Valo 196bdcd8170SKalle Valo /* 197bdcd8170SKalle Valo * Limit the HTC message size on the send path, although e can 198bdcd8170SKalle Valo * receive A-MSDU frames of 4K, we will only send ethernet-sized 199bdcd8170SKalle Valo * (802.3) frames on the send path. 200bdcd8170SKalle Valo */ 201bdcd8170SKalle Valo connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH; 202bdcd8170SKalle Valo 203bdcd8170SKalle Valo /* 204bdcd8170SKalle Valo * To reduce the amount of committed memory for larger A_MSDU 205bdcd8170SKalle Valo * frames, use the recv-alloc threshold mechanism for larger 206bdcd8170SKalle Valo * packets. 207bdcd8170SKalle Valo */ 208bdcd8170SKalle Valo connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE; 209bdcd8170SKalle Valo connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf; 210bdcd8170SKalle Valo 211bdcd8170SKalle Valo /* 212bdcd8170SKalle Valo * For the remaining data services set the connection flag to 213bdcd8170SKalle Valo * reduce dribbling, if configured to do so. 214bdcd8170SKalle Valo */ 215bdcd8170SKalle Valo connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB; 216bdcd8170SKalle Valo connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK; 217bdcd8170SKalle Valo connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF; 218bdcd8170SKalle Valo 219bdcd8170SKalle Valo connect.svc_id = WMI_DATA_BE_SVC; 220bdcd8170SKalle Valo 221bdcd8170SKalle Valo if (ath6kl_connectservice(ar, &connect, "WMI DATA BE")) 222bdcd8170SKalle Valo return -EIO; 223bdcd8170SKalle Valo 224bdcd8170SKalle Valo /* connect to back-ground map this to WMI LOW_PRI */ 225bdcd8170SKalle Valo connect.svc_id = WMI_DATA_BK_SVC; 226bdcd8170SKalle Valo if (ath6kl_connectservice(ar, &connect, "WMI DATA BK")) 227bdcd8170SKalle Valo return -EIO; 228bdcd8170SKalle Valo 229bdcd8170SKalle Valo /* connect to Video service, map this to to HI PRI */ 230bdcd8170SKalle Valo connect.svc_id = WMI_DATA_VI_SVC; 231bdcd8170SKalle Valo if (ath6kl_connectservice(ar, &connect, "WMI DATA VI")) 232bdcd8170SKalle Valo return -EIO; 233bdcd8170SKalle Valo 234bdcd8170SKalle Valo /* 235bdcd8170SKalle Valo * Connect to VO service, this is currently not mapped to a WMI 236bdcd8170SKalle Valo * priority stream due to historical reasons. WMI originally 237bdcd8170SKalle Valo * defined 3 priorities over 3 mailboxes We can change this when 238bdcd8170SKalle Valo * WMI is reworked so that priorities are not dependent on 239bdcd8170SKalle Valo * mailboxes. 240bdcd8170SKalle Valo */ 241bdcd8170SKalle Valo connect.svc_id = WMI_DATA_VO_SVC; 242bdcd8170SKalle Valo if (ath6kl_connectservice(ar, &connect, "WMI DATA VO")) 243bdcd8170SKalle Valo return -EIO; 244bdcd8170SKalle Valo 245bdcd8170SKalle Valo return 0; 246bdcd8170SKalle Valo } 247bdcd8170SKalle Valo 248e29f25f5SVasanthakumar Thiagarajan void ath6kl_init_control_info(struct ath6kl_vif *vif) 249bdcd8170SKalle Valo { 250e29f25f5SVasanthakumar Thiagarajan ath6kl_init_profile_info(vif); 2513450334fSVasanthakumar Thiagarajan vif->def_txkey_index = 0; 2526f2a73f9SVasanthakumar Thiagarajan memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list)); 253f74bac54SVasanthakumar Thiagarajan vif->ch_hint = 0; 254bdcd8170SKalle Valo } 255bdcd8170SKalle Valo 256bdcd8170SKalle Valo /* 257bdcd8170SKalle Valo * Set HTC/Mbox operational parameters, this can only be called when the 258bdcd8170SKalle Valo * target is in the BMI phase. 259bdcd8170SKalle Valo */ 260bdcd8170SKalle Valo static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val, 261bdcd8170SKalle Valo u8 htc_ctrl_buf) 262bdcd8170SKalle Valo { 263bdcd8170SKalle Valo int status; 264bdcd8170SKalle Valo u32 blk_size; 265bdcd8170SKalle Valo 266bdcd8170SKalle Valo blk_size = ar->mbox_info.block_size; 267bdcd8170SKalle Valo 268bdcd8170SKalle Valo if (htc_ctrl_buf) 269bdcd8170SKalle Valo blk_size |= ((u32)htc_ctrl_buf) << 16; 270bdcd8170SKalle Valo 271bdcd8170SKalle Valo /* set the host interest area for the block size */ 272bdcd8170SKalle Valo status = ath6kl_bmi_write(ar, 273bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 274bdcd8170SKalle Valo HI_ITEM(hi_mbox_io_block_sz)), 275bdcd8170SKalle Valo (u8 *)&blk_size, 276bdcd8170SKalle Valo 4); 277bdcd8170SKalle Valo if (status) { 278bdcd8170SKalle Valo ath6kl_err("bmi_write_memory for IO block size failed\n"); 279bdcd8170SKalle Valo goto out; 280bdcd8170SKalle Valo } 281bdcd8170SKalle Valo 282bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n", 283bdcd8170SKalle Valo blk_size, 284bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz))); 285bdcd8170SKalle Valo 286bdcd8170SKalle Valo if (mbox_isr_yield_val) { 287bdcd8170SKalle Valo /* set the host interest area for the mbox ISR yield limit */ 288bdcd8170SKalle Valo status = ath6kl_bmi_write(ar, 289bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 290bdcd8170SKalle Valo HI_ITEM(hi_mbox_isr_yield_limit)), 291bdcd8170SKalle Valo (u8 *)&mbox_isr_yield_val, 292bdcd8170SKalle Valo 4); 293bdcd8170SKalle Valo if (status) { 294bdcd8170SKalle Valo ath6kl_err("bmi_write_memory for yield limit failed\n"); 295bdcd8170SKalle Valo goto out; 296bdcd8170SKalle Valo } 297bdcd8170SKalle Valo } 298bdcd8170SKalle Valo 299bdcd8170SKalle Valo out: 300bdcd8170SKalle Valo return status; 301bdcd8170SKalle Valo } 302bdcd8170SKalle Valo 3030ce59445SVasanthakumar Thiagarajan static int ath6kl_target_config_wlan_params(struct ath6kl *ar, int idx) 304bdcd8170SKalle Valo { 305bdcd8170SKalle Valo int status = 0; 3064dea08e0SJouni Malinen int ret; 307bdcd8170SKalle Valo 308bdcd8170SKalle Valo /* 309bdcd8170SKalle Valo * Configure the device for rx dot11 header rules. "0,0" are the 310bdcd8170SKalle Valo * default values. Required if checksum offload is needed. Set 311bdcd8170SKalle Valo * RxMetaVersion to 2. 312bdcd8170SKalle Valo */ 3130ce59445SVasanthakumar Thiagarajan if (ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi, idx, 314bdcd8170SKalle Valo ar->rx_meta_ver, 0, 0)) { 315bdcd8170SKalle Valo ath6kl_err("unable to set the rx frame format\n"); 316bdcd8170SKalle Valo status = -EIO; 317bdcd8170SKalle Valo } 318bdcd8170SKalle Valo 319bdcd8170SKalle Valo if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN) 3200ce59445SVasanthakumar Thiagarajan if ((ath6kl_wmi_pmparams_cmd(ar->wmi, idx, 0, 1, 0, 0, 1, 321bdcd8170SKalle Valo IGNORE_POWER_SAVE_FAIL_EVENT_DURING_SCAN)) != 0) { 322bdcd8170SKalle Valo ath6kl_err("unable to set power save fail event policy\n"); 323bdcd8170SKalle Valo status = -EIO; 324bdcd8170SKalle Valo } 325bdcd8170SKalle Valo 326bdcd8170SKalle Valo if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER)) 3270ce59445SVasanthakumar Thiagarajan if ((ath6kl_wmi_set_lpreamble_cmd(ar->wmi, idx, 0, 328bdcd8170SKalle Valo WMI_DONOT_IGNORE_BARKER_IN_ERP)) != 0) { 329bdcd8170SKalle Valo ath6kl_err("unable to set barker preamble policy\n"); 330bdcd8170SKalle Valo status = -EIO; 331bdcd8170SKalle Valo } 332bdcd8170SKalle Valo 3330ce59445SVasanthakumar Thiagarajan if (ath6kl_wmi_set_keepalive_cmd(ar->wmi, idx, 334bdcd8170SKalle Valo WLAN_CONFIG_KEEP_ALIVE_INTERVAL)) { 335bdcd8170SKalle Valo ath6kl_err("unable to set keep alive interval\n"); 336bdcd8170SKalle Valo status = -EIO; 337bdcd8170SKalle Valo } 338bdcd8170SKalle Valo 3390ce59445SVasanthakumar Thiagarajan if (ath6kl_wmi_disctimeout_cmd(ar->wmi, idx, 340bdcd8170SKalle Valo WLAN_CONFIG_DISCONNECT_TIMEOUT)) { 341bdcd8170SKalle Valo ath6kl_err("unable to set disconnect timeout\n"); 342bdcd8170SKalle Valo status = -EIO; 343bdcd8170SKalle Valo } 344bdcd8170SKalle Valo 345bdcd8170SKalle Valo if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST)) 3460ce59445SVasanthakumar Thiagarajan if (ath6kl_wmi_set_wmm_txop(ar->wmi, idx, WMI_TXOP_DISABLED)) { 347bdcd8170SKalle Valo ath6kl_err("unable to set txop bursting\n"); 348bdcd8170SKalle Valo status = -EIO; 349bdcd8170SKalle Valo } 350bdcd8170SKalle Valo 3510ce59445SVasanthakumar Thiagarajan /* 3520ce59445SVasanthakumar Thiagarajan * FIXME: Make sure p2p configurations are not applied to 3530ce59445SVasanthakumar Thiagarajan * non-p2p capable interfaces when multivif support is enabled. 3540ce59445SVasanthakumar Thiagarajan */ 3556bbc7c35SJouni Malinen if (ar->p2p) { 3560ce59445SVasanthakumar Thiagarajan ret = ath6kl_wmi_info_req_cmd(ar->wmi, idx, 3576bbc7c35SJouni Malinen P2P_FLAG_CAPABILITIES_REQ | 3584dea08e0SJouni Malinen P2P_FLAG_MACADDR_REQ | 3594dea08e0SJouni Malinen P2P_FLAG_HMODEL_REQ); 3604dea08e0SJouni Malinen if (ret) { 3614dea08e0SJouni Malinen ath6kl_dbg(ATH6KL_DBG_TRC, "failed to request P2P " 3626bbc7c35SJouni Malinen "capabilities (%d) - assuming P2P not " 3636bbc7c35SJouni Malinen "supported\n", ret); 364*3db1cd5cSRusty Russell ar->p2p = false; 3656bbc7c35SJouni Malinen } 3666bbc7c35SJouni Malinen } 3676bbc7c35SJouni Malinen 3680ce59445SVasanthakumar Thiagarajan /* 3690ce59445SVasanthakumar Thiagarajan * FIXME: Make sure p2p configurations are not applied to 3700ce59445SVasanthakumar Thiagarajan * non-p2p capable interfaces when multivif support is enabled. 3710ce59445SVasanthakumar Thiagarajan */ 3726bbc7c35SJouni Malinen if (ar->p2p) { 3736bbc7c35SJouni Malinen /* Enable Probe Request reporting for P2P */ 3740ce59445SVasanthakumar Thiagarajan ret = ath6kl_wmi_probe_report_req_cmd(ar->wmi, idx, true); 3756bbc7c35SJouni Malinen if (ret) { 3766bbc7c35SJouni Malinen ath6kl_dbg(ATH6KL_DBG_TRC, "failed to enable Probe " 3776bbc7c35SJouni Malinen "Request reporting (%d)\n", ret); 3786bbc7c35SJouni Malinen } 3794dea08e0SJouni Malinen } 3804dea08e0SJouni Malinen 381bdcd8170SKalle Valo return status; 382bdcd8170SKalle Valo } 383bdcd8170SKalle Valo 384bdcd8170SKalle Valo int ath6kl_configure_target(struct ath6kl *ar) 385bdcd8170SKalle Valo { 386bdcd8170SKalle Valo u32 param, ram_reserved_size; 3873226f68aSVasanthakumar Thiagarajan u8 fw_iftype, fw_mode = 0, fw_submode = 0; 3887b85832dSVasanthakumar Thiagarajan int i; 389bdcd8170SKalle Valo 3907b85832dSVasanthakumar Thiagarajan /* 3917b85832dSVasanthakumar Thiagarajan * Note: Even though the firmware interface type is 3927b85832dSVasanthakumar Thiagarajan * chosen as BSS_STA for all three interfaces, can 3937b85832dSVasanthakumar Thiagarajan * be configured to IBSS/AP as long as the fw submode 3947b85832dSVasanthakumar Thiagarajan * remains normal mode (0 - AP, STA and IBSS). But 3957b85832dSVasanthakumar Thiagarajan * due to an target assert in firmware only one interface is 3967b85832dSVasanthakumar Thiagarajan * configured for now. 3977b85832dSVasanthakumar Thiagarajan */ 398dd3751f7SVasanthakumar Thiagarajan fw_iftype = HI_OPTION_FW_MODE_BSS_STA; 399bdcd8170SKalle Valo 4007b85832dSVasanthakumar Thiagarajan for (i = 0; i < MAX_NUM_VIF; i++) 4017b85832dSVasanthakumar Thiagarajan fw_mode |= fw_iftype << (i * HI_OPTION_FW_MODE_BITS); 4027b85832dSVasanthakumar Thiagarajan 4037b85832dSVasanthakumar Thiagarajan /* 4043226f68aSVasanthakumar Thiagarajan * By default, submodes : 4053226f68aSVasanthakumar Thiagarajan * vif[0] - AP/STA/IBSS 4067b85832dSVasanthakumar Thiagarajan * vif[1] - "P2P dev"/"P2P GO"/"P2P Client" 4077b85832dSVasanthakumar Thiagarajan * vif[2] - "P2P dev"/"P2P GO"/"P2P Client" 4087b85832dSVasanthakumar Thiagarajan */ 4093226f68aSVasanthakumar Thiagarajan 4103226f68aSVasanthakumar Thiagarajan for (i = 0; i < ar->max_norm_iface; i++) 4113226f68aSVasanthakumar Thiagarajan fw_submode |= HI_OPTION_FW_SUBMODE_NONE << 4123226f68aSVasanthakumar Thiagarajan (i * HI_OPTION_FW_SUBMODE_BITS); 4133226f68aSVasanthakumar Thiagarajan 4143226f68aSVasanthakumar Thiagarajan for (i = ar->max_norm_iface; i < MAX_NUM_VIF; i++) 4153226f68aSVasanthakumar Thiagarajan fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV << 4163226f68aSVasanthakumar Thiagarajan (i * HI_OPTION_FW_SUBMODE_BITS); 4177b85832dSVasanthakumar Thiagarajan 4187b85832dSVasanthakumar Thiagarajan /* 4197b85832dSVasanthakumar Thiagarajan * FIXME: This needs to be removed once the multivif 4207b85832dSVasanthakumar Thiagarajan * support is enabled. 4217b85832dSVasanthakumar Thiagarajan */ 4227b85832dSVasanthakumar Thiagarajan if (ar->p2p) 4237b85832dSVasanthakumar Thiagarajan fw_submode = HI_OPTION_FW_SUBMODE_P2PDEV; 4247b85832dSVasanthakumar Thiagarajan 425bdcd8170SKalle Valo param = HTC_PROTOCOL_VERSION; 426bdcd8170SKalle Valo if (ath6kl_bmi_write(ar, 427bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 428bdcd8170SKalle Valo HI_ITEM(hi_app_host_interest)), 429bdcd8170SKalle Valo (u8 *)¶m, 4) != 0) { 430bdcd8170SKalle Valo ath6kl_err("bmi_write_memory for htc version failed\n"); 431bdcd8170SKalle Valo return -EIO; 432bdcd8170SKalle Valo } 433bdcd8170SKalle Valo 434bdcd8170SKalle Valo /* set the firmware mode to STA/IBSS/AP */ 435bdcd8170SKalle Valo param = 0; 436bdcd8170SKalle Valo 437bdcd8170SKalle Valo if (ath6kl_bmi_read(ar, 438bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 439bdcd8170SKalle Valo HI_ITEM(hi_option_flag)), 440bdcd8170SKalle Valo (u8 *)¶m, 4) != 0) { 441bdcd8170SKalle Valo ath6kl_err("bmi_read_memory for setting fwmode failed\n"); 442bdcd8170SKalle Valo return -EIO; 443bdcd8170SKalle Valo } 444bdcd8170SKalle Valo 4457b85832dSVasanthakumar Thiagarajan param |= (MAX_NUM_VIF << HI_OPTION_NUM_DEV_SHIFT); 4467b85832dSVasanthakumar Thiagarajan param |= fw_mode << HI_OPTION_FW_MODE_SHIFT; 4477b85832dSVasanthakumar Thiagarajan param |= fw_submode << HI_OPTION_FW_SUBMODE_SHIFT; 4487b85832dSVasanthakumar Thiagarajan 449bdcd8170SKalle Valo param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT); 450bdcd8170SKalle Valo param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT); 451bdcd8170SKalle Valo 452bdcd8170SKalle Valo if (ath6kl_bmi_write(ar, 453bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 454bdcd8170SKalle Valo HI_ITEM(hi_option_flag)), 455bdcd8170SKalle Valo (u8 *)¶m, 456bdcd8170SKalle Valo 4) != 0) { 457bdcd8170SKalle Valo ath6kl_err("bmi_write_memory for setting fwmode failed\n"); 458bdcd8170SKalle Valo return -EIO; 459bdcd8170SKalle Valo } 460bdcd8170SKalle Valo 461bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n"); 462bdcd8170SKalle Valo 463bdcd8170SKalle Valo /* 464bdcd8170SKalle Valo * Hardcode the address use for the extended board data 465bdcd8170SKalle Valo * Ideally this should be pre-allocate by the OS at boot time 466bdcd8170SKalle Valo * But since it is a new feature and board data is loaded 467bdcd8170SKalle Valo * at init time, we have to workaround this from host. 468bdcd8170SKalle Valo * It is difficult to patch the firmware boot code, 469bdcd8170SKalle Valo * but possible in theory. 470bdcd8170SKalle Valo */ 471bdcd8170SKalle Valo 472991b27eaSKalle Valo param = ar->hw.board_ext_data_addr; 473991b27eaSKalle Valo ram_reserved_size = ar->hw.reserved_ram_size; 474bdcd8170SKalle Valo 475991b27eaSKalle Valo if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar, 476bdcd8170SKalle Valo HI_ITEM(hi_board_ext_data)), 477bdcd8170SKalle Valo (u8 *)¶m, 4) != 0) { 478bdcd8170SKalle Valo ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n"); 479bdcd8170SKalle Valo return -EIO; 480bdcd8170SKalle Valo } 481991b27eaSKalle Valo 482991b27eaSKalle Valo if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar, 483bdcd8170SKalle Valo HI_ITEM(hi_end_ram_reserve_sz)), 484bdcd8170SKalle Valo (u8 *)&ram_reserved_size, 4) != 0) { 485bdcd8170SKalle Valo ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n"); 486bdcd8170SKalle Valo return -EIO; 487bdcd8170SKalle Valo } 488bdcd8170SKalle Valo 489bdcd8170SKalle Valo /* set the block size for the target */ 490bdcd8170SKalle Valo if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0)) 491bdcd8170SKalle Valo /* use default number of control buffers */ 492bdcd8170SKalle Valo return -EIO; 493bdcd8170SKalle Valo 494bdcd8170SKalle Valo return 0; 495bdcd8170SKalle Valo } 496bdcd8170SKalle Valo 4978dafb70eSVasanthakumar Thiagarajan void ath6kl_core_free(struct ath6kl *ar) 498bdcd8170SKalle Valo { 4998dafb70eSVasanthakumar Thiagarajan wiphy_free(ar->wiphy); 500bdcd8170SKalle Valo } 501bdcd8170SKalle Valo 5026db8fa53SVasanthakumar Thiagarajan void ath6kl_core_cleanup(struct ath6kl *ar) 503bdcd8170SKalle Valo { 504b2e75698SKalle Valo ath6kl_hif_power_off(ar); 505b2e75698SKalle Valo 5066db8fa53SVasanthakumar Thiagarajan destroy_workqueue(ar->ath6kl_wq); 507bdcd8170SKalle Valo 5086db8fa53SVasanthakumar Thiagarajan if (ar->htc_target) 5096db8fa53SVasanthakumar Thiagarajan ath6kl_htc_cleanup(ar->htc_target); 5106db8fa53SVasanthakumar Thiagarajan 5116db8fa53SVasanthakumar Thiagarajan ath6kl_cookie_cleanup(ar); 5126db8fa53SVasanthakumar Thiagarajan 5136db8fa53SVasanthakumar Thiagarajan ath6kl_cleanup_amsdu_rxbufs(ar); 5146db8fa53SVasanthakumar Thiagarajan 5156db8fa53SVasanthakumar Thiagarajan ath6kl_bmi_cleanup(ar); 5166db8fa53SVasanthakumar Thiagarajan 5176db8fa53SVasanthakumar Thiagarajan ath6kl_debug_cleanup(ar); 5186db8fa53SVasanthakumar Thiagarajan 5196db8fa53SVasanthakumar Thiagarajan kfree(ar->fw_board); 5206db8fa53SVasanthakumar Thiagarajan kfree(ar->fw_otp); 5216db8fa53SVasanthakumar Thiagarajan kfree(ar->fw); 5226db8fa53SVasanthakumar Thiagarajan kfree(ar->fw_patch); 5236db8fa53SVasanthakumar Thiagarajan 5246db8fa53SVasanthakumar Thiagarajan ath6kl_deinit_ieee80211_hw(ar); 525bdcd8170SKalle Valo } 526bdcd8170SKalle Valo 527bdcd8170SKalle Valo /* firmware upload */ 528bdcd8170SKalle Valo static int ath6kl_get_fw(struct ath6kl *ar, const char *filename, 529bdcd8170SKalle Valo u8 **fw, size_t *fw_len) 530bdcd8170SKalle Valo { 531bdcd8170SKalle Valo const struct firmware *fw_entry; 532bdcd8170SKalle Valo int ret; 533bdcd8170SKalle Valo 534bdcd8170SKalle Valo ret = request_firmware(&fw_entry, filename, ar->dev); 535bdcd8170SKalle Valo if (ret) 536bdcd8170SKalle Valo return ret; 537bdcd8170SKalle Valo 538bdcd8170SKalle Valo *fw_len = fw_entry->size; 539bdcd8170SKalle Valo *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL); 540bdcd8170SKalle Valo 541bdcd8170SKalle Valo if (*fw == NULL) 542bdcd8170SKalle Valo ret = -ENOMEM; 543bdcd8170SKalle Valo 544bdcd8170SKalle Valo release_firmware(fw_entry); 545bdcd8170SKalle Valo 546bdcd8170SKalle Valo return ret; 547bdcd8170SKalle Valo } 548bdcd8170SKalle Valo 54992ecbff4SSam Leffler #ifdef CONFIG_OF 55092ecbff4SSam Leffler static const char *get_target_ver_dir(const struct ath6kl *ar) 55192ecbff4SSam Leffler { 55292ecbff4SSam Leffler switch (ar->version.target_ver) { 55392ecbff4SSam Leffler case AR6003_REV1_VERSION: 55492ecbff4SSam Leffler return "ath6k/AR6003/hw1.0"; 55592ecbff4SSam Leffler case AR6003_REV2_VERSION: 55692ecbff4SSam Leffler return "ath6k/AR6003/hw2.0"; 55792ecbff4SSam Leffler case AR6003_REV3_VERSION: 55892ecbff4SSam Leffler return "ath6k/AR6003/hw2.1.1"; 55992ecbff4SSam Leffler } 56092ecbff4SSam Leffler ath6kl_warn("%s: unsupported target version 0x%x.\n", __func__, 56192ecbff4SSam Leffler ar->version.target_ver); 56292ecbff4SSam Leffler return NULL; 56392ecbff4SSam Leffler } 56492ecbff4SSam Leffler 56592ecbff4SSam Leffler /* 56692ecbff4SSam Leffler * Check the device tree for a board-id and use it to construct 56792ecbff4SSam Leffler * the pathname to the firmware file. Used (for now) to find a 56892ecbff4SSam Leffler * fallback to the "bdata.bin" file--typically a symlink to the 56992ecbff4SSam Leffler * appropriate board-specific file. 57092ecbff4SSam Leffler */ 57192ecbff4SSam Leffler static bool check_device_tree(struct ath6kl *ar) 57292ecbff4SSam Leffler { 57392ecbff4SSam Leffler static const char *board_id_prop = "atheros,board-id"; 57492ecbff4SSam Leffler struct device_node *node; 57592ecbff4SSam Leffler char board_filename[64]; 57692ecbff4SSam Leffler const char *board_id; 57792ecbff4SSam Leffler int ret; 57892ecbff4SSam Leffler 57992ecbff4SSam Leffler for_each_compatible_node(node, NULL, "atheros,ath6kl") { 58092ecbff4SSam Leffler board_id = of_get_property(node, board_id_prop, NULL); 58192ecbff4SSam Leffler if (board_id == NULL) { 58292ecbff4SSam Leffler ath6kl_warn("No \"%s\" property on %s node.\n", 58392ecbff4SSam Leffler board_id_prop, node->name); 58492ecbff4SSam Leffler continue; 58592ecbff4SSam Leffler } 58692ecbff4SSam Leffler snprintf(board_filename, sizeof(board_filename), 58792ecbff4SSam Leffler "%s/bdata.%s.bin", get_target_ver_dir(ar), board_id); 58892ecbff4SSam Leffler 58992ecbff4SSam Leffler ret = ath6kl_get_fw(ar, board_filename, &ar->fw_board, 59092ecbff4SSam Leffler &ar->fw_board_len); 59192ecbff4SSam Leffler if (ret) { 59292ecbff4SSam Leffler ath6kl_err("Failed to get DT board file %s: %d\n", 59392ecbff4SSam Leffler board_filename, ret); 59492ecbff4SSam Leffler continue; 59592ecbff4SSam Leffler } 59692ecbff4SSam Leffler return true; 59792ecbff4SSam Leffler } 59892ecbff4SSam Leffler return false; 59992ecbff4SSam Leffler } 60092ecbff4SSam Leffler #else 60192ecbff4SSam Leffler static bool check_device_tree(struct ath6kl *ar) 60292ecbff4SSam Leffler { 60392ecbff4SSam Leffler return false; 60492ecbff4SSam Leffler } 60592ecbff4SSam Leffler #endif /* CONFIG_OF */ 60692ecbff4SSam Leffler 607bdcd8170SKalle Valo static int ath6kl_fetch_board_file(struct ath6kl *ar) 608bdcd8170SKalle Valo { 609bdcd8170SKalle Valo const char *filename; 610bdcd8170SKalle Valo int ret; 611bdcd8170SKalle Valo 612772c31eeSKalle Valo if (ar->fw_board != NULL) 613772c31eeSKalle Valo return 0; 614772c31eeSKalle Valo 615bdcd8170SKalle Valo switch (ar->version.target_ver) { 616bdcd8170SKalle Valo case AR6003_REV2_VERSION: 617bdcd8170SKalle Valo filename = AR6003_REV2_BOARD_DATA_FILE; 618bdcd8170SKalle Valo break; 61931024d99SKevin Fang case AR6004_REV1_VERSION: 62031024d99SKevin Fang filename = AR6004_REV1_BOARD_DATA_FILE; 62131024d99SKevin Fang break; 622bdcd8170SKalle Valo default: 623bdcd8170SKalle Valo filename = AR6003_REV3_BOARD_DATA_FILE; 624bdcd8170SKalle Valo break; 625bdcd8170SKalle Valo } 626bdcd8170SKalle Valo 627bdcd8170SKalle Valo ret = ath6kl_get_fw(ar, filename, &ar->fw_board, 628bdcd8170SKalle Valo &ar->fw_board_len); 629bdcd8170SKalle Valo if (ret == 0) { 630bdcd8170SKalle Valo /* managed to get proper board file */ 631bdcd8170SKalle Valo return 0; 632bdcd8170SKalle Valo } 633bdcd8170SKalle Valo 63492ecbff4SSam Leffler if (check_device_tree(ar)) { 63592ecbff4SSam Leffler /* got board file from device tree */ 63692ecbff4SSam Leffler return 0; 63792ecbff4SSam Leffler } 63892ecbff4SSam Leffler 639bdcd8170SKalle Valo /* there was no proper board file, try to use default instead */ 640bdcd8170SKalle Valo ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n", 641bdcd8170SKalle Valo filename, ret); 642bdcd8170SKalle Valo 643bdcd8170SKalle Valo switch (ar->version.target_ver) { 644bdcd8170SKalle Valo case AR6003_REV2_VERSION: 645bdcd8170SKalle Valo filename = AR6003_REV2_DEFAULT_BOARD_DATA_FILE; 646bdcd8170SKalle Valo break; 64731024d99SKevin Fang case AR6004_REV1_VERSION: 64831024d99SKevin Fang filename = AR6004_REV1_DEFAULT_BOARD_DATA_FILE; 64931024d99SKevin Fang break; 650bdcd8170SKalle Valo default: 651bdcd8170SKalle Valo filename = AR6003_REV3_DEFAULT_BOARD_DATA_FILE; 652bdcd8170SKalle Valo break; 653bdcd8170SKalle Valo } 654bdcd8170SKalle Valo 655bdcd8170SKalle Valo ret = ath6kl_get_fw(ar, filename, &ar->fw_board, 656bdcd8170SKalle Valo &ar->fw_board_len); 657bdcd8170SKalle Valo if (ret) { 658bdcd8170SKalle Valo ath6kl_err("Failed to get default board file %s: %d\n", 659bdcd8170SKalle Valo filename, ret); 660bdcd8170SKalle Valo return ret; 661bdcd8170SKalle Valo } 662bdcd8170SKalle Valo 663bdcd8170SKalle Valo ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n"); 664bdcd8170SKalle Valo ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n"); 665bdcd8170SKalle Valo 666bdcd8170SKalle Valo return 0; 667bdcd8170SKalle Valo } 668bdcd8170SKalle Valo 669772c31eeSKalle Valo static int ath6kl_fetch_otp_file(struct ath6kl *ar) 670772c31eeSKalle Valo { 671772c31eeSKalle Valo const char *filename; 672772c31eeSKalle Valo int ret; 673772c31eeSKalle Valo 674772c31eeSKalle Valo if (ar->fw_otp != NULL) 675772c31eeSKalle Valo return 0; 676772c31eeSKalle Valo 677772c31eeSKalle Valo switch (ar->version.target_ver) { 678772c31eeSKalle Valo case AR6003_REV2_VERSION: 679772c31eeSKalle Valo filename = AR6003_REV2_OTP_FILE; 680772c31eeSKalle Valo break; 681772c31eeSKalle Valo case AR6004_REV1_VERSION: 682772c31eeSKalle Valo ath6kl_dbg(ATH6KL_DBG_TRC, "AR6004 doesn't need OTP file\n"); 683772c31eeSKalle Valo return 0; 684772c31eeSKalle Valo break; 685772c31eeSKalle Valo default: 686772c31eeSKalle Valo filename = AR6003_REV3_OTP_FILE; 687772c31eeSKalle Valo break; 688772c31eeSKalle Valo } 689772c31eeSKalle Valo 690772c31eeSKalle Valo ret = ath6kl_get_fw(ar, filename, &ar->fw_otp, 691772c31eeSKalle Valo &ar->fw_otp_len); 692772c31eeSKalle Valo if (ret) { 693772c31eeSKalle Valo ath6kl_err("Failed to get OTP file %s: %d\n", 694772c31eeSKalle Valo filename, ret); 695772c31eeSKalle Valo return ret; 696772c31eeSKalle Valo } 697772c31eeSKalle Valo 698772c31eeSKalle Valo return 0; 699772c31eeSKalle Valo } 700772c31eeSKalle Valo 701772c31eeSKalle Valo static int ath6kl_fetch_fw_file(struct ath6kl *ar) 702772c31eeSKalle Valo { 703772c31eeSKalle Valo const char *filename; 704772c31eeSKalle Valo int ret; 705772c31eeSKalle Valo 706772c31eeSKalle Valo if (ar->fw != NULL) 707772c31eeSKalle Valo return 0; 708772c31eeSKalle Valo 709772c31eeSKalle Valo if (testmode) { 710772c31eeSKalle Valo switch (ar->version.target_ver) { 711772c31eeSKalle Valo case AR6003_REV2_VERSION: 712772c31eeSKalle Valo filename = AR6003_REV2_TCMD_FIRMWARE_FILE; 713772c31eeSKalle Valo break; 714772c31eeSKalle Valo case AR6003_REV3_VERSION: 715772c31eeSKalle Valo filename = AR6003_REV3_TCMD_FIRMWARE_FILE; 716772c31eeSKalle Valo break; 717772c31eeSKalle Valo case AR6004_REV1_VERSION: 718772c31eeSKalle Valo ath6kl_warn("testmode not supported with ar6004\n"); 719772c31eeSKalle Valo return -EOPNOTSUPP; 720772c31eeSKalle Valo default: 721772c31eeSKalle Valo ath6kl_warn("unknown target version: 0x%x\n", 722772c31eeSKalle Valo ar->version.target_ver); 723772c31eeSKalle Valo return -EINVAL; 724772c31eeSKalle Valo } 725772c31eeSKalle Valo 726772c31eeSKalle Valo set_bit(TESTMODE, &ar->flag); 727772c31eeSKalle Valo 728772c31eeSKalle Valo goto get_fw; 729772c31eeSKalle Valo } 730772c31eeSKalle Valo 731772c31eeSKalle Valo switch (ar->version.target_ver) { 732772c31eeSKalle Valo case AR6003_REV2_VERSION: 733772c31eeSKalle Valo filename = AR6003_REV2_FIRMWARE_FILE; 734772c31eeSKalle Valo break; 735772c31eeSKalle Valo case AR6004_REV1_VERSION: 736772c31eeSKalle Valo filename = AR6004_REV1_FIRMWARE_FILE; 737772c31eeSKalle Valo break; 738772c31eeSKalle Valo default: 739772c31eeSKalle Valo filename = AR6003_REV3_FIRMWARE_FILE; 740772c31eeSKalle Valo break; 741772c31eeSKalle Valo } 742772c31eeSKalle Valo 743772c31eeSKalle Valo get_fw: 744772c31eeSKalle Valo ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len); 745772c31eeSKalle Valo if (ret) { 746772c31eeSKalle Valo ath6kl_err("Failed to get firmware file %s: %d\n", 747772c31eeSKalle Valo filename, ret); 748772c31eeSKalle Valo return ret; 749772c31eeSKalle Valo } 750772c31eeSKalle Valo 751772c31eeSKalle Valo return 0; 752772c31eeSKalle Valo } 753772c31eeSKalle Valo 754772c31eeSKalle Valo static int ath6kl_fetch_patch_file(struct ath6kl *ar) 755772c31eeSKalle Valo { 756772c31eeSKalle Valo const char *filename; 757772c31eeSKalle Valo int ret; 758772c31eeSKalle Valo 759772c31eeSKalle Valo switch (ar->version.target_ver) { 760772c31eeSKalle Valo case AR6003_REV2_VERSION: 761772c31eeSKalle Valo filename = AR6003_REV2_PATCH_FILE; 762772c31eeSKalle Valo break; 763772c31eeSKalle Valo case AR6004_REV1_VERSION: 764772c31eeSKalle Valo /* FIXME: implement for AR6004 */ 765772c31eeSKalle Valo return 0; 766772c31eeSKalle Valo break; 767772c31eeSKalle Valo default: 768772c31eeSKalle Valo filename = AR6003_REV3_PATCH_FILE; 769772c31eeSKalle Valo break; 770772c31eeSKalle Valo } 771772c31eeSKalle Valo 772772c31eeSKalle Valo if (ar->fw_patch == NULL) { 773772c31eeSKalle Valo ret = ath6kl_get_fw(ar, filename, &ar->fw_patch, 774772c31eeSKalle Valo &ar->fw_patch_len); 775772c31eeSKalle Valo if (ret) { 776772c31eeSKalle Valo ath6kl_err("Failed to get patch file %s: %d\n", 777772c31eeSKalle Valo filename, ret); 778772c31eeSKalle Valo return ret; 779772c31eeSKalle Valo } 780772c31eeSKalle Valo } 781772c31eeSKalle Valo 782772c31eeSKalle Valo return 0; 783772c31eeSKalle Valo } 784772c31eeSKalle Valo 78550d41234SKalle Valo static int ath6kl_fetch_fw_api1(struct ath6kl *ar) 786772c31eeSKalle Valo { 787772c31eeSKalle Valo int ret; 788772c31eeSKalle Valo 789772c31eeSKalle Valo ret = ath6kl_fetch_otp_file(ar); 790772c31eeSKalle Valo if (ret) 791772c31eeSKalle Valo return ret; 792772c31eeSKalle Valo 793772c31eeSKalle Valo ret = ath6kl_fetch_fw_file(ar); 794772c31eeSKalle Valo if (ret) 795772c31eeSKalle Valo return ret; 796772c31eeSKalle Valo 797772c31eeSKalle Valo ret = ath6kl_fetch_patch_file(ar); 798772c31eeSKalle Valo if (ret) 799772c31eeSKalle Valo return ret; 800772c31eeSKalle Valo 801772c31eeSKalle Valo return 0; 802772c31eeSKalle Valo } 803bdcd8170SKalle Valo 80450d41234SKalle Valo static int ath6kl_fetch_fw_api2(struct ath6kl *ar) 80550d41234SKalle Valo { 80650d41234SKalle Valo size_t magic_len, len, ie_len; 80750d41234SKalle Valo const struct firmware *fw; 80850d41234SKalle Valo struct ath6kl_fw_ie *hdr; 80950d41234SKalle Valo const char *filename; 81050d41234SKalle Valo const u8 *data; 81197e0496dSKalle Valo int ret, ie_id, i, index, bit; 8128a137480SKalle Valo __le32 *val; 81350d41234SKalle Valo 81450d41234SKalle Valo switch (ar->version.target_ver) { 81550d41234SKalle Valo case AR6003_REV2_VERSION: 81650d41234SKalle Valo filename = AR6003_REV2_FIRMWARE_2_FILE; 81750d41234SKalle Valo break; 81850d41234SKalle Valo case AR6003_REV3_VERSION: 81950d41234SKalle Valo filename = AR6003_REV3_FIRMWARE_2_FILE; 82050d41234SKalle Valo break; 82150d41234SKalle Valo case AR6004_REV1_VERSION: 82250d41234SKalle Valo filename = AR6004_REV1_FIRMWARE_2_FILE; 82350d41234SKalle Valo break; 82450d41234SKalle Valo default: 82550d41234SKalle Valo return -EOPNOTSUPP; 82650d41234SKalle Valo } 82750d41234SKalle Valo 82850d41234SKalle Valo ret = request_firmware(&fw, filename, ar->dev); 82950d41234SKalle Valo if (ret) 83050d41234SKalle Valo return ret; 83150d41234SKalle Valo 83250d41234SKalle Valo data = fw->data; 83350d41234SKalle Valo len = fw->size; 83450d41234SKalle Valo 83550d41234SKalle Valo /* magic also includes the null byte, check that as well */ 83650d41234SKalle Valo magic_len = strlen(ATH6KL_FIRMWARE_MAGIC) + 1; 83750d41234SKalle Valo 83850d41234SKalle Valo if (len < magic_len) { 83950d41234SKalle Valo ret = -EINVAL; 84050d41234SKalle Valo goto out; 84150d41234SKalle Valo } 84250d41234SKalle Valo 84350d41234SKalle Valo if (memcmp(data, ATH6KL_FIRMWARE_MAGIC, magic_len) != 0) { 84450d41234SKalle Valo ret = -EINVAL; 84550d41234SKalle Valo goto out; 84650d41234SKalle Valo } 84750d41234SKalle Valo 84850d41234SKalle Valo len -= magic_len; 84950d41234SKalle Valo data += magic_len; 85050d41234SKalle Valo 85150d41234SKalle Valo /* loop elements */ 85250d41234SKalle Valo while (len > sizeof(struct ath6kl_fw_ie)) { 85350d41234SKalle Valo /* hdr is unaligned! */ 85450d41234SKalle Valo hdr = (struct ath6kl_fw_ie *) data; 85550d41234SKalle Valo 85650d41234SKalle Valo ie_id = le32_to_cpup(&hdr->id); 85750d41234SKalle Valo ie_len = le32_to_cpup(&hdr->len); 85850d41234SKalle Valo 85950d41234SKalle Valo len -= sizeof(*hdr); 86050d41234SKalle Valo data += sizeof(*hdr); 86150d41234SKalle Valo 86250d41234SKalle Valo if (len < ie_len) { 86350d41234SKalle Valo ret = -EINVAL; 86450d41234SKalle Valo goto out; 86550d41234SKalle Valo } 86650d41234SKalle Valo 86750d41234SKalle Valo switch (ie_id) { 86850d41234SKalle Valo case ATH6KL_FW_IE_OTP_IMAGE: 869ef548626SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "found otp image ie (%zd B)\n", 8706bc36431SKalle Valo ie_len); 8716bc36431SKalle Valo 87250d41234SKalle Valo ar->fw_otp = kmemdup(data, ie_len, GFP_KERNEL); 87350d41234SKalle Valo 87450d41234SKalle Valo if (ar->fw_otp == NULL) { 87550d41234SKalle Valo ret = -ENOMEM; 87650d41234SKalle Valo goto out; 87750d41234SKalle Valo } 87850d41234SKalle Valo 87950d41234SKalle Valo ar->fw_otp_len = ie_len; 88050d41234SKalle Valo break; 88150d41234SKalle Valo case ATH6KL_FW_IE_FW_IMAGE: 882ef548626SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "found fw image ie (%zd B)\n", 8836bc36431SKalle Valo ie_len); 8846bc36431SKalle Valo 88550d41234SKalle Valo ar->fw = kmemdup(data, ie_len, GFP_KERNEL); 88650d41234SKalle Valo 88750d41234SKalle Valo if (ar->fw == NULL) { 88850d41234SKalle Valo ret = -ENOMEM; 88950d41234SKalle Valo goto out; 89050d41234SKalle Valo } 89150d41234SKalle Valo 89250d41234SKalle Valo ar->fw_len = ie_len; 89350d41234SKalle Valo break; 89450d41234SKalle Valo case ATH6KL_FW_IE_PATCH_IMAGE: 895ef548626SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "found patch image ie (%zd B)\n", 8966bc36431SKalle Valo ie_len); 8976bc36431SKalle Valo 89850d41234SKalle Valo ar->fw_patch = kmemdup(data, ie_len, GFP_KERNEL); 89950d41234SKalle Valo 90050d41234SKalle Valo if (ar->fw_patch == NULL) { 90150d41234SKalle Valo ret = -ENOMEM; 90250d41234SKalle Valo goto out; 90350d41234SKalle Valo } 90450d41234SKalle Valo 90550d41234SKalle Valo ar->fw_patch_len = ie_len; 90650d41234SKalle Valo break; 9078a137480SKalle Valo case ATH6KL_FW_IE_RESERVED_RAM_SIZE: 9088a137480SKalle Valo val = (__le32 *) data; 9098a137480SKalle Valo ar->hw.reserved_ram_size = le32_to_cpup(val); 9106bc36431SKalle Valo 9116bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, 9126bc36431SKalle Valo "found reserved ram size ie 0x%d\n", 9136bc36431SKalle Valo ar->hw.reserved_ram_size); 9148a137480SKalle Valo break; 91597e0496dSKalle Valo case ATH6KL_FW_IE_CAPABILITIES: 9166bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, 917ef548626SKalle Valo "found firmware capabilities ie (%zd B)\n", 9186bc36431SKalle Valo ie_len); 9196bc36431SKalle Valo 92097e0496dSKalle Valo for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) { 92197e0496dSKalle Valo index = ALIGN(i, 8) / 8; 92297e0496dSKalle Valo bit = i % 8; 92397e0496dSKalle Valo 92497e0496dSKalle Valo if (data[index] & (1 << bit)) 92597e0496dSKalle Valo __set_bit(i, ar->fw_capabilities); 92697e0496dSKalle Valo } 9276bc36431SKalle Valo 9286bc36431SKalle Valo ath6kl_dbg_dump(ATH6KL_DBG_BOOT, "capabilities", "", 9296bc36431SKalle Valo ar->fw_capabilities, 9306bc36431SKalle Valo sizeof(ar->fw_capabilities)); 93197e0496dSKalle Valo break; 9321b4304daSKalle Valo case ATH6KL_FW_IE_PATCH_ADDR: 9331b4304daSKalle Valo if (ie_len != sizeof(*val)) 9341b4304daSKalle Valo break; 9351b4304daSKalle Valo 9361b4304daSKalle Valo val = (__le32 *) data; 9371b4304daSKalle Valo ar->hw.dataset_patch_addr = le32_to_cpup(val); 9386bc36431SKalle Valo 9396bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, 9406bc36431SKalle Valo "found patch address ie 0x%d\n", 9416bc36431SKalle Valo ar->hw.dataset_patch_addr); 9421b4304daSKalle Valo break; 94350d41234SKalle Valo default: 9446bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "Unknown fw ie: %u\n", 94550d41234SKalle Valo le32_to_cpup(&hdr->id)); 94650d41234SKalle Valo break; 94750d41234SKalle Valo } 94850d41234SKalle Valo 94950d41234SKalle Valo len -= ie_len; 95050d41234SKalle Valo data += ie_len; 95150d41234SKalle Valo }; 95250d41234SKalle Valo 95350d41234SKalle Valo ret = 0; 95450d41234SKalle Valo out: 95550d41234SKalle Valo release_firmware(fw); 95650d41234SKalle Valo 95750d41234SKalle Valo return ret; 95850d41234SKalle Valo } 95950d41234SKalle Valo 96050d41234SKalle Valo static int ath6kl_fetch_firmwares(struct ath6kl *ar) 96150d41234SKalle Valo { 96250d41234SKalle Valo int ret; 96350d41234SKalle Valo 96450d41234SKalle Valo ret = ath6kl_fetch_board_file(ar); 96550d41234SKalle Valo if (ret) 96650d41234SKalle Valo return ret; 96750d41234SKalle Valo 96850d41234SKalle Valo ret = ath6kl_fetch_fw_api2(ar); 9696bc36431SKalle Valo if (ret == 0) { 9706bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api 2\n"); 97150d41234SKalle Valo return 0; 9726bc36431SKalle Valo } 97350d41234SKalle Valo 97450d41234SKalle Valo ret = ath6kl_fetch_fw_api1(ar); 97550d41234SKalle Valo if (ret) 97650d41234SKalle Valo return ret; 97750d41234SKalle Valo 9786bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api 1\n"); 9796bc36431SKalle Valo 98050d41234SKalle Valo return 0; 98150d41234SKalle Valo } 98250d41234SKalle Valo 983bdcd8170SKalle Valo static int ath6kl_upload_board_file(struct ath6kl *ar) 984bdcd8170SKalle Valo { 985bdcd8170SKalle Valo u32 board_address, board_ext_address, param; 98631024d99SKevin Fang u32 board_data_size, board_ext_data_size; 987bdcd8170SKalle Valo int ret; 988bdcd8170SKalle Valo 989772c31eeSKalle Valo if (WARN_ON(ar->fw_board == NULL)) 990772c31eeSKalle Valo return -ENOENT; 991bdcd8170SKalle Valo 99231024d99SKevin Fang /* 99331024d99SKevin Fang * Determine where in Target RAM to write Board Data. 99431024d99SKevin Fang * For AR6004, host determine Target RAM address for 99531024d99SKevin Fang * writing board data. 99631024d99SKevin Fang */ 99731024d99SKevin Fang if (ar->target_type == TARGET_TYPE_AR6004) { 99831024d99SKevin Fang board_address = AR6004_REV1_BOARD_DATA_ADDRESS; 99931024d99SKevin Fang ath6kl_bmi_write(ar, 100031024d99SKevin Fang ath6kl_get_hi_item_addr(ar, 100131024d99SKevin Fang HI_ITEM(hi_board_data)), 100231024d99SKevin Fang (u8 *) &board_address, 4); 100331024d99SKevin Fang } else { 1004bdcd8170SKalle Valo ath6kl_bmi_read(ar, 1005bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 1006bdcd8170SKalle Valo HI_ITEM(hi_board_data)), 1007bdcd8170SKalle Valo (u8 *) &board_address, 4); 100831024d99SKevin Fang } 100931024d99SKevin Fang 1010bdcd8170SKalle Valo /* determine where in target ram to write extended board data */ 1011bdcd8170SKalle Valo ath6kl_bmi_read(ar, 1012bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 1013bdcd8170SKalle Valo HI_ITEM(hi_board_ext_data)), 1014bdcd8170SKalle Valo (u8 *) &board_ext_address, 4); 1015bdcd8170SKalle Valo 1016bdcd8170SKalle Valo if (board_ext_address == 0) { 1017bdcd8170SKalle Valo ath6kl_err("Failed to get board file target address.\n"); 1018bdcd8170SKalle Valo return -EINVAL; 1019bdcd8170SKalle Valo } 1020bdcd8170SKalle Valo 102131024d99SKevin Fang switch (ar->target_type) { 102231024d99SKevin Fang case TARGET_TYPE_AR6003: 102331024d99SKevin Fang board_data_size = AR6003_BOARD_DATA_SZ; 102431024d99SKevin Fang board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ; 102531024d99SKevin Fang break; 102631024d99SKevin Fang case TARGET_TYPE_AR6004: 102731024d99SKevin Fang board_data_size = AR6004_BOARD_DATA_SZ; 102831024d99SKevin Fang board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ; 102931024d99SKevin Fang break; 103031024d99SKevin Fang default: 103131024d99SKevin Fang WARN_ON(1); 103231024d99SKevin Fang return -EINVAL; 103331024d99SKevin Fang break; 103431024d99SKevin Fang } 103531024d99SKevin Fang 103631024d99SKevin Fang if (ar->fw_board_len == (board_data_size + 103731024d99SKevin Fang board_ext_data_size)) { 103831024d99SKevin Fang 1039bdcd8170SKalle Valo /* write extended board data */ 10406bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, 10416bc36431SKalle Valo "writing extended board data to 0x%x (%d B)\n", 10426bc36431SKalle Valo board_ext_address, board_ext_data_size); 10436bc36431SKalle Valo 1044bdcd8170SKalle Valo ret = ath6kl_bmi_write(ar, board_ext_address, 104531024d99SKevin Fang ar->fw_board + board_data_size, 104631024d99SKevin Fang board_ext_data_size); 1047bdcd8170SKalle Valo if (ret) { 1048bdcd8170SKalle Valo ath6kl_err("Failed to write extended board data: %d\n", 1049bdcd8170SKalle Valo ret); 1050bdcd8170SKalle Valo return ret; 1051bdcd8170SKalle Valo } 1052bdcd8170SKalle Valo 1053bdcd8170SKalle Valo /* record that extended board data is initialized */ 105431024d99SKevin Fang param = (board_ext_data_size << 16) | 1; 105531024d99SKevin Fang 1056bdcd8170SKalle Valo ath6kl_bmi_write(ar, 1057bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 1058bdcd8170SKalle Valo HI_ITEM(hi_board_ext_data_config)), 1059bdcd8170SKalle Valo (unsigned char *) ¶m, 4); 1060bdcd8170SKalle Valo } 1061bdcd8170SKalle Valo 106231024d99SKevin Fang if (ar->fw_board_len < board_data_size) { 1063bdcd8170SKalle Valo ath6kl_err("Too small board file: %zu\n", ar->fw_board_len); 1064bdcd8170SKalle Valo ret = -EINVAL; 1065bdcd8170SKalle Valo return ret; 1066bdcd8170SKalle Valo } 1067bdcd8170SKalle Valo 10686bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "writing board file to 0x%x (%d B)\n", 10696bc36431SKalle Valo board_address, board_data_size); 10706bc36431SKalle Valo 1071bdcd8170SKalle Valo ret = ath6kl_bmi_write(ar, board_address, ar->fw_board, 107231024d99SKevin Fang board_data_size); 1073bdcd8170SKalle Valo 1074bdcd8170SKalle Valo if (ret) { 1075bdcd8170SKalle Valo ath6kl_err("Board file bmi write failed: %d\n", ret); 1076bdcd8170SKalle Valo return ret; 1077bdcd8170SKalle Valo } 1078bdcd8170SKalle Valo 1079bdcd8170SKalle Valo /* record the fact that Board Data IS initialized */ 1080bdcd8170SKalle Valo param = 1; 1081bdcd8170SKalle Valo ath6kl_bmi_write(ar, 1082bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 1083bdcd8170SKalle Valo HI_ITEM(hi_board_data_initialized)), 1084bdcd8170SKalle Valo (u8 *)¶m, 4); 1085bdcd8170SKalle Valo 1086bdcd8170SKalle Valo return ret; 1087bdcd8170SKalle Valo } 1088bdcd8170SKalle Valo 1089bdcd8170SKalle Valo static int ath6kl_upload_otp(struct ath6kl *ar) 1090bdcd8170SKalle Valo { 1091bdcd8170SKalle Valo u32 address, param; 1092bef26a7fSKalle Valo bool from_hw = false; 1093bdcd8170SKalle Valo int ret; 1094bdcd8170SKalle Valo 1095772c31eeSKalle Valo if (WARN_ON(ar->fw_otp == NULL)) 1096772c31eeSKalle Valo return -ENOENT; 1097bdcd8170SKalle Valo 1098a01ac414SKalle Valo address = ar->hw.app_load_addr; 1099bdcd8170SKalle Valo 1100ef548626SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "writing otp to 0x%x (%zd B)\n", address, 11016bc36431SKalle Valo ar->fw_otp_len); 11026bc36431SKalle Valo 1103bdcd8170SKalle Valo ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp, 1104bdcd8170SKalle Valo ar->fw_otp_len); 1105bdcd8170SKalle Valo if (ret) { 1106bdcd8170SKalle Valo ath6kl_err("Failed to upload OTP file: %d\n", ret); 1107bdcd8170SKalle Valo return ret; 1108bdcd8170SKalle Valo } 1109bdcd8170SKalle Valo 1110639d0b89SKalle Valo /* read firmware start address */ 1111639d0b89SKalle Valo ret = ath6kl_bmi_read(ar, 1112639d0b89SKalle Valo ath6kl_get_hi_item_addr(ar, 1113639d0b89SKalle Valo HI_ITEM(hi_app_start)), 1114639d0b89SKalle Valo (u8 *) &address, sizeof(address)); 1115639d0b89SKalle Valo 1116639d0b89SKalle Valo if (ret) { 1117639d0b89SKalle Valo ath6kl_err("Failed to read hi_app_start: %d\n", ret); 1118639d0b89SKalle Valo return ret; 1119639d0b89SKalle Valo } 1120639d0b89SKalle Valo 1121bef26a7fSKalle Valo if (ar->hw.app_start_override_addr == 0) { 1122639d0b89SKalle Valo ar->hw.app_start_override_addr = address; 1123bef26a7fSKalle Valo from_hw = true; 1124bef26a7fSKalle Valo } 1125639d0b89SKalle Valo 1126bef26a7fSKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "app_start_override_addr%s 0x%x\n", 1127bef26a7fSKalle Valo from_hw ? " (from hw)" : "", 11286bc36431SKalle Valo ar->hw.app_start_override_addr); 11296bc36431SKalle Valo 1130bdcd8170SKalle Valo /* execute the OTP code */ 1131bef26a7fSKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "executing OTP at 0x%x\n", 1132bef26a7fSKalle Valo ar->hw.app_start_override_addr); 1133bdcd8170SKalle Valo param = 0; 1134bef26a7fSKalle Valo ath6kl_bmi_execute(ar, ar->hw.app_start_override_addr, ¶m); 1135bdcd8170SKalle Valo 1136bdcd8170SKalle Valo return ret; 1137bdcd8170SKalle Valo } 1138bdcd8170SKalle Valo 1139bdcd8170SKalle Valo static int ath6kl_upload_firmware(struct ath6kl *ar) 1140bdcd8170SKalle Valo { 1141bdcd8170SKalle Valo u32 address; 1142bdcd8170SKalle Valo int ret; 1143bdcd8170SKalle Valo 1144772c31eeSKalle Valo if (WARN_ON(ar->fw == NULL)) 1145772c31eeSKalle Valo return -ENOENT; 1146bdcd8170SKalle Valo 1147a01ac414SKalle Valo address = ar->hw.app_load_addr; 1148bdcd8170SKalle Valo 1149ef548626SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "writing firmware to 0x%x (%zd B)\n", 11506bc36431SKalle Valo address, ar->fw_len); 11516bc36431SKalle Valo 1152bdcd8170SKalle Valo ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len); 1153bdcd8170SKalle Valo 1154bdcd8170SKalle Valo if (ret) { 1155bdcd8170SKalle Valo ath6kl_err("Failed to write firmware: %d\n", ret); 1156bdcd8170SKalle Valo return ret; 1157bdcd8170SKalle Valo } 1158bdcd8170SKalle Valo 115931024d99SKevin Fang /* 116031024d99SKevin Fang * Set starting address for firmware 116131024d99SKevin Fang * Don't need to setup app_start override addr on AR6004 116231024d99SKevin Fang */ 116331024d99SKevin Fang if (ar->target_type != TARGET_TYPE_AR6004) { 1164a01ac414SKalle Valo address = ar->hw.app_start_override_addr; 1165bdcd8170SKalle Valo ath6kl_bmi_set_app_start(ar, address); 116631024d99SKevin Fang } 1167bdcd8170SKalle Valo return ret; 1168bdcd8170SKalle Valo } 1169bdcd8170SKalle Valo 1170bdcd8170SKalle Valo static int ath6kl_upload_patch(struct ath6kl *ar) 1171bdcd8170SKalle Valo { 1172bdcd8170SKalle Valo u32 address, param; 1173bdcd8170SKalle Valo int ret; 1174bdcd8170SKalle Valo 1175772c31eeSKalle Valo if (WARN_ON(ar->fw_patch == NULL)) 1176772c31eeSKalle Valo return -ENOENT; 1177bdcd8170SKalle Valo 1178a01ac414SKalle Valo address = ar->hw.dataset_patch_addr; 1179bdcd8170SKalle Valo 1180ef548626SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "writing patch to 0x%x (%zd B)\n", 11816bc36431SKalle Valo address, ar->fw_patch_len); 11826bc36431SKalle Valo 1183bdcd8170SKalle Valo ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len); 1184bdcd8170SKalle Valo if (ret) { 1185bdcd8170SKalle Valo ath6kl_err("Failed to write patch file: %d\n", ret); 1186bdcd8170SKalle Valo return ret; 1187bdcd8170SKalle Valo } 1188bdcd8170SKalle Valo 1189bdcd8170SKalle Valo param = address; 1190bdcd8170SKalle Valo ath6kl_bmi_write(ar, 1191bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 1192bdcd8170SKalle Valo HI_ITEM(hi_dset_list_head)), 1193bdcd8170SKalle Valo (unsigned char *) ¶m, 4); 1194bdcd8170SKalle Valo 1195bdcd8170SKalle Valo return 0; 1196bdcd8170SKalle Valo } 1197bdcd8170SKalle Valo 1198bdcd8170SKalle Valo static int ath6kl_init_upload(struct ath6kl *ar) 1199bdcd8170SKalle Valo { 1200bdcd8170SKalle Valo u32 param, options, sleep, address; 1201bdcd8170SKalle Valo int status = 0; 1202bdcd8170SKalle Valo 120331024d99SKevin Fang if (ar->target_type != TARGET_TYPE_AR6003 && 120431024d99SKevin Fang ar->target_type != TARGET_TYPE_AR6004) 1205bdcd8170SKalle Valo return -EINVAL; 1206bdcd8170SKalle Valo 1207bdcd8170SKalle Valo /* temporarily disable system sleep */ 1208bdcd8170SKalle Valo address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS; 1209bdcd8170SKalle Valo status = ath6kl_bmi_reg_read(ar, address, ¶m); 1210bdcd8170SKalle Valo if (status) 1211bdcd8170SKalle Valo return status; 1212bdcd8170SKalle Valo 1213bdcd8170SKalle Valo options = param; 1214bdcd8170SKalle Valo 1215bdcd8170SKalle Valo param |= ATH6KL_OPTION_SLEEP_DISABLE; 1216bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, address, param); 1217bdcd8170SKalle Valo if (status) 1218bdcd8170SKalle Valo return status; 1219bdcd8170SKalle Valo 1220bdcd8170SKalle Valo address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS; 1221bdcd8170SKalle Valo status = ath6kl_bmi_reg_read(ar, address, ¶m); 1222bdcd8170SKalle Valo if (status) 1223bdcd8170SKalle Valo return status; 1224bdcd8170SKalle Valo 1225bdcd8170SKalle Valo sleep = param; 1226bdcd8170SKalle Valo 1227bdcd8170SKalle Valo param |= SM(SYSTEM_SLEEP_DISABLE, 1); 1228bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, address, param); 1229bdcd8170SKalle Valo if (status) 1230bdcd8170SKalle Valo return status; 1231bdcd8170SKalle Valo 1232bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n", 1233bdcd8170SKalle Valo options, sleep); 1234bdcd8170SKalle Valo 1235bdcd8170SKalle Valo /* program analog PLL register */ 123631024d99SKevin Fang /* no need to control 40/44MHz clock on AR6004 */ 123731024d99SKevin Fang if (ar->target_type != TARGET_TYPE_AR6004) { 1238bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER, 1239bdcd8170SKalle Valo 0xF9104001); 124031024d99SKevin Fang 1241bdcd8170SKalle Valo if (status) 1242bdcd8170SKalle Valo return status; 1243bdcd8170SKalle Valo 1244bdcd8170SKalle Valo /* Run at 80/88MHz by default */ 1245bdcd8170SKalle Valo param = SM(CPU_CLOCK_STANDARD, 1); 1246bdcd8170SKalle Valo 1247bdcd8170SKalle Valo address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS; 1248bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, address, param); 1249bdcd8170SKalle Valo if (status) 1250bdcd8170SKalle Valo return status; 125131024d99SKevin Fang } 1252bdcd8170SKalle Valo 1253bdcd8170SKalle Valo param = 0; 1254bdcd8170SKalle Valo address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS; 1255bdcd8170SKalle Valo param = SM(LPO_CAL_ENABLE, 1); 1256bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, address, param); 1257bdcd8170SKalle Valo if (status) 1258bdcd8170SKalle Valo return status; 1259bdcd8170SKalle Valo 1260bdcd8170SKalle Valo /* WAR to avoid SDIO CRC err */ 1261bdcd8170SKalle Valo if (ar->version.target_ver == AR6003_REV2_VERSION) { 1262bdcd8170SKalle Valo ath6kl_err("temporary war to avoid sdio crc error\n"); 1263bdcd8170SKalle Valo 1264bdcd8170SKalle Valo param = 0x20; 1265bdcd8170SKalle Valo 1266bdcd8170SKalle Valo address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS; 1267bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, address, param); 1268bdcd8170SKalle Valo if (status) 1269bdcd8170SKalle Valo return status; 1270bdcd8170SKalle Valo 1271bdcd8170SKalle Valo address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS; 1272bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, address, param); 1273bdcd8170SKalle Valo if (status) 1274bdcd8170SKalle Valo return status; 1275bdcd8170SKalle Valo 1276bdcd8170SKalle Valo address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS; 1277bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, address, param); 1278bdcd8170SKalle Valo if (status) 1279bdcd8170SKalle Valo return status; 1280bdcd8170SKalle Valo 1281bdcd8170SKalle Valo address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS; 1282bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, address, param); 1283bdcd8170SKalle Valo if (status) 1284bdcd8170SKalle Valo return status; 1285bdcd8170SKalle Valo } 1286bdcd8170SKalle Valo 1287bdcd8170SKalle Valo /* write EEPROM data to Target RAM */ 1288bdcd8170SKalle Valo status = ath6kl_upload_board_file(ar); 1289bdcd8170SKalle Valo if (status) 1290bdcd8170SKalle Valo return status; 1291bdcd8170SKalle Valo 1292bdcd8170SKalle Valo /* transfer One time Programmable data */ 1293bdcd8170SKalle Valo status = ath6kl_upload_otp(ar); 1294bdcd8170SKalle Valo if (status) 1295bdcd8170SKalle Valo return status; 1296bdcd8170SKalle Valo 1297bdcd8170SKalle Valo /* Download Target firmware */ 1298bdcd8170SKalle Valo status = ath6kl_upload_firmware(ar); 1299bdcd8170SKalle Valo if (status) 1300bdcd8170SKalle Valo return status; 1301bdcd8170SKalle Valo 1302bdcd8170SKalle Valo status = ath6kl_upload_patch(ar); 1303bdcd8170SKalle Valo if (status) 1304bdcd8170SKalle Valo return status; 1305bdcd8170SKalle Valo 1306bdcd8170SKalle Valo /* Restore system sleep */ 1307bdcd8170SKalle Valo address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS; 1308bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, address, sleep); 1309bdcd8170SKalle Valo if (status) 1310bdcd8170SKalle Valo return status; 1311bdcd8170SKalle Valo 1312bdcd8170SKalle Valo address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS; 1313bdcd8170SKalle Valo param = options | 0x20; 1314bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, address, param); 1315bdcd8170SKalle Valo if (status) 1316bdcd8170SKalle Valo return status; 1317bdcd8170SKalle Valo 1318bdcd8170SKalle Valo /* Configure GPIO AR6003 UART */ 1319bdcd8170SKalle Valo param = CONFIG_AR600x_DEBUG_UART_TX_PIN; 1320bdcd8170SKalle Valo status = ath6kl_bmi_write(ar, 1321bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 1322bdcd8170SKalle Valo HI_ITEM(hi_dbg_uart_txpin)), 1323bdcd8170SKalle Valo (u8 *)¶m, 4); 1324bdcd8170SKalle Valo 1325bdcd8170SKalle Valo return status; 1326bdcd8170SKalle Valo } 1327bdcd8170SKalle Valo 1328a01ac414SKalle Valo static int ath6kl_init_hw_params(struct ath6kl *ar) 1329a01ac414SKalle Valo { 1330a01ac414SKalle Valo switch (ar->version.target_ver) { 1331a01ac414SKalle Valo case AR6003_REV2_VERSION: 1332a01ac414SKalle Valo ar->hw.dataset_patch_addr = AR6003_REV2_DATASET_PATCH_ADDRESS; 1333a01ac414SKalle Valo ar->hw.app_load_addr = AR6003_REV2_APP_LOAD_ADDRESS; 1334991b27eaSKalle Valo ar->hw.board_ext_data_addr = AR6003_REV2_BOARD_EXT_DATA_ADDRESS; 1335991b27eaSKalle Valo ar->hw.reserved_ram_size = AR6003_REV2_RAM_RESERVE_SIZE; 1336bef26a7fSKalle Valo 1337bef26a7fSKalle Valo /* hw2.0 needs override address hardcoded */ 1338bef26a7fSKalle Valo ar->hw.app_start_override_addr = 0x944C00; 1339bef26a7fSKalle Valo 1340a01ac414SKalle Valo break; 1341a01ac414SKalle Valo case AR6003_REV3_VERSION: 1342a01ac414SKalle Valo ar->hw.dataset_patch_addr = AR6003_REV3_DATASET_PATCH_ADDRESS; 1343a01ac414SKalle Valo ar->hw.app_load_addr = 0x1234; 1344991b27eaSKalle Valo ar->hw.board_ext_data_addr = AR6003_REV3_BOARD_EXT_DATA_ADDRESS; 1345991b27eaSKalle Valo ar->hw.reserved_ram_size = AR6003_REV3_RAM_RESERVE_SIZE; 1346a01ac414SKalle Valo break; 1347a01ac414SKalle Valo case AR6004_REV1_VERSION: 1348a01ac414SKalle Valo ar->hw.dataset_patch_addr = AR6003_REV2_DATASET_PATCH_ADDRESS; 1349a01ac414SKalle Valo ar->hw.app_load_addr = AR6003_REV3_APP_LOAD_ADDRESS; 1350991b27eaSKalle Valo ar->hw.board_ext_data_addr = AR6004_REV1_BOARD_EXT_DATA_ADDRESS; 1351991b27eaSKalle Valo ar->hw.reserved_ram_size = AR6004_REV1_RAM_RESERVE_SIZE; 1352a01ac414SKalle Valo break; 1353a01ac414SKalle Valo default: 1354a01ac414SKalle Valo ath6kl_err("Unsupported hardware version: 0x%x\n", 1355a01ac414SKalle Valo ar->version.target_ver); 1356a01ac414SKalle Valo return -EINVAL; 1357a01ac414SKalle Valo } 1358a01ac414SKalle Valo 13596bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, 13606bc36431SKalle Valo "target_ver 0x%x target_type 0x%x dataset_patch 0x%x app_load_addr 0x%x\n", 13616bc36431SKalle Valo ar->version.target_ver, ar->target_type, 13626bc36431SKalle Valo ar->hw.dataset_patch_addr, ar->hw.app_load_addr); 13636bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, 13646bc36431SKalle Valo "app_start_override_addr 0x%x board_ext_data_addr 0x%x reserved_ram_size 0x%x", 13656bc36431SKalle Valo ar->hw.app_start_override_addr, ar->hw.board_ext_data_addr, 13666bc36431SKalle Valo ar->hw.reserved_ram_size); 13676bc36431SKalle Valo 1368a01ac414SKalle Valo return 0; 1369a01ac414SKalle Valo } 1370a01ac414SKalle Valo 13715fe4dffbSKalle Valo int ath6kl_init_hw_start(struct ath6kl *ar) 137220459ee2SKalle Valo { 137320459ee2SKalle Valo long timeleft; 137420459ee2SKalle Valo int ret, i; 137520459ee2SKalle Valo 13765fe4dffbSKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "hw start\n"); 13775fe4dffbSKalle Valo 137820459ee2SKalle Valo ret = ath6kl_hif_power_on(ar); 137920459ee2SKalle Valo if (ret) 138020459ee2SKalle Valo return ret; 138120459ee2SKalle Valo 138220459ee2SKalle Valo ret = ath6kl_configure_target(ar); 138320459ee2SKalle Valo if (ret) 138420459ee2SKalle Valo goto err_power_off; 138520459ee2SKalle Valo 138620459ee2SKalle Valo ret = ath6kl_init_upload(ar); 138720459ee2SKalle Valo if (ret) 138820459ee2SKalle Valo goto err_power_off; 138920459ee2SKalle Valo 139020459ee2SKalle Valo /* Do we need to finish the BMI phase */ 139120459ee2SKalle Valo /* FIXME: return error from ath6kl_bmi_done() */ 139220459ee2SKalle Valo if (ath6kl_bmi_done(ar)) { 139320459ee2SKalle Valo ret = -EIO; 139420459ee2SKalle Valo goto err_power_off; 139520459ee2SKalle Valo } 139620459ee2SKalle Valo 139720459ee2SKalle Valo /* 139820459ee2SKalle Valo * The reason we have to wait for the target here is that the 139920459ee2SKalle Valo * driver layer has to init BMI in order to set the host block 140020459ee2SKalle Valo * size. 140120459ee2SKalle Valo */ 140220459ee2SKalle Valo if (ath6kl_htc_wait_target(ar->htc_target)) { 140320459ee2SKalle Valo ret = -EIO; 140420459ee2SKalle Valo goto err_power_off; 140520459ee2SKalle Valo } 140620459ee2SKalle Valo 140720459ee2SKalle Valo if (ath6kl_init_service_ep(ar)) { 140820459ee2SKalle Valo ret = -EIO; 140920459ee2SKalle Valo goto err_cleanup_scatter; 141020459ee2SKalle Valo } 141120459ee2SKalle Valo 141220459ee2SKalle Valo /* setup credit distribution */ 141320459ee2SKalle Valo ath6kl_credit_setup(ar->htc_target, &ar->credit_state_info); 141420459ee2SKalle Valo 141520459ee2SKalle Valo /* start HTC */ 141620459ee2SKalle Valo ret = ath6kl_htc_start(ar->htc_target); 141720459ee2SKalle Valo if (ret) { 141820459ee2SKalle Valo /* FIXME: call this */ 141920459ee2SKalle Valo ath6kl_cookie_cleanup(ar); 142020459ee2SKalle Valo goto err_cleanup_scatter; 142120459ee2SKalle Valo } 142220459ee2SKalle Valo 142320459ee2SKalle Valo /* Wait for Wmi event to be ready */ 142420459ee2SKalle Valo timeleft = wait_event_interruptible_timeout(ar->event_wq, 142520459ee2SKalle Valo test_bit(WMI_READY, 142620459ee2SKalle Valo &ar->flag), 142720459ee2SKalle Valo WMI_TIMEOUT); 142820459ee2SKalle Valo 142920459ee2SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "firmware booted\n"); 143020459ee2SKalle Valo 143120459ee2SKalle Valo if (ar->version.abi_ver != ATH6KL_ABI_VERSION) { 143220459ee2SKalle Valo ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n", 143320459ee2SKalle Valo ATH6KL_ABI_VERSION, ar->version.abi_ver); 143420459ee2SKalle Valo ret = -EIO; 143520459ee2SKalle Valo goto err_htc_stop; 143620459ee2SKalle Valo } 143720459ee2SKalle Valo 143820459ee2SKalle Valo if (!timeleft || signal_pending(current)) { 143920459ee2SKalle Valo ath6kl_err("wmi is not ready or wait was interrupted\n"); 144020459ee2SKalle Valo ret = -EIO; 144120459ee2SKalle Valo goto err_htc_stop; 144220459ee2SKalle Valo } 144320459ee2SKalle Valo 144420459ee2SKalle Valo ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__); 144520459ee2SKalle Valo 144620459ee2SKalle Valo /* communicate the wmi protocol verision to the target */ 144720459ee2SKalle Valo /* FIXME: return error */ 144820459ee2SKalle Valo if ((ath6kl_set_host_app_area(ar)) != 0) 144920459ee2SKalle Valo ath6kl_err("unable to set the host app area\n"); 145020459ee2SKalle Valo 145120459ee2SKalle Valo for (i = 0; i < MAX_NUM_VIF; i++) { 145220459ee2SKalle Valo ret = ath6kl_target_config_wlan_params(ar, i); 145320459ee2SKalle Valo if (ret) 145420459ee2SKalle Valo goto err_htc_stop; 145520459ee2SKalle Valo } 145620459ee2SKalle Valo 145776a9fbe2SKalle Valo ar->state = ATH6KL_STATE_ON; 145876a9fbe2SKalle Valo 145920459ee2SKalle Valo return 0; 146020459ee2SKalle Valo 146120459ee2SKalle Valo err_htc_stop: 146220459ee2SKalle Valo ath6kl_htc_stop(ar->htc_target); 146320459ee2SKalle Valo err_cleanup_scatter: 146420459ee2SKalle Valo ath6kl_hif_cleanup_scatter(ar); 146520459ee2SKalle Valo err_power_off: 146620459ee2SKalle Valo ath6kl_hif_power_off(ar); 146720459ee2SKalle Valo 146820459ee2SKalle Valo return ret; 146920459ee2SKalle Valo } 147020459ee2SKalle Valo 14715fe4dffbSKalle Valo int ath6kl_init_hw_stop(struct ath6kl *ar) 14725fe4dffbSKalle Valo { 14735fe4dffbSKalle Valo int ret; 14745fe4dffbSKalle Valo 14755fe4dffbSKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "hw stop\n"); 14765fe4dffbSKalle Valo 14775fe4dffbSKalle Valo ath6kl_htc_stop(ar->htc_target); 14785fe4dffbSKalle Valo 14795fe4dffbSKalle Valo ath6kl_hif_stop(ar); 14805fe4dffbSKalle Valo 14815fe4dffbSKalle Valo ath6kl_bmi_reset(ar); 14825fe4dffbSKalle Valo 14835fe4dffbSKalle Valo ret = ath6kl_hif_power_off(ar); 14845fe4dffbSKalle Valo if (ret) 14855fe4dffbSKalle Valo ath6kl_warn("failed to power off hif: %d\n", ret); 14865fe4dffbSKalle Valo 148776a9fbe2SKalle Valo ar->state = ATH6KL_STATE_OFF; 148876a9fbe2SKalle Valo 14895fe4dffbSKalle Valo return 0; 14905fe4dffbSKalle Valo } 14915fe4dffbSKalle Valo 1492bdcd8170SKalle Valo int ath6kl_core_init(struct ath6kl *ar) 1493bdcd8170SKalle Valo { 1494bdcd8170SKalle Valo struct ath6kl_bmi_target_info targ_info; 149561448a93SKalle Valo struct net_device *ndev; 149620459ee2SKalle Valo int ret = 0, i; 1497bdcd8170SKalle Valo 1498bdcd8170SKalle Valo ar->ath6kl_wq = create_singlethread_workqueue("ath6kl"); 1499bdcd8170SKalle Valo if (!ar->ath6kl_wq) 1500bdcd8170SKalle Valo return -ENOMEM; 1501bdcd8170SKalle Valo 1502bdcd8170SKalle Valo ret = ath6kl_bmi_init(ar); 1503bdcd8170SKalle Valo if (ret) 1504bdcd8170SKalle Valo goto err_wq; 1505bdcd8170SKalle Valo 150620459ee2SKalle Valo /* 150720459ee2SKalle Valo * Turn on power to get hardware (target) version and leave power 150820459ee2SKalle Valo * on delibrately as we will boot the hardware anyway within few 150920459ee2SKalle Valo * seconds. 151020459ee2SKalle Valo */ 1511b2e75698SKalle Valo ret = ath6kl_hif_power_on(ar); 1512bdcd8170SKalle Valo if (ret) 1513bdcd8170SKalle Valo goto err_bmi_cleanup; 1514bdcd8170SKalle Valo 1515b2e75698SKalle Valo ret = ath6kl_bmi_get_target_info(ar, &targ_info); 1516b2e75698SKalle Valo if (ret) 1517b2e75698SKalle Valo goto err_power_off; 1518b2e75698SKalle Valo 1519bdcd8170SKalle Valo ar->version.target_ver = le32_to_cpu(targ_info.version); 1520bdcd8170SKalle Valo ar->target_type = le32_to_cpu(targ_info.type); 1521be98e3a4SVasanthakumar Thiagarajan ar->wiphy->hw_version = le32_to_cpu(targ_info.version); 1522bdcd8170SKalle Valo 1523a01ac414SKalle Valo ret = ath6kl_init_hw_params(ar); 1524a01ac414SKalle Valo if (ret) 1525b2e75698SKalle Valo goto err_power_off; 1526a01ac414SKalle Valo 1527ad226ec2SKalle Valo ar->htc_target = ath6kl_htc_create(ar); 1528bdcd8170SKalle Valo 1529bdcd8170SKalle Valo if (!ar->htc_target) { 1530bdcd8170SKalle Valo ret = -ENOMEM; 1531b2e75698SKalle Valo goto err_power_off; 1532bdcd8170SKalle Valo } 1533bdcd8170SKalle Valo 1534772c31eeSKalle Valo ret = ath6kl_fetch_firmwares(ar); 1535772c31eeSKalle Valo if (ret) 1536772c31eeSKalle Valo goto err_htc_cleanup; 1537772c31eeSKalle Valo 153861448a93SKalle Valo /* FIXME: we should free all firmwares in the error cases below */ 153961448a93SKalle Valo 154061448a93SKalle Valo /* Indicate that WMI is enabled (although not ready yet) */ 154161448a93SKalle Valo set_bit(WMI_ENABLED, &ar->flag); 154261448a93SKalle Valo ar->wmi = ath6kl_wmi_init(ar); 154361448a93SKalle Valo if (!ar->wmi) { 154461448a93SKalle Valo ath6kl_err("failed to initialize wmi\n"); 154561448a93SKalle Valo ret = -EIO; 154661448a93SKalle Valo goto err_htc_cleanup; 154761448a93SKalle Valo } 154861448a93SKalle Valo 154961448a93SKalle Valo ath6kl_dbg(ATH6KL_DBG_TRC, "%s: got wmi @ 0x%p.\n", __func__, ar->wmi); 155061448a93SKalle Valo 155161448a93SKalle Valo ret = ath6kl_register_ieee80211_hw(ar); 155261448a93SKalle Valo if (ret) 155361448a93SKalle Valo goto err_node_cleanup; 155461448a93SKalle Valo 155561448a93SKalle Valo ret = ath6kl_debug_init(ar); 155661448a93SKalle Valo if (ret) { 155761448a93SKalle Valo wiphy_unregister(ar->wiphy); 155861448a93SKalle Valo goto err_node_cleanup; 155961448a93SKalle Valo } 156061448a93SKalle Valo 156161448a93SKalle Valo for (i = 0; i < MAX_NUM_VIF; i++) 156261448a93SKalle Valo ar->avail_idx_map |= BIT(i); 156361448a93SKalle Valo 156461448a93SKalle Valo rtnl_lock(); 156561448a93SKalle Valo 156661448a93SKalle Valo /* Add an initial station interface */ 156761448a93SKalle Valo ndev = ath6kl_interface_add(ar, "wlan%d", NL80211_IFTYPE_STATION, 0, 156861448a93SKalle Valo INFRA_NETWORK); 156961448a93SKalle Valo 157061448a93SKalle Valo rtnl_unlock(); 157161448a93SKalle Valo 157261448a93SKalle Valo if (!ndev) { 157361448a93SKalle Valo ath6kl_err("Failed to instantiate a network device\n"); 157461448a93SKalle Valo ret = -ENOMEM; 157561448a93SKalle Valo wiphy_unregister(ar->wiphy); 157661448a93SKalle Valo goto err_debug_init; 157761448a93SKalle Valo } 157861448a93SKalle Valo 157961448a93SKalle Valo 158061448a93SKalle Valo ath6kl_dbg(ATH6KL_DBG_TRC, "%s: name=%s dev=0x%p, ar=0x%p\n", 158161448a93SKalle Valo __func__, ndev->name, ndev, ar); 158261448a93SKalle Valo 158361448a93SKalle Valo /* setup access class priority mappings */ 158461448a93SKalle Valo ar->ac_stream_pri_map[WMM_AC_BK] = 0; /* lowest */ 158561448a93SKalle Valo ar->ac_stream_pri_map[WMM_AC_BE] = 1; 158661448a93SKalle Valo ar->ac_stream_pri_map[WMM_AC_VI] = 2; 158761448a93SKalle Valo ar->ac_stream_pri_map[WMM_AC_VO] = 3; /* highest */ 158861448a93SKalle Valo 158961448a93SKalle Valo /* give our connected endpoints some buffers */ 159061448a93SKalle Valo ath6kl_rx_refill(ar->htc_target, ar->ctrl_ep); 159161448a93SKalle Valo ath6kl_rx_refill(ar->htc_target, ar->ac2ep_map[WMM_AC_BE]); 159261448a93SKalle Valo 159361448a93SKalle Valo /* allocate some buffers that handle larger AMSDU frames */ 159461448a93SKalle Valo ath6kl_refill_amsdu_rxbufs(ar, ATH6KL_MAX_AMSDU_RX_BUFFERS); 159561448a93SKalle Valo 159661448a93SKalle Valo ath6kl_cookie_init(ar); 159761448a93SKalle Valo 159861448a93SKalle Valo ar->conf_flags = ATH6KL_CONF_IGNORE_ERP_BARKER | 159961448a93SKalle Valo ATH6KL_CONF_ENABLE_11N | ATH6KL_CONF_ENABLE_TX_BURST; 160061448a93SKalle Valo 16018277de15SKalle Valo if (suspend_cutpower) 16028277de15SKalle Valo ar->conf_flags |= ATH6KL_CONF_SUSPEND_CUTPOWER; 16038277de15SKalle Valo 160461448a93SKalle Valo ar->wiphy->flags |= WIPHY_FLAG_SUPPORTS_FW_ROAM | 16057c4ef712SJohannes Berg WIPHY_FLAG_HAVE_AP_SME | 16067c4ef712SJohannes Berg WIPHY_FLAG_HAS_REMAIN_ON_CHANNEL; 160761448a93SKalle Valo 16085fe4dffbSKalle Valo set_bit(FIRST_BOOT, &ar->flag); 16095fe4dffbSKalle Valo 16105fe4dffbSKalle Valo ret = ath6kl_init_hw_start(ar); 161120459ee2SKalle Valo if (ret) { 16125fe4dffbSKalle Valo ath6kl_err("Failed to start hardware: %d\n", ret); 161320459ee2SKalle Valo goto err_rxbuf_cleanup; 161461448a93SKalle Valo } 161561448a93SKalle Valo 161661448a93SKalle Valo /* 161761448a93SKalle Valo * Set mac address which is received in ready event 161861448a93SKalle Valo * FIXME: Move to ath6kl_interface_add() 161961448a93SKalle Valo */ 162061448a93SKalle Valo memcpy(ndev->dev_addr, ar->mac_addr, ETH_ALEN); 1621bdcd8170SKalle Valo 1622bdcd8170SKalle Valo return ret; 1623bdcd8170SKalle Valo 162461448a93SKalle Valo err_rxbuf_cleanup: 162561448a93SKalle Valo ath6kl_htc_flush_rx_buf(ar->htc_target); 162661448a93SKalle Valo ath6kl_cleanup_amsdu_rxbufs(ar); 162761448a93SKalle Valo rtnl_lock(); 162861448a93SKalle Valo ath6kl_deinit_if_data(netdev_priv(ndev)); 162961448a93SKalle Valo rtnl_unlock(); 163061448a93SKalle Valo wiphy_unregister(ar->wiphy); 163161448a93SKalle Valo err_debug_init: 163261448a93SKalle Valo ath6kl_debug_cleanup(ar); 163361448a93SKalle Valo err_node_cleanup: 163461448a93SKalle Valo ath6kl_wmi_shutdown(ar->wmi); 163561448a93SKalle Valo clear_bit(WMI_ENABLED, &ar->flag); 163661448a93SKalle Valo ar->wmi = NULL; 1637bdcd8170SKalle Valo err_htc_cleanup: 1638ad226ec2SKalle Valo ath6kl_htc_cleanup(ar->htc_target); 1639b2e75698SKalle Valo err_power_off: 1640b2e75698SKalle Valo ath6kl_hif_power_off(ar); 1641bdcd8170SKalle Valo err_bmi_cleanup: 1642bdcd8170SKalle Valo ath6kl_bmi_cleanup(ar); 1643bdcd8170SKalle Valo err_wq: 1644bdcd8170SKalle Valo destroy_workqueue(ar->ath6kl_wq); 16458dafb70eSVasanthakumar Thiagarajan 1646bdcd8170SKalle Valo return ret; 1647bdcd8170SKalle Valo } 1648bdcd8170SKalle Valo 164955055976SVasanthakumar Thiagarajan void ath6kl_cleanup_vif(struct ath6kl_vif *vif, bool wmi_ready) 16506db8fa53SVasanthakumar Thiagarajan { 16516db8fa53SVasanthakumar Thiagarajan static u8 bcast_mac[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; 16526db8fa53SVasanthakumar Thiagarajan bool discon_issued; 16536db8fa53SVasanthakumar Thiagarajan 16546db8fa53SVasanthakumar Thiagarajan netif_stop_queue(vif->ndev); 16556db8fa53SVasanthakumar Thiagarajan 16566db8fa53SVasanthakumar Thiagarajan clear_bit(WLAN_ENABLED, &vif->flags); 16576db8fa53SVasanthakumar Thiagarajan 16586db8fa53SVasanthakumar Thiagarajan if (wmi_ready) { 16596db8fa53SVasanthakumar Thiagarajan discon_issued = test_bit(CONNECTED, &vif->flags) || 16606db8fa53SVasanthakumar Thiagarajan test_bit(CONNECT_PEND, &vif->flags); 16616db8fa53SVasanthakumar Thiagarajan ath6kl_disconnect(vif); 16626db8fa53SVasanthakumar Thiagarajan del_timer(&vif->disconnect_timer); 16636db8fa53SVasanthakumar Thiagarajan 16646db8fa53SVasanthakumar Thiagarajan if (discon_issued) 16656db8fa53SVasanthakumar Thiagarajan ath6kl_disconnect_event(vif, DISCONNECT_CMD, 16666db8fa53SVasanthakumar Thiagarajan (vif->nw_type & AP_NETWORK) ? 16676db8fa53SVasanthakumar Thiagarajan bcast_mac : vif->bssid, 16686db8fa53SVasanthakumar Thiagarajan 0, NULL, 0); 16696db8fa53SVasanthakumar Thiagarajan } 16706db8fa53SVasanthakumar Thiagarajan 16716db8fa53SVasanthakumar Thiagarajan if (vif->scan_req) { 16726db8fa53SVasanthakumar Thiagarajan cfg80211_scan_done(vif->scan_req, true); 16736db8fa53SVasanthakumar Thiagarajan vif->scan_req = NULL; 16746db8fa53SVasanthakumar Thiagarajan } 16756db8fa53SVasanthakumar Thiagarajan } 16766db8fa53SVasanthakumar Thiagarajan 1677bdcd8170SKalle Valo void ath6kl_stop_txrx(struct ath6kl *ar) 1678bdcd8170SKalle Valo { 1679990bd915SVasanthakumar Thiagarajan struct ath6kl_vif *vif, *tmp_vif; 1680bdcd8170SKalle Valo 1681bdcd8170SKalle Valo set_bit(DESTROY_IN_PROGRESS, &ar->flag); 1682bdcd8170SKalle Valo 1683bdcd8170SKalle Valo if (down_interruptible(&ar->sem)) { 1684bdcd8170SKalle Valo ath6kl_err("down_interruptible failed\n"); 1685bdcd8170SKalle Valo return; 1686bdcd8170SKalle Valo } 1687bdcd8170SKalle Valo 168811f6e40dSVasanthakumar Thiagarajan spin_lock_bh(&ar->list_lock); 1689990bd915SVasanthakumar Thiagarajan list_for_each_entry_safe(vif, tmp_vif, &ar->vif_list, list) { 1690990bd915SVasanthakumar Thiagarajan list_del(&vif->list); 169111f6e40dSVasanthakumar Thiagarajan spin_unlock_bh(&ar->list_lock); 1692990bd915SVasanthakumar Thiagarajan ath6kl_cleanup_vif(vif, test_bit(WMI_READY, &ar->flag)); 169327929723SVasanthakumar Thiagarajan rtnl_lock(); 169427929723SVasanthakumar Thiagarajan ath6kl_deinit_if_data(vif); 169527929723SVasanthakumar Thiagarajan rtnl_unlock(); 169611f6e40dSVasanthakumar Thiagarajan spin_lock_bh(&ar->list_lock); 1697990bd915SVasanthakumar Thiagarajan } 169811f6e40dSVasanthakumar Thiagarajan spin_unlock_bh(&ar->list_lock); 1699bdcd8170SKalle Valo 17006db8fa53SVasanthakumar Thiagarajan clear_bit(WMI_READY, &ar->flag); 17016db8fa53SVasanthakumar Thiagarajan 17026db8fa53SVasanthakumar Thiagarajan /* 17036db8fa53SVasanthakumar Thiagarajan * After wmi_shudown all WMI events will be dropped. We 17046db8fa53SVasanthakumar Thiagarajan * need to cleanup the buffers allocated in AP mode and 17056db8fa53SVasanthakumar Thiagarajan * give disconnect notification to stack, which usually 17066db8fa53SVasanthakumar Thiagarajan * happens in the disconnect_event. Simulate the disconnect 17076db8fa53SVasanthakumar Thiagarajan * event by calling the function directly. Sometimes 17086db8fa53SVasanthakumar Thiagarajan * disconnect_event will be received when the debug logs 17096db8fa53SVasanthakumar Thiagarajan * are collected. 17106db8fa53SVasanthakumar Thiagarajan */ 17116db8fa53SVasanthakumar Thiagarajan ath6kl_wmi_shutdown(ar->wmi); 17126db8fa53SVasanthakumar Thiagarajan 17136db8fa53SVasanthakumar Thiagarajan clear_bit(WMI_ENABLED, &ar->flag); 17146db8fa53SVasanthakumar Thiagarajan if (ar->htc_target) { 17156db8fa53SVasanthakumar Thiagarajan ath6kl_dbg(ATH6KL_DBG_TRC, "%s: shut down htc\n", __func__); 17166db8fa53SVasanthakumar Thiagarajan ath6kl_htc_stop(ar->htc_target); 1717bdcd8170SKalle Valo } 1718bdcd8170SKalle Valo 1719bdcd8170SKalle Valo /* 17206db8fa53SVasanthakumar Thiagarajan * Try to reset the device if we can. The driver may have been 17216db8fa53SVasanthakumar Thiagarajan * configure NOT to reset the target during a debug session. 1722bdcd8170SKalle Valo */ 17236db8fa53SVasanthakumar Thiagarajan ath6kl_dbg(ATH6KL_DBG_TRC, 17246db8fa53SVasanthakumar Thiagarajan "attempting to reset target on instance destroy\n"); 17256db8fa53SVasanthakumar Thiagarajan ath6kl_reset_device(ar, ar->target_type, true, true); 1726bdcd8170SKalle Valo 17276db8fa53SVasanthakumar Thiagarajan clear_bit(WLAN_ENABLED, &ar->flag); 1728bdcd8170SKalle Valo } 1729