1bdcd8170SKalle Valo 2bdcd8170SKalle Valo /* 3bdcd8170SKalle Valo * Copyright (c) 2011 Atheros Communications Inc. 4bdcd8170SKalle Valo * 5bdcd8170SKalle Valo * Permission to use, copy, modify, and/or distribute this software for any 6bdcd8170SKalle Valo * purpose with or without fee is hereby granted, provided that the above 7bdcd8170SKalle Valo * copyright notice and this permission notice appear in all copies. 8bdcd8170SKalle Valo * 9bdcd8170SKalle Valo * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10bdcd8170SKalle Valo * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11bdcd8170SKalle Valo * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12bdcd8170SKalle Valo * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13bdcd8170SKalle Valo * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14bdcd8170SKalle Valo * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15bdcd8170SKalle Valo * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16bdcd8170SKalle Valo */ 17bdcd8170SKalle Valo 18c6efe578SStephen Rothwell #include <linux/moduleparam.h> 19f7830202SSangwook Lee #include <linux/errno.h> 2092ecbff4SSam Leffler #include <linux/of.h> 21bdcd8170SKalle Valo #include <linux/mmc/sdio_func.h> 22bdcd8170SKalle Valo #include "core.h" 23bdcd8170SKalle Valo #include "cfg80211.h" 24bdcd8170SKalle Valo #include "target.h" 25bdcd8170SKalle Valo #include "debug.h" 26bdcd8170SKalle Valo #include "hif-ops.h" 27bdcd8170SKalle Valo 28bdcd8170SKalle Valo unsigned int debug_mask; 29003353b0SKalle Valo static unsigned int testmode; 308277de15SKalle Valo static bool suspend_cutpower; 31bdcd8170SKalle Valo 32bdcd8170SKalle Valo module_param(debug_mask, uint, 0644); 33003353b0SKalle Valo module_param(testmode, uint, 0644); 348277de15SKalle Valo module_param(suspend_cutpower, bool, 0444); 35bdcd8170SKalle Valo 36856f4b31SKalle Valo static const struct ath6kl_hw hw_list[] = { 37856f4b31SKalle Valo { 380d0192baSKalle Valo .id = AR6003_HW_2_0_VERSION, 39293badf4SKalle Valo .name = "ar6003 hw 2.0", 40856f4b31SKalle Valo .dataset_patch_addr = 0x57e884, 41856f4b31SKalle Valo .app_load_addr = 0x543180, 42856f4b31SKalle Valo .board_ext_data_addr = 0x57e500, 43856f4b31SKalle Valo .reserved_ram_size = 6912, 44856f4b31SKalle Valo 45856f4b31SKalle Valo /* hw2.0 needs override address hardcoded */ 46856f4b31SKalle Valo .app_start_override_addr = 0x944C00, 47d1a9421dSKalle Valo 48d1a9421dSKalle Valo .fw_otp = AR6003_HW_2_0_OTP_FILE, 49d1a9421dSKalle Valo .fw = AR6003_HW_2_0_FIRMWARE_FILE, 50d1a9421dSKalle Valo .fw_tcmd = AR6003_HW_2_0_TCMD_FIRMWARE_FILE, 51d1a9421dSKalle Valo .fw_patch = AR6003_HW_2_0_PATCH_FILE, 52d1a9421dSKalle Valo .fw_api2 = AR6003_HW_2_0_FIRMWARE_2_FILE, 53d1a9421dSKalle Valo .fw_board = AR6003_HW_2_0_BOARD_DATA_FILE, 54d1a9421dSKalle Valo .fw_default_board = AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE, 55856f4b31SKalle Valo }, 56856f4b31SKalle Valo { 570d0192baSKalle Valo .id = AR6003_HW_2_1_1_VERSION, 58293badf4SKalle Valo .name = "ar6003 hw 2.1.1", 59856f4b31SKalle Valo .dataset_patch_addr = 0x57ff74, 60856f4b31SKalle Valo .app_load_addr = 0x1234, 61856f4b31SKalle Valo .board_ext_data_addr = 0x542330, 62856f4b31SKalle Valo .reserved_ram_size = 512, 63d1a9421dSKalle Valo 64d1a9421dSKalle Valo .fw_otp = AR6003_HW_2_1_1_OTP_FILE, 65d1a9421dSKalle Valo .fw = AR6003_HW_2_1_1_FIRMWARE_FILE, 66d1a9421dSKalle Valo .fw_tcmd = AR6003_HW_2_1_1_TCMD_FIRMWARE_FILE, 67d1a9421dSKalle Valo .fw_patch = AR6003_HW_2_1_1_PATCH_FILE, 68d1a9421dSKalle Valo .fw_api2 = AR6003_HW_2_1_1_FIRMWARE_2_FILE, 69d1a9421dSKalle Valo .fw_board = AR6003_HW_2_1_1_BOARD_DATA_FILE, 70d1a9421dSKalle Valo .fw_default_board = AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE, 71856f4b31SKalle Valo }, 72856f4b31SKalle Valo { 730d0192baSKalle Valo .id = AR6004_HW_1_0_VERSION, 74293badf4SKalle Valo .name = "ar6004 hw 1.0", 75856f4b31SKalle Valo .dataset_patch_addr = 0x57e884, 76856f4b31SKalle Valo .app_load_addr = 0x1234, 77856f4b31SKalle Valo .board_ext_data_addr = 0x437000, 78856f4b31SKalle Valo .reserved_ram_size = 19456, 790d4d72bfSKalle Valo .board_addr = 0x433900, 80d1a9421dSKalle Valo 81d1a9421dSKalle Valo .fw = AR6004_HW_1_0_FIRMWARE_FILE, 82d1a9421dSKalle Valo .fw_api2 = AR6004_HW_1_0_FIRMWARE_2_FILE, 83d1a9421dSKalle Valo .fw_board = AR6004_HW_1_0_BOARD_DATA_FILE, 84d1a9421dSKalle Valo .fw_default_board = AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE, 85856f4b31SKalle Valo }, 86856f4b31SKalle Valo { 870d0192baSKalle Valo .id = AR6004_HW_1_1_VERSION, 88293badf4SKalle Valo .name = "ar6004 hw 1.1", 89856f4b31SKalle Valo .dataset_patch_addr = 0x57e884, 90856f4b31SKalle Valo .app_load_addr = 0x1234, 91856f4b31SKalle Valo .board_ext_data_addr = 0x437000, 92856f4b31SKalle Valo .reserved_ram_size = 11264, 930d4d72bfSKalle Valo .board_addr = 0x43d400, 94d1a9421dSKalle Valo 95d1a9421dSKalle Valo .fw = AR6004_HW_1_1_FIRMWARE_FILE, 96d1a9421dSKalle Valo .fw_api2 = AR6004_HW_1_1_FIRMWARE_2_FILE, 97d1a9421dSKalle Valo .fw_board = AR6004_HW_1_1_BOARD_DATA_FILE, 98d1a9421dSKalle Valo .fw_default_board = AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE, 99856f4b31SKalle Valo }, 100856f4b31SKalle Valo }; 101856f4b31SKalle Valo 102bdcd8170SKalle Valo /* 103bdcd8170SKalle Valo * Include definitions here that can be used to tune the WLAN module 104bdcd8170SKalle Valo * behavior. Different customers can tune the behavior as per their needs, 105bdcd8170SKalle Valo * here. 106bdcd8170SKalle Valo */ 107bdcd8170SKalle Valo 108bdcd8170SKalle Valo /* 109bdcd8170SKalle Valo * This configuration item enable/disable keepalive support. 110bdcd8170SKalle Valo * Keepalive support: In the absence of any data traffic to AP, null 111bdcd8170SKalle Valo * frames will be sent to the AP at periodic interval, to keep the association 112bdcd8170SKalle Valo * active. This configuration item defines the periodic interval. 113bdcd8170SKalle Valo * Use value of zero to disable keepalive support 114bdcd8170SKalle Valo * Default: 60 seconds 115bdcd8170SKalle Valo */ 116bdcd8170SKalle Valo #define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60 117bdcd8170SKalle Valo 118bdcd8170SKalle Valo /* 119bdcd8170SKalle Valo * This configuration item sets the value of disconnect timeout 120bdcd8170SKalle Valo * Firmware delays sending the disconnec event to the host for this 121bdcd8170SKalle Valo * timeout after is gets disconnected from the current AP. 122bdcd8170SKalle Valo * If the firmware successly roams within the disconnect timeout 123bdcd8170SKalle Valo * it sends a new connect event 124bdcd8170SKalle Valo */ 125bdcd8170SKalle Valo #define WLAN_CONFIG_DISCONNECT_TIMEOUT 10 126bdcd8170SKalle Valo 127bdcd8170SKalle Valo #define CONFIG_AR600x_DEBUG_UART_TX_PIN 8 128bdcd8170SKalle Valo 129bdcd8170SKalle Valo #define ATH6KL_DATA_OFFSET 64 130bdcd8170SKalle Valo struct sk_buff *ath6kl_buf_alloc(int size) 131bdcd8170SKalle Valo { 132bdcd8170SKalle Valo struct sk_buff *skb; 133bdcd8170SKalle Valo u16 reserved; 134bdcd8170SKalle Valo 135bdcd8170SKalle Valo /* Add chacheline space at front and back of buffer */ 136bdcd8170SKalle Valo reserved = (2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET + 1371df94a85SVasanthakumar Thiagarajan sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES; 138bdcd8170SKalle Valo skb = dev_alloc_skb(size + reserved); 139bdcd8170SKalle Valo 140bdcd8170SKalle Valo if (skb) 141bdcd8170SKalle Valo skb_reserve(skb, reserved - L1_CACHE_BYTES); 142bdcd8170SKalle Valo return skb; 143bdcd8170SKalle Valo } 144bdcd8170SKalle Valo 145e29f25f5SVasanthakumar Thiagarajan void ath6kl_init_profile_info(struct ath6kl_vif *vif) 146bdcd8170SKalle Valo { 1473450334fSVasanthakumar Thiagarajan vif->ssid_len = 0; 1483450334fSVasanthakumar Thiagarajan memset(vif->ssid, 0, sizeof(vif->ssid)); 1493450334fSVasanthakumar Thiagarajan 1503450334fSVasanthakumar Thiagarajan vif->dot11_auth_mode = OPEN_AUTH; 1513450334fSVasanthakumar Thiagarajan vif->auth_mode = NONE_AUTH; 1523450334fSVasanthakumar Thiagarajan vif->prwise_crypto = NONE_CRYPT; 1533450334fSVasanthakumar Thiagarajan vif->prwise_crypto_len = 0; 1543450334fSVasanthakumar Thiagarajan vif->grp_crypto = NONE_CRYPT; 1553450334fSVasanthakumar Thiagarajan vif->grp_crypto_len = 0; 1566f2a73f9SVasanthakumar Thiagarajan memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list)); 1578c8b65e3SVasanthakumar Thiagarajan memset(vif->req_bssid, 0, sizeof(vif->req_bssid)); 1588c8b65e3SVasanthakumar Thiagarajan memset(vif->bssid, 0, sizeof(vif->bssid)); 159f74bac54SVasanthakumar Thiagarajan vif->bss_ch = 0; 160bdcd8170SKalle Valo } 161bdcd8170SKalle Valo 162bdcd8170SKalle Valo static int ath6kl_set_host_app_area(struct ath6kl *ar) 163bdcd8170SKalle Valo { 164bdcd8170SKalle Valo u32 address, data; 165bdcd8170SKalle Valo struct host_app_area host_app_area; 166bdcd8170SKalle Valo 167bdcd8170SKalle Valo /* Fetch the address of the host_app_area_s 168bdcd8170SKalle Valo * instance in the host interest area */ 169bdcd8170SKalle Valo address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest)); 17031024d99SKevin Fang address = TARG_VTOP(ar->target_type, address); 171bdcd8170SKalle Valo 172addb44beSKalle Valo if (ath6kl_diag_read32(ar, address, &data)) 173bdcd8170SKalle Valo return -EIO; 174bdcd8170SKalle Valo 17531024d99SKevin Fang address = TARG_VTOP(ar->target_type, data); 176cbf49a6fSKalle Valo host_app_area.wmi_protocol_ver = cpu_to_le32(WMI_PROTOCOL_VERSION); 177addb44beSKalle Valo if (ath6kl_diag_write(ar, address, (u8 *) &host_app_area, 178addb44beSKalle Valo sizeof(struct host_app_area))) 179bdcd8170SKalle Valo return -EIO; 180bdcd8170SKalle Valo 181bdcd8170SKalle Valo return 0; 182bdcd8170SKalle Valo } 183bdcd8170SKalle Valo 184bdcd8170SKalle Valo static inline void set_ac2_ep_map(struct ath6kl *ar, 185bdcd8170SKalle Valo u8 ac, 186bdcd8170SKalle Valo enum htc_endpoint_id ep) 187bdcd8170SKalle Valo { 188bdcd8170SKalle Valo ar->ac2ep_map[ac] = ep; 189bdcd8170SKalle Valo ar->ep2ac_map[ep] = ac; 190bdcd8170SKalle Valo } 191bdcd8170SKalle Valo 192bdcd8170SKalle Valo /* connect to a service */ 193bdcd8170SKalle Valo static int ath6kl_connectservice(struct ath6kl *ar, 194bdcd8170SKalle Valo struct htc_service_connect_req *con_req, 195bdcd8170SKalle Valo char *desc) 196bdcd8170SKalle Valo { 197bdcd8170SKalle Valo int status; 198bdcd8170SKalle Valo struct htc_service_connect_resp response; 199bdcd8170SKalle Valo 200bdcd8170SKalle Valo memset(&response, 0, sizeof(response)); 201bdcd8170SKalle Valo 202ad226ec2SKalle Valo status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response); 203bdcd8170SKalle Valo if (status) { 204bdcd8170SKalle Valo ath6kl_err("failed to connect to %s service status:%d\n", 205bdcd8170SKalle Valo desc, status); 206bdcd8170SKalle Valo return status; 207bdcd8170SKalle Valo } 208bdcd8170SKalle Valo 209bdcd8170SKalle Valo switch (con_req->svc_id) { 210bdcd8170SKalle Valo case WMI_CONTROL_SVC: 211bdcd8170SKalle Valo if (test_bit(WMI_ENABLED, &ar->flag)) 212bdcd8170SKalle Valo ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint); 213bdcd8170SKalle Valo ar->ctrl_ep = response.endpoint; 214bdcd8170SKalle Valo break; 215bdcd8170SKalle Valo case WMI_DATA_BE_SVC: 216bdcd8170SKalle Valo set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint); 217bdcd8170SKalle Valo break; 218bdcd8170SKalle Valo case WMI_DATA_BK_SVC: 219bdcd8170SKalle Valo set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint); 220bdcd8170SKalle Valo break; 221bdcd8170SKalle Valo case WMI_DATA_VI_SVC: 222bdcd8170SKalle Valo set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint); 223bdcd8170SKalle Valo break; 224bdcd8170SKalle Valo case WMI_DATA_VO_SVC: 225bdcd8170SKalle Valo set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint); 226bdcd8170SKalle Valo break; 227bdcd8170SKalle Valo default: 228bdcd8170SKalle Valo ath6kl_err("service id is not mapped %d\n", con_req->svc_id); 229bdcd8170SKalle Valo return -EINVAL; 230bdcd8170SKalle Valo } 231bdcd8170SKalle Valo 232bdcd8170SKalle Valo return 0; 233bdcd8170SKalle Valo } 234bdcd8170SKalle Valo 235bdcd8170SKalle Valo static int ath6kl_init_service_ep(struct ath6kl *ar) 236bdcd8170SKalle Valo { 237bdcd8170SKalle Valo struct htc_service_connect_req connect; 238bdcd8170SKalle Valo 239bdcd8170SKalle Valo memset(&connect, 0, sizeof(connect)); 240bdcd8170SKalle Valo 241bdcd8170SKalle Valo /* these fields are the same for all service endpoints */ 242bdcd8170SKalle Valo connect.ep_cb.rx = ath6kl_rx; 243bdcd8170SKalle Valo connect.ep_cb.rx_refill = ath6kl_rx_refill; 244bdcd8170SKalle Valo connect.ep_cb.tx_full = ath6kl_tx_queue_full; 245bdcd8170SKalle Valo 246bdcd8170SKalle Valo /* 247bdcd8170SKalle Valo * Set the max queue depth so that our ath6kl_tx_queue_full handler 248bdcd8170SKalle Valo * gets called. 249bdcd8170SKalle Valo */ 250bdcd8170SKalle Valo connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH; 251bdcd8170SKalle Valo connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4; 252bdcd8170SKalle Valo if (!connect.ep_cb.rx_refill_thresh) 253bdcd8170SKalle Valo connect.ep_cb.rx_refill_thresh++; 254bdcd8170SKalle Valo 255bdcd8170SKalle Valo /* connect to control service */ 256bdcd8170SKalle Valo connect.svc_id = WMI_CONTROL_SVC; 257bdcd8170SKalle Valo if (ath6kl_connectservice(ar, &connect, "WMI CONTROL")) 258bdcd8170SKalle Valo return -EIO; 259bdcd8170SKalle Valo 260bdcd8170SKalle Valo connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN; 261bdcd8170SKalle Valo 262bdcd8170SKalle Valo /* 263bdcd8170SKalle Valo * Limit the HTC message size on the send path, although e can 264bdcd8170SKalle Valo * receive A-MSDU frames of 4K, we will only send ethernet-sized 265bdcd8170SKalle Valo * (802.3) frames on the send path. 266bdcd8170SKalle Valo */ 267bdcd8170SKalle Valo connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH; 268bdcd8170SKalle Valo 269bdcd8170SKalle Valo /* 270bdcd8170SKalle Valo * To reduce the amount of committed memory for larger A_MSDU 271bdcd8170SKalle Valo * frames, use the recv-alloc threshold mechanism for larger 272bdcd8170SKalle Valo * packets. 273bdcd8170SKalle Valo */ 274bdcd8170SKalle Valo connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE; 275bdcd8170SKalle Valo connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf; 276bdcd8170SKalle Valo 277bdcd8170SKalle Valo /* 278bdcd8170SKalle Valo * For the remaining data services set the connection flag to 279bdcd8170SKalle Valo * reduce dribbling, if configured to do so. 280bdcd8170SKalle Valo */ 281bdcd8170SKalle Valo connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB; 282bdcd8170SKalle Valo connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK; 283bdcd8170SKalle Valo connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF; 284bdcd8170SKalle Valo 285bdcd8170SKalle Valo connect.svc_id = WMI_DATA_BE_SVC; 286bdcd8170SKalle Valo 287bdcd8170SKalle Valo if (ath6kl_connectservice(ar, &connect, "WMI DATA BE")) 288bdcd8170SKalle Valo return -EIO; 289bdcd8170SKalle Valo 290bdcd8170SKalle Valo /* connect to back-ground map this to WMI LOW_PRI */ 291bdcd8170SKalle Valo connect.svc_id = WMI_DATA_BK_SVC; 292bdcd8170SKalle Valo if (ath6kl_connectservice(ar, &connect, "WMI DATA BK")) 293bdcd8170SKalle Valo return -EIO; 294bdcd8170SKalle Valo 295bdcd8170SKalle Valo /* connect to Video service, map this to to HI PRI */ 296bdcd8170SKalle Valo connect.svc_id = WMI_DATA_VI_SVC; 297bdcd8170SKalle Valo if (ath6kl_connectservice(ar, &connect, "WMI DATA VI")) 298bdcd8170SKalle Valo return -EIO; 299bdcd8170SKalle Valo 300bdcd8170SKalle Valo /* 301bdcd8170SKalle Valo * Connect to VO service, this is currently not mapped to a WMI 302bdcd8170SKalle Valo * priority stream due to historical reasons. WMI originally 303bdcd8170SKalle Valo * defined 3 priorities over 3 mailboxes We can change this when 304bdcd8170SKalle Valo * WMI is reworked so that priorities are not dependent on 305bdcd8170SKalle Valo * mailboxes. 306bdcd8170SKalle Valo */ 307bdcd8170SKalle Valo connect.svc_id = WMI_DATA_VO_SVC; 308bdcd8170SKalle Valo if (ath6kl_connectservice(ar, &connect, "WMI DATA VO")) 309bdcd8170SKalle Valo return -EIO; 310bdcd8170SKalle Valo 311bdcd8170SKalle Valo return 0; 312bdcd8170SKalle Valo } 313bdcd8170SKalle Valo 314e29f25f5SVasanthakumar Thiagarajan void ath6kl_init_control_info(struct ath6kl_vif *vif) 315bdcd8170SKalle Valo { 316e29f25f5SVasanthakumar Thiagarajan ath6kl_init_profile_info(vif); 3173450334fSVasanthakumar Thiagarajan vif->def_txkey_index = 0; 3186f2a73f9SVasanthakumar Thiagarajan memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list)); 319f74bac54SVasanthakumar Thiagarajan vif->ch_hint = 0; 320bdcd8170SKalle Valo } 321bdcd8170SKalle Valo 322bdcd8170SKalle Valo /* 323bdcd8170SKalle Valo * Set HTC/Mbox operational parameters, this can only be called when the 324bdcd8170SKalle Valo * target is in the BMI phase. 325bdcd8170SKalle Valo */ 326bdcd8170SKalle Valo static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val, 327bdcd8170SKalle Valo u8 htc_ctrl_buf) 328bdcd8170SKalle Valo { 329bdcd8170SKalle Valo int status; 330bdcd8170SKalle Valo u32 blk_size; 331bdcd8170SKalle Valo 332bdcd8170SKalle Valo blk_size = ar->mbox_info.block_size; 333bdcd8170SKalle Valo 334bdcd8170SKalle Valo if (htc_ctrl_buf) 335bdcd8170SKalle Valo blk_size |= ((u32)htc_ctrl_buf) << 16; 336bdcd8170SKalle Valo 337bdcd8170SKalle Valo /* set the host interest area for the block size */ 338bdcd8170SKalle Valo status = ath6kl_bmi_write(ar, 339bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 340bdcd8170SKalle Valo HI_ITEM(hi_mbox_io_block_sz)), 341bdcd8170SKalle Valo (u8 *)&blk_size, 342bdcd8170SKalle Valo 4); 343bdcd8170SKalle Valo if (status) { 344bdcd8170SKalle Valo ath6kl_err("bmi_write_memory for IO block size failed\n"); 345bdcd8170SKalle Valo goto out; 346bdcd8170SKalle Valo } 347bdcd8170SKalle Valo 348bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n", 349bdcd8170SKalle Valo blk_size, 350bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz))); 351bdcd8170SKalle Valo 352bdcd8170SKalle Valo if (mbox_isr_yield_val) { 353bdcd8170SKalle Valo /* set the host interest area for the mbox ISR yield limit */ 354bdcd8170SKalle Valo status = ath6kl_bmi_write(ar, 355bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 356bdcd8170SKalle Valo HI_ITEM(hi_mbox_isr_yield_limit)), 357bdcd8170SKalle Valo (u8 *)&mbox_isr_yield_val, 358bdcd8170SKalle Valo 4); 359bdcd8170SKalle Valo if (status) { 360bdcd8170SKalle Valo ath6kl_err("bmi_write_memory for yield limit failed\n"); 361bdcd8170SKalle Valo goto out; 362bdcd8170SKalle Valo } 363bdcd8170SKalle Valo } 364bdcd8170SKalle Valo 365bdcd8170SKalle Valo out: 366bdcd8170SKalle Valo return status; 367bdcd8170SKalle Valo } 368bdcd8170SKalle Valo 3690ce59445SVasanthakumar Thiagarajan static int ath6kl_target_config_wlan_params(struct ath6kl *ar, int idx) 370bdcd8170SKalle Valo { 371bdcd8170SKalle Valo int status = 0; 3724dea08e0SJouni Malinen int ret; 373bdcd8170SKalle Valo 374bdcd8170SKalle Valo /* 375bdcd8170SKalle Valo * Configure the device for rx dot11 header rules. "0,0" are the 376bdcd8170SKalle Valo * default values. Required if checksum offload is needed. Set 377bdcd8170SKalle Valo * RxMetaVersion to 2. 378bdcd8170SKalle Valo */ 3790ce59445SVasanthakumar Thiagarajan if (ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi, idx, 380bdcd8170SKalle Valo ar->rx_meta_ver, 0, 0)) { 381bdcd8170SKalle Valo ath6kl_err("unable to set the rx frame format\n"); 382bdcd8170SKalle Valo status = -EIO; 383bdcd8170SKalle Valo } 384bdcd8170SKalle Valo 385bdcd8170SKalle Valo if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN) 3860ce59445SVasanthakumar Thiagarajan if ((ath6kl_wmi_pmparams_cmd(ar->wmi, idx, 0, 1, 0, 0, 1, 387bdcd8170SKalle Valo IGNORE_POWER_SAVE_FAIL_EVENT_DURING_SCAN)) != 0) { 388bdcd8170SKalle Valo ath6kl_err("unable to set power save fail event policy\n"); 389bdcd8170SKalle Valo status = -EIO; 390bdcd8170SKalle Valo } 391bdcd8170SKalle Valo 392bdcd8170SKalle Valo if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER)) 3930ce59445SVasanthakumar Thiagarajan if ((ath6kl_wmi_set_lpreamble_cmd(ar->wmi, idx, 0, 394bdcd8170SKalle Valo WMI_DONOT_IGNORE_BARKER_IN_ERP)) != 0) { 395bdcd8170SKalle Valo ath6kl_err("unable to set barker preamble policy\n"); 396bdcd8170SKalle Valo status = -EIO; 397bdcd8170SKalle Valo } 398bdcd8170SKalle Valo 3990ce59445SVasanthakumar Thiagarajan if (ath6kl_wmi_set_keepalive_cmd(ar->wmi, idx, 400bdcd8170SKalle Valo WLAN_CONFIG_KEEP_ALIVE_INTERVAL)) { 401bdcd8170SKalle Valo ath6kl_err("unable to set keep alive interval\n"); 402bdcd8170SKalle Valo status = -EIO; 403bdcd8170SKalle Valo } 404bdcd8170SKalle Valo 4050ce59445SVasanthakumar Thiagarajan if (ath6kl_wmi_disctimeout_cmd(ar->wmi, idx, 406bdcd8170SKalle Valo WLAN_CONFIG_DISCONNECT_TIMEOUT)) { 407bdcd8170SKalle Valo ath6kl_err("unable to set disconnect timeout\n"); 408bdcd8170SKalle Valo status = -EIO; 409bdcd8170SKalle Valo } 410bdcd8170SKalle Valo 411bdcd8170SKalle Valo if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST)) 4120ce59445SVasanthakumar Thiagarajan if (ath6kl_wmi_set_wmm_txop(ar->wmi, idx, WMI_TXOP_DISABLED)) { 413bdcd8170SKalle Valo ath6kl_err("unable to set txop bursting\n"); 414bdcd8170SKalle Valo status = -EIO; 415bdcd8170SKalle Valo } 416bdcd8170SKalle Valo 417b64de356SVasanthakumar Thiagarajan if (ar->p2p && (ar->vif_max == 1 || idx)) { 4180ce59445SVasanthakumar Thiagarajan ret = ath6kl_wmi_info_req_cmd(ar->wmi, idx, 4196bbc7c35SJouni Malinen P2P_FLAG_CAPABILITIES_REQ | 4204dea08e0SJouni Malinen P2P_FLAG_MACADDR_REQ | 4214dea08e0SJouni Malinen P2P_FLAG_HMODEL_REQ); 4224dea08e0SJouni Malinen if (ret) { 4234dea08e0SJouni Malinen ath6kl_dbg(ATH6KL_DBG_TRC, "failed to request P2P " 4246bbc7c35SJouni Malinen "capabilities (%d) - assuming P2P not " 4256bbc7c35SJouni Malinen "supported\n", ret); 4266bbc7c35SJouni Malinen ar->p2p = 0; 4276bbc7c35SJouni Malinen } 4286bbc7c35SJouni Malinen } 4296bbc7c35SJouni Malinen 430b64de356SVasanthakumar Thiagarajan if (ar->p2p && (ar->vif_max == 1 || idx)) { 4316bbc7c35SJouni Malinen /* Enable Probe Request reporting for P2P */ 4320ce59445SVasanthakumar Thiagarajan ret = ath6kl_wmi_probe_report_req_cmd(ar->wmi, idx, true); 4336bbc7c35SJouni Malinen if (ret) { 4346bbc7c35SJouni Malinen ath6kl_dbg(ATH6KL_DBG_TRC, "failed to enable Probe " 4356bbc7c35SJouni Malinen "Request reporting (%d)\n", ret); 4366bbc7c35SJouni Malinen } 4374dea08e0SJouni Malinen } 4384dea08e0SJouni Malinen 439bdcd8170SKalle Valo return status; 440bdcd8170SKalle Valo } 441bdcd8170SKalle Valo 442bdcd8170SKalle Valo int ath6kl_configure_target(struct ath6kl *ar) 443bdcd8170SKalle Valo { 444bdcd8170SKalle Valo u32 param, ram_reserved_size; 4453226f68aSVasanthakumar Thiagarajan u8 fw_iftype, fw_mode = 0, fw_submode = 0; 4467b85832dSVasanthakumar Thiagarajan int i; 447bdcd8170SKalle Valo 4487b85832dSVasanthakumar Thiagarajan /* 4497b85832dSVasanthakumar Thiagarajan * Note: Even though the firmware interface type is 4507b85832dSVasanthakumar Thiagarajan * chosen as BSS_STA for all three interfaces, can 4517b85832dSVasanthakumar Thiagarajan * be configured to IBSS/AP as long as the fw submode 4527b85832dSVasanthakumar Thiagarajan * remains normal mode (0 - AP, STA and IBSS). But 4537b85832dSVasanthakumar Thiagarajan * due to an target assert in firmware only one interface is 4547b85832dSVasanthakumar Thiagarajan * configured for now. 4557b85832dSVasanthakumar Thiagarajan */ 456dd3751f7SVasanthakumar Thiagarajan fw_iftype = HI_OPTION_FW_MODE_BSS_STA; 457bdcd8170SKalle Valo 45871f96ee6SKalle Valo for (i = 0; i < ar->vif_max; i++) 4597b85832dSVasanthakumar Thiagarajan fw_mode |= fw_iftype << (i * HI_OPTION_FW_MODE_BITS); 4607b85832dSVasanthakumar Thiagarajan 4617b85832dSVasanthakumar Thiagarajan /* 4623226f68aSVasanthakumar Thiagarajan * By default, submodes : 4633226f68aSVasanthakumar Thiagarajan * vif[0] - AP/STA/IBSS 4647b85832dSVasanthakumar Thiagarajan * vif[1] - "P2P dev"/"P2P GO"/"P2P Client" 4657b85832dSVasanthakumar Thiagarajan * vif[2] - "P2P dev"/"P2P GO"/"P2P Client" 4667b85832dSVasanthakumar Thiagarajan */ 4673226f68aSVasanthakumar Thiagarajan 4683226f68aSVasanthakumar Thiagarajan for (i = 0; i < ar->max_norm_iface; i++) 4693226f68aSVasanthakumar Thiagarajan fw_submode |= HI_OPTION_FW_SUBMODE_NONE << 4703226f68aSVasanthakumar Thiagarajan (i * HI_OPTION_FW_SUBMODE_BITS); 4713226f68aSVasanthakumar Thiagarajan 47271f96ee6SKalle Valo for (i = ar->max_norm_iface; i < ar->vif_max; i++) 4733226f68aSVasanthakumar Thiagarajan fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV << 4743226f68aSVasanthakumar Thiagarajan (i * HI_OPTION_FW_SUBMODE_BITS); 4757b85832dSVasanthakumar Thiagarajan 476b64de356SVasanthakumar Thiagarajan if (ar->p2p && ar->vif_max == 1) 4777b85832dSVasanthakumar Thiagarajan fw_submode = HI_OPTION_FW_SUBMODE_P2PDEV; 4787b85832dSVasanthakumar Thiagarajan 479bdcd8170SKalle Valo param = HTC_PROTOCOL_VERSION; 480bdcd8170SKalle Valo if (ath6kl_bmi_write(ar, 481bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 482bdcd8170SKalle Valo HI_ITEM(hi_app_host_interest)), 483bdcd8170SKalle Valo (u8 *)¶m, 4) != 0) { 484bdcd8170SKalle Valo ath6kl_err("bmi_write_memory for htc version failed\n"); 485bdcd8170SKalle Valo return -EIO; 486bdcd8170SKalle Valo } 487bdcd8170SKalle Valo 488bdcd8170SKalle Valo /* set the firmware mode to STA/IBSS/AP */ 489bdcd8170SKalle Valo param = 0; 490bdcd8170SKalle Valo 491bdcd8170SKalle Valo if (ath6kl_bmi_read(ar, 492bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 493bdcd8170SKalle Valo HI_ITEM(hi_option_flag)), 494bdcd8170SKalle Valo (u8 *)¶m, 4) != 0) { 495bdcd8170SKalle Valo ath6kl_err("bmi_read_memory for setting fwmode failed\n"); 496bdcd8170SKalle Valo return -EIO; 497bdcd8170SKalle Valo } 498bdcd8170SKalle Valo 49971f96ee6SKalle Valo param |= (ar->vif_max << HI_OPTION_NUM_DEV_SHIFT); 5007b85832dSVasanthakumar Thiagarajan param |= fw_mode << HI_OPTION_FW_MODE_SHIFT; 5017b85832dSVasanthakumar Thiagarajan param |= fw_submode << HI_OPTION_FW_SUBMODE_SHIFT; 5027b85832dSVasanthakumar Thiagarajan 503bdcd8170SKalle Valo param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT); 504bdcd8170SKalle Valo param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT); 505bdcd8170SKalle Valo 506bdcd8170SKalle Valo if (ath6kl_bmi_write(ar, 507bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 508bdcd8170SKalle Valo HI_ITEM(hi_option_flag)), 509bdcd8170SKalle Valo (u8 *)¶m, 510bdcd8170SKalle Valo 4) != 0) { 511bdcd8170SKalle Valo ath6kl_err("bmi_write_memory for setting fwmode failed\n"); 512bdcd8170SKalle Valo return -EIO; 513bdcd8170SKalle Valo } 514bdcd8170SKalle Valo 515bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n"); 516bdcd8170SKalle Valo 517bdcd8170SKalle Valo /* 518bdcd8170SKalle Valo * Hardcode the address use for the extended board data 519bdcd8170SKalle Valo * Ideally this should be pre-allocate by the OS at boot time 520bdcd8170SKalle Valo * But since it is a new feature and board data is loaded 521bdcd8170SKalle Valo * at init time, we have to workaround this from host. 522bdcd8170SKalle Valo * It is difficult to patch the firmware boot code, 523bdcd8170SKalle Valo * but possible in theory. 524bdcd8170SKalle Valo */ 525bdcd8170SKalle Valo 526991b27eaSKalle Valo param = ar->hw.board_ext_data_addr; 527991b27eaSKalle Valo ram_reserved_size = ar->hw.reserved_ram_size; 528bdcd8170SKalle Valo 529991b27eaSKalle Valo if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar, 530bdcd8170SKalle Valo HI_ITEM(hi_board_ext_data)), 531bdcd8170SKalle Valo (u8 *)¶m, 4) != 0) { 532bdcd8170SKalle Valo ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n"); 533bdcd8170SKalle Valo return -EIO; 534bdcd8170SKalle Valo } 535991b27eaSKalle Valo 536991b27eaSKalle Valo if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar, 537bdcd8170SKalle Valo HI_ITEM(hi_end_ram_reserve_sz)), 538bdcd8170SKalle Valo (u8 *)&ram_reserved_size, 4) != 0) { 539bdcd8170SKalle Valo ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n"); 540bdcd8170SKalle Valo return -EIO; 541bdcd8170SKalle Valo } 542bdcd8170SKalle Valo 543bdcd8170SKalle Valo /* set the block size for the target */ 544bdcd8170SKalle Valo if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0)) 545bdcd8170SKalle Valo /* use default number of control buffers */ 546bdcd8170SKalle Valo return -EIO; 547bdcd8170SKalle Valo 548bdcd8170SKalle Valo return 0; 549bdcd8170SKalle Valo } 550bdcd8170SKalle Valo 5518dafb70eSVasanthakumar Thiagarajan void ath6kl_core_free(struct ath6kl *ar) 552bdcd8170SKalle Valo { 5538dafb70eSVasanthakumar Thiagarajan wiphy_free(ar->wiphy); 554bdcd8170SKalle Valo } 555bdcd8170SKalle Valo 5566db8fa53SVasanthakumar Thiagarajan void ath6kl_core_cleanup(struct ath6kl *ar) 557bdcd8170SKalle Valo { 558b2e75698SKalle Valo ath6kl_hif_power_off(ar); 559b2e75698SKalle Valo 5606db8fa53SVasanthakumar Thiagarajan destroy_workqueue(ar->ath6kl_wq); 561bdcd8170SKalle Valo 5626db8fa53SVasanthakumar Thiagarajan if (ar->htc_target) 5636db8fa53SVasanthakumar Thiagarajan ath6kl_htc_cleanup(ar->htc_target); 5646db8fa53SVasanthakumar Thiagarajan 5656db8fa53SVasanthakumar Thiagarajan ath6kl_cookie_cleanup(ar); 5666db8fa53SVasanthakumar Thiagarajan 5676db8fa53SVasanthakumar Thiagarajan ath6kl_cleanup_amsdu_rxbufs(ar); 5686db8fa53SVasanthakumar Thiagarajan 5696db8fa53SVasanthakumar Thiagarajan ath6kl_bmi_cleanup(ar); 5706db8fa53SVasanthakumar Thiagarajan 5716db8fa53SVasanthakumar Thiagarajan ath6kl_debug_cleanup(ar); 5726db8fa53SVasanthakumar Thiagarajan 5736db8fa53SVasanthakumar Thiagarajan kfree(ar->fw_board); 5746db8fa53SVasanthakumar Thiagarajan kfree(ar->fw_otp); 5756db8fa53SVasanthakumar Thiagarajan kfree(ar->fw); 5766db8fa53SVasanthakumar Thiagarajan kfree(ar->fw_patch); 5776db8fa53SVasanthakumar Thiagarajan 5786db8fa53SVasanthakumar Thiagarajan ath6kl_deinit_ieee80211_hw(ar); 579bdcd8170SKalle Valo } 580bdcd8170SKalle Valo 581bdcd8170SKalle Valo /* firmware upload */ 582bdcd8170SKalle Valo static int ath6kl_get_fw(struct ath6kl *ar, const char *filename, 583bdcd8170SKalle Valo u8 **fw, size_t *fw_len) 584bdcd8170SKalle Valo { 585bdcd8170SKalle Valo const struct firmware *fw_entry; 586bdcd8170SKalle Valo int ret; 587bdcd8170SKalle Valo 588bdcd8170SKalle Valo ret = request_firmware(&fw_entry, filename, ar->dev); 589bdcd8170SKalle Valo if (ret) 590bdcd8170SKalle Valo return ret; 591bdcd8170SKalle Valo 592bdcd8170SKalle Valo *fw_len = fw_entry->size; 593bdcd8170SKalle Valo *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL); 594bdcd8170SKalle Valo 595bdcd8170SKalle Valo if (*fw == NULL) 596bdcd8170SKalle Valo ret = -ENOMEM; 597bdcd8170SKalle Valo 598bdcd8170SKalle Valo release_firmware(fw_entry); 599bdcd8170SKalle Valo 600bdcd8170SKalle Valo return ret; 601bdcd8170SKalle Valo } 602bdcd8170SKalle Valo 60392ecbff4SSam Leffler #ifdef CONFIG_OF 60492ecbff4SSam Leffler static const char *get_target_ver_dir(const struct ath6kl *ar) 60592ecbff4SSam Leffler { 60692ecbff4SSam Leffler switch (ar->version.target_ver) { 6070d0192baSKalle Valo case AR6003_HW_1_0_VERSION: 60892ecbff4SSam Leffler return "ath6k/AR6003/hw1.0"; 6090d0192baSKalle Valo case AR6003_HW_2_0_VERSION: 61092ecbff4SSam Leffler return "ath6k/AR6003/hw2.0"; 6110d0192baSKalle Valo case AR6003_HW_2_1_1_VERSION: 61292ecbff4SSam Leffler return "ath6k/AR6003/hw2.1.1"; 61392ecbff4SSam Leffler } 61492ecbff4SSam Leffler ath6kl_warn("%s: unsupported target version 0x%x.\n", __func__, 61592ecbff4SSam Leffler ar->version.target_ver); 61692ecbff4SSam Leffler return NULL; 61792ecbff4SSam Leffler } 61892ecbff4SSam Leffler 61992ecbff4SSam Leffler /* 62092ecbff4SSam Leffler * Check the device tree for a board-id and use it to construct 62192ecbff4SSam Leffler * the pathname to the firmware file. Used (for now) to find a 62292ecbff4SSam Leffler * fallback to the "bdata.bin" file--typically a symlink to the 62392ecbff4SSam Leffler * appropriate board-specific file. 62492ecbff4SSam Leffler */ 62592ecbff4SSam Leffler static bool check_device_tree(struct ath6kl *ar) 62692ecbff4SSam Leffler { 62792ecbff4SSam Leffler static const char *board_id_prop = "atheros,board-id"; 62892ecbff4SSam Leffler struct device_node *node; 62992ecbff4SSam Leffler char board_filename[64]; 63092ecbff4SSam Leffler const char *board_id; 63192ecbff4SSam Leffler int ret; 63292ecbff4SSam Leffler 63392ecbff4SSam Leffler for_each_compatible_node(node, NULL, "atheros,ath6kl") { 63492ecbff4SSam Leffler board_id = of_get_property(node, board_id_prop, NULL); 63592ecbff4SSam Leffler if (board_id == NULL) { 63692ecbff4SSam Leffler ath6kl_warn("No \"%s\" property on %s node.\n", 63792ecbff4SSam Leffler board_id_prop, node->name); 63892ecbff4SSam Leffler continue; 63992ecbff4SSam Leffler } 64092ecbff4SSam Leffler snprintf(board_filename, sizeof(board_filename), 64192ecbff4SSam Leffler "%s/bdata.%s.bin", get_target_ver_dir(ar), board_id); 64292ecbff4SSam Leffler 64392ecbff4SSam Leffler ret = ath6kl_get_fw(ar, board_filename, &ar->fw_board, 64492ecbff4SSam Leffler &ar->fw_board_len); 64592ecbff4SSam Leffler if (ret) { 64692ecbff4SSam Leffler ath6kl_err("Failed to get DT board file %s: %d\n", 64792ecbff4SSam Leffler board_filename, ret); 64892ecbff4SSam Leffler continue; 64992ecbff4SSam Leffler } 65092ecbff4SSam Leffler return true; 65192ecbff4SSam Leffler } 65292ecbff4SSam Leffler return false; 65392ecbff4SSam Leffler } 65492ecbff4SSam Leffler #else 65592ecbff4SSam Leffler static bool check_device_tree(struct ath6kl *ar) 65692ecbff4SSam Leffler { 65792ecbff4SSam Leffler return false; 65892ecbff4SSam Leffler } 65992ecbff4SSam Leffler #endif /* CONFIG_OF */ 66092ecbff4SSam Leffler 661bdcd8170SKalle Valo static int ath6kl_fetch_board_file(struct ath6kl *ar) 662bdcd8170SKalle Valo { 663bdcd8170SKalle Valo const char *filename; 664bdcd8170SKalle Valo int ret; 665bdcd8170SKalle Valo 666772c31eeSKalle Valo if (ar->fw_board != NULL) 667772c31eeSKalle Valo return 0; 668772c31eeSKalle Valo 669d1a9421dSKalle Valo if (WARN_ON(ar->hw.fw_board == NULL)) 670d1a9421dSKalle Valo return -EINVAL; 671d1a9421dSKalle Valo 672d1a9421dSKalle Valo filename = ar->hw.fw_board; 673bdcd8170SKalle Valo 674bdcd8170SKalle Valo ret = ath6kl_get_fw(ar, filename, &ar->fw_board, 675bdcd8170SKalle Valo &ar->fw_board_len); 676bdcd8170SKalle Valo if (ret == 0) { 677bdcd8170SKalle Valo /* managed to get proper board file */ 678bdcd8170SKalle Valo return 0; 679bdcd8170SKalle Valo } 680bdcd8170SKalle Valo 68192ecbff4SSam Leffler if (check_device_tree(ar)) { 68292ecbff4SSam Leffler /* got board file from device tree */ 68392ecbff4SSam Leffler return 0; 68492ecbff4SSam Leffler } 68592ecbff4SSam Leffler 686bdcd8170SKalle Valo /* there was no proper board file, try to use default instead */ 687bdcd8170SKalle Valo ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n", 688bdcd8170SKalle Valo filename, ret); 689bdcd8170SKalle Valo 690d1a9421dSKalle Valo filename = ar->hw.fw_default_board; 691bdcd8170SKalle Valo 692bdcd8170SKalle Valo ret = ath6kl_get_fw(ar, filename, &ar->fw_board, 693bdcd8170SKalle Valo &ar->fw_board_len); 694bdcd8170SKalle Valo if (ret) { 695bdcd8170SKalle Valo ath6kl_err("Failed to get default board file %s: %d\n", 696bdcd8170SKalle Valo filename, ret); 697bdcd8170SKalle Valo return ret; 698bdcd8170SKalle Valo } 699bdcd8170SKalle Valo 700bdcd8170SKalle Valo ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n"); 701bdcd8170SKalle Valo ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n"); 702bdcd8170SKalle Valo 703bdcd8170SKalle Valo return 0; 704bdcd8170SKalle Valo } 705bdcd8170SKalle Valo 706772c31eeSKalle Valo static int ath6kl_fetch_otp_file(struct ath6kl *ar) 707772c31eeSKalle Valo { 708772c31eeSKalle Valo const char *filename; 709772c31eeSKalle Valo int ret; 710772c31eeSKalle Valo 711772c31eeSKalle Valo if (ar->fw_otp != NULL) 712772c31eeSKalle Valo return 0; 713772c31eeSKalle Valo 714d1a9421dSKalle Valo if (ar->hw.fw_otp == NULL) { 715d1a9421dSKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, 716d1a9421dSKalle Valo "no OTP file configured for this hw\n"); 717772c31eeSKalle Valo return 0; 718772c31eeSKalle Valo } 719772c31eeSKalle Valo 720d1a9421dSKalle Valo filename = ar->hw.fw_otp; 721d1a9421dSKalle Valo 722772c31eeSKalle Valo ret = ath6kl_get_fw(ar, filename, &ar->fw_otp, 723772c31eeSKalle Valo &ar->fw_otp_len); 724772c31eeSKalle Valo if (ret) { 725772c31eeSKalle Valo ath6kl_err("Failed to get OTP file %s: %d\n", 726772c31eeSKalle Valo filename, ret); 727772c31eeSKalle Valo return ret; 728772c31eeSKalle Valo } 729772c31eeSKalle Valo 730772c31eeSKalle Valo return 0; 731772c31eeSKalle Valo } 732772c31eeSKalle Valo 733772c31eeSKalle Valo static int ath6kl_fetch_fw_file(struct ath6kl *ar) 734772c31eeSKalle Valo { 735772c31eeSKalle Valo const char *filename; 736772c31eeSKalle Valo int ret; 737772c31eeSKalle Valo 738772c31eeSKalle Valo if (ar->fw != NULL) 739772c31eeSKalle Valo return 0; 740772c31eeSKalle Valo 741772c31eeSKalle Valo if (testmode) { 742d1a9421dSKalle Valo if (ar->hw.fw_tcmd == NULL) { 743d1a9421dSKalle Valo ath6kl_warn("testmode not supported\n"); 744772c31eeSKalle Valo return -EOPNOTSUPP; 745772c31eeSKalle Valo } 746772c31eeSKalle Valo 747d1a9421dSKalle Valo filename = ar->hw.fw_tcmd; 748d1a9421dSKalle Valo 749772c31eeSKalle Valo set_bit(TESTMODE, &ar->flag); 750772c31eeSKalle Valo 751772c31eeSKalle Valo goto get_fw; 752772c31eeSKalle Valo } 753772c31eeSKalle Valo 754d1a9421dSKalle Valo if (WARN_ON(ar->hw.fw == NULL)) 755d1a9421dSKalle Valo return -EINVAL; 756d1a9421dSKalle Valo 757d1a9421dSKalle Valo filename = ar->hw.fw; 758772c31eeSKalle Valo 759772c31eeSKalle Valo get_fw: 760772c31eeSKalle Valo ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len); 761772c31eeSKalle Valo if (ret) { 762772c31eeSKalle Valo ath6kl_err("Failed to get firmware file %s: %d\n", 763772c31eeSKalle Valo filename, ret); 764772c31eeSKalle Valo return ret; 765772c31eeSKalle Valo } 766772c31eeSKalle Valo 767772c31eeSKalle Valo return 0; 768772c31eeSKalle Valo } 769772c31eeSKalle Valo 770772c31eeSKalle Valo static int ath6kl_fetch_patch_file(struct ath6kl *ar) 771772c31eeSKalle Valo { 772772c31eeSKalle Valo const char *filename; 773772c31eeSKalle Valo int ret; 774772c31eeSKalle Valo 775d1a9421dSKalle Valo if (ar->fw_patch != NULL) 776772c31eeSKalle Valo return 0; 777772c31eeSKalle Valo 778d1a9421dSKalle Valo if (ar->hw.fw_patch == NULL) 779d1a9421dSKalle Valo return 0; 780d1a9421dSKalle Valo 781d1a9421dSKalle Valo filename = ar->hw.fw_patch; 782d1a9421dSKalle Valo 783772c31eeSKalle Valo ret = ath6kl_get_fw(ar, filename, &ar->fw_patch, 784772c31eeSKalle Valo &ar->fw_patch_len); 785772c31eeSKalle Valo if (ret) { 786772c31eeSKalle Valo ath6kl_err("Failed to get patch file %s: %d\n", 787772c31eeSKalle Valo filename, ret); 788772c31eeSKalle Valo return ret; 789772c31eeSKalle Valo } 790772c31eeSKalle Valo 791772c31eeSKalle Valo return 0; 792772c31eeSKalle Valo } 793772c31eeSKalle Valo 79450d41234SKalle Valo static int ath6kl_fetch_fw_api1(struct ath6kl *ar) 795772c31eeSKalle Valo { 796772c31eeSKalle Valo int ret; 797772c31eeSKalle Valo 798772c31eeSKalle Valo ret = ath6kl_fetch_otp_file(ar); 799772c31eeSKalle Valo if (ret) 800772c31eeSKalle Valo return ret; 801772c31eeSKalle Valo 802772c31eeSKalle Valo ret = ath6kl_fetch_fw_file(ar); 803772c31eeSKalle Valo if (ret) 804772c31eeSKalle Valo return ret; 805772c31eeSKalle Valo 806772c31eeSKalle Valo ret = ath6kl_fetch_patch_file(ar); 807772c31eeSKalle Valo if (ret) 808772c31eeSKalle Valo return ret; 809772c31eeSKalle Valo 810772c31eeSKalle Valo return 0; 811772c31eeSKalle Valo } 812bdcd8170SKalle Valo 81350d41234SKalle Valo static int ath6kl_fetch_fw_api2(struct ath6kl *ar) 81450d41234SKalle Valo { 81550d41234SKalle Valo size_t magic_len, len, ie_len; 81650d41234SKalle Valo const struct firmware *fw; 81750d41234SKalle Valo struct ath6kl_fw_ie *hdr; 81850d41234SKalle Valo const char *filename; 81950d41234SKalle Valo const u8 *data; 82097e0496dSKalle Valo int ret, ie_id, i, index, bit; 8218a137480SKalle Valo __le32 *val; 82250d41234SKalle Valo 823d1a9421dSKalle Valo if (ar->hw.fw_api2 == NULL) 82450d41234SKalle Valo return -EOPNOTSUPP; 825d1a9421dSKalle Valo 826d1a9421dSKalle Valo filename = ar->hw.fw_api2; 82750d41234SKalle Valo 82850d41234SKalle Valo ret = request_firmware(&fw, filename, ar->dev); 82950d41234SKalle Valo if (ret) 83050d41234SKalle Valo return ret; 83150d41234SKalle Valo 83250d41234SKalle Valo data = fw->data; 83350d41234SKalle Valo len = fw->size; 83450d41234SKalle Valo 83550d41234SKalle Valo /* magic also includes the null byte, check that as well */ 83650d41234SKalle Valo magic_len = strlen(ATH6KL_FIRMWARE_MAGIC) + 1; 83750d41234SKalle Valo 83850d41234SKalle Valo if (len < magic_len) { 83950d41234SKalle Valo ret = -EINVAL; 84050d41234SKalle Valo goto out; 84150d41234SKalle Valo } 84250d41234SKalle Valo 84350d41234SKalle Valo if (memcmp(data, ATH6KL_FIRMWARE_MAGIC, magic_len) != 0) { 84450d41234SKalle Valo ret = -EINVAL; 84550d41234SKalle Valo goto out; 84650d41234SKalle Valo } 84750d41234SKalle Valo 84850d41234SKalle Valo len -= magic_len; 84950d41234SKalle Valo data += magic_len; 85050d41234SKalle Valo 85150d41234SKalle Valo /* loop elements */ 85250d41234SKalle Valo while (len > sizeof(struct ath6kl_fw_ie)) { 85350d41234SKalle Valo /* hdr is unaligned! */ 85450d41234SKalle Valo hdr = (struct ath6kl_fw_ie *) data; 85550d41234SKalle Valo 85650d41234SKalle Valo ie_id = le32_to_cpup(&hdr->id); 85750d41234SKalle Valo ie_len = le32_to_cpup(&hdr->len); 85850d41234SKalle Valo 85950d41234SKalle Valo len -= sizeof(*hdr); 86050d41234SKalle Valo data += sizeof(*hdr); 86150d41234SKalle Valo 86250d41234SKalle Valo if (len < ie_len) { 86350d41234SKalle Valo ret = -EINVAL; 86450d41234SKalle Valo goto out; 86550d41234SKalle Valo } 86650d41234SKalle Valo 86750d41234SKalle Valo switch (ie_id) { 86850d41234SKalle Valo case ATH6KL_FW_IE_OTP_IMAGE: 869ef548626SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "found otp image ie (%zd B)\n", 8706bc36431SKalle Valo ie_len); 8716bc36431SKalle Valo 87250d41234SKalle Valo ar->fw_otp = kmemdup(data, ie_len, GFP_KERNEL); 87350d41234SKalle Valo 87450d41234SKalle Valo if (ar->fw_otp == NULL) { 87550d41234SKalle Valo ret = -ENOMEM; 87650d41234SKalle Valo goto out; 87750d41234SKalle Valo } 87850d41234SKalle Valo 87950d41234SKalle Valo ar->fw_otp_len = ie_len; 88050d41234SKalle Valo break; 88150d41234SKalle Valo case ATH6KL_FW_IE_FW_IMAGE: 882ef548626SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "found fw image ie (%zd B)\n", 8836bc36431SKalle Valo ie_len); 8846bc36431SKalle Valo 88550d41234SKalle Valo ar->fw = kmemdup(data, ie_len, GFP_KERNEL); 88650d41234SKalle Valo 88750d41234SKalle Valo if (ar->fw == NULL) { 88850d41234SKalle Valo ret = -ENOMEM; 88950d41234SKalle Valo goto out; 89050d41234SKalle Valo } 89150d41234SKalle Valo 89250d41234SKalle Valo ar->fw_len = ie_len; 89350d41234SKalle Valo break; 89450d41234SKalle Valo case ATH6KL_FW_IE_PATCH_IMAGE: 895ef548626SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "found patch image ie (%zd B)\n", 8966bc36431SKalle Valo ie_len); 8976bc36431SKalle Valo 89850d41234SKalle Valo ar->fw_patch = kmemdup(data, ie_len, GFP_KERNEL); 89950d41234SKalle Valo 90050d41234SKalle Valo if (ar->fw_patch == NULL) { 90150d41234SKalle Valo ret = -ENOMEM; 90250d41234SKalle Valo goto out; 90350d41234SKalle Valo } 90450d41234SKalle Valo 90550d41234SKalle Valo ar->fw_patch_len = ie_len; 90650d41234SKalle Valo break; 9078a137480SKalle Valo case ATH6KL_FW_IE_RESERVED_RAM_SIZE: 9088a137480SKalle Valo val = (__le32 *) data; 9098a137480SKalle Valo ar->hw.reserved_ram_size = le32_to_cpup(val); 9106bc36431SKalle Valo 9116bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, 9126bc36431SKalle Valo "found reserved ram size ie 0x%d\n", 9136bc36431SKalle Valo ar->hw.reserved_ram_size); 9148a137480SKalle Valo break; 91597e0496dSKalle Valo case ATH6KL_FW_IE_CAPABILITIES: 916*277d90f4SKalle Valo if (ie_len < DIV_ROUND_UP(ATH6KL_FW_CAPABILITY_MAX, 8)) 917*277d90f4SKalle Valo break; 918*277d90f4SKalle Valo 9196bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, 920ef548626SKalle Valo "found firmware capabilities ie (%zd B)\n", 9216bc36431SKalle Valo ie_len); 9226bc36431SKalle Valo 92397e0496dSKalle Valo for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) { 924*277d90f4SKalle Valo index = i / 8; 92597e0496dSKalle Valo bit = i % 8; 92697e0496dSKalle Valo 92797e0496dSKalle Valo if (data[index] & (1 << bit)) 92897e0496dSKalle Valo __set_bit(i, ar->fw_capabilities); 92997e0496dSKalle Valo } 9306bc36431SKalle Valo 9316bc36431SKalle Valo ath6kl_dbg_dump(ATH6KL_DBG_BOOT, "capabilities", "", 9326bc36431SKalle Valo ar->fw_capabilities, 9336bc36431SKalle Valo sizeof(ar->fw_capabilities)); 93497e0496dSKalle Valo break; 9351b4304daSKalle Valo case ATH6KL_FW_IE_PATCH_ADDR: 9361b4304daSKalle Valo if (ie_len != sizeof(*val)) 9371b4304daSKalle Valo break; 9381b4304daSKalle Valo 9391b4304daSKalle Valo val = (__le32 *) data; 9401b4304daSKalle Valo ar->hw.dataset_patch_addr = le32_to_cpup(val); 9416bc36431SKalle Valo 9426bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, 94303ef0250SKalle Valo "found patch address ie 0x%x\n", 9446bc36431SKalle Valo ar->hw.dataset_patch_addr); 9451b4304daSKalle Valo break; 94603ef0250SKalle Valo case ATH6KL_FW_IE_BOARD_ADDR: 94703ef0250SKalle Valo if (ie_len != sizeof(*val)) 94803ef0250SKalle Valo break; 94903ef0250SKalle Valo 95003ef0250SKalle Valo val = (__le32 *) data; 95103ef0250SKalle Valo ar->hw.board_addr = le32_to_cpup(val); 95203ef0250SKalle Valo 95303ef0250SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, 95403ef0250SKalle Valo "found board address ie 0x%x\n", 95503ef0250SKalle Valo ar->hw.board_addr); 95603ef0250SKalle Valo break; 957368b1b0fSKalle Valo case ATH6KL_FW_IE_VIF_MAX: 958368b1b0fSKalle Valo if (ie_len != sizeof(*val)) 959368b1b0fSKalle Valo break; 960368b1b0fSKalle Valo 961368b1b0fSKalle Valo val = (__le32 *) data; 962368b1b0fSKalle Valo ar->vif_max = min_t(unsigned int, le32_to_cpup(val), 963368b1b0fSKalle Valo ATH6KL_VIF_MAX); 964368b1b0fSKalle Valo 965f143379dSVasanthakumar Thiagarajan if (ar->vif_max > 1 && !ar->p2p) 966f143379dSVasanthakumar Thiagarajan ar->max_norm_iface = 2; 967f143379dSVasanthakumar Thiagarajan 968368b1b0fSKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, 969368b1b0fSKalle Valo "found vif max ie %d\n", ar->vif_max); 970368b1b0fSKalle Valo break; 97150d41234SKalle Valo default: 9726bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "Unknown fw ie: %u\n", 97350d41234SKalle Valo le32_to_cpup(&hdr->id)); 97450d41234SKalle Valo break; 97550d41234SKalle Valo } 97650d41234SKalle Valo 97750d41234SKalle Valo len -= ie_len; 97850d41234SKalle Valo data += ie_len; 97950d41234SKalle Valo }; 98050d41234SKalle Valo 98150d41234SKalle Valo ret = 0; 98250d41234SKalle Valo out: 98350d41234SKalle Valo release_firmware(fw); 98450d41234SKalle Valo 98550d41234SKalle Valo return ret; 98650d41234SKalle Valo } 98750d41234SKalle Valo 98850d41234SKalle Valo static int ath6kl_fetch_firmwares(struct ath6kl *ar) 98950d41234SKalle Valo { 99050d41234SKalle Valo int ret; 99150d41234SKalle Valo 99250d41234SKalle Valo ret = ath6kl_fetch_board_file(ar); 99350d41234SKalle Valo if (ret) 99450d41234SKalle Valo return ret; 99550d41234SKalle Valo 99650d41234SKalle Valo ret = ath6kl_fetch_fw_api2(ar); 9976bc36431SKalle Valo if (ret == 0) { 9986bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api 2\n"); 99950d41234SKalle Valo return 0; 10006bc36431SKalle Valo } 100150d41234SKalle Valo 100250d41234SKalle Valo ret = ath6kl_fetch_fw_api1(ar); 100350d41234SKalle Valo if (ret) 100450d41234SKalle Valo return ret; 100550d41234SKalle Valo 10066bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api 1\n"); 10076bc36431SKalle Valo 100850d41234SKalle Valo return 0; 100950d41234SKalle Valo } 101050d41234SKalle Valo 1011bdcd8170SKalle Valo static int ath6kl_upload_board_file(struct ath6kl *ar) 1012bdcd8170SKalle Valo { 1013bdcd8170SKalle Valo u32 board_address, board_ext_address, param; 101431024d99SKevin Fang u32 board_data_size, board_ext_data_size; 1015bdcd8170SKalle Valo int ret; 1016bdcd8170SKalle Valo 1017772c31eeSKalle Valo if (WARN_ON(ar->fw_board == NULL)) 1018772c31eeSKalle Valo return -ENOENT; 1019bdcd8170SKalle Valo 102031024d99SKevin Fang /* 102131024d99SKevin Fang * Determine where in Target RAM to write Board Data. 102231024d99SKevin Fang * For AR6004, host determine Target RAM address for 102331024d99SKevin Fang * writing board data. 102431024d99SKevin Fang */ 10250d4d72bfSKalle Valo if (ar->hw.board_addr != 0) { 10260d4d72bfSKalle Valo board_address = ar->hw.board_addr; 102731024d99SKevin Fang ath6kl_bmi_write(ar, 102831024d99SKevin Fang ath6kl_get_hi_item_addr(ar, 102931024d99SKevin Fang HI_ITEM(hi_board_data)), 103031024d99SKevin Fang (u8 *) &board_address, 4); 103131024d99SKevin Fang } else { 1032bdcd8170SKalle Valo ath6kl_bmi_read(ar, 1033bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 1034bdcd8170SKalle Valo HI_ITEM(hi_board_data)), 1035bdcd8170SKalle Valo (u8 *) &board_address, 4); 103631024d99SKevin Fang } 103731024d99SKevin Fang 1038bdcd8170SKalle Valo /* determine where in target ram to write extended board data */ 1039bdcd8170SKalle Valo ath6kl_bmi_read(ar, 1040bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 1041bdcd8170SKalle Valo HI_ITEM(hi_board_ext_data)), 1042bdcd8170SKalle Valo (u8 *) &board_ext_address, 4); 1043bdcd8170SKalle Valo 104450e2740bSKalle Valo if (ar->target_type == TARGET_TYPE_AR6003 && 104550e2740bSKalle Valo board_ext_address == 0) { 1046bdcd8170SKalle Valo ath6kl_err("Failed to get board file target address.\n"); 1047bdcd8170SKalle Valo return -EINVAL; 1048bdcd8170SKalle Valo } 1049bdcd8170SKalle Valo 105031024d99SKevin Fang switch (ar->target_type) { 105131024d99SKevin Fang case TARGET_TYPE_AR6003: 105231024d99SKevin Fang board_data_size = AR6003_BOARD_DATA_SZ; 105331024d99SKevin Fang board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ; 105431024d99SKevin Fang break; 105531024d99SKevin Fang case TARGET_TYPE_AR6004: 105631024d99SKevin Fang board_data_size = AR6004_BOARD_DATA_SZ; 105731024d99SKevin Fang board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ; 105831024d99SKevin Fang break; 105931024d99SKevin Fang default: 106031024d99SKevin Fang WARN_ON(1); 106131024d99SKevin Fang return -EINVAL; 106231024d99SKevin Fang break; 106331024d99SKevin Fang } 106431024d99SKevin Fang 106550e2740bSKalle Valo if (board_ext_address && 106650e2740bSKalle Valo ar->fw_board_len == (board_data_size + board_ext_data_size)) { 106731024d99SKevin Fang 1068bdcd8170SKalle Valo /* write extended board data */ 10696bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, 10706bc36431SKalle Valo "writing extended board data to 0x%x (%d B)\n", 10716bc36431SKalle Valo board_ext_address, board_ext_data_size); 10726bc36431SKalle Valo 1073bdcd8170SKalle Valo ret = ath6kl_bmi_write(ar, board_ext_address, 107431024d99SKevin Fang ar->fw_board + board_data_size, 107531024d99SKevin Fang board_ext_data_size); 1076bdcd8170SKalle Valo if (ret) { 1077bdcd8170SKalle Valo ath6kl_err("Failed to write extended board data: %d\n", 1078bdcd8170SKalle Valo ret); 1079bdcd8170SKalle Valo return ret; 1080bdcd8170SKalle Valo } 1081bdcd8170SKalle Valo 1082bdcd8170SKalle Valo /* record that extended board data is initialized */ 108331024d99SKevin Fang param = (board_ext_data_size << 16) | 1; 108431024d99SKevin Fang 1085bdcd8170SKalle Valo ath6kl_bmi_write(ar, 1086bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 1087bdcd8170SKalle Valo HI_ITEM(hi_board_ext_data_config)), 1088bdcd8170SKalle Valo (unsigned char *) ¶m, 4); 1089bdcd8170SKalle Valo } 1090bdcd8170SKalle Valo 109131024d99SKevin Fang if (ar->fw_board_len < board_data_size) { 1092bdcd8170SKalle Valo ath6kl_err("Too small board file: %zu\n", ar->fw_board_len); 1093bdcd8170SKalle Valo ret = -EINVAL; 1094bdcd8170SKalle Valo return ret; 1095bdcd8170SKalle Valo } 1096bdcd8170SKalle Valo 10976bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "writing board file to 0x%x (%d B)\n", 10986bc36431SKalle Valo board_address, board_data_size); 10996bc36431SKalle Valo 1100bdcd8170SKalle Valo ret = ath6kl_bmi_write(ar, board_address, ar->fw_board, 110131024d99SKevin Fang board_data_size); 1102bdcd8170SKalle Valo 1103bdcd8170SKalle Valo if (ret) { 1104bdcd8170SKalle Valo ath6kl_err("Board file bmi write failed: %d\n", ret); 1105bdcd8170SKalle Valo return ret; 1106bdcd8170SKalle Valo } 1107bdcd8170SKalle Valo 1108bdcd8170SKalle Valo /* record the fact that Board Data IS initialized */ 1109bdcd8170SKalle Valo param = 1; 1110bdcd8170SKalle Valo ath6kl_bmi_write(ar, 1111bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 1112bdcd8170SKalle Valo HI_ITEM(hi_board_data_initialized)), 1113bdcd8170SKalle Valo (u8 *)¶m, 4); 1114bdcd8170SKalle Valo 1115bdcd8170SKalle Valo return ret; 1116bdcd8170SKalle Valo } 1117bdcd8170SKalle Valo 1118bdcd8170SKalle Valo static int ath6kl_upload_otp(struct ath6kl *ar) 1119bdcd8170SKalle Valo { 1120bdcd8170SKalle Valo u32 address, param; 1121bef26a7fSKalle Valo bool from_hw = false; 1122bdcd8170SKalle Valo int ret; 1123bdcd8170SKalle Valo 112450e2740bSKalle Valo if (ar->fw_otp == NULL) 112550e2740bSKalle Valo return 0; 1126bdcd8170SKalle Valo 1127a01ac414SKalle Valo address = ar->hw.app_load_addr; 1128bdcd8170SKalle Valo 1129ef548626SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "writing otp to 0x%x (%zd B)\n", address, 11306bc36431SKalle Valo ar->fw_otp_len); 11316bc36431SKalle Valo 1132bdcd8170SKalle Valo ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp, 1133bdcd8170SKalle Valo ar->fw_otp_len); 1134bdcd8170SKalle Valo if (ret) { 1135bdcd8170SKalle Valo ath6kl_err("Failed to upload OTP file: %d\n", ret); 1136bdcd8170SKalle Valo return ret; 1137bdcd8170SKalle Valo } 1138bdcd8170SKalle Valo 1139639d0b89SKalle Valo /* read firmware start address */ 1140639d0b89SKalle Valo ret = ath6kl_bmi_read(ar, 1141639d0b89SKalle Valo ath6kl_get_hi_item_addr(ar, 1142639d0b89SKalle Valo HI_ITEM(hi_app_start)), 1143639d0b89SKalle Valo (u8 *) &address, sizeof(address)); 1144639d0b89SKalle Valo 1145639d0b89SKalle Valo if (ret) { 1146639d0b89SKalle Valo ath6kl_err("Failed to read hi_app_start: %d\n", ret); 1147639d0b89SKalle Valo return ret; 1148639d0b89SKalle Valo } 1149639d0b89SKalle Valo 1150bef26a7fSKalle Valo if (ar->hw.app_start_override_addr == 0) { 1151639d0b89SKalle Valo ar->hw.app_start_override_addr = address; 1152bef26a7fSKalle Valo from_hw = true; 1153bef26a7fSKalle Valo } 1154639d0b89SKalle Valo 1155bef26a7fSKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "app_start_override_addr%s 0x%x\n", 1156bef26a7fSKalle Valo from_hw ? " (from hw)" : "", 11576bc36431SKalle Valo ar->hw.app_start_override_addr); 11586bc36431SKalle Valo 1159bdcd8170SKalle Valo /* execute the OTP code */ 1160bef26a7fSKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "executing OTP at 0x%x\n", 1161bef26a7fSKalle Valo ar->hw.app_start_override_addr); 1162bdcd8170SKalle Valo param = 0; 1163bef26a7fSKalle Valo ath6kl_bmi_execute(ar, ar->hw.app_start_override_addr, ¶m); 1164bdcd8170SKalle Valo 1165bdcd8170SKalle Valo return ret; 1166bdcd8170SKalle Valo } 1167bdcd8170SKalle Valo 1168bdcd8170SKalle Valo static int ath6kl_upload_firmware(struct ath6kl *ar) 1169bdcd8170SKalle Valo { 1170bdcd8170SKalle Valo u32 address; 1171bdcd8170SKalle Valo int ret; 1172bdcd8170SKalle Valo 1173772c31eeSKalle Valo if (WARN_ON(ar->fw == NULL)) 117450e2740bSKalle Valo return 0; 1175bdcd8170SKalle Valo 1176a01ac414SKalle Valo address = ar->hw.app_load_addr; 1177bdcd8170SKalle Valo 1178ef548626SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "writing firmware to 0x%x (%zd B)\n", 11796bc36431SKalle Valo address, ar->fw_len); 11806bc36431SKalle Valo 1181bdcd8170SKalle Valo ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len); 1182bdcd8170SKalle Valo 1183bdcd8170SKalle Valo if (ret) { 1184bdcd8170SKalle Valo ath6kl_err("Failed to write firmware: %d\n", ret); 1185bdcd8170SKalle Valo return ret; 1186bdcd8170SKalle Valo } 1187bdcd8170SKalle Valo 118831024d99SKevin Fang /* 118931024d99SKevin Fang * Set starting address for firmware 119031024d99SKevin Fang * Don't need to setup app_start override addr on AR6004 119131024d99SKevin Fang */ 119231024d99SKevin Fang if (ar->target_type != TARGET_TYPE_AR6004) { 1193a01ac414SKalle Valo address = ar->hw.app_start_override_addr; 1194bdcd8170SKalle Valo ath6kl_bmi_set_app_start(ar, address); 119531024d99SKevin Fang } 1196bdcd8170SKalle Valo return ret; 1197bdcd8170SKalle Valo } 1198bdcd8170SKalle Valo 1199bdcd8170SKalle Valo static int ath6kl_upload_patch(struct ath6kl *ar) 1200bdcd8170SKalle Valo { 1201bdcd8170SKalle Valo u32 address, param; 1202bdcd8170SKalle Valo int ret; 1203bdcd8170SKalle Valo 120450e2740bSKalle Valo if (ar->fw_patch == NULL) 120550e2740bSKalle Valo return 0; 1206bdcd8170SKalle Valo 1207a01ac414SKalle Valo address = ar->hw.dataset_patch_addr; 1208bdcd8170SKalle Valo 1209ef548626SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "writing patch to 0x%x (%zd B)\n", 12106bc36431SKalle Valo address, ar->fw_patch_len); 12116bc36431SKalle Valo 1212bdcd8170SKalle Valo ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len); 1213bdcd8170SKalle Valo if (ret) { 1214bdcd8170SKalle Valo ath6kl_err("Failed to write patch file: %d\n", ret); 1215bdcd8170SKalle Valo return ret; 1216bdcd8170SKalle Valo } 1217bdcd8170SKalle Valo 1218bdcd8170SKalle Valo param = address; 1219bdcd8170SKalle Valo ath6kl_bmi_write(ar, 1220bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 1221bdcd8170SKalle Valo HI_ITEM(hi_dset_list_head)), 1222bdcd8170SKalle Valo (unsigned char *) ¶m, 4); 1223bdcd8170SKalle Valo 1224bdcd8170SKalle Valo return 0; 1225bdcd8170SKalle Valo } 1226bdcd8170SKalle Valo 1227bdcd8170SKalle Valo static int ath6kl_init_upload(struct ath6kl *ar) 1228bdcd8170SKalle Valo { 1229bdcd8170SKalle Valo u32 param, options, sleep, address; 1230bdcd8170SKalle Valo int status = 0; 1231bdcd8170SKalle Valo 123231024d99SKevin Fang if (ar->target_type != TARGET_TYPE_AR6003 && 123331024d99SKevin Fang ar->target_type != TARGET_TYPE_AR6004) 1234bdcd8170SKalle Valo return -EINVAL; 1235bdcd8170SKalle Valo 1236bdcd8170SKalle Valo /* temporarily disable system sleep */ 1237bdcd8170SKalle Valo address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS; 1238bdcd8170SKalle Valo status = ath6kl_bmi_reg_read(ar, address, ¶m); 1239bdcd8170SKalle Valo if (status) 1240bdcd8170SKalle Valo return status; 1241bdcd8170SKalle Valo 1242bdcd8170SKalle Valo options = param; 1243bdcd8170SKalle Valo 1244bdcd8170SKalle Valo param |= ATH6KL_OPTION_SLEEP_DISABLE; 1245bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, address, param); 1246bdcd8170SKalle Valo if (status) 1247bdcd8170SKalle Valo return status; 1248bdcd8170SKalle Valo 1249bdcd8170SKalle Valo address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS; 1250bdcd8170SKalle Valo status = ath6kl_bmi_reg_read(ar, address, ¶m); 1251bdcd8170SKalle Valo if (status) 1252bdcd8170SKalle Valo return status; 1253bdcd8170SKalle Valo 1254bdcd8170SKalle Valo sleep = param; 1255bdcd8170SKalle Valo 1256bdcd8170SKalle Valo param |= SM(SYSTEM_SLEEP_DISABLE, 1); 1257bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, address, param); 1258bdcd8170SKalle Valo if (status) 1259bdcd8170SKalle Valo return status; 1260bdcd8170SKalle Valo 1261bdcd8170SKalle Valo ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n", 1262bdcd8170SKalle Valo options, sleep); 1263bdcd8170SKalle Valo 1264bdcd8170SKalle Valo /* program analog PLL register */ 126531024d99SKevin Fang /* no need to control 40/44MHz clock on AR6004 */ 126631024d99SKevin Fang if (ar->target_type != TARGET_TYPE_AR6004) { 1267bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER, 1268bdcd8170SKalle Valo 0xF9104001); 126931024d99SKevin Fang 1270bdcd8170SKalle Valo if (status) 1271bdcd8170SKalle Valo return status; 1272bdcd8170SKalle Valo 1273bdcd8170SKalle Valo /* Run at 80/88MHz by default */ 1274bdcd8170SKalle Valo param = SM(CPU_CLOCK_STANDARD, 1); 1275bdcd8170SKalle Valo 1276bdcd8170SKalle Valo address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS; 1277bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, address, param); 1278bdcd8170SKalle Valo if (status) 1279bdcd8170SKalle Valo return status; 128031024d99SKevin Fang } 1281bdcd8170SKalle Valo 1282bdcd8170SKalle Valo param = 0; 1283bdcd8170SKalle Valo address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS; 1284bdcd8170SKalle Valo param = SM(LPO_CAL_ENABLE, 1); 1285bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, address, param); 1286bdcd8170SKalle Valo if (status) 1287bdcd8170SKalle Valo return status; 1288bdcd8170SKalle Valo 1289bdcd8170SKalle Valo /* WAR to avoid SDIO CRC err */ 12900d0192baSKalle Valo if (ar->version.target_ver == AR6003_HW_2_0_VERSION) { 1291bdcd8170SKalle Valo ath6kl_err("temporary war to avoid sdio crc error\n"); 1292bdcd8170SKalle Valo 1293bdcd8170SKalle Valo param = 0x20; 1294bdcd8170SKalle Valo 1295bdcd8170SKalle Valo address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS; 1296bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, address, param); 1297bdcd8170SKalle Valo if (status) 1298bdcd8170SKalle Valo return status; 1299bdcd8170SKalle Valo 1300bdcd8170SKalle Valo address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS; 1301bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, address, param); 1302bdcd8170SKalle Valo if (status) 1303bdcd8170SKalle Valo return status; 1304bdcd8170SKalle Valo 1305bdcd8170SKalle Valo address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS; 1306bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, address, param); 1307bdcd8170SKalle Valo if (status) 1308bdcd8170SKalle Valo return status; 1309bdcd8170SKalle Valo 1310bdcd8170SKalle Valo address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS; 1311bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, address, param); 1312bdcd8170SKalle Valo if (status) 1313bdcd8170SKalle Valo return status; 1314bdcd8170SKalle Valo } 1315bdcd8170SKalle Valo 1316bdcd8170SKalle Valo /* write EEPROM data to Target RAM */ 1317bdcd8170SKalle Valo status = ath6kl_upload_board_file(ar); 1318bdcd8170SKalle Valo if (status) 1319bdcd8170SKalle Valo return status; 1320bdcd8170SKalle Valo 1321bdcd8170SKalle Valo /* transfer One time Programmable data */ 1322bdcd8170SKalle Valo status = ath6kl_upload_otp(ar); 1323bdcd8170SKalle Valo if (status) 1324bdcd8170SKalle Valo return status; 1325bdcd8170SKalle Valo 1326bdcd8170SKalle Valo /* Download Target firmware */ 1327bdcd8170SKalle Valo status = ath6kl_upload_firmware(ar); 1328bdcd8170SKalle Valo if (status) 1329bdcd8170SKalle Valo return status; 1330bdcd8170SKalle Valo 1331bdcd8170SKalle Valo status = ath6kl_upload_patch(ar); 1332bdcd8170SKalle Valo if (status) 1333bdcd8170SKalle Valo return status; 1334bdcd8170SKalle Valo 1335bdcd8170SKalle Valo /* Restore system sleep */ 1336bdcd8170SKalle Valo address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS; 1337bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, address, sleep); 1338bdcd8170SKalle Valo if (status) 1339bdcd8170SKalle Valo return status; 1340bdcd8170SKalle Valo 1341bdcd8170SKalle Valo address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS; 1342bdcd8170SKalle Valo param = options | 0x20; 1343bdcd8170SKalle Valo status = ath6kl_bmi_reg_write(ar, address, param); 1344bdcd8170SKalle Valo if (status) 1345bdcd8170SKalle Valo return status; 1346bdcd8170SKalle Valo 1347bdcd8170SKalle Valo /* Configure GPIO AR6003 UART */ 1348bdcd8170SKalle Valo param = CONFIG_AR600x_DEBUG_UART_TX_PIN; 1349bdcd8170SKalle Valo status = ath6kl_bmi_write(ar, 1350bdcd8170SKalle Valo ath6kl_get_hi_item_addr(ar, 1351bdcd8170SKalle Valo HI_ITEM(hi_dbg_uart_txpin)), 1352bdcd8170SKalle Valo (u8 *)¶m, 4); 1353bdcd8170SKalle Valo 1354bdcd8170SKalle Valo return status; 1355bdcd8170SKalle Valo } 1356bdcd8170SKalle Valo 1357a01ac414SKalle Valo static int ath6kl_init_hw_params(struct ath6kl *ar) 1358a01ac414SKalle Valo { 1359856f4b31SKalle Valo const struct ath6kl_hw *hw; 1360856f4b31SKalle Valo int i; 1361bef26a7fSKalle Valo 1362856f4b31SKalle Valo for (i = 0; i < ARRAY_SIZE(hw_list); i++) { 1363856f4b31SKalle Valo hw = &hw_list[i]; 1364bef26a7fSKalle Valo 1365856f4b31SKalle Valo if (hw->id == ar->version.target_ver) 1366a01ac414SKalle Valo break; 1367856f4b31SKalle Valo } 1368856f4b31SKalle Valo 1369856f4b31SKalle Valo if (i == ARRAY_SIZE(hw_list)) { 1370a01ac414SKalle Valo ath6kl_err("Unsupported hardware version: 0x%x\n", 1371a01ac414SKalle Valo ar->version.target_ver); 1372a01ac414SKalle Valo return -EINVAL; 1373a01ac414SKalle Valo } 1374a01ac414SKalle Valo 1375856f4b31SKalle Valo ar->hw = *hw; 1376856f4b31SKalle Valo 13776bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, 13786bc36431SKalle Valo "target_ver 0x%x target_type 0x%x dataset_patch 0x%x app_load_addr 0x%x\n", 13796bc36431SKalle Valo ar->version.target_ver, ar->target_type, 13806bc36431SKalle Valo ar->hw.dataset_patch_addr, ar->hw.app_load_addr); 13816bc36431SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, 13826bc36431SKalle Valo "app_start_override_addr 0x%x board_ext_data_addr 0x%x reserved_ram_size 0x%x", 13836bc36431SKalle Valo ar->hw.app_start_override_addr, ar->hw.board_ext_data_addr, 13846bc36431SKalle Valo ar->hw.reserved_ram_size); 13856bc36431SKalle Valo 1386a01ac414SKalle Valo return 0; 1387a01ac414SKalle Valo } 1388a01ac414SKalle Valo 1389293badf4SKalle Valo static const char *ath6kl_init_get_hif_name(enum ath6kl_hif_type type) 1390293badf4SKalle Valo { 1391293badf4SKalle Valo switch (type) { 1392293badf4SKalle Valo case ATH6KL_HIF_TYPE_SDIO: 1393293badf4SKalle Valo return "sdio"; 1394293badf4SKalle Valo case ATH6KL_HIF_TYPE_USB: 1395293badf4SKalle Valo return "usb"; 1396293badf4SKalle Valo } 1397293badf4SKalle Valo 1398293badf4SKalle Valo return NULL; 1399293badf4SKalle Valo } 1400293badf4SKalle Valo 14015fe4dffbSKalle Valo int ath6kl_init_hw_start(struct ath6kl *ar) 140220459ee2SKalle Valo { 140320459ee2SKalle Valo long timeleft; 140420459ee2SKalle Valo int ret, i; 140520459ee2SKalle Valo 14065fe4dffbSKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "hw start\n"); 14075fe4dffbSKalle Valo 140820459ee2SKalle Valo ret = ath6kl_hif_power_on(ar); 140920459ee2SKalle Valo if (ret) 141020459ee2SKalle Valo return ret; 141120459ee2SKalle Valo 141220459ee2SKalle Valo ret = ath6kl_configure_target(ar); 141320459ee2SKalle Valo if (ret) 141420459ee2SKalle Valo goto err_power_off; 141520459ee2SKalle Valo 141620459ee2SKalle Valo ret = ath6kl_init_upload(ar); 141720459ee2SKalle Valo if (ret) 141820459ee2SKalle Valo goto err_power_off; 141920459ee2SKalle Valo 142020459ee2SKalle Valo /* Do we need to finish the BMI phase */ 142120459ee2SKalle Valo /* FIXME: return error from ath6kl_bmi_done() */ 142220459ee2SKalle Valo if (ath6kl_bmi_done(ar)) { 142320459ee2SKalle Valo ret = -EIO; 142420459ee2SKalle Valo goto err_power_off; 142520459ee2SKalle Valo } 142620459ee2SKalle Valo 142720459ee2SKalle Valo /* 142820459ee2SKalle Valo * The reason we have to wait for the target here is that the 142920459ee2SKalle Valo * driver layer has to init BMI in order to set the host block 143020459ee2SKalle Valo * size. 143120459ee2SKalle Valo */ 143220459ee2SKalle Valo if (ath6kl_htc_wait_target(ar->htc_target)) { 143320459ee2SKalle Valo ret = -EIO; 143420459ee2SKalle Valo goto err_power_off; 143520459ee2SKalle Valo } 143620459ee2SKalle Valo 143720459ee2SKalle Valo if (ath6kl_init_service_ep(ar)) { 143820459ee2SKalle Valo ret = -EIO; 143920459ee2SKalle Valo goto err_cleanup_scatter; 144020459ee2SKalle Valo } 144120459ee2SKalle Valo 144220459ee2SKalle Valo /* setup credit distribution */ 144320459ee2SKalle Valo ath6kl_credit_setup(ar->htc_target, &ar->credit_state_info); 144420459ee2SKalle Valo 144520459ee2SKalle Valo /* start HTC */ 144620459ee2SKalle Valo ret = ath6kl_htc_start(ar->htc_target); 144720459ee2SKalle Valo if (ret) { 144820459ee2SKalle Valo /* FIXME: call this */ 144920459ee2SKalle Valo ath6kl_cookie_cleanup(ar); 145020459ee2SKalle Valo goto err_cleanup_scatter; 145120459ee2SKalle Valo } 145220459ee2SKalle Valo 145320459ee2SKalle Valo /* Wait for Wmi event to be ready */ 145420459ee2SKalle Valo timeleft = wait_event_interruptible_timeout(ar->event_wq, 145520459ee2SKalle Valo test_bit(WMI_READY, 145620459ee2SKalle Valo &ar->flag), 145720459ee2SKalle Valo WMI_TIMEOUT); 145820459ee2SKalle Valo 145920459ee2SKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "firmware booted\n"); 146020459ee2SKalle Valo 1461293badf4SKalle Valo 1462293badf4SKalle Valo if (test_and_clear_bit(FIRST_BOOT, &ar->flag)) { 1463293badf4SKalle Valo ath6kl_info("%s %s fw %s%s\n", 1464293badf4SKalle Valo ar->hw.name, 1465293badf4SKalle Valo ath6kl_init_get_hif_name(ar->hif_type), 1466293badf4SKalle Valo ar->wiphy->fw_version, 1467293badf4SKalle Valo test_bit(TESTMODE, &ar->flag) ? " testmode" : ""); 1468293badf4SKalle Valo } 1469293badf4SKalle Valo 147020459ee2SKalle Valo if (ar->version.abi_ver != ATH6KL_ABI_VERSION) { 147120459ee2SKalle Valo ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n", 147220459ee2SKalle Valo ATH6KL_ABI_VERSION, ar->version.abi_ver); 147320459ee2SKalle Valo ret = -EIO; 147420459ee2SKalle Valo goto err_htc_stop; 147520459ee2SKalle Valo } 147620459ee2SKalle Valo 147720459ee2SKalle Valo if (!timeleft || signal_pending(current)) { 147820459ee2SKalle Valo ath6kl_err("wmi is not ready or wait was interrupted\n"); 147920459ee2SKalle Valo ret = -EIO; 148020459ee2SKalle Valo goto err_htc_stop; 148120459ee2SKalle Valo } 148220459ee2SKalle Valo 148320459ee2SKalle Valo ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__); 148420459ee2SKalle Valo 148520459ee2SKalle Valo /* communicate the wmi protocol verision to the target */ 148620459ee2SKalle Valo /* FIXME: return error */ 148720459ee2SKalle Valo if ((ath6kl_set_host_app_area(ar)) != 0) 148820459ee2SKalle Valo ath6kl_err("unable to set the host app area\n"); 148920459ee2SKalle Valo 149071f96ee6SKalle Valo for (i = 0; i < ar->vif_max; i++) { 149120459ee2SKalle Valo ret = ath6kl_target_config_wlan_params(ar, i); 149220459ee2SKalle Valo if (ret) 149320459ee2SKalle Valo goto err_htc_stop; 149420459ee2SKalle Valo } 149520459ee2SKalle Valo 149676a9fbe2SKalle Valo ar->state = ATH6KL_STATE_ON; 149776a9fbe2SKalle Valo 149820459ee2SKalle Valo return 0; 149920459ee2SKalle Valo 150020459ee2SKalle Valo err_htc_stop: 150120459ee2SKalle Valo ath6kl_htc_stop(ar->htc_target); 150220459ee2SKalle Valo err_cleanup_scatter: 150320459ee2SKalle Valo ath6kl_hif_cleanup_scatter(ar); 150420459ee2SKalle Valo err_power_off: 150520459ee2SKalle Valo ath6kl_hif_power_off(ar); 150620459ee2SKalle Valo 150720459ee2SKalle Valo return ret; 150820459ee2SKalle Valo } 150920459ee2SKalle Valo 15105fe4dffbSKalle Valo int ath6kl_init_hw_stop(struct ath6kl *ar) 15115fe4dffbSKalle Valo { 15125fe4dffbSKalle Valo int ret; 15135fe4dffbSKalle Valo 15145fe4dffbSKalle Valo ath6kl_dbg(ATH6KL_DBG_BOOT, "hw stop\n"); 15155fe4dffbSKalle Valo 15165fe4dffbSKalle Valo ath6kl_htc_stop(ar->htc_target); 15175fe4dffbSKalle Valo 15185fe4dffbSKalle Valo ath6kl_hif_stop(ar); 15195fe4dffbSKalle Valo 15205fe4dffbSKalle Valo ath6kl_bmi_reset(ar); 15215fe4dffbSKalle Valo 15225fe4dffbSKalle Valo ret = ath6kl_hif_power_off(ar); 15235fe4dffbSKalle Valo if (ret) 15245fe4dffbSKalle Valo ath6kl_warn("failed to power off hif: %d\n", ret); 15255fe4dffbSKalle Valo 152676a9fbe2SKalle Valo ar->state = ATH6KL_STATE_OFF; 152776a9fbe2SKalle Valo 15285fe4dffbSKalle Valo return 0; 15295fe4dffbSKalle Valo } 15305fe4dffbSKalle Valo 1531bdcd8170SKalle Valo int ath6kl_core_init(struct ath6kl *ar) 1532bdcd8170SKalle Valo { 1533bdcd8170SKalle Valo struct ath6kl_bmi_target_info targ_info; 153461448a93SKalle Valo struct net_device *ndev; 153520459ee2SKalle Valo int ret = 0, i; 1536bdcd8170SKalle Valo 1537bdcd8170SKalle Valo ar->ath6kl_wq = create_singlethread_workqueue("ath6kl"); 1538bdcd8170SKalle Valo if (!ar->ath6kl_wq) 1539bdcd8170SKalle Valo return -ENOMEM; 1540bdcd8170SKalle Valo 1541bdcd8170SKalle Valo ret = ath6kl_bmi_init(ar); 1542bdcd8170SKalle Valo if (ret) 1543bdcd8170SKalle Valo goto err_wq; 1544bdcd8170SKalle Valo 154520459ee2SKalle Valo /* 154620459ee2SKalle Valo * Turn on power to get hardware (target) version and leave power 154720459ee2SKalle Valo * on delibrately as we will boot the hardware anyway within few 154820459ee2SKalle Valo * seconds. 154920459ee2SKalle Valo */ 1550b2e75698SKalle Valo ret = ath6kl_hif_power_on(ar); 1551bdcd8170SKalle Valo if (ret) 1552bdcd8170SKalle Valo goto err_bmi_cleanup; 1553bdcd8170SKalle Valo 1554b2e75698SKalle Valo ret = ath6kl_bmi_get_target_info(ar, &targ_info); 1555b2e75698SKalle Valo if (ret) 1556b2e75698SKalle Valo goto err_power_off; 1557b2e75698SKalle Valo 1558bdcd8170SKalle Valo ar->version.target_ver = le32_to_cpu(targ_info.version); 1559bdcd8170SKalle Valo ar->target_type = le32_to_cpu(targ_info.type); 1560be98e3a4SVasanthakumar Thiagarajan ar->wiphy->hw_version = le32_to_cpu(targ_info.version); 1561bdcd8170SKalle Valo 1562a01ac414SKalle Valo ret = ath6kl_init_hw_params(ar); 1563a01ac414SKalle Valo if (ret) 1564b2e75698SKalle Valo goto err_power_off; 1565a01ac414SKalle Valo 1566ad226ec2SKalle Valo ar->htc_target = ath6kl_htc_create(ar); 1567bdcd8170SKalle Valo 1568bdcd8170SKalle Valo if (!ar->htc_target) { 1569bdcd8170SKalle Valo ret = -ENOMEM; 1570b2e75698SKalle Valo goto err_power_off; 1571bdcd8170SKalle Valo } 1572bdcd8170SKalle Valo 1573772c31eeSKalle Valo ret = ath6kl_fetch_firmwares(ar); 1574772c31eeSKalle Valo if (ret) 1575772c31eeSKalle Valo goto err_htc_cleanup; 1576772c31eeSKalle Valo 157761448a93SKalle Valo /* FIXME: we should free all firmwares in the error cases below */ 157861448a93SKalle Valo 157961448a93SKalle Valo /* Indicate that WMI is enabled (although not ready yet) */ 158061448a93SKalle Valo set_bit(WMI_ENABLED, &ar->flag); 158161448a93SKalle Valo ar->wmi = ath6kl_wmi_init(ar); 158261448a93SKalle Valo if (!ar->wmi) { 158361448a93SKalle Valo ath6kl_err("failed to initialize wmi\n"); 158461448a93SKalle Valo ret = -EIO; 158561448a93SKalle Valo goto err_htc_cleanup; 158661448a93SKalle Valo } 158761448a93SKalle Valo 158861448a93SKalle Valo ath6kl_dbg(ATH6KL_DBG_TRC, "%s: got wmi @ 0x%p.\n", __func__, ar->wmi); 158961448a93SKalle Valo 159061448a93SKalle Valo ret = ath6kl_register_ieee80211_hw(ar); 159161448a93SKalle Valo if (ret) 159261448a93SKalle Valo goto err_node_cleanup; 159361448a93SKalle Valo 159461448a93SKalle Valo ret = ath6kl_debug_init(ar); 159561448a93SKalle Valo if (ret) { 159661448a93SKalle Valo wiphy_unregister(ar->wiphy); 159761448a93SKalle Valo goto err_node_cleanup; 159861448a93SKalle Valo } 159961448a93SKalle Valo 160071f96ee6SKalle Valo for (i = 0; i < ar->vif_max; i++) 160161448a93SKalle Valo ar->avail_idx_map |= BIT(i); 160261448a93SKalle Valo 160361448a93SKalle Valo rtnl_lock(); 160461448a93SKalle Valo 160561448a93SKalle Valo /* Add an initial station interface */ 160661448a93SKalle Valo ndev = ath6kl_interface_add(ar, "wlan%d", NL80211_IFTYPE_STATION, 0, 160761448a93SKalle Valo INFRA_NETWORK); 160861448a93SKalle Valo 160961448a93SKalle Valo rtnl_unlock(); 161061448a93SKalle Valo 161161448a93SKalle Valo if (!ndev) { 161261448a93SKalle Valo ath6kl_err("Failed to instantiate a network device\n"); 161361448a93SKalle Valo ret = -ENOMEM; 161461448a93SKalle Valo wiphy_unregister(ar->wiphy); 161561448a93SKalle Valo goto err_debug_init; 161661448a93SKalle Valo } 161761448a93SKalle Valo 161861448a93SKalle Valo 161961448a93SKalle Valo ath6kl_dbg(ATH6KL_DBG_TRC, "%s: name=%s dev=0x%p, ar=0x%p\n", 162061448a93SKalle Valo __func__, ndev->name, ndev, ar); 162161448a93SKalle Valo 162261448a93SKalle Valo /* setup access class priority mappings */ 162361448a93SKalle Valo ar->ac_stream_pri_map[WMM_AC_BK] = 0; /* lowest */ 162461448a93SKalle Valo ar->ac_stream_pri_map[WMM_AC_BE] = 1; 162561448a93SKalle Valo ar->ac_stream_pri_map[WMM_AC_VI] = 2; 162661448a93SKalle Valo ar->ac_stream_pri_map[WMM_AC_VO] = 3; /* highest */ 162761448a93SKalle Valo 162861448a93SKalle Valo /* give our connected endpoints some buffers */ 162961448a93SKalle Valo ath6kl_rx_refill(ar->htc_target, ar->ctrl_ep); 163061448a93SKalle Valo ath6kl_rx_refill(ar->htc_target, ar->ac2ep_map[WMM_AC_BE]); 163161448a93SKalle Valo 163261448a93SKalle Valo /* allocate some buffers that handle larger AMSDU frames */ 163361448a93SKalle Valo ath6kl_refill_amsdu_rxbufs(ar, ATH6KL_MAX_AMSDU_RX_BUFFERS); 163461448a93SKalle Valo 163561448a93SKalle Valo ath6kl_cookie_init(ar); 163661448a93SKalle Valo 163761448a93SKalle Valo ar->conf_flags = ATH6KL_CONF_IGNORE_ERP_BARKER | 163861448a93SKalle Valo ATH6KL_CONF_ENABLE_11N | ATH6KL_CONF_ENABLE_TX_BURST; 163961448a93SKalle Valo 16408277de15SKalle Valo if (suspend_cutpower) 16418277de15SKalle Valo ar->conf_flags |= ATH6KL_CONF_SUSPEND_CUTPOWER; 16428277de15SKalle Valo 164361448a93SKalle Valo ar->wiphy->flags |= WIPHY_FLAG_SUPPORTS_FW_ROAM | 1644fb94333aSArik Nemtsov WIPHY_FLAG_HAVE_AP_SME | 1645fb94333aSArik Nemtsov WIPHY_FLAG_AP_PROBE_RESP_OFFLOAD; 1646fb94333aSArik Nemtsov 1647fb94333aSArik Nemtsov ar->wiphy->probe_resp_offload = 1648fb94333aSArik Nemtsov NL80211_PROBE_RESP_OFFLOAD_SUPPORT_WPS | 1649fb94333aSArik Nemtsov NL80211_PROBE_RESP_OFFLOAD_SUPPORT_WPS2 | 1650fb94333aSArik Nemtsov NL80211_PROBE_RESP_OFFLOAD_SUPPORT_P2P | 1651fb94333aSArik Nemtsov NL80211_PROBE_RESP_OFFLOAD_SUPPORT_80211U; 165261448a93SKalle Valo 16535fe4dffbSKalle Valo set_bit(FIRST_BOOT, &ar->flag); 16545fe4dffbSKalle Valo 16555fe4dffbSKalle Valo ret = ath6kl_init_hw_start(ar); 165620459ee2SKalle Valo if (ret) { 16575fe4dffbSKalle Valo ath6kl_err("Failed to start hardware: %d\n", ret); 165820459ee2SKalle Valo goto err_rxbuf_cleanup; 165961448a93SKalle Valo } 166061448a93SKalle Valo 166161448a93SKalle Valo /* 166261448a93SKalle Valo * Set mac address which is received in ready event 166361448a93SKalle Valo * FIXME: Move to ath6kl_interface_add() 166461448a93SKalle Valo */ 166561448a93SKalle Valo memcpy(ndev->dev_addr, ar->mac_addr, ETH_ALEN); 1666bdcd8170SKalle Valo 1667bdcd8170SKalle Valo return ret; 1668bdcd8170SKalle Valo 166961448a93SKalle Valo err_rxbuf_cleanup: 167061448a93SKalle Valo ath6kl_htc_flush_rx_buf(ar->htc_target); 167161448a93SKalle Valo ath6kl_cleanup_amsdu_rxbufs(ar); 167261448a93SKalle Valo rtnl_lock(); 167361448a93SKalle Valo ath6kl_deinit_if_data(netdev_priv(ndev)); 167461448a93SKalle Valo rtnl_unlock(); 167561448a93SKalle Valo wiphy_unregister(ar->wiphy); 167661448a93SKalle Valo err_debug_init: 167761448a93SKalle Valo ath6kl_debug_cleanup(ar); 167861448a93SKalle Valo err_node_cleanup: 167961448a93SKalle Valo ath6kl_wmi_shutdown(ar->wmi); 168061448a93SKalle Valo clear_bit(WMI_ENABLED, &ar->flag); 168161448a93SKalle Valo ar->wmi = NULL; 1682bdcd8170SKalle Valo err_htc_cleanup: 1683ad226ec2SKalle Valo ath6kl_htc_cleanup(ar->htc_target); 1684b2e75698SKalle Valo err_power_off: 1685b2e75698SKalle Valo ath6kl_hif_power_off(ar); 1686bdcd8170SKalle Valo err_bmi_cleanup: 1687bdcd8170SKalle Valo ath6kl_bmi_cleanup(ar); 1688bdcd8170SKalle Valo err_wq: 1689bdcd8170SKalle Valo destroy_workqueue(ar->ath6kl_wq); 16908dafb70eSVasanthakumar Thiagarajan 1691bdcd8170SKalle Valo return ret; 1692bdcd8170SKalle Valo } 1693bdcd8170SKalle Valo 169455055976SVasanthakumar Thiagarajan void ath6kl_cleanup_vif(struct ath6kl_vif *vif, bool wmi_ready) 16956db8fa53SVasanthakumar Thiagarajan { 16966db8fa53SVasanthakumar Thiagarajan static u8 bcast_mac[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; 16976db8fa53SVasanthakumar Thiagarajan bool discon_issued; 16986db8fa53SVasanthakumar Thiagarajan 16996db8fa53SVasanthakumar Thiagarajan netif_stop_queue(vif->ndev); 17006db8fa53SVasanthakumar Thiagarajan 17016db8fa53SVasanthakumar Thiagarajan clear_bit(WLAN_ENABLED, &vif->flags); 17026db8fa53SVasanthakumar Thiagarajan 17036db8fa53SVasanthakumar Thiagarajan if (wmi_ready) { 17046db8fa53SVasanthakumar Thiagarajan discon_issued = test_bit(CONNECTED, &vif->flags) || 17056db8fa53SVasanthakumar Thiagarajan test_bit(CONNECT_PEND, &vif->flags); 17066db8fa53SVasanthakumar Thiagarajan ath6kl_disconnect(vif); 17076db8fa53SVasanthakumar Thiagarajan del_timer(&vif->disconnect_timer); 17086db8fa53SVasanthakumar Thiagarajan 17096db8fa53SVasanthakumar Thiagarajan if (discon_issued) 17106db8fa53SVasanthakumar Thiagarajan ath6kl_disconnect_event(vif, DISCONNECT_CMD, 17116db8fa53SVasanthakumar Thiagarajan (vif->nw_type & AP_NETWORK) ? 17126db8fa53SVasanthakumar Thiagarajan bcast_mac : vif->bssid, 17136db8fa53SVasanthakumar Thiagarajan 0, NULL, 0); 17146db8fa53SVasanthakumar Thiagarajan } 17156db8fa53SVasanthakumar Thiagarajan 17166db8fa53SVasanthakumar Thiagarajan if (vif->scan_req) { 17176db8fa53SVasanthakumar Thiagarajan cfg80211_scan_done(vif->scan_req, true); 17186db8fa53SVasanthakumar Thiagarajan vif->scan_req = NULL; 17196db8fa53SVasanthakumar Thiagarajan } 17206db8fa53SVasanthakumar Thiagarajan } 17216db8fa53SVasanthakumar Thiagarajan 1722bdcd8170SKalle Valo void ath6kl_stop_txrx(struct ath6kl *ar) 1723bdcd8170SKalle Valo { 1724990bd915SVasanthakumar Thiagarajan struct ath6kl_vif *vif, *tmp_vif; 1725bdcd8170SKalle Valo 1726bdcd8170SKalle Valo set_bit(DESTROY_IN_PROGRESS, &ar->flag); 1727bdcd8170SKalle Valo 1728bdcd8170SKalle Valo if (down_interruptible(&ar->sem)) { 1729bdcd8170SKalle Valo ath6kl_err("down_interruptible failed\n"); 1730bdcd8170SKalle Valo return; 1731bdcd8170SKalle Valo } 1732bdcd8170SKalle Valo 173311f6e40dSVasanthakumar Thiagarajan spin_lock_bh(&ar->list_lock); 1734990bd915SVasanthakumar Thiagarajan list_for_each_entry_safe(vif, tmp_vif, &ar->vif_list, list) { 1735990bd915SVasanthakumar Thiagarajan list_del(&vif->list); 173611f6e40dSVasanthakumar Thiagarajan spin_unlock_bh(&ar->list_lock); 1737990bd915SVasanthakumar Thiagarajan ath6kl_cleanup_vif(vif, test_bit(WMI_READY, &ar->flag)); 173827929723SVasanthakumar Thiagarajan rtnl_lock(); 173927929723SVasanthakumar Thiagarajan ath6kl_deinit_if_data(vif); 174027929723SVasanthakumar Thiagarajan rtnl_unlock(); 174111f6e40dSVasanthakumar Thiagarajan spin_lock_bh(&ar->list_lock); 1742990bd915SVasanthakumar Thiagarajan } 174311f6e40dSVasanthakumar Thiagarajan spin_unlock_bh(&ar->list_lock); 1744bdcd8170SKalle Valo 17456db8fa53SVasanthakumar Thiagarajan clear_bit(WMI_READY, &ar->flag); 17466db8fa53SVasanthakumar Thiagarajan 17476db8fa53SVasanthakumar Thiagarajan /* 17486db8fa53SVasanthakumar Thiagarajan * After wmi_shudown all WMI events will be dropped. We 17496db8fa53SVasanthakumar Thiagarajan * need to cleanup the buffers allocated in AP mode and 17506db8fa53SVasanthakumar Thiagarajan * give disconnect notification to stack, which usually 17516db8fa53SVasanthakumar Thiagarajan * happens in the disconnect_event. Simulate the disconnect 17526db8fa53SVasanthakumar Thiagarajan * event by calling the function directly. Sometimes 17536db8fa53SVasanthakumar Thiagarajan * disconnect_event will be received when the debug logs 17546db8fa53SVasanthakumar Thiagarajan * are collected. 17556db8fa53SVasanthakumar Thiagarajan */ 17566db8fa53SVasanthakumar Thiagarajan ath6kl_wmi_shutdown(ar->wmi); 17576db8fa53SVasanthakumar Thiagarajan 17586db8fa53SVasanthakumar Thiagarajan clear_bit(WMI_ENABLED, &ar->flag); 17596db8fa53SVasanthakumar Thiagarajan if (ar->htc_target) { 17606db8fa53SVasanthakumar Thiagarajan ath6kl_dbg(ATH6KL_DBG_TRC, "%s: shut down htc\n", __func__); 17616db8fa53SVasanthakumar Thiagarajan ath6kl_htc_stop(ar->htc_target); 1762bdcd8170SKalle Valo } 1763bdcd8170SKalle Valo 1764bdcd8170SKalle Valo /* 17656db8fa53SVasanthakumar Thiagarajan * Try to reset the device if we can. The driver may have been 17666db8fa53SVasanthakumar Thiagarajan * configure NOT to reset the target during a debug session. 1767bdcd8170SKalle Valo */ 17686db8fa53SVasanthakumar Thiagarajan ath6kl_dbg(ATH6KL_DBG_TRC, 17696db8fa53SVasanthakumar Thiagarajan "attempting to reset target on instance destroy\n"); 17706db8fa53SVasanthakumar Thiagarajan ath6kl_reset_device(ar, ar->target_type, true, true); 1771bdcd8170SKalle Valo 17726db8fa53SVasanthakumar Thiagarajan clear_bit(WLAN_ENABLED, &ar->flag); 1773bdcd8170SKalle Valo } 1774