1 /*- 2 * Copyright (c) 2002-2007 Sam Leffler, Errno Consulting 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification. 11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 12 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 13 * redistribution must be conditioned upon including a substantially 14 * similar Disclaimer requirement for further binary redistribution. 15 * 3. Neither the names of the above-listed copyright holders nor the names 16 * of any contributors may be used to endorse or promote products derived 17 * from this software without specific prior written permission. 18 * 19 * Alternatively, this software may be distributed under the terms of the 20 * GNU General Public License ("GPL") version 2 as published by the Free 21 * Software Foundation. 22 * 23 * NO WARRANTY 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 25 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 26 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 27 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 28 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 29 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 32 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 34 * THE POSSIBILITY OF SUCH DAMAGES. 35 * 36 */ 37 38 /* 39 * Definitions for the Atheros Wireless LAN controller driver. 40 */ 41 #ifndef _DEV_ATH_ATHVAR_H 42 #define _DEV_ATH_ATHVAR_H 43 44 #include <linux/interrupt.h> 45 #include <linux/list.h> 46 #include <linux/wireless.h> 47 #include <linux/if_ether.h> 48 #include <linux/leds.h> 49 #include <linux/rfkill.h> 50 51 #include "ath5k.h" 52 #include "debug.h" 53 #include "ani.h" 54 55 #include "../regd.h" 56 #include "../ath.h" 57 58 #define ATH_RXBUF 40 /* number of RX buffers */ 59 #define ATH_TXBUF 200 /* number of TX buffers */ 60 #define ATH_BCBUF 1 /* number of beacon buffers */ 61 62 struct ath5k_buf { 63 struct list_head list; 64 struct ath5k_desc *desc; /* virtual addr of desc */ 65 dma_addr_t daddr; /* physical addr of desc */ 66 struct sk_buff *skb; /* skbuff for buf */ 67 dma_addr_t skbaddr;/* physical addr of skb data */ 68 }; 69 70 /* 71 * Data transmit queue state. One of these exists for each 72 * hardware transmit queue. Packets sent to us from above 73 * are assigned to queues based on their priority. Not all 74 * devices support a complete set of hardware transmit queues. 75 * For those devices the array sc_ac2q will map multiple 76 * priorities to fewer hardware queues (typically all to one 77 * hardware queue). 78 */ 79 struct ath5k_txq { 80 unsigned int qnum; /* hardware q number */ 81 u32 *link; /* link ptr in last TX desc */ 82 struct list_head q; /* transmit queue */ 83 spinlock_t lock; /* lock on q and link */ 84 bool setup; 85 }; 86 87 #define ATH5K_LED_MAX_NAME_LEN 31 88 89 /* 90 * State for LED triggers 91 */ 92 struct ath5k_led 93 { 94 char name[ATH5K_LED_MAX_NAME_LEN + 1]; /* name of the LED in sysfs */ 95 struct ath5k_softc *sc; /* driver state */ 96 struct led_classdev led_dev; /* led classdev */ 97 }; 98 99 /* Rfkill */ 100 struct ath5k_rfkill { 101 /* GPIO PIN for rfkill */ 102 u16 gpio; 103 /* polarity of rfkill GPIO PIN */ 104 bool polarity; 105 /* RFKILL toggle tasklet */ 106 struct tasklet_struct toggleq; 107 }; 108 109 /* statistics */ 110 struct ath5k_statistics { 111 /* antenna use */ 112 unsigned int antenna_rx[5]; /* frames count per antenna RX */ 113 unsigned int antenna_tx[5]; /* frames count per antenna TX */ 114 115 /* frame errors */ 116 unsigned int rx_all_count; /* all RX frames, including errors */ 117 unsigned int tx_all_count; /* all TX frames, including errors */ 118 unsigned int rxerr_crc; 119 unsigned int rxerr_phy; 120 unsigned int rxerr_phy_code[32]; 121 unsigned int rxerr_fifo; 122 unsigned int rxerr_decrypt; 123 unsigned int rxerr_mic; 124 unsigned int rxerr_proc; 125 unsigned int rxerr_jumbo; 126 unsigned int txerr_retry; 127 unsigned int txerr_fifo; 128 unsigned int txerr_filt; 129 130 /* MIB counters */ 131 unsigned int ack_fail; 132 unsigned int rts_fail; 133 unsigned int rts_ok; 134 unsigned int fcs_error; 135 unsigned int beacons; 136 137 unsigned int mib_intr; 138 unsigned int rxorn_intr; 139 }; 140 141 #if CHAN_DEBUG 142 #define ATH_CHAN_MAX (26+26+26+200+200) 143 #else 144 #define ATH_CHAN_MAX (14+14+14+252+20) 145 #endif 146 147 /* Software Carrier, keeps track of the driver state 148 * associated with an instance of a device */ 149 struct ath5k_softc { 150 struct pci_dev *pdev; /* for dma mapping */ 151 void __iomem *iobase; /* address of the device */ 152 struct mutex lock; /* dev-level lock */ 153 struct ieee80211_hw *hw; /* IEEE 802.11 common */ 154 struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS]; 155 struct ieee80211_channel channels[ATH_CHAN_MAX]; 156 struct ieee80211_rate rates[IEEE80211_NUM_BANDS][AR5K_MAX_RATES]; 157 s8 rate_idx[IEEE80211_NUM_BANDS][AR5K_MAX_RATES]; 158 enum nl80211_iftype opmode; 159 struct ath5k_hw *ah; /* Atheros HW */ 160 161 struct ieee80211_supported_band *curband; 162 163 #ifdef CONFIG_ATH5K_DEBUG 164 struct ath5k_dbg_info debug; /* debug info */ 165 #endif /* CONFIG_ATH5K_DEBUG */ 166 167 struct ath5k_buf *bufptr; /* allocated buffer ptr */ 168 struct ath5k_desc *desc; /* TX/RX descriptors */ 169 dma_addr_t desc_daddr; /* DMA (physical) address */ 170 size_t desc_len; /* size of TX/RX descriptors */ 171 172 DECLARE_BITMAP(status, 5); 173 #define ATH_STAT_INVALID 0 /* disable hardware accesses */ 174 #define ATH_STAT_MRRETRY 1 /* multi-rate retry support */ 175 #define ATH_STAT_PROMISC 2 176 #define ATH_STAT_LEDSOFT 3 /* enable LED gpio status */ 177 #define ATH_STAT_STARTED 4 /* opened & irqs enabled */ 178 179 unsigned int filter_flags; /* HW flags, AR5K_RX_FILTER_* */ 180 unsigned int curmode; /* current phy mode */ 181 struct ieee80211_channel *curchan; /* current h/w channel */ 182 183 struct ieee80211_vif *vif; 184 185 enum ath5k_int imask; /* interrupt mask copy */ 186 187 u8 bssidmask[ETH_ALEN]; 188 189 unsigned int led_pin, /* GPIO pin for driving LED */ 190 led_on; /* pin setting for LED on */ 191 192 struct tasklet_struct restq; /* reset tasklet */ 193 194 unsigned int rxbufsize; /* rx size based on mtu */ 195 struct list_head rxbuf; /* receive buffer */ 196 spinlock_t rxbuflock; 197 u32 *rxlink; /* link ptr in last RX desc */ 198 struct tasklet_struct rxtq; /* rx intr tasklet */ 199 struct ath5k_led rx_led; /* rx led */ 200 201 struct list_head txbuf; /* transmit buffer */ 202 spinlock_t txbuflock; 203 unsigned int txbuf_len; /* buf count in txbuf list */ 204 struct ath5k_txq txqs[AR5K_NUM_TX_QUEUES]; /* tx queues */ 205 struct ath5k_txq *txq; /* main tx queue */ 206 struct tasklet_struct txtq; /* tx intr tasklet */ 207 struct ath5k_led tx_led; /* tx led */ 208 209 struct ath5k_rfkill rf_kill; 210 211 struct tasklet_struct calib; /* calibration tasklet */ 212 213 spinlock_t block; /* protects beacon */ 214 struct tasklet_struct beacontq; /* beacon intr tasklet */ 215 struct ath5k_buf *bbuf; /* beacon buffer */ 216 unsigned int bhalq, /* SW q for outgoing beacons */ 217 bmisscount, /* missed beacon transmits */ 218 bintval, /* beacon interval in TU */ 219 bsent; 220 unsigned int nexttbtt; /* next beacon time in TU */ 221 struct ath5k_txq *cabq; /* content after beacon */ 222 223 int power_level; /* Requested tx power in dbm */ 224 bool assoc; /* associate state */ 225 bool enable_beacon; /* true if beacons are on */ 226 227 struct ath5k_statistics stats; 228 229 struct ath5k_ani_state ani_state; 230 struct tasklet_struct ani_tasklet; /* ANI calibration */ 231 }; 232 233 #define ath5k_hw_hasbssidmask(_ah) \ 234 (ath5k_hw_get_capability(_ah, AR5K_CAP_BSSIDMASK, 0, NULL) == 0) 235 #define ath5k_hw_hasveol(_ah) \ 236 (ath5k_hw_get_capability(_ah, AR5K_CAP_VEOL, 0, NULL) == 0) 237 238 #endif 239