1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */ 2 /* 3 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved. 4 * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. 5 */ 6 7 #ifndef ATH12K_WMI_H 8 #define ATH12K_WMI_H 9 10 #include <net/mac80211.h> 11 #include "htc.h" 12 #include "cmn_defs.h" 13 14 /* Naming conventions for structures: 15 * 16 * _cmd means that this is a firmware command sent from host to firmware. 17 * 18 * _event means that this is a firmware event sent from firmware to host 19 * 20 * _params is a structure which is embedded either into _cmd or _event (or 21 * both), it is not sent individually. 22 * 23 * _arg is used inside the host, the firmware does not see that at all. 24 */ 25 26 struct ath12k_base; 27 struct ath12k; 28 struct ath12k_link_vif; 29 struct ath12k_fw_stats; 30 struct ath12k_reg_tpc_power_info; 31 32 /* There is no signed version of __le32, so for a temporary solution come 33 * up with our own version. The idea is from fs/ntfs/endian.h. 34 * 35 * Use a_ prefix so that it doesn't conflict if we get proper support to 36 * linux/types.h. 37 */ 38 typedef __s32 __bitwise a_sle32; 39 40 static inline a_sle32 a_cpu_to_sle32(s32 val) 41 { 42 return (__force a_sle32)cpu_to_le32(val); 43 } 44 45 static inline s32 a_sle32_to_cpu(a_sle32 val) 46 { 47 return le32_to_cpu((__force __le32)val); 48 } 49 50 /* defines to set Packet extension values which can be 0 us, 8 usec or 16 usec */ 51 #define MAX_HE_NSS 8 52 #define MAX_HE_MODULATION 8 53 #define MAX_HE_RU 4 54 #define HE_MODULATION_NONE 7 55 #define HE_PET_0_USEC 0 56 #define HE_PET_8_USEC 1 57 #define HE_PET_16_USEC 2 58 59 #define WMI_MAX_CHAINS 8 60 61 #define WMI_MAX_NUM_SS MAX_HE_NSS 62 #define WMI_MAX_NUM_RU MAX_HE_RU 63 64 #define WMI_TLV_CMD(grp_id) (((grp_id) << 12) | 0x1) 65 #define WMI_TLV_EV(grp_id) (((grp_id) << 12) | 0x1) 66 #define WMI_TLV_CMD_UNSUPPORTED 0 67 #define WMI_TLV_PDEV_PARAM_UNSUPPORTED 0 68 #define WMI_TLV_VDEV_PARAM_UNSUPPORTED 0 69 70 struct wmi_cmd_hdr { 71 __le32 cmd_id; 72 } __packed; 73 74 struct wmi_tlv { 75 __le32 header; 76 u8 value[]; 77 } __packed; 78 79 #define WMI_TLV_LEN GENMASK(15, 0) 80 #define WMI_TLV_TAG GENMASK(31, 16) 81 #define TLV_HDR_SIZE sizeof_field(struct wmi_tlv, header) 82 83 #define WMI_CMD_HDR_CMD_ID GENMASK(23, 0) 84 #define WMI_MAX_MEM_REQS 32 85 #define ATH12K_MAX_HW_LISTEN_INTERVAL 5 86 87 #define WMI_HOST_RC_DS_FLAG 0x01 88 #define WMI_HOST_RC_CW40_FLAG 0x02 89 #define WMI_HOST_RC_SGI_FLAG 0x04 90 #define WMI_HOST_RC_HT_FLAG 0x08 91 #define WMI_HOST_RC_RTSCTS_FLAG 0x10 92 #define WMI_HOST_RC_TX_STBC_FLAG 0x20 93 #define WMI_HOST_RC_RX_STBC_FLAG 0xC0 94 #define WMI_HOST_RC_RX_STBC_FLAG_S 6 95 #define WMI_HOST_RC_WEP_TKIP_FLAG 0x100 96 #define WMI_HOST_RC_TS_FLAG 0x200 97 #define WMI_HOST_RC_UAPSD_FLAG 0x400 98 99 #define WMI_HT_CAP_ENABLED 0x0001 100 #define WMI_HT_CAP_HT20_SGI 0x0002 101 #define WMI_HT_CAP_DYNAMIC_SMPS 0x0004 102 #define WMI_HT_CAP_TX_STBC 0x0008 103 #define WMI_HT_CAP_TX_STBC_MASK_SHIFT 3 104 #define WMI_HT_CAP_RX_STBC 0x0030 105 #define WMI_HT_CAP_RX_STBC_MASK_SHIFT 4 106 #define WMI_HT_CAP_LDPC 0x0040 107 #define WMI_HT_CAP_L_SIG_TXOP_PROT 0x0080 108 #define WMI_HT_CAP_MPDU_DENSITY 0x0700 109 #define WMI_HT_CAP_MPDU_DENSITY_MASK_SHIFT 8 110 #define WMI_HT_CAP_HT40_SGI 0x0800 111 #define WMI_HT_CAP_RX_LDPC 0x1000 112 #define WMI_HT_CAP_TX_LDPC 0x2000 113 #define WMI_HT_CAP_IBF_BFER 0x4000 114 115 /* These macros should be used when we wish to advertise STBC support for 116 * only 1SS or 2SS or 3SS. 117 */ 118 #define WMI_HT_CAP_RX_STBC_1SS 0x0010 119 #define WMI_HT_CAP_RX_STBC_2SS 0x0020 120 #define WMI_HT_CAP_RX_STBC_3SS 0x0030 121 122 #define WMI_HT_CAP_DEFAULT_ALL (WMI_HT_CAP_ENABLED | \ 123 WMI_HT_CAP_HT20_SGI | \ 124 WMI_HT_CAP_HT40_SGI | \ 125 WMI_HT_CAP_TX_STBC | \ 126 WMI_HT_CAP_RX_STBC | \ 127 WMI_HT_CAP_LDPC) 128 129 #define WMI_VHT_CAP_MAX_MPDU_LEN_MASK 0x00000003 130 #define WMI_VHT_CAP_RX_LDPC 0x00000010 131 #define WMI_VHT_CAP_SGI_80MHZ 0x00000020 132 #define WMI_VHT_CAP_SGI_160MHZ 0x00000040 133 #define WMI_VHT_CAP_TX_STBC 0x00000080 134 #define WMI_VHT_CAP_RX_STBC_MASK 0x00000300 135 #define WMI_VHT_CAP_RX_STBC_MASK_SHIFT 8 136 #define WMI_VHT_CAP_SU_BFER 0x00000800 137 #define WMI_VHT_CAP_SU_BFEE 0x00001000 138 #define WMI_VHT_CAP_MAX_CS_ANT_MASK 0x0000E000 139 #define WMI_VHT_CAP_MAX_CS_ANT_MASK_SHIFT 13 140 #define WMI_VHT_CAP_MAX_SND_DIM_MASK 0x00070000 141 #define WMI_VHT_CAP_MAX_SND_DIM_MASK_SHIFT 16 142 #define WMI_VHT_CAP_MU_BFER 0x00080000 143 #define WMI_VHT_CAP_MU_BFEE 0x00100000 144 #define WMI_VHT_CAP_MAX_AMPDU_LEN_EXP 0x03800000 145 #define WMI_VHT_CAP_MAX_AMPDU_LEN_EXP_SHIT 23 146 #define WMI_VHT_CAP_RX_FIXED_ANT 0x10000000 147 #define WMI_VHT_CAP_TX_FIXED_ANT 0x20000000 148 149 #define WMI_VHT_CAP_MAX_MPDU_LEN_11454 0x00000002 150 151 /* These macros should be used when we wish to advertise STBC support for 152 * only 1SS or 2SS or 3SS. 153 */ 154 #define WMI_VHT_CAP_RX_STBC_1SS 0x00000100 155 #define WMI_VHT_CAP_RX_STBC_2SS 0x00000200 156 #define WMI_VHT_CAP_RX_STBC_3SS 0x00000300 157 158 #define WMI_VHT_CAP_DEFAULT_ALL (WMI_VHT_CAP_MAX_MPDU_LEN_11454 | \ 159 WMI_VHT_CAP_SGI_80MHZ | \ 160 WMI_VHT_CAP_TX_STBC | \ 161 WMI_VHT_CAP_RX_STBC_MASK | \ 162 WMI_VHT_CAP_RX_LDPC | \ 163 WMI_VHT_CAP_MAX_AMPDU_LEN_EXP | \ 164 WMI_VHT_CAP_RX_FIXED_ANT | \ 165 WMI_VHT_CAP_TX_FIXED_ANT) 166 167 #define WLAN_SCAN_MAX_HINT_S_SSID 10 168 #define WLAN_SCAN_MAX_HINT_BSSID 10 169 #define MAX_RNR_BSS 5 170 171 #define WMI_APPEND_TO_EXISTING_CHAN_LIST_FLAG 1 172 173 #define WMI_BA_MODE_BUFFER_SIZE_256 3 174 175 /* HW mode config type replicated from FW header 176 * @WMI_HOST_HW_MODE_SINGLE: Only one PHY is active. 177 * @WMI_HOST_HW_MODE_DBS: Both PHYs are active in different bands, 178 * one in 2G and another in 5G. 179 * @WMI_HOST_HW_MODE_SBS_PASSIVE: Both PHYs are in passive mode (only rx) in 180 * same band; no tx allowed. 181 * @WMI_HOST_HW_MODE_SBS: Both PHYs are active in the same band. 182 * Support for both PHYs within one band is planned 183 * for 5G only(as indicated in WMI_MAC_PHY_CAPABILITIES), 184 * but could be extended to other bands in the future. 185 * The separation of the band between the two PHYs needs 186 * to be communicated separately. 187 * @WMI_HOST_HW_MODE_DBS_SBS: 3 PHYs, with 2 on the same band doing SBS 188 * as in WMI_HW_MODE_SBS, and 3rd on the other band 189 * @WMI_HOST_HW_MODE_DBS_OR_SBS: Two PHY with one PHY capabale of both 2G and 190 * 5G. It can support SBS (5G + 5G) OR DBS (5G + 2G). 191 * @WMI_HOST_HW_MODE_MAX: Max hw_mode_id. Used to indicate invalid mode. 192 */ 193 enum wmi_host_hw_mode_config_type { 194 WMI_HOST_HW_MODE_SINGLE = 0, 195 WMI_HOST_HW_MODE_DBS = 1, 196 WMI_HOST_HW_MODE_SBS_PASSIVE = 2, 197 WMI_HOST_HW_MODE_SBS = 3, 198 WMI_HOST_HW_MODE_DBS_SBS = 4, 199 WMI_HOST_HW_MODE_DBS_OR_SBS = 5, 200 201 /* keep last */ 202 WMI_HOST_HW_MODE_MAX 203 }; 204 205 /* HW mode priority values used to detect the preferred HW mode 206 * on the available modes. 207 */ 208 enum wmi_host_hw_mode_priority { 209 WMI_HOST_HW_MODE_DBS_SBS_PRI, 210 WMI_HOST_HW_MODE_DBS_PRI, 211 WMI_HOST_HW_MODE_DBS_OR_SBS_PRI, 212 WMI_HOST_HW_MODE_SBS_PRI, 213 WMI_HOST_HW_MODE_SBS_PASSIVE_PRI, 214 WMI_HOST_HW_MODE_SINGLE_PRI, 215 216 /* keep last the lowest priority */ 217 WMI_HOST_HW_MODE_MAX_PRI 218 }; 219 220 enum WMI_HOST_WLAN_BAND { 221 WMI_HOST_WLAN_2GHZ_CAP = 1, 222 WMI_HOST_WLAN_5GHZ_CAP = 2, 223 WMI_HOST_WLAN_2GHZ_5GHZ_CAP = 3, 224 }; 225 226 /* Parameters used for WMI_VDEV_PARAM_AUTORATE_MISC_CFG command. 227 * Used for HE and EHT auto rate mode. 228 */ 229 enum { 230 /* LTF related configuration */ 231 WMI_AUTORATE_LTF_1X = BIT(0), 232 WMI_AUTORATE_LTF_2X = BIT(1), 233 WMI_AUTORATE_LTF_4X = BIT(2), 234 235 /* GI related configuration */ 236 WMI_AUTORATE_400NS_GI = BIT(8), 237 WMI_AUTORATE_800NS_GI = BIT(9), 238 WMI_AUTORATE_1600NS_GI = BIT(10), 239 WMI_AUTORATE_3200NS_GI = BIT(11), 240 }; 241 242 enum wmi_cmd_group { 243 /* 0 to 2 are reserved */ 244 WMI_GRP_START = 0x3, 245 WMI_GRP_SCAN = WMI_GRP_START, 246 WMI_GRP_PDEV = 0x4, 247 WMI_GRP_VDEV = 0x5, 248 WMI_GRP_PEER = 0x6, 249 WMI_GRP_MGMT = 0x7, 250 WMI_GRP_BA_NEG = 0x8, 251 WMI_GRP_STA_PS = 0x9, 252 WMI_GRP_DFS = 0xa, 253 WMI_GRP_ROAM = 0xb, 254 WMI_GRP_OFL_SCAN = 0xc, 255 WMI_GRP_P2P = 0xd, 256 WMI_GRP_AP_PS = 0xe, 257 WMI_GRP_RATE_CTRL = 0xf, 258 WMI_GRP_PROFILE = 0x10, 259 WMI_GRP_SUSPEND = 0x11, 260 WMI_GRP_BCN_FILTER = 0x12, 261 WMI_GRP_WOW = 0x13, 262 WMI_GRP_RTT = 0x14, 263 WMI_GRP_SPECTRAL = 0x15, 264 WMI_GRP_STATS = 0x16, 265 WMI_GRP_ARP_NS_OFL = 0x17, 266 WMI_GRP_NLO_OFL = 0x18, 267 WMI_GRP_GTK_OFL = 0x19, 268 WMI_GRP_CSA_OFL = 0x1a, 269 WMI_GRP_CHATTER = 0x1b, 270 WMI_GRP_TID_ADDBA = 0x1c, 271 WMI_GRP_MISC = 0x1d, 272 WMI_GRP_GPIO = 0x1e, 273 WMI_GRP_FWTEST = 0x1f, 274 WMI_GRP_TDLS = 0x20, 275 WMI_GRP_RESMGR = 0x21, 276 WMI_GRP_STA_SMPS = 0x22, 277 WMI_GRP_WLAN_HB = 0x23, 278 WMI_GRP_RMC = 0x24, 279 WMI_GRP_MHF_OFL = 0x25, 280 WMI_GRP_LOCATION_SCAN = 0x26, 281 WMI_GRP_OEM = 0x27, 282 WMI_GRP_NAN = 0x28, 283 WMI_GRP_COEX = 0x29, 284 WMI_GRP_OBSS_OFL = 0x2a, 285 WMI_GRP_LPI = 0x2b, 286 WMI_GRP_EXTSCAN = 0x2c, 287 WMI_GRP_DHCP_OFL = 0x2d, 288 WMI_GRP_IPA = 0x2e, 289 WMI_GRP_MDNS_OFL = 0x2f, 290 WMI_GRP_SAP_OFL = 0x30, 291 WMI_GRP_OCB = 0x31, 292 WMI_GRP_SOC = 0x32, 293 WMI_GRP_PKT_FILTER = 0x33, 294 WMI_GRP_MAWC = 0x34, 295 WMI_GRP_PMF_OFFLOAD = 0x35, 296 WMI_GRP_BPF_OFFLOAD = 0x36, 297 WMI_GRP_NAN_DATA = 0x37, 298 WMI_GRP_PROTOTYPE = 0x38, 299 WMI_GRP_MONITOR = 0x39, 300 WMI_GRP_REGULATORY = 0x3a, 301 WMI_GRP_HW_DATA_FILTER = 0x3b, 302 WMI_GRP_WLM = 0x3c, 303 WMI_GRP_11K_OFFLOAD = 0x3d, 304 WMI_GRP_TWT = 0x3e, 305 WMI_GRP_MOTION_DET = 0x3f, 306 WMI_GRP_SPATIAL_REUSE = 0x40, 307 WMI_GRP_MLO = 0x48, 308 }; 309 310 #define WMI_CMD_GRP(grp_id) (((grp_id) << 12) | 0x1) 311 #define WMI_EVT_GRP_START_ID(grp_id) (((grp_id) << 12) | 0x1) 312 313 enum wmi_tlv_cmd_id { 314 WMI_CMD_UNSUPPORTED = 0, 315 WMI_INIT_CMDID = 0x1, 316 WMI_START_SCAN_CMDID = WMI_TLV_CMD(WMI_GRP_SCAN), 317 WMI_STOP_SCAN_CMDID, 318 WMI_SCAN_CHAN_LIST_CMDID, 319 WMI_SCAN_SCH_PRIO_TBL_CMDID, 320 WMI_SCAN_UPDATE_REQUEST_CMDID, 321 WMI_SCAN_PROB_REQ_OUI_CMDID, 322 WMI_SCAN_ADAPTIVE_DWELL_CONFIG_CMDID, 323 WMI_PDEV_SET_REGDOMAIN_CMDID = WMI_TLV_CMD(WMI_GRP_PDEV), 324 WMI_PDEV_SET_CHANNEL_CMDID, 325 WMI_PDEV_SET_PARAM_CMDID, 326 WMI_PDEV_PKTLOG_ENABLE_CMDID, 327 WMI_PDEV_PKTLOG_DISABLE_CMDID, 328 WMI_PDEV_SET_WMM_PARAMS_CMDID, 329 WMI_PDEV_SET_HT_CAP_IE_CMDID, 330 WMI_PDEV_SET_VHT_CAP_IE_CMDID, 331 WMI_PDEV_SET_DSCP_TID_MAP_CMDID, 332 WMI_PDEV_SET_QUIET_MODE_CMDID, 333 WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID, 334 WMI_PDEV_GET_TPC_CONFIG_CMDID, 335 WMI_PDEV_SET_BASE_MACADDR_CMDID, 336 WMI_PDEV_DUMP_CMDID, 337 WMI_PDEV_SET_LED_CONFIG_CMDID, 338 WMI_PDEV_GET_TEMPERATURE_CMDID, 339 WMI_PDEV_SET_LED_FLASHING_CMDID, 340 WMI_PDEV_SMART_ANT_ENABLE_CMDID, 341 WMI_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID, 342 WMI_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID, 343 WMI_PDEV_SET_CTL_TABLE_CMDID, 344 WMI_PDEV_SET_MIMOGAIN_TABLE_CMDID, 345 WMI_PDEV_FIPS_CMDID, 346 WMI_PDEV_GET_ANI_CCK_CONFIG_CMDID, 347 WMI_PDEV_GET_ANI_OFDM_CONFIG_CMDID, 348 WMI_PDEV_GET_NFCAL_POWER_CMDID, 349 WMI_PDEV_GET_TPC_CMDID, 350 WMI_MIB_STATS_ENABLE_CMDID, 351 WMI_PDEV_SET_PCL_CMDID, 352 WMI_PDEV_SET_HW_MODE_CMDID, 353 WMI_PDEV_SET_MAC_CONFIG_CMDID, 354 WMI_PDEV_SET_ANTENNA_MODE_CMDID, 355 WMI_SET_PERIODIC_CHANNEL_STATS_CONFIG_CMDID, 356 WMI_PDEV_WAL_POWER_DEBUG_CMDID, 357 WMI_PDEV_SET_REORDER_TIMEOUT_VAL_CMDID, 358 WMI_PDEV_SET_WAKEUP_CONFIG_CMDID, 359 WMI_PDEV_GET_ANTDIV_STATUS_CMDID, 360 WMI_PDEV_GET_CHIP_POWER_STATS_CMDID, 361 WMI_PDEV_SET_STATS_THRESHOLD_CMDID, 362 WMI_PDEV_MULTIPLE_VDEV_RESTART_REQUEST_CMDID, 363 WMI_PDEV_UPDATE_PKT_ROUTING_CMDID, 364 WMI_PDEV_CHECK_CAL_VERSION_CMDID, 365 WMI_PDEV_SET_DIVERSITY_GAIN_CMDID, 366 WMI_PDEV_DIV_GET_RSSI_ANTID_CMDID, 367 WMI_PDEV_BSS_CHAN_INFO_REQUEST_CMDID, 368 WMI_PDEV_UPDATE_PMK_CACHE_CMDID, 369 WMI_PDEV_UPDATE_FILS_HLP_PKT_CMDID, 370 WMI_PDEV_UPDATE_CTLTABLE_REQUEST_CMDID, 371 WMI_PDEV_CONFIG_VENDOR_OUI_ACTION_CMDID, 372 WMI_PDEV_SET_AC_TX_QUEUE_OPTIMIZED_CMDID, 373 WMI_PDEV_SET_RX_FILTER_PROMISCUOUS_CMDID, 374 WMI_PDEV_DMA_RING_CFG_REQ_CMDID, 375 WMI_PDEV_HE_TB_ACTION_FRM_CMDID, 376 WMI_PDEV_PKTLOG_FILTER_CMDID, 377 WMI_PDEV_SET_SRG_BSS_COLOR_BITMAP_CMDID = 0x403b, 378 WMI_PDEV_SET_SRG_PARTIAL_BSSID_BITMAP_CMDID, 379 WMI_PDEV_SET_SRG_OBSS_COLOR_ENABLE_BITMAP_CMDID, 380 WMI_PDEV_SET_SRG_OBSS_BSSID_ENABLE_BITMAP_CMDID, 381 WMI_PDEV_SET_NON_SRG_OBSS_COLOR_ENABLE_BITMAP_CMDID, 382 WMI_PDEV_SET_NON_SRG_OBSS_BSSID_ENABLE_BITMAP_CMDID, 383 WMI_PDEV_SET_BIOS_SAR_TABLE_CMDID = 0x4044, 384 WMI_PDEV_SET_BIOS_GEO_TABLE_CMDID = 0x4045, 385 WMI_PDEV_SET_BIOS_INTERFACE_CMDID = 0x404A, 386 WMI_VDEV_CREATE_CMDID = WMI_TLV_CMD(WMI_GRP_VDEV), 387 WMI_VDEV_DELETE_CMDID, 388 WMI_VDEV_START_REQUEST_CMDID, 389 WMI_VDEV_RESTART_REQUEST_CMDID, 390 WMI_VDEV_UP_CMDID, 391 WMI_VDEV_STOP_CMDID, 392 WMI_VDEV_DOWN_CMDID, 393 WMI_VDEV_SET_PARAM_CMDID, 394 WMI_VDEV_INSTALL_KEY_CMDID, 395 WMI_VDEV_WNM_SLEEPMODE_CMDID, 396 WMI_VDEV_WMM_ADDTS_CMDID, 397 WMI_VDEV_WMM_DELTS_CMDID, 398 WMI_VDEV_SET_WMM_PARAMS_CMDID, 399 WMI_VDEV_SET_GTX_PARAMS_CMDID, 400 WMI_VDEV_IPSEC_NATKEEPALIVE_FILTER_CMDID, 401 WMI_VDEV_PLMREQ_START_CMDID, 402 WMI_VDEV_PLMREQ_STOP_CMDID, 403 WMI_VDEV_TSF_TSTAMP_ACTION_CMDID, 404 WMI_VDEV_SET_IE_CMDID, 405 WMI_VDEV_RATEMASK_CMDID, 406 WMI_VDEV_ATF_REQUEST_CMDID, 407 WMI_VDEV_SET_DSCP_TID_MAP_CMDID, 408 WMI_VDEV_FILTER_NEIGHBOR_RX_PACKETS_CMDID, 409 WMI_VDEV_SET_QUIET_MODE_CMDID, 410 WMI_VDEV_SET_CUSTOM_AGGR_SIZE_CMDID, 411 WMI_VDEV_ENCRYPT_DECRYPT_DATA_REQ_CMDID, 412 WMI_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_CMDID, 413 WMI_VDEV_SET_ARP_STAT_CMDID, 414 WMI_VDEV_GET_ARP_STAT_CMDID, 415 WMI_VDEV_GET_TX_POWER_CMDID, 416 WMI_VDEV_LIMIT_OFFCHAN_CMDID, 417 WMI_VDEV_SET_CUSTOM_SW_RETRY_TH_CMDID, 418 WMI_VDEV_CHAINMASK_CONFIG_CMDID, 419 WMI_VDEV_GET_BCN_RECEPTION_STATS_CMDID, 420 WMI_VDEV_GET_MWS_COEX_INFO_CMDID, 421 WMI_VDEV_DELETE_ALL_PEER_CMDID, 422 WMI_VDEV_BSS_MAX_IDLE_TIME_CMDID, 423 WMI_VDEV_AUDIO_SYNC_TRIGGER_CMDID, 424 WMI_VDEV_AUDIO_SYNC_QTIMER_CMDID, 425 WMI_VDEV_SET_PCL_CMDID, 426 WMI_VDEV_GET_BIG_DATA_CMDID, 427 WMI_VDEV_GET_BIG_DATA_P2_CMDID, 428 WMI_VDEV_SET_TPC_POWER_CMDID, 429 WMI_PEER_CREATE_CMDID = WMI_TLV_CMD(WMI_GRP_PEER), 430 WMI_PEER_DELETE_CMDID, 431 WMI_PEER_FLUSH_TIDS_CMDID, 432 WMI_PEER_SET_PARAM_CMDID, 433 WMI_PEER_ASSOC_CMDID, 434 WMI_PEER_ADD_WDS_ENTRY_CMDID, 435 WMI_PEER_REMOVE_WDS_ENTRY_CMDID, 436 WMI_PEER_MCAST_GROUP_CMDID, 437 WMI_PEER_INFO_REQ_CMDID, 438 WMI_PEER_GET_ESTIMATED_LINKSPEED_CMDID, 439 WMI_PEER_SET_RATE_REPORT_CONDITION_CMDID, 440 WMI_PEER_UPDATE_WDS_ENTRY_CMDID, 441 WMI_PEER_ADD_PROXY_STA_ENTRY_CMDID, 442 WMI_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID, 443 WMI_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID, 444 WMI_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID, 445 WMI_PEER_ATF_REQUEST_CMDID, 446 WMI_PEER_BWF_REQUEST_CMDID, 447 WMI_PEER_REORDER_QUEUE_SETUP_CMDID, 448 WMI_PEER_REORDER_QUEUE_REMOVE_CMDID, 449 WMI_PEER_SET_RX_BLOCKSIZE_CMDID, 450 WMI_PEER_ANTDIV_INFO_REQ_CMDID, 451 WMI_BCN_TX_CMDID = WMI_TLV_CMD(WMI_GRP_MGMT), 452 WMI_PDEV_SEND_BCN_CMDID, 453 WMI_BCN_TMPL_CMDID, 454 WMI_BCN_FILTER_RX_CMDID, 455 WMI_PRB_REQ_FILTER_RX_CMDID, 456 WMI_MGMT_TX_CMDID, 457 WMI_PRB_TMPL_CMDID, 458 WMI_MGMT_TX_SEND_CMDID, 459 WMI_OFFCHAN_DATA_TX_SEND_CMDID, 460 WMI_PDEV_SEND_FD_CMDID, 461 WMI_BCN_OFFLOAD_CTRL_CMDID, 462 WMI_BSS_COLOR_CHANGE_ENABLE_CMDID, 463 WMI_VDEV_BCN_OFFLOAD_QUIET_CONFIG_CMDID, 464 WMI_FILS_DISCOVERY_TMPL_CMDID, 465 WMI_ADDBA_CLEAR_RESP_CMDID = WMI_TLV_CMD(WMI_GRP_BA_NEG), 466 WMI_ADDBA_SEND_CMDID, 467 WMI_ADDBA_STATUS_CMDID, 468 WMI_DELBA_SEND_CMDID, 469 WMI_ADDBA_SET_RESP_CMDID, 470 WMI_SEND_SINGLEAMSDU_CMDID, 471 WMI_STA_POWERSAVE_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_STA_PS), 472 WMI_STA_POWERSAVE_PARAM_CMDID, 473 WMI_STA_MIMO_PS_MODE_CMDID, 474 WMI_PDEV_DFS_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_DFS), 475 WMI_PDEV_DFS_DISABLE_CMDID, 476 WMI_DFS_PHYERR_FILTER_ENA_CMDID, 477 WMI_DFS_PHYERR_FILTER_DIS_CMDID, 478 WMI_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMDID, 479 WMI_PDEV_DFS_PHYERR_OFFLOAD_DISABLE_CMDID, 480 WMI_VDEV_ADFS_CH_CFG_CMDID, 481 WMI_VDEV_ADFS_OCAC_ABORT_CMDID, 482 WMI_ROAM_SCAN_MODE = WMI_TLV_CMD(WMI_GRP_ROAM), 483 WMI_ROAM_SCAN_RSSI_THRESHOLD, 484 WMI_ROAM_SCAN_PERIOD, 485 WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, 486 WMI_ROAM_AP_PROFILE, 487 WMI_ROAM_CHAN_LIST, 488 WMI_ROAM_SCAN_CMD, 489 WMI_ROAM_SYNCH_COMPLETE, 490 WMI_ROAM_SET_RIC_REQUEST_CMDID, 491 WMI_ROAM_INVOKE_CMDID, 492 WMI_ROAM_FILTER_CMDID, 493 WMI_ROAM_SUBNET_CHANGE_CONFIG_CMDID, 494 WMI_ROAM_CONFIGURE_MAWC_CMDID, 495 WMI_ROAM_SET_MBO_PARAM_CMDID, 496 WMI_ROAM_PER_CONFIG_CMDID, 497 WMI_ROAM_BTM_CONFIG_CMDID, 498 WMI_ENABLE_FILS_CMDID, 499 WMI_OFL_SCAN_ADD_AP_PROFILE = WMI_TLV_CMD(WMI_GRP_OFL_SCAN), 500 WMI_OFL_SCAN_REMOVE_AP_PROFILE, 501 WMI_OFL_SCAN_PERIOD, 502 WMI_P2P_DEV_SET_DEVICE_INFO = WMI_TLV_CMD(WMI_GRP_P2P), 503 WMI_P2P_DEV_SET_DISCOVERABILITY, 504 WMI_P2P_GO_SET_BEACON_IE, 505 WMI_P2P_GO_SET_PROBE_RESP_IE, 506 WMI_P2P_SET_VENDOR_IE_DATA_CMDID, 507 WMI_P2P_DISC_OFFLOAD_CONFIG_CMDID, 508 WMI_P2P_DISC_OFFLOAD_APPIE_CMDID, 509 WMI_P2P_DISC_OFFLOAD_PATTERN_CMDID, 510 WMI_P2P_SET_OPPPS_PARAM_CMDID, 511 WMI_P2P_LISTEN_OFFLOAD_START_CMDID, 512 WMI_P2P_LISTEN_OFFLOAD_STOP_CMDID, 513 WMI_AP_PS_PEER_PARAM_CMDID = WMI_TLV_CMD(WMI_GRP_AP_PS), 514 WMI_AP_PS_PEER_UAPSD_COEX_CMDID, 515 WMI_AP_PS_EGAP_PARAM_CMDID, 516 WMI_PEER_RATE_RETRY_SCHED_CMDID = WMI_TLV_CMD(WMI_GRP_RATE_CTRL), 517 WMI_WLAN_PROFILE_TRIGGER_CMDID = WMI_TLV_CMD(WMI_GRP_PROFILE), 518 WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID, 519 WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID, 520 WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID, 521 WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID, 522 WMI_PDEV_SUSPEND_CMDID = WMI_TLV_CMD(WMI_GRP_SUSPEND), 523 WMI_PDEV_RESUME_CMDID, 524 WMI_ADD_BCN_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_BCN_FILTER), 525 WMI_RMV_BCN_FILTER_CMDID, 526 WMI_WOW_ADD_WAKE_PATTERN_CMDID = WMI_TLV_CMD(WMI_GRP_WOW), 527 WMI_WOW_DEL_WAKE_PATTERN_CMDID, 528 WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID, 529 WMI_WOW_ENABLE_CMDID, 530 WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID, 531 WMI_WOW_IOAC_ADD_KEEPALIVE_CMDID, 532 WMI_WOW_IOAC_DEL_KEEPALIVE_CMDID, 533 WMI_WOW_IOAC_ADD_WAKE_PATTERN_CMDID, 534 WMI_WOW_IOAC_DEL_WAKE_PATTERN_CMDID, 535 WMI_D0_WOW_ENABLE_DISABLE_CMDID, 536 WMI_EXTWOW_ENABLE_CMDID, 537 WMI_EXTWOW_SET_APP_TYPE1_PARAMS_CMDID, 538 WMI_EXTWOW_SET_APP_TYPE2_PARAMS_CMDID, 539 WMI_WOW_ENABLE_ICMPV6_NA_FLT_CMDID, 540 WMI_WOW_UDP_SVC_OFLD_CMDID, 541 WMI_WOW_HOSTWAKEUP_GPIO_PIN_PATTERN_CONFIG_CMDID, 542 WMI_WOW_SET_ACTION_WAKE_UP_CMDID, 543 WMI_RTT_MEASREQ_CMDID = WMI_TLV_CMD(WMI_GRP_RTT), 544 WMI_RTT_TSF_CMDID, 545 WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID = WMI_TLV_CMD(WMI_GRP_SPECTRAL), 546 WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID, 547 WMI_REQUEST_STATS_CMDID = WMI_TLV_CMD(WMI_GRP_STATS), 548 WMI_MCC_SCHED_TRAFFIC_STATS_CMDID, 549 WMI_REQUEST_STATS_EXT_CMDID, 550 WMI_REQUEST_LINK_STATS_CMDID, 551 WMI_START_LINK_STATS_CMDID, 552 WMI_CLEAR_LINK_STATS_CMDID, 553 WMI_GET_FW_MEM_DUMP_CMDID, 554 WMI_DEBUG_MESG_FLUSH_CMDID, 555 WMI_DIAG_EVENT_LOG_CONFIG_CMDID, 556 WMI_REQUEST_WLAN_STATS_CMDID, 557 WMI_REQUEST_RCPI_CMDID, 558 WMI_REQUEST_PEER_STATS_INFO_CMDID, 559 WMI_REQUEST_RADIO_CHAN_STATS_CMDID, 560 WMI_REQUEST_WLM_STATS_CMDID, 561 WMI_REQUEST_CTRL_PATH_STATS_CMDID, 562 WMI_REQUEST_HALPHY_CTRL_PATH_STATS_CMDID = WMI_REQUEST_CTRL_PATH_STATS_CMDID + 3, 563 WMI_SET_ARP_NS_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_ARP_NS_OFL), 564 WMI_ADD_PROACTIVE_ARP_RSP_PATTERN_CMDID, 565 WMI_DEL_PROACTIVE_ARP_RSP_PATTERN_CMDID, 566 WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_NLO_OFL), 567 WMI_APFIND_CMDID, 568 WMI_PASSPOINT_LIST_CONFIG_CMDID, 569 WMI_NLO_CONFIGURE_MAWC_CMDID, 570 WMI_GTK_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_GTK_OFL), 571 WMI_CSA_OFFLOAD_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_CSA_OFL), 572 WMI_CSA_OFFLOAD_CHANSWITCH_CMDID, 573 WMI_CHATTER_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_CHATTER), 574 WMI_CHATTER_ADD_COALESCING_FILTER_CMDID, 575 WMI_CHATTER_DELETE_COALESCING_FILTER_CMDID, 576 WMI_CHATTER_COALESCING_QUERY_CMDID, 577 WMI_PEER_TID_ADDBA_CMDID = WMI_TLV_CMD(WMI_GRP_TID_ADDBA), 578 WMI_PEER_TID_DELBA_CMDID, 579 WMI_STA_DTIM_PS_METHOD_CMDID, 580 WMI_STA_UAPSD_AUTO_TRIG_CMDID, 581 WMI_STA_KEEPALIVE_CMDID, 582 WMI_BA_REQ_SSN_CMDID, 583 WMI_ECHO_CMDID = WMI_TLV_CMD(WMI_GRP_MISC), 584 WMI_PDEV_UTF_CMDID, 585 WMI_DBGLOG_CFG_CMDID, 586 WMI_PDEV_QVIT_CMDID, 587 WMI_PDEV_FTM_INTG_CMDID, 588 WMI_VDEV_SET_KEEPALIVE_CMDID, 589 WMI_VDEV_GET_KEEPALIVE_CMDID, 590 WMI_FORCE_FW_HANG_CMDID, 591 WMI_SET_MCASTBCAST_FILTER_CMDID, 592 WMI_THERMAL_MGMT_CMDID, 593 WMI_HOST_AUTO_SHUTDOWN_CFG_CMDID, 594 WMI_TPC_CHAINMASK_CONFIG_CMDID, 595 WMI_SET_ANTENNA_DIVERSITY_CMDID, 596 WMI_OCB_SET_SCHED_CMDID, 597 WMI_RSSI_BREACH_MONITOR_CONFIG_CMDID, 598 WMI_LRO_CONFIG_CMDID, 599 WMI_TRANSFER_DATA_TO_FLASH_CMDID, 600 WMI_CONFIG_ENHANCED_MCAST_FILTER_CMDID, 601 WMI_VDEV_WISA_CMDID, 602 WMI_DBGLOG_TIME_STAMP_SYNC_CMDID, 603 WMI_SET_MULTIPLE_MCAST_FILTER_CMDID, 604 WMI_READ_DATA_FROM_FLASH_CMDID, 605 WMI_THERM_THROT_SET_CONF_CMDID, 606 WMI_RUNTIME_DPD_RECAL_CMDID, 607 WMI_GET_TPC_POWER_CMDID, 608 WMI_IDLE_TRIGGER_MONITOR_CMDID, 609 WMI_GPIO_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_GPIO), 610 WMI_GPIO_OUTPUT_CMDID, 611 WMI_TXBF_CMDID, 612 WMI_FWTEST_VDEV_MCC_SET_TBTT_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_FWTEST), 613 WMI_FWTEST_P2P_SET_NOA_PARAM_CMDID, 614 WMI_UNIT_TEST_CMDID, 615 WMI_FWTEST_CMDID, 616 WMI_QBOOST_CFG_CMDID, 617 WMI_TDLS_SET_STATE_CMDID = WMI_TLV_CMD(WMI_GRP_TDLS), 618 WMI_TDLS_PEER_UPDATE_CMDID, 619 WMI_TDLS_SET_OFFCHAN_MODE_CMDID, 620 WMI_RESMGR_ADAPTIVE_OCS_EN_DIS_CMDID = WMI_TLV_CMD(WMI_GRP_RESMGR), 621 WMI_RESMGR_SET_CHAN_TIME_QUOTA_CMDID, 622 WMI_RESMGR_SET_CHAN_LATENCY_CMDID, 623 WMI_STA_SMPS_FORCE_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_STA_SMPS), 624 WMI_STA_SMPS_PARAM_CMDID, 625 WMI_HB_SET_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_WLAN_HB), 626 WMI_HB_SET_TCP_PARAMS_CMDID, 627 WMI_HB_SET_TCP_PKT_FILTER_CMDID, 628 WMI_HB_SET_UDP_PARAMS_CMDID, 629 WMI_HB_SET_UDP_PKT_FILTER_CMDID, 630 WMI_RMC_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_RMC), 631 WMI_RMC_SET_ACTION_PERIOD_CMDID, 632 WMI_RMC_CONFIG_CMDID, 633 WMI_RMC_SET_MANUAL_LEADER_CMDID, 634 WMI_MHF_OFFLOAD_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_MHF_OFL), 635 WMI_MHF_OFFLOAD_PLUMB_ROUTING_TBL_CMDID, 636 WMI_BATCH_SCAN_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_LOCATION_SCAN), 637 WMI_BATCH_SCAN_DISABLE_CMDID, 638 WMI_BATCH_SCAN_TRIGGER_RESULT_CMDID, 639 WMI_OEM_REQ_CMDID = WMI_TLV_CMD(WMI_GRP_OEM), 640 WMI_OEM_REQUEST_CMDID, 641 WMI_LPI_OEM_REQ_CMDID, 642 WMI_NAN_CMDID = WMI_TLV_CMD(WMI_GRP_NAN), 643 WMI_MODEM_POWER_STATE_CMDID = WMI_TLV_CMD(WMI_GRP_COEX), 644 WMI_CHAN_AVOID_UPDATE_CMDID, 645 WMI_COEX_CONFIG_CMDID, 646 WMI_CHAN_AVOID_RPT_ALLOW_CMDID, 647 WMI_COEX_GET_ANTENNA_ISOLATION_CMDID, 648 WMI_SAR_LIMITS_CMDID, 649 WMI_OBSS_SCAN_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_OBSS_OFL), 650 WMI_OBSS_SCAN_DISABLE_CMDID, 651 WMI_OBSS_COLOR_COLLISION_DET_CONFIG_CMDID, 652 WMI_LPI_MGMT_SNOOPING_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_LPI), 653 WMI_LPI_START_SCAN_CMDID, 654 WMI_LPI_STOP_SCAN_CMDID, 655 WMI_EXTSCAN_START_CMDID = WMI_TLV_CMD(WMI_GRP_EXTSCAN), 656 WMI_EXTSCAN_STOP_CMDID, 657 WMI_EXTSCAN_CONFIGURE_WLAN_CHANGE_MONITOR_CMDID, 658 WMI_EXTSCAN_CONFIGURE_HOTLIST_MONITOR_CMDID, 659 WMI_EXTSCAN_GET_CACHED_RESULTS_CMDID, 660 WMI_EXTSCAN_GET_WLAN_CHANGE_RESULTS_CMDID, 661 WMI_EXTSCAN_SET_CAPABILITIES_CMDID, 662 WMI_EXTSCAN_GET_CAPABILITIES_CMDID, 663 WMI_EXTSCAN_CONFIGURE_HOTLIST_SSID_MONITOR_CMDID, 664 WMI_EXTSCAN_CONFIGURE_MAWC_CMDID, 665 WMI_SET_DHCP_SERVER_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_DHCP_OFL), 666 WMI_IPA_OFFLOAD_ENABLE_DISABLE_CMDID = WMI_TLV_CMD(WMI_GRP_IPA), 667 WMI_MDNS_OFFLOAD_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_MDNS_OFL), 668 WMI_MDNS_SET_FQDN_CMDID, 669 WMI_MDNS_SET_RESPONSE_CMDID, 670 WMI_MDNS_GET_STATS_CMDID, 671 WMI_SAP_OFL_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_SAP_OFL), 672 WMI_SAP_SET_BLACKLIST_PARAM_CMDID, 673 WMI_OCB_SET_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_OCB), 674 WMI_OCB_SET_UTC_TIME_CMDID, 675 WMI_OCB_START_TIMING_ADVERT_CMDID, 676 WMI_OCB_STOP_TIMING_ADVERT_CMDID, 677 WMI_OCB_GET_TSF_TIMER_CMDID, 678 WMI_DCC_GET_STATS_CMDID, 679 WMI_DCC_CLEAR_STATS_CMDID, 680 WMI_DCC_UPDATE_NDL_CMDID, 681 WMI_SOC_SET_PCL_CMDID = WMI_TLV_CMD(WMI_GRP_SOC), 682 WMI_SOC_SET_HW_MODE_CMDID, 683 WMI_SOC_SET_DUAL_MAC_CONFIG_CMDID, 684 WMI_SOC_SET_ANTENNA_MODE_CMDID, 685 WMI_PACKET_FILTER_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_PKT_FILTER), 686 WMI_PACKET_FILTER_ENABLE_CMDID, 687 WMI_MAWC_SENSOR_REPORT_IND_CMDID = WMI_TLV_CMD(WMI_GRP_MAWC), 688 WMI_PMF_OFFLOAD_SET_SA_QUERY_CMDID = WMI_TLV_CMD(WMI_GRP_PMF_OFFLOAD), 689 WMI_BPF_GET_CAPABILITY_CMDID = WMI_TLV_CMD(WMI_GRP_BPF_OFFLOAD), 690 WMI_BPF_GET_VDEV_STATS_CMDID, 691 WMI_BPF_SET_VDEV_INSTRUCTIONS_CMDID, 692 WMI_BPF_DEL_VDEV_INSTRUCTIONS_CMDID, 693 WMI_BPF_SET_VDEV_ACTIVE_MODE_CMDID, 694 WMI_MNT_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_MONITOR), 695 WMI_SET_CURRENT_COUNTRY_CMDID = WMI_TLV_CMD(WMI_GRP_REGULATORY), 696 WMI_11D_SCAN_START_CMDID, 697 WMI_11D_SCAN_STOP_CMDID, 698 WMI_SET_INIT_COUNTRY_CMDID, 699 WMI_NDI_GET_CAP_REQ_CMDID = WMI_TLV_CMD(WMI_GRP_PROTOTYPE), 700 WMI_NDP_INITIATOR_REQ_CMDID, 701 WMI_NDP_RESPONDER_REQ_CMDID, 702 WMI_NDP_END_REQ_CMDID, 703 WMI_HW_DATA_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_HW_DATA_FILTER), 704 WMI_TWT_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_TWT), 705 WMI_TWT_DISABLE_CMDID, 706 WMI_TWT_ADD_DIALOG_CMDID, 707 WMI_TWT_DEL_DIALOG_CMDID, 708 WMI_TWT_PAUSE_DIALOG_CMDID, 709 WMI_TWT_RESUME_DIALOG_CMDID, 710 WMI_PDEV_OBSS_PD_SPATIAL_REUSE_CMDID = 711 WMI_TLV_CMD(WMI_GRP_SPATIAL_REUSE), 712 WMI_PDEV_OBSS_PD_SPATIAL_REUSE_SET_DEF_OBSS_THRESH_CMDID, 713 WMI_MLO_LINK_SET_ACTIVE_CMDID = WMI_TLV_CMD(WMI_GRP_MLO), 714 WMI_MLO_SETUP_CMDID, 715 WMI_MLO_READY_CMDID, 716 WMI_MLO_TEARDOWN_CMDID, 717 }; 718 719 enum wmi_tlv_event_id { 720 WMI_SERVICE_READY_EVENTID = 0x1, 721 WMI_READY_EVENTID, 722 WMI_SERVICE_AVAILABLE_EVENTID, 723 WMI_SCAN_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_SCAN), 724 WMI_PDEV_TPC_CONFIG_EVENTID = WMI_TLV_CMD(WMI_GRP_PDEV), 725 WMI_CHAN_INFO_EVENTID, 726 WMI_PHYERR_EVENTID, 727 WMI_PDEV_DUMP_EVENTID, 728 WMI_TX_PAUSE_EVENTID, 729 WMI_DFS_RADAR_EVENTID, 730 WMI_PDEV_L1SS_TRACK_EVENTID, 731 WMI_PDEV_TEMPERATURE_EVENTID, 732 WMI_SERVICE_READY_EXT_EVENTID, 733 WMI_PDEV_FIPS_EVENTID, 734 WMI_PDEV_CHANNEL_HOPPING_EVENTID, 735 WMI_PDEV_ANI_CCK_LEVEL_EVENTID, 736 WMI_PDEV_ANI_OFDM_LEVEL_EVENTID, 737 WMI_PDEV_TPC_EVENTID, 738 WMI_PDEV_NFCAL_POWER_ALL_CHANNELS_EVENTID, 739 WMI_PDEV_SET_HW_MODE_RESP_EVENTID, 740 WMI_PDEV_HW_MODE_TRANSITION_EVENTID, 741 WMI_PDEV_SET_MAC_CONFIG_RESP_EVENTID, 742 WMI_PDEV_ANTDIV_STATUS_EVENTID, 743 WMI_PDEV_CHIP_POWER_STATS_EVENTID, 744 WMI_PDEV_CHIP_POWER_SAVE_FAILURE_DETECTED_EVENTID, 745 WMI_PDEV_CSA_SWITCH_COUNT_STATUS_EVENTID, 746 WMI_PDEV_CHECK_CAL_VERSION_EVENTID, 747 WMI_PDEV_DIV_RSSI_ANTID_EVENTID, 748 WMI_PDEV_BSS_CHAN_INFO_EVENTID, 749 WMI_PDEV_UPDATE_CTLTABLE_EVENTID, 750 WMI_PDEV_DMA_RING_CFG_RSP_EVENTID, 751 WMI_PDEV_DMA_RING_BUF_RELEASE_EVENTID, 752 WMI_PDEV_CTL_FAILSAFE_CHECK_EVENTID, 753 WMI_PDEV_CSC_SWITCH_COUNT_STATUS_EVENTID, 754 WMI_PDEV_COLD_BOOT_CAL_DATA_EVENTID, 755 WMI_PDEV_RAP_INFO_EVENTID, 756 WMI_CHAN_RF_CHARACTERIZATION_INFO_EVENTID, 757 WMI_SERVICE_READY_EXT2_EVENTID, 758 WMI_PDEV_GET_HALPHY_CAL_STATUS_EVENTID = 759 WMI_SERVICE_READY_EXT2_EVENTID + 4, 760 WMI_PDEV_RSSI_DBM_CONVERSION_PARAMS_INFO_EVENTID = 761 WMI_PDEV_GET_HALPHY_CAL_STATUS_EVENTID + 5, 762 WMI_VDEV_START_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_VDEV), 763 WMI_VDEV_STOPPED_EVENTID, 764 WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID, 765 WMI_VDEV_MCC_BCN_INTERVAL_CHANGE_REQ_EVENTID, 766 WMI_VDEV_TSF_REPORT_EVENTID, 767 WMI_VDEV_DELETE_RESP_EVENTID, 768 WMI_VDEV_ENCRYPT_DECRYPT_DATA_RESP_EVENTID, 769 WMI_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_STATUS_EVENTID, 770 WMI_PEER_STA_KICKOUT_EVENTID = WMI_TLV_CMD(WMI_GRP_PEER), 771 WMI_PEER_INFO_EVENTID, 772 WMI_PEER_TX_FAIL_CNT_THR_EVENTID, 773 WMI_PEER_ESTIMATED_LINKSPEED_EVENTID, 774 WMI_PEER_STATE_EVENTID, 775 WMI_PEER_ASSOC_CONF_EVENTID, 776 WMI_PEER_DELETE_RESP_EVENTID, 777 WMI_PEER_RATECODE_LIST_EVENTID, 778 WMI_WDS_PEER_EVENTID, 779 WMI_PEER_STA_PS_STATECHG_EVENTID, 780 WMI_PEER_ANTDIV_INFO_EVENTID, 781 WMI_PEER_RESERVED0_EVENTID, 782 WMI_PEER_RESERVED1_EVENTID, 783 WMI_PEER_RESERVED2_EVENTID, 784 WMI_PEER_RESERVED3_EVENTID, 785 WMI_PEER_RESERVED4_EVENTID, 786 WMI_PEER_RESERVED5_EVENTID, 787 WMI_PEER_RESERVED6_EVENTID, 788 WMI_PEER_RESERVED7_EVENTID, 789 WMI_PEER_RESERVED8_EVENTID, 790 WMI_PEER_RESERVED9_EVENTID, 791 WMI_PEER_RESERVED10_EVENTID, 792 WMI_PEER_OPER_MODE_CHANGE_EVENTID, 793 WMI_MGMT_RX_EVENTID = WMI_TLV_CMD(WMI_GRP_MGMT), 794 WMI_HOST_SWBA_EVENTID, 795 WMI_TBTTOFFSET_UPDATE_EVENTID, 796 WMI_OFFLOAD_BCN_TX_STATUS_EVENTID, 797 WMI_OFFLOAD_PROB_RESP_TX_STATUS_EVENTID, 798 WMI_MGMT_TX_COMPLETION_EVENTID, 799 WMI_MGMT_TX_BUNDLE_COMPLETION_EVENTID, 800 WMI_TBTTOFFSET_EXT_UPDATE_EVENTID, 801 WMI_OFFCHAN_DATA_TX_COMPLETION_EVENTID, 802 WMI_HOST_FILS_DISCOVERY_EVENTID, 803 WMI_MGMT_RX_FW_CONSUMED_EVENTID = WMI_HOST_FILS_DISCOVERY_EVENTID + 3, 804 WMI_TX_DELBA_COMPLETE_EVENTID = WMI_TLV_CMD(WMI_GRP_BA_NEG), 805 WMI_TX_ADDBA_COMPLETE_EVENTID, 806 WMI_BA_RSP_SSN_EVENTID, 807 WMI_AGGR_STATE_TRIG_EVENTID, 808 WMI_ROAM_EVENTID = WMI_TLV_CMD(WMI_GRP_ROAM), 809 WMI_PROFILE_MATCH, 810 WMI_ROAM_SYNCH_EVENTID, 811 WMI_P2P_DISC_EVENTID = WMI_TLV_CMD(WMI_GRP_P2P), 812 WMI_P2P_NOA_EVENTID, 813 WMI_P2P_LISTEN_OFFLOAD_STOPPED_EVENTID, 814 WMI_AP_PS_EGAP_INFO_EVENTID = WMI_TLV_CMD(WMI_GRP_AP_PS), 815 WMI_PDEV_RESUME_EVENTID = WMI_TLV_CMD(WMI_GRP_SUSPEND), 816 WMI_WOW_WAKEUP_HOST_EVENTID = WMI_TLV_CMD(WMI_GRP_WOW), 817 WMI_D0_WOW_DISABLE_ACK_EVENTID, 818 WMI_WOW_INITIAL_WAKEUP_EVENTID, 819 WMI_RTT_MEASUREMENT_REPORT_EVENTID = WMI_TLV_CMD(WMI_GRP_RTT), 820 WMI_TSF_MEASUREMENT_REPORT_EVENTID, 821 WMI_RTT_ERROR_REPORT_EVENTID, 822 WMI_STATS_EXT_EVENTID = WMI_TLV_CMD(WMI_GRP_STATS), 823 WMI_IFACE_LINK_STATS_EVENTID, 824 WMI_PEER_LINK_STATS_EVENTID, 825 WMI_RADIO_LINK_STATS_EVENTID, 826 WMI_UPDATE_FW_MEM_DUMP_EVENTID, 827 WMI_DIAG_EVENT_LOG_SUPPORTED_EVENTID, 828 WMI_INST_RSSI_STATS_EVENTID, 829 WMI_RADIO_TX_POWER_LEVEL_STATS_EVENTID, 830 WMI_REPORT_STATS_EVENTID, 831 WMI_UPDATE_RCPI_EVENTID, 832 WMI_PEER_STATS_INFO_EVENTID, 833 WMI_RADIO_CHAN_STATS_EVENTID, 834 WMI_WLM_STATS_EVENTID, 835 WMI_CTRL_PATH_STATS_EVENTID, 836 WMI_HALPHY_STATS_CTRL_PATH_EVENTID, 837 WMI_NLO_MATCH_EVENTID = WMI_TLV_CMD(WMI_GRP_NLO_OFL), 838 WMI_NLO_SCAN_COMPLETE_EVENTID, 839 WMI_APFIND_EVENTID, 840 WMI_PASSPOINT_MATCH_EVENTID, 841 WMI_GTK_OFFLOAD_STATUS_EVENTID = WMI_TLV_CMD(WMI_GRP_GTK_OFL), 842 WMI_GTK_REKEY_FAIL_EVENTID, 843 WMI_CSA_HANDLING_EVENTID = WMI_TLV_CMD(WMI_GRP_CSA_OFL), 844 WMI_CHATTER_PC_QUERY_EVENTID = WMI_TLV_CMD(WMI_GRP_CHATTER), 845 WMI_PDEV_DFS_RADAR_DETECTION_EVENTID = WMI_TLV_CMD(WMI_GRP_DFS), 846 WMI_VDEV_DFS_CAC_COMPLETE_EVENTID, 847 WMI_VDEV_ADFS_OCAC_COMPLETE_EVENTID, 848 WMI_ECHO_EVENTID = WMI_TLV_CMD(WMI_GRP_MISC), 849 WMI_PDEV_UTF_EVENTID, 850 WMI_DEBUG_MESG_EVENTID, 851 WMI_UPDATE_STATS_EVENTID, 852 WMI_DEBUG_PRINT_EVENTID, 853 WMI_DCS_INTERFERENCE_EVENTID, 854 WMI_PDEV_QVIT_EVENTID, 855 WMI_WLAN_PROFILE_DATA_EVENTID, 856 WMI_PDEV_FTM_INTG_EVENTID, 857 WMI_WLAN_FREQ_AVOID_EVENTID, 858 WMI_VDEV_GET_KEEPALIVE_EVENTID, 859 WMI_THERMAL_MGMT_EVENTID, 860 WMI_DIAG_DATA_CONTAINER_EVENTID, 861 WMI_HOST_AUTO_SHUTDOWN_EVENTID, 862 WMI_UPDATE_WHAL_MIB_STATS_EVENTID, 863 WMI_UPDATE_VDEV_RATE_STATS_EVENTID, 864 WMI_DIAG_EVENTID, 865 WMI_OCB_SET_SCHED_EVENTID, 866 WMI_DEBUG_MESG_FLUSH_COMPLETE_EVENTID, 867 WMI_RSSI_BREACH_EVENTID, 868 WMI_TRANSFER_DATA_TO_FLASH_COMPLETE_EVENTID, 869 WMI_PDEV_UTF_SCPC_EVENTID, 870 WMI_READ_DATA_FROM_FLASH_EVENTID, 871 WMI_REPORT_RX_AGGR_FAILURE_EVENTID, 872 WMI_PKGID_EVENTID, 873 WMI_GPIO_INPUT_EVENTID = WMI_TLV_CMD(WMI_GRP_GPIO), 874 WMI_UPLOADH_EVENTID, 875 WMI_CAPTUREH_EVENTID, 876 WMI_RFKILL_STATE_CHANGE_EVENTID, 877 WMI_TDLS_PEER_EVENTID = WMI_TLV_CMD(WMI_GRP_TDLS), 878 WMI_STA_SMPS_FORCE_MODE_COMPL_EVENTID = WMI_TLV_CMD(WMI_GRP_STA_SMPS), 879 WMI_BATCH_SCAN_ENABLED_EVENTID = WMI_TLV_CMD(WMI_GRP_LOCATION_SCAN), 880 WMI_BATCH_SCAN_RESULT_EVENTID, 881 WMI_OEM_CAPABILITY_EVENTID = WMI_TLV_CMD(WMI_GRP_OEM), 882 WMI_OEM_MEASUREMENT_REPORT_EVENTID, 883 WMI_OEM_ERROR_REPORT_EVENTID, 884 WMI_OEM_RESPONSE_EVENTID, 885 WMI_NAN_EVENTID = WMI_TLV_CMD(WMI_GRP_NAN), 886 WMI_NAN_DISC_IFACE_CREATED_EVENTID, 887 WMI_NAN_DISC_IFACE_DELETED_EVENTID, 888 WMI_NAN_STARTED_CLUSTER_EVENTID, 889 WMI_NAN_JOINED_CLUSTER_EVENTID, 890 WMI_COEX_REPORT_ANTENNA_ISOLATION_EVENTID = WMI_TLV_CMD(WMI_GRP_COEX), 891 WMI_LPI_RESULT_EVENTID = WMI_TLV_CMD(WMI_GRP_LPI), 892 WMI_LPI_STATUS_EVENTID, 893 WMI_LPI_HANDOFF_EVENTID, 894 WMI_EXTSCAN_START_STOP_EVENTID = WMI_TLV_CMD(WMI_GRP_EXTSCAN), 895 WMI_EXTSCAN_OPERATION_EVENTID, 896 WMI_EXTSCAN_TABLE_USAGE_EVENTID, 897 WMI_EXTSCAN_CACHED_RESULTS_EVENTID, 898 WMI_EXTSCAN_WLAN_CHANGE_RESULTS_EVENTID, 899 WMI_EXTSCAN_HOTLIST_MATCH_EVENTID, 900 WMI_EXTSCAN_CAPABILITIES_EVENTID, 901 WMI_EXTSCAN_HOTLIST_SSID_MATCH_EVENTID, 902 WMI_MDNS_STATS_EVENTID = WMI_TLV_CMD(WMI_GRP_MDNS_OFL), 903 WMI_SAP_OFL_ADD_STA_EVENTID = WMI_TLV_CMD(WMI_GRP_SAP_OFL), 904 WMI_SAP_OFL_DEL_STA_EVENTID, 905 WMI_OBSS_COLOR_COLLISION_DETECTION_EVENTID = 906 WMI_EVT_GRP_START_ID(WMI_GRP_OBSS_OFL), 907 WMI_OCB_SET_CONFIG_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_OCB), 908 WMI_OCB_GET_TSF_TIMER_RESP_EVENTID, 909 WMI_DCC_GET_STATS_RESP_EVENTID, 910 WMI_DCC_UPDATE_NDL_RESP_EVENTID, 911 WMI_DCC_STATS_EVENTID, 912 WMI_SOC_SET_HW_MODE_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_SOC), 913 WMI_SOC_HW_MODE_TRANSITION_EVENTID, 914 WMI_SOC_SET_DUAL_MAC_CONFIG_RESP_EVENTID, 915 WMI_MAWC_ENABLE_SENSOR_EVENTID = WMI_TLV_CMD(WMI_GRP_MAWC), 916 WMI_BPF_CAPABILIY_INFO_EVENTID = WMI_TLV_CMD(WMI_GRP_BPF_OFFLOAD), 917 WMI_BPF_VDEV_STATS_INFO_EVENTID, 918 WMI_RMC_NEW_LEADER_EVENTID = WMI_TLV_CMD(WMI_GRP_RMC), 919 WMI_REG_CHAN_LIST_CC_EVENTID = WMI_TLV_CMD(WMI_GRP_REGULATORY), 920 WMI_11D_NEW_COUNTRY_EVENTID, 921 WMI_REG_CHAN_LIST_CC_EXT_EVENTID, 922 WMI_NDI_CAP_RSP_EVENTID = WMI_TLV_CMD(WMI_GRP_PROTOTYPE), 923 WMI_NDP_INITIATOR_RSP_EVENTID, 924 WMI_NDP_RESPONDER_RSP_EVENTID, 925 WMI_NDP_END_RSP_EVENTID, 926 WMI_NDP_INDICATION_EVENTID, 927 WMI_NDP_CONFIRM_EVENTID, 928 WMI_NDP_END_INDICATION_EVENTID, 929 930 WMI_TWT_ENABLE_EVENTID = WMI_TLV_CMD(WMI_GRP_TWT), 931 WMI_TWT_DISABLE_EVENTID, 932 WMI_TWT_ADD_DIALOG_EVENTID, 933 WMI_TWT_DEL_DIALOG_EVENTID, 934 WMI_TWT_PAUSE_DIALOG_EVENTID, 935 WMI_TWT_RESUME_DIALOG_EVENTID, 936 WMI_MLO_LINK_SET_ACTIVE_RESP_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_MLO), 937 WMI_MLO_SETUP_COMPLETE_EVENTID, 938 WMI_MLO_TEARDOWN_COMPLETE_EVENTID, 939 }; 940 941 enum wmi_tlv_pdev_param { 942 WMI_PDEV_PARAM_TX_CHAIN_MASK = 0x1, 943 WMI_PDEV_PARAM_RX_CHAIN_MASK, 944 WMI_PDEV_PARAM_TXPOWER_LIMIT2G, 945 WMI_PDEV_PARAM_TXPOWER_LIMIT5G, 946 WMI_PDEV_PARAM_TXPOWER_SCALE, 947 WMI_PDEV_PARAM_BEACON_GEN_MODE, 948 WMI_PDEV_PARAM_BEACON_TX_MODE, 949 WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE, 950 WMI_PDEV_PARAM_PROTECTION_MODE, 951 WMI_PDEV_PARAM_DYNAMIC_BW, 952 WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH, 953 WMI_PDEV_PARAM_AGG_SW_RETRY_TH, 954 WMI_PDEV_PARAM_STA_KICKOUT_TH, 955 WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING, 956 WMI_PDEV_PARAM_LTR_ENABLE, 957 WMI_PDEV_PARAM_LTR_AC_LATENCY_BE, 958 WMI_PDEV_PARAM_LTR_AC_LATENCY_BK, 959 WMI_PDEV_PARAM_LTR_AC_LATENCY_VI, 960 WMI_PDEV_PARAM_LTR_AC_LATENCY_VO, 961 WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT, 962 WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE, 963 WMI_PDEV_PARAM_LTR_RX_OVERRIDE, 964 WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT, 965 WMI_PDEV_PARAM_L1SS_ENABLE, 966 WMI_PDEV_PARAM_DSLEEP_ENABLE, 967 WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH, 968 WMI_PDEV_PARAM_PCIELP_TXBUF_WATERMARK, 969 WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN, 970 WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE, 971 WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD, 972 WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD, 973 WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD, 974 WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD, 975 WMI_PDEV_PARAM_PMF_QOS, 976 WMI_PDEV_PARAM_ARP_AC_OVERRIDE, 977 WMI_PDEV_PARAM_DCS, 978 WMI_PDEV_PARAM_ANI_ENABLE, 979 WMI_PDEV_PARAM_ANI_POLL_PERIOD, 980 WMI_PDEV_PARAM_ANI_LISTEN_PERIOD, 981 WMI_PDEV_PARAM_ANI_OFDM_LEVEL, 982 WMI_PDEV_PARAM_ANI_CCK_LEVEL, 983 WMI_PDEV_PARAM_DYNTXCHAIN, 984 WMI_PDEV_PARAM_PROXY_STA, 985 WMI_PDEV_PARAM_IDLE_PS_CONFIG, 986 WMI_PDEV_PARAM_POWER_GATING_SLEEP, 987 WMI_PDEV_PARAM_RFKILL_ENABLE, 988 WMI_PDEV_PARAM_BURST_DUR, 989 WMI_PDEV_PARAM_BURST_ENABLE, 990 WMI_PDEV_PARAM_HW_RFKILL_CONFIG, 991 WMI_PDEV_PARAM_LOW_POWER_RF_ENABLE, 992 WMI_PDEV_PARAM_L1SS_TRACK, 993 WMI_PDEV_PARAM_HYST_EN, 994 WMI_PDEV_PARAM_POWER_COLLAPSE_ENABLE, 995 WMI_PDEV_PARAM_LED_SYS_STATE, 996 WMI_PDEV_PARAM_LED_ENABLE, 997 WMI_PDEV_PARAM_AUDIO_OVER_WLAN_LATENCY, 998 WMI_PDEV_PARAM_AUDIO_OVER_WLAN_ENABLE, 999 WMI_PDEV_PARAM_WHAL_MIB_STATS_UPDATE_ENABLE, 1000 WMI_PDEV_PARAM_VDEV_RATE_STATS_UPDATE_PERIOD, 1001 WMI_PDEV_PARAM_CTS_CBW, 1002 WMI_PDEV_PARAM_WNTS_CONFIG, 1003 WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_ENABLE, 1004 WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_MIN_SLEEP_SLOP, 1005 WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_INC_DEC_STEP, 1006 WMI_PDEV_PARAM_EARLY_RX_FIX_SLEEP_SLOP, 1007 WMI_PDEV_PARAM_BMISS_BASED_ADAPTIVE_BTO_ENABLE, 1008 WMI_PDEV_PARAM_BMISS_BTO_MIN_BCN_TIMEOUT, 1009 WMI_PDEV_PARAM_BMISS_BTO_INC_DEC_STEP, 1010 WMI_PDEV_PARAM_BTO_FIX_BCN_TIMEOUT, 1011 WMI_PDEV_PARAM_CE_BASED_ADAPTIVE_BTO_ENABLE, 1012 WMI_PDEV_PARAM_CE_BTO_COMBO_CE_VALUE, 1013 WMI_PDEV_PARAM_TX_CHAIN_MASK_2G, 1014 WMI_PDEV_PARAM_RX_CHAIN_MASK_2G, 1015 WMI_PDEV_PARAM_TX_CHAIN_MASK_5G, 1016 WMI_PDEV_PARAM_RX_CHAIN_MASK_5G, 1017 WMI_PDEV_PARAM_TX_CHAIN_MASK_CCK, 1018 WMI_PDEV_PARAM_TX_CHAIN_MASK_1SS, 1019 WMI_PDEV_PARAM_CTS2SELF_FOR_P2P_GO_CONFIG, 1020 WMI_PDEV_PARAM_TXPOWER_DECR_DB, 1021 WMI_PDEV_PARAM_AGGR_BURST, 1022 WMI_PDEV_PARAM_RX_DECAP_MODE, 1023 WMI_PDEV_PARAM_FAST_CHANNEL_RESET, 1024 WMI_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA, 1025 WMI_PDEV_PARAM_ANTENNA_GAIN, 1026 WMI_PDEV_PARAM_RX_FILTER, 1027 WMI_PDEV_SET_MCAST_TO_UCAST_TID, 1028 WMI_PDEV_PARAM_PROXY_STA_MODE, 1029 WMI_PDEV_PARAM_SET_MCAST2UCAST_MODE, 1030 WMI_PDEV_PARAM_SET_MCAST2UCAST_BUFFER, 1031 WMI_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER, 1032 WMI_PDEV_PEER_STA_PS_STATECHG_ENABLE, 1033 WMI_PDEV_PARAM_IGMPMLD_AC_OVERRIDE, 1034 WMI_PDEV_PARAM_BLOCK_INTERBSS, 1035 WMI_PDEV_PARAM_SET_DISABLE_RESET_CMDID, 1036 WMI_PDEV_PARAM_SET_MSDU_TTL_CMDID, 1037 WMI_PDEV_PARAM_SET_PPDU_DURATION_CMDID, 1038 WMI_PDEV_PARAM_TXBF_SOUND_PERIOD_CMDID, 1039 WMI_PDEV_PARAM_SET_PROMISC_MODE_CMDID, 1040 WMI_PDEV_PARAM_SET_BURST_MODE_CMDID, 1041 WMI_PDEV_PARAM_EN_STATS, 1042 WMI_PDEV_PARAM_MU_GROUP_POLICY, 1043 WMI_PDEV_PARAM_NOISE_DETECTION, 1044 WMI_PDEV_PARAM_NOISE_THRESHOLD, 1045 WMI_PDEV_PARAM_DPD_ENABLE, 1046 WMI_PDEV_PARAM_SET_MCAST_BCAST_ECHO, 1047 WMI_PDEV_PARAM_ATF_STRICT_SCH, 1048 WMI_PDEV_PARAM_ATF_SCHED_DURATION, 1049 WMI_PDEV_PARAM_ANT_PLZN, 1050 WMI_PDEV_PARAM_MGMT_RETRY_LIMIT, 1051 WMI_PDEV_PARAM_SENSITIVITY_LEVEL, 1052 WMI_PDEV_PARAM_SIGNED_TXPOWER_2G, 1053 WMI_PDEV_PARAM_SIGNED_TXPOWER_5G, 1054 WMI_PDEV_PARAM_ENABLE_PER_TID_AMSDU, 1055 WMI_PDEV_PARAM_ENABLE_PER_TID_AMPDU, 1056 WMI_PDEV_PARAM_CCA_THRESHOLD, 1057 WMI_PDEV_PARAM_RTS_FIXED_RATE, 1058 WMI_PDEV_PARAM_PDEV_RESET, 1059 WMI_PDEV_PARAM_WAPI_MBSSID_OFFSET, 1060 WMI_PDEV_PARAM_ARP_DBG_SRCADDR, 1061 WMI_PDEV_PARAM_ARP_DBG_DSTADDR, 1062 WMI_PDEV_PARAM_ATF_OBSS_NOISE_SCH, 1063 WMI_PDEV_PARAM_ATF_OBSS_NOISE_SCALING_FACTOR, 1064 WMI_PDEV_PARAM_CUST_TXPOWER_SCALE, 1065 WMI_PDEV_PARAM_ATF_DYNAMIC_ENABLE, 1066 WMI_PDEV_PARAM_CTRL_RETRY_LIMIT, 1067 WMI_PDEV_PARAM_PROPAGATION_DELAY, 1068 WMI_PDEV_PARAM_ENA_ANT_DIV, 1069 WMI_PDEV_PARAM_FORCE_CHAIN_ANT, 1070 WMI_PDEV_PARAM_ANT_DIV_SELFTEST, 1071 WMI_PDEV_PARAM_ANT_DIV_SELFTEST_INTVL, 1072 WMI_PDEV_PARAM_STATS_OBSERVATION_PERIOD, 1073 WMI_PDEV_PARAM_TX_PPDU_DELAY_BIN_SIZE_MS, 1074 WMI_PDEV_PARAM_TX_PPDU_DELAY_ARRAY_LEN, 1075 WMI_PDEV_PARAM_TX_MPDU_AGGR_ARRAY_LEN, 1076 WMI_PDEV_PARAM_RX_MPDU_AGGR_ARRAY_LEN, 1077 WMI_PDEV_PARAM_TX_SCH_DELAY, 1078 WMI_PDEV_PARAM_ENABLE_RTS_SIFS_BURSTING, 1079 WMI_PDEV_PARAM_MAX_MPDUS_IN_AMPDU, 1080 WMI_PDEV_PARAM_PEER_STATS_INFO_ENABLE, 1081 WMI_PDEV_PARAM_FAST_PWR_TRANSITION, 1082 WMI_PDEV_PARAM_RADIO_CHAN_STATS_ENABLE, 1083 WMI_PDEV_PARAM_RADIO_DIAGNOSIS_ENABLE, 1084 WMI_PDEV_PARAM_MESH_MCAST_ENABLE, 1085 WMI_PDEV_PARAM_SET_CMD_OBSS_PD_THRESHOLD = 0xbc, 1086 WMI_PDEV_PARAM_SET_CMD_OBSS_PD_PER_AC = 0xbe, 1087 WMI_PDEV_PARAM_ENABLE_SR_PROHIBIT = 0xc6, 1088 }; 1089 1090 enum wmi_tlv_vdev_param { 1091 WMI_VDEV_PARAM_RTS_THRESHOLD = 0x1, 1092 WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD, 1093 WMI_VDEV_PARAM_BEACON_INTERVAL, 1094 WMI_VDEV_PARAM_LISTEN_INTERVAL, 1095 WMI_VDEV_PARAM_MULTICAST_RATE, 1096 WMI_VDEV_PARAM_MGMT_TX_RATE, 1097 WMI_VDEV_PARAM_SLOT_TIME, 1098 WMI_VDEV_PARAM_PREAMBLE, 1099 WMI_VDEV_PARAM_SWBA_TIME, 1100 WMI_VDEV_STATS_UPDATE_PERIOD, 1101 WMI_VDEV_PWRSAVE_AGEOUT_TIME, 1102 WMI_VDEV_HOST_SWBA_INTERVAL, 1103 WMI_VDEV_PARAM_DTIM_PERIOD, 1104 WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT, 1105 WMI_VDEV_PARAM_WDS, 1106 WMI_VDEV_PARAM_ATIM_WINDOW, 1107 WMI_VDEV_PARAM_BMISS_COUNT_MAX, 1108 WMI_VDEV_PARAM_BMISS_FIRST_BCNT, 1109 WMI_VDEV_PARAM_BMISS_FINAL_BCNT, 1110 WMI_VDEV_PARAM_FEATURE_WMM, 1111 WMI_VDEV_PARAM_CHWIDTH, 1112 WMI_VDEV_PARAM_CHEXTOFFSET, 1113 WMI_VDEV_PARAM_DISABLE_HTPROTECTION, 1114 WMI_VDEV_PARAM_STA_QUICKKICKOUT, 1115 WMI_VDEV_PARAM_MGMT_RATE, 1116 WMI_VDEV_PARAM_PROTECTION_MODE, 1117 WMI_VDEV_PARAM_FIXED_RATE, 1118 WMI_VDEV_PARAM_SGI, 1119 WMI_VDEV_PARAM_LDPC, 1120 WMI_VDEV_PARAM_TX_STBC, 1121 WMI_VDEV_PARAM_RX_STBC, 1122 WMI_VDEV_PARAM_INTRA_BSS_FWD, 1123 WMI_VDEV_PARAM_DEF_KEYID, 1124 WMI_VDEV_PARAM_NSS, 1125 WMI_VDEV_PARAM_BCAST_DATA_RATE, 1126 WMI_VDEV_PARAM_MCAST_DATA_RATE, 1127 WMI_VDEV_PARAM_MCAST_INDICATE, 1128 WMI_VDEV_PARAM_DHCP_INDICATE, 1129 WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE, 1130 WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS, 1131 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS, 1132 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS, 1133 WMI_VDEV_PARAM_AP_ENABLE_NAWDS, 1134 WMI_VDEV_PARAM_ENABLE_RTSCTS, 1135 WMI_VDEV_PARAM_TXBF, 1136 WMI_VDEV_PARAM_PACKET_POWERSAVE, 1137 WMI_VDEV_PARAM_DROP_UNENCRY, 1138 WMI_VDEV_PARAM_TX_ENCAP_TYPE, 1139 WMI_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS, 1140 WMI_VDEV_PARAM_EARLY_RX_ADJUST_ENABLE, 1141 WMI_VDEV_PARAM_EARLY_RX_TGT_BMISS_NUM, 1142 WMI_VDEV_PARAM_EARLY_RX_BMISS_SAMPLE_CYCLE, 1143 WMI_VDEV_PARAM_EARLY_RX_SLOP_STEP, 1144 WMI_VDEV_PARAM_EARLY_RX_INIT_SLOP, 1145 WMI_VDEV_PARAM_EARLY_RX_ADJUST_PAUSE, 1146 WMI_VDEV_PARAM_TX_PWRLIMIT, 1147 WMI_VDEV_PARAM_SNR_NUM_FOR_CAL, 1148 WMI_VDEV_PARAM_ROAM_FW_OFFLOAD, 1149 WMI_VDEV_PARAM_ENABLE_RMC, 1150 WMI_VDEV_PARAM_IBSS_MAX_BCN_LOST_MS, 1151 WMI_VDEV_PARAM_MAX_RATE, 1152 WMI_VDEV_PARAM_EARLY_RX_DRIFT_SAMPLE, 1153 WMI_VDEV_PARAM_SET_IBSS_TX_FAIL_CNT_THR, 1154 WMI_VDEV_PARAM_EBT_RESYNC_TIMEOUT, 1155 WMI_VDEV_PARAM_AGGR_TRIG_EVENT_ENABLE, 1156 WMI_VDEV_PARAM_IS_IBSS_POWER_SAVE_ALLOWED, 1157 WMI_VDEV_PARAM_IS_POWER_COLLAPSE_ALLOWED, 1158 WMI_VDEV_PARAM_IS_AWAKE_ON_TXRX_ENABLED, 1159 WMI_VDEV_PARAM_INACTIVITY_CNT, 1160 WMI_VDEV_PARAM_TXSP_END_INACTIVITY_TIME_MS, 1161 WMI_VDEV_PARAM_DTIM_POLICY, 1162 WMI_VDEV_PARAM_IBSS_PS_WARMUP_TIME_SECS, 1163 WMI_VDEV_PARAM_IBSS_PS_1RX_CHAIN_IN_ATIM_WINDOW_ENABLE, 1164 WMI_VDEV_PARAM_RX_LEAK_WINDOW, 1165 WMI_VDEV_PARAM_STATS_AVG_FACTOR, 1166 WMI_VDEV_PARAM_DISCONNECT_TH, 1167 WMI_VDEV_PARAM_RTSCTS_RATE, 1168 WMI_VDEV_PARAM_MCC_RTSCTS_PROTECTION_ENABLE, 1169 WMI_VDEV_PARAM_MCC_BROADCAST_PROBE_ENABLE, 1170 WMI_VDEV_PARAM_TXPOWER_SCALE, 1171 WMI_VDEV_PARAM_TXPOWER_SCALE_DECR_DB, 1172 WMI_VDEV_PARAM_MCAST2UCAST_SET, 1173 WMI_VDEV_PARAM_RC_NUM_RETRIES, 1174 WMI_VDEV_PARAM_CABQ_MAXDUR, 1175 WMI_VDEV_PARAM_MFPTEST_SET, 1176 WMI_VDEV_PARAM_RTS_FIXED_RATE, 1177 WMI_VDEV_PARAM_VHT_SGIMASK, 1178 WMI_VDEV_PARAM_VHT80_RATEMASK, 1179 WMI_VDEV_PARAM_PROXY_STA, 1180 WMI_VDEV_PARAM_VIRTUAL_CELL_MODE, 1181 WMI_VDEV_PARAM_RX_DECAP_TYPE, 1182 WMI_VDEV_PARAM_BW_NSS_RATEMASK, 1183 WMI_VDEV_PARAM_SENSOR_AP, 1184 WMI_VDEV_PARAM_BEACON_RATE, 1185 WMI_VDEV_PARAM_DTIM_ENABLE_CTS, 1186 WMI_VDEV_PARAM_STA_KICKOUT, 1187 WMI_VDEV_PARAM_CAPABILITIES, 1188 WMI_VDEV_PARAM_TSF_INCREMENT, 1189 WMI_VDEV_PARAM_AMPDU_PER_AC, 1190 WMI_VDEV_PARAM_RX_FILTER, 1191 WMI_VDEV_PARAM_MGMT_TX_POWER, 1192 WMI_VDEV_PARAM_NON_AGG_SW_RETRY_TH, 1193 WMI_VDEV_PARAM_AGG_SW_RETRY_TH, 1194 WMI_VDEV_PARAM_DISABLE_DYN_BW_RTS, 1195 WMI_VDEV_PARAM_ATF_SSID_SCHED_POLICY, 1196 WMI_VDEV_PARAM_HE_DCM, 1197 WMI_VDEV_PARAM_HE_RANGE_EXT, 1198 WMI_VDEV_PARAM_ENABLE_BCAST_PROBE_RESPONSE, 1199 WMI_VDEV_PARAM_FILS_MAX_CHANNEL_GUARD_TIME, 1200 WMI_VDEV_PARAM_HE_LTF = 0x74, 1201 WMI_VDEV_PARAM_BA_MODE = 0x7e, 1202 WMI_VDEV_PARAM_AUTORATE_MISC_CFG = 0x80, 1203 WMI_VDEV_PARAM_SET_HE_SOUNDING_MODE = 0x87, 1204 WMI_VDEV_PARAM_6GHZ_PARAMS = 0x99, 1205 WMI_VDEV_PARAM_PROTOTYPE = 0x8000, 1206 WMI_VDEV_PARAM_BSS_COLOR, 1207 WMI_VDEV_PARAM_SET_HEMU_MODE, 1208 WMI_VDEV_PARAM_HEOPS_0_31 = 0x8003, 1209 WMI_VDEV_PARAM_SET_EHT_MU_MODE = 0x8005, 1210 WMI_VDEV_PARAM_EHT_LTF, 1211 }; 1212 1213 enum wmi_tlv_peer_flags { 1214 WMI_PEER_AUTH = 0x00000001, 1215 WMI_PEER_QOS = 0x00000002, 1216 WMI_PEER_NEED_PTK_4_WAY = 0x00000004, 1217 WMI_PEER_NEED_GTK_2_WAY = 0x00000010, 1218 WMI_PEER_HE = 0x00000400, 1219 WMI_PEER_APSD = 0x00000800, 1220 WMI_PEER_HT = 0x00001000, 1221 WMI_PEER_40MHZ = 0x00002000, 1222 WMI_PEER_STBC = 0x00008000, 1223 WMI_PEER_LDPC = 0x00010000, 1224 WMI_PEER_DYN_MIMOPS = 0x00020000, 1225 WMI_PEER_STATIC_MIMOPS = 0x00040000, 1226 WMI_PEER_SPATIAL_MUX = 0x00200000, 1227 WMI_PEER_TWT_REQ = 0x00400000, 1228 WMI_PEER_TWT_RESP = 0x00800000, 1229 WMI_PEER_VHT = 0x02000000, 1230 WMI_PEER_80MHZ = 0x04000000, 1231 WMI_PEER_PMF = 0x08000000, 1232 WMI_PEER_IS_P2P_CAPABLE = 0x20000000, 1233 WMI_PEER_160MHZ = 0x40000000, 1234 WMI_PEER_SAFEMODE_EN = 0x80000000, 1235 }; 1236 1237 enum wmi_tlv_peer_flags_ext { 1238 WMI_PEER_EXT_EHT = BIT(0), 1239 WMI_PEER_EXT_320MHZ = BIT(1), 1240 }; 1241 1242 /** Enum list of TLV Tags for each parameter structure type. */ 1243 enum wmi_tlv_tag { 1244 WMI_TAG_LAST_RESERVED = 15, 1245 WMI_TAG_FIRST_ARRAY_ENUM, 1246 WMI_TAG_ARRAY_UINT32 = WMI_TAG_FIRST_ARRAY_ENUM, 1247 WMI_TAG_ARRAY_BYTE, 1248 WMI_TAG_ARRAY_STRUCT, 1249 WMI_TAG_ARRAY_FIXED_STRUCT, 1250 WMI_TAG_ARRAY_INT16, 1251 WMI_TAG_LAST_ARRAY_ENUM = 31, 1252 WMI_TAG_SERVICE_READY_EVENT, 1253 WMI_TAG_HAL_REG_CAPABILITIES, 1254 WMI_TAG_WLAN_HOST_MEM_REQ, 1255 WMI_TAG_READY_EVENT, 1256 WMI_TAG_SCAN_EVENT, 1257 WMI_TAG_PDEV_TPC_CONFIG_EVENT, 1258 WMI_TAG_CHAN_INFO_EVENT, 1259 WMI_TAG_COMB_PHYERR_RX_HDR, 1260 WMI_TAG_VDEV_START_RESPONSE_EVENT, 1261 WMI_TAG_VDEV_STOPPED_EVENT, 1262 WMI_TAG_VDEV_INSTALL_KEY_COMPLETE_EVENT, 1263 WMI_TAG_PEER_STA_KICKOUT_EVENT, 1264 WMI_TAG_MGMT_RX_HDR, 1265 WMI_TAG_TBTT_OFFSET_EVENT, 1266 WMI_TAG_TX_DELBA_COMPLETE_EVENT, 1267 WMI_TAG_TX_ADDBA_COMPLETE_EVENT, 1268 WMI_TAG_ROAM_EVENT, 1269 WMI_TAG_WOW_EVENT_INFO, 1270 WMI_TAG_WOW_EVENT_INFO_SECTION_BITMAP, 1271 WMI_TAG_RTT_EVENT_HEADER, 1272 WMI_TAG_RTT_ERROR_REPORT_EVENT, 1273 WMI_TAG_RTT_MEAS_EVENT, 1274 WMI_TAG_ECHO_EVENT, 1275 WMI_TAG_FTM_INTG_EVENT, 1276 WMI_TAG_VDEV_GET_KEEPALIVE_EVENT, 1277 WMI_TAG_GPIO_INPUT_EVENT, 1278 WMI_TAG_CSA_EVENT, 1279 WMI_TAG_GTK_OFFLOAD_STATUS_EVENT, 1280 WMI_TAG_IGTK_INFO, 1281 WMI_TAG_DCS_INTERFERENCE_EVENT, 1282 WMI_TAG_ATH_DCS_CW_INT, 1283 WMI_TAG_WLAN_DCS_CW_INT = /* ALIAS */ 1284 WMI_TAG_ATH_DCS_CW_INT, 1285 WMI_TAG_ATH_DCS_WLAN_INT_STAT, 1286 WMI_TAG_WLAN_DCS_IM_TGT_STATS_T = /* ALIAS */ 1287 WMI_TAG_ATH_DCS_WLAN_INT_STAT, 1288 WMI_TAG_WLAN_PROFILE_CTX_T, 1289 WMI_TAG_WLAN_PROFILE_T, 1290 WMI_TAG_PDEV_QVIT_EVENT, 1291 WMI_TAG_HOST_SWBA_EVENT, 1292 WMI_TAG_TIM_INFO, 1293 WMI_TAG_P2P_NOA_INFO, 1294 WMI_TAG_STATS_EVENT, 1295 WMI_TAG_AVOID_FREQ_RANGES_EVENT, 1296 WMI_TAG_AVOID_FREQ_RANGE_DESC, 1297 WMI_TAG_GTK_REKEY_FAIL_EVENT, 1298 WMI_TAG_INIT_CMD, 1299 WMI_TAG_RESOURCE_CONFIG, 1300 WMI_TAG_WLAN_HOST_MEMORY_CHUNK, 1301 WMI_TAG_START_SCAN_CMD, 1302 WMI_TAG_STOP_SCAN_CMD, 1303 WMI_TAG_SCAN_CHAN_LIST_CMD, 1304 WMI_TAG_CHANNEL, 1305 WMI_TAG_PDEV_SET_REGDOMAIN_CMD, 1306 WMI_TAG_PDEV_SET_PARAM_CMD, 1307 WMI_TAG_PDEV_SET_WMM_PARAMS_CMD, 1308 WMI_TAG_WMM_PARAMS, 1309 WMI_TAG_PDEV_SET_QUIET_CMD, 1310 WMI_TAG_VDEV_CREATE_CMD, 1311 WMI_TAG_VDEV_DELETE_CMD, 1312 WMI_TAG_VDEV_START_REQUEST_CMD, 1313 WMI_TAG_P2P_NOA_DESCRIPTOR, 1314 WMI_TAG_P2P_GO_SET_BEACON_IE, 1315 WMI_TAG_GTK_OFFLOAD_CMD, 1316 WMI_TAG_VDEV_UP_CMD, 1317 WMI_TAG_VDEV_STOP_CMD, 1318 WMI_TAG_VDEV_DOWN_CMD, 1319 WMI_TAG_VDEV_SET_PARAM_CMD, 1320 WMI_TAG_VDEV_INSTALL_KEY_CMD, 1321 WMI_TAG_PEER_CREATE_CMD, 1322 WMI_TAG_PEER_DELETE_CMD, 1323 WMI_TAG_PEER_FLUSH_TIDS_CMD, 1324 WMI_TAG_PEER_SET_PARAM_CMD, 1325 WMI_TAG_PEER_ASSOC_COMPLETE_CMD, 1326 WMI_TAG_VHT_RATE_SET, 1327 WMI_TAG_BCN_TMPL_CMD, 1328 WMI_TAG_PRB_TMPL_CMD, 1329 WMI_TAG_BCN_PRB_INFO, 1330 WMI_TAG_PEER_TID_ADDBA_CMD, 1331 WMI_TAG_PEER_TID_DELBA_CMD, 1332 WMI_TAG_STA_POWERSAVE_MODE_CMD, 1333 WMI_TAG_STA_POWERSAVE_PARAM_CMD, 1334 WMI_TAG_STA_DTIM_PS_METHOD_CMD, 1335 WMI_TAG_ROAM_SCAN_MODE, 1336 WMI_TAG_ROAM_SCAN_RSSI_THRESHOLD, 1337 WMI_TAG_ROAM_SCAN_PERIOD, 1338 WMI_TAG_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, 1339 WMI_TAG_PDEV_SUSPEND_CMD, 1340 WMI_TAG_PDEV_RESUME_CMD, 1341 WMI_TAG_ADD_BCN_FILTER_CMD, 1342 WMI_TAG_RMV_BCN_FILTER_CMD, 1343 WMI_TAG_WOW_ENABLE_CMD, 1344 WMI_TAG_WOW_HOSTWAKEUP_FROM_SLEEP_CMD, 1345 WMI_TAG_STA_UAPSD_AUTO_TRIG_CMD, 1346 WMI_TAG_STA_UAPSD_AUTO_TRIG_PARAM, 1347 WMI_TAG_SET_ARP_NS_OFFLOAD_CMD, 1348 WMI_TAG_ARP_OFFLOAD_TUPLE, 1349 WMI_TAG_NS_OFFLOAD_TUPLE, 1350 WMI_TAG_FTM_INTG_CMD, 1351 WMI_TAG_STA_KEEPALIVE_CMD, 1352 WMI_TAG_STA_KEEPALVE_ARP_RESPONSE, 1353 WMI_TAG_P2P_SET_VENDOR_IE_DATA_CMD, 1354 WMI_TAG_AP_PS_PEER_CMD, 1355 WMI_TAG_PEER_RATE_RETRY_SCHED_CMD, 1356 WMI_TAG_WLAN_PROFILE_TRIGGER_CMD, 1357 WMI_TAG_WLAN_PROFILE_SET_HIST_INTVL_CMD, 1358 WMI_TAG_WLAN_PROFILE_GET_PROF_DATA_CMD, 1359 WMI_TAG_WLAN_PROFILE_ENABLE_PROFILE_ID_CMD, 1360 WMI_TAG_WOW_DEL_PATTERN_CMD, 1361 WMI_TAG_WOW_ADD_DEL_EVT_CMD, 1362 WMI_TAG_RTT_MEASREQ_HEAD, 1363 WMI_TAG_RTT_MEASREQ_BODY, 1364 WMI_TAG_RTT_TSF_CMD, 1365 WMI_TAG_VDEV_SPECTRAL_CONFIGURE_CMD, 1366 WMI_TAG_VDEV_SPECTRAL_ENABLE_CMD, 1367 WMI_TAG_REQUEST_STATS_CMD, 1368 WMI_TAG_NLO_CONFIG_CMD, 1369 WMI_TAG_NLO_CONFIGURED_PARAMETERS, 1370 WMI_TAG_CSA_OFFLOAD_ENABLE_CMD, 1371 WMI_TAG_CSA_OFFLOAD_CHANSWITCH_CMD, 1372 WMI_TAG_CHATTER_SET_MODE_CMD, 1373 WMI_TAG_ECHO_CMD, 1374 WMI_TAG_VDEV_SET_KEEPALIVE_CMD, 1375 WMI_TAG_VDEV_GET_KEEPALIVE_CMD, 1376 WMI_TAG_FORCE_FW_HANG_CMD, 1377 WMI_TAG_GPIO_CONFIG_CMD, 1378 WMI_TAG_GPIO_OUTPUT_CMD, 1379 WMI_TAG_PEER_ADD_WDS_ENTRY_CMD, 1380 WMI_TAG_PEER_REMOVE_WDS_ENTRY_CMD, 1381 WMI_TAG_BCN_TX_HDR, 1382 WMI_TAG_BCN_SEND_FROM_HOST_CMD, 1383 WMI_TAG_MGMT_TX_HDR, 1384 WMI_TAG_ADDBA_CLEAR_RESP_CMD, 1385 WMI_TAG_ADDBA_SEND_CMD, 1386 WMI_TAG_DELBA_SEND_CMD, 1387 WMI_TAG_ADDBA_SETRESPONSE_CMD, 1388 WMI_TAG_SEND_SINGLEAMSDU_CMD, 1389 WMI_TAG_PDEV_PKTLOG_ENABLE_CMD, 1390 WMI_TAG_PDEV_PKTLOG_DISABLE_CMD, 1391 WMI_TAG_PDEV_SET_HT_IE_CMD, 1392 WMI_TAG_PDEV_SET_VHT_IE_CMD, 1393 WMI_TAG_PDEV_SET_DSCP_TID_MAP_CMD, 1394 WMI_TAG_PDEV_GREEN_AP_PS_ENABLE_CMD, 1395 WMI_TAG_PDEV_GET_TPC_CONFIG_CMD, 1396 WMI_TAG_PDEV_SET_BASE_MACADDR_CMD, 1397 WMI_TAG_PEER_MCAST_GROUP_CMD, 1398 WMI_TAG_ROAM_AP_PROFILE, 1399 WMI_TAG_AP_PROFILE, 1400 WMI_TAG_SCAN_SCH_PRIORITY_TABLE_CMD, 1401 WMI_TAG_PDEV_DFS_ENABLE_CMD, 1402 WMI_TAG_PDEV_DFS_DISABLE_CMD, 1403 WMI_TAG_WOW_ADD_PATTERN_CMD, 1404 WMI_TAG_WOW_BITMAP_PATTERN_T, 1405 WMI_TAG_WOW_IPV4_SYNC_PATTERN_T, 1406 WMI_TAG_WOW_IPV6_SYNC_PATTERN_T, 1407 WMI_TAG_WOW_MAGIC_PATTERN_CMD, 1408 WMI_TAG_SCAN_UPDATE_REQUEST_CMD, 1409 WMI_TAG_CHATTER_PKT_COALESCING_FILTER, 1410 WMI_TAG_CHATTER_COALESCING_ADD_FILTER_CMD, 1411 WMI_TAG_CHATTER_COALESCING_DELETE_FILTER_CMD, 1412 WMI_TAG_CHATTER_COALESCING_QUERY_CMD, 1413 WMI_TAG_TXBF_CMD, 1414 WMI_TAG_DEBUG_LOG_CONFIG_CMD, 1415 WMI_TAG_NLO_EVENT, 1416 WMI_TAG_CHATTER_QUERY_REPLY_EVENT, 1417 WMI_TAG_UPLOAD_H_HDR, 1418 WMI_TAG_CAPTURE_H_EVENT_HDR, 1419 WMI_TAG_VDEV_WNM_SLEEPMODE_CMD, 1420 WMI_TAG_VDEV_IPSEC_NATKEEPALIVE_FILTER_CMD, 1421 WMI_TAG_VDEV_WMM_ADDTS_CMD, 1422 WMI_TAG_VDEV_WMM_DELTS_CMD, 1423 WMI_TAG_VDEV_SET_WMM_PARAMS_CMD, 1424 WMI_TAG_TDLS_SET_STATE_CMD, 1425 WMI_TAG_TDLS_PEER_UPDATE_CMD, 1426 WMI_TAG_TDLS_PEER_EVENT, 1427 WMI_TAG_TDLS_PEER_CAPABILITIES, 1428 WMI_TAG_VDEV_MCC_SET_TBTT_MODE_CMD, 1429 WMI_TAG_ROAM_CHAN_LIST, 1430 WMI_TAG_VDEV_MCC_BCN_INTVL_CHANGE_EVENT, 1431 WMI_TAG_RESMGR_ADAPTIVE_OCS_ENABLE_DISABLE_CMD, 1432 WMI_TAG_RESMGR_SET_CHAN_TIME_QUOTA_CMD, 1433 WMI_TAG_RESMGR_SET_CHAN_LATENCY_CMD, 1434 WMI_TAG_BA_REQ_SSN_CMD, 1435 WMI_TAG_BA_RSP_SSN_EVENT, 1436 WMI_TAG_STA_SMPS_FORCE_MODE_CMD, 1437 WMI_TAG_SET_MCASTBCAST_FILTER_CMD, 1438 WMI_TAG_P2P_SET_OPPPS_CMD, 1439 WMI_TAG_P2P_SET_NOA_CMD, 1440 WMI_TAG_BA_REQ_SSN_CMD_SUB_STRUCT_PARAM, 1441 WMI_TAG_BA_REQ_SSN_EVENT_SUB_STRUCT_PARAM, 1442 WMI_TAG_STA_SMPS_PARAM_CMD, 1443 WMI_TAG_VDEV_SET_GTX_PARAMS_CMD, 1444 WMI_TAG_MCC_SCHED_TRAFFIC_STATS_CMD, 1445 WMI_TAG_MCC_SCHED_STA_TRAFFIC_STATS, 1446 WMI_TAG_OFFLOAD_BCN_TX_STATUS_EVENT, 1447 WMI_TAG_P2P_NOA_EVENT, 1448 WMI_TAG_HB_SET_ENABLE_CMD, 1449 WMI_TAG_HB_SET_TCP_PARAMS_CMD, 1450 WMI_TAG_HB_SET_TCP_PKT_FILTER_CMD, 1451 WMI_TAG_HB_SET_UDP_PARAMS_CMD, 1452 WMI_TAG_HB_SET_UDP_PKT_FILTER_CMD, 1453 WMI_TAG_HB_IND_EVENT, 1454 WMI_TAG_TX_PAUSE_EVENT, 1455 WMI_TAG_RFKILL_EVENT, 1456 WMI_TAG_DFS_RADAR_EVENT, 1457 WMI_TAG_DFS_PHYERR_FILTER_ENA_CMD, 1458 WMI_TAG_DFS_PHYERR_FILTER_DIS_CMD, 1459 WMI_TAG_BATCH_SCAN_RESULT_SCAN_LIST, 1460 WMI_TAG_BATCH_SCAN_RESULT_NETWORK_INFO, 1461 WMI_TAG_BATCH_SCAN_ENABLE_CMD, 1462 WMI_TAG_BATCH_SCAN_DISABLE_CMD, 1463 WMI_TAG_BATCH_SCAN_TRIGGER_RESULT_CMD, 1464 WMI_TAG_BATCH_SCAN_ENABLED_EVENT, 1465 WMI_TAG_BATCH_SCAN_RESULT_EVENT, 1466 WMI_TAG_VDEV_PLMREQ_START_CMD, 1467 WMI_TAG_VDEV_PLMREQ_STOP_CMD, 1468 WMI_TAG_THERMAL_MGMT_CMD, 1469 WMI_TAG_THERMAL_MGMT_EVENT, 1470 WMI_TAG_PEER_INFO_REQ_CMD, 1471 WMI_TAG_PEER_INFO_EVENT, 1472 WMI_TAG_PEER_INFO, 1473 WMI_TAG_PEER_TX_FAIL_CNT_THR_EVENT, 1474 WMI_TAG_RMC_SET_MODE_CMD, 1475 WMI_TAG_RMC_SET_ACTION_PERIOD_CMD, 1476 WMI_TAG_RMC_CONFIG_CMD, 1477 WMI_TAG_MHF_OFFLOAD_SET_MODE_CMD, 1478 WMI_TAG_MHF_OFFLOAD_PLUMB_ROUTING_TABLE_CMD, 1479 WMI_TAG_ADD_PROACTIVE_ARP_RSP_PATTERN_CMD, 1480 WMI_TAG_DEL_PROACTIVE_ARP_RSP_PATTERN_CMD, 1481 WMI_TAG_NAN_CMD_PARAM, 1482 WMI_TAG_NAN_EVENT_HDR, 1483 WMI_TAG_PDEV_L1SS_TRACK_EVENT, 1484 WMI_TAG_DIAG_DATA_CONTAINER_EVENT, 1485 WMI_TAG_MODEM_POWER_STATE_CMD_PARAM, 1486 WMI_TAG_PEER_GET_ESTIMATED_LINKSPEED_CMD, 1487 WMI_TAG_PEER_ESTIMATED_LINKSPEED_EVENT, 1488 WMI_TAG_AGGR_STATE_TRIG_EVENT, 1489 WMI_TAG_MHF_OFFLOAD_ROUTING_TABLE_ENTRY, 1490 WMI_TAG_ROAM_SCAN_CMD, 1491 WMI_TAG_REQ_STATS_EXT_CMD, 1492 WMI_TAG_STATS_EXT_EVENT, 1493 WMI_TAG_OBSS_SCAN_ENABLE_CMD, 1494 WMI_TAG_OBSS_SCAN_DISABLE_CMD, 1495 WMI_TAG_OFFLOAD_PRB_RSP_TX_STATUS_EVENT, 1496 WMI_TAG_PDEV_SET_LED_CONFIG_CMD, 1497 WMI_TAG_HOST_AUTO_SHUTDOWN_CFG_CMD, 1498 WMI_TAG_HOST_AUTO_SHUTDOWN_EVENT, 1499 WMI_TAG_UPDATE_WHAL_MIB_STATS_EVENT, 1500 WMI_TAG_CHAN_AVOID_UPDATE_CMD_PARAM, 1501 WMI_TAG_WOW_IOAC_PKT_PATTERN_T, 1502 WMI_TAG_WOW_IOAC_TMR_PATTERN_T, 1503 WMI_TAG_WOW_IOAC_ADD_KEEPALIVE_CMD, 1504 WMI_TAG_WOW_IOAC_DEL_KEEPALIVE_CMD, 1505 WMI_TAG_WOW_IOAC_KEEPALIVE_T, 1506 WMI_TAG_WOW_IOAC_ADD_PATTERN_CMD, 1507 WMI_TAG_WOW_IOAC_DEL_PATTERN_CMD, 1508 WMI_TAG_START_LINK_STATS_CMD, 1509 WMI_TAG_CLEAR_LINK_STATS_CMD, 1510 WMI_TAG_REQUEST_LINK_STATS_CMD, 1511 WMI_TAG_IFACE_LINK_STATS_EVENT, 1512 WMI_TAG_RADIO_LINK_STATS_EVENT, 1513 WMI_TAG_PEER_STATS_EVENT, 1514 WMI_TAG_CHANNEL_STATS, 1515 WMI_TAG_RADIO_LINK_STATS, 1516 WMI_TAG_RATE_STATS, 1517 WMI_TAG_PEER_LINK_STATS, 1518 WMI_TAG_WMM_AC_STATS, 1519 WMI_TAG_IFACE_LINK_STATS, 1520 WMI_TAG_LPI_MGMT_SNOOPING_CONFIG_CMD, 1521 WMI_TAG_LPI_START_SCAN_CMD, 1522 WMI_TAG_LPI_STOP_SCAN_CMD, 1523 WMI_TAG_LPI_RESULT_EVENT, 1524 WMI_TAG_PEER_STATE_EVENT, 1525 WMI_TAG_EXTSCAN_BUCKET_CMD, 1526 WMI_TAG_EXTSCAN_BUCKET_CHANNEL_EVENT, 1527 WMI_TAG_EXTSCAN_START_CMD, 1528 WMI_TAG_EXTSCAN_STOP_CMD, 1529 WMI_TAG_EXTSCAN_CONFIGURE_WLAN_CHANGE_MONITOR_CMD, 1530 WMI_TAG_EXTSCAN_WLAN_CHANGE_BSSID_PARAM_CMD, 1531 WMI_TAG_EXTSCAN_CONFIGURE_HOTLIST_MONITOR_CMD, 1532 WMI_TAG_EXTSCAN_GET_CACHED_RESULTS_CMD, 1533 WMI_TAG_EXTSCAN_GET_WLAN_CHANGE_RESULTS_CMD, 1534 WMI_TAG_EXTSCAN_SET_CAPABILITIES_CMD, 1535 WMI_TAG_EXTSCAN_GET_CAPABILITIES_CMD, 1536 WMI_TAG_EXTSCAN_OPERATION_EVENT, 1537 WMI_TAG_EXTSCAN_START_STOP_EVENT, 1538 WMI_TAG_EXTSCAN_TABLE_USAGE_EVENT, 1539 WMI_TAG_EXTSCAN_WLAN_DESCRIPTOR_EVENT, 1540 WMI_TAG_EXTSCAN_RSSI_INFO_EVENT, 1541 WMI_TAG_EXTSCAN_CACHED_RESULTS_EVENT, 1542 WMI_TAG_EXTSCAN_WLAN_CHANGE_RESULTS_EVENT, 1543 WMI_TAG_EXTSCAN_WLAN_CHANGE_RESULT_BSSID_EVENT, 1544 WMI_TAG_EXTSCAN_HOTLIST_MATCH_EVENT, 1545 WMI_TAG_EXTSCAN_CAPABILITIES_EVENT, 1546 WMI_TAG_EXTSCAN_CACHE_CAPABILITIES_EVENT, 1547 WMI_TAG_EXTSCAN_WLAN_CHANGE_MONITOR_CAPABILITIES_EVENT, 1548 WMI_TAG_EXTSCAN_HOTLIST_MONITOR_CAPABILITIES_EVENT, 1549 WMI_TAG_D0_WOW_ENABLE_DISABLE_CMD, 1550 WMI_TAG_D0_WOW_DISABLE_ACK_EVENT, 1551 WMI_TAG_UNIT_TEST_CMD, 1552 WMI_TAG_ROAM_OFFLOAD_TLV_PARAM, 1553 WMI_TAG_ROAM_11I_OFFLOAD_TLV_PARAM, 1554 WMI_TAG_ROAM_11R_OFFLOAD_TLV_PARAM, 1555 WMI_TAG_ROAM_ESE_OFFLOAD_TLV_PARAM, 1556 WMI_TAG_ROAM_SYNCH_EVENT, 1557 WMI_TAG_ROAM_SYNCH_COMPLETE, 1558 WMI_TAG_EXTWOW_ENABLE_CMD, 1559 WMI_TAG_EXTWOW_SET_APP_TYPE1_PARAMS_CMD, 1560 WMI_TAG_EXTWOW_SET_APP_TYPE2_PARAMS_CMD, 1561 WMI_TAG_LPI_STATUS_EVENT, 1562 WMI_TAG_LPI_HANDOFF_EVENT, 1563 WMI_TAG_VDEV_RATE_STATS_EVENT, 1564 WMI_TAG_VDEV_RATE_HT_INFO, 1565 WMI_TAG_RIC_REQUEST, 1566 WMI_TAG_PDEV_GET_TEMPERATURE_CMD, 1567 WMI_TAG_PDEV_TEMPERATURE_EVENT, 1568 WMI_TAG_SET_DHCP_SERVER_OFFLOAD_CMD, 1569 WMI_TAG_TPC_CHAINMASK_CONFIG_CMD, 1570 WMI_TAG_RIC_TSPEC, 1571 WMI_TAG_TPC_CHAINMASK_CONFIG, 1572 WMI_TAG_IPA_OFFLOAD_ENABLE_DISABLE_CMD, 1573 WMI_TAG_SCAN_PROB_REQ_OUI_CMD, 1574 WMI_TAG_KEY_MATERIAL, 1575 WMI_TAG_TDLS_SET_OFFCHAN_MODE_CMD, 1576 WMI_TAG_SET_LED_FLASHING_CMD, 1577 WMI_TAG_MDNS_OFFLOAD_CMD, 1578 WMI_TAG_MDNS_SET_FQDN_CMD, 1579 WMI_TAG_MDNS_SET_RESP_CMD, 1580 WMI_TAG_MDNS_GET_STATS_CMD, 1581 WMI_TAG_MDNS_STATS_EVENT, 1582 WMI_TAG_ROAM_INVOKE_CMD, 1583 WMI_TAG_PDEV_RESUME_EVENT, 1584 WMI_TAG_PDEV_SET_ANTENNA_DIVERSITY_CMD, 1585 WMI_TAG_SAP_OFL_ENABLE_CMD, 1586 WMI_TAG_SAP_OFL_ADD_STA_EVENT, 1587 WMI_TAG_SAP_OFL_DEL_STA_EVENT, 1588 WMI_TAG_APFIND_CMD_PARAM, 1589 WMI_TAG_APFIND_EVENT_HDR, 1590 WMI_TAG_OCB_SET_SCHED_CMD, 1591 WMI_TAG_OCB_SET_SCHED_EVENT, 1592 WMI_TAG_OCB_SET_CONFIG_CMD, 1593 WMI_TAG_OCB_SET_CONFIG_RESP_EVENT, 1594 WMI_TAG_OCB_SET_UTC_TIME_CMD, 1595 WMI_TAG_OCB_START_TIMING_ADVERT_CMD, 1596 WMI_TAG_OCB_STOP_TIMING_ADVERT_CMD, 1597 WMI_TAG_OCB_GET_TSF_TIMER_CMD, 1598 WMI_TAG_OCB_GET_TSF_TIMER_RESP_EVENT, 1599 WMI_TAG_DCC_GET_STATS_CMD, 1600 WMI_TAG_DCC_CHANNEL_STATS_REQUEST, 1601 WMI_TAG_DCC_GET_STATS_RESP_EVENT, 1602 WMI_TAG_DCC_CLEAR_STATS_CMD, 1603 WMI_TAG_DCC_UPDATE_NDL_CMD, 1604 WMI_TAG_DCC_UPDATE_NDL_RESP_EVENT, 1605 WMI_TAG_DCC_STATS_EVENT, 1606 WMI_TAG_OCB_CHANNEL, 1607 WMI_TAG_OCB_SCHEDULE_ELEMENT, 1608 WMI_TAG_DCC_NDL_STATS_PER_CHANNEL, 1609 WMI_TAG_DCC_NDL_CHAN, 1610 WMI_TAG_QOS_PARAMETER, 1611 WMI_TAG_DCC_NDL_ACTIVE_STATE_CONFIG, 1612 WMI_TAG_ROAM_SCAN_EXTENDED_THRESHOLD_PARAM, 1613 WMI_TAG_ROAM_FILTER, 1614 WMI_TAG_PASSPOINT_CONFIG_CMD, 1615 WMI_TAG_PASSPOINT_EVENT_HDR, 1616 WMI_TAG_EXTSCAN_CONFIGURE_HOTLIST_SSID_MONITOR_CMD, 1617 WMI_TAG_EXTSCAN_HOTLIST_SSID_MATCH_EVENT, 1618 WMI_TAG_VDEV_TSF_TSTAMP_ACTION_CMD, 1619 WMI_TAG_VDEV_TSF_REPORT_EVENT, 1620 WMI_TAG_GET_FW_MEM_DUMP, 1621 WMI_TAG_UPDATE_FW_MEM_DUMP, 1622 WMI_TAG_FW_MEM_DUMP_PARAMS, 1623 WMI_TAG_DEBUG_MESG_FLUSH, 1624 WMI_TAG_DEBUG_MESG_FLUSH_COMPLETE, 1625 WMI_TAG_PEER_SET_RATE_REPORT_CONDITION, 1626 WMI_TAG_ROAM_SUBNET_CHANGE_CONFIG, 1627 WMI_TAG_VDEV_SET_IE_CMD, 1628 WMI_TAG_RSSI_BREACH_MONITOR_CONFIG, 1629 WMI_TAG_RSSI_BREACH_EVENT, 1630 WMI_TAG_WOW_EVENT_INITIAL_WAKEUP, 1631 WMI_TAG_SOC_SET_PCL_CMD, 1632 WMI_TAG_SOC_SET_HW_MODE_CMD, 1633 WMI_TAG_SOC_SET_HW_MODE_RESPONSE_EVENT, 1634 WMI_TAG_SOC_HW_MODE_TRANSITION_EVENT, 1635 WMI_TAG_VDEV_TXRX_STREAMS, 1636 WMI_TAG_SOC_SET_HW_MODE_RESPONSE_VDEV_MAC_ENTRY, 1637 WMI_TAG_SOC_SET_DUAL_MAC_CONFIG_CMD, 1638 WMI_TAG_SOC_SET_DUAL_MAC_CONFIG_RESPONSE_EVENT, 1639 WMI_TAG_WOW_IOAC_SOCK_PATTERN_T, 1640 WMI_TAG_WOW_ENABLE_ICMPV6_NA_FLT_CMD, 1641 WMI_TAG_DIAG_EVENT_LOG_CONFIG, 1642 WMI_TAG_DIAG_EVENT_LOG_SUPPORTED_EVENT_FIXED_PARAMS, 1643 WMI_TAG_PACKET_FILTER_CONFIG, 1644 WMI_TAG_PACKET_FILTER_ENABLE, 1645 WMI_TAG_SAP_SET_BLACKLIST_PARAM_CMD, 1646 WMI_TAG_MGMT_TX_SEND_CMD, 1647 WMI_TAG_MGMT_TX_COMPL_EVENT, 1648 WMI_TAG_SOC_SET_ANTENNA_MODE_CMD, 1649 WMI_TAG_WOW_UDP_SVC_OFLD_CMD, 1650 WMI_TAG_LRO_INFO_CMD, 1651 WMI_TAG_ROAM_EARLYSTOP_RSSI_THRES_PARAM, 1652 WMI_TAG_SERVICE_READY_EXT_EVENT, 1653 WMI_TAG_MAWC_SENSOR_REPORT_IND_CMD, 1654 WMI_TAG_MAWC_ENABLE_SENSOR_EVENT, 1655 WMI_TAG_ROAM_CONFIGURE_MAWC_CMD, 1656 WMI_TAG_NLO_CONFIGURE_MAWC_CMD, 1657 WMI_TAG_EXTSCAN_CONFIGURE_MAWC_CMD, 1658 WMI_TAG_PEER_ASSOC_CONF_EVENT, 1659 WMI_TAG_WOW_HOSTWAKEUP_GPIO_PIN_PATTERN_CONFIG_CMD, 1660 WMI_TAG_AP_PS_EGAP_PARAM_CMD, 1661 WMI_TAG_AP_PS_EGAP_INFO_EVENT, 1662 WMI_TAG_PMF_OFFLOAD_SET_SA_QUERY_CMD, 1663 WMI_TAG_TRANSFER_DATA_TO_FLASH_CMD, 1664 WMI_TAG_TRANSFER_DATA_TO_FLASH_COMPLETE_EVENT, 1665 WMI_TAG_SCPC_EVENT, 1666 WMI_TAG_AP_PS_EGAP_INFO_CHAINMASK_LIST, 1667 WMI_TAG_STA_SMPS_FORCE_MODE_COMPLETE_EVENT, 1668 WMI_TAG_BPF_GET_CAPABILITY_CMD, 1669 WMI_TAG_BPF_CAPABILITY_INFO_EVT, 1670 WMI_TAG_BPF_GET_VDEV_STATS_CMD, 1671 WMI_TAG_BPF_VDEV_STATS_INFO_EVT, 1672 WMI_TAG_BPF_SET_VDEV_INSTRUCTIONS_CMD, 1673 WMI_TAG_BPF_DEL_VDEV_INSTRUCTIONS_CMD, 1674 WMI_TAG_VDEV_DELETE_RESP_EVENT, 1675 WMI_TAG_PEER_DELETE_RESP_EVENT, 1676 WMI_TAG_ROAM_DENSE_THRES_PARAM, 1677 WMI_TAG_ENLO_CANDIDATE_SCORE_PARAM, 1678 WMI_TAG_PEER_UPDATE_WDS_ENTRY_CMD, 1679 WMI_TAG_VDEV_CONFIG_RATEMASK, 1680 WMI_TAG_PDEV_FIPS_CMD, 1681 WMI_TAG_PDEV_SMART_ANT_ENABLE_CMD, 1682 WMI_TAG_PDEV_SMART_ANT_SET_RX_ANTENNA_CMD, 1683 WMI_TAG_PEER_SMART_ANT_SET_TX_ANTENNA_CMD, 1684 WMI_TAG_PEER_SMART_ANT_SET_TRAIN_ANTENNA_CMD, 1685 WMI_TAG_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMD, 1686 WMI_TAG_PDEV_SET_ANT_SWITCH_TBL_CMD, 1687 WMI_TAG_PDEV_SET_CTL_TABLE_CMD, 1688 WMI_TAG_PDEV_SET_MIMOGAIN_TABLE_CMD, 1689 WMI_TAG_FWTEST_SET_PARAM_CMD, 1690 WMI_TAG_PEER_ATF_REQUEST, 1691 WMI_TAG_VDEV_ATF_REQUEST, 1692 WMI_TAG_PDEV_GET_ANI_CCK_CONFIG_CMD, 1693 WMI_TAG_PDEV_GET_ANI_OFDM_CONFIG_CMD, 1694 WMI_TAG_INST_RSSI_STATS_RESP, 1695 WMI_TAG_MED_UTIL_REPORT_EVENT, 1696 WMI_TAG_PEER_STA_PS_STATECHANGE_EVENT, 1697 WMI_TAG_WDS_ADDR_EVENT, 1698 WMI_TAG_PEER_RATECODE_LIST_EVENT, 1699 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_EVENT, 1700 WMI_TAG_PDEV_TPC_EVENT, 1701 WMI_TAG_ANI_OFDM_EVENT, 1702 WMI_TAG_ANI_CCK_EVENT, 1703 WMI_TAG_PDEV_CHANNEL_HOPPING_EVENT, 1704 WMI_TAG_PDEV_FIPS_EVENT, 1705 WMI_TAG_ATF_PEER_INFO, 1706 WMI_TAG_PDEV_GET_TPC_CMD, 1707 WMI_TAG_VDEV_FILTER_NRP_CONFIG_CMD, 1708 WMI_TAG_QBOOST_CFG_CMD, 1709 WMI_TAG_PDEV_SMART_ANT_GPIO_HANDLE, 1710 WMI_TAG_PEER_SMART_ANT_SET_TX_ANTENNA_SERIES, 1711 WMI_TAG_PEER_SMART_ANT_SET_TRAIN_ANTENNA_PARAM, 1712 WMI_TAG_PDEV_SET_ANT_CTRL_CHAIN, 1713 WMI_TAG_PEER_CCK_OFDM_RATE_INFO, 1714 WMI_TAG_PEER_MCS_RATE_INFO, 1715 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_NFDBR, 1716 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_NFDBM, 1717 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_FREQNUM, 1718 WMI_TAG_MU_REPORT_TOTAL_MU, 1719 WMI_TAG_VDEV_SET_DSCP_TID_MAP_CMD, 1720 WMI_TAG_ROAM_SET_MBO, 1721 WMI_TAG_MIB_STATS_ENABLE_CMD, 1722 WMI_TAG_NAN_DISC_IFACE_CREATED_EVENT, 1723 WMI_TAG_NAN_DISC_IFACE_DELETED_EVENT, 1724 WMI_TAG_NAN_STARTED_CLUSTER_EVENT, 1725 WMI_TAG_NAN_JOINED_CLUSTER_EVENT, 1726 WMI_TAG_NDI_GET_CAP_REQ, 1727 WMI_TAG_NDP_INITIATOR_REQ, 1728 WMI_TAG_NDP_RESPONDER_REQ, 1729 WMI_TAG_NDP_END_REQ, 1730 WMI_TAG_NDI_CAP_RSP_EVENT, 1731 WMI_TAG_NDP_INITIATOR_RSP_EVENT, 1732 WMI_TAG_NDP_RESPONDER_RSP_EVENT, 1733 WMI_TAG_NDP_END_RSP_EVENT, 1734 WMI_TAG_NDP_INDICATION_EVENT, 1735 WMI_TAG_NDP_CONFIRM_EVENT, 1736 WMI_TAG_NDP_END_INDICATION_EVENT, 1737 WMI_TAG_VDEV_SET_QUIET_CMD, 1738 WMI_TAG_PDEV_SET_PCL_CMD, 1739 WMI_TAG_PDEV_SET_HW_MODE_CMD, 1740 WMI_TAG_PDEV_SET_MAC_CONFIG_CMD, 1741 WMI_TAG_PDEV_SET_ANTENNA_MODE_CMD, 1742 WMI_TAG_PDEV_SET_HW_MODE_RESPONSE_EVENT, 1743 WMI_TAG_PDEV_HW_MODE_TRANSITION_EVENT, 1744 WMI_TAG_PDEV_SET_HW_MODE_RESPONSE_VDEV_MAC_ENTRY, 1745 WMI_TAG_PDEV_SET_MAC_CONFIG_RESPONSE_EVENT, 1746 WMI_TAG_COEX_CONFIG_CMD, 1747 WMI_TAG_CONFIG_ENHANCED_MCAST_FILTER, 1748 WMI_TAG_CHAN_AVOID_RPT_ALLOW_CMD, 1749 WMI_TAG_SET_PERIODIC_CHANNEL_STATS_CONFIG, 1750 WMI_TAG_VDEV_SET_CUSTOM_AGGR_SIZE_CMD, 1751 WMI_TAG_PDEV_WAL_POWER_DEBUG_CMD, 1752 WMI_TAG_MAC_PHY_CAPABILITIES, 1753 WMI_TAG_HW_MODE_CAPABILITIES, 1754 WMI_TAG_SOC_MAC_PHY_HW_MODE_CAPS, 1755 WMI_TAG_HAL_REG_CAPABILITIES_EXT, 1756 WMI_TAG_SOC_HAL_REG_CAPABILITIES, 1757 WMI_TAG_VDEV_WISA_CMD, 1758 WMI_TAG_TX_POWER_LEVEL_STATS_EVT, 1759 WMI_TAG_SCAN_ADAPTIVE_DWELL_PARAMETERS_TLV, 1760 WMI_TAG_SCAN_ADAPTIVE_DWELL_CONFIG, 1761 WMI_TAG_WOW_SET_ACTION_WAKE_UP_CMD, 1762 WMI_TAG_NDP_END_RSP_PER_NDI, 1763 WMI_TAG_PEER_BWF_REQUEST, 1764 WMI_TAG_BWF_PEER_INFO, 1765 WMI_TAG_DBGLOG_TIME_STAMP_SYNC_CMD, 1766 WMI_TAG_RMC_SET_LEADER_CMD, 1767 WMI_TAG_RMC_MANUAL_LEADER_EVENT, 1768 WMI_TAG_PER_CHAIN_RSSI_STATS, 1769 WMI_TAG_RSSI_STATS, 1770 WMI_TAG_P2P_LO_START_CMD, 1771 WMI_TAG_P2P_LO_STOP_CMD, 1772 WMI_TAG_P2P_LO_STOPPED_EVENT, 1773 WMI_TAG_REORDER_QUEUE_SETUP_CMD, 1774 WMI_TAG_REORDER_QUEUE_REMOVE_CMD, 1775 WMI_TAG_SET_MULTIPLE_MCAST_FILTER_CMD, 1776 WMI_TAG_MGMT_TX_COMPL_BUNDLE_EVENT, 1777 WMI_TAG_READ_DATA_FROM_FLASH_CMD, 1778 WMI_TAG_READ_DATA_FROM_FLASH_EVENT, 1779 WMI_TAG_PDEV_SET_REORDER_TIMEOUT_VAL_CMD, 1780 WMI_TAG_PEER_SET_RX_BLOCKSIZE_CMD, 1781 WMI_TAG_PDEV_SET_WAKEUP_CONFIG_CMDID, 1782 WMI_TAG_TLV_BUF_LEN_PARAM, 1783 WMI_TAG_SERVICE_AVAILABLE_EVENT, 1784 WMI_TAG_PEER_ANTDIV_INFO_REQ_CMD, 1785 WMI_TAG_PEER_ANTDIV_INFO_EVENT, 1786 WMI_TAG_PEER_ANTDIV_INFO, 1787 WMI_TAG_PDEV_GET_ANTDIV_STATUS_CMD, 1788 WMI_TAG_PDEV_ANTDIV_STATUS_EVENT, 1789 WMI_TAG_MNT_FILTER_CMD, 1790 WMI_TAG_GET_CHIP_POWER_STATS_CMD, 1791 WMI_TAG_PDEV_CHIP_POWER_STATS_EVENT, 1792 WMI_TAG_COEX_GET_ANTENNA_ISOLATION_CMD, 1793 WMI_TAG_COEX_REPORT_ISOLATION_EVENT, 1794 WMI_TAG_CHAN_CCA_STATS, 1795 WMI_TAG_PEER_SIGNAL_STATS, 1796 WMI_TAG_TX_STATS, 1797 WMI_TAG_PEER_AC_TX_STATS, 1798 WMI_TAG_RX_STATS, 1799 WMI_TAG_PEER_AC_RX_STATS, 1800 WMI_TAG_REPORT_STATS_EVENT, 1801 WMI_TAG_CHAN_CCA_STATS_THRESH, 1802 WMI_TAG_PEER_SIGNAL_STATS_THRESH, 1803 WMI_TAG_TX_STATS_THRESH, 1804 WMI_TAG_RX_STATS_THRESH, 1805 WMI_TAG_PDEV_SET_STATS_THRESHOLD_CMD, 1806 WMI_TAG_REQUEST_WLAN_STATS_CMD, 1807 WMI_TAG_RX_AGGR_FAILURE_EVENT, 1808 WMI_TAG_RX_AGGR_FAILURE_INFO, 1809 WMI_TAG_VDEV_ENCRYPT_DECRYPT_DATA_REQ_CMD, 1810 WMI_TAG_VDEV_ENCRYPT_DECRYPT_DATA_RESP_EVENT, 1811 WMI_TAG_PDEV_BAND_TO_MAC, 1812 WMI_TAG_TBTT_OFFSET_INFO, 1813 WMI_TAG_TBTT_OFFSET_EXT_EVENT, 1814 WMI_TAG_SAR_LIMITS_CMD, 1815 WMI_TAG_SAR_LIMIT_CMD_ROW, 1816 WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMD, 1817 WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_DISABLE_CMD, 1818 WMI_TAG_VDEV_ADFS_CH_CFG_CMD, 1819 WMI_TAG_VDEV_ADFS_OCAC_ABORT_CMD, 1820 WMI_TAG_PDEV_DFS_RADAR_DETECTION_EVENT, 1821 WMI_TAG_VDEV_ADFS_OCAC_COMPLETE_EVENT, 1822 WMI_TAG_VDEV_DFS_CAC_COMPLETE_EVENT, 1823 WMI_TAG_VENDOR_OUI, 1824 WMI_TAG_REQUEST_RCPI_CMD, 1825 WMI_TAG_UPDATE_RCPI_EVENT, 1826 WMI_TAG_REQUEST_PEER_STATS_INFO_CMD, 1827 WMI_TAG_PEER_STATS_INFO, 1828 WMI_TAG_PEER_STATS_INFO_EVENT, 1829 WMI_TAG_PKGID_EVENT, 1830 WMI_TAG_CONNECTED_NLO_RSSI_PARAMS, 1831 WMI_TAG_SET_CURRENT_COUNTRY_CMD, 1832 WMI_TAG_REGULATORY_RULE_STRUCT, 1833 WMI_TAG_REG_CHAN_LIST_CC_EVENT, 1834 WMI_TAG_11D_SCAN_START_CMD, 1835 WMI_TAG_11D_SCAN_STOP_CMD, 1836 WMI_TAG_11D_NEW_COUNTRY_EVENT, 1837 WMI_TAG_REQUEST_RADIO_CHAN_STATS_CMD, 1838 WMI_TAG_RADIO_CHAN_STATS, 1839 WMI_TAG_RADIO_CHAN_STATS_EVENT, 1840 WMI_TAG_ROAM_PER_CONFIG, 1841 WMI_TAG_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_CMD, 1842 WMI_TAG_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_STATUS_EVENT, 1843 WMI_TAG_BPF_SET_VDEV_ACTIVE_MODE_CMD, 1844 WMI_TAG_HW_DATA_FILTER_CMD, 1845 WMI_TAG_CONNECTED_NLO_BSS_BAND_RSSI_PREF, 1846 WMI_TAG_PEER_OPER_MODE_CHANGE_EVENT, 1847 WMI_TAG_CHIP_POWER_SAVE_FAILURE_DETECTED, 1848 WMI_TAG_PDEV_MULTIPLE_VDEV_RESTART_REQUEST_CMD, 1849 WMI_TAG_PDEV_CSA_SWITCH_COUNT_STATUS_EVENT, 1850 WMI_TAG_PDEV_UPDATE_PKT_ROUTING_CMD, 1851 WMI_TAG_PDEV_CHECK_CAL_VERSION_CMD, 1852 WMI_TAG_PDEV_CHECK_CAL_VERSION_EVENT, 1853 WMI_TAG_PDEV_SET_DIVERSITY_GAIN_CMD, 1854 WMI_TAG_MAC_PHY_CHAINMASK_COMBO, 1855 WMI_TAG_MAC_PHY_CHAINMASK_CAPABILITY, 1856 WMI_TAG_VDEV_SET_ARP_STATS_CMD, 1857 WMI_TAG_VDEV_GET_ARP_STATS_CMD, 1858 WMI_TAG_VDEV_GET_ARP_STATS_EVENT, 1859 WMI_TAG_IFACE_OFFLOAD_STATS, 1860 WMI_TAG_REQUEST_STATS_CMD_SUB_STRUCT_PARAM, 1861 WMI_TAG_RSSI_CTL_EXT, 1862 WMI_TAG_SINGLE_PHYERR_EXT_RX_HDR, 1863 WMI_TAG_COEX_BT_ACTIVITY_EVENT, 1864 WMI_TAG_VDEV_GET_TX_POWER_CMD, 1865 WMI_TAG_VDEV_TX_POWER_EVENT, 1866 WMI_TAG_OFFCHAN_DATA_TX_COMPL_EVENT, 1867 WMI_TAG_OFFCHAN_DATA_TX_SEND_CMD, 1868 WMI_TAG_TX_SEND_PARAMS, 1869 WMI_TAG_HE_RATE_SET, 1870 WMI_TAG_CONGESTION_STATS, 1871 WMI_TAG_SET_INIT_COUNTRY_CMD, 1872 WMI_TAG_SCAN_DBS_DUTY_CYCLE, 1873 WMI_TAG_SCAN_DBS_DUTY_CYCLE_PARAM_TLV, 1874 WMI_TAG_PDEV_DIV_GET_RSSI_ANTID, 1875 WMI_TAG_THERM_THROT_CONFIG_REQUEST, 1876 WMI_TAG_THERM_THROT_LEVEL_CONFIG_INFO, 1877 WMI_TAG_THERM_THROT_STATS_EVENT, 1878 WMI_TAG_THERM_THROT_LEVEL_STATS_INFO, 1879 WMI_TAG_PDEV_DIV_RSSI_ANTID_EVENT, 1880 WMI_TAG_OEM_DMA_RING_CAPABILITIES, 1881 WMI_TAG_OEM_DMA_RING_CFG_REQ, 1882 WMI_TAG_OEM_DMA_RING_CFG_RSP, 1883 WMI_TAG_OEM_INDIRECT_DATA, 1884 WMI_TAG_OEM_DMA_BUF_RELEASE, 1885 WMI_TAG_OEM_DMA_BUF_RELEASE_ENTRY, 1886 WMI_TAG_PDEV_BSS_CHAN_INFO_REQUEST, 1887 WMI_TAG_PDEV_BSS_CHAN_INFO_EVENT, 1888 WMI_TAG_ROAM_LCA_DISALLOW_CONFIG, 1889 WMI_TAG_VDEV_LIMIT_OFFCHAN_CMD, 1890 WMI_TAG_ROAM_RSSI_REJECTION_OCE_CONFIG, 1891 WMI_TAG_UNIT_TEST_EVENT, 1892 WMI_TAG_ROAM_FILS_OFFLOAD, 1893 WMI_TAG_PDEV_UPDATE_PMK_CACHE_CMD, 1894 WMI_TAG_PMK_CACHE, 1895 WMI_TAG_PDEV_UPDATE_FILS_HLP_PKT_CMD, 1896 WMI_TAG_ROAM_FILS_SYNCH, 1897 WMI_TAG_GTK_OFFLOAD_EXTENDED, 1898 WMI_TAG_ROAM_BG_SCAN_ROAMING, 1899 WMI_TAG_OIC_PING_OFFLOAD_PARAMS_CMD, 1900 WMI_TAG_OIC_PING_OFFLOAD_SET_ENABLE_CMD, 1901 WMI_TAG_OIC_PING_HANDOFF_EVENT, 1902 WMI_TAG_DHCP_LEASE_RENEW_OFFLOAD_CMD, 1903 WMI_TAG_DHCP_LEASE_RENEW_EVENT, 1904 WMI_TAG_BTM_CONFIG, 1905 WMI_TAG_DEBUG_MESG_FW_DATA_STALL, 1906 WMI_TAG_WLM_CONFIG_CMD, 1907 WMI_TAG_PDEV_UPDATE_CTLTABLE_REQUEST, 1908 WMI_TAG_PDEV_UPDATE_CTLTABLE_EVENT, 1909 WMI_TAG_ROAM_CND_SCORING_PARAM, 1910 WMI_TAG_PDEV_CONFIG_VENDOR_OUI_ACTION, 1911 WMI_TAG_VENDOR_OUI_EXT, 1912 WMI_TAG_ROAM_SYNCH_FRAME_EVENT, 1913 WMI_TAG_FD_SEND_FROM_HOST_CMD, 1914 WMI_TAG_ENABLE_FILS_CMD, 1915 WMI_TAG_HOST_SWFDA_EVENT, 1916 WMI_TAG_BCN_OFFLOAD_CTRL_CMD, 1917 WMI_TAG_PDEV_SET_AC_TX_QUEUE_OPTIMIZED_CMD, 1918 WMI_TAG_STATS_PERIOD, 1919 WMI_TAG_NDL_SCHEDULE_UPDATE, 1920 WMI_TAG_PEER_TID_MSDUQ_QDEPTH_THRESH_UPDATE_CMD, 1921 WMI_TAG_MSDUQ_QDEPTH_THRESH_UPDATE, 1922 WMI_TAG_PDEV_SET_RX_FILTER_PROMISCUOUS_CMD, 1923 WMI_TAG_SAR2_RESULT_EVENT, 1924 WMI_TAG_SAR_CAPABILITIES, 1925 WMI_TAG_SAP_OBSS_DETECTION_CFG_CMD, 1926 WMI_TAG_SAP_OBSS_DETECTION_INFO_EVT, 1927 WMI_TAG_DMA_RING_CAPABILITIES, 1928 WMI_TAG_DMA_RING_CFG_REQ, 1929 WMI_TAG_DMA_RING_CFG_RSP, 1930 WMI_TAG_DMA_BUF_RELEASE, 1931 WMI_TAG_DMA_BUF_RELEASE_ENTRY, 1932 WMI_TAG_SAR_GET_LIMITS_CMD, 1933 WMI_TAG_SAR_GET_LIMITS_EVENT, 1934 WMI_TAG_SAR_GET_LIMITS_EVENT_ROW, 1935 WMI_TAG_OFFLOAD_11K_REPORT, 1936 WMI_TAG_INVOKE_NEIGHBOR_REPORT, 1937 WMI_TAG_NEIGHBOR_REPORT_OFFLOAD, 1938 WMI_TAG_VDEV_SET_CONNECTIVITY_CHECK_STATS, 1939 WMI_TAG_VDEV_GET_CONNECTIVITY_CHECK_STATS, 1940 WMI_TAG_BPF_SET_VDEV_ENABLE_CMD, 1941 WMI_TAG_BPF_SET_VDEV_WORK_MEMORY_CMD, 1942 WMI_TAG_BPF_GET_VDEV_WORK_MEMORY_CMD, 1943 WMI_TAG_BPF_GET_VDEV_WORK_MEMORY_RESP_EVT, 1944 WMI_TAG_PDEV_GET_NFCAL_POWER, 1945 WMI_TAG_BSS_COLOR_CHANGE_ENABLE, 1946 WMI_TAG_OBSS_COLOR_COLLISION_DET_CONFIG, 1947 WMI_TAG_OBSS_COLOR_COLLISION_EVT, 1948 WMI_TAG_RUNTIME_DPD_RECAL_CMD, 1949 WMI_TAG_TWT_ENABLE_CMD, 1950 WMI_TAG_TWT_DISABLE_CMD, 1951 WMI_TAG_TWT_ADD_DIALOG_CMD, 1952 WMI_TAG_TWT_DEL_DIALOG_CMD, 1953 WMI_TAG_TWT_PAUSE_DIALOG_CMD, 1954 WMI_TAG_TWT_RESUME_DIALOG_CMD, 1955 WMI_TAG_TWT_ENABLE_COMPLETE_EVENT, 1956 WMI_TAG_TWT_DISABLE_COMPLETE_EVENT, 1957 WMI_TAG_TWT_ADD_DIALOG_COMPLETE_EVENT, 1958 WMI_TAG_TWT_DEL_DIALOG_COMPLETE_EVENT, 1959 WMI_TAG_TWT_PAUSE_DIALOG_COMPLETE_EVENT, 1960 WMI_TAG_TWT_RESUME_DIALOG_COMPLETE_EVENT, 1961 WMI_TAG_REQUEST_ROAM_SCAN_STATS_CMD, 1962 WMI_TAG_ROAM_SCAN_STATS_EVENT, 1963 WMI_TAG_PEER_TID_CONFIGURATIONS_CMD, 1964 WMI_TAG_VDEV_SET_CUSTOM_SW_RETRY_TH_CMD, 1965 WMI_TAG_GET_TPC_POWER_CMD, 1966 WMI_TAG_GET_TPC_POWER_EVENT, 1967 WMI_TAG_DMA_BUF_RELEASE_SPECTRAL_META_DATA, 1968 WMI_TAG_MOTION_DET_CONFIG_PARAMS_CMD, 1969 WMI_TAG_MOTION_DET_BASE_LINE_CONFIG_PARAMS_CMD, 1970 WMI_TAG_MOTION_DET_START_STOP_CMD, 1971 WMI_TAG_MOTION_DET_BASE_LINE_START_STOP_CMD, 1972 WMI_TAG_MOTION_DET_EVENT, 1973 WMI_TAG_MOTION_DET_BASE_LINE_EVENT, 1974 WMI_TAG_NDP_TRANSPORT_IP, 1975 WMI_TAG_OBSS_SPATIAL_REUSE_SET_CMD, 1976 WMI_TAG_ESP_ESTIMATE_EVENT, 1977 WMI_TAG_NAN_HOST_CONFIG, 1978 WMI_TAG_SPECTRAL_BIN_SCALING_PARAMS, 1979 WMI_TAG_PEER_CFR_CAPTURE_CMD, 1980 WMI_TAG_PEER_CHAN_WIDTH_SWITCH_CMD, 1981 WMI_TAG_CHAN_WIDTH_PEER_LIST, 1982 WMI_TAG_OBSS_SPATIAL_REUSE_SET_DEF_OBSS_THRESH_CMD, 1983 WMI_TAG_PDEV_HE_TB_ACTION_FRM_CMD, 1984 WMI_TAG_PEER_EXTD2_STATS, 1985 WMI_TAG_HPCS_PULSE_START_CMD, 1986 WMI_TAG_PDEV_CTL_FAILSAFE_CHECK_EVENT, 1987 WMI_TAG_VDEV_CHAINMASK_CONFIG_CMD, 1988 WMI_TAG_VDEV_BCN_OFFLOAD_QUIET_CONFIG_CMD, 1989 WMI_TAG_NAN_EVENT_INFO, 1990 WMI_TAG_NDP_CHANNEL_INFO, 1991 WMI_TAG_NDP_CMD, 1992 WMI_TAG_NDP_EVENT, 1993 /* TODO add all the missing cmds */ 1994 WMI_TAG_PDEV_PEER_PKTLOG_FILTER_CMD = 0x301, 1995 WMI_TAG_PDEV_PEER_PKTLOG_FILTER_INFO, 1996 WMI_TAG_SERVICE_READY_EXT2_EVENT = 0x334, 1997 WMI_TAG_FILS_DISCOVERY_TMPL_CMD = 0x344, 1998 WMI_TAG_MAC_PHY_CAPABILITIES_EXT = 0x36F, 1999 WMI_TAG_PDEV_SRG_BSS_COLOR_BITMAP_CMD = 0x37b, 2000 WMI_TAG_PDEV_SRG_PARTIAL_BSSID_BITMAP_CMD, 2001 WMI_TAG_PDEV_SRG_OBSS_COLOR_ENABLE_BITMAP_CMD = 0x381, 2002 WMI_TAG_PDEV_SRG_OBSS_BSSID_ENABLE_BITMAP_CMD, 2003 WMI_TAG_PDEV_NON_SRG_OBSS_COLOR_ENABLE_BITMAP_CMD, 2004 WMI_TAG_PDEV_NON_SRG_OBSS_BSSID_ENABLE_BITMAP_CMD, 2005 WMI_TAG_REGULATORY_RULE_EXT_STRUCT = 0x3A9, 2006 WMI_TAG_REG_CHAN_LIST_CC_EXT_EVENT, 2007 WMI_TAG_TPC_STATS_GET_CMD = 0x38B, 2008 WMI_TAG_TPC_STATS_EVENT_FIXED_PARAM, 2009 WMI_TAG_TPC_STATS_CONFIG_EVENT, 2010 WMI_TAG_TPC_STATS_REG_PWR_ALLOWED, 2011 WMI_TAG_TPC_STATS_RATES_ARRAY, 2012 WMI_TAG_TPC_STATS_CTL_PWR_TABLE_EVENT, 2013 WMI_TAG_VDEV_SET_TPC_POWER_CMD = 0x3B5, 2014 WMI_TAG_VDEV_CH_POWER_INFO, 2015 WMI_TAG_MLO_LINK_SET_ACTIVE_CMD = 0x3BE, 2016 WMI_TAG_EHT_RATE_SET = 0x3C4, 2017 WMI_TAG_DCS_AWGN_INT_TYPE = 0x3C5, 2018 WMI_TAG_MLO_TX_SEND_PARAMS, 2019 WMI_TAG_MLO_PARTNER_LINK_PARAMS, 2020 WMI_TAG_MLO_PARTNER_LINK_PARAMS_PEER_ASSOC, 2021 WMI_TAG_MLO_SETUP_CMD = 0x3C9, 2022 WMI_TAG_MLO_SETUP_COMPLETE_EVENT, 2023 WMI_TAG_MLO_READY_CMD, 2024 WMI_TAG_MLO_TEARDOWN_CMD, 2025 WMI_TAG_MLO_TEARDOWN_COMPLETE, 2026 WMI_TAG_MLO_PEER_ASSOC_PARAMS = 0x3D0, 2027 WMI_TAG_MLO_PEER_CREATE_PARAMS = 0x3D5, 2028 WMI_TAG_MLO_VDEV_START_PARAMS = 0x3D6, 2029 WMI_TAG_MLO_VDEV_CREATE_PARAMS = 0x3D7, 2030 WMI_TAG_PDEV_SET_BIOS_SAR_TABLE_CMD = 0x3D8, 2031 WMI_TAG_PDEV_SET_BIOS_GEO_TABLE_CMD = 0x3D9, 2032 WMI_TAG_PDEV_SET_BIOS_INTERFACE_CMD = 0x3FB, 2033 WMI_TAG_RSSI_DBM_CONVERSION_PARAMS_INFO_FIXED_PARAM = 0x427, 2034 WMI_TAG_RSSI_DBM_CONVERSION_PARAMS_INFO, 2035 WMI_TAG_RSSI_DBM_CONVERSION_TEMP_OFFSET_INFO, 2036 WMI_TAG_HALPHY_CTRL_PATH_CMD_FIXED_PARAM = 0x442, 2037 WMI_TAG_HALPHY_CTRL_PATH_EVENT_FIXED_PARAM, 2038 WMI_TAG_MAX 2039 }; 2040 2041 enum wmi_tlv_service { 2042 WMI_TLV_SERVICE_BEACON_OFFLOAD = 0, 2043 WMI_TLV_SERVICE_SCAN_OFFLOAD = 1, 2044 WMI_TLV_SERVICE_ROAM_SCAN_OFFLOAD = 2, 2045 WMI_TLV_SERVICE_BCN_MISS_OFFLOAD = 3, 2046 WMI_TLV_SERVICE_STA_PWRSAVE = 4, 2047 WMI_TLV_SERVICE_STA_ADVANCED_PWRSAVE = 5, 2048 WMI_TLV_SERVICE_AP_UAPSD = 6, 2049 WMI_TLV_SERVICE_AP_DFS = 7, 2050 WMI_TLV_SERVICE_11AC = 8, 2051 WMI_TLV_SERVICE_BLOCKACK = 9, 2052 WMI_TLV_SERVICE_PHYERR = 10, 2053 WMI_TLV_SERVICE_BCN_FILTER = 11, 2054 WMI_TLV_SERVICE_RTT = 12, 2055 WMI_TLV_SERVICE_WOW = 13, 2056 WMI_TLV_SERVICE_RATECTRL_CACHE = 14, 2057 WMI_TLV_SERVICE_IRAM_TIDS = 15, 2058 WMI_TLV_SERVICE_ARPNS_OFFLOAD = 16, 2059 WMI_TLV_SERVICE_NLO = 17, 2060 WMI_TLV_SERVICE_GTK_OFFLOAD = 18, 2061 WMI_TLV_SERVICE_SCAN_SCH = 19, 2062 WMI_TLV_SERVICE_CSA_OFFLOAD = 20, 2063 WMI_TLV_SERVICE_CHATTER = 21, 2064 WMI_TLV_SERVICE_COEX_FREQAVOID = 22, 2065 WMI_TLV_SERVICE_PACKET_POWER_SAVE = 23, 2066 WMI_TLV_SERVICE_FORCE_FW_HANG = 24, 2067 WMI_TLV_SERVICE_GPIO = 25, 2068 WMI_TLV_SERVICE_STA_DTIM_PS_MODULATED_DTIM = 26, 2069 WMI_STA_UAPSD_BASIC_AUTO_TRIG = 27, 2070 WMI_STA_UAPSD_VAR_AUTO_TRIG = 28, 2071 WMI_TLV_SERVICE_STA_KEEP_ALIVE = 29, 2072 WMI_TLV_SERVICE_TX_ENCAP = 30, 2073 WMI_TLV_SERVICE_AP_PS_DETECT_OUT_OF_SYNC = 31, 2074 WMI_TLV_SERVICE_EARLY_RX = 32, 2075 WMI_TLV_SERVICE_STA_SMPS = 33, 2076 WMI_TLV_SERVICE_FWTEST = 34, 2077 WMI_TLV_SERVICE_STA_WMMAC = 35, 2078 WMI_TLV_SERVICE_TDLS = 36, 2079 WMI_TLV_SERVICE_BURST = 37, 2080 WMI_TLV_SERVICE_MCC_BCN_INTERVAL_CHANGE = 38, 2081 WMI_TLV_SERVICE_ADAPTIVE_OCS = 39, 2082 WMI_TLV_SERVICE_BA_SSN_SUPPORT = 40, 2083 WMI_TLV_SERVICE_FILTER_IPSEC_NATKEEPALIVE = 41, 2084 WMI_TLV_SERVICE_WLAN_HB = 42, 2085 WMI_TLV_SERVICE_LTE_ANT_SHARE_SUPPORT = 43, 2086 WMI_TLV_SERVICE_BATCH_SCAN = 44, 2087 WMI_TLV_SERVICE_QPOWER = 45, 2088 WMI_TLV_SERVICE_PLMREQ = 46, 2089 WMI_TLV_SERVICE_THERMAL_MGMT = 47, 2090 WMI_TLV_SERVICE_RMC = 48, 2091 WMI_TLV_SERVICE_MHF_OFFLOAD = 49, 2092 WMI_TLV_SERVICE_COEX_SAR = 50, 2093 WMI_TLV_SERVICE_BCN_TXRATE_OVERRIDE = 51, 2094 WMI_TLV_SERVICE_NAN = 52, 2095 WMI_TLV_SERVICE_L1SS_STAT = 53, 2096 WMI_TLV_SERVICE_ESTIMATE_LINKSPEED = 54, 2097 WMI_TLV_SERVICE_OBSS_SCAN = 55, 2098 WMI_TLV_SERVICE_TDLS_OFFCHAN = 56, 2099 WMI_TLV_SERVICE_TDLS_UAPSD_BUFFER_STA = 57, 2100 WMI_TLV_SERVICE_TDLS_UAPSD_SLEEP_STA = 58, 2101 WMI_TLV_SERVICE_IBSS_PWRSAVE = 59, 2102 WMI_TLV_SERVICE_LPASS = 60, 2103 WMI_TLV_SERVICE_EXTSCAN = 61, 2104 WMI_TLV_SERVICE_D0WOW = 62, 2105 WMI_TLV_SERVICE_HSOFFLOAD = 63, 2106 WMI_TLV_SERVICE_ROAM_HO_OFFLOAD = 64, 2107 WMI_TLV_SERVICE_RX_FULL_REORDER = 65, 2108 WMI_TLV_SERVICE_DHCP_OFFLOAD = 66, 2109 WMI_TLV_SERVICE_STA_RX_IPA_OFFLOAD_SUPPORT = 67, 2110 WMI_TLV_SERVICE_MDNS_OFFLOAD = 68, 2111 WMI_TLV_SERVICE_SAP_AUTH_OFFLOAD = 69, 2112 WMI_TLV_SERVICE_DUAL_BAND_SIMULTANEOUS_SUPPORT = 70, 2113 WMI_TLV_SERVICE_OCB = 71, 2114 WMI_TLV_SERVICE_AP_ARPNS_OFFLOAD = 72, 2115 WMI_TLV_SERVICE_PER_BAND_CHAINMASK_SUPPORT = 73, 2116 WMI_TLV_SERVICE_PACKET_FILTER_OFFLOAD = 74, 2117 WMI_TLV_SERVICE_MGMT_TX_HTT = 75, 2118 WMI_TLV_SERVICE_MGMT_TX_WMI = 76, 2119 WMI_TLV_SERVICE_EXT_MSG = 77, 2120 WMI_TLV_SERVICE_MAWC = 78, 2121 WMI_TLV_SERVICE_PEER_ASSOC_CONF = 79, 2122 WMI_TLV_SERVICE_EGAP = 80, 2123 WMI_TLV_SERVICE_STA_PMF_OFFLOAD = 81, 2124 WMI_TLV_SERVICE_UNIFIED_WOW_CAPABILITY = 82, 2125 WMI_TLV_SERVICE_ENHANCED_PROXY_STA = 83, 2126 WMI_TLV_SERVICE_ATF = 84, 2127 WMI_TLV_SERVICE_COEX_GPIO = 85, 2128 WMI_TLV_SERVICE_AUX_SPECTRAL_INTF = 86, 2129 WMI_TLV_SERVICE_AUX_CHAN_LOAD_INTF = 87, 2130 WMI_TLV_SERVICE_BSS_CHANNEL_INFO_64 = 88, 2131 WMI_TLV_SERVICE_ENTERPRISE_MESH = 89, 2132 WMI_TLV_SERVICE_RESTRT_CHNL_SUPPORT = 90, 2133 WMI_TLV_SERVICE_BPF_OFFLOAD = 91, 2134 WMI_TLV_SERVICE_SYNC_DELETE_CMDS = 92, 2135 WMI_TLV_SERVICE_SMART_ANTENNA_SW_SUPPORT = 93, 2136 WMI_TLV_SERVICE_SMART_ANTENNA_HW_SUPPORT = 94, 2137 WMI_TLV_SERVICE_RATECTRL_LIMIT_MAX_MIN_RATES = 95, 2138 WMI_TLV_SERVICE_NAN_DATA = 96, 2139 WMI_TLV_SERVICE_NAN_RTT = 97, 2140 WMI_TLV_SERVICE_11AX = 98, 2141 WMI_TLV_SERVICE_DEPRECATED_REPLACE = 99, 2142 WMI_TLV_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE = 100, 2143 WMI_TLV_SERVICE_ENHANCED_MCAST_FILTER = 101, 2144 WMI_TLV_SERVICE_PERIODIC_CHAN_STAT_SUPPORT = 102, 2145 WMI_TLV_SERVICE_MESH_11S = 103, 2146 WMI_TLV_SERVICE_HALF_RATE_QUARTER_RATE_SUPPORT = 104, 2147 WMI_TLV_SERVICE_VDEV_RX_FILTER = 105, 2148 WMI_TLV_SERVICE_P2P_LISTEN_OFFLOAD_SUPPORT = 106, 2149 WMI_TLV_SERVICE_MARK_FIRST_WAKEUP_PACKET = 107, 2150 WMI_TLV_SERVICE_MULTIPLE_MCAST_FILTER_SET = 108, 2151 WMI_TLV_SERVICE_HOST_MANAGED_RX_REORDER = 109, 2152 WMI_TLV_SERVICE_FLASH_RDWR_SUPPORT = 110, 2153 WMI_TLV_SERVICE_WLAN_STATS_REPORT = 111, 2154 WMI_TLV_SERVICE_TX_MSDU_ID_NEW_PARTITION_SUPPORT = 112, 2155 WMI_TLV_SERVICE_DFS_PHYERR_OFFLOAD = 113, 2156 WMI_TLV_SERVICE_RCPI_SUPPORT = 114, 2157 WMI_TLV_SERVICE_FW_MEM_DUMP_SUPPORT = 115, 2158 WMI_TLV_SERVICE_PEER_STATS_INFO = 116, 2159 WMI_TLV_SERVICE_REGULATORY_DB = 117, 2160 WMI_TLV_SERVICE_11D_OFFLOAD = 118, 2161 WMI_TLV_SERVICE_HW_DATA_FILTERING = 119, 2162 WMI_TLV_SERVICE_MULTIPLE_VDEV_RESTART = 120, 2163 WMI_TLV_SERVICE_PKT_ROUTING = 121, 2164 WMI_TLV_SERVICE_CHECK_CAL_VERSION = 122, 2165 WMI_TLV_SERVICE_OFFCHAN_TX_WMI = 123, 2166 WMI_TLV_SERVICE_8SS_TX_BFEE = 124, 2167 WMI_TLV_SERVICE_EXTENDED_NSS_SUPPORT = 125, 2168 WMI_TLV_SERVICE_ACK_TIMEOUT = 126, 2169 WMI_TLV_SERVICE_PDEV_BSS_CHANNEL_INFO_64 = 127, 2170 2171 WMI_MAX_SERVICE = 128, 2172 2173 WMI_TLV_SERVICE_CHAN_LOAD_INFO = 128, 2174 WMI_TLV_SERVICE_TX_PPDU_INFO_STATS_SUPPORT = 129, 2175 WMI_TLV_SERVICE_VDEV_LIMIT_OFFCHAN_SUPPORT = 130, 2176 WMI_TLV_SERVICE_FILS_SUPPORT = 131, 2177 WMI_TLV_SERVICE_WLAN_OIC_PING_OFFLOAD = 132, 2178 WMI_TLV_SERVICE_WLAN_DHCP_RENEW = 133, 2179 WMI_TLV_SERVICE_MAWC_SUPPORT = 134, 2180 WMI_TLV_SERVICE_VDEV_LATENCY_CONFIG = 135, 2181 WMI_TLV_SERVICE_PDEV_UPDATE_CTLTABLE_SUPPORT = 136, 2182 WMI_TLV_SERVICE_PKTLOG_SUPPORT_OVER_HTT = 137, 2183 WMI_TLV_SERVICE_VDEV_MULTI_GROUP_KEY_SUPPORT = 138, 2184 WMI_TLV_SERVICE_SCAN_PHYMODE_SUPPORT = 139, 2185 WMI_TLV_SERVICE_THERM_THROT = 140, 2186 WMI_TLV_SERVICE_BCN_OFFLOAD_START_STOP_SUPPORT = 141, 2187 WMI_TLV_SERVICE_WOW_WAKEUP_BY_TIMER_PATTERN = 142, 2188 WMI_TLV_SERVICE_PEER_MAP_UNMAP_V2_SUPPORT = 143, 2189 WMI_TLV_SERVICE_OFFCHAN_DATA_TID_SUPPORT = 144, 2190 WMI_TLV_SERVICE_RX_PROMISC_ENABLE_SUPPORT = 145, 2191 WMI_TLV_SERVICE_SUPPORT_DIRECT_DMA = 146, 2192 WMI_TLV_SERVICE_AP_OBSS_DETECTION_OFFLOAD = 147, 2193 WMI_TLV_SERVICE_11K_NEIGHBOUR_REPORT_SUPPORT = 148, 2194 WMI_TLV_SERVICE_LISTEN_INTERVAL_OFFLOAD_SUPPORT = 149, 2195 WMI_TLV_SERVICE_BSS_COLOR_OFFLOAD = 150, 2196 WMI_TLV_SERVICE_RUNTIME_DPD_RECAL = 151, 2197 WMI_TLV_SERVICE_STA_TWT = 152, 2198 WMI_TLV_SERVICE_AP_TWT = 153, 2199 WMI_TLV_SERVICE_GMAC_OFFLOAD_SUPPORT = 154, 2200 WMI_TLV_SERVICE_SPOOF_MAC_SUPPORT = 155, 2201 WMI_TLV_SERVICE_PEER_TID_CONFIGS_SUPPORT = 156, 2202 WMI_TLV_SERVICE_VDEV_SWRETRY_PER_AC_CONFIG_SUPPORT = 157, 2203 WMI_TLV_SERVICE_DUAL_BEACON_ON_SINGLE_MAC_SCC_SUPPORT = 158, 2204 WMI_TLV_SERVICE_DUAL_BEACON_ON_SINGLE_MAC_MCC_SUPPORT = 159, 2205 WMI_TLV_SERVICE_MOTION_DET = 160, 2206 WMI_TLV_SERVICE_INFRA_MBSSID = 161, 2207 WMI_TLV_SERVICE_OBSS_SPATIAL_REUSE = 162, 2208 WMI_TLV_SERVICE_VDEV_DIFFERENT_BEACON_INTERVAL_SUPPORT = 163, 2209 WMI_TLV_SERVICE_NAN_DBS_SUPPORT = 164, 2210 WMI_TLV_SERVICE_NDI_DBS_SUPPORT = 165, 2211 WMI_TLV_SERVICE_NAN_SAP_SUPPORT = 166, 2212 WMI_TLV_SERVICE_NDI_SAP_SUPPORT = 167, 2213 WMI_TLV_SERVICE_CFR_CAPTURE_SUPPORT = 168, 2214 WMI_TLV_SERVICE_CFR_CAPTURE_IND_MSG_TYPE_1 = 169, 2215 WMI_TLV_SERVICE_ESP_SUPPORT = 170, 2216 WMI_TLV_SERVICE_PEER_CHWIDTH_CHANGE = 171, 2217 WMI_TLV_SERVICE_WLAN_HPCS_PULSE = 172, 2218 WMI_TLV_SERVICE_PER_VDEV_CHAINMASK_CONFIG_SUPPORT = 173, 2219 WMI_TLV_SERVICE_TX_DATA_MGMT_ACK_RSSI = 174, 2220 WMI_TLV_SERVICE_NAN_DISABLE_SUPPORT = 175, 2221 WMI_TLV_SERVICE_HTT_H2T_NO_HTC_HDR_LEN_IN_MSG_LEN = 176, 2222 WMI_TLV_SERVICE_COEX_SUPPORT_UNEQUAL_ISOLATION = 177, 2223 WMI_TLV_SERVICE_HW_DB2DBM_CONVERSION_SUPPORT = 178, 2224 WMI_TLV_SERVICE_SUPPORT_EXTEND_ADDRESS = 179, 2225 WMI_TLV_SERVICE_BEACON_RECEPTION_STATS = 180, 2226 WMI_TLV_SERVICE_FETCH_TX_PN = 181, 2227 WMI_TLV_SERVICE_PEER_UNMAP_RESPONSE_SUPPORT = 182, 2228 WMI_TLV_SERVICE_TX_PER_PEER_AMPDU_SIZE = 183, 2229 WMI_TLV_SERVICE_BSS_COLOR_SWITCH_COUNT = 184, 2230 WMI_TLV_SERVICE_HTT_PEER_STATS_SUPPORT = 185, 2231 WMI_TLV_SERVICE_UL_RU26_ALLOWED = 186, 2232 WMI_TLV_SERVICE_GET_MWS_COEX_STATE = 187, 2233 WMI_TLV_SERVICE_GET_MWS_DPWB_STATE = 188, 2234 WMI_TLV_SERVICE_GET_MWS_TDM_STATE = 189, 2235 WMI_TLV_SERVICE_GET_MWS_IDRX_STATE = 190, 2236 WMI_TLV_SERVICE_GET_MWS_ANTENNA_SHARING_STATE = 191, 2237 WMI_TLV_SERVICE_ENHANCED_TPC_CONFIG_EVENT = 192, 2238 WMI_TLV_SERVICE_WLM_STATS_REQUEST = 193, 2239 WMI_TLV_SERVICE_EXT_PEER_TID_CONFIGS_SUPPORT = 194, 2240 WMI_TLV_SERVICE_WPA3_FT_SAE_SUPPORT = 195, 2241 WMI_TLV_SERVICE_WPA3_FT_SUITE_B_SUPPORT = 196, 2242 WMI_TLV_SERVICE_VOW_ENABLE = 197, 2243 WMI_TLV_SERVICE_CFR_CAPTURE_IND_EVT_TYPE_1 = 198, 2244 WMI_TLV_SERVICE_BROADCAST_TWT = 199, 2245 WMI_TLV_SERVICE_RAP_DETECTION_SUPPORT = 200, 2246 WMI_TLV_SERVICE_PS_TDCC = 201, 2247 WMI_TLV_SERVICE_THREE_WAY_COEX_CONFIG_LEGACY = 202, 2248 WMI_TLV_SERVICE_THREE_WAY_COEX_CONFIG_OVERRIDE = 203, 2249 WMI_TLV_SERVICE_TX_PWR_PER_PEER = 204, 2250 WMI_TLV_SERVICE_STA_PLUS_STA_SUPPORT = 205, 2251 WMI_TLV_SERVICE_WPA3_FT_FILS = 206, 2252 WMI_TLV_SERVICE_ADAPTIVE_11R_ROAM = 207, 2253 WMI_TLV_SERVICE_CHAN_RF_CHARACTERIZATION_INFO = 208, 2254 WMI_TLV_SERVICE_FW_IFACE_COMBINATION_SUPPORT = 209, 2255 WMI_TLV_SERVICE_TX_COMPL_TSF64 = 210, 2256 WMI_TLV_SERVICE_DSM_ROAM_FILTER = 211, 2257 WMI_TLV_SERVICE_PACKET_CAPTURE_SUPPORT = 212, 2258 WMI_TLV_SERVICE_PER_PEER_HTT_STATS_RESET = 213, 2259 WMI_TLV_SERVICE_FREQINFO_IN_METADATA = 219, 2260 WMI_TLV_SERVICE_EXT2_MSG = 220, 2261 WMI_TLV_SERVICE_BEACON_PROTECTION_SUPPORT = 244, 2262 WMI_TLV_SERVICE_SRG_SRP_SPATIAL_REUSE_SUPPORT = 249, 2263 WMI_TLV_SERVICE_MBSS_PARAM_IN_VDEV_START_SUPPORT = 253, 2264 2265 WMI_MAX_EXT_SERVICE = 256, 2266 2267 WMI_TLV_SERVICE_EXT_TPC_REG_SUPPORT = 280, 2268 2269 WMI_TLV_SERVICE_REG_CC_EXT_EVENT_SUPPORT = 281, 2270 2271 WMI_TLV_SERVICE_11BE = 289, 2272 2273 WMI_TLV_SERVICE_WMSK_COMPACTION_RX_TLVS = 361, 2274 2275 WMI_TLV_SERVICE_PEER_METADATA_V1A_V1B_SUPPORT = 365, 2276 WMI_TLV_SERVICE_ETH_OFFLOAD = 461, 2277 2278 WMI_MAX_EXT2_SERVICE, 2279 }; 2280 2281 enum { 2282 WMI_SMPS_FORCED_MODE_NONE = 0, 2283 WMI_SMPS_FORCED_MODE_DISABLED, 2284 WMI_SMPS_FORCED_MODE_STATIC, 2285 WMI_SMPS_FORCED_MODE_DYNAMIC 2286 }; 2287 2288 enum wmi_tpc_chainmask { 2289 WMI_TPC_CHAINMASK_CONFIG_BAND_2G = 0, 2290 WMI_TPC_CHAINMASK_CONFIG_BAND_5G = 1, 2291 WMI_NUM_SUPPORTED_BAND_MAX = 2, 2292 }; 2293 2294 enum wmi_peer_param { 2295 WMI_PEER_MIMO_PS_STATE = 1, 2296 WMI_PEER_AMPDU = 2, 2297 WMI_PEER_AUTHORIZE = 3, 2298 WMI_PEER_CHWIDTH = 4, 2299 WMI_PEER_NSS = 5, 2300 WMI_PEER_USE_4ADDR = 6, 2301 WMI_PEER_MEMBERSHIP = 7, 2302 WMI_PEER_USERPOS = 8, 2303 WMI_PEER_CRIT_PROTO_HINT_ENABLED = 9, 2304 WMI_PEER_TX_FAIL_CNT_THR = 10, 2305 WMI_PEER_SET_HW_RETRY_CTS2S = 11, 2306 WMI_PEER_IBSS_ATIM_WINDOW_LENGTH = 12, 2307 WMI_PEER_PHYMODE = 13, 2308 WMI_PEER_USE_FIXED_PWR = 14, 2309 WMI_PEER_PARAM_FIXED_RATE = 15, 2310 WMI_PEER_SET_MU_WHITELIST = 16, 2311 WMI_PEER_SET_MAX_TX_RATE = 17, 2312 WMI_PEER_SET_MIN_TX_RATE = 18, 2313 WMI_PEER_SET_DEFAULT_ROUTING = 19, 2314 WMI_PEER_CHWIDTH_PUNCTURE_20MHZ_BITMAP = 39, 2315 }; 2316 2317 #define WMI_PEER_PUNCTURE_BITMAP GENMASK(23, 8) 2318 2319 enum wmi_slot_time { 2320 WMI_VDEV_SLOT_TIME_LONG = 1, 2321 WMI_VDEV_SLOT_TIME_SHORT = 2, 2322 }; 2323 2324 enum wmi_preamble { 2325 WMI_VDEV_PREAMBLE_LONG = 1, 2326 WMI_VDEV_PREAMBLE_SHORT = 2, 2327 }; 2328 2329 enum wmi_peer_smps_state { 2330 WMI_PEER_SMPS_PS_NONE = 0, 2331 WMI_PEER_SMPS_STATIC = 1, 2332 WMI_PEER_SMPS_DYNAMIC = 2 2333 }; 2334 2335 enum wmi_peer_chwidth { 2336 WMI_PEER_CHWIDTH_20MHZ = 0, 2337 WMI_PEER_CHWIDTH_40MHZ = 1, 2338 WMI_PEER_CHWIDTH_80MHZ = 2, 2339 WMI_PEER_CHWIDTH_160MHZ = 3, 2340 WMI_PEER_CHWIDTH_320MHZ = 4, 2341 }; 2342 2343 enum wmi_beacon_gen_mode { 2344 WMI_BEACON_STAGGERED_MODE = 0, 2345 WMI_BEACON_BURST_MODE = 1 2346 }; 2347 2348 enum wmi_direct_buffer_module { 2349 WMI_DIRECT_BUF_SPECTRAL = 0, 2350 WMI_DIRECT_BUF_CFR = 1, 2351 2352 /* keep it last */ 2353 WMI_DIRECT_BUF_MAX 2354 }; 2355 2356 /** 2357 * enum wmi_nss_ratio - NSS ratio received from FW during service ready ext event 2358 * @WMI_NSS_RATIO_1BY2_NSS: Max nss of 160MHz is equals to half of the max nss of 80MHz 2359 * @WMI_NSS_RATIO_3BY4_NSS: Max nss of 160MHz is equals to 3/4 of the max nss of 80MHz 2360 * @WMI_NSS_RATIO_1_NSS: Max nss of 160MHz is equals to the max nss of 80MHz 2361 * @WMI_NSS_RATIO_2_NSS: Max nss of 160MHz is equals to two times the max nss of 80MHz 2362 */ 2363 2364 enum wmi_nss_ratio { 2365 WMI_NSS_RATIO_1BY2_NSS, 2366 WMI_NSS_RATIO_3BY4_NSS, 2367 WMI_NSS_RATIO_1_NSS, 2368 WMI_NSS_RATIO_2_NSS 2369 }; 2370 2371 struct ath12k_wmi_pdev_band_arg { 2372 u32 pdev_id; 2373 u32 start_freq; 2374 u32 end_freq; 2375 }; 2376 2377 struct ath12k_wmi_ppe_threshold_arg { 2378 u32 numss_m1; 2379 u32 ru_bit_mask; 2380 u32 ppet16_ppet8_ru3_ru0[WMI_MAX_NUM_SS]; 2381 }; 2382 2383 #define PSOC_HOST_MAX_PHY_SIZE (3) 2384 #define ATH12K_11B_SUPPORT BIT(0) 2385 #define ATH12K_11G_SUPPORT BIT(1) 2386 #define ATH12K_11A_SUPPORT BIT(2) 2387 #define ATH12K_11N_SUPPORT BIT(3) 2388 #define ATH12K_11AC_SUPPORT BIT(4) 2389 #define ATH12K_11AX_SUPPORT BIT(5) 2390 2391 struct ath12k_wmi_hal_reg_capabilities_ext_arg { 2392 u32 phy_id; 2393 u32 eeprom_reg_domain; 2394 u32 eeprom_reg_domain_ext; 2395 u32 regcap1; 2396 u32 regcap2; 2397 u32 wireless_modes; 2398 u32 low_2ghz_chan; 2399 u32 high_2ghz_chan; 2400 u32 low_5ghz_chan; 2401 u32 high_5ghz_chan; 2402 }; 2403 2404 #define WMI_HOST_MAX_PDEV 3 2405 2406 struct ath12k_wmi_host_mem_chunk_params { 2407 __le32 tlv_header; 2408 __le32 req_id; 2409 __le32 ptr; 2410 __le32 size; 2411 } __packed; 2412 2413 struct ath12k_wmi_host_mem_chunk_arg { 2414 void *vaddr; 2415 dma_addr_t paddr; 2416 u32 len; 2417 u32 req_id; 2418 }; 2419 2420 enum ath12k_peer_metadata_version { 2421 ATH12K_PEER_METADATA_V0, 2422 ATH12K_PEER_METADATA_V1, 2423 ATH12K_PEER_METADATA_V1A, 2424 ATH12K_PEER_METADATA_V1B 2425 }; 2426 2427 struct ath12k_wmi_resource_config_arg { 2428 u32 num_vdevs; 2429 u32 num_peers; 2430 u32 num_active_peers; 2431 u32 num_offload_peers; 2432 u32 num_offload_reorder_buffs; 2433 u32 num_peer_keys; 2434 u32 num_tids; 2435 u32 ast_skid_limit; 2436 u32 tx_chain_mask; 2437 u32 rx_chain_mask; 2438 u32 rx_timeout_pri[4]; 2439 u32 rx_decap_mode; 2440 u32 scan_max_pending_req; 2441 u32 bmiss_offload_max_vdev; 2442 u32 roam_offload_max_vdev; 2443 u32 roam_offload_max_ap_profiles; 2444 u32 num_mcast_groups; 2445 u32 num_mcast_table_elems; 2446 u32 mcast2ucast_mode; 2447 u32 tx_dbg_log_size; 2448 u32 num_wds_entries; 2449 u32 dma_burst_size; 2450 u32 mac_aggr_delim; 2451 u32 rx_skip_defrag_timeout_dup_detection_check; 2452 u32 vow_config; 2453 u32 gtk_offload_max_vdev; 2454 u32 num_msdu_desc; 2455 u32 max_frag_entries; 2456 u32 max_peer_ext_stats; 2457 u32 smart_ant_cap; 2458 u32 bk_minfree; 2459 u32 be_minfree; 2460 u32 vi_minfree; 2461 u32 vo_minfree; 2462 u32 rx_batchmode; 2463 u32 tt_support; 2464 u32 atf_config; 2465 u32 iphdr_pad_config; 2466 u32 qwrap_config:16, 2467 alloc_frag_desc_for_data_pkt:16; 2468 u32 num_tdls_vdevs; 2469 u32 num_tdls_conn_table_entries; 2470 u32 beacon_tx_offload_max_vdev; 2471 u32 num_multicast_filter_entries; 2472 u32 num_wow_filters; 2473 u32 num_keep_alive_pattern; 2474 u32 keep_alive_pattern_size; 2475 u32 max_tdls_concurrent_sleep_sta; 2476 u32 max_tdls_concurrent_buffer_sta; 2477 u32 wmi_send_separate; 2478 u32 num_ocb_vdevs; 2479 u32 num_ocb_channels; 2480 u32 num_ocb_schedules; 2481 u32 num_ns_ext_tuples_cfg; 2482 u32 bpf_instruction_size; 2483 u32 max_bssid_rx_filters; 2484 u32 use_pdev_id; 2485 u32 peer_map_unmap_version; 2486 u32 sched_params; 2487 u32 twt_ap_pdev_count; 2488 u32 twt_ap_sta_count; 2489 enum ath12k_peer_metadata_version peer_metadata_ver; 2490 u32 ema_max_vap_cnt; 2491 u32 ema_max_profile_period; 2492 bool is_reg_cc_ext_event_supported; 2493 }; 2494 2495 struct ath12k_wmi_init_cmd_arg { 2496 struct ath12k_wmi_resource_config_arg res_cfg; 2497 u8 num_mem_chunks; 2498 struct ath12k_wmi_host_mem_chunk_arg *mem_chunks; 2499 u32 hw_mode_id; 2500 u32 num_band_to_mac; 2501 struct ath12k_wmi_pdev_band_arg band_to_mac[WMI_HOST_MAX_PDEV]; 2502 }; 2503 2504 struct ath12k_wmi_pdev_band_to_mac_params { 2505 __le32 tlv_header; 2506 __le32 pdev_id; 2507 __le32 start_freq; 2508 __le32 end_freq; 2509 } __packed; 2510 2511 /* This is both individual command WMI_PDEV_SET_HW_MODE_CMDID and also part 2512 * of WMI_TAG_INIT_CMD. 2513 */ 2514 struct ath12k_wmi_pdev_set_hw_mode_cmd { 2515 __le32 tlv_header; 2516 __le32 pdev_id; 2517 __le32 hw_mode_index; 2518 __le32 num_band_to_mac; 2519 } __packed; 2520 2521 struct ath12k_wmi_ppe_threshold_params { 2522 __le32 numss_m1; /** NSS - 1*/ 2523 __le32 ru_info; 2524 __le32 ppet16_ppet8_ru3_ru0[WMI_MAX_NUM_SS]; 2525 } __packed; 2526 2527 #define HW_BD_INFO_SIZE 5 2528 2529 struct ath12k_wmi_abi_version_params { 2530 __le32 abi_version_0; 2531 __le32 abi_version_1; 2532 __le32 abi_version_ns_0; 2533 __le32 abi_version_ns_1; 2534 __le32 abi_version_ns_2; 2535 __le32 abi_version_ns_3; 2536 } __packed; 2537 2538 struct wmi_init_cmd { 2539 __le32 tlv_header; 2540 struct ath12k_wmi_abi_version_params host_abi_vers; 2541 __le32 num_host_mem_chunks; 2542 } __packed; 2543 2544 #define WMI_RSRC_CFG_HOST_SVC_FLAG_REG_CC_EXT_SUPPORT_BIT 4 2545 #define WMI_RSRC_CFG_HOST_SVC_FLAG_REO_QREF_SUPPORT_BIT 12 2546 #define WMI_RSRC_CFG_FLAGS2_RX_PEER_METADATA_VERSION GENMASK(5, 4) 2547 #define WMI_RSRC_CFG_FLAG1_BSS_CHANNEL_INFO_64 BIT(5) 2548 #define WMI_RSRC_CFG_FLAGS2_CALC_NEXT_DTIM_COUNT_SET BIT(9) 2549 #define WMI_RSRC_CFG_FLAG1_ACK_RSSI BIT(18) 2550 2551 struct ath12k_wmi_resource_config_params { 2552 __le32 tlv_header; 2553 __le32 num_vdevs; 2554 __le32 num_peers; 2555 __le32 num_offload_peers; 2556 __le32 num_offload_reorder_buffs; 2557 __le32 num_peer_keys; 2558 __le32 num_tids; 2559 __le32 ast_skid_limit; 2560 __le32 tx_chain_mask; 2561 __le32 rx_chain_mask; 2562 __le32 rx_timeout_pri[4]; 2563 __le32 rx_decap_mode; 2564 __le32 scan_max_pending_req; 2565 __le32 bmiss_offload_max_vdev; 2566 __le32 roam_offload_max_vdev; 2567 __le32 roam_offload_max_ap_profiles; 2568 __le32 num_mcast_groups; 2569 __le32 num_mcast_table_elems; 2570 __le32 mcast2ucast_mode; 2571 __le32 tx_dbg_log_size; 2572 __le32 num_wds_entries; 2573 __le32 dma_burst_size; 2574 __le32 mac_aggr_delim; 2575 __le32 rx_skip_defrag_timeout_dup_detection_check; 2576 __le32 vow_config; 2577 __le32 gtk_offload_max_vdev; 2578 __le32 num_msdu_desc; 2579 __le32 max_frag_entries; 2580 __le32 num_tdls_vdevs; 2581 __le32 num_tdls_conn_table_entries; 2582 __le32 beacon_tx_offload_max_vdev; 2583 __le32 num_multicast_filter_entries; 2584 __le32 num_wow_filters; 2585 __le32 num_keep_alive_pattern; 2586 __le32 keep_alive_pattern_size; 2587 __le32 max_tdls_concurrent_sleep_sta; 2588 __le32 max_tdls_concurrent_buffer_sta; 2589 __le32 wmi_send_separate; 2590 __le32 num_ocb_vdevs; 2591 __le32 num_ocb_channels; 2592 __le32 num_ocb_schedules; 2593 __le32 flag1; 2594 __le32 smart_ant_cap; 2595 __le32 bk_minfree; 2596 __le32 be_minfree; 2597 __le32 vi_minfree; 2598 __le32 vo_minfree; 2599 __le32 alloc_frag_desc_for_data_pkt; 2600 __le32 num_ns_ext_tuples_cfg; 2601 __le32 bpf_instruction_size; 2602 __le32 max_bssid_rx_filters; 2603 __le32 use_pdev_id; 2604 __le32 max_num_dbs_scan_duty_cycle; 2605 __le32 max_num_group_keys; 2606 __le32 peer_map_unmap_version; 2607 __le32 sched_params; 2608 __le32 twt_ap_pdev_count; 2609 __le32 twt_ap_sta_count; 2610 __le32 max_nlo_ssids; 2611 __le32 num_pkt_filters; 2612 __le32 num_max_sta_vdevs; 2613 __le32 max_bssid_indicator; 2614 __le32 ul_resp_config; 2615 __le32 msdu_flow_override_config0; 2616 __le32 msdu_flow_override_config1; 2617 __le32 flags2; 2618 __le32 host_service_flags; 2619 __le32 max_rnr_neighbours; 2620 __le32 ema_max_vap_cnt; 2621 __le32 ema_max_profile_period; 2622 } __packed; 2623 2624 struct wmi_service_ready_event { 2625 __le32 fw_build_vers; 2626 struct ath12k_wmi_abi_version_params fw_abi_vers; 2627 __le32 phy_capability; 2628 __le32 max_frag_entry; 2629 __le32 num_rf_chains; 2630 __le32 ht_cap_info; 2631 __le32 vht_cap_info; 2632 __le32 vht_supp_mcs; 2633 __le32 hw_min_tx_power; 2634 __le32 hw_max_tx_power; 2635 __le32 sys_cap_info; 2636 __le32 min_pkt_size_enable; 2637 __le32 max_bcn_ie_size; 2638 __le32 num_mem_reqs; 2639 __le32 max_num_scan_channels; 2640 __le32 hw_bd_id; 2641 __le32 hw_bd_info[HW_BD_INFO_SIZE]; 2642 __le32 max_supported_macs; 2643 __le32 wmi_fw_sub_feat_caps; 2644 __le32 num_dbs_hw_modes; 2645 /* txrx_chainmask 2646 * [7:0] - 2G band tx chain mask 2647 * [15:8] - 2G band rx chain mask 2648 * [23:16] - 5G band tx chain mask 2649 * [31:24] - 5G band rx chain mask 2650 */ 2651 __le32 txrx_chainmask; 2652 __le32 default_dbs_hw_mode_index; 2653 __le32 num_msdu_desc; 2654 } __packed; 2655 2656 #define WMI_SERVICE_BM_SIZE ((WMI_MAX_SERVICE + sizeof(u32) - 1) / sizeof(u32)) 2657 2658 #define WMI_SERVICE_SEGMENT_BM_SIZE32 4 /* 4x u32 = 128 bits */ 2659 #define WMI_SERVICE_EXT_BM_SIZE (WMI_SERVICE_SEGMENT_BM_SIZE32 * sizeof(u32)) 2660 #define WMI_AVAIL_SERVICE_BITS_IN_SIZE32 32 2661 #define WMI_SERVICE_BITS_IN_SIZE32 4 2662 2663 struct wmi_service_ready_ext_event { 2664 __le32 default_conc_scan_config_bits; 2665 __le32 default_fw_config_bits; 2666 struct ath12k_wmi_ppe_threshold_params ppet; 2667 __le32 he_cap_info; 2668 __le32 mpdu_density; 2669 __le32 max_bssid_rx_filters; 2670 __le32 fw_build_vers_ext; 2671 __le32 max_nlo_ssids; 2672 __le32 max_bssid_indicator; 2673 __le32 he_cap_info_ext; 2674 } __packed; 2675 2676 struct ath12k_wmi_soc_mac_phy_hw_mode_caps_params { 2677 __le32 num_hw_modes; 2678 __le32 num_chainmask_tables; 2679 } __packed; 2680 2681 #define WMI_HW_MODE_CAP_CFG_TYPE GENMASK(27, 0) 2682 2683 struct ath12k_wmi_hw_mode_cap_params { 2684 __le32 tlv_header; 2685 __le32 hw_mode_id; 2686 __le32 phy_id_map; 2687 __le32 hw_mode_config_type; 2688 } __packed; 2689 2690 #define WMI_MAX_HECAP_PHY_SIZE (3) 2691 #define WMI_NSS_RATIO_EN_DIS_BITPOS BIT(0) 2692 #define WMI_NSS_RATIO_EN_DIS_GET(_val) \ 2693 le32_get_bits(_val, WMI_NSS_RATIO_EN_DIS_BITPOS) 2694 #define WMI_NSS_RATIO_INFO_BITPOS GENMASK(4, 1) 2695 #define WMI_NSS_RATIO_INFO_GET(_val) \ 2696 le32_get_bits(_val, WMI_NSS_RATIO_INFO_BITPOS) 2697 2698 /* pdev_id is present in lower 16 bits of pdev_and_hw_link_ids in 2699 * ath12k_wmi_mac_phy_caps_params & ath12k_wmi_caps_ext_params. 2700 * 2701 * hw_link_id is present in higher 16 bits of pdev_and_hw_link_ids. 2702 */ 2703 #define WMI_CAPS_PARAMS_PDEV_ID GENMASK(15, 0) 2704 #define WMI_CAPS_PARAMS_HW_LINK_ID GENMASK(31, 16) 2705 2706 struct ath12k_wmi_mac_phy_caps_params { 2707 __le32 hw_mode_id; 2708 __le32 pdev_and_hw_link_ids; 2709 __le32 phy_id; 2710 __le32 supported_flags; 2711 __le32 supported_bands; 2712 __le32 ampdu_density; 2713 __le32 max_bw_supported_2g; 2714 __le32 ht_cap_info_2g; 2715 __le32 vht_cap_info_2g; 2716 __le32 vht_supp_mcs_2g; 2717 __le32 he_cap_info_2g; 2718 __le32 he_supp_mcs_2g; 2719 __le32 tx_chain_mask_2g; 2720 __le32 rx_chain_mask_2g; 2721 __le32 max_bw_supported_5g; 2722 __le32 ht_cap_info_5g; 2723 __le32 vht_cap_info_5g; 2724 __le32 vht_supp_mcs_5g; 2725 __le32 he_cap_info_5g; 2726 __le32 he_supp_mcs_5g; 2727 __le32 tx_chain_mask_5g; 2728 __le32 rx_chain_mask_5g; 2729 __le32 he_cap_phy_info_2g[WMI_MAX_HECAP_PHY_SIZE]; 2730 __le32 he_cap_phy_info_5g[WMI_MAX_HECAP_PHY_SIZE]; 2731 struct ath12k_wmi_ppe_threshold_params he_ppet2g; 2732 struct ath12k_wmi_ppe_threshold_params he_ppet5g; 2733 __le32 chainmask_table_id; 2734 __le32 lmac_id; 2735 __le32 he_cap_info_2g_ext; 2736 __le32 he_cap_info_5g_ext; 2737 __le32 he_cap_info_internal; 2738 __le32 wireless_modes; 2739 __le32 low_2ghz_chan_freq; 2740 __le32 high_2ghz_chan_freq; 2741 __le32 low_5ghz_chan_freq; 2742 __le32 high_5ghz_chan_freq; 2743 __le32 nss_ratio; 2744 } __packed; 2745 2746 struct ath12k_wmi_hal_reg_caps_ext_params { 2747 __le32 tlv_header; 2748 __le32 phy_id; 2749 __le32 eeprom_reg_domain; 2750 __le32 eeprom_reg_domain_ext; 2751 __le32 regcap1; 2752 __le32 regcap2; 2753 __le32 wireless_modes; 2754 __le32 low_2ghz_chan; 2755 __le32 high_2ghz_chan; 2756 __le32 low_5ghz_chan; 2757 __le32 high_5ghz_chan; 2758 } __packed; 2759 2760 struct ath12k_wmi_soc_hal_reg_caps_params { 2761 __le32 num_phy; 2762 } __packed; 2763 2764 enum wmi_channel_width { 2765 WMI_CHAN_WIDTH_20 = 0, 2766 WMI_CHAN_WIDTH_40 = 1, 2767 WMI_CHAN_WIDTH_80 = 2, 2768 WMI_CHAN_WIDTH_160 = 3, 2769 WMI_CHAN_WIDTH_80P80 = 4, 2770 WMI_CHAN_WIDTH_5 = 5, 2771 WMI_CHAN_WIDTH_10 = 6, 2772 WMI_CHAN_WIDTH_165 = 7, 2773 WMI_CHAN_WIDTH_160P160 = 8, 2774 WMI_CHAN_WIDTH_320 = 9, 2775 }; 2776 2777 #define WMI_MAX_EHTCAP_MAC_SIZE 2 2778 #define WMI_MAX_EHTCAP_PHY_SIZE 3 2779 #define WMI_MAX_EHTCAP_RATE_SET 3 2780 2781 /* Used for EHT MCS-NSS array. Data at each array index follows the format given 2782 * in IEEE P802.11be/D2.0, May 20229.4.2.313.4. 2783 * 2784 * Index interpretation: 2785 * 0 - 20 MHz only sta, all 4 bytes valid 2786 * 1 - index for bandwidths <= 80 MHz except 20 MHz-only, first 3 bytes valid 2787 * 2 - index for 160 MHz, first 3 bytes valid 2788 * 3 - index for 320 MHz, first 3 bytes valid 2789 */ 2790 #define WMI_MAX_EHT_SUPP_MCS_2GHZ_SIZE 2 2791 #define WMI_MAX_EHT_SUPP_MCS_5GHZ_SIZE 4 2792 2793 #define WMI_EHTCAP_TXRX_MCS_NSS_IDX_80 0 2794 #define WMI_EHTCAP_TXRX_MCS_NSS_IDX_160 1 2795 #define WMI_EHTCAP_TXRX_MCS_NSS_IDX_320 2 2796 2797 #define WMI_EHT_MCS_NSS_0_7 GENMASK(3, 0) 2798 #define WMI_EHT_MCS_NSS_8_9 GENMASK(7, 4) 2799 #define WMI_EHT_MCS_NSS_10_11 GENMASK(11, 8) 2800 #define WMI_EHT_MCS_NSS_12_13 GENMASK(15, 12) 2801 2802 #define WMI_TARGET_CAP_FLAGS_RX_PEER_METADATA_VERSION GENMASK(1, 0) 2803 2804 struct wmi_service_ready_ext2_event { 2805 __le32 reg_db_version; 2806 __le32 hw_min_max_tx_power_2ghz; 2807 __le32 hw_min_max_tx_power_5ghz; 2808 __le32 chwidth_num_peer_caps; 2809 __le32 preamble_puncture_bw; 2810 __le32 max_user_per_ppdu_ofdma; 2811 __le32 max_user_per_ppdu_mumimo; 2812 __le32 target_cap_flags; 2813 __le32 eht_cap_mac_info[WMI_MAX_EHTCAP_MAC_SIZE]; 2814 __le32 max_num_linkview_peers; 2815 __le32 max_num_msduq_supported_per_tid; 2816 __le32 default_num_msduq_supported_per_tid; 2817 } __packed; 2818 2819 struct ath12k_wmi_dbs_or_sbs_cap_params { 2820 __le32 hw_mode_id; 2821 __le32 sbs_lower_band_end_freq; 2822 } __packed; 2823 2824 struct ath12k_wmi_caps_ext_params { 2825 __le32 hw_mode_id; 2826 __le32 pdev_and_hw_link_ids; 2827 __le32 phy_id; 2828 __le32 wireless_modes_ext; 2829 __le32 eht_cap_mac_info_2ghz[WMI_MAX_EHTCAP_MAC_SIZE]; 2830 __le32 eht_cap_mac_info_5ghz[WMI_MAX_EHTCAP_MAC_SIZE]; 2831 __le32 rsvd0[2]; 2832 __le32 eht_cap_phy_info_2ghz[WMI_MAX_EHTCAP_PHY_SIZE]; 2833 __le32 eht_cap_phy_info_5ghz[WMI_MAX_EHTCAP_PHY_SIZE]; 2834 struct ath12k_wmi_ppe_threshold_params eht_ppet_2ghz; 2835 struct ath12k_wmi_ppe_threshold_params eht_ppet_5ghz; 2836 __le32 eht_cap_info_internal; 2837 __le32 eht_supp_mcs_ext_2ghz[WMI_MAX_EHT_SUPP_MCS_2GHZ_SIZE]; 2838 __le32 eht_supp_mcs_ext_5ghz[WMI_MAX_EHT_SUPP_MCS_5GHZ_SIZE]; 2839 __le32 eml_capability; 2840 __le32 mld_capability; 2841 } __packed; 2842 2843 /* 2 word representation of MAC addr */ 2844 struct ath12k_wmi_mac_addr_params { 2845 u8 addr[ETH_ALEN]; 2846 u8 padding[2]; 2847 } __packed; 2848 2849 struct ath12k_wmi_dma_ring_caps_params { 2850 __le32 tlv_header; 2851 __le32 pdev_id; 2852 __le32 module_id; 2853 __le32 min_elem; 2854 __le32 min_buf_sz; 2855 __le32 min_buf_align; 2856 } __packed; 2857 2858 struct ath12k_wmi_ready_event_min_params { 2859 struct ath12k_wmi_abi_version_params fw_abi_vers; 2860 struct ath12k_wmi_mac_addr_params mac_addr; 2861 __le32 status; 2862 __le32 num_dscp_table; 2863 __le32 num_extra_mac_addr; 2864 __le32 num_total_peers; 2865 __le32 num_extra_peers; 2866 } __packed; 2867 2868 struct wmi_ready_event { 2869 struct ath12k_wmi_ready_event_min_params ready_event_min; 2870 __le32 max_ast_index; 2871 __le32 pktlog_defs_checksum; 2872 } __packed; 2873 2874 struct wmi_service_available_event { 2875 __le32 wmi_service_segment_offset; 2876 __le32 wmi_service_segment_bitmap[WMI_SERVICE_SEGMENT_BM_SIZE32]; 2877 } __packed; 2878 2879 struct ath12k_wmi_vdev_create_arg { 2880 u8 if_id; 2881 u32 type; 2882 u32 subtype; 2883 struct { 2884 u8 tx; 2885 u8 rx; 2886 } chains[NUM_NL80211_BANDS]; 2887 u32 pdev_id; 2888 u8 if_stats_id; 2889 u32 mbssid_flags; 2890 u32 mbssid_tx_vdev_id; 2891 u8 mld_addr[ETH_ALEN]; 2892 }; 2893 2894 #define ATH12K_MAX_VDEV_STATS_ID 0x30 2895 #define ATH12K_INVAL_VDEV_STATS_ID 0xFF 2896 2897 struct wmi_vdev_create_cmd { 2898 __le32 tlv_header; 2899 __le32 vdev_id; 2900 __le32 vdev_type; 2901 __le32 vdev_subtype; 2902 struct ath12k_wmi_mac_addr_params vdev_macaddr; 2903 __le32 num_cfg_txrx_streams; 2904 __le32 pdev_id; 2905 __le32 mbssid_flags; 2906 __le32 mbssid_tx_vdev_id; 2907 __le32 vdev_stats_id_valid; 2908 __le32 vdev_stats_id; 2909 } __packed; 2910 2911 struct ath12k_wmi_vdev_txrx_streams_params { 2912 __le32 tlv_header; 2913 __le32 band; 2914 __le32 supported_tx_streams; 2915 __le32 supported_rx_streams; 2916 } __packed; 2917 2918 struct wmi_vdev_create_mlo_params { 2919 __le32 tlv_header; 2920 struct ath12k_wmi_mac_addr_params mld_macaddr; 2921 } __packed; 2922 2923 #define ATH12K_WMI_FLAG_MLO_ENABLED BIT(0) 2924 #define ATH12K_WMI_FLAG_MLO_ASSOC_LINK BIT(1) 2925 #define ATH12K_WMI_FLAG_MLO_PRIMARY_UMAC BIT(2) 2926 #define ATH12K_WMI_FLAG_MLO_LOGICAL_LINK_IDX_VALID BIT(3) 2927 #define ATH12K_WMI_FLAG_MLO_PEER_ID_VALID BIT(4) 2928 #define ATH12K_WMI_FLAG_MLO_MCAST_VDEV BIT(5) 2929 #define ATH12K_WMI_FLAG_MLO_EMLSR_SUPPORT BIT(6) 2930 #define ATH12K_WMI_FLAG_MLO_FORCED_INACTIVE BIT(7) 2931 #define ATH12K_WMI_FLAG_MLO_LINK_ADD BIT(8) 2932 2933 struct wmi_vdev_start_mlo_params { 2934 __le32 tlv_header; 2935 __le32 flags; 2936 } __packed; 2937 2938 struct wmi_partner_link_info { 2939 __le32 tlv_header; 2940 __le32 vdev_id; 2941 __le32 hw_link_id; 2942 struct ath12k_wmi_mac_addr_params vdev_addr; 2943 } __packed; 2944 2945 struct wmi_vdev_delete_cmd { 2946 __le32 tlv_header; 2947 __le32 vdev_id; 2948 } __packed; 2949 2950 struct ath12k_wmi_vdev_up_params { 2951 u32 vdev_id; 2952 u32 aid; 2953 const u8 *bssid; 2954 const u8 *tx_bssid; 2955 u32 nontx_profile_idx; 2956 u32 nontx_profile_cnt; 2957 }; 2958 2959 struct wmi_vdev_up_cmd { 2960 __le32 tlv_header; 2961 __le32 vdev_id; 2962 __le32 vdev_assoc_id; 2963 struct ath12k_wmi_mac_addr_params vdev_bssid; 2964 struct ath12k_wmi_mac_addr_params tx_vdev_bssid; 2965 __le32 nontx_profile_idx; 2966 __le32 nontx_profile_cnt; 2967 } __packed; 2968 2969 struct wmi_vdev_stop_cmd { 2970 __le32 tlv_header; 2971 __le32 vdev_id; 2972 } __packed; 2973 2974 struct wmi_vdev_down_cmd { 2975 __le32 tlv_header; 2976 __le32 vdev_id; 2977 } __packed; 2978 2979 #define WMI_VDEV_START_HIDDEN_SSID BIT(0) 2980 #define WMI_VDEV_START_PMF_ENABLED BIT(1) 2981 #define WMI_VDEV_START_LDPC_RX_ENABLED BIT(3) 2982 2983 #define ATH12K_WMI_SSID_LEN 32 2984 2985 struct ath12k_wmi_ssid_params { 2986 __le32 ssid_len; 2987 u8 ssid[ATH12K_WMI_SSID_LEN]; 2988 } __packed; 2989 2990 #define ATH12K_VDEV_SETUP_TIMEOUT_HZ (5 * HZ) 2991 2992 enum wmi_vdev_mbssid_flags { 2993 WMI_VDEV_MBSSID_FLAGS_NON_MBSSID_AP = BIT(0), 2994 WMI_VDEV_MBSSID_FLAGS_TRANSMIT_AP = BIT(1), 2995 WMI_VDEV_MBSSID_FLAGS_NON_TRANSMIT_AP = BIT(2), 2996 WMI_VDEV_MBSSID_FLAGS_EMA_MODE = BIT(3), 2997 WMI_VDEV_MBSSID_FLAGS_SCAN_MODE_VAP = BIT(4), 2998 }; 2999 3000 struct wmi_vdev_start_request_cmd { 3001 __le32 tlv_header; 3002 __le32 vdev_id; 3003 __le32 requestor_id; 3004 __le32 beacon_interval; 3005 __le32 dtim_period; 3006 __le32 flags; 3007 struct ath12k_wmi_ssid_params ssid; 3008 __le32 bcn_tx_rate; 3009 __le32 bcn_txpower; 3010 __le32 num_noa_descriptors; 3011 __le32 disable_hw_ack; 3012 __le32 preferred_tx_streams; 3013 __le32 preferred_rx_streams; 3014 __le32 he_ops; 3015 __le32 cac_duration_ms; 3016 __le32 regdomain; 3017 __le32 min_data_rate; 3018 __le32 mbssid_flags; /* uses enum wmi_vdev_mbssid_flags */ 3019 __le32 mbssid_tx_vdev_id; 3020 __le32 eht_ops; 3021 __le32 punct_bitmap; 3022 } __packed; 3023 3024 #define MGMT_TX_DL_FRM_LEN 64 3025 3026 struct ath12k_wmi_channel_arg { 3027 u8 chan_id; 3028 u8 pwr; 3029 u32 mhz; 3030 u32 half_rate:1, 3031 quarter_rate:1, 3032 dfs_set:1, 3033 dfs_set_cfreq2:1, 3034 is_chan_passive:1, 3035 allow_ht:1, 3036 allow_vht:1, 3037 allow_he:1, 3038 set_agile:1, 3039 psc_channel:1; 3040 u32 phy_mode; 3041 u32 cfreq1; 3042 u32 cfreq2; 3043 char maxpower; 3044 char minpower; 3045 char maxregpower; 3046 u8 antennamax; 3047 u8 reg_class_id; 3048 }; 3049 3050 enum wmi_phy_mode { 3051 MODE_11A = 0, 3052 MODE_11G = 1, /* 11b/g Mode */ 3053 MODE_11B = 2, /* 11b Mode */ 3054 MODE_11GONLY = 3, /* 11g only Mode */ 3055 MODE_11NA_HT20 = 4, 3056 MODE_11NG_HT20 = 5, 3057 MODE_11NA_HT40 = 6, 3058 MODE_11NG_HT40 = 7, 3059 MODE_11AC_VHT20 = 8, 3060 MODE_11AC_VHT40 = 9, 3061 MODE_11AC_VHT80 = 10, 3062 MODE_11AC_VHT20_2G = 11, 3063 MODE_11AC_VHT40_2G = 12, 3064 MODE_11AC_VHT80_2G = 13, 3065 MODE_11AC_VHT80_80 = 14, 3066 MODE_11AC_VHT160 = 15, 3067 MODE_11AX_HE20 = 16, 3068 MODE_11AX_HE40 = 17, 3069 MODE_11AX_HE80 = 18, 3070 MODE_11AX_HE80_80 = 19, 3071 MODE_11AX_HE160 = 20, 3072 MODE_11AX_HE20_2G = 21, 3073 MODE_11AX_HE40_2G = 22, 3074 MODE_11AX_HE80_2G = 23, 3075 MODE_11BE_EHT20 = 24, 3076 MODE_11BE_EHT40 = 25, 3077 MODE_11BE_EHT80 = 26, 3078 MODE_11BE_EHT80_80 = 27, 3079 MODE_11BE_EHT160 = 28, 3080 MODE_11BE_EHT160_160 = 29, 3081 MODE_11BE_EHT320 = 30, 3082 MODE_11BE_EHT20_2G = 31, 3083 MODE_11BE_EHT40_2G = 32, 3084 MODE_UNKNOWN = 33, 3085 MODE_MAX = 33, 3086 }; 3087 3088 #define ATH12K_WMI_MLO_MAX_LINKS 4 3089 3090 struct wmi_ml_partner_info { 3091 u32 vdev_id; 3092 u32 hw_link_id; 3093 u8 addr[ETH_ALEN]; 3094 bool assoc_link; 3095 bool primary_umac; 3096 bool logical_link_idx_valid; 3097 u32 logical_link_idx; 3098 }; 3099 3100 struct wmi_ml_arg { 3101 bool enabled; 3102 bool assoc_link; 3103 bool mcast_link; 3104 bool link_add; 3105 u8 num_partner_links; 3106 struct wmi_ml_partner_info partner_info[ATH12K_WMI_MLO_MAX_LINKS]; 3107 }; 3108 3109 struct wmi_vdev_start_req_arg { 3110 u32 vdev_id; 3111 u32 freq; 3112 u32 band_center_freq1; 3113 u32 band_center_freq2; 3114 bool passive; 3115 bool allow_ibss; 3116 bool allow_ht; 3117 bool allow_vht; 3118 bool ht40plus; 3119 bool chan_radar; 3120 bool freq2_radar; 3121 bool allow_he; 3122 u32 min_power; 3123 u32 max_power; 3124 u32 max_reg_power; 3125 u32 max_antenna_gain; 3126 enum wmi_phy_mode mode; 3127 u32 bcn_intval; 3128 u32 dtim_period; 3129 u8 *ssid; 3130 u32 ssid_len; 3131 u32 bcn_tx_rate; 3132 u32 bcn_tx_power; 3133 bool disable_hw_ack; 3134 bool hidden_ssid; 3135 bool pmf_enabled; 3136 u32 he_ops; 3137 u32 cac_duration_ms; 3138 u32 regdomain; 3139 u32 pref_rx_streams; 3140 u32 pref_tx_streams; 3141 u32 num_noa_descriptors; 3142 u32 min_data_rate; 3143 u32 mbssid_flags; 3144 u32 mbssid_tx_vdev_id; 3145 u32 punct_bitmap; 3146 struct wmi_ml_arg ml; 3147 }; 3148 3149 struct ath12k_wmi_peer_create_arg { 3150 const u8 *peer_addr; 3151 u32 peer_type; 3152 u32 vdev_id; 3153 bool ml_enabled; 3154 }; 3155 3156 struct wmi_peer_create_mlo_params { 3157 __le32 tlv_header; 3158 __le32 flags; 3159 }; 3160 3161 struct ath12k_wmi_pdev_set_regdomain_arg { 3162 u16 current_rd_in_use; 3163 u16 current_rd_2g; 3164 u16 current_rd_5g; 3165 u32 ctl_2g; 3166 u32 ctl_5g; 3167 u8 dfs_domain; 3168 u32 pdev_id; 3169 }; 3170 3171 struct ath12k_wmi_rx_reorder_queue_remove_arg { 3172 u8 *peer_macaddr; 3173 u16 vdev_id; 3174 u32 peer_tid_bitmap; 3175 }; 3176 3177 #define WMI_HOST_PDEV_ID_SOC 0xFF 3178 #define WMI_HOST_PDEV_ID_0 0 3179 #define WMI_HOST_PDEV_ID_1 1 3180 #define WMI_HOST_PDEV_ID_2 2 3181 3182 #define WMI_PDEV_ID_SOC 0 3183 #define WMI_PDEV_ID_1ST 1 3184 #define WMI_PDEV_ID_2ND 2 3185 #define WMI_PDEV_ID_3RD 3 3186 3187 /* Freq units in MHz */ 3188 #define REG_RULE_START_FREQ 0x0000ffff 3189 #define REG_RULE_END_FREQ 0xffff0000 3190 #define REG_RULE_FLAGS 0x0000ffff 3191 #define REG_RULE_MAX_BW 0x0000ffff 3192 #define REG_RULE_REG_PWR 0x00ff0000 3193 #define REG_RULE_ANT_GAIN 0xff000000 3194 #define REG_RULE_PSD_INFO BIT(2) 3195 #define REG_RULE_PSD_EIRP 0xffff0000 3196 3197 #define WMI_VDEV_PARAM_TXBF_SU_TX_BFEE BIT(0) 3198 #define WMI_VDEV_PARAM_TXBF_MU_TX_BFEE BIT(1) 3199 #define WMI_VDEV_PARAM_TXBF_SU_TX_BFER BIT(2) 3200 #define WMI_VDEV_PARAM_TXBF_MU_TX_BFER BIT(3) 3201 3202 #define HE_MODE_SU_TX_BFEE BIT(0) 3203 #define HE_MODE_SU_TX_BFER BIT(1) 3204 #define HE_MODE_MU_TX_BFEE BIT(2) 3205 #define HE_MODE_MU_TX_BFER BIT(3) 3206 #define HE_MODE_DL_OFDMA BIT(4) 3207 #define HE_MODE_UL_OFDMA BIT(5) 3208 #define HE_MODE_UL_MUMIMO BIT(6) 3209 3210 #define HE_DL_MUOFDMA_ENABLE 1 3211 #define HE_UL_MUOFDMA_ENABLE 1 3212 #define HE_DL_MUMIMO_ENABLE 1 3213 #define HE_UL_MUMIMO_ENABLE 1 3214 #define HE_MU_BFEE_ENABLE 1 3215 #define HE_SU_BFEE_ENABLE 1 3216 #define HE_MU_BFER_ENABLE 1 3217 #define HE_SU_BFER_ENABLE 1 3218 3219 #define EHT_MODE_SU_TX_BFEE BIT(0) 3220 #define EHT_MODE_SU_TX_BFER BIT(1) 3221 #define EHT_MODE_MU_TX_BFEE BIT(2) 3222 #define EHT_MODE_MU_TX_BFER BIT(3) 3223 #define EHT_MODE_DL_OFDMA BIT(4) 3224 #define EHT_MODE_UL_OFDMA BIT(5) 3225 #define EHT_MODE_MUMIMO BIT(6) 3226 #define EHT_MODE_DL_OFDMA_TXBF BIT(7) 3227 #define EHT_MODE_DL_OFDMA_MUMIMO BIT(8) 3228 #define EHT_MODE_UL_OFDMA_MUMIMO BIT(9) 3229 3230 #define EHT_DL_MUOFDMA_ENABLE 1 3231 #define EHT_UL_MUOFDMA_ENABLE 1 3232 #define EHT_DL_MUMIMO_ENABLE 1 3233 #define EHT_UL_MUMIMO_ENABLE 1 3234 #define EHT_MU_BFEE_ENABLE 1 3235 #define EHT_SU_BFEE_ENABLE 1 3236 #define EHT_MU_BFER_ENABLE 1 3237 #define EHT_SU_BFER_ENABLE 1 3238 3239 #define HE_VHT_SOUNDING_MODE_ENABLE 1 3240 #define HE_SU_MU_SOUNDING_MODE_ENABLE 1 3241 #define HE_TRIG_NONTRIG_SOUNDING_MODE_ENABLE 1 3242 3243 /* HE or VHT Sounding */ 3244 #define HE_VHT_SOUNDING_MODE BIT(0) 3245 /* SU or MU Sounding */ 3246 #define HE_SU_MU_SOUNDING_MODE BIT(2) 3247 /* Trig or Non-Trig Sounding */ 3248 #define HE_TRIG_NONTRIG_SOUNDING_MODE BIT(3) 3249 3250 #define WMI_TXBF_STS_CAP_OFFSET_LSB 4 3251 #define WMI_TXBF_STS_CAP_OFFSET_MASK 0x70 3252 #define WMI_BF_SOUND_DIM_OFFSET_LSB 8 3253 #define WMI_BF_SOUND_DIM_OFFSET_MASK 0x700 3254 3255 enum wmi_peer_type { 3256 WMI_PEER_TYPE_DEFAULT = 0, 3257 WMI_PEER_TYPE_BSS = 1, 3258 WMI_PEER_TYPE_TDLS = 2, 3259 }; 3260 3261 struct wmi_peer_create_cmd { 3262 __le32 tlv_header; 3263 __le32 vdev_id; 3264 struct ath12k_wmi_mac_addr_params peer_macaddr; 3265 __le32 peer_type; 3266 } __packed; 3267 3268 struct wmi_peer_delete_cmd { 3269 __le32 tlv_header; 3270 __le32 vdev_id; 3271 struct ath12k_wmi_mac_addr_params peer_macaddr; 3272 } __packed; 3273 3274 struct wmi_peer_reorder_queue_setup_cmd { 3275 __le32 tlv_header; 3276 __le32 vdev_id; 3277 struct ath12k_wmi_mac_addr_params peer_macaddr; 3278 __le32 tid; 3279 __le32 queue_ptr_lo; 3280 __le32 queue_ptr_hi; 3281 __le32 queue_no; 3282 __le32 ba_window_size_valid; 3283 __le32 ba_window_size; 3284 } __packed; 3285 3286 struct wmi_peer_reorder_queue_remove_cmd { 3287 __le32 tlv_header; 3288 __le32 vdev_id; 3289 struct ath12k_wmi_mac_addr_params peer_macaddr; 3290 __le32 tid_mask; 3291 } __packed; 3292 3293 enum wmi_bss_chan_info_req_type { 3294 WMI_BSS_SURVEY_REQ_TYPE_READ = 1, 3295 WMI_BSS_SURVEY_REQ_TYPE_READ_CLEAR, 3296 }; 3297 3298 struct wmi_pdev_set_param_cmd { 3299 __le32 tlv_header; 3300 __le32 pdev_id; 3301 __le32 param_id; 3302 __le32 param_value; 3303 } __packed; 3304 3305 struct wmi_pdev_set_ps_mode_cmd { 3306 __le32 tlv_header; 3307 __le32 vdev_id; 3308 __le32 sta_ps_mode; 3309 } __packed; 3310 3311 struct wmi_pdev_suspend_cmd { 3312 __le32 tlv_header; 3313 __le32 pdev_id; 3314 __le32 suspend_opt; 3315 } __packed; 3316 3317 struct wmi_pdev_resume_cmd { 3318 __le32 tlv_header; 3319 __le32 pdev_id; 3320 } __packed; 3321 3322 struct wmi_pdev_bss_chan_info_req_cmd { 3323 __le32 tlv_header; 3324 /* ref wmi_bss_chan_info_req_type */ 3325 __le32 req_type; 3326 __le32 pdev_id; 3327 } __packed; 3328 3329 struct wmi_ap_ps_peer_cmd { 3330 __le32 tlv_header; 3331 __le32 vdev_id; 3332 struct ath12k_wmi_mac_addr_params peer_macaddr; 3333 __le32 param; 3334 __le32 value; 3335 } __packed; 3336 3337 struct wmi_sta_powersave_param_cmd { 3338 __le32 tlv_header; 3339 __le32 vdev_id; 3340 __le32 param; 3341 __le32 value; 3342 } __packed; 3343 3344 struct wmi_pdev_set_regdomain_cmd { 3345 __le32 tlv_header; 3346 __le32 pdev_id; 3347 __le32 reg_domain; 3348 __le32 reg_domain_2g; 3349 __le32 reg_domain_5g; 3350 __le32 conformance_test_limit_2g; 3351 __le32 conformance_test_limit_5g; 3352 __le32 dfs_domain; 3353 } __packed; 3354 3355 struct wmi_peer_set_param_cmd { 3356 __le32 tlv_header; 3357 __le32 vdev_id; 3358 struct ath12k_wmi_mac_addr_params peer_macaddr; 3359 __le32 param_id; 3360 __le32 param_value; 3361 } __packed; 3362 3363 struct wmi_peer_flush_tids_cmd { 3364 __le32 tlv_header; 3365 __le32 vdev_id; 3366 struct ath12k_wmi_mac_addr_params peer_macaddr; 3367 __le32 peer_tid_bitmap; 3368 } __packed; 3369 3370 struct wmi_dfs_phyerr_offload_cmd { 3371 __le32 tlv_header; 3372 __le32 pdev_id; 3373 } __packed; 3374 3375 struct wmi_bcn_offload_ctrl_cmd { 3376 __le32 tlv_header; 3377 __le32 vdev_id; 3378 __le32 bcn_ctrl_op; 3379 } __packed; 3380 3381 enum scan_dwelltime_adaptive_mode { 3382 SCAN_DWELL_MODE_DEFAULT = 0, 3383 SCAN_DWELL_MODE_CONSERVATIVE = 1, 3384 SCAN_DWELL_MODE_MODERATE = 2, 3385 SCAN_DWELL_MODE_AGGRESSIVE = 3, 3386 SCAN_DWELL_MODE_STATIC = 4 3387 }; 3388 3389 #define WLAN_SCAN_MAX_NUM_SSID 10 3390 #define WLAN_SCAN_MAX_NUM_BSSID 10 3391 3392 struct ath12k_wmi_element_info_arg { 3393 u32 len; 3394 u8 *ptr; 3395 }; 3396 3397 #define WMI_IE_BITMAP_SIZE 8 3398 3399 #define WMI_SCAN_MAX_NUM_SSID 0x0A 3400 /* prefix used by scan requestor ids on the host */ 3401 #define WMI_HOST_SCAN_REQUESTOR_ID_PREFIX 0xA000 3402 3403 /* prefix used by scan request ids generated on the host */ 3404 /* host cycles through the lower 12 bits to generate ids */ 3405 #define WMI_HOST_SCAN_REQ_ID_PREFIX 0xA000 3406 3407 #define WLAN_SCAN_PARAMS_MAX_SSID 16 3408 #define WLAN_SCAN_PARAMS_MAX_BSSID 4 3409 #define WLAN_SCAN_PARAMS_MAX_IE_LEN 512 3410 3411 /* Values lower than this may be refused by some firmware revisions with a scan 3412 * completion with a timedout reason. 3413 */ 3414 #define WMI_SCAN_CHAN_MIN_TIME_MSEC 40 3415 3416 /* Scan priority numbers must be sequential, starting with 0 */ 3417 enum wmi_scan_priority { 3418 WMI_SCAN_PRIORITY_VERY_LOW = 0, 3419 WMI_SCAN_PRIORITY_LOW, 3420 WMI_SCAN_PRIORITY_MEDIUM, 3421 WMI_SCAN_PRIORITY_HIGH, 3422 WMI_SCAN_PRIORITY_VERY_HIGH, 3423 WMI_SCAN_PRIORITY_COUNT /* number of priorities supported */ 3424 }; 3425 3426 enum wmi_scan_event_type { 3427 WMI_SCAN_EVENT_STARTED = BIT(0), 3428 WMI_SCAN_EVENT_COMPLETED = BIT(1), 3429 WMI_SCAN_EVENT_BSS_CHANNEL = BIT(2), 3430 WMI_SCAN_EVENT_FOREIGN_CHAN = BIT(3), 3431 WMI_SCAN_EVENT_DEQUEUED = BIT(4), 3432 /* possibly by high-prio scan */ 3433 WMI_SCAN_EVENT_PREEMPTED = BIT(5), 3434 WMI_SCAN_EVENT_START_FAILED = BIT(6), 3435 WMI_SCAN_EVENT_RESTARTED = BIT(7), 3436 WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT = BIT(8), 3437 WMI_SCAN_EVENT_SUSPENDED = BIT(9), 3438 WMI_SCAN_EVENT_RESUMED = BIT(10), 3439 WMI_SCAN_EVENT_MAX = BIT(15), 3440 }; 3441 3442 enum wmi_scan_completion_reason { 3443 WMI_SCAN_REASON_COMPLETED, 3444 WMI_SCAN_REASON_CANCELLED, 3445 WMI_SCAN_REASON_PREEMPTED, 3446 WMI_SCAN_REASON_TIMEDOUT, 3447 WMI_SCAN_REASON_INTERNAL_FAILURE, 3448 WMI_SCAN_REASON_MAX, 3449 }; 3450 3451 struct wmi_start_scan_cmd { 3452 __le32 tlv_header; 3453 __le32 scan_id; 3454 __le32 scan_req_id; 3455 __le32 vdev_id; 3456 __le32 scan_priority; 3457 __le32 notify_scan_events; 3458 __le32 dwell_time_active; 3459 __le32 dwell_time_passive; 3460 __le32 min_rest_time; 3461 __le32 max_rest_time; 3462 __le32 repeat_probe_time; 3463 __le32 probe_spacing_time; 3464 __le32 idle_time; 3465 __le32 max_scan_time; 3466 __le32 probe_delay; 3467 __le32 scan_ctrl_flags; 3468 __le32 burst_duration; 3469 __le32 num_chan; 3470 __le32 num_bssid; 3471 __le32 num_ssids; 3472 __le32 ie_len; 3473 __le32 n_probes; 3474 struct ath12k_wmi_mac_addr_params mac_addr; 3475 struct ath12k_wmi_mac_addr_params mac_mask; 3476 u32 ie_bitmap[WMI_IE_BITMAP_SIZE]; 3477 __le32 num_vendor_oui; 3478 __le32 scan_ctrl_flags_ext; 3479 __le32 dwell_time_active_2g; 3480 __le32 dwell_time_active_6g; 3481 __le32 dwell_time_passive_6g; 3482 __le32 scan_start_offset; 3483 } __packed; 3484 3485 #define WMI_SCAN_FLAG_PASSIVE 0x1 3486 #define WMI_SCAN_ADD_BCAST_PROBE_REQ 0x2 3487 #define WMI_SCAN_ADD_CCK_RATES 0x4 3488 #define WMI_SCAN_ADD_OFDM_RATES 0x8 3489 #define WMI_SCAN_CHAN_STAT_EVENT 0x10 3490 #define WMI_SCAN_FILTER_PROBE_REQ 0x20 3491 #define WMI_SCAN_BYPASS_DFS_CHN 0x40 3492 #define WMI_SCAN_CONTINUE_ON_ERROR 0x80 3493 #define WMI_SCAN_FILTER_PROMISCUOS 0x100 3494 #define WMI_SCAN_FLAG_FORCE_ACTIVE_ON_DFS 0x200 3495 #define WMI_SCAN_ADD_TPC_IE_IN_PROBE_REQ 0x400 3496 #define WMI_SCAN_ADD_DS_IE_IN_PROBE_REQ 0x800 3497 #define WMI_SCAN_ADD_SPOOF_MAC_IN_PROBE_REQ 0x1000 3498 #define WMI_SCAN_OFFCHAN_MGMT_TX 0x2000 3499 #define WMI_SCAN_OFFCHAN_DATA_TX 0x4000 3500 #define WMI_SCAN_CAPTURE_PHY_ERROR 0x8000 3501 #define WMI_SCAN_FLAG_STRICT_PASSIVE_ON_PCHN 0x10000 3502 #define WMI_SCAN_FLAG_HALF_RATE_SUPPORT 0x20000 3503 #define WMI_SCAN_FLAG_QUARTER_RATE_SUPPORT 0x40000 3504 #define WMI_SCAN_RANDOM_SEQ_NO_IN_PROBE_REQ 0x80000 3505 #define WMI_SCAN_ENABLE_IE_WHTELIST_IN_PROBE_REQ 0x100000 3506 3507 #define WMI_SCAN_DWELL_MODE_MASK GENMASK(23, 21) 3508 3509 enum { 3510 WMI_SCAN_DWELL_MODE_DEFAULT = 0, 3511 WMI_SCAN_DWELL_MODE_CONSERVATIVE = 1, 3512 WMI_SCAN_DWELL_MODE_MODERATE = 2, 3513 WMI_SCAN_DWELL_MODE_AGGRESSIVE = 3, 3514 WMI_SCAN_DWELL_MODE_STATIC = 4, 3515 }; 3516 3517 struct ath12k_wmi_hint_short_ssid_arg { 3518 u32 freq_flags; 3519 u32 short_ssid; 3520 }; 3521 3522 struct ath12k_wmi_hint_bssid_arg { 3523 u32 freq_flags; 3524 struct ath12k_wmi_mac_addr_params bssid; 3525 }; 3526 3527 struct ath12k_wmi_scan_req_arg { 3528 u32 scan_id; 3529 u32 scan_req_id; 3530 u32 vdev_id; 3531 u32 pdev_id; 3532 enum wmi_scan_priority scan_priority; 3533 u32 scan_ev_started:1, 3534 scan_ev_completed:1, 3535 scan_ev_bss_chan:1, 3536 scan_ev_foreign_chan:1, 3537 scan_ev_dequeued:1, 3538 scan_ev_preempted:1, 3539 scan_ev_start_failed:1, 3540 scan_ev_restarted:1, 3541 scan_ev_foreign_chn_exit:1, 3542 scan_ev_invalid:1, 3543 scan_ev_gpio_timeout:1, 3544 scan_ev_suspended:1, 3545 scan_ev_resumed:1; 3546 u32 dwell_time_active; 3547 u32 dwell_time_active_2g; 3548 u32 dwell_time_passive; 3549 u32 dwell_time_active_6g; 3550 u32 dwell_time_passive_6g; 3551 u32 min_rest_time; 3552 u32 max_rest_time; 3553 u32 repeat_probe_time; 3554 u32 probe_spacing_time; 3555 u32 idle_time; 3556 u32 max_scan_time; 3557 u32 probe_delay; 3558 u32 scan_f_passive:1, 3559 scan_f_bcast_probe:1, 3560 scan_f_cck_rates:1, 3561 scan_f_ofdm_rates:1, 3562 scan_f_chan_stat_evnt:1, 3563 scan_f_filter_prb_req:1, 3564 scan_f_bypass_dfs_chn:1, 3565 scan_f_continue_on_err:1, 3566 scan_f_offchan_mgmt_tx:1, 3567 scan_f_offchan_data_tx:1, 3568 scan_f_promisc_mode:1, 3569 scan_f_capture_phy_err:1, 3570 scan_f_strict_passive_pch:1, 3571 scan_f_half_rate:1, 3572 scan_f_quarter_rate:1, 3573 scan_f_force_active_dfs_chn:1, 3574 scan_f_add_tpc_ie_in_probe:1, 3575 scan_f_add_ds_ie_in_probe:1, 3576 scan_f_add_spoofed_mac_in_probe:1, 3577 scan_f_add_rand_seq_in_probe:1, 3578 scan_f_en_ie_whitelist_in_probe:1, 3579 scan_f_forced:1, 3580 scan_f_2ghz:1, 3581 scan_f_5ghz:1, 3582 scan_f_80mhz:1; 3583 enum scan_dwelltime_adaptive_mode adaptive_dwell_time_mode; 3584 u32 burst_duration; 3585 u32 num_chan; 3586 u32 num_bssid; 3587 u32 num_ssids; 3588 u32 n_probes; 3589 u32 *chan_list; 3590 u32 notify_scan_events; 3591 struct cfg80211_ssid ssid[WLAN_SCAN_MAX_NUM_SSID]; 3592 struct ath12k_wmi_mac_addr_params bssid_list[WLAN_SCAN_MAX_NUM_BSSID]; 3593 struct ath12k_wmi_element_info_arg extraie; 3594 u32 num_hint_s_ssid; 3595 u32 num_hint_bssid; 3596 struct ath12k_wmi_hint_short_ssid_arg hint_s_ssid[WLAN_SCAN_MAX_HINT_S_SSID]; 3597 struct ath12k_wmi_hint_bssid_arg hint_bssid[WLAN_SCAN_MAX_HINT_BSSID]; 3598 }; 3599 3600 struct wmi_ssid_arg { 3601 int len; 3602 const u8 *ssid; 3603 }; 3604 3605 struct wmi_bssid_arg { 3606 const u8 *bssid; 3607 }; 3608 3609 #define WMI_SCAN_STOP_ONE 0x00000000 3610 #define WMI_SCAN_STOP_VAP_ALL 0x01000000 3611 #define WMI_SCAN_STOP_ALL 0x04000000 3612 3613 /* Prefix 0xA000 indicates that the scan request 3614 * is trigger by HOST 3615 */ 3616 #define ATH12K_SCAN_ID 0xA000 3617 3618 enum scan_cancel_req_type { 3619 WLAN_SCAN_CANCEL_SINGLE = 1, 3620 WLAN_SCAN_CANCEL_VDEV_ALL, 3621 WLAN_SCAN_CANCEL_PDEV_ALL, 3622 }; 3623 3624 struct ath12k_wmi_scan_cancel_arg { 3625 u32 requester; 3626 u32 scan_id; 3627 enum scan_cancel_req_type req_type; 3628 u32 vdev_id; 3629 u32 pdev_id; 3630 }; 3631 3632 #define WMI_CHAN_INFO_MODE GENMASK(5, 0) 3633 #define WMI_CHAN_INFO_HT40_PLUS BIT(6) 3634 #define WMI_CHAN_INFO_PASSIVE BIT(7) 3635 #define WMI_CHAN_INFO_ADHOC_ALLOWED BIT(8) 3636 #define WMI_CHAN_INFO_AP_DISABLED BIT(9) 3637 #define WMI_CHAN_INFO_DFS BIT(10) 3638 #define WMI_CHAN_INFO_ALLOW_HT BIT(11) 3639 #define WMI_CHAN_INFO_ALLOW_VHT BIT(12) 3640 #define WMI_CHAN_INFO_CHAN_CHANGE_CAUSE_CSA BIT(13) 3641 #define WMI_CHAN_INFO_HALF_RATE BIT(14) 3642 #define WMI_CHAN_INFO_QUARTER_RATE BIT(15) 3643 #define WMI_CHAN_INFO_DFS_FREQ2 BIT(16) 3644 #define WMI_CHAN_INFO_ALLOW_HE BIT(17) 3645 #define WMI_CHAN_INFO_PSC BIT(18) 3646 3647 #define WMI_CHAN_REG_INFO1_MIN_PWR GENMASK(7, 0) 3648 #define WMI_CHAN_REG_INFO1_MAX_PWR GENMASK(15, 8) 3649 #define WMI_CHAN_REG_INFO1_MAX_REG_PWR GENMASK(23, 16) 3650 #define WMI_CHAN_REG_INFO1_REG_CLS GENMASK(31, 24) 3651 3652 #define WMI_CHAN_REG_INFO2_ANT_MAX GENMASK(7, 0) 3653 #define WMI_CHAN_REG_INFO2_MAX_TX_PWR GENMASK(15, 8) 3654 3655 struct ath12k_wmi_channel_params { 3656 __le32 tlv_header; 3657 __le32 mhz; 3658 __le32 band_center_freq1; 3659 __le32 band_center_freq2; 3660 __le32 info; 3661 __le32 reg_info_1; 3662 __le32 reg_info_2; 3663 } __packed; 3664 3665 enum wmi_sta_ps_mode { 3666 WMI_STA_PS_MODE_DISABLED = 0, 3667 WMI_STA_PS_MODE_ENABLED = 1, 3668 }; 3669 3670 #define WMI_SMPS_MASK_LOWER_16BITS 0xFF 3671 #define WMI_SMPS_MASK_UPPER_3BITS 0x7 3672 #define WMI_SMPS_PARAM_VALUE_SHIFT 29 3673 3674 #define ATH12K_WMI_FW_HANG_ASSERT_TYPE 1 3675 #define ATH12K_WMI_FW_HANG_DELAY 0 3676 3677 /* type, 0:unused 1: ASSERT 2: not respond detect command 3678 * delay_time_ms, the simulate will delay time 3679 */ 3680 3681 struct wmi_force_fw_hang_cmd { 3682 __le32 tlv_header; 3683 __le32 type; 3684 __le32 delay_time_ms; 3685 } __packed; 3686 3687 /* Param values to be sent for WMI_VDEV_PARAM_SGI param_id 3688 * which are used in 11n, 11ac systems 3689 * @WMI_GI_800_NS - Always uses 0.8us (Long GI) 3690 * @WMI_GI_400_NS - Firmware switches between 0.4us (Short GI) 3691 * and 0.8us (Long GI) based on packet error rate. 3692 */ 3693 #define WMI_GI_800_NS 0 3694 #define WMI_GI_400_NS 1 3695 3696 struct wmi_vdev_set_param_cmd { 3697 __le32 tlv_header; 3698 __le32 vdev_id; 3699 __le32 param_id; 3700 __le32 param_value; 3701 } __packed; 3702 3703 struct wmi_get_pdev_temperature_cmd { 3704 __le32 tlv_header; 3705 __le32 param; 3706 __le32 pdev_id; 3707 } __packed; 3708 3709 #define WMI_P2P_MAX_NOA_DESCRIPTORS 4 3710 3711 struct wmi_p2p_noa_event { 3712 __le32 vdev_id; 3713 } __packed; 3714 3715 struct ath12k_wmi_p2p_noa_descriptor { 3716 __le32 type_count; /* 255: continuous schedule, 0: reserved */ 3717 __le32 duration; /* Absent period duration in micro seconds */ 3718 __le32 interval; /* Absent period interval in micro seconds */ 3719 __le32 start_time; /* 32 bit tsf time when in starts */ 3720 } __packed; 3721 3722 #define WMI_P2P_NOA_INFO_CHANGED_FLAG BIT(0) 3723 #define WMI_P2P_NOA_INFO_INDEX GENMASK(15, 8) 3724 #define WMI_P2P_NOA_INFO_OPP_PS BIT(16) 3725 #define WMI_P2P_NOA_INFO_CTWIN_TU GENMASK(23, 17) 3726 #define WMI_P2P_NOA_INFO_DESC_NUM GENMASK(31, 24) 3727 3728 struct ath12k_wmi_p2p_noa_info { 3729 /* Bit 0 - Flag to indicate an update in NOA schedule 3730 * Bits 7-1 - Reserved 3731 * Bits 15-8 - Index (identifies the instance of NOA sub element) 3732 * Bit 16 - Opp PS state of the AP 3733 * Bits 23-17 - Ctwindow in TUs 3734 * Bits 31-24 - Number of NOA descriptors 3735 */ 3736 __le32 noa_attr; 3737 struct ath12k_wmi_p2p_noa_descriptor descriptors[WMI_P2P_MAX_NOA_DESCRIPTORS]; 3738 } __packed; 3739 3740 #define MAX_WMI_UTF_LEN 252 3741 3742 struct ath12k_wmi_ftm_seg_hdr_params { 3743 __le32 len; 3744 __le32 msgref; 3745 __le32 segmentinfo; 3746 __le32 pdev_id; 3747 } __packed; 3748 3749 struct ath12k_wmi_ftm_cmd { 3750 __le32 tlv_header; 3751 struct ath12k_wmi_ftm_seg_hdr_params seg_hdr; 3752 u8 data[]; 3753 } __packed; 3754 3755 struct ath12k_wmi_ftm_event { 3756 struct ath12k_wmi_ftm_seg_hdr_params seg_hdr; 3757 u8 data[]; 3758 } __packed; 3759 3760 #define WMI_BEACON_TX_BUFFER_SIZE 512 3761 3762 #define WMI_EMA_BEACON_CNT GENMASK(7, 0) 3763 #define WMI_EMA_BEACON_IDX GENMASK(15, 8) 3764 #define WMI_EMA_BEACON_FIRST GENMASK(23, 16) 3765 #define WMI_EMA_BEACON_LAST GENMASK(31, 24) 3766 3767 #define WMI_BEACON_PROTECTION_EN_BIT BIT(0) 3768 3769 struct ath12k_wmi_bcn_tmpl_ema_arg { 3770 u8 bcn_cnt; 3771 u8 bcn_index; 3772 }; 3773 3774 struct wmi_bcn_tmpl_cmd { 3775 __le32 tlv_header; 3776 __le32 vdev_id; 3777 __le32 tim_ie_offset; 3778 __le32 buf_len; 3779 __le32 csa_switch_count_offset; 3780 __le32 ext_csa_switch_count_offset; 3781 __le32 csa_event_bitmap; 3782 __le32 mbssid_ie_offset; 3783 __le32 esp_ie_offset; 3784 __le32 csc_switch_count_offset; 3785 __le32 csc_event_bitmap; 3786 __le32 mu_edca_ie_offset; 3787 __le32 feature_enable_bitmap; 3788 __le32 ema_params; 3789 } __packed; 3790 3791 struct wmi_p2p_go_set_beacon_ie_cmd { 3792 __le32 tlv_header; 3793 __le32 vdev_id; 3794 __le32 ie_buf_len; 3795 } __packed; 3796 3797 struct wmi_vdev_install_key_cmd { 3798 __le32 tlv_header; 3799 __le32 vdev_id; 3800 struct ath12k_wmi_mac_addr_params peer_macaddr; 3801 __le32 key_idx; 3802 __le32 key_flags; 3803 __le32 key_cipher; 3804 __le64 key_rsc_counter; 3805 __le64 key_global_rsc_counter; 3806 __le64 key_tsc_counter; 3807 u8 wpi_key_rsc_counter[16]; 3808 u8 wpi_key_tsc_counter[16]; 3809 __le32 key_len; 3810 __le32 key_txmic_len; 3811 __le32 key_rxmic_len; 3812 __le32 is_group_key_id_valid; 3813 __le32 group_key_id; 3814 3815 /* Followed by key_data containing key followed by 3816 * tx mic and then rx mic 3817 */ 3818 } __packed; 3819 3820 struct wmi_vdev_install_key_arg { 3821 u32 vdev_id; 3822 const u8 *macaddr; 3823 u32 key_idx; 3824 u32 key_flags; 3825 u32 key_cipher; 3826 u32 ieee80211_key_cipher; 3827 u32 key_len; 3828 u32 key_txmic_len; 3829 u32 key_rxmic_len; 3830 u64 key_rsc_counter; 3831 const void *key_data; 3832 }; 3833 3834 #define WMI_MAX_SUPPORTED_RATES 128 3835 #define WMI_HOST_MAX_HECAP_PHY_SIZE 3 3836 #define WMI_HOST_MAX_HE_RATE_SET 3 3837 #define WMI_HECAP_TXRX_MCS_NSS_IDX_80 0 3838 #define WMI_HECAP_TXRX_MCS_NSS_IDX_160 1 3839 3840 #define ATH12K_WMI_MLO_MAX_PARTNER_LINKS \ 3841 (ATH12K_WMI_MLO_MAX_LINKS + ATH12K_MAX_NUM_BRIDGE_LINKS - 1) 3842 3843 struct peer_assoc_mlo_params { 3844 bool enabled; 3845 bool assoc_link; 3846 bool primary_umac; 3847 bool peer_id_valid; 3848 bool logical_link_idx_valid; 3849 bool bridge_peer; 3850 u8 mld_addr[ETH_ALEN]; 3851 u32 logical_link_idx; 3852 u32 ml_peer_id; 3853 u32 ieee_link_id; 3854 u8 num_partner_links; 3855 struct wmi_ml_partner_info partner_info[ATH12K_WMI_MLO_MAX_LINKS]; 3856 u16 eml_cap; 3857 }; 3858 3859 struct wmi_rate_set_arg { 3860 u32 num_rates; 3861 u8 rates[WMI_MAX_SUPPORTED_RATES]; 3862 }; 3863 3864 struct ath12k_wmi_peer_assoc_arg { 3865 u32 vdev_id; 3866 u32 peer_new_assoc; 3867 u32 peer_associd; 3868 u32 peer_flags; 3869 u32 peer_caps; 3870 u32 peer_listen_intval; 3871 u32 peer_ht_caps; 3872 u32 peer_max_mpdu; 3873 u32 peer_mpdu_density; 3874 u32 peer_rate_caps; 3875 u32 peer_nss; 3876 u32 peer_vht_caps; 3877 u32 peer_phymode; 3878 u32 peer_ht_info[2]; 3879 struct wmi_rate_set_arg peer_legacy_rates; 3880 struct wmi_rate_set_arg peer_ht_rates; 3881 u32 rx_max_rate; 3882 u32 rx_mcs_set; 3883 u32 tx_max_rate; 3884 u32 tx_mcs_set; 3885 u8 vht_capable; 3886 u8 min_data_rate; 3887 u32 tx_max_mcs_nss; 3888 u32 peer_bw_rxnss_override; 3889 bool is_pmf_enabled; 3890 bool is_wme_set; 3891 bool qos_flag; 3892 bool apsd_flag; 3893 bool ht_flag; 3894 bool bw_40; 3895 bool bw_80; 3896 bool bw_160; 3897 bool bw_320; 3898 bool stbc_flag; 3899 bool ldpc_flag; 3900 bool static_mimops_flag; 3901 bool dynamic_mimops_flag; 3902 bool spatial_mux_flag; 3903 bool vht_flag; 3904 bool vht_ng_flag; 3905 bool need_ptk_4_way; 3906 bool need_gtk_2_way; 3907 bool auth_flag; 3908 bool safe_mode_enabled; 3909 bool amsdu_disable; 3910 /* Use common structure */ 3911 u8 peer_mac[ETH_ALEN]; 3912 3913 bool he_flag; 3914 u32 peer_he_cap_macinfo[2]; 3915 u32 peer_he_cap_macinfo_internal; 3916 u32 peer_he_caps_6ghz; 3917 u32 peer_he_ops; 3918 u32 peer_he_cap_phyinfo[WMI_HOST_MAX_HECAP_PHY_SIZE]; 3919 u32 peer_he_mcs_count; 3920 u32 peer_he_rx_mcs_set[WMI_HOST_MAX_HE_RATE_SET]; 3921 u32 peer_he_tx_mcs_set[WMI_HOST_MAX_HE_RATE_SET]; 3922 bool twt_responder; 3923 bool twt_requester; 3924 struct ath12k_wmi_ppe_threshold_arg peer_ppet; 3925 bool eht_flag; 3926 u32 peer_eht_cap_mac[WMI_MAX_EHTCAP_MAC_SIZE]; 3927 u32 peer_eht_cap_phy[WMI_MAX_EHTCAP_PHY_SIZE]; 3928 u32 peer_eht_mcs_count; 3929 u32 peer_eht_rx_mcs_set[WMI_MAX_EHTCAP_RATE_SET]; 3930 u32 peer_eht_tx_mcs_set[WMI_MAX_EHTCAP_RATE_SET]; 3931 struct ath12k_wmi_ppe_threshold_arg peer_eht_ppet; 3932 u32 punct_bitmap; 3933 bool is_assoc; 3934 struct peer_assoc_mlo_params ml; 3935 bool eht_disable_mcs15; 3936 }; 3937 3938 #define ATH12K_WMI_FLAG_MLO_ENABLED BIT(0) 3939 #define ATH12K_WMI_FLAG_MLO_ASSOC_LINK BIT(1) 3940 #define ATH12K_WMI_FLAG_MLO_PRIMARY_UMAC BIT(2) 3941 #define ATH12K_WMI_FLAG_MLO_LINK_ID_VALID BIT(3) 3942 #define ATH12K_WMI_FLAG_MLO_PEER_ID_VALID BIT(4) 3943 3944 struct wmi_peer_assoc_mlo_partner_info_params { 3945 __le32 tlv_header; 3946 __le32 vdev_id; 3947 __le32 hw_link_id; 3948 __le32 flags; 3949 __le32 logical_link_idx; 3950 } __packed; 3951 3952 struct wmi_peer_assoc_mlo_params { 3953 __le32 tlv_header; 3954 __le32 flags; 3955 struct ath12k_wmi_mac_addr_params mld_addr; 3956 __le32 logical_link_idx; 3957 __le32 ml_peer_id; 3958 __le32 ieee_link_id; 3959 __le32 emlsr_trans_timeout_us; 3960 __le32 emlsr_trans_delay_us; 3961 __le32 emlsr_padding_delay_us; 3962 } __packed; 3963 3964 struct wmi_peer_assoc_complete_cmd { 3965 __le32 tlv_header; 3966 struct ath12k_wmi_mac_addr_params peer_macaddr; 3967 __le32 vdev_id; 3968 __le32 peer_new_assoc; 3969 __le32 peer_associd; 3970 __le32 peer_flags; 3971 __le32 peer_caps; 3972 __le32 peer_listen_intval; 3973 __le32 peer_ht_caps; 3974 __le32 peer_max_mpdu; 3975 __le32 peer_mpdu_density; 3976 __le32 peer_rate_caps; 3977 __le32 peer_nss; 3978 __le32 peer_vht_caps; 3979 __le32 peer_phymode; 3980 __le32 peer_ht_info[2]; 3981 __le32 num_peer_legacy_rates; 3982 __le32 num_peer_ht_rates; 3983 __le32 peer_bw_rxnss_override; 3984 struct ath12k_wmi_ppe_threshold_params peer_ppet; 3985 __le32 peer_he_cap_info; 3986 __le32 peer_he_ops; 3987 __le32 peer_he_cap_phy[WMI_MAX_HECAP_PHY_SIZE]; 3988 __le32 peer_he_mcs; 3989 __le32 peer_he_cap_info_ext; 3990 __le32 peer_he_cap_info_internal; 3991 __le32 min_data_rate; 3992 __le32 peer_he_caps_6ghz; 3993 __le32 sta_type; 3994 __le32 bss_max_idle_option; 3995 __le32 auth_mode; 3996 __le32 peer_flags_ext; 3997 __le32 punct_bitmap; 3998 __le32 peer_eht_cap_mac[WMI_MAX_EHTCAP_MAC_SIZE]; 3999 __le32 peer_eht_cap_phy[WMI_MAX_EHTCAP_PHY_SIZE]; 4000 __le32 peer_eht_ops; 4001 struct ath12k_wmi_ppe_threshold_params peer_eht_ppet; 4002 } __packed; 4003 4004 struct wmi_stop_scan_cmd { 4005 __le32 tlv_header; 4006 __le32 requestor; 4007 __le32 scan_id; 4008 __le32 req_type; 4009 __le32 vdev_id; 4010 __le32 pdev_id; 4011 } __packed; 4012 4013 struct ath12k_wmi_scan_chan_list_arg { 4014 struct list_head list; 4015 u32 pdev_id; 4016 u16 nallchans; 4017 struct ath12k_wmi_channel_arg channel[]; 4018 }; 4019 4020 struct wmi_scan_chan_list_cmd { 4021 __le32 tlv_header; 4022 __le32 num_scan_chans; 4023 __le32 flags; 4024 __le32 pdev_id; 4025 } __packed; 4026 4027 #define WMI_MGMT_SEND_DOWNLD_LEN 64 4028 #define WMI_MGMT_LINK_AGNOSTIC_ID 0xFFFFFFFF 4029 4030 #define WMI_TX_PARAMS_DWORD0_POWER GENMASK(7, 0) 4031 #define WMI_TX_PARAMS_DWORD0_MCS_MASK GENMASK(19, 8) 4032 #define WMI_TX_PARAMS_DWORD0_NSS_MASK GENMASK(27, 20) 4033 #define WMI_TX_PARAMS_DWORD0_RETRY_LIMIT GENMASK(31, 28) 4034 4035 #define WMI_TX_PARAMS_DWORD1_CHAIN_MASK GENMASK(7, 0) 4036 #define WMI_TX_PARAMS_DWORD1_BW_MASK GENMASK(14, 8) 4037 #define WMI_TX_PARAMS_DWORD1_PREAMBLE_TYPE GENMASK(19, 15) 4038 #define WMI_TX_PARAMS_DWORD1_FRAME_TYPE BIT(20) 4039 #define WMI_TX_PARAMS_DWORD1_RSVD GENMASK(31, 21) 4040 4041 struct wmi_mgmt_send_cmd { 4042 __le32 tlv_header; 4043 __le32 vdev_id; 4044 __le32 desc_id; 4045 __le32 chanfreq; 4046 __le32 paddr_lo; 4047 __le32 paddr_hi; 4048 __le32 frame_len; 4049 __le32 buf_len; 4050 __le32 tx_params_valid; 4051 4052 /* This TLV is followed by struct wmi_mgmt_frame */ 4053 4054 /* Followed by struct ath12k_wmi_mlo_mgmt_send_params */ 4055 } __packed; 4056 4057 struct ath12k_wmi_mlo_mgmt_send_params { 4058 __le32 tlv_header; 4059 __le32 hw_link_id; 4060 } __packed; 4061 4062 struct ath12k_wmi_mgmt_send_tx_params { 4063 __le32 tlv_header; 4064 __le32 tx_param_dword0; 4065 __le32 tx_param_dword1; 4066 } __packed; 4067 4068 struct wmi_sta_powersave_mode_cmd { 4069 __le32 tlv_header; 4070 __le32 vdev_id; 4071 __le32 sta_ps_mode; 4072 } __packed; 4073 4074 struct wmi_sta_smps_force_mode_cmd { 4075 __le32 tlv_header; 4076 __le32 vdev_id; 4077 __le32 forced_mode; 4078 } __packed; 4079 4080 struct wmi_sta_smps_param_cmd { 4081 __le32 tlv_header; 4082 __le32 vdev_id; 4083 __le32 param; 4084 __le32 value; 4085 } __packed; 4086 4087 struct ath12k_wmi_bcn_prb_info_params { 4088 __le32 tlv_header; 4089 __le32 caps; 4090 __le32 erp; 4091 } __packed; 4092 4093 enum { 4094 WMI_PDEV_SUSPEND, 4095 WMI_PDEV_SUSPEND_AND_DISABLE_INTR, 4096 }; 4097 4098 struct wmi_pdev_green_ap_ps_enable_cmd_param { 4099 __le32 tlv_header; 4100 __le32 pdev_id; 4101 __le32 enable; 4102 } __packed; 4103 4104 struct ath12k_wmi_ap_ps_arg { 4105 u32 vdev_id; 4106 u32 param; 4107 u32 value; 4108 }; 4109 4110 enum set_init_cc_type { 4111 WMI_COUNTRY_INFO_TYPE_ALPHA, 4112 WMI_COUNTRY_INFO_TYPE_COUNTRY_CODE, 4113 WMI_COUNTRY_INFO_TYPE_REGDOMAIN, 4114 }; 4115 4116 enum set_init_cc_flags { 4117 INVALID_CC, 4118 CC_IS_SET, 4119 REGDMN_IS_SET, 4120 ALPHA_IS_SET, 4121 }; 4122 4123 struct ath12k_wmi_init_country_arg { 4124 union { 4125 u16 country_code; 4126 u16 regdom_id; 4127 u8 alpha2[3]; 4128 } cc_info; 4129 enum set_init_cc_flags flags; 4130 }; 4131 4132 struct wmi_init_country_cmd { 4133 __le32 tlv_header; 4134 __le32 pdev_id; 4135 __le32 init_cc_type; 4136 union { 4137 __le32 country_code; 4138 __le32 regdom_id; 4139 __le32 alpha2; 4140 } cc_info; 4141 } __packed; 4142 4143 struct wmi_11d_scan_start_arg { 4144 u32 vdev_id; 4145 u32 scan_period_msec; 4146 u32 start_interval_msec; 4147 }; 4148 4149 struct wmi_11d_scan_start_cmd { 4150 __le32 tlv_header; 4151 __le32 vdev_id; 4152 __le32 scan_period_msec; 4153 __le32 start_interval_msec; 4154 } __packed; 4155 4156 struct wmi_11d_scan_stop_cmd { 4157 __le32 tlv_header; 4158 __le32 vdev_id; 4159 } __packed; 4160 4161 struct wmi_11d_new_cc_event { 4162 __le32 new_alpha2; 4163 } __packed; 4164 4165 struct wmi_delba_send_cmd { 4166 __le32 tlv_header; 4167 __le32 vdev_id; 4168 struct ath12k_wmi_mac_addr_params peer_macaddr; 4169 __le32 tid; 4170 __le32 initiator; 4171 __le32 reasoncode; 4172 } __packed; 4173 4174 struct wmi_addba_setresponse_cmd { 4175 __le32 tlv_header; 4176 __le32 vdev_id; 4177 struct ath12k_wmi_mac_addr_params peer_macaddr; 4178 __le32 tid; 4179 __le32 statuscode; 4180 } __packed; 4181 4182 struct wmi_addba_send_cmd { 4183 __le32 tlv_header; 4184 __le32 vdev_id; 4185 struct ath12k_wmi_mac_addr_params peer_macaddr; 4186 __le32 tid; 4187 __le32 buffersize; 4188 } __packed; 4189 4190 struct wmi_addba_clear_resp_cmd { 4191 __le32 tlv_header; 4192 __le32 vdev_id; 4193 struct ath12k_wmi_mac_addr_params peer_macaddr; 4194 } __packed; 4195 4196 #define DFS_PHYERR_UNIT_TEST_CMD 0 4197 #define DFS_UNIT_TEST_MODULE 0x2b 4198 #define DFS_UNIT_TEST_TOKEN 0xAA 4199 4200 enum dfs_test_args_idx { 4201 DFS_TEST_CMDID = 0, 4202 DFS_TEST_PDEV_ID, 4203 DFS_TEST_RADAR_PARAM, 4204 DFS_MAX_TEST_ARGS, 4205 }; 4206 4207 struct wmi_dfs_unit_test_arg { 4208 u32 cmd_id; 4209 u32 pdev_id; 4210 u32 radar_param; 4211 }; 4212 4213 struct wmi_unit_test_cmd { 4214 __le32 tlv_header; 4215 __le32 vdev_id; 4216 __le32 module_id; 4217 __le32 num_args; 4218 __le32 diag_token; 4219 /* Followed by test args*/ 4220 } __packed; 4221 4222 #define MAX_SUPPORTED_RATES 128 4223 4224 struct ath12k_wmi_vht_rate_set_params { 4225 __le32 tlv_header; 4226 __le32 rx_max_rate; 4227 /* MCS at which the peer can transmit */ 4228 __le32 rx_mcs_set; 4229 __le32 tx_max_rate; 4230 /* MCS at which the peer can receive */ 4231 __le32 tx_mcs_set; 4232 __le32 tx_max_mcs_nss; 4233 } __packed; 4234 4235 struct ath12k_wmi_he_rate_set_params { 4236 __le32 tlv_header; 4237 __le32 rx_mcs_set; 4238 __le32 tx_mcs_set; 4239 } __packed; 4240 4241 struct ath12k_wmi_eht_rate_set_params { 4242 __le32 tlv_header; 4243 __le32 rx_mcs_set; 4244 __le32 tx_mcs_set; 4245 } __packed; 4246 4247 #define MAX_REG_RULES 10 4248 #define REG_ALPHA2_LEN 2 4249 #define MAX_6GHZ_REG_RULES 5 4250 4251 struct wmi_set_current_country_arg { 4252 u8 alpha2[REG_ALPHA2_LEN]; 4253 }; 4254 4255 struct wmi_set_current_country_cmd { 4256 __le32 tlv_header; 4257 __le32 pdev_id; 4258 __le32 new_alpha2; 4259 } __packed; 4260 4261 enum wmi_start_event_param { 4262 WMI_VDEV_START_RESP_EVENT = 0, 4263 WMI_VDEV_RESTART_RESP_EVENT, 4264 }; 4265 4266 struct wmi_vdev_start_resp_event { 4267 __le32 vdev_id; 4268 __le32 requestor_id; 4269 /* enum wmi_start_event_param */ 4270 __le32 resp_type; 4271 __le32 status; 4272 __le32 chain_mask; 4273 __le32 smps_mode; 4274 union { 4275 __le32 mac_id; 4276 __le32 pdev_id; 4277 }; 4278 __le32 cfgd_tx_streams; 4279 __le32 cfgd_rx_streams; 4280 __le32 max_allowed_tx_power; 4281 } __packed; 4282 4283 /* VDEV start response status codes */ 4284 enum wmi_vdev_start_resp_status_code { 4285 WMI_VDEV_START_RESPONSE_STATUS_SUCCESS = 0, 4286 WMI_VDEV_START_RESPONSE_INVALID_VDEVID = 1, 4287 WMI_VDEV_START_RESPONSE_NOT_SUPPORTED = 2, 4288 WMI_VDEV_START_RESPONSE_DFS_VIOLATION = 3, 4289 WMI_VDEV_START_RESPONSE_INVALID_REGDOMAIN = 4, 4290 }; 4291 4292 enum wmi_reg_6g_ap_type { 4293 WMI_REG_INDOOR_AP = 0, 4294 WMI_REG_STD_POWER_AP = 1, 4295 WMI_REG_VLP_AP = 2, 4296 WMI_REG_CURRENT_MAX_AP_TYPE, 4297 WMI_REG_MAX_SUPP_AP_TYPE = WMI_REG_VLP_AP, 4298 WMI_REG_MAX_AP_TYPE = 7, 4299 }; 4300 4301 enum wmi_reg_6g_client_type { 4302 WMI_REG_DEFAULT_CLIENT = 0, 4303 WMI_REG_SUBORDINATE_CLIENT = 1, 4304 WMI_REG_MAX_CLIENT_TYPE = 2, 4305 }; 4306 4307 /* Regulatory Rule Flags Passed by FW */ 4308 #define REGULATORY_CHAN_DISABLED BIT(0) 4309 #define REGULATORY_CHAN_NO_IR BIT(1) 4310 #define REGULATORY_CHAN_RADAR BIT(3) 4311 #define REGULATORY_CHAN_NO_OFDM BIT(6) 4312 #define REGULATORY_CHAN_INDOOR_ONLY BIT(9) 4313 4314 #define REGULATORY_CHAN_NO_HT40 BIT(4) 4315 #define REGULATORY_CHAN_NO_80MHZ BIT(7) 4316 #define REGULATORY_CHAN_NO_160MHZ BIT(8) 4317 #define REGULATORY_CHAN_NO_20MHZ BIT(11) 4318 #define REGULATORY_CHAN_NO_10MHZ BIT(12) 4319 4320 enum { 4321 WMI_REG_SET_CC_STATUS_PASS = 0, 4322 WMI_REG_CURRENT_ALPHA2_NOT_FOUND = 1, 4323 WMI_REG_INIT_ALPHA2_NOT_FOUND = 2, 4324 WMI_REG_SET_CC_CHANGE_NOT_ALLOWED = 3, 4325 WMI_REG_SET_CC_STATUS_NO_MEMORY = 4, 4326 WMI_REG_SET_CC_STATUS_FAIL = 5, 4327 }; 4328 4329 #define WMI_REG_CLIENT_MAX 4 4330 4331 struct wmi_reg_chan_list_cc_ext_event { 4332 __le32 status_code; 4333 __le32 phy_id; 4334 __le32 alpha2; 4335 __le32 num_phy; 4336 __le32 country_id; 4337 __le32 domain_code; 4338 __le32 dfs_region; 4339 __le32 phybitmap; 4340 __le32 min_bw_2g; 4341 __le32 max_bw_2g; 4342 __le32 min_bw_5g; 4343 __le32 max_bw_5g; 4344 __le32 num_2g_reg_rules; 4345 __le32 num_5g_reg_rules; 4346 __le32 client_type; 4347 __le32 rnr_tpe_usable; 4348 __le32 unspecified_ap_usable; 4349 __le32 domain_code_6g_ap_lpi; 4350 __le32 domain_code_6g_ap_sp; 4351 __le32 domain_code_6g_ap_vlp; 4352 __le32 domain_code_6g_client_lpi[WMI_REG_CLIENT_MAX]; 4353 __le32 domain_code_6g_client_sp[WMI_REG_CLIENT_MAX]; 4354 __le32 domain_code_6g_client_vlp[WMI_REG_CLIENT_MAX]; 4355 __le32 domain_code_6g_super_id; 4356 __le32 min_bw_6g_ap_sp; 4357 __le32 max_bw_6g_ap_sp; 4358 __le32 min_bw_6g_ap_lpi; 4359 __le32 max_bw_6g_ap_lpi; 4360 __le32 min_bw_6g_ap_vlp; 4361 __le32 max_bw_6g_ap_vlp; 4362 __le32 min_bw_6g_client_sp[WMI_REG_CLIENT_MAX]; 4363 __le32 max_bw_6g_client_sp[WMI_REG_CLIENT_MAX]; 4364 __le32 min_bw_6g_client_lpi[WMI_REG_CLIENT_MAX]; 4365 __le32 max_bw_6g_client_lpi[WMI_REG_CLIENT_MAX]; 4366 __le32 min_bw_6g_client_vlp[WMI_REG_CLIENT_MAX]; 4367 __le32 max_bw_6g_client_vlp[WMI_REG_CLIENT_MAX]; 4368 __le32 num_6g_reg_rules_ap_sp; 4369 __le32 num_6g_reg_rules_ap_lpi; 4370 __le32 num_6g_reg_rules_ap_vlp; 4371 __le32 num_6g_reg_rules_cl_sp[WMI_REG_CLIENT_MAX]; 4372 __le32 num_6g_reg_rules_cl_lpi[WMI_REG_CLIENT_MAX]; 4373 __le32 num_6g_reg_rules_cl_vlp[WMI_REG_CLIENT_MAX]; 4374 } __packed; 4375 4376 struct ath12k_wmi_reg_rule_ext_params { 4377 __le32 tlv_header; 4378 __le32 freq_info; 4379 __le32 bw_pwr_info; 4380 __le32 flag_info; 4381 __le32 psd_power_info; 4382 } __packed; 4383 4384 struct wmi_vdev_delete_resp_event { 4385 __le32 vdev_id; 4386 } __packed; 4387 4388 struct wmi_peer_delete_resp_event { 4389 __le32 vdev_id; 4390 struct ath12k_wmi_mac_addr_params peer_macaddr; 4391 } __packed; 4392 4393 struct wmi_bcn_tx_status_event { 4394 __le32 vdev_id; 4395 __le32 tx_status; 4396 } __packed; 4397 4398 struct wmi_vdev_stopped_event { 4399 __le32 vdev_id; 4400 } __packed; 4401 4402 struct wmi_pdev_bss_chan_info_event { 4403 __le32 freq; /* Units in MHz */ 4404 __le32 noise_floor; /* units are dBm */ 4405 /* rx clear - how often the channel was unused */ 4406 __le32 rx_clear_count_low; 4407 __le32 rx_clear_count_high; 4408 /* cycle count - elapsed time during measured period, in clock ticks */ 4409 __le32 cycle_count_low; 4410 __le32 cycle_count_high; 4411 /* tx cycle count - elapsed time spent in tx, in clock ticks */ 4412 __le32 tx_cycle_count_low; 4413 __le32 tx_cycle_count_high; 4414 /* rx cycle count - elapsed time spent in rx, in clock ticks */ 4415 __le32 rx_cycle_count_low; 4416 __le32 rx_cycle_count_high; 4417 /*rx_cycle cnt for my bss in 64bits format */ 4418 __le32 rx_bss_cycle_count_low; 4419 __le32 rx_bss_cycle_count_high; 4420 __le32 pdev_id; 4421 } __packed; 4422 4423 #define WMI_VDEV_INSTALL_KEY_COMPL_STATUS_SUCCESS 0 4424 4425 struct wmi_vdev_install_key_compl_event { 4426 __le32 vdev_id; 4427 struct ath12k_wmi_mac_addr_params peer_macaddr; 4428 __le32 key_idx; 4429 __le32 key_flags; 4430 __le32 status; 4431 } __packed; 4432 4433 struct wmi_vdev_install_key_complete_arg { 4434 u32 vdev_id; 4435 const u8 *macaddr; 4436 u32 key_idx; 4437 u32 key_flags; 4438 u32 status; 4439 }; 4440 4441 struct wmi_peer_assoc_conf_event { 4442 __le32 vdev_id; 4443 struct ath12k_wmi_mac_addr_params peer_macaddr; 4444 } __packed; 4445 4446 struct wmi_peer_assoc_conf_arg { 4447 u32 vdev_id; 4448 const u8 *macaddr; 4449 }; 4450 4451 struct wmi_fils_discovery_event { 4452 __le32 vdev_id; 4453 __le32 fils_tt; 4454 __le32 tbtt; 4455 } __packed; 4456 4457 struct wmi_probe_resp_tx_status_event { 4458 __le32 vdev_id; 4459 __le32 tx_status; 4460 } __packed; 4461 4462 struct wmi_pdev_ctl_failsafe_chk_event { 4463 __le32 pdev_id; 4464 __le32 ctl_failsafe_status; 4465 } __packed; 4466 4467 struct ath12k_wmi_pdev_csa_event { 4468 __le32 pdev_id; 4469 __le32 current_switch_count; 4470 __le32 num_vdevs; 4471 } __packed; 4472 4473 struct ath12k_wmi_pdev_radar_event { 4474 __le32 pdev_id; 4475 __le32 detection_mode; 4476 __le32 chan_freq; 4477 __le32 chan_width; 4478 __le32 detector_id; 4479 __le32 segment_id; 4480 __le32 timestamp; 4481 __le32 is_chirp; 4482 a_sle32 freq_offset; 4483 a_sle32 sidx; 4484 } __packed; 4485 4486 struct wmi_pdev_temperature_event { 4487 /* temperature value in Celsius degree */ 4488 a_sle32 temp; 4489 __le32 pdev_id; 4490 } __packed; 4491 4492 #define WMI_RX_STATUS_OK 0x00 4493 #define WMI_RX_STATUS_ERR_CRC 0x01 4494 #define WMI_RX_STATUS_ERR_DECRYPT 0x08 4495 #define WMI_RX_STATUS_ERR_MIC 0x10 4496 #define WMI_RX_STATUS_ERR_KEY_CACHE_MISS 0x20 4497 4498 #define WLAN_MGMT_TXRX_HOST_MAX_ANTENNA 4 4499 4500 struct ath12k_wmi_mgmt_rx_arg { 4501 u32 chan_freq; 4502 u32 channel; 4503 u32 snr; 4504 u8 rssi_ctl[WLAN_MGMT_TXRX_HOST_MAX_ANTENNA]; 4505 u32 rate; 4506 enum wmi_phy_mode phy_mode; 4507 u32 buf_len; 4508 int status; 4509 u32 flags; 4510 int rssi; 4511 u32 tsf_delta; 4512 u8 pdev_id; 4513 }; 4514 4515 #define ATH_MAX_ANTENNA 4 4516 4517 struct ath12k_wmi_mgmt_rx_params { 4518 __le32 channel; 4519 __le32 snr; 4520 __le32 rate; 4521 __le32 phy_mode; 4522 __le32 buf_len; 4523 __le32 status; 4524 __le32 rssi_ctl[ATH_MAX_ANTENNA]; 4525 __le32 flags; 4526 a_sle32 rssi; 4527 __le32 tsf_delta; 4528 __le32 rx_tsf_l32; 4529 __le32 rx_tsf_u32; 4530 __le32 pdev_id; 4531 __le32 chan_freq; 4532 } __packed; 4533 4534 #define MAX_ANTENNA_EIGHT 8 4535 4536 struct wmi_mgmt_tx_compl_event { 4537 __le32 desc_id; 4538 __le32 status; 4539 __le32 pdev_id; 4540 __le32 ppdu_id; 4541 __le32 ack_rssi; 4542 } __packed; 4543 4544 struct wmi_scan_event { 4545 __le32 event_type; /* %WMI_SCAN_EVENT_ */ 4546 __le32 reason; /* %WMI_SCAN_REASON_ */ 4547 __le32 channel_freq; /* only valid for WMI_SCAN_EVENT_FOREIGN_CHANNEL */ 4548 __le32 scan_req_id; 4549 __le32 scan_id; 4550 __le32 vdev_id; 4551 /* TSF Timestamp when the scan event (%WMI_SCAN_EVENT_) is completed 4552 * In case of AP it is TSF of the AP vdev 4553 * In case of STA connected state, this is the TSF of the AP 4554 * In case of STA not connected, it will be the free running HW timer 4555 */ 4556 __le32 tsf_timestamp; 4557 } __packed; 4558 4559 enum wmi_peer_sta_kickout_reason { 4560 WMI_PEER_STA_KICKOUT_REASON_UNSPECIFIED = 0, 4561 WMI_PEER_STA_KICKOUT_REASON_XRETRY = 1, 4562 WMI_PEER_STA_KICKOUT_REASON_INACTIVITY = 2, 4563 WMI_PEER_STA_KICKOUT_REASON_IBSS_DISCONNECT = 3, 4564 WMI_PEER_STA_KICKOUT_REASON_TDLS_DISCONNECT = 4, 4565 WMI_PEER_STA_KICKOUT_REASON_SA_QUERY_TIMEOUT = 5, 4566 WMI_PEER_STA_KICKOUT_REASON_ROAMING_EVENT = 6, 4567 WMI_PEER_STA_KICKOUT_REASON_PMF_ERROR = 7, 4568 }; 4569 4570 struct wmi_peer_sta_kickout_arg { 4571 const u8 *mac_addr; 4572 enum wmi_peer_sta_kickout_reason reason; 4573 u32 rssi; 4574 }; 4575 4576 struct wmi_peer_sta_kickout_event { 4577 struct ath12k_wmi_mac_addr_params peer_macaddr; 4578 __le32 reason; 4579 __le32 rssi; 4580 } __packed; 4581 4582 #define WMI_ROAM_REASON_MASK GENMASK(3, 0) 4583 #define WMI_ROAM_SUBNET_STATUS_MASK GENMASK(5, 4) 4584 4585 enum wmi_roam_reason { 4586 WMI_ROAM_REASON_BETTER_AP = 1, 4587 WMI_ROAM_REASON_BEACON_MISS = 2, 4588 WMI_ROAM_REASON_LOW_RSSI = 3, 4589 WMI_ROAM_REASON_SUITABLE_AP_FOUND = 4, 4590 WMI_ROAM_REASON_HO_FAILED = 5, 4591 4592 /* keep last */ 4593 WMI_ROAM_REASON_MAX, 4594 }; 4595 4596 struct wmi_roam_event { 4597 __le32 vdev_id; 4598 __le32 reason; 4599 __le32 rssi; 4600 } __packed; 4601 4602 #define WMI_CHAN_INFO_START_RESP 0 4603 #define WMI_CHAN_INFO_END_RESP 1 4604 4605 struct wmi_chan_info_event { 4606 __le32 err_code; 4607 __le32 freq; 4608 __le32 cmd_flags; 4609 __le32 noise_floor; 4610 __le32 rx_clear_count; 4611 __le32 cycle_count; 4612 __le32 chan_tx_pwr_range; 4613 __le32 chan_tx_pwr_tp; 4614 __le32 rx_frame_count; 4615 __le32 my_bss_rx_cycle_count; 4616 __le32 rx_11b_mode_data_duration; 4617 __le32 tx_frame_cnt; 4618 __le32 mac_clk_mhz; 4619 __le32 vdev_id; 4620 } __packed; 4621 4622 struct ath12k_wmi_target_cap_arg { 4623 u32 phy_capability; 4624 u32 max_frag_entry; 4625 u32 num_rf_chains; 4626 u32 ht_cap_info; 4627 u32 vht_cap_info; 4628 u32 vht_supp_mcs; 4629 u32 hw_min_tx_power; 4630 u32 hw_max_tx_power; 4631 u32 sys_cap_info; 4632 u32 min_pkt_size_enable; 4633 u32 max_bcn_ie_size; 4634 u32 max_num_scan_channels; 4635 u32 max_supported_macs; 4636 u32 wmi_fw_sub_feat_caps; 4637 u32 txrx_chainmask; 4638 u32 default_dbs_hw_mode_index; 4639 u32 num_msdu_desc; 4640 }; 4641 4642 enum wmi_vdev_type { 4643 WMI_VDEV_TYPE_UNSPEC = 0, 4644 WMI_VDEV_TYPE_AP = 1, 4645 WMI_VDEV_TYPE_STA = 2, 4646 WMI_VDEV_TYPE_IBSS = 3, 4647 WMI_VDEV_TYPE_MONITOR = 4, 4648 }; 4649 4650 enum wmi_vdev_subtype { 4651 WMI_VDEV_SUBTYPE_NONE, 4652 WMI_VDEV_SUBTYPE_P2P_DEVICE, 4653 WMI_VDEV_SUBTYPE_P2P_CLIENT, 4654 WMI_VDEV_SUBTYPE_P2P_GO, 4655 WMI_VDEV_SUBTYPE_PROXY_STA, 4656 WMI_VDEV_SUBTYPE_MESH_NON_11S, 4657 WMI_VDEV_SUBTYPE_MESH_11S, 4658 }; 4659 4660 enum wmi_sta_powersave_param { 4661 WMI_STA_PS_PARAM_RX_WAKE_POLICY = 0, 4662 WMI_STA_PS_PARAM_TX_WAKE_THRESHOLD = 1, 4663 WMI_STA_PS_PARAM_PSPOLL_COUNT = 2, 4664 WMI_STA_PS_PARAM_INACTIVITY_TIME = 3, 4665 WMI_STA_PS_PARAM_UAPSD = 4, 4666 }; 4667 4668 enum wmi_sta_ps_param_uapsd { 4669 WMI_STA_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0), 4670 WMI_STA_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1), 4671 WMI_STA_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2), 4672 WMI_STA_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3), 4673 WMI_STA_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4), 4674 WMI_STA_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5), 4675 WMI_STA_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6), 4676 WMI_STA_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7), 4677 }; 4678 4679 enum wmi_sta_ps_param_tx_wake_threshold { 4680 WMI_STA_PS_TX_WAKE_THRESHOLD_NEVER = 0, 4681 WMI_STA_PS_TX_WAKE_THRESHOLD_ALWAYS = 1, 4682 4683 /* Values greater than one indicate that many TX attempts per beacon 4684 * interval before the STA will wake up 4685 */ 4686 }; 4687 4688 /* The maximum number of PS-Poll frames the FW will send in response to 4689 * traffic advertised in TIM before waking up (by sending a null frame with PS 4690 * = 0). Value 0 has a special meaning: there is no maximum count and the FW 4691 * will send as many PS-Poll as are necessary to retrieve buffered BU. This 4692 * parameter is used when the RX wake policy is 4693 * WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD and ignored when the RX wake 4694 * policy is WMI_STA_PS_RX_WAKE_POLICY_WAKE. 4695 */ 4696 enum wmi_sta_ps_param_pspoll_count { 4697 WMI_STA_PS_PSPOLL_COUNT_NO_MAX = 0, 4698 /* Values greater than 0 indicate the maximum number of PS-Poll frames 4699 * FW will send before waking up. 4700 */ 4701 }; 4702 4703 /* U-APSD configuration of peer station from (re)assoc request and TSPECs */ 4704 enum wmi_ap_ps_param_uapsd { 4705 WMI_AP_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0), 4706 WMI_AP_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1), 4707 WMI_AP_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2), 4708 WMI_AP_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3), 4709 WMI_AP_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4), 4710 WMI_AP_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5), 4711 WMI_AP_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6), 4712 WMI_AP_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7), 4713 }; 4714 4715 /* U-APSD maximum service period of peer station */ 4716 enum wmi_ap_ps_peer_param_max_sp { 4717 WMI_AP_PS_PEER_PARAM_MAX_SP_UNLIMITED = 0, 4718 WMI_AP_PS_PEER_PARAM_MAX_SP_2 = 1, 4719 WMI_AP_PS_PEER_PARAM_MAX_SP_4 = 2, 4720 WMI_AP_PS_PEER_PARAM_MAX_SP_6 = 3, 4721 MAX_WMI_AP_PS_PEER_PARAM_MAX_SP, 4722 }; 4723 4724 enum wmi_ap_ps_peer_param { 4725 /** Set uapsd configuration for a given peer. 4726 * 4727 * This include the delivery and trigger enabled state for each AC. 4728 * The host MLME needs to set this based on AP capability and stations 4729 * request Set in the association request received from the station. 4730 * 4731 * Lower 8 bits of the value specify the UAPSD configuration. 4732 * 4733 * (see enum wmi_ap_ps_param_uapsd) 4734 * The default value is 0. 4735 */ 4736 WMI_AP_PS_PEER_PARAM_UAPSD = 0, 4737 4738 /** 4739 * Set the service period for a UAPSD capable station 4740 * 4741 * The service period from wme ie in the (re)assoc request frame. 4742 * 4743 * (see enum wmi_ap_ps_peer_param_max_sp) 4744 */ 4745 WMI_AP_PS_PEER_PARAM_MAX_SP = 1, 4746 4747 /** Time in seconds for aging out buffered frames 4748 * for STA in power save 4749 */ 4750 WMI_AP_PS_PEER_PARAM_AGEOUT_TIME = 2, 4751 4752 /** Specify frame types that are considered SIFS 4753 * RESP trigger frame 4754 */ 4755 WMI_AP_PS_PEER_PARAM_SIFS_RESP_FRMTYPE = 3, 4756 4757 /** Specifies the trigger state of TID. 4758 * Valid only for UAPSD frame type 4759 */ 4760 WMI_AP_PS_PEER_PARAM_SIFS_RESP_UAPSD = 4, 4761 4762 /* Specifies the WNM sleep state of a STA */ 4763 WMI_AP_PS_PEER_PARAM_WNM_SLEEP = 5, 4764 }; 4765 4766 #define DISABLE_SIFS_RESPONSE_TRIGGER 0 4767 4768 #define WMI_MAX_KEY_INDEX 7 4769 #define WMI_MAX_KEY_LEN 32 4770 4771 enum wmi_key_type { 4772 WMI_KEY_PAIRWISE = 0, 4773 WMI_KEY_GROUP = 1, 4774 }; 4775 4776 enum wmi_cipher_type { 4777 WMI_CIPHER_NONE = 0, /* clear key */ 4778 WMI_CIPHER_WEP = 1, 4779 WMI_CIPHER_TKIP = 2, 4780 WMI_CIPHER_AES_OCB = 3, 4781 WMI_CIPHER_AES_CCM = 4, 4782 WMI_CIPHER_WAPI = 5, 4783 WMI_CIPHER_CKIP = 6, 4784 WMI_CIPHER_AES_CMAC = 7, 4785 WMI_CIPHER_ANY = 8, 4786 WMI_CIPHER_AES_GCM = 9, 4787 WMI_CIPHER_AES_GMAC = 10, 4788 }; 4789 4790 /* Value to disable fixed rate setting */ 4791 #define WMI_FIXED_RATE_NONE (0xffff) 4792 4793 #define ATH12K_RC_VERSION_OFFSET 28 4794 #define ATH12K_RC_PREAMBLE_OFFSET 8 4795 #define ATH12K_RC_NSS_OFFSET 5 4796 4797 #define ATH12K_HW_RATE_CODE(rate, nss, preamble) \ 4798 ((1 << ATH12K_RC_VERSION_OFFSET) | \ 4799 ((nss) << ATH12K_RC_NSS_OFFSET) | \ 4800 ((preamble) << ATH12K_RC_PREAMBLE_OFFSET) | \ 4801 (rate)) 4802 4803 /* Preamble types to be used with VDEV fixed rate configuration */ 4804 enum wmi_rate_preamble { 4805 WMI_RATE_PREAMBLE_OFDM, 4806 WMI_RATE_PREAMBLE_CCK, 4807 WMI_RATE_PREAMBLE_HT, 4808 WMI_RATE_PREAMBLE_VHT, 4809 WMI_RATE_PREAMBLE_HE, 4810 WMI_RATE_PREAMBLE_EHT, 4811 }; 4812 4813 /** 4814 * enum wmi_rtscts_prot_mode - Enable/Disable RTS/CTS and CTS2Self Protection. 4815 * @WMI_RTS_CTS_DISABLED: RTS/CTS protection is disabled. 4816 * @WMI_USE_RTS_CTS: RTS/CTS Enabled. 4817 * @WMI_USE_CTS2SELF: CTS to self protection Enabled. 4818 */ 4819 enum wmi_rtscts_prot_mode { 4820 WMI_RTS_CTS_DISABLED = 0, 4821 WMI_USE_RTS_CTS = 1, 4822 WMI_USE_CTS2SELF = 2, 4823 }; 4824 4825 /** 4826 * enum wmi_rtscts_profile - Selection of RTS CTS profile along with enabling 4827 * protection mode. 4828 * @WMI_RTSCTS_FOR_NO_RATESERIES: Neither of rate-series should use RTS-CTS 4829 * @WMI_RTSCTS_FOR_SECOND_RATESERIES: Only second rate-series will use RTS-CTS 4830 * @WMI_RTSCTS_ACROSS_SW_RETRIES: Only the second rate-series will use RTS-CTS, 4831 * but if there's a sw retry, both the rate 4832 * series will use RTS-CTS. 4833 * @WMI_RTSCTS_ERP: RTS/CTS used for ERP protection for every PPDU. 4834 * @WMI_RTSCTS_FOR_ALL_RATESERIES: Enable RTS-CTS for all rate series. 4835 */ 4836 enum wmi_rtscts_profile { 4837 WMI_RTSCTS_FOR_NO_RATESERIES = 0, 4838 WMI_RTSCTS_FOR_SECOND_RATESERIES = 1, 4839 WMI_RTSCTS_ACROSS_SW_RETRIES = 2, 4840 WMI_RTSCTS_ERP = 3, 4841 WMI_RTSCTS_FOR_ALL_RATESERIES = 4, 4842 }; 4843 4844 #define WMI_SKB_HEADROOM sizeof(struct wmi_cmd_hdr) 4845 4846 enum wmi_sta_ps_param_rx_wake_policy { 4847 WMI_STA_PS_RX_WAKE_POLICY_WAKE = 0, 4848 WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD = 1, 4849 }; 4850 4851 /* Do not change existing values! Used by ath12k_frame_mode parameter 4852 * module parameter. 4853 */ 4854 enum ath12k_hw_txrx_mode { 4855 ATH12K_HW_TXRX_RAW = 0, 4856 ATH12K_HW_TXRX_NATIVE_WIFI = 1, 4857 ATH12K_HW_TXRX_ETHERNET = 2, 4858 }; 4859 4860 struct wmi_wmm_params { 4861 __le32 tlv_header; 4862 __le32 cwmin; 4863 __le32 cwmax; 4864 __le32 aifs; 4865 __le32 txoplimit; 4866 __le32 acm; 4867 __le32 no_ack; 4868 } __packed; 4869 4870 struct wmi_wmm_params_arg { 4871 u8 acm; 4872 u8 aifs; 4873 u16 cwmin; 4874 u16 cwmax; 4875 u16 txop; 4876 u8 no_ack; 4877 }; 4878 4879 struct wmi_vdev_set_wmm_params_cmd { 4880 __le32 tlv_header; 4881 __le32 vdev_id; 4882 struct wmi_wmm_params wmm_params[4]; 4883 __le32 wmm_param_type; 4884 } __packed; 4885 4886 struct wmi_wmm_params_all_arg { 4887 struct wmi_wmm_params_arg ac_be; 4888 struct wmi_wmm_params_arg ac_bk; 4889 struct wmi_wmm_params_arg ac_vi; 4890 struct wmi_wmm_params_arg ac_vo; 4891 }; 4892 4893 #define ATH12K_TWT_DEF_STA_CONG_TIMER_MS 5000 4894 #define ATH12K_TWT_DEF_DEFAULT_SLOT_SIZE 10 4895 #define ATH12K_TWT_DEF_CONGESTION_THRESH_SETUP 50 4896 #define ATH12K_TWT_DEF_CONGESTION_THRESH_TEARDOWN 20 4897 #define ATH12K_TWT_DEF_CONGESTION_THRESH_CRITICAL 100 4898 #define ATH12K_TWT_DEF_INTERFERENCE_THRESH_TEARDOWN 80 4899 #define ATH12K_TWT_DEF_INTERFERENCE_THRESH_SETUP 50 4900 #define ATH12K_TWT_DEF_MIN_NO_STA_SETUP 10 4901 #define ATH12K_TWT_DEF_MIN_NO_STA_TEARDOWN 2 4902 #define ATH12K_TWT_DEF_NO_OF_BCAST_MCAST_SLOTS 2 4903 #define ATH12K_TWT_DEF_MIN_NO_TWT_SLOTS 2 4904 #define ATH12K_TWT_DEF_MAX_NO_STA_TWT 500 4905 #define ATH12K_TWT_DEF_MODE_CHECK_INTERVAL 10000 4906 #define ATH12K_TWT_DEF_ADD_STA_SLOT_INTERVAL 1000 4907 #define ATH12K_TWT_DEF_REMOVE_STA_SLOT_INTERVAL 5000 4908 4909 struct wmi_twt_enable_params_cmd { 4910 __le32 tlv_header; 4911 __le32 pdev_id; 4912 __le32 sta_cong_timer_ms; 4913 __le32 mbss_support; 4914 __le32 default_slot_size; 4915 __le32 congestion_thresh_setup; 4916 __le32 congestion_thresh_teardown; 4917 __le32 congestion_thresh_critical; 4918 __le32 interference_thresh_teardown; 4919 __le32 interference_thresh_setup; 4920 __le32 min_no_sta_setup; 4921 __le32 min_no_sta_teardown; 4922 __le32 no_of_bcast_mcast_slots; 4923 __le32 min_no_twt_slots; 4924 __le32 max_no_sta_twt; 4925 __le32 mode_check_interval; 4926 __le32 add_sta_slot_interval; 4927 __le32 remove_sta_slot_interval; 4928 } __packed; 4929 4930 struct wmi_twt_disable_params_cmd { 4931 __le32 tlv_header; 4932 __le32 pdev_id; 4933 } __packed; 4934 4935 struct wmi_obss_spatial_reuse_params_cmd { 4936 __le32 tlv_header; 4937 __le32 pdev_id; 4938 __le32 enable; 4939 a_sle32 obss_min; 4940 a_sle32 obss_max; 4941 __le32 vdev_id; 4942 } __packed; 4943 4944 struct wmi_pdev_obss_pd_bitmap_cmd { 4945 __le32 tlv_header; 4946 __le32 pdev_id; 4947 __le32 bitmap[2]; 4948 } __packed; 4949 4950 #define ATH12K_BSS_COLOR_COLLISION_SCAN_PERIOD_MS 200 4951 #define ATH12K_OBSS_COLOR_COLLISION_DETECTION_DISABLE 0 4952 #define ATH12K_OBSS_COLOR_COLLISION_DETECTION 1 4953 4954 #define ATH12K_BSS_COLOR_STA_PERIODS 10000 4955 #define ATH12K_BSS_COLOR_AP_PERIODS 5000 4956 4957 /** 4958 * enum wmi_bss_color_collision - Event types for BSS color collision handling 4959 * @WMI_BSS_COLOR_COLLISION_DISABLE: Indicates that BSS color collision detection 4960 * is disabled. 4961 * @WMI_BSS_COLOR_COLLISION_DETECTION: Event triggered when a BSS color collision 4962 * is detected. 4963 * @WMI_BSS_COLOR_FREE_SLOT_TIMER_EXPIRY: Event indicating that the timer for waiting 4964 * on a free BSS color slot has expired. 4965 * @WMI_BSS_COLOR_FREE_SLOT_AVAILABLE: Event indicating that a free BSS color slot 4966 * has become available. 4967 */ 4968 enum wmi_bss_color_collision { 4969 WMI_BSS_COLOR_COLLISION_DISABLE = 0, 4970 WMI_BSS_COLOR_COLLISION_DETECTION, 4971 WMI_BSS_COLOR_FREE_SLOT_TIMER_EXPIRY, 4972 WMI_BSS_COLOR_FREE_SLOT_AVAILABLE, 4973 }; 4974 4975 struct wmi_obss_color_collision_cfg_params_cmd { 4976 __le32 tlv_header; 4977 __le32 vdev_id; 4978 __le32 flags; 4979 __le32 evt_type; 4980 __le32 current_bss_color; 4981 __le32 detection_period_ms; 4982 __le32 scan_period_ms; 4983 __le32 free_slot_expiry_time_ms; 4984 } __packed; 4985 4986 struct wmi_bss_color_change_enable_params_cmd { 4987 __le32 tlv_header; 4988 __le32 vdev_id; 4989 __le32 enable; 4990 } __packed; 4991 4992 struct wmi_obss_color_collision_event { 4993 __le32 vdev_id; 4994 __le32 evt_type; 4995 __le64 obss_color_bitmap; 4996 } __packed; 4997 4998 #define ATH12K_IPV4_TH_SEED_SIZE 5 4999 #define ATH12K_IPV6_TH_SEED_SIZE 11 5000 5001 struct ath12k_wmi_pdev_lro_config_cmd { 5002 __le32 tlv_header; 5003 __le32 lro_enable; 5004 __le32 res; 5005 u32 th_4[ATH12K_IPV4_TH_SEED_SIZE]; 5006 u32 th_6[ATH12K_IPV6_TH_SEED_SIZE]; 5007 __le32 pdev_id; 5008 } __packed; 5009 5010 #define ATH12K_WMI_SPECTRAL_COUNT_DEFAULT 0 5011 #define ATH12K_WMI_SPECTRAL_PERIOD_DEFAULT 224 5012 #define ATH12K_WMI_SPECTRAL_PRIORITY_DEFAULT 1 5013 #define ATH12K_WMI_SPECTRAL_FFT_SIZE_DEFAULT 7 5014 #define ATH12K_WMI_SPECTRAL_GC_ENA_DEFAULT 1 5015 #define ATH12K_WMI_SPECTRAL_RESTART_ENA_DEFAULT 0 5016 #define ATH12K_WMI_SPECTRAL_NOISE_FLOOR_REF_DEFAULT -96 5017 #define ATH12K_WMI_SPECTRAL_INIT_DELAY_DEFAULT 80 5018 #define ATH12K_WMI_SPECTRAL_NB_TONE_THR_DEFAULT 12 5019 #define ATH12K_WMI_SPECTRAL_STR_BIN_THR_DEFAULT 8 5020 #define ATH12K_WMI_SPECTRAL_WB_RPT_MODE_DEFAULT 0 5021 #define ATH12K_WMI_SPECTRAL_RSSI_RPT_MODE_DEFAULT 0 5022 #define ATH12K_WMI_SPECTRAL_RSSI_THR_DEFAULT 0xf0 5023 #define ATH12K_WMI_SPECTRAL_PWR_FORMAT_DEFAULT 0 5024 #define ATH12K_WMI_SPECTRAL_RPT_MODE_DEFAULT 2 5025 #define ATH12K_WMI_SPECTRAL_BIN_SCALE_DEFAULT 1 5026 #define ATH12K_WMI_SPECTRAL_DBM_ADJ_DEFAULT 1 5027 #define ATH12K_WMI_SPECTRAL_CHN_MASK_DEFAULT 1 5028 5029 struct ath12k_wmi_vdev_spectral_conf_arg { 5030 u32 vdev_id; 5031 u32 scan_count; 5032 u32 scan_period; 5033 u32 scan_priority; 5034 u32 scan_fft_size; 5035 u32 scan_gc_ena; 5036 u32 scan_restart_ena; 5037 u32 scan_noise_floor_ref; 5038 u32 scan_init_delay; 5039 u32 scan_nb_tone_thr; 5040 u32 scan_str_bin_thr; 5041 u32 scan_wb_rpt_mode; 5042 u32 scan_rssi_rpt_mode; 5043 u32 scan_rssi_thr; 5044 u32 scan_pwr_format; 5045 u32 scan_rpt_mode; 5046 u32 scan_bin_scale; 5047 u32 scan_dbm_adj; 5048 u32 scan_chn_mask; 5049 }; 5050 5051 struct ath12k_wmi_vdev_spectral_conf_cmd { 5052 __le32 tlv_header; 5053 __le32 vdev_id; 5054 __le32 scan_count; 5055 __le32 scan_period; 5056 __le32 scan_priority; 5057 __le32 scan_fft_size; 5058 __le32 scan_gc_ena; 5059 __le32 scan_restart_ena; 5060 __le32 scan_noise_floor_ref; 5061 __le32 scan_init_delay; 5062 __le32 scan_nb_tone_thr; 5063 __le32 scan_str_bin_thr; 5064 __le32 scan_wb_rpt_mode; 5065 __le32 scan_rssi_rpt_mode; 5066 __le32 scan_rssi_thr; 5067 __le32 scan_pwr_format; 5068 __le32 scan_rpt_mode; 5069 __le32 scan_bin_scale; 5070 __le32 scan_dbm_adj; 5071 __le32 scan_chn_mask; 5072 } __packed; 5073 5074 #define ATH12K_WMI_SPECTRAL_TRIGGER_CMD_TRIGGER 1 5075 #define ATH12K_WMI_SPECTRAL_TRIGGER_CMD_CLEAR 2 5076 #define ATH12K_WMI_SPECTRAL_ENABLE_CMD_ENABLE 1 5077 #define ATH12K_WMI_SPECTRAL_ENABLE_CMD_DISABLE 2 5078 5079 struct ath12k_wmi_vdev_spectral_enable_cmd { 5080 __le32 tlv_header; 5081 __le32 vdev_id; 5082 __le32 trigger_cmd; 5083 __le32 enable_cmd; 5084 } __packed; 5085 5086 struct ath12k_wmi_pdev_dma_ring_cfg_arg { 5087 u32 tlv_header; 5088 u32 pdev_id; 5089 u32 module_id; 5090 u32 base_paddr_lo; 5091 u32 base_paddr_hi; 5092 u32 head_idx_paddr_lo; 5093 u32 head_idx_paddr_hi; 5094 u32 tail_idx_paddr_lo; 5095 u32 tail_idx_paddr_hi; 5096 u32 num_elems; 5097 u32 buf_size; 5098 u32 num_resp_per_event; 5099 u32 event_timeout_ms; 5100 }; 5101 5102 struct ath12k_wmi_pdev_dma_ring_cfg_req_cmd { 5103 __le32 tlv_header; 5104 __le32 pdev_id; 5105 __le32 module_id; /* see enum wmi_direct_buffer_module */ 5106 __le32 base_paddr_lo; 5107 __le32 base_paddr_hi; 5108 __le32 head_idx_paddr_lo; 5109 __le32 head_idx_paddr_hi; 5110 __le32 tail_idx_paddr_lo; 5111 __le32 tail_idx_paddr_hi; 5112 __le32 num_elems; /* Number of elems in the ring */ 5113 __le32 buf_size; /* size of allocated buffer in bytes */ 5114 5115 /* Number of wmi_dma_buf_release_entry packed together */ 5116 __le32 num_resp_per_event; 5117 5118 /* Target should timeout and send whatever resp 5119 * it has if this time expires, units in milliseconds 5120 */ 5121 __le32 event_timeout_ms; 5122 } __packed; 5123 5124 struct ath12k_wmi_dma_buf_release_fixed_params { 5125 __le32 pdev_id; 5126 __le32 module_id; 5127 __le32 num_buf_release_entry; 5128 __le32 num_meta_data_entry; 5129 } __packed; 5130 5131 struct ath12k_wmi_dma_buf_release_entry_params { 5132 __le32 tlv_header; 5133 __le32 paddr_lo; 5134 5135 /* Bits 11:0: address of data 5136 * Bits 31:12: host context data 5137 */ 5138 __le32 paddr_hi; 5139 } __packed; 5140 5141 #define WMI_SPECTRAL_META_INFO1_FREQ1 GENMASK(15, 0) 5142 #define WMI_SPECTRAL_META_INFO1_FREQ2 GENMASK(31, 16) 5143 5144 #define WMI_SPECTRAL_META_INFO2_CHN_WIDTH GENMASK(7, 0) 5145 5146 struct ath12k_wmi_dma_buf_release_meta_data_params { 5147 __le32 tlv_header; 5148 a_sle32 noise_floor[WMI_MAX_CHAINS]; 5149 __le32 reset_delay; 5150 __le32 freq1; 5151 __le32 freq2; 5152 __le32 ch_width; 5153 } __packed; 5154 5155 enum wmi_fils_discovery_cmd_type { 5156 WMI_FILS_DISCOVERY_CMD, 5157 WMI_UNSOL_BCAST_PROBE_RESP, 5158 }; 5159 5160 struct wmi_fils_discovery_cmd { 5161 __le32 tlv_header; 5162 __le32 vdev_id; 5163 __le32 interval; 5164 __le32 config; /* enum wmi_fils_discovery_cmd_type */ 5165 } __packed; 5166 5167 struct wmi_fils_discovery_tmpl_cmd { 5168 __le32 tlv_header; 5169 __le32 vdev_id; 5170 __le32 buf_len; 5171 } __packed; 5172 5173 struct wmi_probe_tmpl_cmd { 5174 __le32 tlv_header; 5175 __le32 vdev_id; 5176 __le32 buf_len; 5177 } __packed; 5178 5179 #define WMI_MLO_CMD_TIMEOUT_HZ (5 * HZ) 5180 #define WMI_SERVICE_READY_TIMEOUT_HZ (5 * HZ) 5181 #define WMI_SEND_TIMEOUT_HZ (3 * HZ) 5182 5183 struct ath12k_wmi_pdev { 5184 struct ath12k_wmi_base *wmi_ab; 5185 enum ath12k_htc_ep_id eid; 5186 u32 rx_decap_mode; 5187 }; 5188 5189 struct ath12k_hw_mode_freq_range_arg { 5190 u32 low_2ghz_freq; 5191 u32 high_2ghz_freq; 5192 u32 low_5ghz_freq; 5193 u32 high_5ghz_freq; 5194 }; 5195 5196 struct ath12k_svc_ext_mac_phy_info { 5197 enum wmi_host_hw_mode_config_type hw_mode_config_type; 5198 u32 phy_id; 5199 u32 supported_bands; 5200 struct ath12k_hw_mode_freq_range_arg hw_freq_range; 5201 }; 5202 5203 #define ATH12K_MAX_MAC_PHY_CAP 8 5204 5205 struct ath12k_svc_ext_info { 5206 u32 num_hw_modes; 5207 struct ath12k_svc_ext_mac_phy_info mac_phy_info[ATH12K_MAX_MAC_PHY_CAP]; 5208 }; 5209 5210 /** 5211 * enum ath12k_hw_mode - enum for host mode 5212 * @ATH12K_HW_MODE_SMM: Single mac mode 5213 * @ATH12K_HW_MODE_DBS: DBS mode 5214 * @ATH12K_HW_MODE_SBS: SBS mode with either high share or low share 5215 * @ATH12K_HW_MODE_SBS_UPPER_SHARE: Higher 5 GHz shared with 2.4 GHz 5216 * @ATH12K_HW_MODE_SBS_LOWER_SHARE: Lower 5 GHz shared with 2.4 GHz 5217 * @ATH12K_HW_MODE_MAX: Max, used to indicate invalid mode 5218 */ 5219 enum ath12k_hw_mode { 5220 ATH12K_HW_MODE_SMM, 5221 ATH12K_HW_MODE_DBS, 5222 ATH12K_HW_MODE_SBS, 5223 ATH12K_HW_MODE_SBS_UPPER_SHARE, 5224 ATH12K_HW_MODE_SBS_LOWER_SHARE, 5225 ATH12K_HW_MODE_MAX, 5226 }; 5227 5228 struct ath12k_hw_mode_info { 5229 bool support_dbs:1; 5230 bool support_sbs:1; 5231 5232 struct ath12k_hw_mode_freq_range_arg freq_range_caps[ATH12K_HW_MODE_MAX] 5233 [MAX_RADIOS]; 5234 }; 5235 5236 struct ath12k_wmi_base { 5237 struct ath12k_base *ab; 5238 struct ath12k_wmi_pdev wmi[MAX_RADIOS]; 5239 enum ath12k_htc_ep_id wmi_endpoint_id[MAX_RADIOS]; 5240 u32 max_msg_len[MAX_RADIOS]; 5241 5242 struct completion service_ready; 5243 struct completion unified_ready; 5244 DECLARE_BITMAP(svc_map, WMI_MAX_EXT2_SERVICE); 5245 wait_queue_head_t tx_credits_wq; 5246 u32 num_mem_chunks; 5247 u32 rx_decap_mode; 5248 struct ath12k_wmi_host_mem_chunk_arg mem_chunks[WMI_MAX_MEM_REQS]; 5249 5250 enum wmi_host_hw_mode_config_type preferred_hw_mode; 5251 5252 struct ath12k_wmi_target_cap_arg *targ_cap; 5253 5254 struct ath12k_svc_ext_info svc_ext_info; 5255 u32 sbs_lower_band_end_freq; 5256 struct ath12k_hw_mode_info hw_mode_info; 5257 5258 u8 dp_peer_meta_data_ver; 5259 }; 5260 5261 struct wmi_pdev_set_bios_interface_cmd { 5262 __le32 tlv_header; 5263 __le32 pdev_id; 5264 __le32 param_type_id; 5265 __le32 length; 5266 } __packed; 5267 5268 enum wmi_bios_param_type { 5269 WMI_BIOS_PARAM_CCA_THRESHOLD_TYPE = 0, 5270 WMI_BIOS_PARAM_TAS_CONFIG_TYPE = 1, 5271 WMI_BIOS_PARAM_TAS_DATA_TYPE = 2, 5272 5273 /* bandedge control power */ 5274 WMI_BIOS_PARAM_TYPE_BANDEDGE = 3, 5275 5276 WMI_BIOS_PARAM_TYPE_MAX, 5277 }; 5278 5279 struct wmi_pdev_set_bios_sar_table_cmd { 5280 __le32 tlv_header; 5281 __le32 pdev_id; 5282 __le32 sar_len; 5283 __le32 dbs_backoff_len; 5284 } __packed; 5285 5286 struct wmi_pdev_set_bios_geo_table_cmd { 5287 __le32 tlv_header; 5288 __le32 pdev_id; 5289 __le32 geo_len; 5290 } __packed; 5291 5292 #define ATH12K_FW_STATS_BUF_SIZE (1024 * 1024) 5293 5294 enum wmi_sys_cap_info_flags { 5295 WMI_SYS_CAP_INFO_RXTX_LED = BIT(0), 5296 WMI_SYS_CAP_INFO_RFKILL = BIT(1), 5297 }; 5298 5299 #define WMI_RFKILL_CFG_GPIO_PIN_NUM GENMASK(5, 0) 5300 #define WMI_RFKILL_CFG_RADIO_LEVEL BIT(6) 5301 #define WMI_RFKILL_CFG_PIN_AS_GPIO GENMASK(10, 7) 5302 5303 enum wmi_rfkill_enable_radio { 5304 WMI_RFKILL_ENABLE_RADIO_ON = 0, 5305 WMI_RFKILL_ENABLE_RADIO_OFF = 1, 5306 }; 5307 5308 enum wmi_rfkill_radio_state { 5309 WMI_RFKILL_RADIO_STATE_OFF = 1, 5310 WMI_RFKILL_RADIO_STATE_ON = 2, 5311 }; 5312 5313 struct wmi_rfkill_state_change_event { 5314 __le32 gpio_pin_num; 5315 __le32 int_type; 5316 __le32 radio_state; 5317 } __packed; 5318 5319 struct wmi_twt_enable_event { 5320 __le32 pdev_id; 5321 __le32 status; 5322 } __packed; 5323 5324 struct wmi_twt_disable_event { 5325 __le32 pdev_id; 5326 __le32 status; 5327 } __packed; 5328 5329 struct wmi_mlo_setup_cmd { 5330 __le32 tlv_header; 5331 __le32 mld_group_id; 5332 __le32 pdev_id; 5333 } __packed; 5334 5335 struct wmi_mlo_setup_arg { 5336 __le32 group_id; 5337 u8 num_partner_links; 5338 u8 *partner_link_id; 5339 }; 5340 5341 struct wmi_mlo_ready_cmd { 5342 __le32 tlv_header; 5343 __le32 pdev_id; 5344 } __packed; 5345 5346 enum wmi_mlo_tear_down_reason_code_type { 5347 WMI_MLO_TEARDOWN_SSR_REASON, 5348 }; 5349 5350 struct wmi_mlo_teardown_cmd { 5351 __le32 tlv_header; 5352 __le32 pdev_id; 5353 __le32 reason_code; 5354 } __packed; 5355 5356 struct wmi_mlo_setup_complete_event { 5357 __le32 pdev_id; 5358 __le32 status; 5359 } __packed; 5360 5361 struct wmi_mlo_teardown_complete_event { 5362 __le32 pdev_id; 5363 __le32 status; 5364 } __packed; 5365 5366 /* WOW structures */ 5367 enum wmi_wow_wakeup_event { 5368 WOW_BMISS_EVENT = 0, 5369 WOW_BETTER_AP_EVENT, 5370 WOW_DEAUTH_RECVD_EVENT, 5371 WOW_MAGIC_PKT_RECVD_EVENT, 5372 WOW_GTK_ERR_EVENT, 5373 WOW_FOURWAY_HSHAKE_EVENT, 5374 WOW_EAPOL_RECVD_EVENT, 5375 WOW_NLO_DETECTED_EVENT, 5376 WOW_DISASSOC_RECVD_EVENT, 5377 WOW_PATTERN_MATCH_EVENT, 5378 WOW_CSA_IE_EVENT, 5379 WOW_PROBE_REQ_WPS_IE_EVENT, 5380 WOW_AUTH_REQ_EVENT, 5381 WOW_ASSOC_REQ_EVENT, 5382 WOW_HTT_EVENT, 5383 WOW_RA_MATCH_EVENT, 5384 WOW_HOST_AUTO_SHUTDOWN_EVENT, 5385 WOW_IOAC_MAGIC_EVENT, 5386 WOW_IOAC_SHORT_EVENT, 5387 WOW_IOAC_EXTEND_EVENT, 5388 WOW_IOAC_TIMER_EVENT, 5389 WOW_DFS_PHYERR_RADAR_EVENT, 5390 WOW_BEACON_EVENT, 5391 WOW_CLIENT_KICKOUT_EVENT, 5392 WOW_EVENT_MAX, 5393 }; 5394 5395 enum wmi_wow_interface_cfg { 5396 WOW_IFACE_PAUSE_ENABLED, 5397 WOW_IFACE_PAUSE_DISABLED 5398 }; 5399 5400 #define C2S(x) case x: return #x 5401 5402 static inline const char *wow_wakeup_event(enum wmi_wow_wakeup_event ev) 5403 { 5404 switch (ev) { 5405 C2S(WOW_BMISS_EVENT); 5406 C2S(WOW_BETTER_AP_EVENT); 5407 C2S(WOW_DEAUTH_RECVD_EVENT); 5408 C2S(WOW_MAGIC_PKT_RECVD_EVENT); 5409 C2S(WOW_GTK_ERR_EVENT); 5410 C2S(WOW_FOURWAY_HSHAKE_EVENT); 5411 C2S(WOW_EAPOL_RECVD_EVENT); 5412 C2S(WOW_NLO_DETECTED_EVENT); 5413 C2S(WOW_DISASSOC_RECVD_EVENT); 5414 C2S(WOW_PATTERN_MATCH_EVENT); 5415 C2S(WOW_CSA_IE_EVENT); 5416 C2S(WOW_PROBE_REQ_WPS_IE_EVENT); 5417 C2S(WOW_AUTH_REQ_EVENT); 5418 C2S(WOW_ASSOC_REQ_EVENT); 5419 C2S(WOW_HTT_EVENT); 5420 C2S(WOW_RA_MATCH_EVENT); 5421 C2S(WOW_HOST_AUTO_SHUTDOWN_EVENT); 5422 C2S(WOW_IOAC_MAGIC_EVENT); 5423 C2S(WOW_IOAC_SHORT_EVENT); 5424 C2S(WOW_IOAC_EXTEND_EVENT); 5425 C2S(WOW_IOAC_TIMER_EVENT); 5426 C2S(WOW_DFS_PHYERR_RADAR_EVENT); 5427 C2S(WOW_BEACON_EVENT); 5428 C2S(WOW_CLIENT_KICKOUT_EVENT); 5429 C2S(WOW_EVENT_MAX); 5430 default: 5431 return NULL; 5432 } 5433 } 5434 5435 enum wmi_wow_wake_reason { 5436 WOW_REASON_UNSPECIFIED = -1, 5437 WOW_REASON_NLOD = 0, 5438 WOW_REASON_AP_ASSOC_LOST, 5439 WOW_REASON_LOW_RSSI, 5440 WOW_REASON_DEAUTH_RECVD, 5441 WOW_REASON_DISASSOC_RECVD, 5442 WOW_REASON_GTK_HS_ERR, 5443 WOW_REASON_EAP_REQ, 5444 WOW_REASON_FOURWAY_HS_RECV, 5445 WOW_REASON_TIMER_INTR_RECV, 5446 WOW_REASON_PATTERN_MATCH_FOUND, 5447 WOW_REASON_RECV_MAGIC_PATTERN, 5448 WOW_REASON_P2P_DISC, 5449 WOW_REASON_WLAN_HB, 5450 WOW_REASON_CSA_EVENT, 5451 WOW_REASON_PROBE_REQ_WPS_IE_RECV, 5452 WOW_REASON_AUTH_REQ_RECV, 5453 WOW_REASON_ASSOC_REQ_RECV, 5454 WOW_REASON_HTT_EVENT, 5455 WOW_REASON_RA_MATCH, 5456 WOW_REASON_HOST_AUTO_SHUTDOWN, 5457 WOW_REASON_IOAC_MAGIC_EVENT, 5458 WOW_REASON_IOAC_SHORT_EVENT, 5459 WOW_REASON_IOAC_EXTEND_EVENT, 5460 WOW_REASON_IOAC_TIMER_EVENT, 5461 WOW_REASON_ROAM_HO, 5462 WOW_REASON_DFS_PHYERR_RADADR_EVENT, 5463 WOW_REASON_BEACON_RECV, 5464 WOW_REASON_CLIENT_KICKOUT_EVENT, 5465 WOW_REASON_PAGE_FAULT = 0x3a, 5466 WOW_REASON_DEBUG_TEST = 0xFF, 5467 }; 5468 5469 static inline const char *wow_reason(enum wmi_wow_wake_reason reason) 5470 { 5471 switch (reason) { 5472 C2S(WOW_REASON_UNSPECIFIED); 5473 C2S(WOW_REASON_NLOD); 5474 C2S(WOW_REASON_AP_ASSOC_LOST); 5475 C2S(WOW_REASON_LOW_RSSI); 5476 C2S(WOW_REASON_DEAUTH_RECVD); 5477 C2S(WOW_REASON_DISASSOC_RECVD); 5478 C2S(WOW_REASON_GTK_HS_ERR); 5479 C2S(WOW_REASON_EAP_REQ); 5480 C2S(WOW_REASON_FOURWAY_HS_RECV); 5481 C2S(WOW_REASON_TIMER_INTR_RECV); 5482 C2S(WOW_REASON_PATTERN_MATCH_FOUND); 5483 C2S(WOW_REASON_RECV_MAGIC_PATTERN); 5484 C2S(WOW_REASON_P2P_DISC); 5485 C2S(WOW_REASON_WLAN_HB); 5486 C2S(WOW_REASON_CSA_EVENT); 5487 C2S(WOW_REASON_PROBE_REQ_WPS_IE_RECV); 5488 C2S(WOW_REASON_AUTH_REQ_RECV); 5489 C2S(WOW_REASON_ASSOC_REQ_RECV); 5490 C2S(WOW_REASON_HTT_EVENT); 5491 C2S(WOW_REASON_RA_MATCH); 5492 C2S(WOW_REASON_HOST_AUTO_SHUTDOWN); 5493 C2S(WOW_REASON_IOAC_MAGIC_EVENT); 5494 C2S(WOW_REASON_IOAC_SHORT_EVENT); 5495 C2S(WOW_REASON_IOAC_EXTEND_EVENT); 5496 C2S(WOW_REASON_IOAC_TIMER_EVENT); 5497 C2S(WOW_REASON_ROAM_HO); 5498 C2S(WOW_REASON_DFS_PHYERR_RADADR_EVENT); 5499 C2S(WOW_REASON_BEACON_RECV); 5500 C2S(WOW_REASON_CLIENT_KICKOUT_EVENT); 5501 C2S(WOW_REASON_PAGE_FAULT); 5502 C2S(WOW_REASON_DEBUG_TEST); 5503 default: 5504 return NULL; 5505 } 5506 } 5507 5508 #undef C2S 5509 5510 #define WOW_DEFAULT_BITMAP_PATTERN_SIZE 148 5511 #define WOW_DEFAULT_BITMASK_SIZE 148 5512 5513 #define WOW_MIN_PATTERN_SIZE 1 5514 #define WOW_MAX_PATTERN_SIZE 148 5515 #define WOW_MAX_PKT_OFFSET 128 5516 #define WOW_HDR_LEN (sizeof(struct ieee80211_hdr_3addr) + \ 5517 sizeof(struct rfc1042_hdr)) 5518 #define WOW_MAX_REDUCE (WOW_HDR_LEN - sizeof(struct ethhdr) - \ 5519 offsetof(struct ieee80211_hdr_3addr, addr1)) 5520 5521 struct wmi_wow_bitmap_pattern_params { 5522 __le32 tlv_header; 5523 u8 patternbuf[WOW_DEFAULT_BITMAP_PATTERN_SIZE]; 5524 u8 bitmaskbuf[WOW_DEFAULT_BITMASK_SIZE]; 5525 __le32 pattern_offset; 5526 __le32 pattern_len; 5527 __le32 bitmask_len; 5528 __le32 pattern_id; 5529 } __packed; 5530 5531 struct wmi_wow_add_pattern_cmd { 5532 __le32 tlv_header; 5533 __le32 vdev_id; 5534 __le32 pattern_id; 5535 __le32 pattern_type; 5536 } __packed; 5537 5538 struct wmi_wow_del_pattern_cmd { 5539 __le32 tlv_header; 5540 __le32 vdev_id; 5541 __le32 pattern_id; 5542 __le32 pattern_type; 5543 } __packed; 5544 5545 enum wmi_tlv_pattern_type { 5546 WOW_PATTERN_MIN = 0, 5547 WOW_BITMAP_PATTERN = WOW_PATTERN_MIN, 5548 WOW_IPV4_SYNC_PATTERN, 5549 WOW_IPV6_SYNC_PATTERN, 5550 WOW_WILD_CARD_PATTERN, 5551 WOW_TIMER_PATTERN, 5552 WOW_MAGIC_PATTERN, 5553 WOW_IPV6_RA_PATTERN, 5554 WOW_IOAC_PKT_PATTERN, 5555 WOW_IOAC_TMR_PATTERN, 5556 WOW_PATTERN_MAX 5557 }; 5558 5559 struct wmi_wow_add_del_event_cmd { 5560 __le32 tlv_header; 5561 __le32 vdev_id; 5562 __le32 is_add; 5563 __le32 event_bitmap; 5564 } __packed; 5565 5566 struct wmi_wow_enable_cmd { 5567 __le32 tlv_header; 5568 __le32 enable; 5569 __le32 pause_iface_config; 5570 __le32 flags; 5571 } __packed; 5572 5573 struct wmi_wow_host_wakeup_cmd { 5574 __le32 tlv_header; 5575 __le32 reserved; 5576 } __packed; 5577 5578 struct wmi_wow_ev_param { 5579 __le32 vdev_id; 5580 __le32 flag; 5581 __le32 wake_reason; 5582 __le32 data_len; 5583 } __packed; 5584 5585 struct wmi_wow_ev_pg_fault_param { 5586 __le32 len; 5587 u8 data[]; 5588 } __packed; 5589 5590 struct wmi_wow_ev_arg { 5591 enum wmi_wow_wake_reason wake_reason; 5592 }; 5593 5594 #define WMI_PNO_MAX_SCHED_SCAN_PLANS 2 5595 #define WMI_PNO_MAX_SCHED_SCAN_PLAN_INT 7200 5596 #define WMI_PNO_MAX_SCHED_SCAN_PLAN_ITRNS 100 5597 #define WMI_PNO_MAX_NETW_CHANNELS 26 5598 #define WMI_PNO_MAX_NETW_CHANNELS_EX 60 5599 #define WMI_PNO_MAX_SUPP_NETWORKS WLAN_SCAN_PARAMS_MAX_SSID 5600 #define WMI_PNO_MAX_IE_LENGTH WLAN_SCAN_PARAMS_MAX_IE_LEN 5601 5602 /* size based of dot11 declaration without extra IEs as we will not carry those for PNO */ 5603 #define WMI_PNO_MAX_PB_REQ_SIZE 450 5604 5605 #define WMI_PNO_24GHZ_DEFAULT_CH 1 5606 #define WMI_PNO_5GHZ_DEFAULT_CH 36 5607 5608 #define WMI_ACTIVE_MAX_CHANNEL_TIME 40 5609 #define WMI_PASSIVE_MAX_CHANNEL_TIME 110 5610 5611 /* SSID broadcast type */ 5612 enum wmi_ssid_bcast_type { 5613 BCAST_UNKNOWN = 0, 5614 BCAST_NORMAL = 1, 5615 BCAST_HIDDEN = 2, 5616 }; 5617 5618 #define WMI_NLO_MAX_SSIDS 16 5619 #define WMI_NLO_MAX_CHAN 48 5620 5621 #define WMI_NLO_CONFIG_STOP BIT(0) 5622 #define WMI_NLO_CONFIG_START BIT(1) 5623 #define WMI_NLO_CONFIG_RESET BIT(2) 5624 #define WMI_NLO_CONFIG_SLOW_SCAN BIT(4) 5625 #define WMI_NLO_CONFIG_FAST_SCAN BIT(5) 5626 #define WMI_NLO_CONFIG_SSID_HIDE_EN BIT(6) 5627 5628 /* This bit is used to indicate if EPNO or supplicant PNO is enabled. 5629 * Only one of them can be enabled at a given time 5630 */ 5631 #define WMI_NLO_CONFIG_ENLO BIT(7) 5632 #define WMI_NLO_CONFIG_SCAN_PASSIVE BIT(8) 5633 #define WMI_NLO_CONFIG_ENLO_RESET BIT(9) 5634 #define WMI_NLO_CONFIG_SPOOFED_MAC_IN_PROBE_REQ BIT(10) 5635 #define WMI_NLO_CONFIG_RANDOM_SEQ_NO_IN_PROBE_REQ BIT(11) 5636 #define WMI_NLO_CONFIG_ENABLE_IE_WHITELIST_IN_PROBE_REQ BIT(12) 5637 #define WMI_NLO_CONFIG_ENABLE_CNLO_RSSI_CONFIG BIT(13) 5638 5639 struct wmi_nlo_ssid_params { 5640 __le32 valid; 5641 struct ath12k_wmi_ssid_params ssid; 5642 } __packed; 5643 5644 struct wmi_nlo_enc_params { 5645 __le32 valid; 5646 __le32 enc_type; 5647 } __packed; 5648 5649 struct wmi_nlo_auth_params { 5650 __le32 valid; 5651 __le32 auth_type; 5652 } __packed; 5653 5654 struct wmi_nlo_bcast_nw_params { 5655 __le32 valid; 5656 __le32 bcast_nw_type; 5657 } __packed; 5658 5659 struct wmi_nlo_rssi_params { 5660 __le32 valid; 5661 __le32 rssi; 5662 } __packed; 5663 5664 struct nlo_configured_params { 5665 /* TLV tag and len;*/ 5666 __le32 tlv_header; 5667 struct wmi_nlo_ssid_params ssid; 5668 struct wmi_nlo_enc_params enc_type; 5669 struct wmi_nlo_auth_params auth_type; 5670 struct wmi_nlo_rssi_params rssi_cond; 5671 5672 /* indicates if the SSID is hidden or not */ 5673 struct wmi_nlo_bcast_nw_params bcast_nw_type; 5674 } __packed; 5675 5676 struct wmi_network_type_arg { 5677 struct cfg80211_ssid ssid; 5678 u32 authentication; 5679 u32 encryption; 5680 u32 bcast_nw_type; 5681 u8 channel_count; 5682 u16 channels[WMI_PNO_MAX_NETW_CHANNELS_EX]; 5683 s32 rssi_threshold; 5684 }; 5685 5686 struct wmi_pno_scan_req_arg { 5687 u8 enable; 5688 u8 vdev_id; 5689 u8 uc_networks_count; 5690 struct wmi_network_type_arg a_networks[WMI_PNO_MAX_SUPP_NETWORKS]; 5691 u32 fast_scan_period; 5692 u32 slow_scan_period; 5693 u8 fast_scan_max_cycles; 5694 5695 bool do_passive_scan; 5696 5697 u32 delay_start_time; 5698 u32 active_min_time; 5699 u32 active_max_time; 5700 u32 passive_min_time; 5701 u32 passive_max_time; 5702 5703 /* mac address randomization attributes */ 5704 u32 enable_pno_scan_randomization; 5705 u8 mac_addr[ETH_ALEN]; 5706 u8 mac_addr_mask[ETH_ALEN]; 5707 }; 5708 5709 struct wmi_wow_nlo_config_cmd { 5710 __le32 tlv_header; 5711 __le32 flags; 5712 __le32 vdev_id; 5713 __le32 fast_scan_max_cycles; 5714 __le32 active_dwell_time; 5715 __le32 passive_dwell_time; 5716 __le32 probe_bundle_size; 5717 5718 /* ART = IRT */ 5719 __le32 rest_time; 5720 5721 /* max value that can be reached after scan_backoff_multiplier */ 5722 __le32 max_rest_time; 5723 5724 __le32 scan_backoff_multiplier; 5725 __le32 fast_scan_period; 5726 5727 /* specific to windows */ 5728 __le32 slow_scan_period; 5729 5730 __le32 no_of_ssids; 5731 5732 __le32 num_of_channels; 5733 5734 /* NLO scan start delay time in milliseconds */ 5735 __le32 delay_start_time; 5736 5737 /* MAC Address to use in Probe Req as SA */ 5738 struct ath12k_wmi_mac_addr_params mac_addr; 5739 5740 /* Mask on which MAC has to be randomized */ 5741 struct ath12k_wmi_mac_addr_params mac_mask; 5742 5743 /* IE bitmap to use in Probe Req */ 5744 __le32 ie_bitmap[8]; 5745 5746 /* Number of vendor OUIs. In the TLV vendor_oui[] */ 5747 __le32 num_vendor_oui; 5748 5749 /* Number of connected NLO band preferences */ 5750 __le32 num_cnlo_band_pref; 5751 5752 /* The TLVs will follow. 5753 * nlo_configured_params nlo_list[]; 5754 * u32 channel_list[num_of_channels]; 5755 */ 5756 } __packed; 5757 5758 /* Definition of HW data filtering */ 5759 enum hw_data_filter_type { 5760 WMI_HW_DATA_FILTER_DROP_NON_ARP_BC = BIT(0), 5761 WMI_HW_DATA_FILTER_DROP_NON_ICMPV6_MC = BIT(1), 5762 }; 5763 5764 struct wmi_hw_data_filter_cmd { 5765 __le32 tlv_header; 5766 __le32 vdev_id; 5767 __le32 enable; 5768 __le32 hw_filter_bitmap; 5769 } __packed; 5770 5771 struct wmi_hw_data_filter_arg { 5772 u32 vdev_id; 5773 bool enable; 5774 u32 hw_filter_bitmap; 5775 }; 5776 5777 #define WMI_IPV6_UC_TYPE 0 5778 #define WMI_IPV6_AC_TYPE 1 5779 5780 #define WMI_IPV6_MAX_COUNT 16 5781 #define WMI_IPV4_MAX_COUNT 2 5782 5783 struct wmi_arp_ns_offload_arg { 5784 u8 ipv4_addr[WMI_IPV4_MAX_COUNT][4]; 5785 u32 ipv4_count; 5786 u32 ipv6_count; 5787 u8 ipv6_addr[WMI_IPV6_MAX_COUNT][16]; 5788 u8 self_ipv6_addr[WMI_IPV6_MAX_COUNT][16]; 5789 u8 ipv6_type[WMI_IPV6_MAX_COUNT]; 5790 bool ipv6_valid[WMI_IPV6_MAX_COUNT]; 5791 u8 mac_addr[ETH_ALEN]; 5792 }; 5793 5794 #define WMI_MAX_NS_OFFLOADS 2 5795 #define WMI_MAX_ARP_OFFLOADS 2 5796 5797 #define WMI_ARPOL_FLAGS_VALID BIT(0) 5798 #define WMI_ARPOL_FLAGS_MAC_VALID BIT(1) 5799 #define WMI_ARPOL_FLAGS_REMOTE_IP_VALID BIT(2) 5800 5801 struct wmi_arp_offload_params { 5802 __le32 tlv_header; 5803 __le32 flags; 5804 u8 target_ipaddr[4]; 5805 u8 remote_ipaddr[4]; 5806 struct ath12k_wmi_mac_addr_params target_mac; 5807 } __packed; 5808 5809 #define WMI_NSOL_FLAGS_VALID BIT(0) 5810 #define WMI_NSOL_FLAGS_MAC_VALID BIT(1) 5811 #define WMI_NSOL_FLAGS_REMOTE_IP_VALID BIT(2) 5812 #define WMI_NSOL_FLAGS_IS_IPV6_ANYCAST BIT(3) 5813 5814 #define WMI_NSOL_MAX_TARGET_IPS 2 5815 5816 struct wmi_ns_offload_params { 5817 __le32 tlv_header; 5818 __le32 flags; 5819 u8 target_ipaddr[WMI_NSOL_MAX_TARGET_IPS][16]; 5820 u8 solicitation_ipaddr[16]; 5821 u8 remote_ipaddr[16]; 5822 struct ath12k_wmi_mac_addr_params target_mac; 5823 } __packed; 5824 5825 struct wmi_set_arp_ns_offload_cmd { 5826 __le32 tlv_header; 5827 __le32 flags; 5828 __le32 vdev_id; 5829 __le32 num_ns_ext_tuples; 5830 /* The TLVs follow: 5831 * wmi_ns_offload_params ns[WMI_MAX_NS_OFFLOADS]; 5832 * wmi_arp_offload_params arp[WMI_MAX_ARP_OFFLOADS]; 5833 * wmi_ns_offload_params ns_ext[num_ns_ext_tuples]; 5834 */ 5835 } __packed; 5836 5837 #define GTK_OFFLOAD_OPCODE_MASK 0xFF000000 5838 #define GTK_OFFLOAD_ENABLE_OPCODE 0x01000000 5839 #define GTK_OFFLOAD_DISABLE_OPCODE 0x02000000 5840 #define GTK_OFFLOAD_REQUEST_STATUS_OPCODE 0x04000000 5841 5842 #define GTK_OFFLOAD_KEK_BYTES 16 5843 #define GTK_OFFLOAD_KCK_BYTES 16 5844 #define GTK_REPLAY_COUNTER_BYTES 8 5845 #define WMI_MAX_KEY_LEN 32 5846 #define IGTK_PN_SIZE 6 5847 5848 struct wmi_gtk_offload_status_event { 5849 __le32 vdev_id; 5850 __le32 flags; 5851 __le32 refresh_cnt; 5852 __le64 replay_ctr; 5853 u8 igtk_key_index; 5854 u8 igtk_key_length; 5855 u8 igtk_key_rsc[IGTK_PN_SIZE]; 5856 u8 igtk_key[WMI_MAX_KEY_LEN]; 5857 u8 gtk_key_index; 5858 u8 gtk_key_length; 5859 u8 gtk_key_rsc[GTK_REPLAY_COUNTER_BYTES]; 5860 u8 gtk_key[WMI_MAX_KEY_LEN]; 5861 } __packed; 5862 5863 struct wmi_gtk_rekey_offload_cmd { 5864 __le32 tlv_header; 5865 __le32 vdev_id; 5866 __le32 flags; 5867 u8 kek[GTK_OFFLOAD_KEK_BYTES]; 5868 u8 kck[GTK_OFFLOAD_KCK_BYTES]; 5869 u8 replay_ctr[GTK_REPLAY_COUNTER_BYTES]; 5870 } __packed; 5871 5872 struct wmi_sta_keepalive_cmd { 5873 __le32 tlv_header; 5874 __le32 vdev_id; 5875 __le32 enabled; 5876 5877 /* WMI_STA_KEEPALIVE_METHOD_ */ 5878 __le32 method; 5879 5880 /* in seconds */ 5881 __le32 interval; 5882 5883 /* following this structure is the TLV for struct 5884 * wmi_sta_keepalive_arp_resp_params 5885 */ 5886 } __packed; 5887 5888 struct wmi_sta_keepalive_arp_resp_params { 5889 __le32 tlv_header; 5890 __le32 src_ip4_addr; 5891 __le32 dest_ip4_addr; 5892 struct ath12k_wmi_mac_addr_params dest_mac_addr; 5893 } __packed; 5894 5895 struct wmi_sta_keepalive_arg { 5896 u32 vdev_id; 5897 u32 enabled; 5898 u32 method; 5899 u32 interval; 5900 u32 src_ip4_addr; 5901 u32 dest_ip4_addr; 5902 const u8 dest_mac_addr[ETH_ALEN]; 5903 }; 5904 5905 enum wmi_sta_keepalive_method { 5906 WMI_STA_KEEPALIVE_METHOD_NULL_FRAME = 1, 5907 WMI_STA_KEEPALIVE_METHOD_UNSOLICITED_ARP_RESPONSE = 2, 5908 WMI_STA_KEEPALIVE_METHOD_ETHERNET_LOOPBACK = 3, 5909 WMI_STA_KEEPALIVE_METHOD_GRATUITOUS_ARP_REQUEST = 4, 5910 WMI_STA_KEEPALIVE_METHOD_MGMT_VENDOR_ACTION = 5, 5911 }; 5912 5913 #define WMI_STA_KEEPALIVE_INTERVAL_DEFAULT 30 5914 #define WMI_STA_KEEPALIVE_INTERVAL_DISABLE 0 5915 5916 struct wmi_stats_event { 5917 __le32 stats_id; 5918 __le32 num_pdev_stats; 5919 __le32 num_vdev_stats; 5920 __le32 num_peer_stats; 5921 __le32 num_bcnflt_stats; 5922 __le32 num_chan_stats; 5923 __le32 num_mib_stats; 5924 __le32 pdev_id; 5925 __le32 num_bcn_stats; 5926 __le32 num_peer_extd_stats; 5927 __le32 num_peer_extd2_stats; 5928 } __packed; 5929 5930 enum wmi_stats_id { 5931 WMI_REQUEST_PDEV_STAT = BIT(2), 5932 WMI_REQUEST_VDEV_STAT = BIT(3), 5933 WMI_REQUEST_RSSI_PER_CHAIN_STAT = BIT(8), 5934 WMI_REQUEST_BCN_STAT = BIT(11), 5935 }; 5936 5937 struct wmi_request_stats_cmd { 5938 __le32 tlv_header; 5939 __le32 stats_id; 5940 __le32 vdev_id; 5941 struct ath12k_wmi_mac_addr_params peer_macaddr; 5942 __le32 pdev_id; 5943 } __packed; 5944 5945 struct wmi_rssi_stat_params { 5946 __le32 vdev_id; 5947 __le32 rssi_avg_beacon[WMI_MAX_CHAINS]; 5948 __le32 rssi_avg_data[WMI_MAX_CHAINS]; 5949 struct ath12k_wmi_mac_addr_params peer_macaddr; 5950 } __packed; 5951 5952 struct wmi_per_chain_rssi_stat_params { 5953 __le32 num_per_chain_rssi; 5954 } __packed; 5955 5956 #define WLAN_MAX_AC 4 5957 #define MAX_TX_RATE_VALUES 10 5958 5959 struct wmi_vdev_stats_params { 5960 __le32 vdev_id; 5961 __le32 beacon_snr; 5962 __le32 data_snr; 5963 __le32 num_tx_frames[WLAN_MAX_AC]; 5964 __le32 num_rx_frames; 5965 __le32 num_tx_frames_retries[WLAN_MAX_AC]; 5966 __le32 num_tx_frames_failures[WLAN_MAX_AC]; 5967 __le32 num_rts_fail; 5968 __le32 num_rts_success; 5969 __le32 num_rx_err; 5970 __le32 num_rx_discard; 5971 __le32 num_tx_not_acked; 5972 __le32 tx_rate_history[MAX_TX_RATE_VALUES]; 5973 __le32 beacon_rssi_history[MAX_TX_RATE_VALUES]; 5974 } __packed; 5975 5976 struct ath12k_wmi_bcn_stats_params { 5977 __le32 vdev_id; 5978 __le32 tx_bcn_succ_cnt; 5979 __le32 tx_bcn_outage_cnt; 5980 } __packed; 5981 5982 struct ath12k_wmi_pdev_base_stats_params { 5983 a_sle32 chan_nf; 5984 __le32 tx_frame_count; /* Cycles spent transmitting frames */ 5985 __le32 rx_frame_count; /* Cycles spent receiving frames */ 5986 __le32 rx_clear_count; /* Total channel busy time, evidently */ 5987 __le32 cycle_count; /* Total on-channel time */ 5988 __le32 phy_err_count; 5989 __le32 chan_tx_pwr; 5990 } __packed; 5991 5992 struct ath12k_wmi_pdev_tx_stats_params { 5993 a_sle32 comp_queued; 5994 a_sle32 comp_delivered; 5995 a_sle32 msdu_enqued; 5996 a_sle32 mpdu_enqued; 5997 a_sle32 wmm_drop; 5998 a_sle32 local_enqued; 5999 a_sle32 local_freed; 6000 a_sle32 hw_queued; 6001 a_sle32 hw_reaped; 6002 a_sle32 underrun; 6003 a_sle32 tx_abort; 6004 a_sle32 mpdus_requed; 6005 __le32 tx_ko; 6006 __le32 data_rc; 6007 __le32 self_triggers; 6008 __le32 sw_retry_failure; 6009 __le32 illgl_rate_phy_err; 6010 __le32 pdev_cont_xretry; 6011 __le32 pdev_tx_timeout; 6012 __le32 pdev_resets; 6013 __le32 stateless_tid_alloc_failure; 6014 __le32 phy_underrun; 6015 __le32 txop_ovf; 6016 } __packed; 6017 6018 struct ath12k_wmi_pdev_rx_stats_params { 6019 a_sle32 mid_ppdu_route_change; 6020 a_sle32 status_rcvd; 6021 a_sle32 r0_frags; 6022 a_sle32 r1_frags; 6023 a_sle32 r2_frags; 6024 a_sle32 r3_frags; 6025 a_sle32 htt_msdus; 6026 a_sle32 htt_mpdus; 6027 a_sle32 loc_msdus; 6028 a_sle32 loc_mpdus; 6029 a_sle32 oversize_amsdu; 6030 a_sle32 phy_errs; 6031 a_sle32 phy_err_drop; 6032 a_sle32 mpdu_errs; 6033 } __packed; 6034 6035 struct ath12k_wmi_pdev_stats_params { 6036 struct ath12k_wmi_pdev_base_stats_params base; 6037 struct ath12k_wmi_pdev_tx_stats_params tx; 6038 struct ath12k_wmi_pdev_rx_stats_params rx; 6039 } __packed; 6040 6041 struct ath12k_fw_stats_req_params { 6042 u32 stats_id; 6043 u32 vdev_id; 6044 u32 pdev_id; 6045 }; 6046 6047 #define WMI_REQ_CTRL_PATH_PDEV_TX_STAT 1 6048 #define WMI_REQUEST_CTRL_PATH_STAT_GET 1 6049 6050 #define WMI_TPC_CONFIG BIT(1) 6051 #define WMI_TPC_REG_PWR_ALLOWED BIT(2) 6052 #define WMI_TPC_RATES_ARRAY1 BIT(3) 6053 #define WMI_TPC_RATES_ARRAY2 BIT(4) 6054 #define WMI_TPC_RATES_DL_OFDMA_ARRAY BIT(5) 6055 #define WMI_TPC_CTL_PWR_ARRAY BIT(6) 6056 #define WMI_TPC_CONFIG_PARAM 0x1 6057 #define ATH12K_TPC_RATE_ARRAY_MU GENMASK(15, 8) 6058 #define ATH12K_TPC_RATE_ARRAY_SU GENMASK(7, 0) 6059 #define TPC_STATS_REG_PWR_ALLOWED_TYPE 0 6060 6061 enum wmi_halphy_ctrl_path_stats_id { 6062 WMI_HALPHY_PDEV_TX_SU_STATS = 0, 6063 WMI_HALPHY_PDEV_TX_SUTXBF_STATS, 6064 WMI_HALPHY_PDEV_TX_MU_STATS, 6065 WMI_HALPHY_PDEV_TX_MUTXBF_STATS, 6066 WMI_HALPHY_PDEV_TX_STATS_MAX, 6067 }; 6068 6069 enum ath12k_wmi_tpc_stats_rates_array { 6070 ATH12K_TPC_STATS_RATES_ARRAY1, 6071 ATH12K_TPC_STATS_RATES_ARRAY2, 6072 }; 6073 6074 enum ath12k_wmi_tpc_stats_ctl_array { 6075 ATH12K_TPC_STATS_CTL_ARRAY, 6076 ATH12K_TPC_STATS_CTL_160ARRAY, 6077 }; 6078 6079 enum ath12k_wmi_tpc_stats_events { 6080 ATH12K_TPC_STATS_CONFIG_REG_PWR_EVENT, 6081 ATH12K_TPC_STATS_RATES_EVENT1, 6082 ATH12K_TPC_STATS_RATES_EVENT2, 6083 ATH12K_TPC_STATS_CTL_TABLE_EVENT 6084 }; 6085 6086 struct wmi_request_halphy_ctrl_path_stats_cmd_fixed_params { 6087 __le32 tlv_header; 6088 __le32 stats_id_mask; 6089 __le32 request_id; 6090 __le32 action; 6091 __le32 subid; 6092 } __packed; 6093 6094 struct ath12k_wmi_pdev_tpc_stats_event_fixed_params { 6095 __le32 pdev_id; 6096 __le32 end_of_event; 6097 __le32 event_count; 6098 } __packed; 6099 6100 struct wmi_tpc_config_params { 6101 __le32 reg_domain; 6102 __le32 chan_freq; 6103 __le32 phy_mode; 6104 __le32 twice_antenna_reduction; 6105 __le32 twice_max_reg_power; 6106 __le32 twice_antenna_gain; 6107 __le32 power_limit; 6108 __le32 rate_max; 6109 __le32 num_tx_chain; 6110 __le32 ctl; 6111 __le32 flags; 6112 __le32 caps; 6113 } __packed; 6114 6115 struct wmi_max_reg_power_fixed_params { 6116 __le32 reg_power_type; 6117 __le32 reg_array_len; 6118 __le32 d1; 6119 __le32 d2; 6120 __le32 d3; 6121 __le32 d4; 6122 } __packed; 6123 6124 struct wmi_max_reg_power_allowed_arg { 6125 struct wmi_max_reg_power_fixed_params tpc_reg_pwr; 6126 s16 *reg_pwr_array; 6127 }; 6128 6129 struct wmi_tpc_rates_array_fixed_params { 6130 __le32 rate_array_type; 6131 __le32 rate_array_len; 6132 } __packed; 6133 6134 struct wmi_tpc_rates_array_arg { 6135 struct wmi_tpc_rates_array_fixed_params tpc_rates_array; 6136 s16 *rate_array; 6137 }; 6138 6139 struct wmi_tpc_ctl_pwr_fixed_params { 6140 __le32 ctl_array_type; 6141 __le32 ctl_array_len; 6142 __le32 end_of_ctl_pwr; 6143 __le32 ctl_pwr_count; 6144 __le32 d1; 6145 __le32 d2; 6146 __le32 d3; 6147 __le32 d4; 6148 } __packed; 6149 6150 struct wmi_tpc_ctl_pwr_table_arg { 6151 struct wmi_tpc_ctl_pwr_fixed_params tpc_ctl_pwr; 6152 s8 *ctl_pwr_table; 6153 }; 6154 6155 struct wmi_tpc_stats_arg { 6156 u32 pdev_id; 6157 u32 event_count; 6158 u32 end_of_event; 6159 u32 tlvs_rcvd; 6160 struct wmi_max_reg_power_allowed_arg max_reg_allowed_power; 6161 struct wmi_tpc_rates_array_arg rates_array1; 6162 struct wmi_tpc_rates_array_arg rates_array2; 6163 struct wmi_tpc_config_params tpc_config; 6164 struct wmi_tpc_ctl_pwr_table_arg ctl_array; 6165 }; 6166 6167 struct wmi_vdev_ch_power_params { 6168 __le32 tlv_header; 6169 6170 /* Channel center frequency (MHz) */ 6171 __le32 chan_cfreq; 6172 6173 /* Unit: dBm, either PSD/EIRP power for this frequency or 6174 * incremental for non-PSD BW 6175 */ 6176 __le32 tx_power; 6177 } __packed; 6178 6179 struct wmi_vdev_set_tpc_power_cmd { 6180 __le32 tlv_header; 6181 __le32 vdev_id; 6182 6183 /* Value: 0 or 1, is PSD power or not */ 6184 __le32 psd_power; 6185 6186 /* Maximum EIRP power (dBm units), valid only if power is PSD */ 6187 __le32 eirp_power; 6188 6189 /* Type: WMI_6GHZ_REG_TYPE, used for halphy CTL lookup */ 6190 __le32 power_type_6ghz; 6191 6192 /* This fixed_param TLV is followed by the below TLVs: 6193 * num_pwr_levels of wmi_vdev_ch_power_info 6194 * For PSD power, it is the PSD/EIRP power of the frequency (20 MHz chunks). 6195 * For non-PSD power, the power values are for 20, 40, and till 6196 * BSS BW power levels. 6197 * The num_pwr_levels will be checked by sw how many elements present 6198 * in the variable-length array. 6199 */ 6200 } __packed; 6201 6202 #define CRTL_F_DYNC_FORCE_LINK_NUM GENMASK(3, 2) 6203 6204 struct wmi_mlo_link_set_active_cmd { 6205 __le32 tlv_header; 6206 __le32 force_mode; 6207 __le32 reason; 6208 __le32 use_ieee_link_id_bitmap; 6209 struct ath12k_wmi_mac_addr_params ap_mld_mac_addr; 6210 __le32 ctrl_flags; 6211 } __packed; 6212 6213 struct wmi_mlo_set_active_link_number_params { 6214 __le32 tlv_header; 6215 __le32 num_of_link; 6216 __le32 vdev_type; 6217 __le32 vdev_subtype; 6218 __le32 home_freq; 6219 } __packed; 6220 6221 #define WMI_DISALW_MLO_MODE_BMAP_IEEE_LINK_ID_COMB_1 GENMASK(7, 0) 6222 #define WMI_DISALW_MLO_MODE_BMAP_IEEE_LINK_ID_COMB_2 GENMASK(15, 8) 6223 #define WMI_DISALW_MLO_MODE_BMAP_IEEE_LINK_ID_COMB_3 GENMASK(23, 16) 6224 #define WMI_DISALW_MLO_MODE_BMAP_IEEE_LINK_ID_COMB_4 GENMASK(31, 24) 6225 6226 struct wmi_disallowed_mlo_mode_bitmap_params { 6227 __le32 tlv_header; 6228 __le32 disallowed_mode_bitmap; 6229 __le32 ieee_link_id_comb; 6230 } __packed; 6231 6232 enum wmi_mlo_link_force_mode { 6233 WMI_MLO_LINK_FORCE_MODE_ACTIVE = 1, 6234 WMI_MLO_LINK_FORCE_MODE_INACTIVE = 2, 6235 WMI_MLO_LINK_FORCE_MODE_ACTIVE_LINK_NUM = 3, 6236 WMI_MLO_LINK_FORCE_MODE_INACTIVE_LINK_NUM = 4, 6237 WMI_MLO_LINK_FORCE_MODE_NO_FORCE = 5, 6238 WMI_MLO_LINK_FORCE_MODE_ACTIVE_INACTIVE = 6, 6239 WMI_MLO_LINK_FORCE_MODE_NON_FORCE_UPDATE = 7, 6240 }; 6241 6242 enum wmi_mlo_link_force_reason { 6243 WMI_MLO_LINK_FORCE_REASON_NEW_CONNECT = 1, 6244 WMI_MLO_LINK_FORCE_REASON_NEW_DISCONNECT = 2, 6245 WMI_MLO_LINK_FORCE_REASON_LINK_REMOVAL = 3, 6246 WMI_MLO_LINK_FORCE_REASON_TDLS = 4, 6247 WMI_MLO_LINK_FORCE_REASON_REVERT_FAILURE = 5, 6248 WMI_MLO_LINK_FORCE_REASON_LINK_DELETE = 6, 6249 WMI_MLO_LINK_FORCE_REASON_SINGLE_LINK_EMLSR_OP = 7, 6250 }; 6251 6252 struct wmi_mlo_link_num_arg { 6253 u32 num_of_link; 6254 u32 vdev_type; 6255 u32 vdev_subtype; 6256 u32 home_freq; 6257 }; 6258 6259 struct wmi_mlo_control_flags_arg { 6260 bool overwrite_force_active_bitmap; 6261 bool overwrite_force_inactive_bitmap; 6262 bool dync_force_link_num; 6263 bool post_re_evaluate; 6264 u8 post_re_evaluate_loops; 6265 bool dont_reschedule_workqueue; 6266 }; 6267 6268 struct wmi_ml_link_force_cmd_arg { 6269 u8 ap_mld_mac_addr[ETH_ALEN]; 6270 u16 ieee_link_id_bitmap; 6271 u16 ieee_link_id_bitmap2; 6272 u8 link_num; 6273 }; 6274 6275 struct wmi_ml_disallow_mode_bmap_arg { 6276 u32 disallowed_mode; 6277 union { 6278 u32 ieee_link_id_comb; 6279 u8 ieee_link_id[4]; 6280 }; 6281 }; 6282 6283 /* maximum size of link number param array 6284 * for MLO link set active command 6285 */ 6286 #define WMI_MLO_LINK_NUM_SZ 2 6287 6288 /* maximum size of vdev bitmap array for 6289 * MLO link set active command 6290 */ 6291 #define WMI_MLO_VDEV_BITMAP_SZ 2 6292 6293 /* Max number of disallowed bitmap combination 6294 * sent to firmware 6295 */ 6296 #define WMI_ML_MAX_DISALLOW_BMAP_COMB 4 6297 6298 struct wmi_mlo_link_set_active_arg { 6299 enum wmi_mlo_link_force_mode force_mode; 6300 enum wmi_mlo_link_force_reason reason; 6301 u32 num_link_entry; 6302 u32 num_vdev_bitmap; 6303 u32 num_inactive_vdev_bitmap; 6304 struct wmi_mlo_link_num_arg link_num[WMI_MLO_LINK_NUM_SZ]; 6305 u32 vdev_bitmap[WMI_MLO_VDEV_BITMAP_SZ]; 6306 u32 inactive_vdev_bitmap[WMI_MLO_VDEV_BITMAP_SZ]; 6307 struct wmi_mlo_control_flags_arg ctrl_flags; 6308 bool use_ieee_link_id; 6309 struct wmi_ml_link_force_cmd_arg force_cmd; 6310 u32 num_disallow_mode_comb; 6311 struct wmi_ml_disallow_mode_bmap_arg disallow_bmap[WMI_ML_MAX_DISALLOW_BMAP_COMB]; 6312 }; 6313 6314 #define ATH12K_MAX_20MHZ_SEGMENTS 16 6315 #define ATH12K_MAX_NUM_ANTENNA 8 6316 #define ATH12K_MAX_NUM_NF_HW_DBM 32 6317 6318 struct ath12k_wmi_rssi_dbm_conv_info_fixed_params { 6319 __le32 pdev_id; 6320 } __packed; 6321 6322 struct ath12k_wmi_rssi_dbm_conv_info_params { 6323 __le32 curr_bw; 6324 __le32 curr_rx_chainmask; 6325 __le32 xbar_config; 6326 a_sle32 xlna_bypass_offset; 6327 a_sle32 xlna_bypass_threshold; 6328 a_sle32 nf_hw_dbm[ATH12K_MAX_NUM_NF_HW_DBM]; 6329 } __packed; 6330 6331 struct ath12k_wmi_rssi_dbm_conv_temp_info_params { 6332 a_sle32 offset; 6333 } __packed; 6334 6335 struct ath12k_wmi_rssi_dbm_conv_param_arg { 6336 u32 curr_bw; 6337 u32 curr_rx_chainmask; 6338 u32 xbar_config; 6339 s32 xlna_bypass_offset; 6340 s32 xlna_bypass_threshold; 6341 s8 nf_hw_dbm[ATH12K_MAX_NUM_ANTENNA][ATH12K_MAX_20MHZ_SEGMENTS]; 6342 }; 6343 6344 struct ath12k_wmi_rssi_dbm_conv_info_arg { 6345 bool temp_offset_present; 6346 s32 temp_offset; 6347 bool nf_dbm_present; 6348 s8 min_nf_dbm; 6349 }; 6350 6351 /* each WMI cmd can hold 58 channel entries at most */ 6352 #define ATH12K_WMI_MAX_NUM_CHAN_PER_CMD 58 6353 6354 #define ATH12K_OBSS_PD_THRESHOLD_IN_DBM BIT(29) 6355 #define ATH12K_OBSS_PD_SRG_EN BIT(30) 6356 #define ATH12K_OBSS_PD_NON_SRG_EN BIT(31) 6357 6358 struct ath12k_wmi_obss_pd_arg { 6359 bool srp_support; 6360 bool srg_enabled; 6361 bool non_srg_enabled; 6362 s8 srg_th; 6363 s8 non_srg_th; 6364 }; 6365 6366 int ath12k_wmi_cmd_send(struct ath12k_wmi_pdev *wmi, struct sk_buff *skb, 6367 u32 cmd_id); 6368 struct sk_buff *ath12k_wmi_alloc_skb(struct ath12k_wmi_base *wmi_sc, u32 len); 6369 int ath12k_wmi_mgmt_send(struct ath12k_link_vif *arvif, u32 buf_id, 6370 struct sk_buff *frame); 6371 int ath12k_wmi_p2p_go_bcn_ie(struct ath12k *ar, u32 vdev_id, 6372 const u8 *p2p_ie); 6373 int ath12k_wmi_bcn_tmpl(struct ath12k_link_vif *arvif, 6374 struct ieee80211_mutable_offsets *offs, 6375 struct sk_buff *bcn, 6376 struct ath12k_wmi_bcn_tmpl_ema_arg *ema_args); 6377 int ath12k_wmi_vdev_down(struct ath12k *ar, u8 vdev_id); 6378 int ath12k_wmi_vdev_up(struct ath12k *ar, struct ath12k_wmi_vdev_up_params *params); 6379 int ath12k_wmi_vdev_stop(struct ath12k *ar, u8 vdev_id); 6380 int ath12k_wmi_vdev_start(struct ath12k *ar, struct wmi_vdev_start_req_arg *arg, 6381 bool restart); 6382 int ath12k_wmi_set_peer_param(struct ath12k *ar, const u8 *peer_addr, 6383 u32 vdev_id, u32 param_id, u32 param_val); 6384 int ath12k_wmi_pdev_set_param(struct ath12k *ar, u32 param_id, 6385 u32 param_value, u8 pdev_id); 6386 int ath12k_wmi_pdev_set_ps_mode(struct ath12k *ar, int vdev_id, u32 enable); 6387 int ath12k_wmi_wait_for_unified_ready(struct ath12k_base *ab); 6388 int ath12k_wmi_cmd_init(struct ath12k_base *ab); 6389 int ath12k_wmi_wait_for_service_ready(struct ath12k_base *ab); 6390 int ath12k_wmi_connect(struct ath12k_base *ab); 6391 int ath12k_wmi_pdev_attach(struct ath12k_base *ab, 6392 u8 pdev_id); 6393 int ath12k_wmi_attach(struct ath12k_base *ab); 6394 void ath12k_wmi_detach(struct ath12k_base *ab); 6395 int ath12k_wmi_vdev_create(struct ath12k *ar, u8 *macaddr, 6396 struct ath12k_wmi_vdev_create_arg *arg); 6397 int ath12k_wmi_send_peer_create_cmd(struct ath12k *ar, 6398 struct ath12k_wmi_peer_create_arg *arg); 6399 int ath12k_wmi_vdev_set_param_cmd(struct ath12k *ar, u32 vdev_id, 6400 u32 param_id, u32 param_value); 6401 6402 int ath12k_wmi_set_sta_ps_param(struct ath12k *ar, u32 vdev_id, 6403 u32 param, u32 param_value); 6404 int ath12k_wmi_force_fw_hang_cmd(struct ath12k *ar, u32 type, u32 delay_time_ms); 6405 int ath12k_wmi_send_peer_delete_cmd(struct ath12k *ar, 6406 const u8 *peer_addr, u8 vdev_id); 6407 int ath12k_wmi_vdev_delete(struct ath12k *ar, u8 vdev_id); 6408 void ath12k_wmi_start_scan_init(struct ath12k *ar, 6409 struct ath12k_wmi_scan_req_arg *arg); 6410 int ath12k_wmi_send_scan_start_cmd(struct ath12k *ar, 6411 struct ath12k_wmi_scan_req_arg *arg); 6412 int ath12k_wmi_send_scan_stop_cmd(struct ath12k *ar, 6413 struct ath12k_wmi_scan_cancel_arg *arg); 6414 int ath12k_wmi_send_wmm_update_cmd(struct ath12k *ar, u32 vdev_id, 6415 struct wmi_wmm_params_all_arg *param); 6416 int ath12k_wmi_pdev_suspend(struct ath12k *ar, u32 suspend_opt, 6417 u32 pdev_id); 6418 int ath12k_wmi_pdev_resume(struct ath12k *ar, u32 pdev_id); 6419 6420 int ath12k_wmi_send_peer_assoc_cmd(struct ath12k *ar, 6421 struct ath12k_wmi_peer_assoc_arg *arg); 6422 int ath12k_wmi_vdev_install_key(struct ath12k *ar, 6423 struct wmi_vdev_install_key_arg *arg); 6424 int ath12k_wmi_pdev_bss_chan_info_request(struct ath12k *ar, 6425 enum wmi_bss_chan_info_req_type type); 6426 int ath12k_wmi_send_pdev_temperature_cmd(struct ath12k *ar); 6427 int ath12k_wmi_send_peer_flush_tids_cmd(struct ath12k *ar, 6428 u8 peer_addr[ETH_ALEN], 6429 u32 peer_tid_bitmap, 6430 u8 vdev_id); 6431 int ath12k_wmi_send_set_ap_ps_param_cmd(struct ath12k *ar, u8 *peer_addr, 6432 struct ath12k_wmi_ap_ps_arg *arg); 6433 int ath12k_wmi_send_scan_chan_list_cmd(struct ath12k *ar, 6434 struct ath12k_wmi_scan_chan_list_arg *arg); 6435 int ath12k_wmi_send_dfs_phyerr_offload_enable_cmd(struct ath12k *ar, 6436 u32 pdev_id); 6437 int ath12k_wmi_addba_clear_resp(struct ath12k *ar, u32 vdev_id, const u8 *mac); 6438 int ath12k_wmi_addba_send(struct ath12k *ar, u32 vdev_id, const u8 *mac, 6439 u32 tid, u32 buf_size); 6440 int ath12k_wmi_addba_set_resp(struct ath12k *ar, u32 vdev_id, const u8 *mac, 6441 u32 tid, u32 status); 6442 int ath12k_wmi_delba_send(struct ath12k *ar, u32 vdev_id, const u8 *mac, 6443 u32 tid, u32 initiator, u32 reason); 6444 int ath12k_wmi_send_bcn_offload_control_cmd(struct ath12k *ar, 6445 u32 vdev_id, u32 bcn_ctrl_op); 6446 int ath12k_wmi_send_init_country_cmd(struct ath12k *ar, 6447 struct ath12k_wmi_init_country_arg *arg); 6448 int 6449 ath12k_wmi_send_set_current_country_cmd(struct ath12k *ar, 6450 struct wmi_set_current_country_arg *arg); 6451 int ath12k_wmi_peer_rx_reorder_queue_setup(struct ath12k *ar, 6452 int vdev_id, const u8 *addr, 6453 dma_addr_t paddr, u8 tid, 6454 u8 ba_window_size_valid, 6455 u32 ba_window_size); 6456 int ath12k_wmi_send_11d_scan_start_cmd(struct ath12k *ar, 6457 struct wmi_11d_scan_start_arg *arg); 6458 int ath12k_wmi_send_11d_scan_stop_cmd(struct ath12k *ar, u32 vdev_id); 6459 int 6460 ath12k_wmi_rx_reord_queue_remove(struct ath12k *ar, 6461 struct ath12k_wmi_rx_reorder_queue_remove_arg *arg); 6462 int ath12k_wmi_send_pdev_set_regdomain(struct ath12k *ar, 6463 struct ath12k_wmi_pdev_set_regdomain_arg *arg); 6464 int ath12k_wmi_simulate_radar(struct ath12k *ar); 6465 int ath12k_wmi_send_twt_enable_cmd(struct ath12k *ar, u32 pdev_id); 6466 int ath12k_wmi_send_twt_disable_cmd(struct ath12k *ar, u32 pdev_id); 6467 int ath12k_wmi_send_obss_spr_cmd(struct ath12k *ar, u32 vdev_id, 6468 struct ieee80211_he_obss_pd *he_obss_pd); 6469 u32 ath12k_wmi_build_obss_pd(const struct ath12k_wmi_obss_pd_arg *arg); 6470 int ath12k_wmi_pdev_set_srg_bss_color_bitmap(struct ath12k *ar, u32 pdev_id, 6471 const u32 *bitmap); 6472 int ath12k_wmi_pdev_set_srg_partial_bssid_bitmap(struct ath12k *ar, u32 pdev_id, 6473 const u32 *bitmap); 6474 int ath12k_wmi_pdev_srg_obss_color_enable_bitmap(struct ath12k *ar, u32 pdev_id, 6475 const u32 *bitmap); 6476 int ath12k_wmi_pdev_srg_obss_bssid_enable_bitmap(struct ath12k *ar, u32 pdev_id, 6477 const u32 *bitmap); 6478 int ath12k_wmi_pdev_non_srg_obss_color_enable_bitmap(struct ath12k *ar, u32 pdev_id, 6479 const u32 *bitmap); 6480 int ath12k_wmi_pdev_non_srg_obss_bssid_enable_bitmap(struct ath12k *ar, u32 pdev_id, 6481 const u32 *bitmap); 6482 int ath12k_wmi_obss_color_cfg_cmd(struct ath12k *ar, u32 vdev_id, 6483 u8 bss_color, u32 period, 6484 bool enable); 6485 int ath12k_wmi_send_bss_color_change_enable_cmd(struct ath12k *ar, u32 vdev_id, 6486 bool enable); 6487 int ath12k_wmi_pdev_lro_cfg(struct ath12k *ar, int pdev_id); 6488 int ath12k_wmi_pdev_dma_ring_cfg(struct ath12k *ar, 6489 struct ath12k_wmi_pdev_dma_ring_cfg_arg *arg); 6490 int ath12k_wmi_vdev_spectral_enable(struct ath12k *ar, u32 vdev_id, 6491 u32 trigger, u32 enable); 6492 int ath12k_wmi_vdev_spectral_conf(struct ath12k *ar, 6493 struct ath12k_wmi_vdev_spectral_conf_arg *arg); 6494 int ath12k_wmi_fils_discovery_tmpl(struct ath12k *ar, u32 vdev_id, 6495 struct sk_buff *tmpl); 6496 int ath12k_wmi_fils_discovery(struct ath12k *ar, u32 vdev_id, u32 interval, 6497 bool unsol_bcast_probe_resp_enabled); 6498 int ath12k_wmi_probe_resp_tmpl(struct ath12k *ar, u32 vdev_id, 6499 struct sk_buff *tmpl); 6500 int ath12k_wmi_set_hw_mode(struct ath12k_base *ab, 6501 enum wmi_host_hw_mode_config_type mode); 6502 int ath12k_wmi_set_bios_cmd(struct ath12k_base *ab, u32 param_id, 6503 const u8 *buf, size_t buf_len); 6504 int ath12k_wmi_set_bios_sar_cmd(struct ath12k_base *ab, const u8 *psar_table); 6505 int ath12k_wmi_set_bios_geo_cmd(struct ath12k_base *ab, const u8 *pgeo_table); 6506 int ath12k_wmi_send_stats_request_cmd(struct ath12k *ar, u32 stats_id, 6507 u32 vdev_id, u32 pdev_id); 6508 __le32 ath12k_wmi_tlv_hdr(u32 cmd, u32 len); 6509 6510 int ath12k_wmi_send_tpc_stats_request(struct ath12k *ar, 6511 enum wmi_halphy_ctrl_path_stats_id tpc_stats_type); 6512 void ath12k_wmi_free_tpc_stats_mem(struct ath12k *ar); 6513 6514 static inline u32 6515 ath12k_wmi_caps_ext_get_pdev_id(const struct ath12k_wmi_caps_ext_params *param) 6516 { 6517 return le32_get_bits(param->pdev_and_hw_link_ids, WMI_CAPS_PARAMS_PDEV_ID); 6518 } 6519 6520 static inline u32 6521 ath12k_wmi_caps_ext_get_hw_link_id(const struct ath12k_wmi_caps_ext_params *param) 6522 { 6523 return le32_get_bits(param->pdev_and_hw_link_ids, WMI_CAPS_PARAMS_HW_LINK_ID); 6524 } 6525 6526 static inline u32 6527 ath12k_wmi_mac_phy_get_pdev_id(const struct ath12k_wmi_mac_phy_caps_params *param) 6528 { 6529 return le32_get_bits(param->pdev_and_hw_link_ids, 6530 WMI_CAPS_PARAMS_PDEV_ID); 6531 } 6532 6533 static inline u32 6534 ath12k_wmi_mac_phy_get_hw_link_id(const struct ath12k_wmi_mac_phy_caps_params *param) 6535 { 6536 return le32_get_bits(param->pdev_and_hw_link_ids, 6537 WMI_CAPS_PARAMS_HW_LINK_ID); 6538 } 6539 6540 int ath12k_wmi_wow_host_wakeup_ind(struct ath12k *ar); 6541 int ath12k_wmi_wow_enable(struct ath12k *ar); 6542 int ath12k_wmi_wow_del_pattern(struct ath12k *ar, u32 vdev_id, u32 pattern_id); 6543 int ath12k_wmi_wow_add_pattern(struct ath12k *ar, u32 vdev_id, u32 pattern_id, 6544 const u8 *pattern, const u8 *mask, 6545 int pattern_len, int pattern_offset); 6546 int ath12k_wmi_wow_add_wakeup_event(struct ath12k *ar, u32 vdev_id, 6547 enum wmi_wow_wakeup_event event, 6548 u32 enable); 6549 int ath12k_wmi_wow_config_pno(struct ath12k *ar, u32 vdev_id, 6550 struct wmi_pno_scan_req_arg *pno_scan); 6551 int ath12k_wmi_hw_data_filter_cmd(struct ath12k *ar, 6552 struct wmi_hw_data_filter_arg *arg); 6553 int ath12k_wmi_arp_ns_offload(struct ath12k *ar, 6554 struct ath12k_link_vif *arvif, 6555 struct wmi_arp_ns_offload_arg *offload, 6556 bool enable); 6557 int ath12k_wmi_gtk_rekey_offload(struct ath12k *ar, 6558 struct ath12k_link_vif *arvif, bool enable); 6559 int ath12k_wmi_gtk_rekey_getinfo(struct ath12k *ar, 6560 struct ath12k_link_vif *arvif); 6561 int ath12k_wmi_sta_keepalive(struct ath12k *ar, 6562 const struct wmi_sta_keepalive_arg *arg); 6563 int ath12k_wmi_mlo_setup(struct ath12k *ar, struct wmi_mlo_setup_arg *mlo_params); 6564 int ath12k_wmi_mlo_ready(struct ath12k *ar); 6565 int ath12k_wmi_mlo_teardown(struct ath12k *ar); 6566 void ath12k_wmi_fw_stats_dump(struct ath12k *ar, 6567 struct ath12k_fw_stats *fw_stats, u32 stats_id, 6568 char *buf); 6569 bool ath12k_wmi_supports_6ghz_cc_ext(struct ath12k *ar); 6570 int ath12k_wmi_send_vdev_set_tpc_power(struct ath12k *ar, 6571 u32 vdev_id, 6572 struct ath12k_reg_tpc_power_info *param); 6573 int ath12k_wmi_send_mlo_link_set_active_cmd(struct ath12k_base *ab, 6574 struct wmi_mlo_link_set_active_arg *param); 6575 #endif 6576