1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */ 2 /* 3 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved. 4 * Copyright (c) 2021-2025 Qualcomm Innovation Center, Inc. All rights reserved. 5 */ 6 7 #ifndef ATH12K_WMI_H 8 #define ATH12K_WMI_H 9 10 #include <net/mac80211.h> 11 #include "htc.h" 12 13 /* Naming conventions for structures: 14 * 15 * _cmd means that this is a firmware command sent from host to firmware. 16 * 17 * _event means that this is a firmware event sent from firmware to host 18 * 19 * _params is a structure which is embedded either into _cmd or _event (or 20 * both), it is not sent individually. 21 * 22 * _arg is used inside the host, the firmware does not see that at all. 23 */ 24 25 struct ath12k_base; 26 struct ath12k; 27 struct ath12k_link_vif; 28 struct ath12k_fw_stats; 29 30 /* There is no signed version of __le32, so for a temporary solution come 31 * up with our own version. The idea is from fs/ntfs/endian.h. 32 * 33 * Use a_ prefix so that it doesn't conflict if we get proper support to 34 * linux/types.h. 35 */ 36 typedef __s32 __bitwise a_sle32; 37 38 static inline a_sle32 a_cpu_to_sle32(s32 val) 39 { 40 return (__force a_sle32)cpu_to_le32(val); 41 } 42 43 static inline s32 a_sle32_to_cpu(a_sle32 val) 44 { 45 return le32_to_cpu((__force __le32)val); 46 } 47 48 /* defines to set Packet extension values which can be 0 us, 8 usec or 16 usec */ 49 #define MAX_HE_NSS 8 50 #define MAX_HE_MODULATION 8 51 #define MAX_HE_RU 4 52 #define HE_MODULATION_NONE 7 53 #define HE_PET_0_USEC 0 54 #define HE_PET_8_USEC 1 55 #define HE_PET_16_USEC 2 56 57 #define WMI_MAX_CHAINS 8 58 59 #define WMI_MAX_NUM_SS MAX_HE_NSS 60 #define WMI_MAX_NUM_RU MAX_HE_RU 61 62 #define WMI_TLV_CMD(grp_id) (((grp_id) << 12) | 0x1) 63 #define WMI_TLV_EV(grp_id) (((grp_id) << 12) | 0x1) 64 #define WMI_TLV_CMD_UNSUPPORTED 0 65 #define WMI_TLV_PDEV_PARAM_UNSUPPORTED 0 66 #define WMI_TLV_VDEV_PARAM_UNSUPPORTED 0 67 68 struct wmi_cmd_hdr { 69 __le32 cmd_id; 70 } __packed; 71 72 struct wmi_tlv { 73 __le32 header; 74 u8 value[]; 75 } __packed; 76 77 #define WMI_TLV_LEN GENMASK(15, 0) 78 #define WMI_TLV_TAG GENMASK(31, 16) 79 #define TLV_HDR_SIZE sizeof_field(struct wmi_tlv, header) 80 81 #define WMI_CMD_HDR_CMD_ID GENMASK(23, 0) 82 #define WMI_MAX_MEM_REQS 32 83 #define ATH12K_MAX_HW_LISTEN_INTERVAL 5 84 85 #define WMI_HOST_RC_DS_FLAG 0x01 86 #define WMI_HOST_RC_CW40_FLAG 0x02 87 #define WMI_HOST_RC_SGI_FLAG 0x04 88 #define WMI_HOST_RC_HT_FLAG 0x08 89 #define WMI_HOST_RC_RTSCTS_FLAG 0x10 90 #define WMI_HOST_RC_TX_STBC_FLAG 0x20 91 #define WMI_HOST_RC_RX_STBC_FLAG 0xC0 92 #define WMI_HOST_RC_RX_STBC_FLAG_S 6 93 #define WMI_HOST_RC_WEP_TKIP_FLAG 0x100 94 #define WMI_HOST_RC_TS_FLAG 0x200 95 #define WMI_HOST_RC_UAPSD_FLAG 0x400 96 97 #define WMI_HT_CAP_ENABLED 0x0001 98 #define WMI_HT_CAP_HT20_SGI 0x0002 99 #define WMI_HT_CAP_DYNAMIC_SMPS 0x0004 100 #define WMI_HT_CAP_TX_STBC 0x0008 101 #define WMI_HT_CAP_TX_STBC_MASK_SHIFT 3 102 #define WMI_HT_CAP_RX_STBC 0x0030 103 #define WMI_HT_CAP_RX_STBC_MASK_SHIFT 4 104 #define WMI_HT_CAP_LDPC 0x0040 105 #define WMI_HT_CAP_L_SIG_TXOP_PROT 0x0080 106 #define WMI_HT_CAP_MPDU_DENSITY 0x0700 107 #define WMI_HT_CAP_MPDU_DENSITY_MASK_SHIFT 8 108 #define WMI_HT_CAP_HT40_SGI 0x0800 109 #define WMI_HT_CAP_RX_LDPC 0x1000 110 #define WMI_HT_CAP_TX_LDPC 0x2000 111 #define WMI_HT_CAP_IBF_BFER 0x4000 112 113 /* These macros should be used when we wish to advertise STBC support for 114 * only 1SS or 2SS or 3SS. 115 */ 116 #define WMI_HT_CAP_RX_STBC_1SS 0x0010 117 #define WMI_HT_CAP_RX_STBC_2SS 0x0020 118 #define WMI_HT_CAP_RX_STBC_3SS 0x0030 119 120 #define WMI_HT_CAP_DEFAULT_ALL (WMI_HT_CAP_ENABLED | \ 121 WMI_HT_CAP_HT20_SGI | \ 122 WMI_HT_CAP_HT40_SGI | \ 123 WMI_HT_CAP_TX_STBC | \ 124 WMI_HT_CAP_RX_STBC | \ 125 WMI_HT_CAP_LDPC) 126 127 #define WMI_VHT_CAP_MAX_MPDU_LEN_MASK 0x00000003 128 #define WMI_VHT_CAP_RX_LDPC 0x00000010 129 #define WMI_VHT_CAP_SGI_80MHZ 0x00000020 130 #define WMI_VHT_CAP_SGI_160MHZ 0x00000040 131 #define WMI_VHT_CAP_TX_STBC 0x00000080 132 #define WMI_VHT_CAP_RX_STBC_MASK 0x00000300 133 #define WMI_VHT_CAP_RX_STBC_MASK_SHIFT 8 134 #define WMI_VHT_CAP_SU_BFER 0x00000800 135 #define WMI_VHT_CAP_SU_BFEE 0x00001000 136 #define WMI_VHT_CAP_MAX_CS_ANT_MASK 0x0000E000 137 #define WMI_VHT_CAP_MAX_CS_ANT_MASK_SHIFT 13 138 #define WMI_VHT_CAP_MAX_SND_DIM_MASK 0x00070000 139 #define WMI_VHT_CAP_MAX_SND_DIM_MASK_SHIFT 16 140 #define WMI_VHT_CAP_MU_BFER 0x00080000 141 #define WMI_VHT_CAP_MU_BFEE 0x00100000 142 #define WMI_VHT_CAP_MAX_AMPDU_LEN_EXP 0x03800000 143 #define WMI_VHT_CAP_MAX_AMPDU_LEN_EXP_SHIT 23 144 #define WMI_VHT_CAP_RX_FIXED_ANT 0x10000000 145 #define WMI_VHT_CAP_TX_FIXED_ANT 0x20000000 146 147 #define WMI_VHT_CAP_MAX_MPDU_LEN_11454 0x00000002 148 149 /* These macros should be used when we wish to advertise STBC support for 150 * only 1SS or 2SS or 3SS. 151 */ 152 #define WMI_VHT_CAP_RX_STBC_1SS 0x00000100 153 #define WMI_VHT_CAP_RX_STBC_2SS 0x00000200 154 #define WMI_VHT_CAP_RX_STBC_3SS 0x00000300 155 156 #define WMI_VHT_CAP_DEFAULT_ALL (WMI_VHT_CAP_MAX_MPDU_LEN_11454 | \ 157 WMI_VHT_CAP_SGI_80MHZ | \ 158 WMI_VHT_CAP_TX_STBC | \ 159 WMI_VHT_CAP_RX_STBC_MASK | \ 160 WMI_VHT_CAP_RX_LDPC | \ 161 WMI_VHT_CAP_MAX_AMPDU_LEN_EXP | \ 162 WMI_VHT_CAP_RX_FIXED_ANT | \ 163 WMI_VHT_CAP_TX_FIXED_ANT) 164 165 #define WLAN_SCAN_MAX_HINT_S_SSID 10 166 #define WLAN_SCAN_MAX_HINT_BSSID 10 167 #define MAX_RNR_BSS 5 168 169 #define WMI_APPEND_TO_EXISTING_CHAN_LIST_FLAG 1 170 171 #define WMI_BA_MODE_BUFFER_SIZE_256 3 172 173 /* HW mode config type replicated from FW header 174 * @WMI_HOST_HW_MODE_SINGLE: Only one PHY is active. 175 * @WMI_HOST_HW_MODE_DBS: Both PHYs are active in different bands, 176 * one in 2G and another in 5G. 177 * @WMI_HOST_HW_MODE_SBS_PASSIVE: Both PHYs are in passive mode (only rx) in 178 * same band; no tx allowed. 179 * @WMI_HOST_HW_MODE_SBS: Both PHYs are active in the same band. 180 * Support for both PHYs within one band is planned 181 * for 5G only(as indicated in WMI_MAC_PHY_CAPABILITIES), 182 * but could be extended to other bands in the future. 183 * The separation of the band between the two PHYs needs 184 * to be communicated separately. 185 * @WMI_HOST_HW_MODE_DBS_SBS: 3 PHYs, with 2 on the same band doing SBS 186 * as in WMI_HW_MODE_SBS, and 3rd on the other band 187 * @WMI_HOST_HW_MODE_DBS_OR_SBS: Two PHY with one PHY capabale of both 2G and 188 * 5G. It can support SBS (5G + 5G) OR DBS (5G + 2G). 189 * @WMI_HOST_HW_MODE_MAX: Max hw_mode_id. Used to indicate invalid mode. 190 */ 191 enum wmi_host_hw_mode_config_type { 192 WMI_HOST_HW_MODE_SINGLE = 0, 193 WMI_HOST_HW_MODE_DBS = 1, 194 WMI_HOST_HW_MODE_SBS_PASSIVE = 2, 195 WMI_HOST_HW_MODE_SBS = 3, 196 WMI_HOST_HW_MODE_DBS_SBS = 4, 197 WMI_HOST_HW_MODE_DBS_OR_SBS = 5, 198 199 /* keep last */ 200 WMI_HOST_HW_MODE_MAX 201 }; 202 203 /* HW mode priority values used to detect the preferred HW mode 204 * on the available modes. 205 */ 206 enum wmi_host_hw_mode_priority { 207 WMI_HOST_HW_MODE_DBS_SBS_PRI, 208 WMI_HOST_HW_MODE_DBS_PRI, 209 WMI_HOST_HW_MODE_DBS_OR_SBS_PRI, 210 WMI_HOST_HW_MODE_SBS_PRI, 211 WMI_HOST_HW_MODE_SBS_PASSIVE_PRI, 212 WMI_HOST_HW_MODE_SINGLE_PRI, 213 214 /* keep last the lowest priority */ 215 WMI_HOST_HW_MODE_MAX_PRI 216 }; 217 218 enum WMI_HOST_WLAN_BAND { 219 WMI_HOST_WLAN_2G_CAP = 1, 220 WMI_HOST_WLAN_5G_CAP = 2, 221 WMI_HOST_WLAN_2G_5G_CAP = 3, 222 }; 223 224 enum wmi_cmd_group { 225 /* 0 to 2 are reserved */ 226 WMI_GRP_START = 0x3, 227 WMI_GRP_SCAN = WMI_GRP_START, 228 WMI_GRP_PDEV = 0x4, 229 WMI_GRP_VDEV = 0x5, 230 WMI_GRP_PEER = 0x6, 231 WMI_GRP_MGMT = 0x7, 232 WMI_GRP_BA_NEG = 0x8, 233 WMI_GRP_STA_PS = 0x9, 234 WMI_GRP_DFS = 0xa, 235 WMI_GRP_ROAM = 0xb, 236 WMI_GRP_OFL_SCAN = 0xc, 237 WMI_GRP_P2P = 0xd, 238 WMI_GRP_AP_PS = 0xe, 239 WMI_GRP_RATE_CTRL = 0xf, 240 WMI_GRP_PROFILE = 0x10, 241 WMI_GRP_SUSPEND = 0x11, 242 WMI_GRP_BCN_FILTER = 0x12, 243 WMI_GRP_WOW = 0x13, 244 WMI_GRP_RTT = 0x14, 245 WMI_GRP_SPECTRAL = 0x15, 246 WMI_GRP_STATS = 0x16, 247 WMI_GRP_ARP_NS_OFL = 0x17, 248 WMI_GRP_NLO_OFL = 0x18, 249 WMI_GRP_GTK_OFL = 0x19, 250 WMI_GRP_CSA_OFL = 0x1a, 251 WMI_GRP_CHATTER = 0x1b, 252 WMI_GRP_TID_ADDBA = 0x1c, 253 WMI_GRP_MISC = 0x1d, 254 WMI_GRP_GPIO = 0x1e, 255 WMI_GRP_FWTEST = 0x1f, 256 WMI_GRP_TDLS = 0x20, 257 WMI_GRP_RESMGR = 0x21, 258 WMI_GRP_STA_SMPS = 0x22, 259 WMI_GRP_WLAN_HB = 0x23, 260 WMI_GRP_RMC = 0x24, 261 WMI_GRP_MHF_OFL = 0x25, 262 WMI_GRP_LOCATION_SCAN = 0x26, 263 WMI_GRP_OEM = 0x27, 264 WMI_GRP_NAN = 0x28, 265 WMI_GRP_COEX = 0x29, 266 WMI_GRP_OBSS_OFL = 0x2a, 267 WMI_GRP_LPI = 0x2b, 268 WMI_GRP_EXTSCAN = 0x2c, 269 WMI_GRP_DHCP_OFL = 0x2d, 270 WMI_GRP_IPA = 0x2e, 271 WMI_GRP_MDNS_OFL = 0x2f, 272 WMI_GRP_SAP_OFL = 0x30, 273 WMI_GRP_OCB = 0x31, 274 WMI_GRP_SOC = 0x32, 275 WMI_GRP_PKT_FILTER = 0x33, 276 WMI_GRP_MAWC = 0x34, 277 WMI_GRP_PMF_OFFLOAD = 0x35, 278 WMI_GRP_BPF_OFFLOAD = 0x36, 279 WMI_GRP_NAN_DATA = 0x37, 280 WMI_GRP_PROTOTYPE = 0x38, 281 WMI_GRP_MONITOR = 0x39, 282 WMI_GRP_REGULATORY = 0x3a, 283 WMI_GRP_HW_DATA_FILTER = 0x3b, 284 WMI_GRP_WLM = 0x3c, 285 WMI_GRP_11K_OFFLOAD = 0x3d, 286 WMI_GRP_TWT = 0x3e, 287 WMI_GRP_MOTION_DET = 0x3f, 288 WMI_GRP_SPATIAL_REUSE = 0x40, 289 WMI_GRP_MLO = 0x48, 290 }; 291 292 #define WMI_CMD_GRP(grp_id) (((grp_id) << 12) | 0x1) 293 #define WMI_EVT_GRP_START_ID(grp_id) (((grp_id) << 12) | 0x1) 294 295 enum wmi_tlv_cmd_id { 296 WMI_CMD_UNSUPPORTED = 0, 297 WMI_INIT_CMDID = 0x1, 298 WMI_START_SCAN_CMDID = WMI_TLV_CMD(WMI_GRP_SCAN), 299 WMI_STOP_SCAN_CMDID, 300 WMI_SCAN_CHAN_LIST_CMDID, 301 WMI_SCAN_SCH_PRIO_TBL_CMDID, 302 WMI_SCAN_UPDATE_REQUEST_CMDID, 303 WMI_SCAN_PROB_REQ_OUI_CMDID, 304 WMI_SCAN_ADAPTIVE_DWELL_CONFIG_CMDID, 305 WMI_PDEV_SET_REGDOMAIN_CMDID = WMI_TLV_CMD(WMI_GRP_PDEV), 306 WMI_PDEV_SET_CHANNEL_CMDID, 307 WMI_PDEV_SET_PARAM_CMDID, 308 WMI_PDEV_PKTLOG_ENABLE_CMDID, 309 WMI_PDEV_PKTLOG_DISABLE_CMDID, 310 WMI_PDEV_SET_WMM_PARAMS_CMDID, 311 WMI_PDEV_SET_HT_CAP_IE_CMDID, 312 WMI_PDEV_SET_VHT_CAP_IE_CMDID, 313 WMI_PDEV_SET_DSCP_TID_MAP_CMDID, 314 WMI_PDEV_SET_QUIET_MODE_CMDID, 315 WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID, 316 WMI_PDEV_GET_TPC_CONFIG_CMDID, 317 WMI_PDEV_SET_BASE_MACADDR_CMDID, 318 WMI_PDEV_DUMP_CMDID, 319 WMI_PDEV_SET_LED_CONFIG_CMDID, 320 WMI_PDEV_GET_TEMPERATURE_CMDID, 321 WMI_PDEV_SET_LED_FLASHING_CMDID, 322 WMI_PDEV_SMART_ANT_ENABLE_CMDID, 323 WMI_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID, 324 WMI_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID, 325 WMI_PDEV_SET_CTL_TABLE_CMDID, 326 WMI_PDEV_SET_MIMOGAIN_TABLE_CMDID, 327 WMI_PDEV_FIPS_CMDID, 328 WMI_PDEV_GET_ANI_CCK_CONFIG_CMDID, 329 WMI_PDEV_GET_ANI_OFDM_CONFIG_CMDID, 330 WMI_PDEV_GET_NFCAL_POWER_CMDID, 331 WMI_PDEV_GET_TPC_CMDID, 332 WMI_MIB_STATS_ENABLE_CMDID, 333 WMI_PDEV_SET_PCL_CMDID, 334 WMI_PDEV_SET_HW_MODE_CMDID, 335 WMI_PDEV_SET_MAC_CONFIG_CMDID, 336 WMI_PDEV_SET_ANTENNA_MODE_CMDID, 337 WMI_SET_PERIODIC_CHANNEL_STATS_CONFIG_CMDID, 338 WMI_PDEV_WAL_POWER_DEBUG_CMDID, 339 WMI_PDEV_SET_REORDER_TIMEOUT_VAL_CMDID, 340 WMI_PDEV_SET_WAKEUP_CONFIG_CMDID, 341 WMI_PDEV_GET_ANTDIV_STATUS_CMDID, 342 WMI_PDEV_GET_CHIP_POWER_STATS_CMDID, 343 WMI_PDEV_SET_STATS_THRESHOLD_CMDID, 344 WMI_PDEV_MULTIPLE_VDEV_RESTART_REQUEST_CMDID, 345 WMI_PDEV_UPDATE_PKT_ROUTING_CMDID, 346 WMI_PDEV_CHECK_CAL_VERSION_CMDID, 347 WMI_PDEV_SET_DIVERSITY_GAIN_CMDID, 348 WMI_PDEV_DIV_GET_RSSI_ANTID_CMDID, 349 WMI_PDEV_BSS_CHAN_INFO_REQUEST_CMDID, 350 WMI_PDEV_UPDATE_PMK_CACHE_CMDID, 351 WMI_PDEV_UPDATE_FILS_HLP_PKT_CMDID, 352 WMI_PDEV_UPDATE_CTLTABLE_REQUEST_CMDID, 353 WMI_PDEV_CONFIG_VENDOR_OUI_ACTION_CMDID, 354 WMI_PDEV_SET_AC_TX_QUEUE_OPTIMIZED_CMDID, 355 WMI_PDEV_SET_RX_FILTER_PROMISCUOUS_CMDID, 356 WMI_PDEV_DMA_RING_CFG_REQ_CMDID, 357 WMI_PDEV_HE_TB_ACTION_FRM_CMDID, 358 WMI_PDEV_PKTLOG_FILTER_CMDID, 359 WMI_PDEV_SET_BIOS_SAR_TABLE_CMDID = 0x4044, 360 WMI_PDEV_SET_BIOS_GEO_TABLE_CMDID = 0x4045, 361 WMI_PDEV_SET_BIOS_INTERFACE_CMDID = 0x404A, 362 WMI_VDEV_CREATE_CMDID = WMI_TLV_CMD(WMI_GRP_VDEV), 363 WMI_VDEV_DELETE_CMDID, 364 WMI_VDEV_START_REQUEST_CMDID, 365 WMI_VDEV_RESTART_REQUEST_CMDID, 366 WMI_VDEV_UP_CMDID, 367 WMI_VDEV_STOP_CMDID, 368 WMI_VDEV_DOWN_CMDID, 369 WMI_VDEV_SET_PARAM_CMDID, 370 WMI_VDEV_INSTALL_KEY_CMDID, 371 WMI_VDEV_WNM_SLEEPMODE_CMDID, 372 WMI_VDEV_WMM_ADDTS_CMDID, 373 WMI_VDEV_WMM_DELTS_CMDID, 374 WMI_VDEV_SET_WMM_PARAMS_CMDID, 375 WMI_VDEV_SET_GTX_PARAMS_CMDID, 376 WMI_VDEV_IPSEC_NATKEEPALIVE_FILTER_CMDID, 377 WMI_VDEV_PLMREQ_START_CMDID, 378 WMI_VDEV_PLMREQ_STOP_CMDID, 379 WMI_VDEV_TSF_TSTAMP_ACTION_CMDID, 380 WMI_VDEV_SET_IE_CMDID, 381 WMI_VDEV_RATEMASK_CMDID, 382 WMI_VDEV_ATF_REQUEST_CMDID, 383 WMI_VDEV_SET_DSCP_TID_MAP_CMDID, 384 WMI_VDEV_FILTER_NEIGHBOR_RX_PACKETS_CMDID, 385 WMI_VDEV_SET_QUIET_MODE_CMDID, 386 WMI_VDEV_SET_CUSTOM_AGGR_SIZE_CMDID, 387 WMI_VDEV_ENCRYPT_DECRYPT_DATA_REQ_CMDID, 388 WMI_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_CMDID, 389 WMI_PEER_CREATE_CMDID = WMI_TLV_CMD(WMI_GRP_PEER), 390 WMI_PEER_DELETE_CMDID, 391 WMI_PEER_FLUSH_TIDS_CMDID, 392 WMI_PEER_SET_PARAM_CMDID, 393 WMI_PEER_ASSOC_CMDID, 394 WMI_PEER_ADD_WDS_ENTRY_CMDID, 395 WMI_PEER_REMOVE_WDS_ENTRY_CMDID, 396 WMI_PEER_MCAST_GROUP_CMDID, 397 WMI_PEER_INFO_REQ_CMDID, 398 WMI_PEER_GET_ESTIMATED_LINKSPEED_CMDID, 399 WMI_PEER_SET_RATE_REPORT_CONDITION_CMDID, 400 WMI_PEER_UPDATE_WDS_ENTRY_CMDID, 401 WMI_PEER_ADD_PROXY_STA_ENTRY_CMDID, 402 WMI_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID, 403 WMI_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID, 404 WMI_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID, 405 WMI_PEER_ATF_REQUEST_CMDID, 406 WMI_PEER_BWF_REQUEST_CMDID, 407 WMI_PEER_REORDER_QUEUE_SETUP_CMDID, 408 WMI_PEER_REORDER_QUEUE_REMOVE_CMDID, 409 WMI_PEER_SET_RX_BLOCKSIZE_CMDID, 410 WMI_PEER_ANTDIV_INFO_REQ_CMDID, 411 WMI_BCN_TX_CMDID = WMI_TLV_CMD(WMI_GRP_MGMT), 412 WMI_PDEV_SEND_BCN_CMDID, 413 WMI_BCN_TMPL_CMDID, 414 WMI_BCN_FILTER_RX_CMDID, 415 WMI_PRB_REQ_FILTER_RX_CMDID, 416 WMI_MGMT_TX_CMDID, 417 WMI_PRB_TMPL_CMDID, 418 WMI_MGMT_TX_SEND_CMDID, 419 WMI_OFFCHAN_DATA_TX_SEND_CMDID, 420 WMI_PDEV_SEND_FD_CMDID, 421 WMI_BCN_OFFLOAD_CTRL_CMDID, 422 WMI_BSS_COLOR_CHANGE_ENABLE_CMDID, 423 WMI_VDEV_BCN_OFFLOAD_QUIET_CONFIG_CMDID, 424 WMI_FILS_DISCOVERY_TMPL_CMDID, 425 WMI_ADDBA_CLEAR_RESP_CMDID = WMI_TLV_CMD(WMI_GRP_BA_NEG), 426 WMI_ADDBA_SEND_CMDID, 427 WMI_ADDBA_STATUS_CMDID, 428 WMI_DELBA_SEND_CMDID, 429 WMI_ADDBA_SET_RESP_CMDID, 430 WMI_SEND_SINGLEAMSDU_CMDID, 431 WMI_STA_POWERSAVE_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_STA_PS), 432 WMI_STA_POWERSAVE_PARAM_CMDID, 433 WMI_STA_MIMO_PS_MODE_CMDID, 434 WMI_PDEV_DFS_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_DFS), 435 WMI_PDEV_DFS_DISABLE_CMDID, 436 WMI_DFS_PHYERR_FILTER_ENA_CMDID, 437 WMI_DFS_PHYERR_FILTER_DIS_CMDID, 438 WMI_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMDID, 439 WMI_PDEV_DFS_PHYERR_OFFLOAD_DISABLE_CMDID, 440 WMI_VDEV_ADFS_CH_CFG_CMDID, 441 WMI_VDEV_ADFS_OCAC_ABORT_CMDID, 442 WMI_ROAM_SCAN_MODE = WMI_TLV_CMD(WMI_GRP_ROAM), 443 WMI_ROAM_SCAN_RSSI_THRESHOLD, 444 WMI_ROAM_SCAN_PERIOD, 445 WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, 446 WMI_ROAM_AP_PROFILE, 447 WMI_ROAM_CHAN_LIST, 448 WMI_ROAM_SCAN_CMD, 449 WMI_ROAM_SYNCH_COMPLETE, 450 WMI_ROAM_SET_RIC_REQUEST_CMDID, 451 WMI_ROAM_INVOKE_CMDID, 452 WMI_ROAM_FILTER_CMDID, 453 WMI_ROAM_SUBNET_CHANGE_CONFIG_CMDID, 454 WMI_ROAM_CONFIGURE_MAWC_CMDID, 455 WMI_ROAM_SET_MBO_PARAM_CMDID, 456 WMI_ROAM_PER_CONFIG_CMDID, 457 WMI_ROAM_BTM_CONFIG_CMDID, 458 WMI_ENABLE_FILS_CMDID, 459 WMI_OFL_SCAN_ADD_AP_PROFILE = WMI_TLV_CMD(WMI_GRP_OFL_SCAN), 460 WMI_OFL_SCAN_REMOVE_AP_PROFILE, 461 WMI_OFL_SCAN_PERIOD, 462 WMI_P2P_DEV_SET_DEVICE_INFO = WMI_TLV_CMD(WMI_GRP_P2P), 463 WMI_P2P_DEV_SET_DISCOVERABILITY, 464 WMI_P2P_GO_SET_BEACON_IE, 465 WMI_P2P_GO_SET_PROBE_RESP_IE, 466 WMI_P2P_SET_VENDOR_IE_DATA_CMDID, 467 WMI_P2P_DISC_OFFLOAD_CONFIG_CMDID, 468 WMI_P2P_DISC_OFFLOAD_APPIE_CMDID, 469 WMI_P2P_DISC_OFFLOAD_PATTERN_CMDID, 470 WMI_P2P_SET_OPPPS_PARAM_CMDID, 471 WMI_P2P_LISTEN_OFFLOAD_START_CMDID, 472 WMI_P2P_LISTEN_OFFLOAD_STOP_CMDID, 473 WMI_AP_PS_PEER_PARAM_CMDID = WMI_TLV_CMD(WMI_GRP_AP_PS), 474 WMI_AP_PS_PEER_UAPSD_COEX_CMDID, 475 WMI_AP_PS_EGAP_PARAM_CMDID, 476 WMI_PEER_RATE_RETRY_SCHED_CMDID = WMI_TLV_CMD(WMI_GRP_RATE_CTRL), 477 WMI_WLAN_PROFILE_TRIGGER_CMDID = WMI_TLV_CMD(WMI_GRP_PROFILE), 478 WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID, 479 WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID, 480 WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID, 481 WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID, 482 WMI_PDEV_SUSPEND_CMDID = WMI_TLV_CMD(WMI_GRP_SUSPEND), 483 WMI_PDEV_RESUME_CMDID, 484 WMI_ADD_BCN_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_BCN_FILTER), 485 WMI_RMV_BCN_FILTER_CMDID, 486 WMI_WOW_ADD_WAKE_PATTERN_CMDID = WMI_TLV_CMD(WMI_GRP_WOW), 487 WMI_WOW_DEL_WAKE_PATTERN_CMDID, 488 WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID, 489 WMI_WOW_ENABLE_CMDID, 490 WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID, 491 WMI_WOW_IOAC_ADD_KEEPALIVE_CMDID, 492 WMI_WOW_IOAC_DEL_KEEPALIVE_CMDID, 493 WMI_WOW_IOAC_ADD_WAKE_PATTERN_CMDID, 494 WMI_WOW_IOAC_DEL_WAKE_PATTERN_CMDID, 495 WMI_D0_WOW_ENABLE_DISABLE_CMDID, 496 WMI_EXTWOW_ENABLE_CMDID, 497 WMI_EXTWOW_SET_APP_TYPE1_PARAMS_CMDID, 498 WMI_EXTWOW_SET_APP_TYPE2_PARAMS_CMDID, 499 WMI_WOW_ENABLE_ICMPV6_NA_FLT_CMDID, 500 WMI_WOW_UDP_SVC_OFLD_CMDID, 501 WMI_WOW_HOSTWAKEUP_GPIO_PIN_PATTERN_CONFIG_CMDID, 502 WMI_WOW_SET_ACTION_WAKE_UP_CMDID, 503 WMI_RTT_MEASREQ_CMDID = WMI_TLV_CMD(WMI_GRP_RTT), 504 WMI_RTT_TSF_CMDID, 505 WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID = WMI_TLV_CMD(WMI_GRP_SPECTRAL), 506 WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID, 507 WMI_REQUEST_STATS_CMDID = WMI_TLV_CMD(WMI_GRP_STATS), 508 WMI_MCC_SCHED_TRAFFIC_STATS_CMDID, 509 WMI_REQUEST_STATS_EXT_CMDID, 510 WMI_REQUEST_LINK_STATS_CMDID, 511 WMI_START_LINK_STATS_CMDID, 512 WMI_CLEAR_LINK_STATS_CMDID, 513 WMI_GET_FW_MEM_DUMP_CMDID, 514 WMI_DEBUG_MESG_FLUSH_CMDID, 515 WMI_DIAG_EVENT_LOG_CONFIG_CMDID, 516 WMI_REQUEST_WLAN_STATS_CMDID, 517 WMI_REQUEST_RCPI_CMDID, 518 WMI_REQUEST_PEER_STATS_INFO_CMDID, 519 WMI_REQUEST_RADIO_CHAN_STATS_CMDID, 520 WMI_REQUEST_WLM_STATS_CMDID, 521 WMI_REQUEST_CTRL_PATH_STATS_CMDID, 522 WMI_REQUEST_HALPHY_CTRL_PATH_STATS_CMDID = WMI_REQUEST_CTRL_PATH_STATS_CMDID + 3, 523 WMI_SET_ARP_NS_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_ARP_NS_OFL), 524 WMI_ADD_PROACTIVE_ARP_RSP_PATTERN_CMDID, 525 WMI_DEL_PROACTIVE_ARP_RSP_PATTERN_CMDID, 526 WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_NLO_OFL), 527 WMI_APFIND_CMDID, 528 WMI_PASSPOINT_LIST_CONFIG_CMDID, 529 WMI_NLO_CONFIGURE_MAWC_CMDID, 530 WMI_GTK_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_GTK_OFL), 531 WMI_CSA_OFFLOAD_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_CSA_OFL), 532 WMI_CSA_OFFLOAD_CHANSWITCH_CMDID, 533 WMI_CHATTER_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_CHATTER), 534 WMI_CHATTER_ADD_COALESCING_FILTER_CMDID, 535 WMI_CHATTER_DELETE_COALESCING_FILTER_CMDID, 536 WMI_CHATTER_COALESCING_QUERY_CMDID, 537 WMI_PEER_TID_ADDBA_CMDID = WMI_TLV_CMD(WMI_GRP_TID_ADDBA), 538 WMI_PEER_TID_DELBA_CMDID, 539 WMI_STA_DTIM_PS_METHOD_CMDID, 540 WMI_STA_UAPSD_AUTO_TRIG_CMDID, 541 WMI_STA_KEEPALIVE_CMDID, 542 WMI_BA_REQ_SSN_CMDID, 543 WMI_ECHO_CMDID = WMI_TLV_CMD(WMI_GRP_MISC), 544 WMI_PDEV_UTF_CMDID, 545 WMI_DBGLOG_CFG_CMDID, 546 WMI_PDEV_QVIT_CMDID, 547 WMI_PDEV_FTM_INTG_CMDID, 548 WMI_VDEV_SET_KEEPALIVE_CMDID, 549 WMI_VDEV_GET_KEEPALIVE_CMDID, 550 WMI_FORCE_FW_HANG_CMDID, 551 WMI_SET_MCASTBCAST_FILTER_CMDID, 552 WMI_THERMAL_MGMT_CMDID, 553 WMI_HOST_AUTO_SHUTDOWN_CFG_CMDID, 554 WMI_TPC_CHAINMASK_CONFIG_CMDID, 555 WMI_SET_ANTENNA_DIVERSITY_CMDID, 556 WMI_OCB_SET_SCHED_CMDID, 557 WMI_RSSI_BREACH_MONITOR_CONFIG_CMDID, 558 WMI_LRO_CONFIG_CMDID, 559 WMI_TRANSFER_DATA_TO_FLASH_CMDID, 560 WMI_CONFIG_ENHANCED_MCAST_FILTER_CMDID, 561 WMI_VDEV_WISA_CMDID, 562 WMI_DBGLOG_TIME_STAMP_SYNC_CMDID, 563 WMI_SET_MULTIPLE_MCAST_FILTER_CMDID, 564 WMI_READ_DATA_FROM_FLASH_CMDID, 565 WMI_THERM_THROT_SET_CONF_CMDID, 566 WMI_RUNTIME_DPD_RECAL_CMDID, 567 WMI_GET_TPC_POWER_CMDID, 568 WMI_IDLE_TRIGGER_MONITOR_CMDID, 569 WMI_GPIO_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_GPIO), 570 WMI_GPIO_OUTPUT_CMDID, 571 WMI_TXBF_CMDID, 572 WMI_FWTEST_VDEV_MCC_SET_TBTT_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_FWTEST), 573 WMI_FWTEST_P2P_SET_NOA_PARAM_CMDID, 574 WMI_UNIT_TEST_CMDID, 575 WMI_FWTEST_CMDID, 576 WMI_QBOOST_CFG_CMDID, 577 WMI_TDLS_SET_STATE_CMDID = WMI_TLV_CMD(WMI_GRP_TDLS), 578 WMI_TDLS_PEER_UPDATE_CMDID, 579 WMI_TDLS_SET_OFFCHAN_MODE_CMDID, 580 WMI_RESMGR_ADAPTIVE_OCS_EN_DIS_CMDID = WMI_TLV_CMD(WMI_GRP_RESMGR), 581 WMI_RESMGR_SET_CHAN_TIME_QUOTA_CMDID, 582 WMI_RESMGR_SET_CHAN_LATENCY_CMDID, 583 WMI_STA_SMPS_FORCE_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_STA_SMPS), 584 WMI_STA_SMPS_PARAM_CMDID, 585 WMI_HB_SET_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_WLAN_HB), 586 WMI_HB_SET_TCP_PARAMS_CMDID, 587 WMI_HB_SET_TCP_PKT_FILTER_CMDID, 588 WMI_HB_SET_UDP_PARAMS_CMDID, 589 WMI_HB_SET_UDP_PKT_FILTER_CMDID, 590 WMI_RMC_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_RMC), 591 WMI_RMC_SET_ACTION_PERIOD_CMDID, 592 WMI_RMC_CONFIG_CMDID, 593 WMI_RMC_SET_MANUAL_LEADER_CMDID, 594 WMI_MHF_OFFLOAD_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_MHF_OFL), 595 WMI_MHF_OFFLOAD_PLUMB_ROUTING_TBL_CMDID, 596 WMI_BATCH_SCAN_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_LOCATION_SCAN), 597 WMI_BATCH_SCAN_DISABLE_CMDID, 598 WMI_BATCH_SCAN_TRIGGER_RESULT_CMDID, 599 WMI_OEM_REQ_CMDID = WMI_TLV_CMD(WMI_GRP_OEM), 600 WMI_OEM_REQUEST_CMDID, 601 WMI_LPI_OEM_REQ_CMDID, 602 WMI_NAN_CMDID = WMI_TLV_CMD(WMI_GRP_NAN), 603 WMI_MODEM_POWER_STATE_CMDID = WMI_TLV_CMD(WMI_GRP_COEX), 604 WMI_CHAN_AVOID_UPDATE_CMDID, 605 WMI_COEX_CONFIG_CMDID, 606 WMI_CHAN_AVOID_RPT_ALLOW_CMDID, 607 WMI_COEX_GET_ANTENNA_ISOLATION_CMDID, 608 WMI_SAR_LIMITS_CMDID, 609 WMI_OBSS_SCAN_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_OBSS_OFL), 610 WMI_OBSS_SCAN_DISABLE_CMDID, 611 WMI_OBSS_COLOR_COLLISION_DET_CONFIG_CMDID, 612 WMI_LPI_MGMT_SNOOPING_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_LPI), 613 WMI_LPI_START_SCAN_CMDID, 614 WMI_LPI_STOP_SCAN_CMDID, 615 WMI_EXTSCAN_START_CMDID = WMI_TLV_CMD(WMI_GRP_EXTSCAN), 616 WMI_EXTSCAN_STOP_CMDID, 617 WMI_EXTSCAN_CONFIGURE_WLAN_CHANGE_MONITOR_CMDID, 618 WMI_EXTSCAN_CONFIGURE_HOTLIST_MONITOR_CMDID, 619 WMI_EXTSCAN_GET_CACHED_RESULTS_CMDID, 620 WMI_EXTSCAN_GET_WLAN_CHANGE_RESULTS_CMDID, 621 WMI_EXTSCAN_SET_CAPABILITIES_CMDID, 622 WMI_EXTSCAN_GET_CAPABILITIES_CMDID, 623 WMI_EXTSCAN_CONFIGURE_HOTLIST_SSID_MONITOR_CMDID, 624 WMI_EXTSCAN_CONFIGURE_MAWC_CMDID, 625 WMI_SET_DHCP_SERVER_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_DHCP_OFL), 626 WMI_IPA_OFFLOAD_ENABLE_DISABLE_CMDID = WMI_TLV_CMD(WMI_GRP_IPA), 627 WMI_MDNS_OFFLOAD_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_MDNS_OFL), 628 WMI_MDNS_SET_FQDN_CMDID, 629 WMI_MDNS_SET_RESPONSE_CMDID, 630 WMI_MDNS_GET_STATS_CMDID, 631 WMI_SAP_OFL_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_SAP_OFL), 632 WMI_SAP_SET_BLACKLIST_PARAM_CMDID, 633 WMI_OCB_SET_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_OCB), 634 WMI_OCB_SET_UTC_TIME_CMDID, 635 WMI_OCB_START_TIMING_ADVERT_CMDID, 636 WMI_OCB_STOP_TIMING_ADVERT_CMDID, 637 WMI_OCB_GET_TSF_TIMER_CMDID, 638 WMI_DCC_GET_STATS_CMDID, 639 WMI_DCC_CLEAR_STATS_CMDID, 640 WMI_DCC_UPDATE_NDL_CMDID, 641 WMI_SOC_SET_PCL_CMDID = WMI_TLV_CMD(WMI_GRP_SOC), 642 WMI_SOC_SET_HW_MODE_CMDID, 643 WMI_SOC_SET_DUAL_MAC_CONFIG_CMDID, 644 WMI_SOC_SET_ANTENNA_MODE_CMDID, 645 WMI_PACKET_FILTER_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_PKT_FILTER), 646 WMI_PACKET_FILTER_ENABLE_CMDID, 647 WMI_MAWC_SENSOR_REPORT_IND_CMDID = WMI_TLV_CMD(WMI_GRP_MAWC), 648 WMI_PMF_OFFLOAD_SET_SA_QUERY_CMDID = WMI_TLV_CMD(WMI_GRP_PMF_OFFLOAD), 649 WMI_BPF_GET_CAPABILITY_CMDID = WMI_TLV_CMD(WMI_GRP_BPF_OFFLOAD), 650 WMI_BPF_GET_VDEV_STATS_CMDID, 651 WMI_BPF_SET_VDEV_INSTRUCTIONS_CMDID, 652 WMI_BPF_DEL_VDEV_INSTRUCTIONS_CMDID, 653 WMI_BPF_SET_VDEV_ACTIVE_MODE_CMDID, 654 WMI_MNT_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_MONITOR), 655 WMI_SET_CURRENT_COUNTRY_CMDID = WMI_TLV_CMD(WMI_GRP_REGULATORY), 656 WMI_11D_SCAN_START_CMDID, 657 WMI_11D_SCAN_STOP_CMDID, 658 WMI_SET_INIT_COUNTRY_CMDID, 659 WMI_NDI_GET_CAP_REQ_CMDID = WMI_TLV_CMD(WMI_GRP_PROTOTYPE), 660 WMI_NDP_INITIATOR_REQ_CMDID, 661 WMI_NDP_RESPONDER_REQ_CMDID, 662 WMI_NDP_END_REQ_CMDID, 663 WMI_HW_DATA_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_HW_DATA_FILTER), 664 WMI_TWT_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_TWT), 665 WMI_TWT_DISABLE_CMDID, 666 WMI_TWT_ADD_DIALOG_CMDID, 667 WMI_TWT_DEL_DIALOG_CMDID, 668 WMI_TWT_PAUSE_DIALOG_CMDID, 669 WMI_TWT_RESUME_DIALOG_CMDID, 670 WMI_PDEV_OBSS_PD_SPATIAL_REUSE_CMDID = 671 WMI_TLV_CMD(WMI_GRP_SPATIAL_REUSE), 672 WMI_PDEV_OBSS_PD_SPATIAL_REUSE_SET_DEF_OBSS_THRESH_CMDID, 673 WMI_MLO_LINK_SET_ACTIVE_CMDID = WMI_TLV_CMD(WMI_GRP_MLO), 674 WMI_MLO_SETUP_CMDID, 675 WMI_MLO_READY_CMDID, 676 WMI_MLO_TEARDOWN_CMDID, 677 }; 678 679 enum wmi_tlv_event_id { 680 WMI_SERVICE_READY_EVENTID = 0x1, 681 WMI_READY_EVENTID, 682 WMI_SERVICE_AVAILABLE_EVENTID, 683 WMI_SCAN_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_SCAN), 684 WMI_PDEV_TPC_CONFIG_EVENTID = WMI_TLV_CMD(WMI_GRP_PDEV), 685 WMI_CHAN_INFO_EVENTID, 686 WMI_PHYERR_EVENTID, 687 WMI_PDEV_DUMP_EVENTID, 688 WMI_TX_PAUSE_EVENTID, 689 WMI_DFS_RADAR_EVENTID, 690 WMI_PDEV_L1SS_TRACK_EVENTID, 691 WMI_PDEV_TEMPERATURE_EVENTID, 692 WMI_SERVICE_READY_EXT_EVENTID, 693 WMI_PDEV_FIPS_EVENTID, 694 WMI_PDEV_CHANNEL_HOPPING_EVENTID, 695 WMI_PDEV_ANI_CCK_LEVEL_EVENTID, 696 WMI_PDEV_ANI_OFDM_LEVEL_EVENTID, 697 WMI_PDEV_TPC_EVENTID, 698 WMI_PDEV_NFCAL_POWER_ALL_CHANNELS_EVENTID, 699 WMI_PDEV_SET_HW_MODE_RESP_EVENTID, 700 WMI_PDEV_HW_MODE_TRANSITION_EVENTID, 701 WMI_PDEV_SET_MAC_CONFIG_RESP_EVENTID, 702 WMI_PDEV_ANTDIV_STATUS_EVENTID, 703 WMI_PDEV_CHIP_POWER_STATS_EVENTID, 704 WMI_PDEV_CHIP_POWER_SAVE_FAILURE_DETECTED_EVENTID, 705 WMI_PDEV_CSA_SWITCH_COUNT_STATUS_EVENTID, 706 WMI_PDEV_CHECK_CAL_VERSION_EVENTID, 707 WMI_PDEV_DIV_RSSI_ANTID_EVENTID, 708 WMI_PDEV_BSS_CHAN_INFO_EVENTID, 709 WMI_PDEV_UPDATE_CTLTABLE_EVENTID, 710 WMI_PDEV_DMA_RING_CFG_RSP_EVENTID, 711 WMI_PDEV_DMA_RING_BUF_RELEASE_EVENTID, 712 WMI_PDEV_CTL_FAILSAFE_CHECK_EVENTID, 713 WMI_PDEV_CSC_SWITCH_COUNT_STATUS_EVENTID, 714 WMI_PDEV_COLD_BOOT_CAL_DATA_EVENTID, 715 WMI_PDEV_RAP_INFO_EVENTID, 716 WMI_CHAN_RF_CHARACTERIZATION_INFO_EVENTID, 717 WMI_SERVICE_READY_EXT2_EVENTID, 718 WMI_PDEV_GET_HALPHY_CAL_STATUS_EVENTID = 719 WMI_SERVICE_READY_EXT2_EVENTID + 4, 720 WMI_VDEV_START_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_VDEV), 721 WMI_VDEV_STOPPED_EVENTID, 722 WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID, 723 WMI_VDEV_MCC_BCN_INTERVAL_CHANGE_REQ_EVENTID, 724 WMI_VDEV_TSF_REPORT_EVENTID, 725 WMI_VDEV_DELETE_RESP_EVENTID, 726 WMI_VDEV_ENCRYPT_DECRYPT_DATA_RESP_EVENTID, 727 WMI_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_STATUS_EVENTID, 728 WMI_PEER_STA_KICKOUT_EVENTID = WMI_TLV_CMD(WMI_GRP_PEER), 729 WMI_PEER_INFO_EVENTID, 730 WMI_PEER_TX_FAIL_CNT_THR_EVENTID, 731 WMI_PEER_ESTIMATED_LINKSPEED_EVENTID, 732 WMI_PEER_STATE_EVENTID, 733 WMI_PEER_ASSOC_CONF_EVENTID, 734 WMI_PEER_DELETE_RESP_EVENTID, 735 WMI_PEER_RATECODE_LIST_EVENTID, 736 WMI_WDS_PEER_EVENTID, 737 WMI_PEER_STA_PS_STATECHG_EVENTID, 738 WMI_PEER_ANTDIV_INFO_EVENTID, 739 WMI_PEER_RESERVED0_EVENTID, 740 WMI_PEER_RESERVED1_EVENTID, 741 WMI_PEER_RESERVED2_EVENTID, 742 WMI_PEER_RESERVED3_EVENTID, 743 WMI_PEER_RESERVED4_EVENTID, 744 WMI_PEER_RESERVED5_EVENTID, 745 WMI_PEER_RESERVED6_EVENTID, 746 WMI_PEER_RESERVED7_EVENTID, 747 WMI_PEER_RESERVED8_EVENTID, 748 WMI_PEER_RESERVED9_EVENTID, 749 WMI_PEER_RESERVED10_EVENTID, 750 WMI_PEER_OPER_MODE_CHANGE_EVENTID, 751 WMI_MGMT_RX_EVENTID = WMI_TLV_CMD(WMI_GRP_MGMT), 752 WMI_HOST_SWBA_EVENTID, 753 WMI_TBTTOFFSET_UPDATE_EVENTID, 754 WMI_OFFLOAD_BCN_TX_STATUS_EVENTID, 755 WMI_OFFLOAD_PROB_RESP_TX_STATUS_EVENTID, 756 WMI_MGMT_TX_COMPLETION_EVENTID, 757 WMI_MGMT_TX_BUNDLE_COMPLETION_EVENTID, 758 WMI_TBTTOFFSET_EXT_UPDATE_EVENTID, 759 WMI_OFFCHAN_DATA_TX_COMPLETION_EVENTID, 760 WMI_HOST_FILS_DISCOVERY_EVENTID, 761 WMI_MGMT_RX_FW_CONSUMED_EVENTID = WMI_HOST_FILS_DISCOVERY_EVENTID + 3, 762 WMI_TX_DELBA_COMPLETE_EVENTID = WMI_TLV_CMD(WMI_GRP_BA_NEG), 763 WMI_TX_ADDBA_COMPLETE_EVENTID, 764 WMI_BA_RSP_SSN_EVENTID, 765 WMI_AGGR_STATE_TRIG_EVENTID, 766 WMI_ROAM_EVENTID = WMI_TLV_CMD(WMI_GRP_ROAM), 767 WMI_PROFILE_MATCH, 768 WMI_ROAM_SYNCH_EVENTID, 769 WMI_P2P_DISC_EVENTID = WMI_TLV_CMD(WMI_GRP_P2P), 770 WMI_P2P_NOA_EVENTID, 771 WMI_P2P_LISTEN_OFFLOAD_STOPPED_EVENTID, 772 WMI_AP_PS_EGAP_INFO_EVENTID = WMI_TLV_CMD(WMI_GRP_AP_PS), 773 WMI_PDEV_RESUME_EVENTID = WMI_TLV_CMD(WMI_GRP_SUSPEND), 774 WMI_WOW_WAKEUP_HOST_EVENTID = WMI_TLV_CMD(WMI_GRP_WOW), 775 WMI_D0_WOW_DISABLE_ACK_EVENTID, 776 WMI_WOW_INITIAL_WAKEUP_EVENTID, 777 WMI_RTT_MEASUREMENT_REPORT_EVENTID = WMI_TLV_CMD(WMI_GRP_RTT), 778 WMI_TSF_MEASUREMENT_REPORT_EVENTID, 779 WMI_RTT_ERROR_REPORT_EVENTID, 780 WMI_STATS_EXT_EVENTID = WMI_TLV_CMD(WMI_GRP_STATS), 781 WMI_IFACE_LINK_STATS_EVENTID, 782 WMI_PEER_LINK_STATS_EVENTID, 783 WMI_RADIO_LINK_STATS_EVENTID, 784 WMI_UPDATE_FW_MEM_DUMP_EVENTID, 785 WMI_DIAG_EVENT_LOG_SUPPORTED_EVENTID, 786 WMI_INST_RSSI_STATS_EVENTID, 787 WMI_RADIO_TX_POWER_LEVEL_STATS_EVENTID, 788 WMI_REPORT_STATS_EVENTID, 789 WMI_UPDATE_RCPI_EVENTID, 790 WMI_PEER_STATS_INFO_EVENTID, 791 WMI_RADIO_CHAN_STATS_EVENTID, 792 WMI_WLM_STATS_EVENTID, 793 WMI_CTRL_PATH_STATS_EVENTID, 794 WMI_HALPHY_STATS_CTRL_PATH_EVENTID, 795 WMI_NLO_MATCH_EVENTID = WMI_TLV_CMD(WMI_GRP_NLO_OFL), 796 WMI_NLO_SCAN_COMPLETE_EVENTID, 797 WMI_APFIND_EVENTID, 798 WMI_PASSPOINT_MATCH_EVENTID, 799 WMI_GTK_OFFLOAD_STATUS_EVENTID = WMI_TLV_CMD(WMI_GRP_GTK_OFL), 800 WMI_GTK_REKEY_FAIL_EVENTID, 801 WMI_CSA_HANDLING_EVENTID = WMI_TLV_CMD(WMI_GRP_CSA_OFL), 802 WMI_CHATTER_PC_QUERY_EVENTID = WMI_TLV_CMD(WMI_GRP_CHATTER), 803 WMI_PDEV_DFS_RADAR_DETECTION_EVENTID = WMI_TLV_CMD(WMI_GRP_DFS), 804 WMI_VDEV_DFS_CAC_COMPLETE_EVENTID, 805 WMI_VDEV_ADFS_OCAC_COMPLETE_EVENTID, 806 WMI_ECHO_EVENTID = WMI_TLV_CMD(WMI_GRP_MISC), 807 WMI_PDEV_UTF_EVENTID, 808 WMI_DEBUG_MESG_EVENTID, 809 WMI_UPDATE_STATS_EVENTID, 810 WMI_DEBUG_PRINT_EVENTID, 811 WMI_DCS_INTERFERENCE_EVENTID, 812 WMI_PDEV_QVIT_EVENTID, 813 WMI_WLAN_PROFILE_DATA_EVENTID, 814 WMI_PDEV_FTM_INTG_EVENTID, 815 WMI_WLAN_FREQ_AVOID_EVENTID, 816 WMI_VDEV_GET_KEEPALIVE_EVENTID, 817 WMI_THERMAL_MGMT_EVENTID, 818 WMI_DIAG_DATA_CONTAINER_EVENTID, 819 WMI_HOST_AUTO_SHUTDOWN_EVENTID, 820 WMI_UPDATE_WHAL_MIB_STATS_EVENTID, 821 WMI_UPDATE_VDEV_RATE_STATS_EVENTID, 822 WMI_DIAG_EVENTID, 823 WMI_OCB_SET_SCHED_EVENTID, 824 WMI_DEBUG_MESG_FLUSH_COMPLETE_EVENTID, 825 WMI_RSSI_BREACH_EVENTID, 826 WMI_TRANSFER_DATA_TO_FLASH_COMPLETE_EVENTID, 827 WMI_PDEV_UTF_SCPC_EVENTID, 828 WMI_READ_DATA_FROM_FLASH_EVENTID, 829 WMI_REPORT_RX_AGGR_FAILURE_EVENTID, 830 WMI_PKGID_EVENTID, 831 WMI_GPIO_INPUT_EVENTID = WMI_TLV_CMD(WMI_GRP_GPIO), 832 WMI_UPLOADH_EVENTID, 833 WMI_CAPTUREH_EVENTID, 834 WMI_RFKILL_STATE_CHANGE_EVENTID, 835 WMI_TDLS_PEER_EVENTID = WMI_TLV_CMD(WMI_GRP_TDLS), 836 WMI_STA_SMPS_FORCE_MODE_COMPL_EVENTID = WMI_TLV_CMD(WMI_GRP_STA_SMPS), 837 WMI_BATCH_SCAN_ENABLED_EVENTID = WMI_TLV_CMD(WMI_GRP_LOCATION_SCAN), 838 WMI_BATCH_SCAN_RESULT_EVENTID, 839 WMI_OEM_CAPABILITY_EVENTID = WMI_TLV_CMD(WMI_GRP_OEM), 840 WMI_OEM_MEASUREMENT_REPORT_EVENTID, 841 WMI_OEM_ERROR_REPORT_EVENTID, 842 WMI_OEM_RESPONSE_EVENTID, 843 WMI_NAN_EVENTID = WMI_TLV_CMD(WMI_GRP_NAN), 844 WMI_NAN_DISC_IFACE_CREATED_EVENTID, 845 WMI_NAN_DISC_IFACE_DELETED_EVENTID, 846 WMI_NAN_STARTED_CLUSTER_EVENTID, 847 WMI_NAN_JOINED_CLUSTER_EVENTID, 848 WMI_COEX_REPORT_ANTENNA_ISOLATION_EVENTID = WMI_TLV_CMD(WMI_GRP_COEX), 849 WMI_LPI_RESULT_EVENTID = WMI_TLV_CMD(WMI_GRP_LPI), 850 WMI_LPI_STATUS_EVENTID, 851 WMI_LPI_HANDOFF_EVENTID, 852 WMI_EXTSCAN_START_STOP_EVENTID = WMI_TLV_CMD(WMI_GRP_EXTSCAN), 853 WMI_EXTSCAN_OPERATION_EVENTID, 854 WMI_EXTSCAN_TABLE_USAGE_EVENTID, 855 WMI_EXTSCAN_CACHED_RESULTS_EVENTID, 856 WMI_EXTSCAN_WLAN_CHANGE_RESULTS_EVENTID, 857 WMI_EXTSCAN_HOTLIST_MATCH_EVENTID, 858 WMI_EXTSCAN_CAPABILITIES_EVENTID, 859 WMI_EXTSCAN_HOTLIST_SSID_MATCH_EVENTID, 860 WMI_MDNS_STATS_EVENTID = WMI_TLV_CMD(WMI_GRP_MDNS_OFL), 861 WMI_SAP_OFL_ADD_STA_EVENTID = WMI_TLV_CMD(WMI_GRP_SAP_OFL), 862 WMI_SAP_OFL_DEL_STA_EVENTID, 863 WMI_OBSS_COLOR_COLLISION_DETECTION_EVENTID = 864 WMI_EVT_GRP_START_ID(WMI_GRP_OBSS_OFL), 865 WMI_OCB_SET_CONFIG_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_OCB), 866 WMI_OCB_GET_TSF_TIMER_RESP_EVENTID, 867 WMI_DCC_GET_STATS_RESP_EVENTID, 868 WMI_DCC_UPDATE_NDL_RESP_EVENTID, 869 WMI_DCC_STATS_EVENTID, 870 WMI_SOC_SET_HW_MODE_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_SOC), 871 WMI_SOC_HW_MODE_TRANSITION_EVENTID, 872 WMI_SOC_SET_DUAL_MAC_CONFIG_RESP_EVENTID, 873 WMI_MAWC_ENABLE_SENSOR_EVENTID = WMI_TLV_CMD(WMI_GRP_MAWC), 874 WMI_BPF_CAPABILIY_INFO_EVENTID = WMI_TLV_CMD(WMI_GRP_BPF_OFFLOAD), 875 WMI_BPF_VDEV_STATS_INFO_EVENTID, 876 WMI_RMC_NEW_LEADER_EVENTID = WMI_TLV_CMD(WMI_GRP_RMC), 877 WMI_REG_CHAN_LIST_CC_EVENTID = WMI_TLV_CMD(WMI_GRP_REGULATORY), 878 WMI_11D_NEW_COUNTRY_EVENTID, 879 WMI_REG_CHAN_LIST_CC_EXT_EVENTID, 880 WMI_NDI_CAP_RSP_EVENTID = WMI_TLV_CMD(WMI_GRP_PROTOTYPE), 881 WMI_NDP_INITIATOR_RSP_EVENTID, 882 WMI_NDP_RESPONDER_RSP_EVENTID, 883 WMI_NDP_END_RSP_EVENTID, 884 WMI_NDP_INDICATION_EVENTID, 885 WMI_NDP_CONFIRM_EVENTID, 886 WMI_NDP_END_INDICATION_EVENTID, 887 888 WMI_TWT_ENABLE_EVENTID = WMI_TLV_CMD(WMI_GRP_TWT), 889 WMI_TWT_DISABLE_EVENTID, 890 WMI_TWT_ADD_DIALOG_EVENTID, 891 WMI_TWT_DEL_DIALOG_EVENTID, 892 WMI_TWT_PAUSE_DIALOG_EVENTID, 893 WMI_TWT_RESUME_DIALOG_EVENTID, 894 WMI_MLO_LINK_SET_ACTIVE_RESP_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_MLO), 895 WMI_MLO_SETUP_COMPLETE_EVENTID, 896 WMI_MLO_TEARDOWN_COMPLETE_EVENTID, 897 }; 898 899 enum wmi_tlv_pdev_param { 900 WMI_PDEV_PARAM_TX_CHAIN_MASK = 0x1, 901 WMI_PDEV_PARAM_RX_CHAIN_MASK, 902 WMI_PDEV_PARAM_TXPOWER_LIMIT2G, 903 WMI_PDEV_PARAM_TXPOWER_LIMIT5G, 904 WMI_PDEV_PARAM_TXPOWER_SCALE, 905 WMI_PDEV_PARAM_BEACON_GEN_MODE, 906 WMI_PDEV_PARAM_BEACON_TX_MODE, 907 WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE, 908 WMI_PDEV_PARAM_PROTECTION_MODE, 909 WMI_PDEV_PARAM_DYNAMIC_BW, 910 WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH, 911 WMI_PDEV_PARAM_AGG_SW_RETRY_TH, 912 WMI_PDEV_PARAM_STA_KICKOUT_TH, 913 WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING, 914 WMI_PDEV_PARAM_LTR_ENABLE, 915 WMI_PDEV_PARAM_LTR_AC_LATENCY_BE, 916 WMI_PDEV_PARAM_LTR_AC_LATENCY_BK, 917 WMI_PDEV_PARAM_LTR_AC_LATENCY_VI, 918 WMI_PDEV_PARAM_LTR_AC_LATENCY_VO, 919 WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT, 920 WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE, 921 WMI_PDEV_PARAM_LTR_RX_OVERRIDE, 922 WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT, 923 WMI_PDEV_PARAM_L1SS_ENABLE, 924 WMI_PDEV_PARAM_DSLEEP_ENABLE, 925 WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH, 926 WMI_PDEV_PARAM_PCIELP_TXBUF_WATERMARK, 927 WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN, 928 WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE, 929 WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD, 930 WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD, 931 WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD, 932 WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD, 933 WMI_PDEV_PARAM_PMF_QOS, 934 WMI_PDEV_PARAM_ARP_AC_OVERRIDE, 935 WMI_PDEV_PARAM_DCS, 936 WMI_PDEV_PARAM_ANI_ENABLE, 937 WMI_PDEV_PARAM_ANI_POLL_PERIOD, 938 WMI_PDEV_PARAM_ANI_LISTEN_PERIOD, 939 WMI_PDEV_PARAM_ANI_OFDM_LEVEL, 940 WMI_PDEV_PARAM_ANI_CCK_LEVEL, 941 WMI_PDEV_PARAM_DYNTXCHAIN, 942 WMI_PDEV_PARAM_PROXY_STA, 943 WMI_PDEV_PARAM_IDLE_PS_CONFIG, 944 WMI_PDEV_PARAM_POWER_GATING_SLEEP, 945 WMI_PDEV_PARAM_RFKILL_ENABLE, 946 WMI_PDEV_PARAM_BURST_DUR, 947 WMI_PDEV_PARAM_BURST_ENABLE, 948 WMI_PDEV_PARAM_HW_RFKILL_CONFIG, 949 WMI_PDEV_PARAM_LOW_POWER_RF_ENABLE, 950 WMI_PDEV_PARAM_L1SS_TRACK, 951 WMI_PDEV_PARAM_HYST_EN, 952 WMI_PDEV_PARAM_POWER_COLLAPSE_ENABLE, 953 WMI_PDEV_PARAM_LED_SYS_STATE, 954 WMI_PDEV_PARAM_LED_ENABLE, 955 WMI_PDEV_PARAM_AUDIO_OVER_WLAN_LATENCY, 956 WMI_PDEV_PARAM_AUDIO_OVER_WLAN_ENABLE, 957 WMI_PDEV_PARAM_WHAL_MIB_STATS_UPDATE_ENABLE, 958 WMI_PDEV_PARAM_VDEV_RATE_STATS_UPDATE_PERIOD, 959 WMI_PDEV_PARAM_CTS_CBW, 960 WMI_PDEV_PARAM_WNTS_CONFIG, 961 WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_ENABLE, 962 WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_MIN_SLEEP_SLOP, 963 WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_INC_DEC_STEP, 964 WMI_PDEV_PARAM_EARLY_RX_FIX_SLEEP_SLOP, 965 WMI_PDEV_PARAM_BMISS_BASED_ADAPTIVE_BTO_ENABLE, 966 WMI_PDEV_PARAM_BMISS_BTO_MIN_BCN_TIMEOUT, 967 WMI_PDEV_PARAM_BMISS_BTO_INC_DEC_STEP, 968 WMI_PDEV_PARAM_BTO_FIX_BCN_TIMEOUT, 969 WMI_PDEV_PARAM_CE_BASED_ADAPTIVE_BTO_ENABLE, 970 WMI_PDEV_PARAM_CE_BTO_COMBO_CE_VALUE, 971 WMI_PDEV_PARAM_TX_CHAIN_MASK_2G, 972 WMI_PDEV_PARAM_RX_CHAIN_MASK_2G, 973 WMI_PDEV_PARAM_TX_CHAIN_MASK_5G, 974 WMI_PDEV_PARAM_RX_CHAIN_MASK_5G, 975 WMI_PDEV_PARAM_TX_CHAIN_MASK_CCK, 976 WMI_PDEV_PARAM_TX_CHAIN_MASK_1SS, 977 WMI_PDEV_PARAM_CTS2SELF_FOR_P2P_GO_CONFIG, 978 WMI_PDEV_PARAM_TXPOWER_DECR_DB, 979 WMI_PDEV_PARAM_AGGR_BURST, 980 WMI_PDEV_PARAM_RX_DECAP_MODE, 981 WMI_PDEV_PARAM_FAST_CHANNEL_RESET, 982 WMI_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA, 983 WMI_PDEV_PARAM_ANTENNA_GAIN, 984 WMI_PDEV_PARAM_RX_FILTER, 985 WMI_PDEV_SET_MCAST_TO_UCAST_TID, 986 WMI_PDEV_PARAM_PROXY_STA_MODE, 987 WMI_PDEV_PARAM_SET_MCAST2UCAST_MODE, 988 WMI_PDEV_PARAM_SET_MCAST2UCAST_BUFFER, 989 WMI_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER, 990 WMI_PDEV_PEER_STA_PS_STATECHG_ENABLE, 991 WMI_PDEV_PARAM_IGMPMLD_AC_OVERRIDE, 992 WMI_PDEV_PARAM_BLOCK_INTERBSS, 993 WMI_PDEV_PARAM_SET_DISABLE_RESET_CMDID, 994 WMI_PDEV_PARAM_SET_MSDU_TTL_CMDID, 995 WMI_PDEV_PARAM_SET_PPDU_DURATION_CMDID, 996 WMI_PDEV_PARAM_TXBF_SOUND_PERIOD_CMDID, 997 WMI_PDEV_PARAM_SET_PROMISC_MODE_CMDID, 998 WMI_PDEV_PARAM_SET_BURST_MODE_CMDID, 999 WMI_PDEV_PARAM_EN_STATS, 1000 WMI_PDEV_PARAM_MU_GROUP_POLICY, 1001 WMI_PDEV_PARAM_NOISE_DETECTION, 1002 WMI_PDEV_PARAM_NOISE_THRESHOLD, 1003 WMI_PDEV_PARAM_DPD_ENABLE, 1004 WMI_PDEV_PARAM_SET_MCAST_BCAST_ECHO, 1005 WMI_PDEV_PARAM_ATF_STRICT_SCH, 1006 WMI_PDEV_PARAM_ATF_SCHED_DURATION, 1007 WMI_PDEV_PARAM_ANT_PLZN, 1008 WMI_PDEV_PARAM_MGMT_RETRY_LIMIT, 1009 WMI_PDEV_PARAM_SENSITIVITY_LEVEL, 1010 WMI_PDEV_PARAM_SIGNED_TXPOWER_2G, 1011 WMI_PDEV_PARAM_SIGNED_TXPOWER_5G, 1012 WMI_PDEV_PARAM_ENABLE_PER_TID_AMSDU, 1013 WMI_PDEV_PARAM_ENABLE_PER_TID_AMPDU, 1014 WMI_PDEV_PARAM_CCA_THRESHOLD, 1015 WMI_PDEV_PARAM_RTS_FIXED_RATE, 1016 WMI_PDEV_PARAM_PDEV_RESET, 1017 WMI_PDEV_PARAM_WAPI_MBSSID_OFFSET, 1018 WMI_PDEV_PARAM_ARP_DBG_SRCADDR, 1019 WMI_PDEV_PARAM_ARP_DBG_DSTADDR, 1020 WMI_PDEV_PARAM_ATF_OBSS_NOISE_SCH, 1021 WMI_PDEV_PARAM_ATF_OBSS_NOISE_SCALING_FACTOR, 1022 WMI_PDEV_PARAM_CUST_TXPOWER_SCALE, 1023 WMI_PDEV_PARAM_ATF_DYNAMIC_ENABLE, 1024 WMI_PDEV_PARAM_CTRL_RETRY_LIMIT, 1025 WMI_PDEV_PARAM_PROPAGATION_DELAY, 1026 WMI_PDEV_PARAM_ENA_ANT_DIV, 1027 WMI_PDEV_PARAM_FORCE_CHAIN_ANT, 1028 WMI_PDEV_PARAM_ANT_DIV_SELFTEST, 1029 WMI_PDEV_PARAM_ANT_DIV_SELFTEST_INTVL, 1030 WMI_PDEV_PARAM_STATS_OBSERVATION_PERIOD, 1031 WMI_PDEV_PARAM_TX_PPDU_DELAY_BIN_SIZE_MS, 1032 WMI_PDEV_PARAM_TX_PPDU_DELAY_ARRAY_LEN, 1033 WMI_PDEV_PARAM_TX_MPDU_AGGR_ARRAY_LEN, 1034 WMI_PDEV_PARAM_RX_MPDU_AGGR_ARRAY_LEN, 1035 WMI_PDEV_PARAM_TX_SCH_DELAY, 1036 WMI_PDEV_PARAM_ENABLE_RTS_SIFS_BURSTING, 1037 WMI_PDEV_PARAM_MAX_MPDUS_IN_AMPDU, 1038 WMI_PDEV_PARAM_PEER_STATS_INFO_ENABLE, 1039 WMI_PDEV_PARAM_FAST_PWR_TRANSITION, 1040 WMI_PDEV_PARAM_RADIO_CHAN_STATS_ENABLE, 1041 WMI_PDEV_PARAM_RADIO_DIAGNOSIS_ENABLE, 1042 WMI_PDEV_PARAM_MESH_MCAST_ENABLE, 1043 }; 1044 1045 enum wmi_tlv_vdev_param { 1046 WMI_VDEV_PARAM_RTS_THRESHOLD = 0x1, 1047 WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD, 1048 WMI_VDEV_PARAM_BEACON_INTERVAL, 1049 WMI_VDEV_PARAM_LISTEN_INTERVAL, 1050 WMI_VDEV_PARAM_MULTICAST_RATE, 1051 WMI_VDEV_PARAM_MGMT_TX_RATE, 1052 WMI_VDEV_PARAM_SLOT_TIME, 1053 WMI_VDEV_PARAM_PREAMBLE, 1054 WMI_VDEV_PARAM_SWBA_TIME, 1055 WMI_VDEV_STATS_UPDATE_PERIOD, 1056 WMI_VDEV_PWRSAVE_AGEOUT_TIME, 1057 WMI_VDEV_HOST_SWBA_INTERVAL, 1058 WMI_VDEV_PARAM_DTIM_PERIOD, 1059 WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT, 1060 WMI_VDEV_PARAM_WDS, 1061 WMI_VDEV_PARAM_ATIM_WINDOW, 1062 WMI_VDEV_PARAM_BMISS_COUNT_MAX, 1063 WMI_VDEV_PARAM_BMISS_FIRST_BCNT, 1064 WMI_VDEV_PARAM_BMISS_FINAL_BCNT, 1065 WMI_VDEV_PARAM_FEATURE_WMM, 1066 WMI_VDEV_PARAM_CHWIDTH, 1067 WMI_VDEV_PARAM_CHEXTOFFSET, 1068 WMI_VDEV_PARAM_DISABLE_HTPROTECTION, 1069 WMI_VDEV_PARAM_STA_QUICKKICKOUT, 1070 WMI_VDEV_PARAM_MGMT_RATE, 1071 WMI_VDEV_PARAM_PROTECTION_MODE, 1072 WMI_VDEV_PARAM_FIXED_RATE, 1073 WMI_VDEV_PARAM_SGI, 1074 WMI_VDEV_PARAM_LDPC, 1075 WMI_VDEV_PARAM_TX_STBC, 1076 WMI_VDEV_PARAM_RX_STBC, 1077 WMI_VDEV_PARAM_INTRA_BSS_FWD, 1078 WMI_VDEV_PARAM_DEF_KEYID, 1079 WMI_VDEV_PARAM_NSS, 1080 WMI_VDEV_PARAM_BCAST_DATA_RATE, 1081 WMI_VDEV_PARAM_MCAST_DATA_RATE, 1082 WMI_VDEV_PARAM_MCAST_INDICATE, 1083 WMI_VDEV_PARAM_DHCP_INDICATE, 1084 WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE, 1085 WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS, 1086 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS, 1087 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS, 1088 WMI_VDEV_PARAM_AP_ENABLE_NAWDS, 1089 WMI_VDEV_PARAM_ENABLE_RTSCTS, 1090 WMI_VDEV_PARAM_TXBF, 1091 WMI_VDEV_PARAM_PACKET_POWERSAVE, 1092 WMI_VDEV_PARAM_DROP_UNENCRY, 1093 WMI_VDEV_PARAM_TX_ENCAP_TYPE, 1094 WMI_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS, 1095 WMI_VDEV_PARAM_EARLY_RX_ADJUST_ENABLE, 1096 WMI_VDEV_PARAM_EARLY_RX_TGT_BMISS_NUM, 1097 WMI_VDEV_PARAM_EARLY_RX_BMISS_SAMPLE_CYCLE, 1098 WMI_VDEV_PARAM_EARLY_RX_SLOP_STEP, 1099 WMI_VDEV_PARAM_EARLY_RX_INIT_SLOP, 1100 WMI_VDEV_PARAM_EARLY_RX_ADJUST_PAUSE, 1101 WMI_VDEV_PARAM_TX_PWRLIMIT, 1102 WMI_VDEV_PARAM_SNR_NUM_FOR_CAL, 1103 WMI_VDEV_PARAM_ROAM_FW_OFFLOAD, 1104 WMI_VDEV_PARAM_ENABLE_RMC, 1105 WMI_VDEV_PARAM_IBSS_MAX_BCN_LOST_MS, 1106 WMI_VDEV_PARAM_MAX_RATE, 1107 WMI_VDEV_PARAM_EARLY_RX_DRIFT_SAMPLE, 1108 WMI_VDEV_PARAM_SET_IBSS_TX_FAIL_CNT_THR, 1109 WMI_VDEV_PARAM_EBT_RESYNC_TIMEOUT, 1110 WMI_VDEV_PARAM_AGGR_TRIG_EVENT_ENABLE, 1111 WMI_VDEV_PARAM_IS_IBSS_POWER_SAVE_ALLOWED, 1112 WMI_VDEV_PARAM_IS_POWER_COLLAPSE_ALLOWED, 1113 WMI_VDEV_PARAM_IS_AWAKE_ON_TXRX_ENABLED, 1114 WMI_VDEV_PARAM_INACTIVITY_CNT, 1115 WMI_VDEV_PARAM_TXSP_END_INACTIVITY_TIME_MS, 1116 WMI_VDEV_PARAM_DTIM_POLICY, 1117 WMI_VDEV_PARAM_IBSS_PS_WARMUP_TIME_SECS, 1118 WMI_VDEV_PARAM_IBSS_PS_1RX_CHAIN_IN_ATIM_WINDOW_ENABLE, 1119 WMI_VDEV_PARAM_RX_LEAK_WINDOW, 1120 WMI_VDEV_PARAM_STATS_AVG_FACTOR, 1121 WMI_VDEV_PARAM_DISCONNECT_TH, 1122 WMI_VDEV_PARAM_RTSCTS_RATE, 1123 WMI_VDEV_PARAM_MCC_RTSCTS_PROTECTION_ENABLE, 1124 WMI_VDEV_PARAM_MCC_BROADCAST_PROBE_ENABLE, 1125 WMI_VDEV_PARAM_TXPOWER_SCALE, 1126 WMI_VDEV_PARAM_TXPOWER_SCALE_DECR_DB, 1127 WMI_VDEV_PARAM_MCAST2UCAST_SET, 1128 WMI_VDEV_PARAM_RC_NUM_RETRIES, 1129 WMI_VDEV_PARAM_CABQ_MAXDUR, 1130 WMI_VDEV_PARAM_MFPTEST_SET, 1131 WMI_VDEV_PARAM_RTS_FIXED_RATE, 1132 WMI_VDEV_PARAM_VHT_SGIMASK, 1133 WMI_VDEV_PARAM_VHT80_RATEMASK, 1134 WMI_VDEV_PARAM_PROXY_STA, 1135 WMI_VDEV_PARAM_VIRTUAL_CELL_MODE, 1136 WMI_VDEV_PARAM_RX_DECAP_TYPE, 1137 WMI_VDEV_PARAM_BW_NSS_RATEMASK, 1138 WMI_VDEV_PARAM_SENSOR_AP, 1139 WMI_VDEV_PARAM_BEACON_RATE, 1140 WMI_VDEV_PARAM_DTIM_ENABLE_CTS, 1141 WMI_VDEV_PARAM_STA_KICKOUT, 1142 WMI_VDEV_PARAM_CAPABILITIES, 1143 WMI_VDEV_PARAM_TSF_INCREMENT, 1144 WMI_VDEV_PARAM_AMPDU_PER_AC, 1145 WMI_VDEV_PARAM_RX_FILTER, 1146 WMI_VDEV_PARAM_MGMT_TX_POWER, 1147 WMI_VDEV_PARAM_NON_AGG_SW_RETRY_TH, 1148 WMI_VDEV_PARAM_AGG_SW_RETRY_TH, 1149 WMI_VDEV_PARAM_DISABLE_DYN_BW_RTS, 1150 WMI_VDEV_PARAM_ATF_SSID_SCHED_POLICY, 1151 WMI_VDEV_PARAM_HE_DCM, 1152 WMI_VDEV_PARAM_HE_RANGE_EXT, 1153 WMI_VDEV_PARAM_ENABLE_BCAST_PROBE_RESPONSE, 1154 WMI_VDEV_PARAM_FILS_MAX_CHANNEL_GUARD_TIME, 1155 WMI_VDEV_PARAM_BA_MODE = 0x7e, 1156 WMI_VDEV_PARAM_SET_HE_SOUNDING_MODE = 0x87, 1157 WMI_VDEV_PARAM_6GHZ_PARAMS = 0x99, 1158 WMI_VDEV_PARAM_PROTOTYPE = 0x8000, 1159 WMI_VDEV_PARAM_BSS_COLOR, 1160 WMI_VDEV_PARAM_SET_HEMU_MODE, 1161 WMI_VDEV_PARAM_HEOPS_0_31 = 0x8003, 1162 }; 1163 1164 enum wmi_tlv_peer_flags { 1165 WMI_PEER_AUTH = 0x00000001, 1166 WMI_PEER_QOS = 0x00000002, 1167 WMI_PEER_NEED_PTK_4_WAY = 0x00000004, 1168 WMI_PEER_NEED_GTK_2_WAY = 0x00000010, 1169 WMI_PEER_HE = 0x00000400, 1170 WMI_PEER_APSD = 0x00000800, 1171 WMI_PEER_HT = 0x00001000, 1172 WMI_PEER_40MHZ = 0x00002000, 1173 WMI_PEER_STBC = 0x00008000, 1174 WMI_PEER_LDPC = 0x00010000, 1175 WMI_PEER_DYN_MIMOPS = 0x00020000, 1176 WMI_PEER_STATIC_MIMOPS = 0x00040000, 1177 WMI_PEER_SPATIAL_MUX = 0x00200000, 1178 WMI_PEER_TWT_REQ = 0x00400000, 1179 WMI_PEER_TWT_RESP = 0x00800000, 1180 WMI_PEER_VHT = 0x02000000, 1181 WMI_PEER_80MHZ = 0x04000000, 1182 WMI_PEER_PMF = 0x08000000, 1183 WMI_PEER_IS_P2P_CAPABLE = 0x20000000, 1184 WMI_PEER_160MHZ = 0x40000000, 1185 WMI_PEER_SAFEMODE_EN = 0x80000000, 1186 }; 1187 1188 enum wmi_tlv_peer_flags_ext { 1189 WMI_PEER_EXT_EHT = BIT(0), 1190 WMI_PEER_EXT_320MHZ = BIT(1), 1191 }; 1192 1193 /** Enum list of TLV Tags for each parameter structure type. */ 1194 enum wmi_tlv_tag { 1195 WMI_TAG_LAST_RESERVED = 15, 1196 WMI_TAG_FIRST_ARRAY_ENUM, 1197 WMI_TAG_ARRAY_UINT32 = WMI_TAG_FIRST_ARRAY_ENUM, 1198 WMI_TAG_ARRAY_BYTE, 1199 WMI_TAG_ARRAY_STRUCT, 1200 WMI_TAG_ARRAY_FIXED_STRUCT, 1201 WMI_TAG_ARRAY_INT16, 1202 WMI_TAG_LAST_ARRAY_ENUM = 31, 1203 WMI_TAG_SERVICE_READY_EVENT, 1204 WMI_TAG_HAL_REG_CAPABILITIES, 1205 WMI_TAG_WLAN_HOST_MEM_REQ, 1206 WMI_TAG_READY_EVENT, 1207 WMI_TAG_SCAN_EVENT, 1208 WMI_TAG_PDEV_TPC_CONFIG_EVENT, 1209 WMI_TAG_CHAN_INFO_EVENT, 1210 WMI_TAG_COMB_PHYERR_RX_HDR, 1211 WMI_TAG_VDEV_START_RESPONSE_EVENT, 1212 WMI_TAG_VDEV_STOPPED_EVENT, 1213 WMI_TAG_VDEV_INSTALL_KEY_COMPLETE_EVENT, 1214 WMI_TAG_PEER_STA_KICKOUT_EVENT, 1215 WMI_TAG_MGMT_RX_HDR, 1216 WMI_TAG_TBTT_OFFSET_EVENT, 1217 WMI_TAG_TX_DELBA_COMPLETE_EVENT, 1218 WMI_TAG_TX_ADDBA_COMPLETE_EVENT, 1219 WMI_TAG_ROAM_EVENT, 1220 WMI_TAG_WOW_EVENT_INFO, 1221 WMI_TAG_WOW_EVENT_INFO_SECTION_BITMAP, 1222 WMI_TAG_RTT_EVENT_HEADER, 1223 WMI_TAG_RTT_ERROR_REPORT_EVENT, 1224 WMI_TAG_RTT_MEAS_EVENT, 1225 WMI_TAG_ECHO_EVENT, 1226 WMI_TAG_FTM_INTG_EVENT, 1227 WMI_TAG_VDEV_GET_KEEPALIVE_EVENT, 1228 WMI_TAG_GPIO_INPUT_EVENT, 1229 WMI_TAG_CSA_EVENT, 1230 WMI_TAG_GTK_OFFLOAD_STATUS_EVENT, 1231 WMI_TAG_IGTK_INFO, 1232 WMI_TAG_DCS_INTERFERENCE_EVENT, 1233 WMI_TAG_ATH_DCS_CW_INT, 1234 WMI_TAG_WLAN_DCS_CW_INT = /* ALIAS */ 1235 WMI_TAG_ATH_DCS_CW_INT, 1236 WMI_TAG_ATH_DCS_WLAN_INT_STAT, 1237 WMI_TAG_WLAN_DCS_IM_TGT_STATS_T = /* ALIAS */ 1238 WMI_TAG_ATH_DCS_WLAN_INT_STAT, 1239 WMI_TAG_WLAN_PROFILE_CTX_T, 1240 WMI_TAG_WLAN_PROFILE_T, 1241 WMI_TAG_PDEV_QVIT_EVENT, 1242 WMI_TAG_HOST_SWBA_EVENT, 1243 WMI_TAG_TIM_INFO, 1244 WMI_TAG_P2P_NOA_INFO, 1245 WMI_TAG_STATS_EVENT, 1246 WMI_TAG_AVOID_FREQ_RANGES_EVENT, 1247 WMI_TAG_AVOID_FREQ_RANGE_DESC, 1248 WMI_TAG_GTK_REKEY_FAIL_EVENT, 1249 WMI_TAG_INIT_CMD, 1250 WMI_TAG_RESOURCE_CONFIG, 1251 WMI_TAG_WLAN_HOST_MEMORY_CHUNK, 1252 WMI_TAG_START_SCAN_CMD, 1253 WMI_TAG_STOP_SCAN_CMD, 1254 WMI_TAG_SCAN_CHAN_LIST_CMD, 1255 WMI_TAG_CHANNEL, 1256 WMI_TAG_PDEV_SET_REGDOMAIN_CMD, 1257 WMI_TAG_PDEV_SET_PARAM_CMD, 1258 WMI_TAG_PDEV_SET_WMM_PARAMS_CMD, 1259 WMI_TAG_WMM_PARAMS, 1260 WMI_TAG_PDEV_SET_QUIET_CMD, 1261 WMI_TAG_VDEV_CREATE_CMD, 1262 WMI_TAG_VDEV_DELETE_CMD, 1263 WMI_TAG_VDEV_START_REQUEST_CMD, 1264 WMI_TAG_P2P_NOA_DESCRIPTOR, 1265 WMI_TAG_P2P_GO_SET_BEACON_IE, 1266 WMI_TAG_GTK_OFFLOAD_CMD, 1267 WMI_TAG_VDEV_UP_CMD, 1268 WMI_TAG_VDEV_STOP_CMD, 1269 WMI_TAG_VDEV_DOWN_CMD, 1270 WMI_TAG_VDEV_SET_PARAM_CMD, 1271 WMI_TAG_VDEV_INSTALL_KEY_CMD, 1272 WMI_TAG_PEER_CREATE_CMD, 1273 WMI_TAG_PEER_DELETE_CMD, 1274 WMI_TAG_PEER_FLUSH_TIDS_CMD, 1275 WMI_TAG_PEER_SET_PARAM_CMD, 1276 WMI_TAG_PEER_ASSOC_COMPLETE_CMD, 1277 WMI_TAG_VHT_RATE_SET, 1278 WMI_TAG_BCN_TMPL_CMD, 1279 WMI_TAG_PRB_TMPL_CMD, 1280 WMI_TAG_BCN_PRB_INFO, 1281 WMI_TAG_PEER_TID_ADDBA_CMD, 1282 WMI_TAG_PEER_TID_DELBA_CMD, 1283 WMI_TAG_STA_POWERSAVE_MODE_CMD, 1284 WMI_TAG_STA_POWERSAVE_PARAM_CMD, 1285 WMI_TAG_STA_DTIM_PS_METHOD_CMD, 1286 WMI_TAG_ROAM_SCAN_MODE, 1287 WMI_TAG_ROAM_SCAN_RSSI_THRESHOLD, 1288 WMI_TAG_ROAM_SCAN_PERIOD, 1289 WMI_TAG_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, 1290 WMI_TAG_PDEV_SUSPEND_CMD, 1291 WMI_TAG_PDEV_RESUME_CMD, 1292 WMI_TAG_ADD_BCN_FILTER_CMD, 1293 WMI_TAG_RMV_BCN_FILTER_CMD, 1294 WMI_TAG_WOW_ENABLE_CMD, 1295 WMI_TAG_WOW_HOSTWAKEUP_FROM_SLEEP_CMD, 1296 WMI_TAG_STA_UAPSD_AUTO_TRIG_CMD, 1297 WMI_TAG_STA_UAPSD_AUTO_TRIG_PARAM, 1298 WMI_TAG_SET_ARP_NS_OFFLOAD_CMD, 1299 WMI_TAG_ARP_OFFLOAD_TUPLE, 1300 WMI_TAG_NS_OFFLOAD_TUPLE, 1301 WMI_TAG_FTM_INTG_CMD, 1302 WMI_TAG_STA_KEEPALIVE_CMD, 1303 WMI_TAG_STA_KEEPALVE_ARP_RESPONSE, 1304 WMI_TAG_P2P_SET_VENDOR_IE_DATA_CMD, 1305 WMI_TAG_AP_PS_PEER_CMD, 1306 WMI_TAG_PEER_RATE_RETRY_SCHED_CMD, 1307 WMI_TAG_WLAN_PROFILE_TRIGGER_CMD, 1308 WMI_TAG_WLAN_PROFILE_SET_HIST_INTVL_CMD, 1309 WMI_TAG_WLAN_PROFILE_GET_PROF_DATA_CMD, 1310 WMI_TAG_WLAN_PROFILE_ENABLE_PROFILE_ID_CMD, 1311 WMI_TAG_WOW_DEL_PATTERN_CMD, 1312 WMI_TAG_WOW_ADD_DEL_EVT_CMD, 1313 WMI_TAG_RTT_MEASREQ_HEAD, 1314 WMI_TAG_RTT_MEASREQ_BODY, 1315 WMI_TAG_RTT_TSF_CMD, 1316 WMI_TAG_VDEV_SPECTRAL_CONFIGURE_CMD, 1317 WMI_TAG_VDEV_SPECTRAL_ENABLE_CMD, 1318 WMI_TAG_REQUEST_STATS_CMD, 1319 WMI_TAG_NLO_CONFIG_CMD, 1320 WMI_TAG_NLO_CONFIGURED_PARAMETERS, 1321 WMI_TAG_CSA_OFFLOAD_ENABLE_CMD, 1322 WMI_TAG_CSA_OFFLOAD_CHANSWITCH_CMD, 1323 WMI_TAG_CHATTER_SET_MODE_CMD, 1324 WMI_TAG_ECHO_CMD, 1325 WMI_TAG_VDEV_SET_KEEPALIVE_CMD, 1326 WMI_TAG_VDEV_GET_KEEPALIVE_CMD, 1327 WMI_TAG_FORCE_FW_HANG_CMD, 1328 WMI_TAG_GPIO_CONFIG_CMD, 1329 WMI_TAG_GPIO_OUTPUT_CMD, 1330 WMI_TAG_PEER_ADD_WDS_ENTRY_CMD, 1331 WMI_TAG_PEER_REMOVE_WDS_ENTRY_CMD, 1332 WMI_TAG_BCN_TX_HDR, 1333 WMI_TAG_BCN_SEND_FROM_HOST_CMD, 1334 WMI_TAG_MGMT_TX_HDR, 1335 WMI_TAG_ADDBA_CLEAR_RESP_CMD, 1336 WMI_TAG_ADDBA_SEND_CMD, 1337 WMI_TAG_DELBA_SEND_CMD, 1338 WMI_TAG_ADDBA_SETRESPONSE_CMD, 1339 WMI_TAG_SEND_SINGLEAMSDU_CMD, 1340 WMI_TAG_PDEV_PKTLOG_ENABLE_CMD, 1341 WMI_TAG_PDEV_PKTLOG_DISABLE_CMD, 1342 WMI_TAG_PDEV_SET_HT_IE_CMD, 1343 WMI_TAG_PDEV_SET_VHT_IE_CMD, 1344 WMI_TAG_PDEV_SET_DSCP_TID_MAP_CMD, 1345 WMI_TAG_PDEV_GREEN_AP_PS_ENABLE_CMD, 1346 WMI_TAG_PDEV_GET_TPC_CONFIG_CMD, 1347 WMI_TAG_PDEV_SET_BASE_MACADDR_CMD, 1348 WMI_TAG_PEER_MCAST_GROUP_CMD, 1349 WMI_TAG_ROAM_AP_PROFILE, 1350 WMI_TAG_AP_PROFILE, 1351 WMI_TAG_SCAN_SCH_PRIORITY_TABLE_CMD, 1352 WMI_TAG_PDEV_DFS_ENABLE_CMD, 1353 WMI_TAG_PDEV_DFS_DISABLE_CMD, 1354 WMI_TAG_WOW_ADD_PATTERN_CMD, 1355 WMI_TAG_WOW_BITMAP_PATTERN_T, 1356 WMI_TAG_WOW_IPV4_SYNC_PATTERN_T, 1357 WMI_TAG_WOW_IPV6_SYNC_PATTERN_T, 1358 WMI_TAG_WOW_MAGIC_PATTERN_CMD, 1359 WMI_TAG_SCAN_UPDATE_REQUEST_CMD, 1360 WMI_TAG_CHATTER_PKT_COALESCING_FILTER, 1361 WMI_TAG_CHATTER_COALESCING_ADD_FILTER_CMD, 1362 WMI_TAG_CHATTER_COALESCING_DELETE_FILTER_CMD, 1363 WMI_TAG_CHATTER_COALESCING_QUERY_CMD, 1364 WMI_TAG_TXBF_CMD, 1365 WMI_TAG_DEBUG_LOG_CONFIG_CMD, 1366 WMI_TAG_NLO_EVENT, 1367 WMI_TAG_CHATTER_QUERY_REPLY_EVENT, 1368 WMI_TAG_UPLOAD_H_HDR, 1369 WMI_TAG_CAPTURE_H_EVENT_HDR, 1370 WMI_TAG_VDEV_WNM_SLEEPMODE_CMD, 1371 WMI_TAG_VDEV_IPSEC_NATKEEPALIVE_FILTER_CMD, 1372 WMI_TAG_VDEV_WMM_ADDTS_CMD, 1373 WMI_TAG_VDEV_WMM_DELTS_CMD, 1374 WMI_TAG_VDEV_SET_WMM_PARAMS_CMD, 1375 WMI_TAG_TDLS_SET_STATE_CMD, 1376 WMI_TAG_TDLS_PEER_UPDATE_CMD, 1377 WMI_TAG_TDLS_PEER_EVENT, 1378 WMI_TAG_TDLS_PEER_CAPABILITIES, 1379 WMI_TAG_VDEV_MCC_SET_TBTT_MODE_CMD, 1380 WMI_TAG_ROAM_CHAN_LIST, 1381 WMI_TAG_VDEV_MCC_BCN_INTVL_CHANGE_EVENT, 1382 WMI_TAG_RESMGR_ADAPTIVE_OCS_ENABLE_DISABLE_CMD, 1383 WMI_TAG_RESMGR_SET_CHAN_TIME_QUOTA_CMD, 1384 WMI_TAG_RESMGR_SET_CHAN_LATENCY_CMD, 1385 WMI_TAG_BA_REQ_SSN_CMD, 1386 WMI_TAG_BA_RSP_SSN_EVENT, 1387 WMI_TAG_STA_SMPS_FORCE_MODE_CMD, 1388 WMI_TAG_SET_MCASTBCAST_FILTER_CMD, 1389 WMI_TAG_P2P_SET_OPPPS_CMD, 1390 WMI_TAG_P2P_SET_NOA_CMD, 1391 WMI_TAG_BA_REQ_SSN_CMD_SUB_STRUCT_PARAM, 1392 WMI_TAG_BA_REQ_SSN_EVENT_SUB_STRUCT_PARAM, 1393 WMI_TAG_STA_SMPS_PARAM_CMD, 1394 WMI_TAG_VDEV_SET_GTX_PARAMS_CMD, 1395 WMI_TAG_MCC_SCHED_TRAFFIC_STATS_CMD, 1396 WMI_TAG_MCC_SCHED_STA_TRAFFIC_STATS, 1397 WMI_TAG_OFFLOAD_BCN_TX_STATUS_EVENT, 1398 WMI_TAG_P2P_NOA_EVENT, 1399 WMI_TAG_HB_SET_ENABLE_CMD, 1400 WMI_TAG_HB_SET_TCP_PARAMS_CMD, 1401 WMI_TAG_HB_SET_TCP_PKT_FILTER_CMD, 1402 WMI_TAG_HB_SET_UDP_PARAMS_CMD, 1403 WMI_TAG_HB_SET_UDP_PKT_FILTER_CMD, 1404 WMI_TAG_HB_IND_EVENT, 1405 WMI_TAG_TX_PAUSE_EVENT, 1406 WMI_TAG_RFKILL_EVENT, 1407 WMI_TAG_DFS_RADAR_EVENT, 1408 WMI_TAG_DFS_PHYERR_FILTER_ENA_CMD, 1409 WMI_TAG_DFS_PHYERR_FILTER_DIS_CMD, 1410 WMI_TAG_BATCH_SCAN_RESULT_SCAN_LIST, 1411 WMI_TAG_BATCH_SCAN_RESULT_NETWORK_INFO, 1412 WMI_TAG_BATCH_SCAN_ENABLE_CMD, 1413 WMI_TAG_BATCH_SCAN_DISABLE_CMD, 1414 WMI_TAG_BATCH_SCAN_TRIGGER_RESULT_CMD, 1415 WMI_TAG_BATCH_SCAN_ENABLED_EVENT, 1416 WMI_TAG_BATCH_SCAN_RESULT_EVENT, 1417 WMI_TAG_VDEV_PLMREQ_START_CMD, 1418 WMI_TAG_VDEV_PLMREQ_STOP_CMD, 1419 WMI_TAG_THERMAL_MGMT_CMD, 1420 WMI_TAG_THERMAL_MGMT_EVENT, 1421 WMI_TAG_PEER_INFO_REQ_CMD, 1422 WMI_TAG_PEER_INFO_EVENT, 1423 WMI_TAG_PEER_INFO, 1424 WMI_TAG_PEER_TX_FAIL_CNT_THR_EVENT, 1425 WMI_TAG_RMC_SET_MODE_CMD, 1426 WMI_TAG_RMC_SET_ACTION_PERIOD_CMD, 1427 WMI_TAG_RMC_CONFIG_CMD, 1428 WMI_TAG_MHF_OFFLOAD_SET_MODE_CMD, 1429 WMI_TAG_MHF_OFFLOAD_PLUMB_ROUTING_TABLE_CMD, 1430 WMI_TAG_ADD_PROACTIVE_ARP_RSP_PATTERN_CMD, 1431 WMI_TAG_DEL_PROACTIVE_ARP_RSP_PATTERN_CMD, 1432 WMI_TAG_NAN_CMD_PARAM, 1433 WMI_TAG_NAN_EVENT_HDR, 1434 WMI_TAG_PDEV_L1SS_TRACK_EVENT, 1435 WMI_TAG_DIAG_DATA_CONTAINER_EVENT, 1436 WMI_TAG_MODEM_POWER_STATE_CMD_PARAM, 1437 WMI_TAG_PEER_GET_ESTIMATED_LINKSPEED_CMD, 1438 WMI_TAG_PEER_ESTIMATED_LINKSPEED_EVENT, 1439 WMI_TAG_AGGR_STATE_TRIG_EVENT, 1440 WMI_TAG_MHF_OFFLOAD_ROUTING_TABLE_ENTRY, 1441 WMI_TAG_ROAM_SCAN_CMD, 1442 WMI_TAG_REQ_STATS_EXT_CMD, 1443 WMI_TAG_STATS_EXT_EVENT, 1444 WMI_TAG_OBSS_SCAN_ENABLE_CMD, 1445 WMI_TAG_OBSS_SCAN_DISABLE_CMD, 1446 WMI_TAG_OFFLOAD_PRB_RSP_TX_STATUS_EVENT, 1447 WMI_TAG_PDEV_SET_LED_CONFIG_CMD, 1448 WMI_TAG_HOST_AUTO_SHUTDOWN_CFG_CMD, 1449 WMI_TAG_HOST_AUTO_SHUTDOWN_EVENT, 1450 WMI_TAG_UPDATE_WHAL_MIB_STATS_EVENT, 1451 WMI_TAG_CHAN_AVOID_UPDATE_CMD_PARAM, 1452 WMI_TAG_WOW_IOAC_PKT_PATTERN_T, 1453 WMI_TAG_WOW_IOAC_TMR_PATTERN_T, 1454 WMI_TAG_WOW_IOAC_ADD_KEEPALIVE_CMD, 1455 WMI_TAG_WOW_IOAC_DEL_KEEPALIVE_CMD, 1456 WMI_TAG_WOW_IOAC_KEEPALIVE_T, 1457 WMI_TAG_WOW_IOAC_ADD_PATTERN_CMD, 1458 WMI_TAG_WOW_IOAC_DEL_PATTERN_CMD, 1459 WMI_TAG_START_LINK_STATS_CMD, 1460 WMI_TAG_CLEAR_LINK_STATS_CMD, 1461 WMI_TAG_REQUEST_LINK_STATS_CMD, 1462 WMI_TAG_IFACE_LINK_STATS_EVENT, 1463 WMI_TAG_RADIO_LINK_STATS_EVENT, 1464 WMI_TAG_PEER_STATS_EVENT, 1465 WMI_TAG_CHANNEL_STATS, 1466 WMI_TAG_RADIO_LINK_STATS, 1467 WMI_TAG_RATE_STATS, 1468 WMI_TAG_PEER_LINK_STATS, 1469 WMI_TAG_WMM_AC_STATS, 1470 WMI_TAG_IFACE_LINK_STATS, 1471 WMI_TAG_LPI_MGMT_SNOOPING_CONFIG_CMD, 1472 WMI_TAG_LPI_START_SCAN_CMD, 1473 WMI_TAG_LPI_STOP_SCAN_CMD, 1474 WMI_TAG_LPI_RESULT_EVENT, 1475 WMI_TAG_PEER_STATE_EVENT, 1476 WMI_TAG_EXTSCAN_BUCKET_CMD, 1477 WMI_TAG_EXTSCAN_BUCKET_CHANNEL_EVENT, 1478 WMI_TAG_EXTSCAN_START_CMD, 1479 WMI_TAG_EXTSCAN_STOP_CMD, 1480 WMI_TAG_EXTSCAN_CONFIGURE_WLAN_CHANGE_MONITOR_CMD, 1481 WMI_TAG_EXTSCAN_WLAN_CHANGE_BSSID_PARAM_CMD, 1482 WMI_TAG_EXTSCAN_CONFIGURE_HOTLIST_MONITOR_CMD, 1483 WMI_TAG_EXTSCAN_GET_CACHED_RESULTS_CMD, 1484 WMI_TAG_EXTSCAN_GET_WLAN_CHANGE_RESULTS_CMD, 1485 WMI_TAG_EXTSCAN_SET_CAPABILITIES_CMD, 1486 WMI_TAG_EXTSCAN_GET_CAPABILITIES_CMD, 1487 WMI_TAG_EXTSCAN_OPERATION_EVENT, 1488 WMI_TAG_EXTSCAN_START_STOP_EVENT, 1489 WMI_TAG_EXTSCAN_TABLE_USAGE_EVENT, 1490 WMI_TAG_EXTSCAN_WLAN_DESCRIPTOR_EVENT, 1491 WMI_TAG_EXTSCAN_RSSI_INFO_EVENT, 1492 WMI_TAG_EXTSCAN_CACHED_RESULTS_EVENT, 1493 WMI_TAG_EXTSCAN_WLAN_CHANGE_RESULTS_EVENT, 1494 WMI_TAG_EXTSCAN_WLAN_CHANGE_RESULT_BSSID_EVENT, 1495 WMI_TAG_EXTSCAN_HOTLIST_MATCH_EVENT, 1496 WMI_TAG_EXTSCAN_CAPABILITIES_EVENT, 1497 WMI_TAG_EXTSCAN_CACHE_CAPABILITIES_EVENT, 1498 WMI_TAG_EXTSCAN_WLAN_CHANGE_MONITOR_CAPABILITIES_EVENT, 1499 WMI_TAG_EXTSCAN_HOTLIST_MONITOR_CAPABILITIES_EVENT, 1500 WMI_TAG_D0_WOW_ENABLE_DISABLE_CMD, 1501 WMI_TAG_D0_WOW_DISABLE_ACK_EVENT, 1502 WMI_TAG_UNIT_TEST_CMD, 1503 WMI_TAG_ROAM_OFFLOAD_TLV_PARAM, 1504 WMI_TAG_ROAM_11I_OFFLOAD_TLV_PARAM, 1505 WMI_TAG_ROAM_11R_OFFLOAD_TLV_PARAM, 1506 WMI_TAG_ROAM_ESE_OFFLOAD_TLV_PARAM, 1507 WMI_TAG_ROAM_SYNCH_EVENT, 1508 WMI_TAG_ROAM_SYNCH_COMPLETE, 1509 WMI_TAG_EXTWOW_ENABLE_CMD, 1510 WMI_TAG_EXTWOW_SET_APP_TYPE1_PARAMS_CMD, 1511 WMI_TAG_EXTWOW_SET_APP_TYPE2_PARAMS_CMD, 1512 WMI_TAG_LPI_STATUS_EVENT, 1513 WMI_TAG_LPI_HANDOFF_EVENT, 1514 WMI_TAG_VDEV_RATE_STATS_EVENT, 1515 WMI_TAG_VDEV_RATE_HT_INFO, 1516 WMI_TAG_RIC_REQUEST, 1517 WMI_TAG_PDEV_GET_TEMPERATURE_CMD, 1518 WMI_TAG_PDEV_TEMPERATURE_EVENT, 1519 WMI_TAG_SET_DHCP_SERVER_OFFLOAD_CMD, 1520 WMI_TAG_TPC_CHAINMASK_CONFIG_CMD, 1521 WMI_TAG_RIC_TSPEC, 1522 WMI_TAG_TPC_CHAINMASK_CONFIG, 1523 WMI_TAG_IPA_OFFLOAD_ENABLE_DISABLE_CMD, 1524 WMI_TAG_SCAN_PROB_REQ_OUI_CMD, 1525 WMI_TAG_KEY_MATERIAL, 1526 WMI_TAG_TDLS_SET_OFFCHAN_MODE_CMD, 1527 WMI_TAG_SET_LED_FLASHING_CMD, 1528 WMI_TAG_MDNS_OFFLOAD_CMD, 1529 WMI_TAG_MDNS_SET_FQDN_CMD, 1530 WMI_TAG_MDNS_SET_RESP_CMD, 1531 WMI_TAG_MDNS_GET_STATS_CMD, 1532 WMI_TAG_MDNS_STATS_EVENT, 1533 WMI_TAG_ROAM_INVOKE_CMD, 1534 WMI_TAG_PDEV_RESUME_EVENT, 1535 WMI_TAG_PDEV_SET_ANTENNA_DIVERSITY_CMD, 1536 WMI_TAG_SAP_OFL_ENABLE_CMD, 1537 WMI_TAG_SAP_OFL_ADD_STA_EVENT, 1538 WMI_TAG_SAP_OFL_DEL_STA_EVENT, 1539 WMI_TAG_APFIND_CMD_PARAM, 1540 WMI_TAG_APFIND_EVENT_HDR, 1541 WMI_TAG_OCB_SET_SCHED_CMD, 1542 WMI_TAG_OCB_SET_SCHED_EVENT, 1543 WMI_TAG_OCB_SET_CONFIG_CMD, 1544 WMI_TAG_OCB_SET_CONFIG_RESP_EVENT, 1545 WMI_TAG_OCB_SET_UTC_TIME_CMD, 1546 WMI_TAG_OCB_START_TIMING_ADVERT_CMD, 1547 WMI_TAG_OCB_STOP_TIMING_ADVERT_CMD, 1548 WMI_TAG_OCB_GET_TSF_TIMER_CMD, 1549 WMI_TAG_OCB_GET_TSF_TIMER_RESP_EVENT, 1550 WMI_TAG_DCC_GET_STATS_CMD, 1551 WMI_TAG_DCC_CHANNEL_STATS_REQUEST, 1552 WMI_TAG_DCC_GET_STATS_RESP_EVENT, 1553 WMI_TAG_DCC_CLEAR_STATS_CMD, 1554 WMI_TAG_DCC_UPDATE_NDL_CMD, 1555 WMI_TAG_DCC_UPDATE_NDL_RESP_EVENT, 1556 WMI_TAG_DCC_STATS_EVENT, 1557 WMI_TAG_OCB_CHANNEL, 1558 WMI_TAG_OCB_SCHEDULE_ELEMENT, 1559 WMI_TAG_DCC_NDL_STATS_PER_CHANNEL, 1560 WMI_TAG_DCC_NDL_CHAN, 1561 WMI_TAG_QOS_PARAMETER, 1562 WMI_TAG_DCC_NDL_ACTIVE_STATE_CONFIG, 1563 WMI_TAG_ROAM_SCAN_EXTENDED_THRESHOLD_PARAM, 1564 WMI_TAG_ROAM_FILTER, 1565 WMI_TAG_PASSPOINT_CONFIG_CMD, 1566 WMI_TAG_PASSPOINT_EVENT_HDR, 1567 WMI_TAG_EXTSCAN_CONFIGURE_HOTLIST_SSID_MONITOR_CMD, 1568 WMI_TAG_EXTSCAN_HOTLIST_SSID_MATCH_EVENT, 1569 WMI_TAG_VDEV_TSF_TSTAMP_ACTION_CMD, 1570 WMI_TAG_VDEV_TSF_REPORT_EVENT, 1571 WMI_TAG_GET_FW_MEM_DUMP, 1572 WMI_TAG_UPDATE_FW_MEM_DUMP, 1573 WMI_TAG_FW_MEM_DUMP_PARAMS, 1574 WMI_TAG_DEBUG_MESG_FLUSH, 1575 WMI_TAG_DEBUG_MESG_FLUSH_COMPLETE, 1576 WMI_TAG_PEER_SET_RATE_REPORT_CONDITION, 1577 WMI_TAG_ROAM_SUBNET_CHANGE_CONFIG, 1578 WMI_TAG_VDEV_SET_IE_CMD, 1579 WMI_TAG_RSSI_BREACH_MONITOR_CONFIG, 1580 WMI_TAG_RSSI_BREACH_EVENT, 1581 WMI_TAG_WOW_EVENT_INITIAL_WAKEUP, 1582 WMI_TAG_SOC_SET_PCL_CMD, 1583 WMI_TAG_SOC_SET_HW_MODE_CMD, 1584 WMI_TAG_SOC_SET_HW_MODE_RESPONSE_EVENT, 1585 WMI_TAG_SOC_HW_MODE_TRANSITION_EVENT, 1586 WMI_TAG_VDEV_TXRX_STREAMS, 1587 WMI_TAG_SOC_SET_HW_MODE_RESPONSE_VDEV_MAC_ENTRY, 1588 WMI_TAG_SOC_SET_DUAL_MAC_CONFIG_CMD, 1589 WMI_TAG_SOC_SET_DUAL_MAC_CONFIG_RESPONSE_EVENT, 1590 WMI_TAG_WOW_IOAC_SOCK_PATTERN_T, 1591 WMI_TAG_WOW_ENABLE_ICMPV6_NA_FLT_CMD, 1592 WMI_TAG_DIAG_EVENT_LOG_CONFIG, 1593 WMI_TAG_DIAG_EVENT_LOG_SUPPORTED_EVENT_FIXED_PARAMS, 1594 WMI_TAG_PACKET_FILTER_CONFIG, 1595 WMI_TAG_PACKET_FILTER_ENABLE, 1596 WMI_TAG_SAP_SET_BLACKLIST_PARAM_CMD, 1597 WMI_TAG_MGMT_TX_SEND_CMD, 1598 WMI_TAG_MGMT_TX_COMPL_EVENT, 1599 WMI_TAG_SOC_SET_ANTENNA_MODE_CMD, 1600 WMI_TAG_WOW_UDP_SVC_OFLD_CMD, 1601 WMI_TAG_LRO_INFO_CMD, 1602 WMI_TAG_ROAM_EARLYSTOP_RSSI_THRES_PARAM, 1603 WMI_TAG_SERVICE_READY_EXT_EVENT, 1604 WMI_TAG_MAWC_SENSOR_REPORT_IND_CMD, 1605 WMI_TAG_MAWC_ENABLE_SENSOR_EVENT, 1606 WMI_TAG_ROAM_CONFIGURE_MAWC_CMD, 1607 WMI_TAG_NLO_CONFIGURE_MAWC_CMD, 1608 WMI_TAG_EXTSCAN_CONFIGURE_MAWC_CMD, 1609 WMI_TAG_PEER_ASSOC_CONF_EVENT, 1610 WMI_TAG_WOW_HOSTWAKEUP_GPIO_PIN_PATTERN_CONFIG_CMD, 1611 WMI_TAG_AP_PS_EGAP_PARAM_CMD, 1612 WMI_TAG_AP_PS_EGAP_INFO_EVENT, 1613 WMI_TAG_PMF_OFFLOAD_SET_SA_QUERY_CMD, 1614 WMI_TAG_TRANSFER_DATA_TO_FLASH_CMD, 1615 WMI_TAG_TRANSFER_DATA_TO_FLASH_COMPLETE_EVENT, 1616 WMI_TAG_SCPC_EVENT, 1617 WMI_TAG_AP_PS_EGAP_INFO_CHAINMASK_LIST, 1618 WMI_TAG_STA_SMPS_FORCE_MODE_COMPLETE_EVENT, 1619 WMI_TAG_BPF_GET_CAPABILITY_CMD, 1620 WMI_TAG_BPF_CAPABILITY_INFO_EVT, 1621 WMI_TAG_BPF_GET_VDEV_STATS_CMD, 1622 WMI_TAG_BPF_VDEV_STATS_INFO_EVT, 1623 WMI_TAG_BPF_SET_VDEV_INSTRUCTIONS_CMD, 1624 WMI_TAG_BPF_DEL_VDEV_INSTRUCTIONS_CMD, 1625 WMI_TAG_VDEV_DELETE_RESP_EVENT, 1626 WMI_TAG_PEER_DELETE_RESP_EVENT, 1627 WMI_TAG_ROAM_DENSE_THRES_PARAM, 1628 WMI_TAG_ENLO_CANDIDATE_SCORE_PARAM, 1629 WMI_TAG_PEER_UPDATE_WDS_ENTRY_CMD, 1630 WMI_TAG_VDEV_CONFIG_RATEMASK, 1631 WMI_TAG_PDEV_FIPS_CMD, 1632 WMI_TAG_PDEV_SMART_ANT_ENABLE_CMD, 1633 WMI_TAG_PDEV_SMART_ANT_SET_RX_ANTENNA_CMD, 1634 WMI_TAG_PEER_SMART_ANT_SET_TX_ANTENNA_CMD, 1635 WMI_TAG_PEER_SMART_ANT_SET_TRAIN_ANTENNA_CMD, 1636 WMI_TAG_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMD, 1637 WMI_TAG_PDEV_SET_ANT_SWITCH_TBL_CMD, 1638 WMI_TAG_PDEV_SET_CTL_TABLE_CMD, 1639 WMI_TAG_PDEV_SET_MIMOGAIN_TABLE_CMD, 1640 WMI_TAG_FWTEST_SET_PARAM_CMD, 1641 WMI_TAG_PEER_ATF_REQUEST, 1642 WMI_TAG_VDEV_ATF_REQUEST, 1643 WMI_TAG_PDEV_GET_ANI_CCK_CONFIG_CMD, 1644 WMI_TAG_PDEV_GET_ANI_OFDM_CONFIG_CMD, 1645 WMI_TAG_INST_RSSI_STATS_RESP, 1646 WMI_TAG_MED_UTIL_REPORT_EVENT, 1647 WMI_TAG_PEER_STA_PS_STATECHANGE_EVENT, 1648 WMI_TAG_WDS_ADDR_EVENT, 1649 WMI_TAG_PEER_RATECODE_LIST_EVENT, 1650 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_EVENT, 1651 WMI_TAG_PDEV_TPC_EVENT, 1652 WMI_TAG_ANI_OFDM_EVENT, 1653 WMI_TAG_ANI_CCK_EVENT, 1654 WMI_TAG_PDEV_CHANNEL_HOPPING_EVENT, 1655 WMI_TAG_PDEV_FIPS_EVENT, 1656 WMI_TAG_ATF_PEER_INFO, 1657 WMI_TAG_PDEV_GET_TPC_CMD, 1658 WMI_TAG_VDEV_FILTER_NRP_CONFIG_CMD, 1659 WMI_TAG_QBOOST_CFG_CMD, 1660 WMI_TAG_PDEV_SMART_ANT_GPIO_HANDLE, 1661 WMI_TAG_PEER_SMART_ANT_SET_TX_ANTENNA_SERIES, 1662 WMI_TAG_PEER_SMART_ANT_SET_TRAIN_ANTENNA_PARAM, 1663 WMI_TAG_PDEV_SET_ANT_CTRL_CHAIN, 1664 WMI_TAG_PEER_CCK_OFDM_RATE_INFO, 1665 WMI_TAG_PEER_MCS_RATE_INFO, 1666 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_NFDBR, 1667 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_NFDBM, 1668 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_FREQNUM, 1669 WMI_TAG_MU_REPORT_TOTAL_MU, 1670 WMI_TAG_VDEV_SET_DSCP_TID_MAP_CMD, 1671 WMI_TAG_ROAM_SET_MBO, 1672 WMI_TAG_MIB_STATS_ENABLE_CMD, 1673 WMI_TAG_NAN_DISC_IFACE_CREATED_EVENT, 1674 WMI_TAG_NAN_DISC_IFACE_DELETED_EVENT, 1675 WMI_TAG_NAN_STARTED_CLUSTER_EVENT, 1676 WMI_TAG_NAN_JOINED_CLUSTER_EVENT, 1677 WMI_TAG_NDI_GET_CAP_REQ, 1678 WMI_TAG_NDP_INITIATOR_REQ, 1679 WMI_TAG_NDP_RESPONDER_REQ, 1680 WMI_TAG_NDP_END_REQ, 1681 WMI_TAG_NDI_CAP_RSP_EVENT, 1682 WMI_TAG_NDP_INITIATOR_RSP_EVENT, 1683 WMI_TAG_NDP_RESPONDER_RSP_EVENT, 1684 WMI_TAG_NDP_END_RSP_EVENT, 1685 WMI_TAG_NDP_INDICATION_EVENT, 1686 WMI_TAG_NDP_CONFIRM_EVENT, 1687 WMI_TAG_NDP_END_INDICATION_EVENT, 1688 WMI_TAG_VDEV_SET_QUIET_CMD, 1689 WMI_TAG_PDEV_SET_PCL_CMD, 1690 WMI_TAG_PDEV_SET_HW_MODE_CMD, 1691 WMI_TAG_PDEV_SET_MAC_CONFIG_CMD, 1692 WMI_TAG_PDEV_SET_ANTENNA_MODE_CMD, 1693 WMI_TAG_PDEV_SET_HW_MODE_RESPONSE_EVENT, 1694 WMI_TAG_PDEV_HW_MODE_TRANSITION_EVENT, 1695 WMI_TAG_PDEV_SET_HW_MODE_RESPONSE_VDEV_MAC_ENTRY, 1696 WMI_TAG_PDEV_SET_MAC_CONFIG_RESPONSE_EVENT, 1697 WMI_TAG_COEX_CONFIG_CMD, 1698 WMI_TAG_CONFIG_ENHANCED_MCAST_FILTER, 1699 WMI_TAG_CHAN_AVOID_RPT_ALLOW_CMD, 1700 WMI_TAG_SET_PERIODIC_CHANNEL_STATS_CONFIG, 1701 WMI_TAG_VDEV_SET_CUSTOM_AGGR_SIZE_CMD, 1702 WMI_TAG_PDEV_WAL_POWER_DEBUG_CMD, 1703 WMI_TAG_MAC_PHY_CAPABILITIES, 1704 WMI_TAG_HW_MODE_CAPABILITIES, 1705 WMI_TAG_SOC_MAC_PHY_HW_MODE_CAPS, 1706 WMI_TAG_HAL_REG_CAPABILITIES_EXT, 1707 WMI_TAG_SOC_HAL_REG_CAPABILITIES, 1708 WMI_TAG_VDEV_WISA_CMD, 1709 WMI_TAG_TX_POWER_LEVEL_STATS_EVT, 1710 WMI_TAG_SCAN_ADAPTIVE_DWELL_PARAMETERS_TLV, 1711 WMI_TAG_SCAN_ADAPTIVE_DWELL_CONFIG, 1712 WMI_TAG_WOW_SET_ACTION_WAKE_UP_CMD, 1713 WMI_TAG_NDP_END_RSP_PER_NDI, 1714 WMI_TAG_PEER_BWF_REQUEST, 1715 WMI_TAG_BWF_PEER_INFO, 1716 WMI_TAG_DBGLOG_TIME_STAMP_SYNC_CMD, 1717 WMI_TAG_RMC_SET_LEADER_CMD, 1718 WMI_TAG_RMC_MANUAL_LEADER_EVENT, 1719 WMI_TAG_PER_CHAIN_RSSI_STATS, 1720 WMI_TAG_RSSI_STATS, 1721 WMI_TAG_P2P_LO_START_CMD, 1722 WMI_TAG_P2P_LO_STOP_CMD, 1723 WMI_TAG_P2P_LO_STOPPED_EVENT, 1724 WMI_TAG_REORDER_QUEUE_SETUP_CMD, 1725 WMI_TAG_REORDER_QUEUE_REMOVE_CMD, 1726 WMI_TAG_SET_MULTIPLE_MCAST_FILTER_CMD, 1727 WMI_TAG_MGMT_TX_COMPL_BUNDLE_EVENT, 1728 WMI_TAG_READ_DATA_FROM_FLASH_CMD, 1729 WMI_TAG_READ_DATA_FROM_FLASH_EVENT, 1730 WMI_TAG_PDEV_SET_REORDER_TIMEOUT_VAL_CMD, 1731 WMI_TAG_PEER_SET_RX_BLOCKSIZE_CMD, 1732 WMI_TAG_PDEV_SET_WAKEUP_CONFIG_CMDID, 1733 WMI_TAG_TLV_BUF_LEN_PARAM, 1734 WMI_TAG_SERVICE_AVAILABLE_EVENT, 1735 WMI_TAG_PEER_ANTDIV_INFO_REQ_CMD, 1736 WMI_TAG_PEER_ANTDIV_INFO_EVENT, 1737 WMI_TAG_PEER_ANTDIV_INFO, 1738 WMI_TAG_PDEV_GET_ANTDIV_STATUS_CMD, 1739 WMI_TAG_PDEV_ANTDIV_STATUS_EVENT, 1740 WMI_TAG_MNT_FILTER_CMD, 1741 WMI_TAG_GET_CHIP_POWER_STATS_CMD, 1742 WMI_TAG_PDEV_CHIP_POWER_STATS_EVENT, 1743 WMI_TAG_COEX_GET_ANTENNA_ISOLATION_CMD, 1744 WMI_TAG_COEX_REPORT_ISOLATION_EVENT, 1745 WMI_TAG_CHAN_CCA_STATS, 1746 WMI_TAG_PEER_SIGNAL_STATS, 1747 WMI_TAG_TX_STATS, 1748 WMI_TAG_PEER_AC_TX_STATS, 1749 WMI_TAG_RX_STATS, 1750 WMI_TAG_PEER_AC_RX_STATS, 1751 WMI_TAG_REPORT_STATS_EVENT, 1752 WMI_TAG_CHAN_CCA_STATS_THRESH, 1753 WMI_TAG_PEER_SIGNAL_STATS_THRESH, 1754 WMI_TAG_TX_STATS_THRESH, 1755 WMI_TAG_RX_STATS_THRESH, 1756 WMI_TAG_PDEV_SET_STATS_THRESHOLD_CMD, 1757 WMI_TAG_REQUEST_WLAN_STATS_CMD, 1758 WMI_TAG_RX_AGGR_FAILURE_EVENT, 1759 WMI_TAG_RX_AGGR_FAILURE_INFO, 1760 WMI_TAG_VDEV_ENCRYPT_DECRYPT_DATA_REQ_CMD, 1761 WMI_TAG_VDEV_ENCRYPT_DECRYPT_DATA_RESP_EVENT, 1762 WMI_TAG_PDEV_BAND_TO_MAC, 1763 WMI_TAG_TBTT_OFFSET_INFO, 1764 WMI_TAG_TBTT_OFFSET_EXT_EVENT, 1765 WMI_TAG_SAR_LIMITS_CMD, 1766 WMI_TAG_SAR_LIMIT_CMD_ROW, 1767 WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMD, 1768 WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_DISABLE_CMD, 1769 WMI_TAG_VDEV_ADFS_CH_CFG_CMD, 1770 WMI_TAG_VDEV_ADFS_OCAC_ABORT_CMD, 1771 WMI_TAG_PDEV_DFS_RADAR_DETECTION_EVENT, 1772 WMI_TAG_VDEV_ADFS_OCAC_COMPLETE_EVENT, 1773 WMI_TAG_VDEV_DFS_CAC_COMPLETE_EVENT, 1774 WMI_TAG_VENDOR_OUI, 1775 WMI_TAG_REQUEST_RCPI_CMD, 1776 WMI_TAG_UPDATE_RCPI_EVENT, 1777 WMI_TAG_REQUEST_PEER_STATS_INFO_CMD, 1778 WMI_TAG_PEER_STATS_INFO, 1779 WMI_TAG_PEER_STATS_INFO_EVENT, 1780 WMI_TAG_PKGID_EVENT, 1781 WMI_TAG_CONNECTED_NLO_RSSI_PARAMS, 1782 WMI_TAG_SET_CURRENT_COUNTRY_CMD, 1783 WMI_TAG_REGULATORY_RULE_STRUCT, 1784 WMI_TAG_REG_CHAN_LIST_CC_EVENT, 1785 WMI_TAG_11D_SCAN_START_CMD, 1786 WMI_TAG_11D_SCAN_STOP_CMD, 1787 WMI_TAG_11D_NEW_COUNTRY_EVENT, 1788 WMI_TAG_REQUEST_RADIO_CHAN_STATS_CMD, 1789 WMI_TAG_RADIO_CHAN_STATS, 1790 WMI_TAG_RADIO_CHAN_STATS_EVENT, 1791 WMI_TAG_ROAM_PER_CONFIG, 1792 WMI_TAG_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_CMD, 1793 WMI_TAG_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_STATUS_EVENT, 1794 WMI_TAG_BPF_SET_VDEV_ACTIVE_MODE_CMD, 1795 WMI_TAG_HW_DATA_FILTER_CMD, 1796 WMI_TAG_CONNECTED_NLO_BSS_BAND_RSSI_PREF, 1797 WMI_TAG_PEER_OPER_MODE_CHANGE_EVENT, 1798 WMI_TAG_CHIP_POWER_SAVE_FAILURE_DETECTED, 1799 WMI_TAG_PDEV_MULTIPLE_VDEV_RESTART_REQUEST_CMD, 1800 WMI_TAG_PDEV_CSA_SWITCH_COUNT_STATUS_EVENT, 1801 WMI_TAG_PDEV_UPDATE_PKT_ROUTING_CMD, 1802 WMI_TAG_PDEV_CHECK_CAL_VERSION_CMD, 1803 WMI_TAG_PDEV_CHECK_CAL_VERSION_EVENT, 1804 WMI_TAG_PDEV_SET_DIVERSITY_GAIN_CMD, 1805 WMI_TAG_MAC_PHY_CHAINMASK_COMBO, 1806 WMI_TAG_MAC_PHY_CHAINMASK_CAPABILITY, 1807 WMI_TAG_VDEV_SET_ARP_STATS_CMD, 1808 WMI_TAG_VDEV_GET_ARP_STATS_CMD, 1809 WMI_TAG_VDEV_GET_ARP_STATS_EVENT, 1810 WMI_TAG_IFACE_OFFLOAD_STATS, 1811 WMI_TAG_REQUEST_STATS_CMD_SUB_STRUCT_PARAM, 1812 WMI_TAG_RSSI_CTL_EXT, 1813 WMI_TAG_SINGLE_PHYERR_EXT_RX_HDR, 1814 WMI_TAG_COEX_BT_ACTIVITY_EVENT, 1815 WMI_TAG_VDEV_GET_TX_POWER_CMD, 1816 WMI_TAG_VDEV_TX_POWER_EVENT, 1817 WMI_TAG_OFFCHAN_DATA_TX_COMPL_EVENT, 1818 WMI_TAG_OFFCHAN_DATA_TX_SEND_CMD, 1819 WMI_TAG_TX_SEND_PARAMS, 1820 WMI_TAG_HE_RATE_SET, 1821 WMI_TAG_CONGESTION_STATS, 1822 WMI_TAG_SET_INIT_COUNTRY_CMD, 1823 WMI_TAG_SCAN_DBS_DUTY_CYCLE, 1824 WMI_TAG_SCAN_DBS_DUTY_CYCLE_PARAM_TLV, 1825 WMI_TAG_PDEV_DIV_GET_RSSI_ANTID, 1826 WMI_TAG_THERM_THROT_CONFIG_REQUEST, 1827 WMI_TAG_THERM_THROT_LEVEL_CONFIG_INFO, 1828 WMI_TAG_THERM_THROT_STATS_EVENT, 1829 WMI_TAG_THERM_THROT_LEVEL_STATS_INFO, 1830 WMI_TAG_PDEV_DIV_RSSI_ANTID_EVENT, 1831 WMI_TAG_OEM_DMA_RING_CAPABILITIES, 1832 WMI_TAG_OEM_DMA_RING_CFG_REQ, 1833 WMI_TAG_OEM_DMA_RING_CFG_RSP, 1834 WMI_TAG_OEM_INDIRECT_DATA, 1835 WMI_TAG_OEM_DMA_BUF_RELEASE, 1836 WMI_TAG_OEM_DMA_BUF_RELEASE_ENTRY, 1837 WMI_TAG_PDEV_BSS_CHAN_INFO_REQUEST, 1838 WMI_TAG_PDEV_BSS_CHAN_INFO_EVENT, 1839 WMI_TAG_ROAM_LCA_DISALLOW_CONFIG, 1840 WMI_TAG_VDEV_LIMIT_OFFCHAN_CMD, 1841 WMI_TAG_ROAM_RSSI_REJECTION_OCE_CONFIG, 1842 WMI_TAG_UNIT_TEST_EVENT, 1843 WMI_TAG_ROAM_FILS_OFFLOAD, 1844 WMI_TAG_PDEV_UPDATE_PMK_CACHE_CMD, 1845 WMI_TAG_PMK_CACHE, 1846 WMI_TAG_PDEV_UPDATE_FILS_HLP_PKT_CMD, 1847 WMI_TAG_ROAM_FILS_SYNCH, 1848 WMI_TAG_GTK_OFFLOAD_EXTENDED, 1849 WMI_TAG_ROAM_BG_SCAN_ROAMING, 1850 WMI_TAG_OIC_PING_OFFLOAD_PARAMS_CMD, 1851 WMI_TAG_OIC_PING_OFFLOAD_SET_ENABLE_CMD, 1852 WMI_TAG_OIC_PING_HANDOFF_EVENT, 1853 WMI_TAG_DHCP_LEASE_RENEW_OFFLOAD_CMD, 1854 WMI_TAG_DHCP_LEASE_RENEW_EVENT, 1855 WMI_TAG_BTM_CONFIG, 1856 WMI_TAG_DEBUG_MESG_FW_DATA_STALL, 1857 WMI_TAG_WLM_CONFIG_CMD, 1858 WMI_TAG_PDEV_UPDATE_CTLTABLE_REQUEST, 1859 WMI_TAG_PDEV_UPDATE_CTLTABLE_EVENT, 1860 WMI_TAG_ROAM_CND_SCORING_PARAM, 1861 WMI_TAG_PDEV_CONFIG_VENDOR_OUI_ACTION, 1862 WMI_TAG_VENDOR_OUI_EXT, 1863 WMI_TAG_ROAM_SYNCH_FRAME_EVENT, 1864 WMI_TAG_FD_SEND_FROM_HOST_CMD, 1865 WMI_TAG_ENABLE_FILS_CMD, 1866 WMI_TAG_HOST_SWFDA_EVENT, 1867 WMI_TAG_BCN_OFFLOAD_CTRL_CMD, 1868 WMI_TAG_PDEV_SET_AC_TX_QUEUE_OPTIMIZED_CMD, 1869 WMI_TAG_STATS_PERIOD, 1870 WMI_TAG_NDL_SCHEDULE_UPDATE, 1871 WMI_TAG_PEER_TID_MSDUQ_QDEPTH_THRESH_UPDATE_CMD, 1872 WMI_TAG_MSDUQ_QDEPTH_THRESH_UPDATE, 1873 WMI_TAG_PDEV_SET_RX_FILTER_PROMISCUOUS_CMD, 1874 WMI_TAG_SAR2_RESULT_EVENT, 1875 WMI_TAG_SAR_CAPABILITIES, 1876 WMI_TAG_SAP_OBSS_DETECTION_CFG_CMD, 1877 WMI_TAG_SAP_OBSS_DETECTION_INFO_EVT, 1878 WMI_TAG_DMA_RING_CAPABILITIES, 1879 WMI_TAG_DMA_RING_CFG_REQ, 1880 WMI_TAG_DMA_RING_CFG_RSP, 1881 WMI_TAG_DMA_BUF_RELEASE, 1882 WMI_TAG_DMA_BUF_RELEASE_ENTRY, 1883 WMI_TAG_SAR_GET_LIMITS_CMD, 1884 WMI_TAG_SAR_GET_LIMITS_EVENT, 1885 WMI_TAG_SAR_GET_LIMITS_EVENT_ROW, 1886 WMI_TAG_OFFLOAD_11K_REPORT, 1887 WMI_TAG_INVOKE_NEIGHBOR_REPORT, 1888 WMI_TAG_NEIGHBOR_REPORT_OFFLOAD, 1889 WMI_TAG_VDEV_SET_CONNECTIVITY_CHECK_STATS, 1890 WMI_TAG_VDEV_GET_CONNECTIVITY_CHECK_STATS, 1891 WMI_TAG_BPF_SET_VDEV_ENABLE_CMD, 1892 WMI_TAG_BPF_SET_VDEV_WORK_MEMORY_CMD, 1893 WMI_TAG_BPF_GET_VDEV_WORK_MEMORY_CMD, 1894 WMI_TAG_BPF_GET_VDEV_WORK_MEMORY_RESP_EVT, 1895 WMI_TAG_PDEV_GET_NFCAL_POWER, 1896 WMI_TAG_BSS_COLOR_CHANGE_ENABLE, 1897 WMI_TAG_OBSS_COLOR_COLLISION_DET_CONFIG, 1898 WMI_TAG_OBSS_COLOR_COLLISION_EVT, 1899 WMI_TAG_RUNTIME_DPD_RECAL_CMD, 1900 WMI_TAG_TWT_ENABLE_CMD, 1901 WMI_TAG_TWT_DISABLE_CMD, 1902 WMI_TAG_TWT_ADD_DIALOG_CMD, 1903 WMI_TAG_TWT_DEL_DIALOG_CMD, 1904 WMI_TAG_TWT_PAUSE_DIALOG_CMD, 1905 WMI_TAG_TWT_RESUME_DIALOG_CMD, 1906 WMI_TAG_TWT_ENABLE_COMPLETE_EVENT, 1907 WMI_TAG_TWT_DISABLE_COMPLETE_EVENT, 1908 WMI_TAG_TWT_ADD_DIALOG_COMPLETE_EVENT, 1909 WMI_TAG_TWT_DEL_DIALOG_COMPLETE_EVENT, 1910 WMI_TAG_TWT_PAUSE_DIALOG_COMPLETE_EVENT, 1911 WMI_TAG_TWT_RESUME_DIALOG_COMPLETE_EVENT, 1912 WMI_TAG_REQUEST_ROAM_SCAN_STATS_CMD, 1913 WMI_TAG_ROAM_SCAN_STATS_EVENT, 1914 WMI_TAG_PEER_TID_CONFIGURATIONS_CMD, 1915 WMI_TAG_VDEV_SET_CUSTOM_SW_RETRY_TH_CMD, 1916 WMI_TAG_GET_TPC_POWER_CMD, 1917 WMI_TAG_GET_TPC_POWER_EVENT, 1918 WMI_TAG_DMA_BUF_RELEASE_SPECTRAL_META_DATA, 1919 WMI_TAG_MOTION_DET_CONFIG_PARAMS_CMD, 1920 WMI_TAG_MOTION_DET_BASE_LINE_CONFIG_PARAMS_CMD, 1921 WMI_TAG_MOTION_DET_START_STOP_CMD, 1922 WMI_TAG_MOTION_DET_BASE_LINE_START_STOP_CMD, 1923 WMI_TAG_MOTION_DET_EVENT, 1924 WMI_TAG_MOTION_DET_BASE_LINE_EVENT, 1925 WMI_TAG_NDP_TRANSPORT_IP, 1926 WMI_TAG_OBSS_SPATIAL_REUSE_SET_CMD, 1927 WMI_TAG_ESP_ESTIMATE_EVENT, 1928 WMI_TAG_NAN_HOST_CONFIG, 1929 WMI_TAG_SPECTRAL_BIN_SCALING_PARAMS, 1930 WMI_TAG_PEER_CFR_CAPTURE_CMD, 1931 WMI_TAG_PEER_CHAN_WIDTH_SWITCH_CMD, 1932 WMI_TAG_CHAN_WIDTH_PEER_LIST, 1933 WMI_TAG_OBSS_SPATIAL_REUSE_SET_DEF_OBSS_THRESH_CMD, 1934 WMI_TAG_PDEV_HE_TB_ACTION_FRM_CMD, 1935 WMI_TAG_PEER_EXTD2_STATS, 1936 WMI_TAG_HPCS_PULSE_START_CMD, 1937 WMI_TAG_PDEV_CTL_FAILSAFE_CHECK_EVENT, 1938 WMI_TAG_VDEV_CHAINMASK_CONFIG_CMD, 1939 WMI_TAG_VDEV_BCN_OFFLOAD_QUIET_CONFIG_CMD, 1940 WMI_TAG_NAN_EVENT_INFO, 1941 WMI_TAG_NDP_CHANNEL_INFO, 1942 WMI_TAG_NDP_CMD, 1943 WMI_TAG_NDP_EVENT, 1944 /* TODO add all the missing cmds */ 1945 WMI_TAG_PDEV_PEER_PKTLOG_FILTER_CMD = 0x301, 1946 WMI_TAG_PDEV_PEER_PKTLOG_FILTER_INFO, 1947 WMI_TAG_SERVICE_READY_EXT2_EVENT = 0x334, 1948 WMI_TAG_FILS_DISCOVERY_TMPL_CMD = 0x344, 1949 WMI_TAG_MAC_PHY_CAPABILITIES_EXT = 0x36F, 1950 WMI_TAG_REGULATORY_RULE_EXT_STRUCT = 0x3A9, 1951 WMI_TAG_REG_CHAN_LIST_CC_EXT_EVENT, 1952 WMI_TAG_TPC_STATS_GET_CMD = 0x38B, 1953 WMI_TAG_TPC_STATS_EVENT_FIXED_PARAM, 1954 WMI_TAG_TPC_STATS_CONFIG_EVENT, 1955 WMI_TAG_TPC_STATS_REG_PWR_ALLOWED, 1956 WMI_TAG_TPC_STATS_RATES_ARRAY, 1957 WMI_TAG_TPC_STATS_CTL_PWR_TABLE_EVENT, 1958 WMI_TAG_EHT_RATE_SET = 0x3C4, 1959 WMI_TAG_DCS_AWGN_INT_TYPE = 0x3C5, 1960 WMI_TAG_MLO_TX_SEND_PARAMS, 1961 WMI_TAG_MLO_PARTNER_LINK_PARAMS, 1962 WMI_TAG_MLO_PARTNER_LINK_PARAMS_PEER_ASSOC, 1963 WMI_TAG_MLO_SETUP_CMD = 0x3C9, 1964 WMI_TAG_MLO_SETUP_COMPLETE_EVENT, 1965 WMI_TAG_MLO_READY_CMD, 1966 WMI_TAG_MLO_TEARDOWN_CMD, 1967 WMI_TAG_MLO_TEARDOWN_COMPLETE, 1968 WMI_TAG_MLO_PEER_ASSOC_PARAMS = 0x3D0, 1969 WMI_TAG_MLO_PEER_CREATE_PARAMS = 0x3D5, 1970 WMI_TAG_MLO_VDEV_START_PARAMS = 0x3D6, 1971 WMI_TAG_MLO_VDEV_CREATE_PARAMS = 0x3D7, 1972 WMI_TAG_PDEV_SET_BIOS_SAR_TABLE_CMD = 0x3D8, 1973 WMI_TAG_PDEV_SET_BIOS_GEO_TABLE_CMD = 0x3D9, 1974 WMI_TAG_PDEV_SET_BIOS_INTERFACE_CMD = 0x3FB, 1975 WMI_TAG_HALPHY_CTRL_PATH_CMD_FIXED_PARAM = 0x442, 1976 WMI_TAG_HALPHY_CTRL_PATH_EVENT_FIXED_PARAM, 1977 WMI_TAG_MAX 1978 }; 1979 1980 enum wmi_tlv_service { 1981 WMI_TLV_SERVICE_BEACON_OFFLOAD = 0, 1982 WMI_TLV_SERVICE_SCAN_OFFLOAD = 1, 1983 WMI_TLV_SERVICE_ROAM_SCAN_OFFLOAD = 2, 1984 WMI_TLV_SERVICE_BCN_MISS_OFFLOAD = 3, 1985 WMI_TLV_SERVICE_STA_PWRSAVE = 4, 1986 WMI_TLV_SERVICE_STA_ADVANCED_PWRSAVE = 5, 1987 WMI_TLV_SERVICE_AP_UAPSD = 6, 1988 WMI_TLV_SERVICE_AP_DFS = 7, 1989 WMI_TLV_SERVICE_11AC = 8, 1990 WMI_TLV_SERVICE_BLOCKACK = 9, 1991 WMI_TLV_SERVICE_PHYERR = 10, 1992 WMI_TLV_SERVICE_BCN_FILTER = 11, 1993 WMI_TLV_SERVICE_RTT = 12, 1994 WMI_TLV_SERVICE_WOW = 13, 1995 WMI_TLV_SERVICE_RATECTRL_CACHE = 14, 1996 WMI_TLV_SERVICE_IRAM_TIDS = 15, 1997 WMI_TLV_SERVICE_ARPNS_OFFLOAD = 16, 1998 WMI_TLV_SERVICE_NLO = 17, 1999 WMI_TLV_SERVICE_GTK_OFFLOAD = 18, 2000 WMI_TLV_SERVICE_SCAN_SCH = 19, 2001 WMI_TLV_SERVICE_CSA_OFFLOAD = 20, 2002 WMI_TLV_SERVICE_CHATTER = 21, 2003 WMI_TLV_SERVICE_COEX_FREQAVOID = 22, 2004 WMI_TLV_SERVICE_PACKET_POWER_SAVE = 23, 2005 WMI_TLV_SERVICE_FORCE_FW_HANG = 24, 2006 WMI_TLV_SERVICE_GPIO = 25, 2007 WMI_TLV_SERVICE_STA_DTIM_PS_MODULATED_DTIM = 26, 2008 WMI_STA_UAPSD_BASIC_AUTO_TRIG = 27, 2009 WMI_STA_UAPSD_VAR_AUTO_TRIG = 28, 2010 WMI_TLV_SERVICE_STA_KEEP_ALIVE = 29, 2011 WMI_TLV_SERVICE_TX_ENCAP = 30, 2012 WMI_TLV_SERVICE_AP_PS_DETECT_OUT_OF_SYNC = 31, 2013 WMI_TLV_SERVICE_EARLY_RX = 32, 2014 WMI_TLV_SERVICE_STA_SMPS = 33, 2015 WMI_TLV_SERVICE_FWTEST = 34, 2016 WMI_TLV_SERVICE_STA_WMMAC = 35, 2017 WMI_TLV_SERVICE_TDLS = 36, 2018 WMI_TLV_SERVICE_BURST = 37, 2019 WMI_TLV_SERVICE_MCC_BCN_INTERVAL_CHANGE = 38, 2020 WMI_TLV_SERVICE_ADAPTIVE_OCS = 39, 2021 WMI_TLV_SERVICE_BA_SSN_SUPPORT = 40, 2022 WMI_TLV_SERVICE_FILTER_IPSEC_NATKEEPALIVE = 41, 2023 WMI_TLV_SERVICE_WLAN_HB = 42, 2024 WMI_TLV_SERVICE_LTE_ANT_SHARE_SUPPORT = 43, 2025 WMI_TLV_SERVICE_BATCH_SCAN = 44, 2026 WMI_TLV_SERVICE_QPOWER = 45, 2027 WMI_TLV_SERVICE_PLMREQ = 46, 2028 WMI_TLV_SERVICE_THERMAL_MGMT = 47, 2029 WMI_TLV_SERVICE_RMC = 48, 2030 WMI_TLV_SERVICE_MHF_OFFLOAD = 49, 2031 WMI_TLV_SERVICE_COEX_SAR = 50, 2032 WMI_TLV_SERVICE_BCN_TXRATE_OVERRIDE = 51, 2033 WMI_TLV_SERVICE_NAN = 52, 2034 WMI_TLV_SERVICE_L1SS_STAT = 53, 2035 WMI_TLV_SERVICE_ESTIMATE_LINKSPEED = 54, 2036 WMI_TLV_SERVICE_OBSS_SCAN = 55, 2037 WMI_TLV_SERVICE_TDLS_OFFCHAN = 56, 2038 WMI_TLV_SERVICE_TDLS_UAPSD_BUFFER_STA = 57, 2039 WMI_TLV_SERVICE_TDLS_UAPSD_SLEEP_STA = 58, 2040 WMI_TLV_SERVICE_IBSS_PWRSAVE = 59, 2041 WMI_TLV_SERVICE_LPASS = 60, 2042 WMI_TLV_SERVICE_EXTSCAN = 61, 2043 WMI_TLV_SERVICE_D0WOW = 62, 2044 WMI_TLV_SERVICE_HSOFFLOAD = 63, 2045 WMI_TLV_SERVICE_ROAM_HO_OFFLOAD = 64, 2046 WMI_TLV_SERVICE_RX_FULL_REORDER = 65, 2047 WMI_TLV_SERVICE_DHCP_OFFLOAD = 66, 2048 WMI_TLV_SERVICE_STA_RX_IPA_OFFLOAD_SUPPORT = 67, 2049 WMI_TLV_SERVICE_MDNS_OFFLOAD = 68, 2050 WMI_TLV_SERVICE_SAP_AUTH_OFFLOAD = 69, 2051 WMI_TLV_SERVICE_DUAL_BAND_SIMULTANEOUS_SUPPORT = 70, 2052 WMI_TLV_SERVICE_OCB = 71, 2053 WMI_TLV_SERVICE_AP_ARPNS_OFFLOAD = 72, 2054 WMI_TLV_SERVICE_PER_BAND_CHAINMASK_SUPPORT = 73, 2055 WMI_TLV_SERVICE_PACKET_FILTER_OFFLOAD = 74, 2056 WMI_TLV_SERVICE_MGMT_TX_HTT = 75, 2057 WMI_TLV_SERVICE_MGMT_TX_WMI = 76, 2058 WMI_TLV_SERVICE_EXT_MSG = 77, 2059 WMI_TLV_SERVICE_MAWC = 78, 2060 WMI_TLV_SERVICE_PEER_ASSOC_CONF = 79, 2061 WMI_TLV_SERVICE_EGAP = 80, 2062 WMI_TLV_SERVICE_STA_PMF_OFFLOAD = 81, 2063 WMI_TLV_SERVICE_UNIFIED_WOW_CAPABILITY = 82, 2064 WMI_TLV_SERVICE_ENHANCED_PROXY_STA = 83, 2065 WMI_TLV_SERVICE_ATF = 84, 2066 WMI_TLV_SERVICE_COEX_GPIO = 85, 2067 WMI_TLV_SERVICE_AUX_SPECTRAL_INTF = 86, 2068 WMI_TLV_SERVICE_AUX_CHAN_LOAD_INTF = 87, 2069 WMI_TLV_SERVICE_BSS_CHANNEL_INFO_64 = 88, 2070 WMI_TLV_SERVICE_ENTERPRISE_MESH = 89, 2071 WMI_TLV_SERVICE_RESTRT_CHNL_SUPPORT = 90, 2072 WMI_TLV_SERVICE_BPF_OFFLOAD = 91, 2073 WMI_TLV_SERVICE_SYNC_DELETE_CMDS = 92, 2074 WMI_TLV_SERVICE_SMART_ANTENNA_SW_SUPPORT = 93, 2075 WMI_TLV_SERVICE_SMART_ANTENNA_HW_SUPPORT = 94, 2076 WMI_TLV_SERVICE_RATECTRL_LIMIT_MAX_MIN_RATES = 95, 2077 WMI_TLV_SERVICE_NAN_DATA = 96, 2078 WMI_TLV_SERVICE_NAN_RTT = 97, 2079 WMI_TLV_SERVICE_11AX = 98, 2080 WMI_TLV_SERVICE_DEPRECATED_REPLACE = 99, 2081 WMI_TLV_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE = 100, 2082 WMI_TLV_SERVICE_ENHANCED_MCAST_FILTER = 101, 2083 WMI_TLV_SERVICE_PERIODIC_CHAN_STAT_SUPPORT = 102, 2084 WMI_TLV_SERVICE_MESH_11S = 103, 2085 WMI_TLV_SERVICE_HALF_RATE_QUARTER_RATE_SUPPORT = 104, 2086 WMI_TLV_SERVICE_VDEV_RX_FILTER = 105, 2087 WMI_TLV_SERVICE_P2P_LISTEN_OFFLOAD_SUPPORT = 106, 2088 WMI_TLV_SERVICE_MARK_FIRST_WAKEUP_PACKET = 107, 2089 WMI_TLV_SERVICE_MULTIPLE_MCAST_FILTER_SET = 108, 2090 WMI_TLV_SERVICE_HOST_MANAGED_RX_REORDER = 109, 2091 WMI_TLV_SERVICE_FLASH_RDWR_SUPPORT = 110, 2092 WMI_TLV_SERVICE_WLAN_STATS_REPORT = 111, 2093 WMI_TLV_SERVICE_TX_MSDU_ID_NEW_PARTITION_SUPPORT = 112, 2094 WMI_TLV_SERVICE_DFS_PHYERR_OFFLOAD = 113, 2095 WMI_TLV_SERVICE_RCPI_SUPPORT = 114, 2096 WMI_TLV_SERVICE_FW_MEM_DUMP_SUPPORT = 115, 2097 WMI_TLV_SERVICE_PEER_STATS_INFO = 116, 2098 WMI_TLV_SERVICE_REGULATORY_DB = 117, 2099 WMI_TLV_SERVICE_11D_OFFLOAD = 118, 2100 WMI_TLV_SERVICE_HW_DATA_FILTERING = 119, 2101 WMI_TLV_SERVICE_MULTIPLE_VDEV_RESTART = 120, 2102 WMI_TLV_SERVICE_PKT_ROUTING = 121, 2103 WMI_TLV_SERVICE_CHECK_CAL_VERSION = 122, 2104 WMI_TLV_SERVICE_OFFCHAN_TX_WMI = 123, 2105 WMI_TLV_SERVICE_8SS_TX_BFEE = 124, 2106 WMI_TLV_SERVICE_EXTENDED_NSS_SUPPORT = 125, 2107 WMI_TLV_SERVICE_ACK_TIMEOUT = 126, 2108 WMI_TLV_SERVICE_PDEV_BSS_CHANNEL_INFO_64 = 127, 2109 2110 WMI_MAX_SERVICE = 128, 2111 2112 WMI_TLV_SERVICE_CHAN_LOAD_INFO = 128, 2113 WMI_TLV_SERVICE_TX_PPDU_INFO_STATS_SUPPORT = 129, 2114 WMI_TLV_SERVICE_VDEV_LIMIT_OFFCHAN_SUPPORT = 130, 2115 WMI_TLV_SERVICE_FILS_SUPPORT = 131, 2116 WMI_TLV_SERVICE_WLAN_OIC_PING_OFFLOAD = 132, 2117 WMI_TLV_SERVICE_WLAN_DHCP_RENEW = 133, 2118 WMI_TLV_SERVICE_MAWC_SUPPORT = 134, 2119 WMI_TLV_SERVICE_VDEV_LATENCY_CONFIG = 135, 2120 WMI_TLV_SERVICE_PDEV_UPDATE_CTLTABLE_SUPPORT = 136, 2121 WMI_TLV_SERVICE_PKTLOG_SUPPORT_OVER_HTT = 137, 2122 WMI_TLV_SERVICE_VDEV_MULTI_GROUP_KEY_SUPPORT = 138, 2123 WMI_TLV_SERVICE_SCAN_PHYMODE_SUPPORT = 139, 2124 WMI_TLV_SERVICE_THERM_THROT = 140, 2125 WMI_TLV_SERVICE_BCN_OFFLOAD_START_STOP_SUPPORT = 141, 2126 WMI_TLV_SERVICE_WOW_WAKEUP_BY_TIMER_PATTERN = 142, 2127 WMI_TLV_SERVICE_PEER_MAP_UNMAP_V2_SUPPORT = 143, 2128 WMI_TLV_SERVICE_OFFCHAN_DATA_TID_SUPPORT = 144, 2129 WMI_TLV_SERVICE_RX_PROMISC_ENABLE_SUPPORT = 145, 2130 WMI_TLV_SERVICE_SUPPORT_DIRECT_DMA = 146, 2131 WMI_TLV_SERVICE_AP_OBSS_DETECTION_OFFLOAD = 147, 2132 WMI_TLV_SERVICE_11K_NEIGHBOUR_REPORT_SUPPORT = 148, 2133 WMI_TLV_SERVICE_LISTEN_INTERVAL_OFFLOAD_SUPPORT = 149, 2134 WMI_TLV_SERVICE_BSS_COLOR_OFFLOAD = 150, 2135 WMI_TLV_SERVICE_RUNTIME_DPD_RECAL = 151, 2136 WMI_TLV_SERVICE_STA_TWT = 152, 2137 WMI_TLV_SERVICE_AP_TWT = 153, 2138 WMI_TLV_SERVICE_GMAC_OFFLOAD_SUPPORT = 154, 2139 WMI_TLV_SERVICE_SPOOF_MAC_SUPPORT = 155, 2140 WMI_TLV_SERVICE_PEER_TID_CONFIGS_SUPPORT = 156, 2141 WMI_TLV_SERVICE_VDEV_SWRETRY_PER_AC_CONFIG_SUPPORT = 157, 2142 WMI_TLV_SERVICE_DUAL_BEACON_ON_SINGLE_MAC_SCC_SUPPORT = 158, 2143 WMI_TLV_SERVICE_DUAL_BEACON_ON_SINGLE_MAC_MCC_SUPPORT = 159, 2144 WMI_TLV_SERVICE_MOTION_DET = 160, 2145 WMI_TLV_SERVICE_INFRA_MBSSID = 161, 2146 WMI_TLV_SERVICE_OBSS_SPATIAL_REUSE = 162, 2147 WMI_TLV_SERVICE_VDEV_DIFFERENT_BEACON_INTERVAL_SUPPORT = 163, 2148 WMI_TLV_SERVICE_NAN_DBS_SUPPORT = 164, 2149 WMI_TLV_SERVICE_NDI_DBS_SUPPORT = 165, 2150 WMI_TLV_SERVICE_NAN_SAP_SUPPORT = 166, 2151 WMI_TLV_SERVICE_NDI_SAP_SUPPORT = 167, 2152 WMI_TLV_SERVICE_CFR_CAPTURE_SUPPORT = 168, 2153 WMI_TLV_SERVICE_CFR_CAPTURE_IND_MSG_TYPE_1 = 169, 2154 WMI_TLV_SERVICE_ESP_SUPPORT = 170, 2155 WMI_TLV_SERVICE_PEER_CHWIDTH_CHANGE = 171, 2156 WMI_TLV_SERVICE_WLAN_HPCS_PULSE = 172, 2157 WMI_TLV_SERVICE_PER_VDEV_CHAINMASK_CONFIG_SUPPORT = 173, 2158 WMI_TLV_SERVICE_TX_DATA_MGMT_ACK_RSSI = 174, 2159 WMI_TLV_SERVICE_NAN_DISABLE_SUPPORT = 175, 2160 WMI_TLV_SERVICE_HTT_H2T_NO_HTC_HDR_LEN_IN_MSG_LEN = 176, 2161 WMI_TLV_SERVICE_COEX_SUPPORT_UNEQUAL_ISOLATION = 177, 2162 WMI_TLV_SERVICE_HW_DB2DBM_CONVERSION_SUPPORT = 178, 2163 WMI_TLV_SERVICE_SUPPORT_EXTEND_ADDRESS = 179, 2164 WMI_TLV_SERVICE_BEACON_RECEPTION_STATS = 180, 2165 WMI_TLV_SERVICE_FETCH_TX_PN = 181, 2166 WMI_TLV_SERVICE_PEER_UNMAP_RESPONSE_SUPPORT = 182, 2167 WMI_TLV_SERVICE_TX_PER_PEER_AMPDU_SIZE = 183, 2168 WMI_TLV_SERVICE_BSS_COLOR_SWITCH_COUNT = 184, 2169 WMI_TLV_SERVICE_HTT_PEER_STATS_SUPPORT = 185, 2170 WMI_TLV_SERVICE_UL_RU26_ALLOWED = 186, 2171 WMI_TLV_SERVICE_GET_MWS_COEX_STATE = 187, 2172 WMI_TLV_SERVICE_GET_MWS_DPWB_STATE = 188, 2173 WMI_TLV_SERVICE_GET_MWS_TDM_STATE = 189, 2174 WMI_TLV_SERVICE_GET_MWS_IDRX_STATE = 190, 2175 WMI_TLV_SERVICE_GET_MWS_ANTENNA_SHARING_STATE = 191, 2176 WMI_TLV_SERVICE_ENHANCED_TPC_CONFIG_EVENT = 192, 2177 WMI_TLV_SERVICE_WLM_STATS_REQUEST = 193, 2178 WMI_TLV_SERVICE_EXT_PEER_TID_CONFIGS_SUPPORT = 194, 2179 WMI_TLV_SERVICE_WPA3_FT_SAE_SUPPORT = 195, 2180 WMI_TLV_SERVICE_WPA3_FT_SUITE_B_SUPPORT = 196, 2181 WMI_TLV_SERVICE_VOW_ENABLE = 197, 2182 WMI_TLV_SERVICE_CFR_CAPTURE_IND_EVT_TYPE_1 = 198, 2183 WMI_TLV_SERVICE_BROADCAST_TWT = 199, 2184 WMI_TLV_SERVICE_RAP_DETECTION_SUPPORT = 200, 2185 WMI_TLV_SERVICE_PS_TDCC = 201, 2186 WMI_TLV_SERVICE_THREE_WAY_COEX_CONFIG_LEGACY = 202, 2187 WMI_TLV_SERVICE_THREE_WAY_COEX_CONFIG_OVERRIDE = 203, 2188 WMI_TLV_SERVICE_TX_PWR_PER_PEER = 204, 2189 WMI_TLV_SERVICE_STA_PLUS_STA_SUPPORT = 205, 2190 WMI_TLV_SERVICE_WPA3_FT_FILS = 206, 2191 WMI_TLV_SERVICE_ADAPTIVE_11R_ROAM = 207, 2192 WMI_TLV_SERVICE_CHAN_RF_CHARACTERIZATION_INFO = 208, 2193 WMI_TLV_SERVICE_FW_IFACE_COMBINATION_SUPPORT = 209, 2194 WMI_TLV_SERVICE_TX_COMPL_TSF64 = 210, 2195 WMI_TLV_SERVICE_DSM_ROAM_FILTER = 211, 2196 WMI_TLV_SERVICE_PACKET_CAPTURE_SUPPORT = 212, 2197 WMI_TLV_SERVICE_PER_PEER_HTT_STATS_RESET = 213, 2198 WMI_TLV_SERVICE_FREQINFO_IN_METADATA = 219, 2199 WMI_TLV_SERVICE_EXT2_MSG = 220, 2200 WMI_TLV_SERVICE_MBSS_PARAM_IN_VDEV_START_SUPPORT = 253, 2201 2202 WMI_MAX_EXT_SERVICE = 256, 2203 2204 WMI_TLV_SERVICE_REG_CC_EXT_EVENT_SUPPORT = 281, 2205 2206 WMI_TLV_SERVICE_11BE = 289, 2207 2208 WMI_TLV_SERVICE_WMSK_COMPACTION_RX_TLVS = 361, 2209 2210 WMI_TLV_SERVICE_PEER_METADATA_V1A_V1B_SUPPORT = 365, 2211 2212 WMI_MAX_EXT2_SERVICE, 2213 }; 2214 2215 enum { 2216 WMI_SMPS_FORCED_MODE_NONE = 0, 2217 WMI_SMPS_FORCED_MODE_DISABLED, 2218 WMI_SMPS_FORCED_MODE_STATIC, 2219 WMI_SMPS_FORCED_MODE_DYNAMIC 2220 }; 2221 2222 enum wmi_tpc_chainmask { 2223 WMI_TPC_CHAINMASK_CONFIG_BAND_2G = 0, 2224 WMI_TPC_CHAINMASK_CONFIG_BAND_5G = 1, 2225 WMI_NUM_SUPPORTED_BAND_MAX = 2, 2226 }; 2227 2228 enum wmi_peer_param { 2229 WMI_PEER_MIMO_PS_STATE = 1, 2230 WMI_PEER_AMPDU = 2, 2231 WMI_PEER_AUTHORIZE = 3, 2232 WMI_PEER_CHWIDTH = 4, 2233 WMI_PEER_NSS = 5, 2234 WMI_PEER_USE_4ADDR = 6, 2235 WMI_PEER_MEMBERSHIP = 7, 2236 WMI_PEER_USERPOS = 8, 2237 WMI_PEER_CRIT_PROTO_HINT_ENABLED = 9, 2238 WMI_PEER_TX_FAIL_CNT_THR = 10, 2239 WMI_PEER_SET_HW_RETRY_CTS2S = 11, 2240 WMI_PEER_IBSS_ATIM_WINDOW_LENGTH = 12, 2241 WMI_PEER_PHYMODE = 13, 2242 WMI_PEER_USE_FIXED_PWR = 14, 2243 WMI_PEER_PARAM_FIXED_RATE = 15, 2244 WMI_PEER_SET_MU_WHITELIST = 16, 2245 WMI_PEER_SET_MAX_TX_RATE = 17, 2246 WMI_PEER_SET_MIN_TX_RATE = 18, 2247 WMI_PEER_SET_DEFAULT_ROUTING = 19, 2248 WMI_PEER_CHWIDTH_PUNCTURE_20MHZ_BITMAP = 39, 2249 }; 2250 2251 #define WMI_PEER_PUNCTURE_BITMAP GENMASK(23, 8) 2252 2253 enum wmi_slot_time { 2254 WMI_VDEV_SLOT_TIME_LONG = 1, 2255 WMI_VDEV_SLOT_TIME_SHORT = 2, 2256 }; 2257 2258 enum wmi_preamble { 2259 WMI_VDEV_PREAMBLE_LONG = 1, 2260 WMI_VDEV_PREAMBLE_SHORT = 2, 2261 }; 2262 2263 enum wmi_peer_smps_state { 2264 WMI_PEER_SMPS_PS_NONE = 0, 2265 WMI_PEER_SMPS_STATIC = 1, 2266 WMI_PEER_SMPS_DYNAMIC = 2 2267 }; 2268 2269 enum wmi_peer_chwidth { 2270 WMI_PEER_CHWIDTH_20MHZ = 0, 2271 WMI_PEER_CHWIDTH_40MHZ = 1, 2272 WMI_PEER_CHWIDTH_80MHZ = 2, 2273 WMI_PEER_CHWIDTH_160MHZ = 3, 2274 WMI_PEER_CHWIDTH_320MHZ = 4, 2275 }; 2276 2277 enum wmi_beacon_gen_mode { 2278 WMI_BEACON_STAGGERED_MODE = 0, 2279 WMI_BEACON_BURST_MODE = 1 2280 }; 2281 2282 enum wmi_direct_buffer_module { 2283 WMI_DIRECT_BUF_SPECTRAL = 0, 2284 WMI_DIRECT_BUF_CFR = 1, 2285 2286 /* keep it last */ 2287 WMI_DIRECT_BUF_MAX 2288 }; 2289 2290 struct ath12k_wmi_pdev_band_arg { 2291 u32 pdev_id; 2292 u32 start_freq; 2293 u32 end_freq; 2294 }; 2295 2296 struct ath12k_wmi_ppe_threshold_arg { 2297 u32 numss_m1; 2298 u32 ru_bit_mask; 2299 u32 ppet16_ppet8_ru3_ru0[WMI_MAX_NUM_SS]; 2300 }; 2301 2302 #define PSOC_HOST_MAX_PHY_SIZE (3) 2303 #define ATH12K_11B_SUPPORT BIT(0) 2304 #define ATH12K_11G_SUPPORT BIT(1) 2305 #define ATH12K_11A_SUPPORT BIT(2) 2306 #define ATH12K_11N_SUPPORT BIT(3) 2307 #define ATH12K_11AC_SUPPORT BIT(4) 2308 #define ATH12K_11AX_SUPPORT BIT(5) 2309 2310 struct ath12k_wmi_hal_reg_capabilities_ext_arg { 2311 u32 phy_id; 2312 u32 eeprom_reg_domain; 2313 u32 eeprom_reg_domain_ext; 2314 u32 regcap1; 2315 u32 regcap2; 2316 u32 wireless_modes; 2317 u32 low_2ghz_chan; 2318 u32 high_2ghz_chan; 2319 u32 low_5ghz_chan; 2320 u32 high_5ghz_chan; 2321 }; 2322 2323 #define WMI_HOST_MAX_PDEV 3 2324 2325 struct ath12k_wmi_host_mem_chunk_params { 2326 __le32 tlv_header; 2327 __le32 req_id; 2328 __le32 ptr; 2329 __le32 size; 2330 } __packed; 2331 2332 struct ath12k_wmi_host_mem_chunk_arg { 2333 void *vaddr; 2334 dma_addr_t paddr; 2335 u32 len; 2336 u32 req_id; 2337 }; 2338 2339 enum ath12k_peer_metadata_version { 2340 ATH12K_PEER_METADATA_V0, 2341 ATH12K_PEER_METADATA_V1, 2342 ATH12K_PEER_METADATA_V1A, 2343 ATH12K_PEER_METADATA_V1B 2344 }; 2345 2346 struct ath12k_wmi_resource_config_arg { 2347 u32 num_vdevs; 2348 u32 num_peers; 2349 u32 num_active_peers; 2350 u32 num_offload_peers; 2351 u32 num_offload_reorder_buffs; 2352 u32 num_peer_keys; 2353 u32 num_tids; 2354 u32 ast_skid_limit; 2355 u32 tx_chain_mask; 2356 u32 rx_chain_mask; 2357 u32 rx_timeout_pri[4]; 2358 u32 rx_decap_mode; 2359 u32 scan_max_pending_req; 2360 u32 bmiss_offload_max_vdev; 2361 u32 roam_offload_max_vdev; 2362 u32 roam_offload_max_ap_profiles; 2363 u32 num_mcast_groups; 2364 u32 num_mcast_table_elems; 2365 u32 mcast2ucast_mode; 2366 u32 tx_dbg_log_size; 2367 u32 num_wds_entries; 2368 u32 dma_burst_size; 2369 u32 mac_aggr_delim; 2370 u32 rx_skip_defrag_timeout_dup_detection_check; 2371 u32 vow_config; 2372 u32 gtk_offload_max_vdev; 2373 u32 num_msdu_desc; 2374 u32 max_frag_entries; 2375 u32 max_peer_ext_stats; 2376 u32 smart_ant_cap; 2377 u32 bk_minfree; 2378 u32 be_minfree; 2379 u32 vi_minfree; 2380 u32 vo_minfree; 2381 u32 rx_batchmode; 2382 u32 tt_support; 2383 u32 atf_config; 2384 u32 iphdr_pad_config; 2385 u32 qwrap_config:16, 2386 alloc_frag_desc_for_data_pkt:16; 2387 u32 num_tdls_vdevs; 2388 u32 num_tdls_conn_table_entries; 2389 u32 beacon_tx_offload_max_vdev; 2390 u32 num_multicast_filter_entries; 2391 u32 num_wow_filters; 2392 u32 num_keep_alive_pattern; 2393 u32 keep_alive_pattern_size; 2394 u32 max_tdls_concurrent_sleep_sta; 2395 u32 max_tdls_concurrent_buffer_sta; 2396 u32 wmi_send_separate; 2397 u32 num_ocb_vdevs; 2398 u32 num_ocb_channels; 2399 u32 num_ocb_schedules; 2400 u32 num_ns_ext_tuples_cfg; 2401 u32 bpf_instruction_size; 2402 u32 max_bssid_rx_filters; 2403 u32 use_pdev_id; 2404 u32 peer_map_unmap_version; 2405 u32 sched_params; 2406 u32 twt_ap_pdev_count; 2407 u32 twt_ap_sta_count; 2408 enum ath12k_peer_metadata_version peer_metadata_ver; 2409 u32 ema_max_vap_cnt; 2410 u32 ema_max_profile_period; 2411 bool is_reg_cc_ext_event_supported; 2412 }; 2413 2414 struct ath12k_wmi_init_cmd_arg { 2415 struct ath12k_wmi_resource_config_arg res_cfg; 2416 u8 num_mem_chunks; 2417 struct ath12k_wmi_host_mem_chunk_arg *mem_chunks; 2418 u32 hw_mode_id; 2419 u32 num_band_to_mac; 2420 struct ath12k_wmi_pdev_band_arg band_to_mac[WMI_HOST_MAX_PDEV]; 2421 }; 2422 2423 struct ath12k_wmi_pdev_band_to_mac_params { 2424 __le32 tlv_header; 2425 __le32 pdev_id; 2426 __le32 start_freq; 2427 __le32 end_freq; 2428 } __packed; 2429 2430 /* This is both individual command WMI_PDEV_SET_HW_MODE_CMDID and also part 2431 * of WMI_TAG_INIT_CMD. 2432 */ 2433 struct ath12k_wmi_pdev_set_hw_mode_cmd { 2434 __le32 tlv_header; 2435 __le32 pdev_id; 2436 __le32 hw_mode_index; 2437 __le32 num_band_to_mac; 2438 } __packed; 2439 2440 struct ath12k_wmi_ppe_threshold_params { 2441 __le32 numss_m1; /** NSS - 1*/ 2442 __le32 ru_info; 2443 __le32 ppet16_ppet8_ru3_ru0[WMI_MAX_NUM_SS]; 2444 } __packed; 2445 2446 #define HW_BD_INFO_SIZE 5 2447 2448 struct ath12k_wmi_abi_version_params { 2449 __le32 abi_version_0; 2450 __le32 abi_version_1; 2451 __le32 abi_version_ns_0; 2452 __le32 abi_version_ns_1; 2453 __le32 abi_version_ns_2; 2454 __le32 abi_version_ns_3; 2455 } __packed; 2456 2457 struct wmi_init_cmd { 2458 __le32 tlv_header; 2459 struct ath12k_wmi_abi_version_params host_abi_vers; 2460 __le32 num_host_mem_chunks; 2461 } __packed; 2462 2463 #define WMI_RSRC_CFG_HOST_SVC_FLAG_REG_CC_EXT_SUPPORT_BIT 4 2464 #define WMI_RSRC_CFG_FLAGS2_RX_PEER_METADATA_VERSION GENMASK(5, 4) 2465 #define WMI_RSRC_CFG_FLAG1_BSS_CHANNEL_INFO_64 BIT(5) 2466 #define WMI_RSRC_CFG_FLAGS2_CALC_NEXT_DTIM_COUNT_SET BIT(9) 2467 2468 struct ath12k_wmi_resource_config_params { 2469 __le32 tlv_header; 2470 __le32 num_vdevs; 2471 __le32 num_peers; 2472 __le32 num_offload_peers; 2473 __le32 num_offload_reorder_buffs; 2474 __le32 num_peer_keys; 2475 __le32 num_tids; 2476 __le32 ast_skid_limit; 2477 __le32 tx_chain_mask; 2478 __le32 rx_chain_mask; 2479 __le32 rx_timeout_pri[4]; 2480 __le32 rx_decap_mode; 2481 __le32 scan_max_pending_req; 2482 __le32 bmiss_offload_max_vdev; 2483 __le32 roam_offload_max_vdev; 2484 __le32 roam_offload_max_ap_profiles; 2485 __le32 num_mcast_groups; 2486 __le32 num_mcast_table_elems; 2487 __le32 mcast2ucast_mode; 2488 __le32 tx_dbg_log_size; 2489 __le32 num_wds_entries; 2490 __le32 dma_burst_size; 2491 __le32 mac_aggr_delim; 2492 __le32 rx_skip_defrag_timeout_dup_detection_check; 2493 __le32 vow_config; 2494 __le32 gtk_offload_max_vdev; 2495 __le32 num_msdu_desc; 2496 __le32 max_frag_entries; 2497 __le32 num_tdls_vdevs; 2498 __le32 num_tdls_conn_table_entries; 2499 __le32 beacon_tx_offload_max_vdev; 2500 __le32 num_multicast_filter_entries; 2501 __le32 num_wow_filters; 2502 __le32 num_keep_alive_pattern; 2503 __le32 keep_alive_pattern_size; 2504 __le32 max_tdls_concurrent_sleep_sta; 2505 __le32 max_tdls_concurrent_buffer_sta; 2506 __le32 wmi_send_separate; 2507 __le32 num_ocb_vdevs; 2508 __le32 num_ocb_channels; 2509 __le32 num_ocb_schedules; 2510 __le32 flag1; 2511 __le32 smart_ant_cap; 2512 __le32 bk_minfree; 2513 __le32 be_minfree; 2514 __le32 vi_minfree; 2515 __le32 vo_minfree; 2516 __le32 alloc_frag_desc_for_data_pkt; 2517 __le32 num_ns_ext_tuples_cfg; 2518 __le32 bpf_instruction_size; 2519 __le32 max_bssid_rx_filters; 2520 __le32 use_pdev_id; 2521 __le32 max_num_dbs_scan_duty_cycle; 2522 __le32 max_num_group_keys; 2523 __le32 peer_map_unmap_version; 2524 __le32 sched_params; 2525 __le32 twt_ap_pdev_count; 2526 __le32 twt_ap_sta_count; 2527 __le32 max_nlo_ssids; 2528 __le32 num_pkt_filters; 2529 __le32 num_max_sta_vdevs; 2530 __le32 max_bssid_indicator; 2531 __le32 ul_resp_config; 2532 __le32 msdu_flow_override_config0; 2533 __le32 msdu_flow_override_config1; 2534 __le32 flags2; 2535 __le32 host_service_flags; 2536 __le32 max_rnr_neighbours; 2537 __le32 ema_max_vap_cnt; 2538 __le32 ema_max_profile_period; 2539 } __packed; 2540 2541 struct wmi_service_ready_event { 2542 __le32 fw_build_vers; 2543 struct ath12k_wmi_abi_version_params fw_abi_vers; 2544 __le32 phy_capability; 2545 __le32 max_frag_entry; 2546 __le32 num_rf_chains; 2547 __le32 ht_cap_info; 2548 __le32 vht_cap_info; 2549 __le32 vht_supp_mcs; 2550 __le32 hw_min_tx_power; 2551 __le32 hw_max_tx_power; 2552 __le32 sys_cap_info; 2553 __le32 min_pkt_size_enable; 2554 __le32 max_bcn_ie_size; 2555 __le32 num_mem_reqs; 2556 __le32 max_num_scan_channels; 2557 __le32 hw_bd_id; 2558 __le32 hw_bd_info[HW_BD_INFO_SIZE]; 2559 __le32 max_supported_macs; 2560 __le32 wmi_fw_sub_feat_caps; 2561 __le32 num_dbs_hw_modes; 2562 /* txrx_chainmask 2563 * [7:0] - 2G band tx chain mask 2564 * [15:8] - 2G band rx chain mask 2565 * [23:16] - 5G band tx chain mask 2566 * [31:24] - 5G band rx chain mask 2567 */ 2568 __le32 txrx_chainmask; 2569 __le32 default_dbs_hw_mode_index; 2570 __le32 num_msdu_desc; 2571 } __packed; 2572 2573 #define WMI_SERVICE_BM_SIZE ((WMI_MAX_SERVICE + sizeof(u32) - 1) / sizeof(u32)) 2574 2575 #define WMI_SERVICE_SEGMENT_BM_SIZE32 4 /* 4x u32 = 128 bits */ 2576 #define WMI_SERVICE_EXT_BM_SIZE (WMI_SERVICE_SEGMENT_BM_SIZE32 * sizeof(u32)) 2577 #define WMI_AVAIL_SERVICE_BITS_IN_SIZE32 32 2578 #define WMI_SERVICE_BITS_IN_SIZE32 4 2579 2580 struct wmi_service_ready_ext_event { 2581 __le32 default_conc_scan_config_bits; 2582 __le32 default_fw_config_bits; 2583 struct ath12k_wmi_ppe_threshold_params ppet; 2584 __le32 he_cap_info; 2585 __le32 mpdu_density; 2586 __le32 max_bssid_rx_filters; 2587 __le32 fw_build_vers_ext; 2588 __le32 max_nlo_ssids; 2589 __le32 max_bssid_indicator; 2590 __le32 he_cap_info_ext; 2591 } __packed; 2592 2593 struct ath12k_wmi_soc_mac_phy_hw_mode_caps_params { 2594 __le32 num_hw_modes; 2595 __le32 num_chainmask_tables; 2596 } __packed; 2597 2598 struct ath12k_wmi_hw_mode_cap_params { 2599 __le32 tlv_header; 2600 __le32 hw_mode_id; 2601 __le32 phy_id_map; 2602 __le32 hw_mode_config_type; 2603 } __packed; 2604 2605 #define WMI_MAX_HECAP_PHY_SIZE (3) 2606 2607 /* pdev_id is present in lower 16 bits of pdev_and_hw_link_ids in 2608 * ath12k_wmi_mac_phy_caps_params & ath12k_wmi_caps_ext_params. 2609 * 2610 * hw_link_id is present in higher 16 bits of pdev_and_hw_link_ids. 2611 */ 2612 #define WMI_CAPS_PARAMS_PDEV_ID GENMASK(15, 0) 2613 #define WMI_CAPS_PARAMS_HW_LINK_ID GENMASK(31, 16) 2614 2615 struct ath12k_wmi_mac_phy_caps_params { 2616 __le32 hw_mode_id; 2617 __le32 pdev_and_hw_link_ids; 2618 __le32 phy_id; 2619 __le32 supported_flags; 2620 __le32 supported_bands; 2621 __le32 ampdu_density; 2622 __le32 max_bw_supported_2g; 2623 __le32 ht_cap_info_2g; 2624 __le32 vht_cap_info_2g; 2625 __le32 vht_supp_mcs_2g; 2626 __le32 he_cap_info_2g; 2627 __le32 he_supp_mcs_2g; 2628 __le32 tx_chain_mask_2g; 2629 __le32 rx_chain_mask_2g; 2630 __le32 max_bw_supported_5g; 2631 __le32 ht_cap_info_5g; 2632 __le32 vht_cap_info_5g; 2633 __le32 vht_supp_mcs_5g; 2634 __le32 he_cap_info_5g; 2635 __le32 he_supp_mcs_5g; 2636 __le32 tx_chain_mask_5g; 2637 __le32 rx_chain_mask_5g; 2638 __le32 he_cap_phy_info_2g[WMI_MAX_HECAP_PHY_SIZE]; 2639 __le32 he_cap_phy_info_5g[WMI_MAX_HECAP_PHY_SIZE]; 2640 struct ath12k_wmi_ppe_threshold_params he_ppet2g; 2641 struct ath12k_wmi_ppe_threshold_params he_ppet5g; 2642 __le32 chainmask_table_id; 2643 __le32 lmac_id; 2644 __le32 he_cap_info_2g_ext; 2645 __le32 he_cap_info_5g_ext; 2646 __le32 he_cap_info_internal; 2647 } __packed; 2648 2649 struct ath12k_wmi_hal_reg_caps_ext_params { 2650 __le32 tlv_header; 2651 __le32 phy_id; 2652 __le32 eeprom_reg_domain; 2653 __le32 eeprom_reg_domain_ext; 2654 __le32 regcap1; 2655 __le32 regcap2; 2656 __le32 wireless_modes; 2657 __le32 low_2ghz_chan; 2658 __le32 high_2ghz_chan; 2659 __le32 low_5ghz_chan; 2660 __le32 high_5ghz_chan; 2661 } __packed; 2662 2663 struct ath12k_wmi_soc_hal_reg_caps_params { 2664 __le32 num_phy; 2665 } __packed; 2666 2667 enum wmi_channel_width { 2668 WMI_CHAN_WIDTH_20 = 0, 2669 WMI_CHAN_WIDTH_40 = 1, 2670 WMI_CHAN_WIDTH_80 = 2, 2671 WMI_CHAN_WIDTH_160 = 3, 2672 WMI_CHAN_WIDTH_80P80 = 4, 2673 WMI_CHAN_WIDTH_5 = 5, 2674 WMI_CHAN_WIDTH_10 = 6, 2675 WMI_CHAN_WIDTH_165 = 7, 2676 WMI_CHAN_WIDTH_160P160 = 8, 2677 WMI_CHAN_WIDTH_320 = 9, 2678 }; 2679 2680 #define WMI_MAX_EHTCAP_MAC_SIZE 2 2681 #define WMI_MAX_EHTCAP_PHY_SIZE 3 2682 #define WMI_MAX_EHTCAP_RATE_SET 3 2683 2684 /* Used for EHT MCS-NSS array. Data at each array index follows the format given 2685 * in IEEE P802.11be/D2.0, May 20229.4.2.313.4. 2686 * 2687 * Index interpretation: 2688 * 0 - 20 MHz only sta, all 4 bytes valid 2689 * 1 - index for bandwidths <= 80 MHz except 20 MHz-only, first 3 bytes valid 2690 * 2 - index for 160 MHz, first 3 bytes valid 2691 * 3 - index for 320 MHz, first 3 bytes valid 2692 */ 2693 #define WMI_MAX_EHT_SUPP_MCS_2G_SIZE 2 2694 #define WMI_MAX_EHT_SUPP_MCS_5G_SIZE 4 2695 2696 #define WMI_EHTCAP_TXRX_MCS_NSS_IDX_80 0 2697 #define WMI_EHTCAP_TXRX_MCS_NSS_IDX_160 1 2698 #define WMI_EHTCAP_TXRX_MCS_NSS_IDX_320 2 2699 2700 #define WMI_EHT_MCS_NSS_0_7 GENMASK(3, 0) 2701 #define WMI_EHT_MCS_NSS_8_9 GENMASK(7, 4) 2702 #define WMI_EHT_MCS_NSS_10_11 GENMASK(11, 8) 2703 #define WMI_EHT_MCS_NSS_12_13 GENMASK(15, 12) 2704 2705 struct wmi_service_ready_ext2_event { 2706 __le32 reg_db_version; 2707 __le32 hw_min_max_tx_power_2ghz; 2708 __le32 hw_min_max_tx_power_5ghz; 2709 __le32 chwidth_num_peer_caps; 2710 __le32 preamble_puncture_bw; 2711 __le32 max_user_per_ppdu_ofdma; 2712 __le32 max_user_per_ppdu_mumimo; 2713 __le32 target_cap_flags; 2714 __le32 eht_cap_mac_info[WMI_MAX_EHTCAP_MAC_SIZE]; 2715 __le32 max_num_linkview_peers; 2716 __le32 max_num_msduq_supported_per_tid; 2717 __le32 default_num_msduq_supported_per_tid; 2718 } __packed; 2719 2720 struct ath12k_wmi_caps_ext_params { 2721 __le32 hw_mode_id; 2722 __le32 pdev_and_hw_link_ids; 2723 __le32 phy_id; 2724 __le32 wireless_modes_ext; 2725 __le32 eht_cap_mac_info_2ghz[WMI_MAX_EHTCAP_MAC_SIZE]; 2726 __le32 eht_cap_mac_info_5ghz[WMI_MAX_EHTCAP_MAC_SIZE]; 2727 __le32 rsvd0[2]; 2728 __le32 eht_cap_phy_info_2ghz[WMI_MAX_EHTCAP_PHY_SIZE]; 2729 __le32 eht_cap_phy_info_5ghz[WMI_MAX_EHTCAP_PHY_SIZE]; 2730 struct ath12k_wmi_ppe_threshold_params eht_ppet_2ghz; 2731 struct ath12k_wmi_ppe_threshold_params eht_ppet_5ghz; 2732 __le32 eht_cap_info_internal; 2733 __le32 eht_supp_mcs_ext_2ghz[WMI_MAX_EHT_SUPP_MCS_2G_SIZE]; 2734 __le32 eht_supp_mcs_ext_5ghz[WMI_MAX_EHT_SUPP_MCS_5G_SIZE]; 2735 __le32 eml_capability; 2736 __le32 mld_capability; 2737 } __packed; 2738 2739 /* 2 word representation of MAC addr */ 2740 struct ath12k_wmi_mac_addr_params { 2741 u8 addr[ETH_ALEN]; 2742 u8 padding[2]; 2743 } __packed; 2744 2745 struct ath12k_wmi_dma_ring_caps_params { 2746 __le32 tlv_header; 2747 __le32 pdev_id; 2748 __le32 module_id; 2749 __le32 min_elem; 2750 __le32 min_buf_sz; 2751 __le32 min_buf_align; 2752 } __packed; 2753 2754 struct ath12k_wmi_ready_event_min_params { 2755 struct ath12k_wmi_abi_version_params fw_abi_vers; 2756 struct ath12k_wmi_mac_addr_params mac_addr; 2757 __le32 status; 2758 __le32 num_dscp_table; 2759 __le32 num_extra_mac_addr; 2760 __le32 num_total_peers; 2761 __le32 num_extra_peers; 2762 } __packed; 2763 2764 struct wmi_ready_event { 2765 struct ath12k_wmi_ready_event_min_params ready_event_min; 2766 __le32 max_ast_index; 2767 __le32 pktlog_defs_checksum; 2768 } __packed; 2769 2770 struct wmi_service_available_event { 2771 __le32 wmi_service_segment_offset; 2772 __le32 wmi_service_segment_bitmap[WMI_SERVICE_SEGMENT_BM_SIZE32]; 2773 } __packed; 2774 2775 struct ath12k_wmi_vdev_create_arg { 2776 u8 if_id; 2777 u32 type; 2778 u32 subtype; 2779 struct { 2780 u8 tx; 2781 u8 rx; 2782 } chains[NUM_NL80211_BANDS]; 2783 u32 pdev_id; 2784 u8 if_stats_id; 2785 u32 mbssid_flags; 2786 u32 mbssid_tx_vdev_id; 2787 u8 mld_addr[ETH_ALEN]; 2788 }; 2789 2790 #define ATH12K_MAX_VDEV_STATS_ID 0x30 2791 #define ATH12K_INVAL_VDEV_STATS_ID 0xFF 2792 2793 struct wmi_vdev_create_cmd { 2794 __le32 tlv_header; 2795 __le32 vdev_id; 2796 __le32 vdev_type; 2797 __le32 vdev_subtype; 2798 struct ath12k_wmi_mac_addr_params vdev_macaddr; 2799 __le32 num_cfg_txrx_streams; 2800 __le32 pdev_id; 2801 __le32 mbssid_flags; 2802 __le32 mbssid_tx_vdev_id; 2803 __le32 vdev_stats_id_valid; 2804 __le32 vdev_stats_id; 2805 } __packed; 2806 2807 struct ath12k_wmi_vdev_txrx_streams_params { 2808 __le32 tlv_header; 2809 __le32 band; 2810 __le32 supported_tx_streams; 2811 __le32 supported_rx_streams; 2812 } __packed; 2813 2814 struct wmi_vdev_create_mlo_params { 2815 __le32 tlv_header; 2816 struct ath12k_wmi_mac_addr_params mld_macaddr; 2817 } __packed; 2818 2819 #define ATH12K_WMI_FLAG_MLO_ENABLED BIT(0) 2820 #define ATH12K_WMI_FLAG_MLO_ASSOC_LINK BIT(1) 2821 #define ATH12K_WMI_FLAG_MLO_PRIMARY_UMAC BIT(2) 2822 #define ATH12K_WMI_FLAG_MLO_LOGICAL_LINK_IDX_VALID BIT(3) 2823 #define ATH12K_WMI_FLAG_MLO_PEER_ID_VALID BIT(4) 2824 #define ATH12K_WMI_FLAG_MLO_MCAST_VDEV BIT(5) 2825 #define ATH12K_WMI_FLAG_MLO_EMLSR_SUPPORT BIT(6) 2826 #define ATH12K_WMI_FLAG_MLO_FORCED_INACTIVE BIT(7) 2827 #define ATH12K_WMI_FLAG_MLO_LINK_ADD BIT(8) 2828 2829 struct wmi_vdev_start_mlo_params { 2830 __le32 tlv_header; 2831 __le32 flags; 2832 } __packed; 2833 2834 struct wmi_partner_link_info { 2835 __le32 tlv_header; 2836 __le32 vdev_id; 2837 __le32 hw_link_id; 2838 struct ath12k_wmi_mac_addr_params vdev_addr; 2839 } __packed; 2840 2841 struct wmi_vdev_delete_cmd { 2842 __le32 tlv_header; 2843 __le32 vdev_id; 2844 } __packed; 2845 2846 struct ath12k_wmi_vdev_up_params { 2847 u32 vdev_id; 2848 u32 aid; 2849 const u8 *bssid; 2850 const u8 *tx_bssid; 2851 u32 nontx_profile_idx; 2852 u32 nontx_profile_cnt; 2853 }; 2854 2855 struct wmi_vdev_up_cmd { 2856 __le32 tlv_header; 2857 __le32 vdev_id; 2858 __le32 vdev_assoc_id; 2859 struct ath12k_wmi_mac_addr_params vdev_bssid; 2860 struct ath12k_wmi_mac_addr_params tx_vdev_bssid; 2861 __le32 nontx_profile_idx; 2862 __le32 nontx_profile_cnt; 2863 } __packed; 2864 2865 struct wmi_vdev_stop_cmd { 2866 __le32 tlv_header; 2867 __le32 vdev_id; 2868 } __packed; 2869 2870 struct wmi_vdev_down_cmd { 2871 __le32 tlv_header; 2872 __le32 vdev_id; 2873 } __packed; 2874 2875 #define WMI_VDEV_START_HIDDEN_SSID BIT(0) 2876 #define WMI_VDEV_START_PMF_ENABLED BIT(1) 2877 #define WMI_VDEV_START_LDPC_RX_ENABLED BIT(3) 2878 2879 #define ATH12K_WMI_SSID_LEN 32 2880 2881 struct ath12k_wmi_ssid_params { 2882 __le32 ssid_len; 2883 u8 ssid[ATH12K_WMI_SSID_LEN]; 2884 } __packed; 2885 2886 #define ATH12K_VDEV_SETUP_TIMEOUT_HZ (5 * HZ) 2887 2888 enum wmi_vdev_mbssid_flags { 2889 WMI_VDEV_MBSSID_FLAGS_NON_MBSSID_AP = BIT(0), 2890 WMI_VDEV_MBSSID_FLAGS_TRANSMIT_AP = BIT(1), 2891 WMI_VDEV_MBSSID_FLAGS_NON_TRANSMIT_AP = BIT(2), 2892 WMI_VDEV_MBSSID_FLAGS_EMA_MODE = BIT(3), 2893 WMI_VDEV_MBSSID_FLAGS_SCAN_MODE_VAP = BIT(4), 2894 }; 2895 2896 struct wmi_vdev_start_request_cmd { 2897 __le32 tlv_header; 2898 __le32 vdev_id; 2899 __le32 requestor_id; 2900 __le32 beacon_interval; 2901 __le32 dtim_period; 2902 __le32 flags; 2903 struct ath12k_wmi_ssid_params ssid; 2904 __le32 bcn_tx_rate; 2905 __le32 bcn_txpower; 2906 __le32 num_noa_descriptors; 2907 __le32 disable_hw_ack; 2908 __le32 preferred_tx_streams; 2909 __le32 preferred_rx_streams; 2910 __le32 he_ops; 2911 __le32 cac_duration_ms; 2912 __le32 regdomain; 2913 __le32 min_data_rate; 2914 __le32 mbssid_flags; /* uses enum wmi_vdev_mbssid_flags */ 2915 __le32 mbssid_tx_vdev_id; 2916 __le32 eht_ops; 2917 __le32 punct_bitmap; 2918 } __packed; 2919 2920 #define MGMT_TX_DL_FRM_LEN 64 2921 2922 struct ath12k_wmi_channel_arg { 2923 u8 chan_id; 2924 u8 pwr; 2925 u32 mhz; 2926 u32 half_rate:1, 2927 quarter_rate:1, 2928 dfs_set:1, 2929 dfs_set_cfreq2:1, 2930 is_chan_passive:1, 2931 allow_ht:1, 2932 allow_vht:1, 2933 allow_he:1, 2934 set_agile:1, 2935 psc_channel:1; 2936 u32 phy_mode; 2937 u32 cfreq1; 2938 u32 cfreq2; 2939 char maxpower; 2940 char minpower; 2941 char maxregpower; 2942 u8 antennamax; 2943 u8 reg_class_id; 2944 }; 2945 2946 enum wmi_phy_mode { 2947 MODE_11A = 0, 2948 MODE_11G = 1, /* 11b/g Mode */ 2949 MODE_11B = 2, /* 11b Mode */ 2950 MODE_11GONLY = 3, /* 11g only Mode */ 2951 MODE_11NA_HT20 = 4, 2952 MODE_11NG_HT20 = 5, 2953 MODE_11NA_HT40 = 6, 2954 MODE_11NG_HT40 = 7, 2955 MODE_11AC_VHT20 = 8, 2956 MODE_11AC_VHT40 = 9, 2957 MODE_11AC_VHT80 = 10, 2958 MODE_11AC_VHT20_2G = 11, 2959 MODE_11AC_VHT40_2G = 12, 2960 MODE_11AC_VHT80_2G = 13, 2961 MODE_11AC_VHT80_80 = 14, 2962 MODE_11AC_VHT160 = 15, 2963 MODE_11AX_HE20 = 16, 2964 MODE_11AX_HE40 = 17, 2965 MODE_11AX_HE80 = 18, 2966 MODE_11AX_HE80_80 = 19, 2967 MODE_11AX_HE160 = 20, 2968 MODE_11AX_HE20_2G = 21, 2969 MODE_11AX_HE40_2G = 22, 2970 MODE_11AX_HE80_2G = 23, 2971 MODE_11BE_EHT20 = 24, 2972 MODE_11BE_EHT40 = 25, 2973 MODE_11BE_EHT80 = 26, 2974 MODE_11BE_EHT80_80 = 27, 2975 MODE_11BE_EHT160 = 28, 2976 MODE_11BE_EHT160_160 = 29, 2977 MODE_11BE_EHT320 = 30, 2978 MODE_11BE_EHT20_2G = 31, 2979 MODE_11BE_EHT40_2G = 32, 2980 MODE_UNKNOWN = 33, 2981 MODE_MAX = 33, 2982 }; 2983 2984 #define ATH12K_WMI_MLO_MAX_LINKS 4 2985 2986 struct wmi_ml_partner_info { 2987 u32 vdev_id; 2988 u32 hw_link_id; 2989 u8 addr[ETH_ALEN]; 2990 bool assoc_link; 2991 bool primary_umac; 2992 bool logical_link_idx_valid; 2993 u32 logical_link_idx; 2994 }; 2995 2996 struct wmi_ml_arg { 2997 bool enabled; 2998 bool assoc_link; 2999 bool mcast_link; 3000 bool link_add; 3001 u8 num_partner_links; 3002 struct wmi_ml_partner_info partner_info[ATH12K_WMI_MLO_MAX_LINKS]; 3003 }; 3004 3005 struct wmi_vdev_start_req_arg { 3006 u32 vdev_id; 3007 u32 freq; 3008 u32 band_center_freq1; 3009 u32 band_center_freq2; 3010 bool passive; 3011 bool allow_ibss; 3012 bool allow_ht; 3013 bool allow_vht; 3014 bool ht40plus; 3015 bool chan_radar; 3016 bool freq2_radar; 3017 bool allow_he; 3018 u32 min_power; 3019 u32 max_power; 3020 u32 max_reg_power; 3021 u32 max_antenna_gain; 3022 enum wmi_phy_mode mode; 3023 u32 bcn_intval; 3024 u32 dtim_period; 3025 u8 *ssid; 3026 u32 ssid_len; 3027 u32 bcn_tx_rate; 3028 u32 bcn_tx_power; 3029 bool disable_hw_ack; 3030 bool hidden_ssid; 3031 bool pmf_enabled; 3032 u32 he_ops; 3033 u32 cac_duration_ms; 3034 u32 regdomain; 3035 u32 pref_rx_streams; 3036 u32 pref_tx_streams; 3037 u32 num_noa_descriptors; 3038 u32 min_data_rate; 3039 u32 mbssid_flags; 3040 u32 mbssid_tx_vdev_id; 3041 u32 punct_bitmap; 3042 struct wmi_ml_arg ml; 3043 }; 3044 3045 struct ath12k_wmi_peer_create_arg { 3046 const u8 *peer_addr; 3047 u32 peer_type; 3048 u32 vdev_id; 3049 bool ml_enabled; 3050 }; 3051 3052 struct wmi_peer_create_mlo_params { 3053 __le32 tlv_header; 3054 __le32 flags; 3055 }; 3056 3057 struct ath12k_wmi_pdev_set_regdomain_arg { 3058 u16 current_rd_in_use; 3059 u16 current_rd_2g; 3060 u16 current_rd_5g; 3061 u32 ctl_2g; 3062 u32 ctl_5g; 3063 u8 dfs_domain; 3064 u32 pdev_id; 3065 }; 3066 3067 struct ath12k_wmi_rx_reorder_queue_remove_arg { 3068 u8 *peer_macaddr; 3069 u16 vdev_id; 3070 u32 peer_tid_bitmap; 3071 }; 3072 3073 #define WMI_HOST_PDEV_ID_SOC 0xFF 3074 #define WMI_HOST_PDEV_ID_0 0 3075 #define WMI_HOST_PDEV_ID_1 1 3076 #define WMI_HOST_PDEV_ID_2 2 3077 3078 #define WMI_PDEV_ID_SOC 0 3079 #define WMI_PDEV_ID_1ST 1 3080 #define WMI_PDEV_ID_2ND 2 3081 #define WMI_PDEV_ID_3RD 3 3082 3083 /* Freq units in MHz */ 3084 #define REG_RULE_START_FREQ 0x0000ffff 3085 #define REG_RULE_END_FREQ 0xffff0000 3086 #define REG_RULE_FLAGS 0x0000ffff 3087 #define REG_RULE_MAX_BW 0x0000ffff 3088 #define REG_RULE_REG_PWR 0x00ff0000 3089 #define REG_RULE_ANT_GAIN 0xff000000 3090 #define REG_RULE_PSD_INFO BIT(2) 3091 #define REG_RULE_PSD_EIRP 0xffff0000 3092 3093 #define WMI_VDEV_PARAM_TXBF_SU_TX_BFEE BIT(0) 3094 #define WMI_VDEV_PARAM_TXBF_MU_TX_BFEE BIT(1) 3095 #define WMI_VDEV_PARAM_TXBF_SU_TX_BFER BIT(2) 3096 #define WMI_VDEV_PARAM_TXBF_MU_TX_BFER BIT(3) 3097 3098 #define HECAP_PHYDWORD_0 0 3099 #define HECAP_PHYDWORD_1 1 3100 #define HECAP_PHYDWORD_2 2 3101 3102 #define HECAP_PHY_SU_BFER BIT(31) 3103 #define HECAP_PHY_SU_BFEE BIT(0) 3104 #define HECAP_PHY_MU_BFER BIT(1) 3105 #define HECAP_PHY_UL_MUMIMO BIT(22) 3106 #define HECAP_PHY_UL_MUOFDMA BIT(23) 3107 3108 #define HECAP_PHY_SUBFMR_GET(hecap_phy) \ 3109 u32_get_bits(hecap_phy[HECAP_PHYDWORD_0], HECAP_PHY_SU_BFER) 3110 3111 #define HECAP_PHY_SUBFME_GET(hecap_phy) \ 3112 u32_get_bits(hecap_phy[HECAP_PHYDWORD_1], HECAP_PHY_SU_BFEE) 3113 3114 #define HECAP_PHY_MUBFMR_GET(hecap_phy) \ 3115 u32_get_bits(hecap_phy[HECAP_PHYDWORD_1], HECAP_PHY_MU_BFER) 3116 3117 #define HECAP_PHY_ULMUMIMO_GET(hecap_phy) \ 3118 u32_get_bits(hecap_phy[HECAP_PHYDWORD_0], HECAP_PHY_UL_MUMIMO) 3119 3120 #define HECAP_PHY_ULOFDMA_GET(hecap_phy) \ 3121 u32_get_bits(hecap_phy[HECAP_PHYDWORD_0], HECAP_PHY_UL_MUOFDMA) 3122 3123 #define HE_MODE_SU_TX_BFEE BIT(0) 3124 #define HE_MODE_SU_TX_BFER BIT(1) 3125 #define HE_MODE_MU_TX_BFEE BIT(2) 3126 #define HE_MODE_MU_TX_BFER BIT(3) 3127 #define HE_MODE_DL_OFDMA BIT(4) 3128 #define HE_MODE_UL_OFDMA BIT(5) 3129 #define HE_MODE_UL_MUMIMO BIT(6) 3130 3131 #define HE_DL_MUOFDMA_ENABLE 1 3132 #define HE_UL_MUOFDMA_ENABLE 1 3133 #define HE_DL_MUMIMO_ENABLE 1 3134 #define HE_MU_BFEE_ENABLE 1 3135 #define HE_SU_BFEE_ENABLE 1 3136 3137 #define HE_VHT_SOUNDING_MODE_ENABLE 1 3138 #define HE_SU_MU_SOUNDING_MODE_ENABLE 1 3139 #define HE_TRIG_NONTRIG_SOUNDING_MODE_ENABLE 1 3140 3141 /* HE or VHT Sounding */ 3142 #define HE_VHT_SOUNDING_MODE BIT(0) 3143 /* SU or MU Sounding */ 3144 #define HE_SU_MU_SOUNDING_MODE BIT(2) 3145 /* Trig or Non-Trig Sounding */ 3146 #define HE_TRIG_NONTRIG_SOUNDING_MODE BIT(3) 3147 3148 #define WMI_TXBF_STS_CAP_OFFSET_LSB 4 3149 #define WMI_TXBF_STS_CAP_OFFSET_MASK 0x70 3150 #define WMI_BF_SOUND_DIM_OFFSET_LSB 8 3151 #define WMI_BF_SOUND_DIM_OFFSET_MASK 0x700 3152 3153 enum wmi_peer_type { 3154 WMI_PEER_TYPE_DEFAULT = 0, 3155 WMI_PEER_TYPE_BSS = 1, 3156 WMI_PEER_TYPE_TDLS = 2, 3157 }; 3158 3159 struct wmi_peer_create_cmd { 3160 __le32 tlv_header; 3161 __le32 vdev_id; 3162 struct ath12k_wmi_mac_addr_params peer_macaddr; 3163 __le32 peer_type; 3164 } __packed; 3165 3166 struct wmi_peer_delete_cmd { 3167 __le32 tlv_header; 3168 __le32 vdev_id; 3169 struct ath12k_wmi_mac_addr_params peer_macaddr; 3170 } __packed; 3171 3172 struct wmi_peer_reorder_queue_setup_cmd { 3173 __le32 tlv_header; 3174 __le32 vdev_id; 3175 struct ath12k_wmi_mac_addr_params peer_macaddr; 3176 __le32 tid; 3177 __le32 queue_ptr_lo; 3178 __le32 queue_ptr_hi; 3179 __le32 queue_no; 3180 __le32 ba_window_size_valid; 3181 __le32 ba_window_size; 3182 } __packed; 3183 3184 struct wmi_peer_reorder_queue_remove_cmd { 3185 __le32 tlv_header; 3186 __le32 vdev_id; 3187 struct ath12k_wmi_mac_addr_params peer_macaddr; 3188 __le32 tid_mask; 3189 } __packed; 3190 3191 enum wmi_bss_chan_info_req_type { 3192 WMI_BSS_SURVEY_REQ_TYPE_READ = 1, 3193 WMI_BSS_SURVEY_REQ_TYPE_READ_CLEAR, 3194 }; 3195 3196 struct wmi_pdev_set_param_cmd { 3197 __le32 tlv_header; 3198 __le32 pdev_id; 3199 __le32 param_id; 3200 __le32 param_value; 3201 } __packed; 3202 3203 struct wmi_pdev_set_ps_mode_cmd { 3204 __le32 tlv_header; 3205 __le32 vdev_id; 3206 __le32 sta_ps_mode; 3207 } __packed; 3208 3209 struct wmi_pdev_suspend_cmd { 3210 __le32 tlv_header; 3211 __le32 pdev_id; 3212 __le32 suspend_opt; 3213 } __packed; 3214 3215 struct wmi_pdev_resume_cmd { 3216 __le32 tlv_header; 3217 __le32 pdev_id; 3218 } __packed; 3219 3220 struct wmi_pdev_bss_chan_info_req_cmd { 3221 __le32 tlv_header; 3222 /* ref wmi_bss_chan_info_req_type */ 3223 __le32 req_type; 3224 __le32 pdev_id; 3225 } __packed; 3226 3227 struct wmi_ap_ps_peer_cmd { 3228 __le32 tlv_header; 3229 __le32 vdev_id; 3230 struct ath12k_wmi_mac_addr_params peer_macaddr; 3231 __le32 param; 3232 __le32 value; 3233 } __packed; 3234 3235 struct wmi_sta_powersave_param_cmd { 3236 __le32 tlv_header; 3237 __le32 vdev_id; 3238 __le32 param; 3239 __le32 value; 3240 } __packed; 3241 3242 struct wmi_pdev_set_regdomain_cmd { 3243 __le32 tlv_header; 3244 __le32 pdev_id; 3245 __le32 reg_domain; 3246 __le32 reg_domain_2g; 3247 __le32 reg_domain_5g; 3248 __le32 conformance_test_limit_2g; 3249 __le32 conformance_test_limit_5g; 3250 __le32 dfs_domain; 3251 } __packed; 3252 3253 struct wmi_peer_set_param_cmd { 3254 __le32 tlv_header; 3255 __le32 vdev_id; 3256 struct ath12k_wmi_mac_addr_params peer_macaddr; 3257 __le32 param_id; 3258 __le32 param_value; 3259 } __packed; 3260 3261 struct wmi_peer_flush_tids_cmd { 3262 __le32 tlv_header; 3263 __le32 vdev_id; 3264 struct ath12k_wmi_mac_addr_params peer_macaddr; 3265 __le32 peer_tid_bitmap; 3266 } __packed; 3267 3268 struct wmi_dfs_phyerr_offload_cmd { 3269 __le32 tlv_header; 3270 __le32 pdev_id; 3271 } __packed; 3272 3273 struct wmi_bcn_offload_ctrl_cmd { 3274 __le32 tlv_header; 3275 __le32 vdev_id; 3276 __le32 bcn_ctrl_op; 3277 } __packed; 3278 3279 enum scan_dwelltime_adaptive_mode { 3280 SCAN_DWELL_MODE_DEFAULT = 0, 3281 SCAN_DWELL_MODE_CONSERVATIVE = 1, 3282 SCAN_DWELL_MODE_MODERATE = 2, 3283 SCAN_DWELL_MODE_AGGRESSIVE = 3, 3284 SCAN_DWELL_MODE_STATIC = 4 3285 }; 3286 3287 #define WLAN_SCAN_MAX_NUM_SSID 10 3288 #define WLAN_SCAN_MAX_NUM_BSSID 10 3289 3290 struct ath12k_wmi_element_info_arg { 3291 u32 len; 3292 u8 *ptr; 3293 }; 3294 3295 #define WMI_IE_BITMAP_SIZE 8 3296 3297 #define WMI_SCAN_MAX_NUM_SSID 0x0A 3298 /* prefix used by scan requestor ids on the host */ 3299 #define WMI_HOST_SCAN_REQUESTOR_ID_PREFIX 0xA000 3300 3301 /* prefix used by scan request ids generated on the host */ 3302 /* host cycles through the lower 12 bits to generate ids */ 3303 #define WMI_HOST_SCAN_REQ_ID_PREFIX 0xA000 3304 3305 #define WLAN_SCAN_PARAMS_MAX_SSID 16 3306 #define WLAN_SCAN_PARAMS_MAX_BSSID 4 3307 #define WLAN_SCAN_PARAMS_MAX_IE_LEN 512 3308 3309 /* Values lower than this may be refused by some firmware revisions with a scan 3310 * completion with a timedout reason. 3311 */ 3312 #define WMI_SCAN_CHAN_MIN_TIME_MSEC 40 3313 3314 /* Scan priority numbers must be sequential, starting with 0 */ 3315 enum wmi_scan_priority { 3316 WMI_SCAN_PRIORITY_VERY_LOW = 0, 3317 WMI_SCAN_PRIORITY_LOW, 3318 WMI_SCAN_PRIORITY_MEDIUM, 3319 WMI_SCAN_PRIORITY_HIGH, 3320 WMI_SCAN_PRIORITY_VERY_HIGH, 3321 WMI_SCAN_PRIORITY_COUNT /* number of priorities supported */ 3322 }; 3323 3324 enum wmi_scan_event_type { 3325 WMI_SCAN_EVENT_STARTED = BIT(0), 3326 WMI_SCAN_EVENT_COMPLETED = BIT(1), 3327 WMI_SCAN_EVENT_BSS_CHANNEL = BIT(2), 3328 WMI_SCAN_EVENT_FOREIGN_CHAN = BIT(3), 3329 WMI_SCAN_EVENT_DEQUEUED = BIT(4), 3330 /* possibly by high-prio scan */ 3331 WMI_SCAN_EVENT_PREEMPTED = BIT(5), 3332 WMI_SCAN_EVENT_START_FAILED = BIT(6), 3333 WMI_SCAN_EVENT_RESTARTED = BIT(7), 3334 WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT = BIT(8), 3335 WMI_SCAN_EVENT_SUSPENDED = BIT(9), 3336 WMI_SCAN_EVENT_RESUMED = BIT(10), 3337 WMI_SCAN_EVENT_MAX = BIT(15), 3338 }; 3339 3340 enum wmi_scan_completion_reason { 3341 WMI_SCAN_REASON_COMPLETED, 3342 WMI_SCAN_REASON_CANCELLED, 3343 WMI_SCAN_REASON_PREEMPTED, 3344 WMI_SCAN_REASON_TIMEDOUT, 3345 WMI_SCAN_REASON_INTERNAL_FAILURE, 3346 WMI_SCAN_REASON_MAX, 3347 }; 3348 3349 struct wmi_start_scan_cmd { 3350 __le32 tlv_header; 3351 __le32 scan_id; 3352 __le32 scan_req_id; 3353 __le32 vdev_id; 3354 __le32 scan_priority; 3355 __le32 notify_scan_events; 3356 __le32 dwell_time_active; 3357 __le32 dwell_time_passive; 3358 __le32 min_rest_time; 3359 __le32 max_rest_time; 3360 __le32 repeat_probe_time; 3361 __le32 probe_spacing_time; 3362 __le32 idle_time; 3363 __le32 max_scan_time; 3364 __le32 probe_delay; 3365 __le32 scan_ctrl_flags; 3366 __le32 burst_duration; 3367 __le32 num_chan; 3368 __le32 num_bssid; 3369 __le32 num_ssids; 3370 __le32 ie_len; 3371 __le32 n_probes; 3372 struct ath12k_wmi_mac_addr_params mac_addr; 3373 struct ath12k_wmi_mac_addr_params mac_mask; 3374 u32 ie_bitmap[WMI_IE_BITMAP_SIZE]; 3375 __le32 num_vendor_oui; 3376 __le32 scan_ctrl_flags_ext; 3377 __le32 dwell_time_active_2g; 3378 __le32 dwell_time_active_6g; 3379 __le32 dwell_time_passive_6g; 3380 __le32 scan_start_offset; 3381 } __packed; 3382 3383 #define WMI_SCAN_FLAG_PASSIVE 0x1 3384 #define WMI_SCAN_ADD_BCAST_PROBE_REQ 0x2 3385 #define WMI_SCAN_ADD_CCK_RATES 0x4 3386 #define WMI_SCAN_ADD_OFDM_RATES 0x8 3387 #define WMI_SCAN_CHAN_STAT_EVENT 0x10 3388 #define WMI_SCAN_FILTER_PROBE_REQ 0x20 3389 #define WMI_SCAN_BYPASS_DFS_CHN 0x40 3390 #define WMI_SCAN_CONTINUE_ON_ERROR 0x80 3391 #define WMI_SCAN_FILTER_PROMISCUOS 0x100 3392 #define WMI_SCAN_FLAG_FORCE_ACTIVE_ON_DFS 0x200 3393 #define WMI_SCAN_ADD_TPC_IE_IN_PROBE_REQ 0x400 3394 #define WMI_SCAN_ADD_DS_IE_IN_PROBE_REQ 0x800 3395 #define WMI_SCAN_ADD_SPOOF_MAC_IN_PROBE_REQ 0x1000 3396 #define WMI_SCAN_OFFCHAN_MGMT_TX 0x2000 3397 #define WMI_SCAN_OFFCHAN_DATA_TX 0x4000 3398 #define WMI_SCAN_CAPTURE_PHY_ERROR 0x8000 3399 #define WMI_SCAN_FLAG_STRICT_PASSIVE_ON_PCHN 0x10000 3400 #define WMI_SCAN_FLAG_HALF_RATE_SUPPORT 0x20000 3401 #define WMI_SCAN_FLAG_QUARTER_RATE_SUPPORT 0x40000 3402 #define WMI_SCAN_RANDOM_SEQ_NO_IN_PROBE_REQ 0x80000 3403 #define WMI_SCAN_ENABLE_IE_WHTELIST_IN_PROBE_REQ 0x100000 3404 3405 #define WMI_SCAN_DWELL_MODE_MASK GENMASK(23, 21) 3406 3407 enum { 3408 WMI_SCAN_DWELL_MODE_DEFAULT = 0, 3409 WMI_SCAN_DWELL_MODE_CONSERVATIVE = 1, 3410 WMI_SCAN_DWELL_MODE_MODERATE = 2, 3411 WMI_SCAN_DWELL_MODE_AGGRESSIVE = 3, 3412 WMI_SCAN_DWELL_MODE_STATIC = 4, 3413 }; 3414 3415 struct ath12k_wmi_hint_short_ssid_arg { 3416 u32 freq_flags; 3417 u32 short_ssid; 3418 }; 3419 3420 struct ath12k_wmi_hint_bssid_arg { 3421 u32 freq_flags; 3422 struct ath12k_wmi_mac_addr_params bssid; 3423 }; 3424 3425 struct ath12k_wmi_scan_req_arg { 3426 u32 scan_id; 3427 u32 scan_req_id; 3428 u32 vdev_id; 3429 u32 pdev_id; 3430 enum wmi_scan_priority scan_priority; 3431 u32 scan_ev_started:1, 3432 scan_ev_completed:1, 3433 scan_ev_bss_chan:1, 3434 scan_ev_foreign_chan:1, 3435 scan_ev_dequeued:1, 3436 scan_ev_preempted:1, 3437 scan_ev_start_failed:1, 3438 scan_ev_restarted:1, 3439 scan_ev_foreign_chn_exit:1, 3440 scan_ev_invalid:1, 3441 scan_ev_gpio_timeout:1, 3442 scan_ev_suspended:1, 3443 scan_ev_resumed:1; 3444 u32 dwell_time_active; 3445 u32 dwell_time_active_2g; 3446 u32 dwell_time_passive; 3447 u32 dwell_time_active_6g; 3448 u32 dwell_time_passive_6g; 3449 u32 min_rest_time; 3450 u32 max_rest_time; 3451 u32 repeat_probe_time; 3452 u32 probe_spacing_time; 3453 u32 idle_time; 3454 u32 max_scan_time; 3455 u32 probe_delay; 3456 u32 scan_f_passive:1, 3457 scan_f_bcast_probe:1, 3458 scan_f_cck_rates:1, 3459 scan_f_ofdm_rates:1, 3460 scan_f_chan_stat_evnt:1, 3461 scan_f_filter_prb_req:1, 3462 scan_f_bypass_dfs_chn:1, 3463 scan_f_continue_on_err:1, 3464 scan_f_offchan_mgmt_tx:1, 3465 scan_f_offchan_data_tx:1, 3466 scan_f_promisc_mode:1, 3467 scan_f_capture_phy_err:1, 3468 scan_f_strict_passive_pch:1, 3469 scan_f_half_rate:1, 3470 scan_f_quarter_rate:1, 3471 scan_f_force_active_dfs_chn:1, 3472 scan_f_add_tpc_ie_in_probe:1, 3473 scan_f_add_ds_ie_in_probe:1, 3474 scan_f_add_spoofed_mac_in_probe:1, 3475 scan_f_add_rand_seq_in_probe:1, 3476 scan_f_en_ie_whitelist_in_probe:1, 3477 scan_f_forced:1, 3478 scan_f_2ghz:1, 3479 scan_f_5ghz:1, 3480 scan_f_80mhz:1; 3481 enum scan_dwelltime_adaptive_mode adaptive_dwell_time_mode; 3482 u32 burst_duration; 3483 u32 num_chan; 3484 u32 num_bssid; 3485 u32 num_ssids; 3486 u32 n_probes; 3487 u32 *chan_list; 3488 u32 notify_scan_events; 3489 struct cfg80211_ssid ssid[WLAN_SCAN_MAX_NUM_SSID]; 3490 struct ath12k_wmi_mac_addr_params bssid_list[WLAN_SCAN_MAX_NUM_BSSID]; 3491 struct ath12k_wmi_element_info_arg extraie; 3492 u32 num_hint_s_ssid; 3493 u32 num_hint_bssid; 3494 struct ath12k_wmi_hint_short_ssid_arg hint_s_ssid[WLAN_SCAN_MAX_HINT_S_SSID]; 3495 struct ath12k_wmi_hint_bssid_arg hint_bssid[WLAN_SCAN_MAX_HINT_BSSID]; 3496 }; 3497 3498 struct wmi_ssid_arg { 3499 int len; 3500 const u8 *ssid; 3501 }; 3502 3503 struct wmi_bssid_arg { 3504 const u8 *bssid; 3505 }; 3506 3507 #define WMI_SCAN_STOP_ONE 0x00000000 3508 #define WMI_SCAN_STOP_VAP_ALL 0x01000000 3509 #define WMI_SCAN_STOP_ALL 0x04000000 3510 3511 /* Prefix 0xA000 indicates that the scan request 3512 * is trigger by HOST 3513 */ 3514 #define ATH12K_SCAN_ID 0xA000 3515 3516 enum scan_cancel_req_type { 3517 WLAN_SCAN_CANCEL_SINGLE = 1, 3518 WLAN_SCAN_CANCEL_VDEV_ALL, 3519 WLAN_SCAN_CANCEL_PDEV_ALL, 3520 }; 3521 3522 struct ath12k_wmi_scan_cancel_arg { 3523 u32 requester; 3524 u32 scan_id; 3525 enum scan_cancel_req_type req_type; 3526 u32 vdev_id; 3527 u32 pdev_id; 3528 }; 3529 3530 struct wmi_bcn_send_from_host_cmd { 3531 __le32 tlv_header; 3532 __le32 vdev_id; 3533 __le32 data_len; 3534 union { 3535 __le32 frag_ptr; 3536 __le32 frag_ptr_lo; 3537 }; 3538 __le32 frame_ctrl; 3539 __le32 dtim_flag; 3540 __le32 bcn_antenna; 3541 __le32 frag_ptr_hi; 3542 }; 3543 3544 #define WMI_CHAN_INFO_MODE GENMASK(5, 0) 3545 #define WMI_CHAN_INFO_HT40_PLUS BIT(6) 3546 #define WMI_CHAN_INFO_PASSIVE BIT(7) 3547 #define WMI_CHAN_INFO_ADHOC_ALLOWED BIT(8) 3548 #define WMI_CHAN_INFO_AP_DISABLED BIT(9) 3549 #define WMI_CHAN_INFO_DFS BIT(10) 3550 #define WMI_CHAN_INFO_ALLOW_HT BIT(11) 3551 #define WMI_CHAN_INFO_ALLOW_VHT BIT(12) 3552 #define WMI_CHAN_INFO_CHAN_CHANGE_CAUSE_CSA BIT(13) 3553 #define WMI_CHAN_INFO_HALF_RATE BIT(14) 3554 #define WMI_CHAN_INFO_QUARTER_RATE BIT(15) 3555 #define WMI_CHAN_INFO_DFS_FREQ2 BIT(16) 3556 #define WMI_CHAN_INFO_ALLOW_HE BIT(17) 3557 #define WMI_CHAN_INFO_PSC BIT(18) 3558 3559 #define WMI_CHAN_REG_INFO1_MIN_PWR GENMASK(7, 0) 3560 #define WMI_CHAN_REG_INFO1_MAX_PWR GENMASK(15, 8) 3561 #define WMI_CHAN_REG_INFO1_MAX_REG_PWR GENMASK(23, 16) 3562 #define WMI_CHAN_REG_INFO1_REG_CLS GENMASK(31, 24) 3563 3564 #define WMI_CHAN_REG_INFO2_ANT_MAX GENMASK(7, 0) 3565 #define WMI_CHAN_REG_INFO2_MAX_TX_PWR GENMASK(15, 8) 3566 3567 struct ath12k_wmi_channel_params { 3568 __le32 tlv_header; 3569 __le32 mhz; 3570 __le32 band_center_freq1; 3571 __le32 band_center_freq2; 3572 __le32 info; 3573 __le32 reg_info_1; 3574 __le32 reg_info_2; 3575 } __packed; 3576 3577 enum wmi_sta_ps_mode { 3578 WMI_STA_PS_MODE_DISABLED = 0, 3579 WMI_STA_PS_MODE_ENABLED = 1, 3580 }; 3581 3582 #define WMI_SMPS_MASK_LOWER_16BITS 0xFF 3583 #define WMI_SMPS_MASK_UPPER_3BITS 0x7 3584 #define WMI_SMPS_PARAM_VALUE_SHIFT 29 3585 3586 #define ATH12K_WMI_FW_HANG_ASSERT_TYPE 1 3587 #define ATH12K_WMI_FW_HANG_DELAY 0 3588 3589 /* type, 0:unused 1: ASSERT 2: not respond detect command 3590 * delay_time_ms, the simulate will delay time 3591 */ 3592 3593 struct wmi_force_fw_hang_cmd { 3594 __le32 tlv_header; 3595 __le32 type; 3596 __le32 delay_time_ms; 3597 } __packed; 3598 3599 struct wmi_vdev_set_param_cmd { 3600 __le32 tlv_header; 3601 __le32 vdev_id; 3602 __le32 param_id; 3603 __le32 param_value; 3604 } __packed; 3605 3606 struct wmi_get_pdev_temperature_cmd { 3607 __le32 tlv_header; 3608 __le32 param; 3609 __le32 pdev_id; 3610 } __packed; 3611 3612 #define WMI_P2P_MAX_NOA_DESCRIPTORS 4 3613 3614 struct wmi_p2p_noa_event { 3615 __le32 vdev_id; 3616 } __packed; 3617 3618 struct ath12k_wmi_p2p_noa_descriptor { 3619 __le32 type_count; /* 255: continuous schedule, 0: reserved */ 3620 __le32 duration; /* Absent period duration in micro seconds */ 3621 __le32 interval; /* Absent period interval in micro seconds */ 3622 __le32 start_time; /* 32 bit tsf time when in starts */ 3623 } __packed; 3624 3625 #define WMI_P2P_NOA_INFO_CHANGED_FLAG BIT(0) 3626 #define WMI_P2P_NOA_INFO_INDEX GENMASK(15, 8) 3627 #define WMI_P2P_NOA_INFO_OPP_PS BIT(16) 3628 #define WMI_P2P_NOA_INFO_CTWIN_TU GENMASK(23, 17) 3629 #define WMI_P2P_NOA_INFO_DESC_NUM GENMASK(31, 24) 3630 3631 struct ath12k_wmi_p2p_noa_info { 3632 /* Bit 0 - Flag to indicate an update in NOA schedule 3633 * Bits 7-1 - Reserved 3634 * Bits 15-8 - Index (identifies the instance of NOA sub element) 3635 * Bit 16 - Opp PS state of the AP 3636 * Bits 23-17 - Ctwindow in TUs 3637 * Bits 31-24 - Number of NOA descriptors 3638 */ 3639 __le32 noa_attr; 3640 struct ath12k_wmi_p2p_noa_descriptor descriptors[WMI_P2P_MAX_NOA_DESCRIPTORS]; 3641 } __packed; 3642 3643 #define MAX_WMI_UTF_LEN 252 3644 3645 struct ath12k_wmi_ftm_seg_hdr_params { 3646 __le32 len; 3647 __le32 msgref; 3648 __le32 segmentinfo; 3649 __le32 pdev_id; 3650 } __packed; 3651 3652 struct ath12k_wmi_ftm_cmd { 3653 __le32 tlv_header; 3654 struct ath12k_wmi_ftm_seg_hdr_params seg_hdr; 3655 u8 data[]; 3656 } __packed; 3657 3658 struct ath12k_wmi_ftm_event { 3659 struct ath12k_wmi_ftm_seg_hdr_params seg_hdr; 3660 u8 data[]; 3661 } __packed; 3662 3663 #define WMI_BEACON_TX_BUFFER_SIZE 512 3664 3665 #define WMI_EMA_BEACON_CNT GENMASK(7, 0) 3666 #define WMI_EMA_BEACON_IDX GENMASK(15, 8) 3667 #define WMI_EMA_BEACON_FIRST GENMASK(23, 16) 3668 #define WMI_EMA_BEACON_LAST GENMASK(31, 24) 3669 3670 struct ath12k_wmi_bcn_tmpl_ema_arg { 3671 u8 bcn_cnt; 3672 u8 bcn_index; 3673 }; 3674 3675 struct wmi_bcn_tmpl_cmd { 3676 __le32 tlv_header; 3677 __le32 vdev_id; 3678 __le32 tim_ie_offset; 3679 __le32 buf_len; 3680 __le32 csa_switch_count_offset; 3681 __le32 ext_csa_switch_count_offset; 3682 __le32 csa_event_bitmap; 3683 __le32 mbssid_ie_offset; 3684 __le32 esp_ie_offset; 3685 __le32 csc_switch_count_offset; 3686 __le32 csc_event_bitmap; 3687 __le32 mu_edca_ie_offset; 3688 __le32 feature_enable_bitmap; 3689 __le32 ema_params; 3690 } __packed; 3691 3692 struct wmi_p2p_go_set_beacon_ie_cmd { 3693 __le32 tlv_header; 3694 __le32 vdev_id; 3695 __le32 ie_buf_len; 3696 } __packed; 3697 3698 struct wmi_vdev_install_key_cmd { 3699 __le32 tlv_header; 3700 __le32 vdev_id; 3701 struct ath12k_wmi_mac_addr_params peer_macaddr; 3702 __le32 key_idx; 3703 __le32 key_flags; 3704 __le32 key_cipher; 3705 __le64 key_rsc_counter; 3706 __le64 key_global_rsc_counter; 3707 __le64 key_tsc_counter; 3708 u8 wpi_key_rsc_counter[16]; 3709 u8 wpi_key_tsc_counter[16]; 3710 __le32 key_len; 3711 __le32 key_txmic_len; 3712 __le32 key_rxmic_len; 3713 __le32 is_group_key_id_valid; 3714 __le32 group_key_id; 3715 3716 /* Followed by key_data containing key followed by 3717 * tx mic and then rx mic 3718 */ 3719 } __packed; 3720 3721 struct wmi_vdev_install_key_arg { 3722 u32 vdev_id; 3723 const u8 *macaddr; 3724 u32 key_idx; 3725 u32 key_flags; 3726 u32 key_cipher; 3727 u32 key_len; 3728 u32 key_txmic_len; 3729 u32 key_rxmic_len; 3730 u64 key_rsc_counter; 3731 const void *key_data; 3732 }; 3733 3734 #define WMI_MAX_SUPPORTED_RATES 128 3735 #define WMI_HOST_MAX_HECAP_PHY_SIZE 3 3736 #define WMI_HOST_MAX_HE_RATE_SET 3 3737 #define WMI_HECAP_TXRX_MCS_NSS_IDX_80 0 3738 #define WMI_HECAP_TXRX_MCS_NSS_IDX_160 1 3739 #define WMI_HECAP_TXRX_MCS_NSS_IDX_80_80 2 3740 3741 #define ATH12K_WMI_MLO_MAX_PARTNER_LINKS \ 3742 (ATH12K_WMI_MLO_MAX_LINKS + ATH12K_MAX_NUM_BRIDGE_LINKS - 1) 3743 3744 struct peer_assoc_mlo_params { 3745 bool enabled; 3746 bool assoc_link; 3747 bool primary_umac; 3748 bool peer_id_valid; 3749 bool logical_link_idx_valid; 3750 bool bridge_peer; 3751 u8 mld_addr[ETH_ALEN]; 3752 u32 logical_link_idx; 3753 u32 ml_peer_id; 3754 u32 ieee_link_id; 3755 u8 num_partner_links; 3756 struct wmi_ml_partner_info partner_info[ATH12K_WMI_MLO_MAX_LINKS]; 3757 }; 3758 3759 struct wmi_rate_set_arg { 3760 u32 num_rates; 3761 u8 rates[WMI_MAX_SUPPORTED_RATES]; 3762 }; 3763 3764 struct ath12k_wmi_peer_assoc_arg { 3765 u32 vdev_id; 3766 u32 peer_new_assoc; 3767 u32 peer_associd; 3768 u32 peer_flags; 3769 u32 peer_caps; 3770 u32 peer_listen_intval; 3771 u32 peer_ht_caps; 3772 u32 peer_max_mpdu; 3773 u32 peer_mpdu_density; 3774 u32 peer_rate_caps; 3775 u32 peer_nss; 3776 u32 peer_vht_caps; 3777 u32 peer_phymode; 3778 u32 peer_ht_info[2]; 3779 struct wmi_rate_set_arg peer_legacy_rates; 3780 struct wmi_rate_set_arg peer_ht_rates; 3781 u32 rx_max_rate; 3782 u32 rx_mcs_set; 3783 u32 tx_max_rate; 3784 u32 tx_mcs_set; 3785 u8 vht_capable; 3786 u8 min_data_rate; 3787 u32 tx_max_mcs_nss; 3788 u32 peer_bw_rxnss_override; 3789 bool is_pmf_enabled; 3790 bool is_wme_set; 3791 bool qos_flag; 3792 bool apsd_flag; 3793 bool ht_flag; 3794 bool bw_40; 3795 bool bw_80; 3796 bool bw_160; 3797 bool bw_320; 3798 bool stbc_flag; 3799 bool ldpc_flag; 3800 bool static_mimops_flag; 3801 bool dynamic_mimops_flag; 3802 bool spatial_mux_flag; 3803 bool vht_flag; 3804 bool vht_ng_flag; 3805 bool need_ptk_4_way; 3806 bool need_gtk_2_way; 3807 bool auth_flag; 3808 bool safe_mode_enabled; 3809 bool amsdu_disable; 3810 /* Use common structure */ 3811 u8 peer_mac[ETH_ALEN]; 3812 3813 bool he_flag; 3814 u32 peer_he_cap_macinfo[2]; 3815 u32 peer_he_cap_macinfo_internal; 3816 u32 peer_he_caps_6ghz; 3817 u32 peer_he_ops; 3818 u32 peer_he_cap_phyinfo[WMI_HOST_MAX_HECAP_PHY_SIZE]; 3819 u32 peer_he_mcs_count; 3820 u32 peer_he_rx_mcs_set[WMI_HOST_MAX_HE_RATE_SET]; 3821 u32 peer_he_tx_mcs_set[WMI_HOST_MAX_HE_RATE_SET]; 3822 bool twt_responder; 3823 bool twt_requester; 3824 struct ath12k_wmi_ppe_threshold_arg peer_ppet; 3825 bool eht_flag; 3826 u32 peer_eht_cap_mac[WMI_MAX_EHTCAP_MAC_SIZE]; 3827 u32 peer_eht_cap_phy[WMI_MAX_EHTCAP_PHY_SIZE]; 3828 u32 peer_eht_mcs_count; 3829 u32 peer_eht_rx_mcs_set[WMI_MAX_EHTCAP_RATE_SET]; 3830 u32 peer_eht_tx_mcs_set[WMI_MAX_EHTCAP_RATE_SET]; 3831 struct ath12k_wmi_ppe_threshold_arg peer_eht_ppet; 3832 u32 punct_bitmap; 3833 bool is_assoc; 3834 struct peer_assoc_mlo_params ml; 3835 }; 3836 3837 #define ATH12K_WMI_FLAG_MLO_ENABLED BIT(0) 3838 #define ATH12K_WMI_FLAG_MLO_ASSOC_LINK BIT(1) 3839 #define ATH12K_WMI_FLAG_MLO_PRIMARY_UMAC BIT(2) 3840 #define ATH12K_WMI_FLAG_MLO_LINK_ID_VALID BIT(3) 3841 #define ATH12K_WMI_FLAG_MLO_PEER_ID_VALID BIT(4) 3842 3843 struct wmi_peer_assoc_mlo_partner_info_params { 3844 __le32 tlv_header; 3845 __le32 vdev_id; 3846 __le32 hw_link_id; 3847 __le32 flags; 3848 __le32 logical_link_idx; 3849 } __packed; 3850 3851 struct wmi_peer_assoc_mlo_params { 3852 __le32 tlv_header; 3853 __le32 flags; 3854 struct ath12k_wmi_mac_addr_params mld_addr; 3855 __le32 logical_link_idx; 3856 __le32 ml_peer_id; 3857 __le32 ieee_link_id; 3858 __le32 emlsr_trans_timeout_us; 3859 __le32 emlsr_trans_delay_us; 3860 __le32 emlsr_padding_delay_us; 3861 } __packed; 3862 3863 struct wmi_peer_assoc_complete_cmd { 3864 __le32 tlv_header; 3865 struct ath12k_wmi_mac_addr_params peer_macaddr; 3866 __le32 vdev_id; 3867 __le32 peer_new_assoc; 3868 __le32 peer_associd; 3869 __le32 peer_flags; 3870 __le32 peer_caps; 3871 __le32 peer_listen_intval; 3872 __le32 peer_ht_caps; 3873 __le32 peer_max_mpdu; 3874 __le32 peer_mpdu_density; 3875 __le32 peer_rate_caps; 3876 __le32 peer_nss; 3877 __le32 peer_vht_caps; 3878 __le32 peer_phymode; 3879 __le32 peer_ht_info[2]; 3880 __le32 num_peer_legacy_rates; 3881 __le32 num_peer_ht_rates; 3882 __le32 peer_bw_rxnss_override; 3883 struct ath12k_wmi_ppe_threshold_params peer_ppet; 3884 __le32 peer_he_cap_info; 3885 __le32 peer_he_ops; 3886 __le32 peer_he_cap_phy[WMI_MAX_HECAP_PHY_SIZE]; 3887 __le32 peer_he_mcs; 3888 __le32 peer_he_cap_info_ext; 3889 __le32 peer_he_cap_info_internal; 3890 __le32 min_data_rate; 3891 __le32 peer_he_caps_6ghz; 3892 __le32 sta_type; 3893 __le32 bss_max_idle_option; 3894 __le32 auth_mode; 3895 __le32 peer_flags_ext; 3896 __le32 punct_bitmap; 3897 __le32 peer_eht_cap_mac[WMI_MAX_EHTCAP_MAC_SIZE]; 3898 __le32 peer_eht_cap_phy[WMI_MAX_EHTCAP_PHY_SIZE]; 3899 __le32 peer_eht_ops; 3900 struct ath12k_wmi_ppe_threshold_params peer_eht_ppet; 3901 } __packed; 3902 3903 struct wmi_stop_scan_cmd { 3904 __le32 tlv_header; 3905 __le32 requestor; 3906 __le32 scan_id; 3907 __le32 req_type; 3908 __le32 vdev_id; 3909 __le32 pdev_id; 3910 } __packed; 3911 3912 struct ath12k_wmi_scan_chan_list_arg { 3913 u32 pdev_id; 3914 u16 nallchans; 3915 struct ath12k_wmi_channel_arg channel[]; 3916 }; 3917 3918 struct wmi_scan_chan_list_cmd { 3919 __le32 tlv_header; 3920 __le32 num_scan_chans; 3921 __le32 flags; 3922 __le32 pdev_id; 3923 } __packed; 3924 3925 #define WMI_MGMT_SEND_DOWNLD_LEN 64 3926 3927 #define WMI_TX_PARAMS_DWORD0_POWER GENMASK(7, 0) 3928 #define WMI_TX_PARAMS_DWORD0_MCS_MASK GENMASK(19, 8) 3929 #define WMI_TX_PARAMS_DWORD0_NSS_MASK GENMASK(27, 20) 3930 #define WMI_TX_PARAMS_DWORD0_RETRY_LIMIT GENMASK(31, 28) 3931 3932 #define WMI_TX_PARAMS_DWORD1_CHAIN_MASK GENMASK(7, 0) 3933 #define WMI_TX_PARAMS_DWORD1_BW_MASK GENMASK(14, 8) 3934 #define WMI_TX_PARAMS_DWORD1_PREAMBLE_TYPE GENMASK(19, 15) 3935 #define WMI_TX_PARAMS_DWORD1_FRAME_TYPE BIT(20) 3936 #define WMI_TX_PARAMS_DWORD1_RSVD GENMASK(31, 21) 3937 3938 struct wmi_mgmt_send_cmd { 3939 __le32 tlv_header; 3940 __le32 vdev_id; 3941 __le32 desc_id; 3942 __le32 chanfreq; 3943 __le32 paddr_lo; 3944 __le32 paddr_hi; 3945 __le32 frame_len; 3946 __le32 buf_len; 3947 __le32 tx_params_valid; 3948 3949 /* This TLV is followed by struct wmi_mgmt_frame */ 3950 3951 /* Followed by struct wmi_mgmt_send_params */ 3952 } __packed; 3953 3954 struct wmi_sta_powersave_mode_cmd { 3955 __le32 tlv_header; 3956 __le32 vdev_id; 3957 __le32 sta_ps_mode; 3958 } __packed; 3959 3960 struct wmi_sta_smps_force_mode_cmd { 3961 __le32 tlv_header; 3962 __le32 vdev_id; 3963 __le32 forced_mode; 3964 } __packed; 3965 3966 struct wmi_sta_smps_param_cmd { 3967 __le32 tlv_header; 3968 __le32 vdev_id; 3969 __le32 param; 3970 __le32 value; 3971 } __packed; 3972 3973 struct ath12k_wmi_bcn_prb_info_params { 3974 __le32 tlv_header; 3975 __le32 caps; 3976 __le32 erp; 3977 } __packed; 3978 3979 enum { 3980 WMI_PDEV_SUSPEND, 3981 WMI_PDEV_SUSPEND_AND_DISABLE_INTR, 3982 }; 3983 3984 struct wmi_pdev_green_ap_ps_enable_cmd_param { 3985 __le32 tlv_header; 3986 __le32 pdev_id; 3987 __le32 enable; 3988 } __packed; 3989 3990 struct ath12k_wmi_ap_ps_arg { 3991 u32 vdev_id; 3992 u32 param; 3993 u32 value; 3994 }; 3995 3996 enum set_init_cc_type { 3997 WMI_COUNTRY_INFO_TYPE_ALPHA, 3998 WMI_COUNTRY_INFO_TYPE_COUNTRY_CODE, 3999 WMI_COUNTRY_INFO_TYPE_REGDOMAIN, 4000 }; 4001 4002 enum set_init_cc_flags { 4003 INVALID_CC, 4004 CC_IS_SET, 4005 REGDMN_IS_SET, 4006 ALPHA_IS_SET, 4007 }; 4008 4009 struct ath12k_wmi_init_country_arg { 4010 union { 4011 u16 country_code; 4012 u16 regdom_id; 4013 u8 alpha2[3]; 4014 } cc_info; 4015 enum set_init_cc_flags flags; 4016 }; 4017 4018 struct wmi_init_country_cmd { 4019 __le32 tlv_header; 4020 __le32 pdev_id; 4021 __le32 init_cc_type; 4022 union { 4023 __le32 country_code; 4024 __le32 regdom_id; 4025 __le32 alpha2; 4026 } cc_info; 4027 } __packed; 4028 4029 struct wmi_delba_send_cmd { 4030 __le32 tlv_header; 4031 __le32 vdev_id; 4032 struct ath12k_wmi_mac_addr_params peer_macaddr; 4033 __le32 tid; 4034 __le32 initiator; 4035 __le32 reasoncode; 4036 } __packed; 4037 4038 struct wmi_addba_setresponse_cmd { 4039 __le32 tlv_header; 4040 __le32 vdev_id; 4041 struct ath12k_wmi_mac_addr_params peer_macaddr; 4042 __le32 tid; 4043 __le32 statuscode; 4044 } __packed; 4045 4046 struct wmi_addba_send_cmd { 4047 __le32 tlv_header; 4048 __le32 vdev_id; 4049 struct ath12k_wmi_mac_addr_params peer_macaddr; 4050 __le32 tid; 4051 __le32 buffersize; 4052 } __packed; 4053 4054 struct wmi_addba_clear_resp_cmd { 4055 __le32 tlv_header; 4056 __le32 vdev_id; 4057 struct ath12k_wmi_mac_addr_params peer_macaddr; 4058 } __packed; 4059 4060 #define DFS_PHYERR_UNIT_TEST_CMD 0 4061 #define DFS_UNIT_TEST_MODULE 0x2b 4062 #define DFS_UNIT_TEST_TOKEN 0xAA 4063 4064 enum dfs_test_args_idx { 4065 DFS_TEST_CMDID = 0, 4066 DFS_TEST_PDEV_ID, 4067 DFS_TEST_RADAR_PARAM, 4068 DFS_MAX_TEST_ARGS, 4069 }; 4070 4071 struct wmi_dfs_unit_test_arg { 4072 u32 cmd_id; 4073 u32 pdev_id; 4074 u32 radar_param; 4075 }; 4076 4077 struct wmi_unit_test_cmd { 4078 __le32 tlv_header; 4079 __le32 vdev_id; 4080 __le32 module_id; 4081 __le32 num_args; 4082 __le32 diag_token; 4083 /* Followed by test args*/ 4084 } __packed; 4085 4086 #define MAX_SUPPORTED_RATES 128 4087 4088 struct ath12k_wmi_vht_rate_set_params { 4089 __le32 tlv_header; 4090 __le32 rx_max_rate; 4091 __le32 rx_mcs_set; 4092 __le32 tx_max_rate; 4093 __le32 tx_mcs_set; 4094 __le32 tx_max_mcs_nss; 4095 } __packed; 4096 4097 struct ath12k_wmi_he_rate_set_params { 4098 __le32 tlv_header; 4099 __le32 rx_mcs_set; 4100 __le32 tx_mcs_set; 4101 } __packed; 4102 4103 struct ath12k_wmi_eht_rate_set_params { 4104 __le32 tlv_header; 4105 __le32 rx_mcs_set; 4106 __le32 tx_mcs_set; 4107 } __packed; 4108 4109 #define MAX_REG_RULES 10 4110 #define REG_ALPHA2_LEN 2 4111 #define MAX_6G_REG_RULES 5 4112 4113 enum wmi_start_event_param { 4114 WMI_VDEV_START_RESP_EVENT = 0, 4115 WMI_VDEV_RESTART_RESP_EVENT, 4116 }; 4117 4118 struct wmi_vdev_start_resp_event { 4119 __le32 vdev_id; 4120 __le32 requestor_id; 4121 /* enum wmi_start_event_param */ 4122 __le32 resp_type; 4123 __le32 status; 4124 __le32 chain_mask; 4125 __le32 smps_mode; 4126 union { 4127 __le32 mac_id; 4128 __le32 pdev_id; 4129 }; 4130 __le32 cfgd_tx_streams; 4131 __le32 cfgd_rx_streams; 4132 } __packed; 4133 4134 /* VDEV start response status codes */ 4135 enum wmi_vdev_start_resp_status_code { 4136 WMI_VDEV_START_RESPONSE_STATUS_SUCCESS = 0, 4137 WMI_VDEV_START_RESPONSE_INVALID_VDEVID = 1, 4138 WMI_VDEV_START_RESPONSE_NOT_SUPPORTED = 2, 4139 WMI_VDEV_START_RESPONSE_DFS_VIOLATION = 3, 4140 WMI_VDEV_START_RESPONSE_INVALID_REGDOMAIN = 4, 4141 }; 4142 4143 enum wmi_reg_6g_ap_type { 4144 WMI_REG_INDOOR_AP = 0, 4145 WMI_REG_STD_POWER_AP = 1, 4146 WMI_REG_VLP_AP = 2, 4147 WMI_REG_CURRENT_MAX_AP_TYPE, 4148 WMI_REG_MAX_SUPP_AP_TYPE = WMI_REG_VLP_AP, 4149 WMI_REG_MAX_AP_TYPE = 7, 4150 }; 4151 4152 enum wmi_reg_6g_client_type { 4153 WMI_REG_DEFAULT_CLIENT = 0, 4154 WMI_REG_SUBORDINATE_CLIENT = 1, 4155 WMI_REG_MAX_CLIENT_TYPE = 2, 4156 }; 4157 4158 /* Regulatory Rule Flags Passed by FW */ 4159 #define REGULATORY_CHAN_DISABLED BIT(0) 4160 #define REGULATORY_CHAN_NO_IR BIT(1) 4161 #define REGULATORY_CHAN_RADAR BIT(3) 4162 #define REGULATORY_CHAN_NO_OFDM BIT(6) 4163 #define REGULATORY_CHAN_INDOOR_ONLY BIT(9) 4164 4165 #define REGULATORY_CHAN_NO_HT40 BIT(4) 4166 #define REGULATORY_CHAN_NO_80MHZ BIT(7) 4167 #define REGULATORY_CHAN_NO_160MHZ BIT(8) 4168 #define REGULATORY_CHAN_NO_20MHZ BIT(11) 4169 #define REGULATORY_CHAN_NO_10MHZ BIT(12) 4170 4171 enum { 4172 WMI_REG_SET_CC_STATUS_PASS = 0, 4173 WMI_REG_CURRENT_ALPHA2_NOT_FOUND = 1, 4174 WMI_REG_INIT_ALPHA2_NOT_FOUND = 2, 4175 WMI_REG_SET_CC_CHANGE_NOT_ALLOWED = 3, 4176 WMI_REG_SET_CC_STATUS_NO_MEMORY = 4, 4177 WMI_REG_SET_CC_STATUS_FAIL = 5, 4178 }; 4179 4180 #define WMI_REG_CLIENT_MAX 4 4181 4182 struct wmi_reg_chan_list_cc_ext_event { 4183 __le32 status_code; 4184 __le32 phy_id; 4185 __le32 alpha2; 4186 __le32 num_phy; 4187 __le32 country_id; 4188 __le32 domain_code; 4189 __le32 dfs_region; 4190 __le32 phybitmap; 4191 __le32 min_bw_2g; 4192 __le32 max_bw_2g; 4193 __le32 min_bw_5g; 4194 __le32 max_bw_5g; 4195 __le32 num_2g_reg_rules; 4196 __le32 num_5g_reg_rules; 4197 __le32 client_type; 4198 __le32 rnr_tpe_usable; 4199 __le32 unspecified_ap_usable; 4200 __le32 domain_code_6g_ap_lpi; 4201 __le32 domain_code_6g_ap_sp; 4202 __le32 domain_code_6g_ap_vlp; 4203 __le32 domain_code_6g_client_lpi[WMI_REG_CLIENT_MAX]; 4204 __le32 domain_code_6g_client_sp[WMI_REG_CLIENT_MAX]; 4205 __le32 domain_code_6g_client_vlp[WMI_REG_CLIENT_MAX]; 4206 __le32 domain_code_6g_super_id; 4207 __le32 min_bw_6g_ap_sp; 4208 __le32 max_bw_6g_ap_sp; 4209 __le32 min_bw_6g_ap_lpi; 4210 __le32 max_bw_6g_ap_lpi; 4211 __le32 min_bw_6g_ap_vlp; 4212 __le32 max_bw_6g_ap_vlp; 4213 __le32 min_bw_6g_client_sp[WMI_REG_CLIENT_MAX]; 4214 __le32 max_bw_6g_client_sp[WMI_REG_CLIENT_MAX]; 4215 __le32 min_bw_6g_client_lpi[WMI_REG_CLIENT_MAX]; 4216 __le32 max_bw_6g_client_lpi[WMI_REG_CLIENT_MAX]; 4217 __le32 min_bw_6g_client_vlp[WMI_REG_CLIENT_MAX]; 4218 __le32 max_bw_6g_client_vlp[WMI_REG_CLIENT_MAX]; 4219 __le32 num_6g_reg_rules_ap_sp; 4220 __le32 num_6g_reg_rules_ap_lpi; 4221 __le32 num_6g_reg_rules_ap_vlp; 4222 __le32 num_6g_reg_rules_cl_sp[WMI_REG_CLIENT_MAX]; 4223 __le32 num_6g_reg_rules_cl_lpi[WMI_REG_CLIENT_MAX]; 4224 __le32 num_6g_reg_rules_cl_vlp[WMI_REG_CLIENT_MAX]; 4225 } __packed; 4226 4227 struct ath12k_wmi_reg_rule_ext_params { 4228 __le32 tlv_header; 4229 __le32 freq_info; 4230 __le32 bw_pwr_info; 4231 __le32 flag_info; 4232 __le32 psd_power_info; 4233 } __packed; 4234 4235 struct wmi_vdev_delete_resp_event { 4236 __le32 vdev_id; 4237 } __packed; 4238 4239 struct wmi_peer_delete_resp_event { 4240 __le32 vdev_id; 4241 struct ath12k_wmi_mac_addr_params peer_macaddr; 4242 } __packed; 4243 4244 struct wmi_bcn_tx_status_event { 4245 __le32 vdev_id; 4246 __le32 tx_status; 4247 } __packed; 4248 4249 struct wmi_vdev_stopped_event { 4250 __le32 vdev_id; 4251 } __packed; 4252 4253 struct wmi_pdev_bss_chan_info_event { 4254 __le32 freq; /* Units in MHz */ 4255 __le32 noise_floor; /* units are dBm */ 4256 /* rx clear - how often the channel was unused */ 4257 __le32 rx_clear_count_low; 4258 __le32 rx_clear_count_high; 4259 /* cycle count - elapsed time during measured period, in clock ticks */ 4260 __le32 cycle_count_low; 4261 __le32 cycle_count_high; 4262 /* tx cycle count - elapsed time spent in tx, in clock ticks */ 4263 __le32 tx_cycle_count_low; 4264 __le32 tx_cycle_count_high; 4265 /* rx cycle count - elapsed time spent in rx, in clock ticks */ 4266 __le32 rx_cycle_count_low; 4267 __le32 rx_cycle_count_high; 4268 /*rx_cycle cnt for my bss in 64bits format */ 4269 __le32 rx_bss_cycle_count_low; 4270 __le32 rx_bss_cycle_count_high; 4271 __le32 pdev_id; 4272 } __packed; 4273 4274 #define WMI_VDEV_INSTALL_KEY_COMPL_STATUS_SUCCESS 0 4275 4276 struct wmi_vdev_install_key_compl_event { 4277 __le32 vdev_id; 4278 struct ath12k_wmi_mac_addr_params peer_macaddr; 4279 __le32 key_idx; 4280 __le32 key_flags; 4281 __le32 status; 4282 } __packed; 4283 4284 struct wmi_vdev_install_key_complete_arg { 4285 u32 vdev_id; 4286 const u8 *macaddr; 4287 u32 key_idx; 4288 u32 key_flags; 4289 u32 status; 4290 }; 4291 4292 struct wmi_peer_assoc_conf_event { 4293 __le32 vdev_id; 4294 struct ath12k_wmi_mac_addr_params peer_macaddr; 4295 } __packed; 4296 4297 struct wmi_peer_assoc_conf_arg { 4298 u32 vdev_id; 4299 const u8 *macaddr; 4300 }; 4301 4302 struct wmi_fils_discovery_event { 4303 __le32 vdev_id; 4304 __le32 fils_tt; 4305 __le32 tbtt; 4306 } __packed; 4307 4308 struct wmi_probe_resp_tx_status_event { 4309 __le32 vdev_id; 4310 __le32 tx_status; 4311 } __packed; 4312 4313 struct wmi_pdev_ctl_failsafe_chk_event { 4314 __le32 pdev_id; 4315 __le32 ctl_failsafe_status; 4316 } __packed; 4317 4318 struct ath12k_wmi_pdev_csa_event { 4319 __le32 pdev_id; 4320 __le32 current_switch_count; 4321 __le32 num_vdevs; 4322 } __packed; 4323 4324 struct ath12k_wmi_pdev_radar_event { 4325 __le32 pdev_id; 4326 __le32 detection_mode; 4327 __le32 chan_freq; 4328 __le32 chan_width; 4329 __le32 detector_id; 4330 __le32 segment_id; 4331 __le32 timestamp; 4332 __le32 is_chirp; 4333 a_sle32 freq_offset; 4334 a_sle32 sidx; 4335 } __packed; 4336 4337 struct wmi_pdev_temperature_event { 4338 /* temperature value in Celsius degree */ 4339 a_sle32 temp; 4340 __le32 pdev_id; 4341 } __packed; 4342 4343 #define WMI_RX_STATUS_OK 0x00 4344 #define WMI_RX_STATUS_ERR_CRC 0x01 4345 #define WMI_RX_STATUS_ERR_DECRYPT 0x08 4346 #define WMI_RX_STATUS_ERR_MIC 0x10 4347 #define WMI_RX_STATUS_ERR_KEY_CACHE_MISS 0x20 4348 4349 #define WLAN_MGMT_TXRX_HOST_MAX_ANTENNA 4 4350 4351 struct ath12k_wmi_mgmt_rx_arg { 4352 u32 chan_freq; 4353 u32 channel; 4354 u32 snr; 4355 u8 rssi_ctl[WLAN_MGMT_TXRX_HOST_MAX_ANTENNA]; 4356 u32 rate; 4357 enum wmi_phy_mode phy_mode; 4358 u32 buf_len; 4359 int status; 4360 u32 flags; 4361 int rssi; 4362 u32 tsf_delta; 4363 u8 pdev_id; 4364 }; 4365 4366 #define ATH_MAX_ANTENNA 4 4367 4368 struct ath12k_wmi_mgmt_rx_params { 4369 __le32 channel; 4370 __le32 snr; 4371 __le32 rate; 4372 __le32 phy_mode; 4373 __le32 buf_len; 4374 __le32 status; 4375 __le32 rssi_ctl[ATH_MAX_ANTENNA]; 4376 __le32 flags; 4377 a_sle32 rssi; 4378 __le32 tsf_delta; 4379 __le32 rx_tsf_l32; 4380 __le32 rx_tsf_u32; 4381 __le32 pdev_id; 4382 __le32 chan_freq; 4383 } __packed; 4384 4385 #define MAX_ANTENNA_EIGHT 8 4386 4387 struct wmi_mgmt_tx_compl_event { 4388 __le32 desc_id; 4389 __le32 status; 4390 __le32 pdev_id; 4391 } __packed; 4392 4393 struct wmi_scan_event { 4394 __le32 event_type; /* %WMI_SCAN_EVENT_ */ 4395 __le32 reason; /* %WMI_SCAN_REASON_ */ 4396 __le32 channel_freq; /* only valid for WMI_SCAN_EVENT_FOREIGN_CHANNEL */ 4397 __le32 scan_req_id; 4398 __le32 scan_id; 4399 __le32 vdev_id; 4400 /* TSF Timestamp when the scan event (%WMI_SCAN_EVENT_) is completed 4401 * In case of AP it is TSF of the AP vdev 4402 * In case of STA connected state, this is the TSF of the AP 4403 * In case of STA not connected, it will be the free running HW timer 4404 */ 4405 __le32 tsf_timestamp; 4406 } __packed; 4407 4408 struct wmi_peer_sta_kickout_arg { 4409 const u8 *mac_addr; 4410 }; 4411 4412 struct wmi_peer_sta_kickout_event { 4413 struct ath12k_wmi_mac_addr_params peer_macaddr; 4414 } __packed; 4415 4416 #define WMI_ROAM_REASON_MASK GENMASK(3, 0) 4417 #define WMI_ROAM_SUBNET_STATUS_MASK GENMASK(5, 4) 4418 4419 enum wmi_roam_reason { 4420 WMI_ROAM_REASON_BETTER_AP = 1, 4421 WMI_ROAM_REASON_BEACON_MISS = 2, 4422 WMI_ROAM_REASON_LOW_RSSI = 3, 4423 WMI_ROAM_REASON_SUITABLE_AP_FOUND = 4, 4424 WMI_ROAM_REASON_HO_FAILED = 5, 4425 4426 /* keep last */ 4427 WMI_ROAM_REASON_MAX, 4428 }; 4429 4430 struct wmi_roam_event { 4431 __le32 vdev_id; 4432 __le32 reason; 4433 __le32 rssi; 4434 } __packed; 4435 4436 #define WMI_CHAN_INFO_START_RESP 0 4437 #define WMI_CHAN_INFO_END_RESP 1 4438 4439 struct wmi_chan_info_event { 4440 __le32 err_code; 4441 __le32 freq; 4442 __le32 cmd_flags; 4443 __le32 noise_floor; 4444 __le32 rx_clear_count; 4445 __le32 cycle_count; 4446 __le32 chan_tx_pwr_range; 4447 __le32 chan_tx_pwr_tp; 4448 __le32 rx_frame_count; 4449 __le32 my_bss_rx_cycle_count; 4450 __le32 rx_11b_mode_data_duration; 4451 __le32 tx_frame_cnt; 4452 __le32 mac_clk_mhz; 4453 __le32 vdev_id; 4454 } __packed; 4455 4456 struct ath12k_wmi_target_cap_arg { 4457 u32 phy_capability; 4458 u32 max_frag_entry; 4459 u32 num_rf_chains; 4460 u32 ht_cap_info; 4461 u32 vht_cap_info; 4462 u32 vht_supp_mcs; 4463 u32 hw_min_tx_power; 4464 u32 hw_max_tx_power; 4465 u32 sys_cap_info; 4466 u32 min_pkt_size_enable; 4467 u32 max_bcn_ie_size; 4468 u32 max_num_scan_channels; 4469 u32 max_supported_macs; 4470 u32 wmi_fw_sub_feat_caps; 4471 u32 txrx_chainmask; 4472 u32 default_dbs_hw_mode_index; 4473 u32 num_msdu_desc; 4474 }; 4475 4476 enum wmi_vdev_type { 4477 WMI_VDEV_TYPE_AP = 1, 4478 WMI_VDEV_TYPE_STA = 2, 4479 WMI_VDEV_TYPE_IBSS = 3, 4480 WMI_VDEV_TYPE_MONITOR = 4, 4481 }; 4482 4483 enum wmi_vdev_subtype { 4484 WMI_VDEV_SUBTYPE_NONE, 4485 WMI_VDEV_SUBTYPE_P2P_DEVICE, 4486 WMI_VDEV_SUBTYPE_P2P_CLIENT, 4487 WMI_VDEV_SUBTYPE_P2P_GO, 4488 WMI_VDEV_SUBTYPE_PROXY_STA, 4489 WMI_VDEV_SUBTYPE_MESH_NON_11S, 4490 WMI_VDEV_SUBTYPE_MESH_11S, 4491 }; 4492 4493 enum wmi_sta_powersave_param { 4494 WMI_STA_PS_PARAM_RX_WAKE_POLICY = 0, 4495 WMI_STA_PS_PARAM_TX_WAKE_THRESHOLD = 1, 4496 WMI_STA_PS_PARAM_PSPOLL_COUNT = 2, 4497 WMI_STA_PS_PARAM_INACTIVITY_TIME = 3, 4498 WMI_STA_PS_PARAM_UAPSD = 4, 4499 }; 4500 4501 enum wmi_sta_ps_param_uapsd { 4502 WMI_STA_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0), 4503 WMI_STA_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1), 4504 WMI_STA_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2), 4505 WMI_STA_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3), 4506 WMI_STA_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4), 4507 WMI_STA_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5), 4508 WMI_STA_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6), 4509 WMI_STA_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7), 4510 }; 4511 4512 enum wmi_sta_ps_param_tx_wake_threshold { 4513 WMI_STA_PS_TX_WAKE_THRESHOLD_NEVER = 0, 4514 WMI_STA_PS_TX_WAKE_THRESHOLD_ALWAYS = 1, 4515 4516 /* Values greater than one indicate that many TX attempts per beacon 4517 * interval before the STA will wake up 4518 */ 4519 }; 4520 4521 /* The maximum number of PS-Poll frames the FW will send in response to 4522 * traffic advertised in TIM before waking up (by sending a null frame with PS 4523 * = 0). Value 0 has a special meaning: there is no maximum count and the FW 4524 * will send as many PS-Poll as are necessary to retrieve buffered BU. This 4525 * parameter is used when the RX wake policy is 4526 * WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD and ignored when the RX wake 4527 * policy is WMI_STA_PS_RX_WAKE_POLICY_WAKE. 4528 */ 4529 enum wmi_sta_ps_param_pspoll_count { 4530 WMI_STA_PS_PSPOLL_COUNT_NO_MAX = 0, 4531 /* Values greater than 0 indicate the maximum number of PS-Poll frames 4532 * FW will send before waking up. 4533 */ 4534 }; 4535 4536 /* U-APSD configuration of peer station from (re)assoc request and TSPECs */ 4537 enum wmi_ap_ps_param_uapsd { 4538 WMI_AP_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0), 4539 WMI_AP_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1), 4540 WMI_AP_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2), 4541 WMI_AP_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3), 4542 WMI_AP_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4), 4543 WMI_AP_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5), 4544 WMI_AP_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6), 4545 WMI_AP_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7), 4546 }; 4547 4548 /* U-APSD maximum service period of peer station */ 4549 enum wmi_ap_ps_peer_param_max_sp { 4550 WMI_AP_PS_PEER_PARAM_MAX_SP_UNLIMITED = 0, 4551 WMI_AP_PS_PEER_PARAM_MAX_SP_2 = 1, 4552 WMI_AP_PS_PEER_PARAM_MAX_SP_4 = 2, 4553 WMI_AP_PS_PEER_PARAM_MAX_SP_6 = 3, 4554 MAX_WMI_AP_PS_PEER_PARAM_MAX_SP, 4555 }; 4556 4557 enum wmi_ap_ps_peer_param { 4558 /** Set uapsd configuration for a given peer. 4559 * 4560 * This include the delivery and trigger enabled state for each AC. 4561 * The host MLME needs to set this based on AP capability and stations 4562 * request Set in the association request received from the station. 4563 * 4564 * Lower 8 bits of the value specify the UAPSD configuration. 4565 * 4566 * (see enum wmi_ap_ps_param_uapsd) 4567 * The default value is 0. 4568 */ 4569 WMI_AP_PS_PEER_PARAM_UAPSD = 0, 4570 4571 /** 4572 * Set the service period for a UAPSD capable station 4573 * 4574 * The service period from wme ie in the (re)assoc request frame. 4575 * 4576 * (see enum wmi_ap_ps_peer_param_max_sp) 4577 */ 4578 WMI_AP_PS_PEER_PARAM_MAX_SP = 1, 4579 4580 /** Time in seconds for aging out buffered frames 4581 * for STA in power save 4582 */ 4583 WMI_AP_PS_PEER_PARAM_AGEOUT_TIME = 2, 4584 4585 /** Specify frame types that are considered SIFS 4586 * RESP trigger frame 4587 */ 4588 WMI_AP_PS_PEER_PARAM_SIFS_RESP_FRMTYPE = 3, 4589 4590 /** Specifies the trigger state of TID. 4591 * Valid only for UAPSD frame type 4592 */ 4593 WMI_AP_PS_PEER_PARAM_SIFS_RESP_UAPSD = 4, 4594 4595 /* Specifies the WNM sleep state of a STA */ 4596 WMI_AP_PS_PEER_PARAM_WNM_SLEEP = 5, 4597 }; 4598 4599 #define DISABLE_SIFS_RESPONSE_TRIGGER 0 4600 4601 #define WMI_MAX_KEY_INDEX 3 4602 #define WMI_MAX_KEY_LEN 32 4603 4604 enum wmi_key_type { 4605 WMI_KEY_PAIRWISE = 0, 4606 WMI_KEY_GROUP = 1, 4607 }; 4608 4609 enum wmi_cipher_type { 4610 WMI_CIPHER_NONE = 0, /* clear key */ 4611 WMI_CIPHER_WEP = 1, 4612 WMI_CIPHER_TKIP = 2, 4613 WMI_CIPHER_AES_OCB = 3, 4614 WMI_CIPHER_AES_CCM = 4, 4615 WMI_CIPHER_WAPI = 5, 4616 WMI_CIPHER_CKIP = 6, 4617 WMI_CIPHER_AES_CMAC = 7, 4618 WMI_CIPHER_ANY = 8, 4619 WMI_CIPHER_AES_GCM = 9, 4620 WMI_CIPHER_AES_GMAC = 10, 4621 }; 4622 4623 /* Value to disable fixed rate setting */ 4624 #define WMI_FIXED_RATE_NONE (0xffff) 4625 4626 #define ATH12K_RC_VERSION_OFFSET 28 4627 #define ATH12K_RC_PREAMBLE_OFFSET 8 4628 #define ATH12K_RC_NSS_OFFSET 5 4629 4630 #define ATH12K_HW_RATE_CODE(rate, nss, preamble) \ 4631 ((1 << ATH12K_RC_VERSION_OFFSET) | \ 4632 ((nss) << ATH12K_RC_NSS_OFFSET) | \ 4633 ((preamble) << ATH12K_RC_PREAMBLE_OFFSET) | \ 4634 (rate)) 4635 4636 /* Preamble types to be used with VDEV fixed rate configuration */ 4637 enum wmi_rate_preamble { 4638 WMI_RATE_PREAMBLE_OFDM, 4639 WMI_RATE_PREAMBLE_CCK, 4640 WMI_RATE_PREAMBLE_HT, 4641 WMI_RATE_PREAMBLE_VHT, 4642 WMI_RATE_PREAMBLE_HE, 4643 WMI_RATE_PREAMBLE_EHT, 4644 }; 4645 4646 /** 4647 * enum wmi_rtscts_prot_mode - Enable/Disable RTS/CTS and CTS2Self Protection. 4648 * @WMI_RTS_CTS_DISABLED: RTS/CTS protection is disabled. 4649 * @WMI_USE_RTS_CTS: RTS/CTS Enabled. 4650 * @WMI_USE_CTS2SELF: CTS to self protection Enabled. 4651 */ 4652 enum wmi_rtscts_prot_mode { 4653 WMI_RTS_CTS_DISABLED = 0, 4654 WMI_USE_RTS_CTS = 1, 4655 WMI_USE_CTS2SELF = 2, 4656 }; 4657 4658 /** 4659 * enum wmi_rtscts_profile - Selection of RTS CTS profile along with enabling 4660 * protection mode. 4661 * @WMI_RTSCTS_FOR_NO_RATESERIES: Neither of rate-series should use RTS-CTS 4662 * @WMI_RTSCTS_FOR_SECOND_RATESERIES: Only second rate-series will use RTS-CTS 4663 * @WMI_RTSCTS_ACROSS_SW_RETRIES: Only the second rate-series will use RTS-CTS, 4664 * but if there's a sw retry, both the rate 4665 * series will use RTS-CTS. 4666 * @WMI_RTSCTS_ERP: RTS/CTS used for ERP protection for every PPDU. 4667 * @WMI_RTSCTS_FOR_ALL_RATESERIES: Enable RTS-CTS for all rate series. 4668 */ 4669 enum wmi_rtscts_profile { 4670 WMI_RTSCTS_FOR_NO_RATESERIES = 0, 4671 WMI_RTSCTS_FOR_SECOND_RATESERIES = 1, 4672 WMI_RTSCTS_ACROSS_SW_RETRIES = 2, 4673 WMI_RTSCTS_ERP = 3, 4674 WMI_RTSCTS_FOR_ALL_RATESERIES = 4, 4675 }; 4676 4677 #define WMI_SKB_HEADROOM sizeof(struct wmi_cmd_hdr) 4678 4679 enum wmi_sta_ps_param_rx_wake_policy { 4680 WMI_STA_PS_RX_WAKE_POLICY_WAKE = 0, 4681 WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD = 1, 4682 }; 4683 4684 /* Do not change existing values! Used by ath12k_frame_mode parameter 4685 * module parameter. 4686 */ 4687 enum ath12k_hw_txrx_mode { 4688 ATH12K_HW_TXRX_RAW = 0, 4689 ATH12K_HW_TXRX_NATIVE_WIFI = 1, 4690 ATH12K_HW_TXRX_ETHERNET = 2, 4691 }; 4692 4693 struct wmi_wmm_params { 4694 __le32 tlv_header; 4695 __le32 cwmin; 4696 __le32 cwmax; 4697 __le32 aifs; 4698 __le32 txoplimit; 4699 __le32 acm; 4700 __le32 no_ack; 4701 } __packed; 4702 4703 struct wmi_wmm_params_arg { 4704 u8 acm; 4705 u8 aifs; 4706 u16 cwmin; 4707 u16 cwmax; 4708 u16 txop; 4709 u8 no_ack; 4710 }; 4711 4712 struct wmi_vdev_set_wmm_params_cmd { 4713 __le32 tlv_header; 4714 __le32 vdev_id; 4715 struct wmi_wmm_params wmm_params[4]; 4716 __le32 wmm_param_type; 4717 } __packed; 4718 4719 struct wmi_wmm_params_all_arg { 4720 struct wmi_wmm_params_arg ac_be; 4721 struct wmi_wmm_params_arg ac_bk; 4722 struct wmi_wmm_params_arg ac_vi; 4723 struct wmi_wmm_params_arg ac_vo; 4724 }; 4725 4726 #define ATH12K_TWT_DEF_STA_CONG_TIMER_MS 5000 4727 #define ATH12K_TWT_DEF_DEFAULT_SLOT_SIZE 10 4728 #define ATH12K_TWT_DEF_CONGESTION_THRESH_SETUP 50 4729 #define ATH12K_TWT_DEF_CONGESTION_THRESH_TEARDOWN 20 4730 #define ATH12K_TWT_DEF_CONGESTION_THRESH_CRITICAL 100 4731 #define ATH12K_TWT_DEF_INTERFERENCE_THRESH_TEARDOWN 80 4732 #define ATH12K_TWT_DEF_INTERFERENCE_THRESH_SETUP 50 4733 #define ATH12K_TWT_DEF_MIN_NO_STA_SETUP 10 4734 #define ATH12K_TWT_DEF_MIN_NO_STA_TEARDOWN 2 4735 #define ATH12K_TWT_DEF_NO_OF_BCAST_MCAST_SLOTS 2 4736 #define ATH12K_TWT_DEF_MIN_NO_TWT_SLOTS 2 4737 #define ATH12K_TWT_DEF_MAX_NO_STA_TWT 500 4738 #define ATH12K_TWT_DEF_MODE_CHECK_INTERVAL 10000 4739 #define ATH12K_TWT_DEF_ADD_STA_SLOT_INTERVAL 1000 4740 #define ATH12K_TWT_DEF_REMOVE_STA_SLOT_INTERVAL 5000 4741 4742 struct wmi_twt_enable_params_cmd { 4743 __le32 tlv_header; 4744 __le32 pdev_id; 4745 __le32 sta_cong_timer_ms; 4746 __le32 mbss_support; 4747 __le32 default_slot_size; 4748 __le32 congestion_thresh_setup; 4749 __le32 congestion_thresh_teardown; 4750 __le32 congestion_thresh_critical; 4751 __le32 interference_thresh_teardown; 4752 __le32 interference_thresh_setup; 4753 __le32 min_no_sta_setup; 4754 __le32 min_no_sta_teardown; 4755 __le32 no_of_bcast_mcast_slots; 4756 __le32 min_no_twt_slots; 4757 __le32 max_no_sta_twt; 4758 __le32 mode_check_interval; 4759 __le32 add_sta_slot_interval; 4760 __le32 remove_sta_slot_interval; 4761 } __packed; 4762 4763 struct wmi_twt_disable_params_cmd { 4764 __le32 tlv_header; 4765 __le32 pdev_id; 4766 } __packed; 4767 4768 struct wmi_obss_spatial_reuse_params_cmd { 4769 __le32 tlv_header; 4770 __le32 pdev_id; 4771 __le32 enable; 4772 a_sle32 obss_min; 4773 a_sle32 obss_max; 4774 __le32 vdev_id; 4775 } __packed; 4776 4777 #define ATH12K_BSS_COLOR_COLLISION_SCAN_PERIOD_MS 200 4778 #define ATH12K_OBSS_COLOR_COLLISION_DETECTION_DISABLE 0 4779 #define ATH12K_OBSS_COLOR_COLLISION_DETECTION 1 4780 4781 #define ATH12K_BSS_COLOR_STA_PERIODS 10000 4782 #define ATH12K_BSS_COLOR_AP_PERIODS 5000 4783 4784 struct wmi_obss_color_collision_cfg_params_cmd { 4785 __le32 tlv_header; 4786 __le32 vdev_id; 4787 __le32 flags; 4788 __le32 evt_type; 4789 __le32 current_bss_color; 4790 __le32 detection_period_ms; 4791 __le32 scan_period_ms; 4792 __le32 free_slot_expiry_time_ms; 4793 } __packed; 4794 4795 struct wmi_bss_color_change_enable_params_cmd { 4796 __le32 tlv_header; 4797 __le32 vdev_id; 4798 __le32 enable; 4799 } __packed; 4800 4801 #define ATH12K_IPV4_TH_SEED_SIZE 5 4802 #define ATH12K_IPV6_TH_SEED_SIZE 11 4803 4804 struct ath12k_wmi_pdev_lro_config_cmd { 4805 __le32 tlv_header; 4806 __le32 lro_enable; 4807 __le32 res; 4808 u32 th_4[ATH12K_IPV4_TH_SEED_SIZE]; 4809 u32 th_6[ATH12K_IPV6_TH_SEED_SIZE]; 4810 __le32 pdev_id; 4811 } __packed; 4812 4813 #define ATH12K_WMI_SPECTRAL_COUNT_DEFAULT 0 4814 #define ATH12K_WMI_SPECTRAL_PERIOD_DEFAULT 224 4815 #define ATH12K_WMI_SPECTRAL_PRIORITY_DEFAULT 1 4816 #define ATH12K_WMI_SPECTRAL_FFT_SIZE_DEFAULT 7 4817 #define ATH12K_WMI_SPECTRAL_GC_ENA_DEFAULT 1 4818 #define ATH12K_WMI_SPECTRAL_RESTART_ENA_DEFAULT 0 4819 #define ATH12K_WMI_SPECTRAL_NOISE_FLOOR_REF_DEFAULT -96 4820 #define ATH12K_WMI_SPECTRAL_INIT_DELAY_DEFAULT 80 4821 #define ATH12K_WMI_SPECTRAL_NB_TONE_THR_DEFAULT 12 4822 #define ATH12K_WMI_SPECTRAL_STR_BIN_THR_DEFAULT 8 4823 #define ATH12K_WMI_SPECTRAL_WB_RPT_MODE_DEFAULT 0 4824 #define ATH12K_WMI_SPECTRAL_RSSI_RPT_MODE_DEFAULT 0 4825 #define ATH12K_WMI_SPECTRAL_RSSI_THR_DEFAULT 0xf0 4826 #define ATH12K_WMI_SPECTRAL_PWR_FORMAT_DEFAULT 0 4827 #define ATH12K_WMI_SPECTRAL_RPT_MODE_DEFAULT 2 4828 #define ATH12K_WMI_SPECTRAL_BIN_SCALE_DEFAULT 1 4829 #define ATH12K_WMI_SPECTRAL_DBM_ADJ_DEFAULT 1 4830 #define ATH12K_WMI_SPECTRAL_CHN_MASK_DEFAULT 1 4831 4832 struct ath12k_wmi_vdev_spectral_conf_arg { 4833 u32 vdev_id; 4834 u32 scan_count; 4835 u32 scan_period; 4836 u32 scan_priority; 4837 u32 scan_fft_size; 4838 u32 scan_gc_ena; 4839 u32 scan_restart_ena; 4840 u32 scan_noise_floor_ref; 4841 u32 scan_init_delay; 4842 u32 scan_nb_tone_thr; 4843 u32 scan_str_bin_thr; 4844 u32 scan_wb_rpt_mode; 4845 u32 scan_rssi_rpt_mode; 4846 u32 scan_rssi_thr; 4847 u32 scan_pwr_format; 4848 u32 scan_rpt_mode; 4849 u32 scan_bin_scale; 4850 u32 scan_dbm_adj; 4851 u32 scan_chn_mask; 4852 }; 4853 4854 struct ath12k_wmi_vdev_spectral_conf_cmd { 4855 __le32 tlv_header; 4856 __le32 vdev_id; 4857 __le32 scan_count; 4858 __le32 scan_period; 4859 __le32 scan_priority; 4860 __le32 scan_fft_size; 4861 __le32 scan_gc_ena; 4862 __le32 scan_restart_ena; 4863 __le32 scan_noise_floor_ref; 4864 __le32 scan_init_delay; 4865 __le32 scan_nb_tone_thr; 4866 __le32 scan_str_bin_thr; 4867 __le32 scan_wb_rpt_mode; 4868 __le32 scan_rssi_rpt_mode; 4869 __le32 scan_rssi_thr; 4870 __le32 scan_pwr_format; 4871 __le32 scan_rpt_mode; 4872 __le32 scan_bin_scale; 4873 __le32 scan_dbm_adj; 4874 __le32 scan_chn_mask; 4875 } __packed; 4876 4877 #define ATH12K_WMI_SPECTRAL_TRIGGER_CMD_TRIGGER 1 4878 #define ATH12K_WMI_SPECTRAL_TRIGGER_CMD_CLEAR 2 4879 #define ATH12K_WMI_SPECTRAL_ENABLE_CMD_ENABLE 1 4880 #define ATH12K_WMI_SPECTRAL_ENABLE_CMD_DISABLE 2 4881 4882 struct ath12k_wmi_vdev_spectral_enable_cmd { 4883 __le32 tlv_header; 4884 __le32 vdev_id; 4885 __le32 trigger_cmd; 4886 __le32 enable_cmd; 4887 } __packed; 4888 4889 struct ath12k_wmi_pdev_dma_ring_cfg_arg { 4890 u32 tlv_header; 4891 u32 pdev_id; 4892 u32 module_id; 4893 u32 base_paddr_lo; 4894 u32 base_paddr_hi; 4895 u32 head_idx_paddr_lo; 4896 u32 head_idx_paddr_hi; 4897 u32 tail_idx_paddr_lo; 4898 u32 tail_idx_paddr_hi; 4899 u32 num_elems; 4900 u32 buf_size; 4901 u32 num_resp_per_event; 4902 u32 event_timeout_ms; 4903 }; 4904 4905 struct ath12k_wmi_pdev_dma_ring_cfg_req_cmd { 4906 __le32 tlv_header; 4907 __le32 pdev_id; 4908 __le32 module_id; /* see enum wmi_direct_buffer_module */ 4909 __le32 base_paddr_lo; 4910 __le32 base_paddr_hi; 4911 __le32 head_idx_paddr_lo; 4912 __le32 head_idx_paddr_hi; 4913 __le32 tail_idx_paddr_lo; 4914 __le32 tail_idx_paddr_hi; 4915 __le32 num_elems; /* Number of elems in the ring */ 4916 __le32 buf_size; /* size of allocated buffer in bytes */ 4917 4918 /* Number of wmi_dma_buf_release_entry packed together */ 4919 __le32 num_resp_per_event; 4920 4921 /* Target should timeout and send whatever resp 4922 * it has if this time expires, units in milliseconds 4923 */ 4924 __le32 event_timeout_ms; 4925 } __packed; 4926 4927 struct ath12k_wmi_dma_buf_release_fixed_params { 4928 __le32 pdev_id; 4929 __le32 module_id; 4930 __le32 num_buf_release_entry; 4931 __le32 num_meta_data_entry; 4932 } __packed; 4933 4934 struct ath12k_wmi_dma_buf_release_entry_params { 4935 __le32 tlv_header; 4936 __le32 paddr_lo; 4937 4938 /* Bits 11:0: address of data 4939 * Bits 31:12: host context data 4940 */ 4941 __le32 paddr_hi; 4942 } __packed; 4943 4944 #define WMI_SPECTRAL_META_INFO1_FREQ1 GENMASK(15, 0) 4945 #define WMI_SPECTRAL_META_INFO1_FREQ2 GENMASK(31, 16) 4946 4947 #define WMI_SPECTRAL_META_INFO2_CHN_WIDTH GENMASK(7, 0) 4948 4949 struct ath12k_wmi_dma_buf_release_meta_data_params { 4950 __le32 tlv_header; 4951 a_sle32 noise_floor[WMI_MAX_CHAINS]; 4952 __le32 reset_delay; 4953 __le32 freq1; 4954 __le32 freq2; 4955 __le32 ch_width; 4956 } __packed; 4957 4958 enum wmi_fils_discovery_cmd_type { 4959 WMI_FILS_DISCOVERY_CMD, 4960 WMI_UNSOL_BCAST_PROBE_RESP, 4961 }; 4962 4963 struct wmi_fils_discovery_cmd { 4964 __le32 tlv_header; 4965 __le32 vdev_id; 4966 __le32 interval; 4967 __le32 config; /* enum wmi_fils_discovery_cmd_type */ 4968 } __packed; 4969 4970 struct wmi_fils_discovery_tmpl_cmd { 4971 __le32 tlv_header; 4972 __le32 vdev_id; 4973 __le32 buf_len; 4974 } __packed; 4975 4976 struct wmi_probe_tmpl_cmd { 4977 __le32 tlv_header; 4978 __le32 vdev_id; 4979 __le32 buf_len; 4980 } __packed; 4981 4982 #define MAX_RADIOS 2 4983 4984 #define WMI_MLO_CMD_TIMEOUT_HZ (5 * HZ) 4985 #define WMI_SERVICE_READY_TIMEOUT_HZ (5 * HZ) 4986 #define WMI_SEND_TIMEOUT_HZ (3 * HZ) 4987 4988 struct ath12k_wmi_pdev { 4989 struct ath12k_wmi_base *wmi_ab; 4990 enum ath12k_htc_ep_id eid; 4991 u32 rx_decap_mode; 4992 }; 4993 4994 struct ath12k_wmi_base { 4995 struct ath12k_base *ab; 4996 struct ath12k_wmi_pdev wmi[MAX_RADIOS]; 4997 enum ath12k_htc_ep_id wmi_endpoint_id[MAX_RADIOS]; 4998 u32 max_msg_len[MAX_RADIOS]; 4999 5000 struct completion service_ready; 5001 struct completion unified_ready; 5002 DECLARE_BITMAP(svc_map, WMI_MAX_EXT2_SERVICE); 5003 wait_queue_head_t tx_credits_wq; 5004 u32 num_mem_chunks; 5005 u32 rx_decap_mode; 5006 struct ath12k_wmi_host_mem_chunk_arg mem_chunks[WMI_MAX_MEM_REQS]; 5007 5008 enum wmi_host_hw_mode_config_type preferred_hw_mode; 5009 5010 struct ath12k_wmi_target_cap_arg *targ_cap; 5011 }; 5012 5013 struct wmi_pdev_set_bios_interface_cmd { 5014 __le32 tlv_header; 5015 __le32 pdev_id; 5016 __le32 param_type_id; 5017 __le32 length; 5018 } __packed; 5019 5020 enum wmi_bios_param_type { 5021 WMI_BIOS_PARAM_CCA_THRESHOLD_TYPE = 0, 5022 WMI_BIOS_PARAM_TAS_CONFIG_TYPE = 1, 5023 WMI_BIOS_PARAM_TAS_DATA_TYPE = 2, 5024 5025 /* bandedge control power */ 5026 WMI_BIOS_PARAM_TYPE_BANDEDGE = 3, 5027 5028 WMI_BIOS_PARAM_TYPE_MAX, 5029 }; 5030 5031 struct wmi_pdev_set_bios_sar_table_cmd { 5032 __le32 tlv_header; 5033 __le32 pdev_id; 5034 __le32 sar_len; 5035 __le32 dbs_backoff_len; 5036 } __packed; 5037 5038 struct wmi_pdev_set_bios_geo_table_cmd { 5039 __le32 tlv_header; 5040 __le32 pdev_id; 5041 __le32 geo_len; 5042 } __packed; 5043 5044 #define ATH12K_FW_STATS_BUF_SIZE (1024 * 1024) 5045 5046 enum wmi_sys_cap_info_flags { 5047 WMI_SYS_CAP_INFO_RXTX_LED = BIT(0), 5048 WMI_SYS_CAP_INFO_RFKILL = BIT(1), 5049 }; 5050 5051 #define WMI_RFKILL_CFG_GPIO_PIN_NUM GENMASK(5, 0) 5052 #define WMI_RFKILL_CFG_RADIO_LEVEL BIT(6) 5053 #define WMI_RFKILL_CFG_PIN_AS_GPIO GENMASK(10, 7) 5054 5055 enum wmi_rfkill_enable_radio { 5056 WMI_RFKILL_ENABLE_RADIO_ON = 0, 5057 WMI_RFKILL_ENABLE_RADIO_OFF = 1, 5058 }; 5059 5060 enum wmi_rfkill_radio_state { 5061 WMI_RFKILL_RADIO_STATE_OFF = 1, 5062 WMI_RFKILL_RADIO_STATE_ON = 2, 5063 }; 5064 5065 struct wmi_rfkill_state_change_event { 5066 __le32 gpio_pin_num; 5067 __le32 int_type; 5068 __le32 radio_state; 5069 } __packed; 5070 5071 struct wmi_twt_enable_event { 5072 __le32 pdev_id; 5073 __le32 status; 5074 } __packed; 5075 5076 struct wmi_twt_disable_event { 5077 __le32 pdev_id; 5078 __le32 status; 5079 } __packed; 5080 5081 struct wmi_mlo_setup_cmd { 5082 __le32 tlv_header; 5083 __le32 mld_group_id; 5084 __le32 pdev_id; 5085 } __packed; 5086 5087 struct wmi_mlo_setup_arg { 5088 __le32 group_id; 5089 u8 num_partner_links; 5090 u8 *partner_link_id; 5091 }; 5092 5093 struct wmi_mlo_ready_cmd { 5094 __le32 tlv_header; 5095 __le32 pdev_id; 5096 } __packed; 5097 5098 enum wmi_mlo_tear_down_reason_code_type { 5099 WMI_MLO_TEARDOWN_SSR_REASON, 5100 }; 5101 5102 struct wmi_mlo_teardown_cmd { 5103 __le32 tlv_header; 5104 __le32 pdev_id; 5105 __le32 reason_code; 5106 } __packed; 5107 5108 struct wmi_mlo_setup_complete_event { 5109 __le32 pdev_id; 5110 __le32 status; 5111 } __packed; 5112 5113 struct wmi_mlo_teardown_complete_event { 5114 __le32 pdev_id; 5115 __le32 status; 5116 } __packed; 5117 5118 /* WOW structures */ 5119 enum wmi_wow_wakeup_event { 5120 WOW_BMISS_EVENT = 0, 5121 WOW_BETTER_AP_EVENT, 5122 WOW_DEAUTH_RECVD_EVENT, 5123 WOW_MAGIC_PKT_RECVD_EVENT, 5124 WOW_GTK_ERR_EVENT, 5125 WOW_FOURWAY_HSHAKE_EVENT, 5126 WOW_EAPOL_RECVD_EVENT, 5127 WOW_NLO_DETECTED_EVENT, 5128 WOW_DISASSOC_RECVD_EVENT, 5129 WOW_PATTERN_MATCH_EVENT, 5130 WOW_CSA_IE_EVENT, 5131 WOW_PROBE_REQ_WPS_IE_EVENT, 5132 WOW_AUTH_REQ_EVENT, 5133 WOW_ASSOC_REQ_EVENT, 5134 WOW_HTT_EVENT, 5135 WOW_RA_MATCH_EVENT, 5136 WOW_HOST_AUTO_SHUTDOWN_EVENT, 5137 WOW_IOAC_MAGIC_EVENT, 5138 WOW_IOAC_SHORT_EVENT, 5139 WOW_IOAC_EXTEND_EVENT, 5140 WOW_IOAC_TIMER_EVENT, 5141 WOW_DFS_PHYERR_RADAR_EVENT, 5142 WOW_BEACON_EVENT, 5143 WOW_CLIENT_KICKOUT_EVENT, 5144 WOW_EVENT_MAX, 5145 }; 5146 5147 enum wmi_wow_interface_cfg { 5148 WOW_IFACE_PAUSE_ENABLED, 5149 WOW_IFACE_PAUSE_DISABLED 5150 }; 5151 5152 #define C2S(x) case x: return #x 5153 5154 static inline const char *wow_wakeup_event(enum wmi_wow_wakeup_event ev) 5155 { 5156 switch (ev) { 5157 C2S(WOW_BMISS_EVENT); 5158 C2S(WOW_BETTER_AP_EVENT); 5159 C2S(WOW_DEAUTH_RECVD_EVENT); 5160 C2S(WOW_MAGIC_PKT_RECVD_EVENT); 5161 C2S(WOW_GTK_ERR_EVENT); 5162 C2S(WOW_FOURWAY_HSHAKE_EVENT); 5163 C2S(WOW_EAPOL_RECVD_EVENT); 5164 C2S(WOW_NLO_DETECTED_EVENT); 5165 C2S(WOW_DISASSOC_RECVD_EVENT); 5166 C2S(WOW_PATTERN_MATCH_EVENT); 5167 C2S(WOW_CSA_IE_EVENT); 5168 C2S(WOW_PROBE_REQ_WPS_IE_EVENT); 5169 C2S(WOW_AUTH_REQ_EVENT); 5170 C2S(WOW_ASSOC_REQ_EVENT); 5171 C2S(WOW_HTT_EVENT); 5172 C2S(WOW_RA_MATCH_EVENT); 5173 C2S(WOW_HOST_AUTO_SHUTDOWN_EVENT); 5174 C2S(WOW_IOAC_MAGIC_EVENT); 5175 C2S(WOW_IOAC_SHORT_EVENT); 5176 C2S(WOW_IOAC_EXTEND_EVENT); 5177 C2S(WOW_IOAC_TIMER_EVENT); 5178 C2S(WOW_DFS_PHYERR_RADAR_EVENT); 5179 C2S(WOW_BEACON_EVENT); 5180 C2S(WOW_CLIENT_KICKOUT_EVENT); 5181 C2S(WOW_EVENT_MAX); 5182 default: 5183 return NULL; 5184 } 5185 } 5186 5187 enum wmi_wow_wake_reason { 5188 WOW_REASON_UNSPECIFIED = -1, 5189 WOW_REASON_NLOD = 0, 5190 WOW_REASON_AP_ASSOC_LOST, 5191 WOW_REASON_LOW_RSSI, 5192 WOW_REASON_DEAUTH_RECVD, 5193 WOW_REASON_DISASSOC_RECVD, 5194 WOW_REASON_GTK_HS_ERR, 5195 WOW_REASON_EAP_REQ, 5196 WOW_REASON_FOURWAY_HS_RECV, 5197 WOW_REASON_TIMER_INTR_RECV, 5198 WOW_REASON_PATTERN_MATCH_FOUND, 5199 WOW_REASON_RECV_MAGIC_PATTERN, 5200 WOW_REASON_P2P_DISC, 5201 WOW_REASON_WLAN_HB, 5202 WOW_REASON_CSA_EVENT, 5203 WOW_REASON_PROBE_REQ_WPS_IE_RECV, 5204 WOW_REASON_AUTH_REQ_RECV, 5205 WOW_REASON_ASSOC_REQ_RECV, 5206 WOW_REASON_HTT_EVENT, 5207 WOW_REASON_RA_MATCH, 5208 WOW_REASON_HOST_AUTO_SHUTDOWN, 5209 WOW_REASON_IOAC_MAGIC_EVENT, 5210 WOW_REASON_IOAC_SHORT_EVENT, 5211 WOW_REASON_IOAC_EXTEND_EVENT, 5212 WOW_REASON_IOAC_TIMER_EVENT, 5213 WOW_REASON_ROAM_HO, 5214 WOW_REASON_DFS_PHYERR_RADADR_EVENT, 5215 WOW_REASON_BEACON_RECV, 5216 WOW_REASON_CLIENT_KICKOUT_EVENT, 5217 WOW_REASON_PAGE_FAULT = 0x3a, 5218 WOW_REASON_DEBUG_TEST = 0xFF, 5219 }; 5220 5221 static inline const char *wow_reason(enum wmi_wow_wake_reason reason) 5222 { 5223 switch (reason) { 5224 C2S(WOW_REASON_UNSPECIFIED); 5225 C2S(WOW_REASON_NLOD); 5226 C2S(WOW_REASON_AP_ASSOC_LOST); 5227 C2S(WOW_REASON_LOW_RSSI); 5228 C2S(WOW_REASON_DEAUTH_RECVD); 5229 C2S(WOW_REASON_DISASSOC_RECVD); 5230 C2S(WOW_REASON_GTK_HS_ERR); 5231 C2S(WOW_REASON_EAP_REQ); 5232 C2S(WOW_REASON_FOURWAY_HS_RECV); 5233 C2S(WOW_REASON_TIMER_INTR_RECV); 5234 C2S(WOW_REASON_PATTERN_MATCH_FOUND); 5235 C2S(WOW_REASON_RECV_MAGIC_PATTERN); 5236 C2S(WOW_REASON_P2P_DISC); 5237 C2S(WOW_REASON_WLAN_HB); 5238 C2S(WOW_REASON_CSA_EVENT); 5239 C2S(WOW_REASON_PROBE_REQ_WPS_IE_RECV); 5240 C2S(WOW_REASON_AUTH_REQ_RECV); 5241 C2S(WOW_REASON_ASSOC_REQ_RECV); 5242 C2S(WOW_REASON_HTT_EVENT); 5243 C2S(WOW_REASON_RA_MATCH); 5244 C2S(WOW_REASON_HOST_AUTO_SHUTDOWN); 5245 C2S(WOW_REASON_IOAC_MAGIC_EVENT); 5246 C2S(WOW_REASON_IOAC_SHORT_EVENT); 5247 C2S(WOW_REASON_IOAC_EXTEND_EVENT); 5248 C2S(WOW_REASON_IOAC_TIMER_EVENT); 5249 C2S(WOW_REASON_ROAM_HO); 5250 C2S(WOW_REASON_DFS_PHYERR_RADADR_EVENT); 5251 C2S(WOW_REASON_BEACON_RECV); 5252 C2S(WOW_REASON_CLIENT_KICKOUT_EVENT); 5253 C2S(WOW_REASON_PAGE_FAULT); 5254 C2S(WOW_REASON_DEBUG_TEST); 5255 default: 5256 return NULL; 5257 } 5258 } 5259 5260 #undef C2S 5261 5262 #define WOW_DEFAULT_BITMAP_PATTERN_SIZE 148 5263 #define WOW_DEFAULT_BITMASK_SIZE 148 5264 5265 #define WOW_MIN_PATTERN_SIZE 1 5266 #define WOW_MAX_PATTERN_SIZE 148 5267 #define WOW_MAX_PKT_OFFSET 128 5268 #define WOW_HDR_LEN (sizeof(struct ieee80211_hdr_3addr) + \ 5269 sizeof(struct rfc1042_hdr)) 5270 #define WOW_MAX_REDUCE (WOW_HDR_LEN - sizeof(struct ethhdr) - \ 5271 offsetof(struct ieee80211_hdr_3addr, addr1)) 5272 5273 struct wmi_wow_bitmap_pattern_params { 5274 __le32 tlv_header; 5275 u8 patternbuf[WOW_DEFAULT_BITMAP_PATTERN_SIZE]; 5276 u8 bitmaskbuf[WOW_DEFAULT_BITMASK_SIZE]; 5277 __le32 pattern_offset; 5278 __le32 pattern_len; 5279 __le32 bitmask_len; 5280 __le32 pattern_id; 5281 } __packed; 5282 5283 struct wmi_wow_add_pattern_cmd { 5284 __le32 tlv_header; 5285 __le32 vdev_id; 5286 __le32 pattern_id; 5287 __le32 pattern_type; 5288 } __packed; 5289 5290 struct wmi_wow_del_pattern_cmd { 5291 __le32 tlv_header; 5292 __le32 vdev_id; 5293 __le32 pattern_id; 5294 __le32 pattern_type; 5295 } __packed; 5296 5297 enum wmi_tlv_pattern_type { 5298 WOW_PATTERN_MIN = 0, 5299 WOW_BITMAP_PATTERN = WOW_PATTERN_MIN, 5300 WOW_IPV4_SYNC_PATTERN, 5301 WOW_IPV6_SYNC_PATTERN, 5302 WOW_WILD_CARD_PATTERN, 5303 WOW_TIMER_PATTERN, 5304 WOW_MAGIC_PATTERN, 5305 WOW_IPV6_RA_PATTERN, 5306 WOW_IOAC_PKT_PATTERN, 5307 WOW_IOAC_TMR_PATTERN, 5308 WOW_PATTERN_MAX 5309 }; 5310 5311 struct wmi_wow_add_del_event_cmd { 5312 __le32 tlv_header; 5313 __le32 vdev_id; 5314 __le32 is_add; 5315 __le32 event_bitmap; 5316 } __packed; 5317 5318 struct wmi_wow_enable_cmd { 5319 __le32 tlv_header; 5320 __le32 enable; 5321 __le32 pause_iface_config; 5322 __le32 flags; 5323 } __packed; 5324 5325 struct wmi_wow_host_wakeup_cmd { 5326 __le32 tlv_header; 5327 __le32 reserved; 5328 } __packed; 5329 5330 struct wmi_wow_ev_param { 5331 __le32 vdev_id; 5332 __le32 flag; 5333 __le32 wake_reason; 5334 __le32 data_len; 5335 } __packed; 5336 5337 struct wmi_wow_ev_pg_fault_param { 5338 __le32 len; 5339 u8 data[]; 5340 } __packed; 5341 5342 struct wmi_wow_ev_arg { 5343 enum wmi_wow_wake_reason wake_reason; 5344 }; 5345 5346 #define WMI_PNO_MAX_SCHED_SCAN_PLANS 2 5347 #define WMI_PNO_MAX_SCHED_SCAN_PLAN_INT 7200 5348 #define WMI_PNO_MAX_SCHED_SCAN_PLAN_ITRNS 100 5349 #define WMI_PNO_MAX_NETW_CHANNELS 26 5350 #define WMI_PNO_MAX_NETW_CHANNELS_EX 60 5351 #define WMI_PNO_MAX_SUPP_NETWORKS WLAN_SCAN_PARAMS_MAX_SSID 5352 #define WMI_PNO_MAX_IE_LENGTH WLAN_SCAN_PARAMS_MAX_IE_LEN 5353 5354 /* size based of dot11 declaration without extra IEs as we will not carry those for PNO */ 5355 #define WMI_PNO_MAX_PB_REQ_SIZE 450 5356 5357 #define WMI_PNO_24GHZ_DEFAULT_CH 1 5358 #define WMI_PNO_5GHZ_DEFAULT_CH 36 5359 5360 #define WMI_ACTIVE_MAX_CHANNEL_TIME 40 5361 #define WMI_PASSIVE_MAX_CHANNEL_TIME 110 5362 5363 /* SSID broadcast type */ 5364 enum wmi_ssid_bcast_type { 5365 BCAST_UNKNOWN = 0, 5366 BCAST_NORMAL = 1, 5367 BCAST_HIDDEN = 2, 5368 }; 5369 5370 #define WMI_NLO_MAX_SSIDS 16 5371 #define WMI_NLO_MAX_CHAN 48 5372 5373 #define WMI_NLO_CONFIG_STOP BIT(0) 5374 #define WMI_NLO_CONFIG_START BIT(1) 5375 #define WMI_NLO_CONFIG_RESET BIT(2) 5376 #define WMI_NLO_CONFIG_SLOW_SCAN BIT(4) 5377 #define WMI_NLO_CONFIG_FAST_SCAN BIT(5) 5378 #define WMI_NLO_CONFIG_SSID_HIDE_EN BIT(6) 5379 5380 /* This bit is used to indicate if EPNO or supplicant PNO is enabled. 5381 * Only one of them can be enabled at a given time 5382 */ 5383 #define WMI_NLO_CONFIG_ENLO BIT(7) 5384 #define WMI_NLO_CONFIG_SCAN_PASSIVE BIT(8) 5385 #define WMI_NLO_CONFIG_ENLO_RESET BIT(9) 5386 #define WMI_NLO_CONFIG_SPOOFED_MAC_IN_PROBE_REQ BIT(10) 5387 #define WMI_NLO_CONFIG_RANDOM_SEQ_NO_IN_PROBE_REQ BIT(11) 5388 #define WMI_NLO_CONFIG_ENABLE_IE_WHITELIST_IN_PROBE_REQ BIT(12) 5389 #define WMI_NLO_CONFIG_ENABLE_CNLO_RSSI_CONFIG BIT(13) 5390 5391 struct wmi_nlo_ssid_params { 5392 __le32 valid; 5393 struct ath12k_wmi_ssid_params ssid; 5394 } __packed; 5395 5396 struct wmi_nlo_enc_params { 5397 __le32 valid; 5398 __le32 enc_type; 5399 } __packed; 5400 5401 struct wmi_nlo_auth_params { 5402 __le32 valid; 5403 __le32 auth_type; 5404 } __packed; 5405 5406 struct wmi_nlo_bcast_nw_params { 5407 __le32 valid; 5408 __le32 bcast_nw_type; 5409 } __packed; 5410 5411 struct wmi_nlo_rssi_params { 5412 __le32 valid; 5413 __le32 rssi; 5414 } __packed; 5415 5416 struct nlo_configured_params { 5417 /* TLV tag and len;*/ 5418 __le32 tlv_header; 5419 struct wmi_nlo_ssid_params ssid; 5420 struct wmi_nlo_enc_params enc_type; 5421 struct wmi_nlo_auth_params auth_type; 5422 struct wmi_nlo_rssi_params rssi_cond; 5423 5424 /* indicates if the SSID is hidden or not */ 5425 struct wmi_nlo_bcast_nw_params bcast_nw_type; 5426 } __packed; 5427 5428 struct wmi_network_type_arg { 5429 struct cfg80211_ssid ssid; 5430 u32 authentication; 5431 u32 encryption; 5432 u32 bcast_nw_type; 5433 u8 channel_count; 5434 u16 channels[WMI_PNO_MAX_NETW_CHANNELS_EX]; 5435 s32 rssi_threshold; 5436 }; 5437 5438 struct wmi_pno_scan_req_arg { 5439 u8 enable; 5440 u8 vdev_id; 5441 u8 uc_networks_count; 5442 struct wmi_network_type_arg a_networks[WMI_PNO_MAX_SUPP_NETWORKS]; 5443 u32 fast_scan_period; 5444 u32 slow_scan_period; 5445 u8 fast_scan_max_cycles; 5446 5447 bool do_passive_scan; 5448 5449 u32 delay_start_time; 5450 u32 active_min_time; 5451 u32 active_max_time; 5452 u32 passive_min_time; 5453 u32 passive_max_time; 5454 5455 /* mac address randomization attributes */ 5456 u32 enable_pno_scan_randomization; 5457 u8 mac_addr[ETH_ALEN]; 5458 u8 mac_addr_mask[ETH_ALEN]; 5459 }; 5460 5461 struct wmi_wow_nlo_config_cmd { 5462 __le32 tlv_header; 5463 __le32 flags; 5464 __le32 vdev_id; 5465 __le32 fast_scan_max_cycles; 5466 __le32 active_dwell_time; 5467 __le32 passive_dwell_time; 5468 __le32 probe_bundle_size; 5469 5470 /* ART = IRT */ 5471 __le32 rest_time; 5472 5473 /* max value that can be reached after scan_backoff_multiplier */ 5474 __le32 max_rest_time; 5475 5476 __le32 scan_backoff_multiplier; 5477 __le32 fast_scan_period; 5478 5479 /* specific to windows */ 5480 __le32 slow_scan_period; 5481 5482 __le32 no_of_ssids; 5483 5484 __le32 num_of_channels; 5485 5486 /* NLO scan start delay time in milliseconds */ 5487 __le32 delay_start_time; 5488 5489 /* MAC Address to use in Probe Req as SA */ 5490 struct ath12k_wmi_mac_addr_params mac_addr; 5491 5492 /* Mask on which MAC has to be randomized */ 5493 struct ath12k_wmi_mac_addr_params mac_mask; 5494 5495 /* IE bitmap to use in Probe Req */ 5496 __le32 ie_bitmap[8]; 5497 5498 /* Number of vendor OUIs. In the TLV vendor_oui[] */ 5499 __le32 num_vendor_oui; 5500 5501 /* Number of connected NLO band preferences */ 5502 __le32 num_cnlo_band_pref; 5503 5504 /* The TLVs will follow. 5505 * nlo_configured_params nlo_list[]; 5506 * u32 channel_list[num_of_channels]; 5507 */ 5508 } __packed; 5509 5510 /* Definition of HW data filtering */ 5511 enum hw_data_filter_type { 5512 WMI_HW_DATA_FILTER_DROP_NON_ARP_BC = BIT(0), 5513 WMI_HW_DATA_FILTER_DROP_NON_ICMPV6_MC = BIT(1), 5514 }; 5515 5516 struct wmi_hw_data_filter_cmd { 5517 __le32 tlv_header; 5518 __le32 vdev_id; 5519 __le32 enable; 5520 __le32 hw_filter_bitmap; 5521 } __packed; 5522 5523 struct wmi_hw_data_filter_arg { 5524 u32 vdev_id; 5525 bool enable; 5526 u32 hw_filter_bitmap; 5527 }; 5528 5529 #define WMI_IPV6_UC_TYPE 0 5530 #define WMI_IPV6_AC_TYPE 1 5531 5532 #define WMI_IPV6_MAX_COUNT 16 5533 #define WMI_IPV4_MAX_COUNT 2 5534 5535 struct wmi_arp_ns_offload_arg { 5536 u8 ipv4_addr[WMI_IPV4_MAX_COUNT][4]; 5537 u32 ipv4_count; 5538 u32 ipv6_count; 5539 u8 ipv6_addr[WMI_IPV6_MAX_COUNT][16]; 5540 u8 self_ipv6_addr[WMI_IPV6_MAX_COUNT][16]; 5541 u8 ipv6_type[WMI_IPV6_MAX_COUNT]; 5542 bool ipv6_valid[WMI_IPV6_MAX_COUNT]; 5543 u8 mac_addr[ETH_ALEN]; 5544 }; 5545 5546 #define WMI_MAX_NS_OFFLOADS 2 5547 #define WMI_MAX_ARP_OFFLOADS 2 5548 5549 #define WMI_ARPOL_FLAGS_VALID BIT(0) 5550 #define WMI_ARPOL_FLAGS_MAC_VALID BIT(1) 5551 #define WMI_ARPOL_FLAGS_REMOTE_IP_VALID BIT(2) 5552 5553 struct wmi_arp_offload_params { 5554 __le32 tlv_header; 5555 __le32 flags; 5556 u8 target_ipaddr[4]; 5557 u8 remote_ipaddr[4]; 5558 struct ath12k_wmi_mac_addr_params target_mac; 5559 } __packed; 5560 5561 #define WMI_NSOL_FLAGS_VALID BIT(0) 5562 #define WMI_NSOL_FLAGS_MAC_VALID BIT(1) 5563 #define WMI_NSOL_FLAGS_REMOTE_IP_VALID BIT(2) 5564 #define WMI_NSOL_FLAGS_IS_IPV6_ANYCAST BIT(3) 5565 5566 #define WMI_NSOL_MAX_TARGET_IPS 2 5567 5568 struct wmi_ns_offload_params { 5569 __le32 tlv_header; 5570 __le32 flags; 5571 u8 target_ipaddr[WMI_NSOL_MAX_TARGET_IPS][16]; 5572 u8 solicitation_ipaddr[16]; 5573 u8 remote_ipaddr[16]; 5574 struct ath12k_wmi_mac_addr_params target_mac; 5575 } __packed; 5576 5577 struct wmi_set_arp_ns_offload_cmd { 5578 __le32 tlv_header; 5579 __le32 flags; 5580 __le32 vdev_id; 5581 __le32 num_ns_ext_tuples; 5582 /* The TLVs follow: 5583 * wmi_ns_offload_params ns[WMI_MAX_NS_OFFLOADS]; 5584 * wmi_arp_offload_params arp[WMI_MAX_ARP_OFFLOADS]; 5585 * wmi_ns_offload_params ns_ext[num_ns_ext_tuples]; 5586 */ 5587 } __packed; 5588 5589 #define GTK_OFFLOAD_OPCODE_MASK 0xFF000000 5590 #define GTK_OFFLOAD_ENABLE_OPCODE 0x01000000 5591 #define GTK_OFFLOAD_DISABLE_OPCODE 0x02000000 5592 #define GTK_OFFLOAD_REQUEST_STATUS_OPCODE 0x04000000 5593 5594 #define GTK_OFFLOAD_KEK_BYTES 16 5595 #define GTK_OFFLOAD_KCK_BYTES 16 5596 #define GTK_REPLAY_COUNTER_BYTES 8 5597 #define WMI_MAX_KEY_LEN 32 5598 #define IGTK_PN_SIZE 6 5599 5600 struct wmi_gtk_offload_status_event { 5601 __le32 vdev_id; 5602 __le32 flags; 5603 __le32 refresh_cnt; 5604 __le64 replay_ctr; 5605 u8 igtk_key_index; 5606 u8 igtk_key_length; 5607 u8 igtk_key_rsc[IGTK_PN_SIZE]; 5608 u8 igtk_key[WMI_MAX_KEY_LEN]; 5609 u8 gtk_key_index; 5610 u8 gtk_key_length; 5611 u8 gtk_key_rsc[GTK_REPLAY_COUNTER_BYTES]; 5612 u8 gtk_key[WMI_MAX_KEY_LEN]; 5613 } __packed; 5614 5615 struct wmi_gtk_rekey_offload_cmd { 5616 __le32 tlv_header; 5617 __le32 vdev_id; 5618 __le32 flags; 5619 u8 kek[GTK_OFFLOAD_KEK_BYTES]; 5620 u8 kck[GTK_OFFLOAD_KCK_BYTES]; 5621 u8 replay_ctr[GTK_REPLAY_COUNTER_BYTES]; 5622 } __packed; 5623 5624 struct wmi_sta_keepalive_cmd { 5625 __le32 tlv_header; 5626 __le32 vdev_id; 5627 __le32 enabled; 5628 5629 /* WMI_STA_KEEPALIVE_METHOD_ */ 5630 __le32 method; 5631 5632 /* in seconds */ 5633 __le32 interval; 5634 5635 /* following this structure is the TLV for struct 5636 * wmi_sta_keepalive_arp_resp_params 5637 */ 5638 } __packed; 5639 5640 struct wmi_sta_keepalive_arp_resp_params { 5641 __le32 tlv_header; 5642 __le32 src_ip4_addr; 5643 __le32 dest_ip4_addr; 5644 struct ath12k_wmi_mac_addr_params dest_mac_addr; 5645 } __packed; 5646 5647 struct wmi_sta_keepalive_arg { 5648 u32 vdev_id; 5649 u32 enabled; 5650 u32 method; 5651 u32 interval; 5652 u32 src_ip4_addr; 5653 u32 dest_ip4_addr; 5654 const u8 dest_mac_addr[ETH_ALEN]; 5655 }; 5656 5657 enum wmi_sta_keepalive_method { 5658 WMI_STA_KEEPALIVE_METHOD_NULL_FRAME = 1, 5659 WMI_STA_KEEPALIVE_METHOD_UNSOLICITED_ARP_RESPONSE = 2, 5660 WMI_STA_KEEPALIVE_METHOD_ETHERNET_LOOPBACK = 3, 5661 WMI_STA_KEEPALIVE_METHOD_GRATUITOUS_ARP_REQUEST = 4, 5662 WMI_STA_KEEPALIVE_METHOD_MGMT_VENDOR_ACTION = 5, 5663 }; 5664 5665 #define WMI_STA_KEEPALIVE_INTERVAL_DEFAULT 30 5666 #define WMI_STA_KEEPALIVE_INTERVAL_DISABLE 0 5667 5668 struct wmi_stats_event { 5669 __le32 stats_id; 5670 __le32 num_pdev_stats; 5671 __le32 num_vdev_stats; 5672 __le32 num_peer_stats; 5673 __le32 num_bcnflt_stats; 5674 __le32 num_chan_stats; 5675 __le32 num_mib_stats; 5676 __le32 pdev_id; 5677 __le32 num_bcn_stats; 5678 __le32 num_peer_extd_stats; 5679 __le32 num_peer_extd2_stats; 5680 } __packed; 5681 5682 enum wmi_stats_id { 5683 WMI_REQUEST_PDEV_STAT = BIT(2), 5684 WMI_REQUEST_VDEV_STAT = BIT(3), 5685 WMI_REQUEST_BCN_STAT = BIT(11), 5686 }; 5687 5688 struct wmi_request_stats_cmd { 5689 __le32 tlv_header; 5690 __le32 stats_id; 5691 __le32 vdev_id; 5692 struct ath12k_wmi_mac_addr_params peer_macaddr; 5693 __le32 pdev_id; 5694 } __packed; 5695 5696 #define WLAN_MAX_AC 4 5697 #define MAX_TX_RATE_VALUES 10 5698 5699 struct wmi_vdev_stats_params { 5700 __le32 vdev_id; 5701 __le32 beacon_snr; 5702 __le32 data_snr; 5703 __le32 num_tx_frames[WLAN_MAX_AC]; 5704 __le32 num_rx_frames; 5705 __le32 num_tx_frames_retries[WLAN_MAX_AC]; 5706 __le32 num_tx_frames_failures[WLAN_MAX_AC]; 5707 __le32 num_rts_fail; 5708 __le32 num_rts_success; 5709 __le32 num_rx_err; 5710 __le32 num_rx_discard; 5711 __le32 num_tx_not_acked; 5712 __le32 tx_rate_history[MAX_TX_RATE_VALUES]; 5713 __le32 beacon_rssi_history[MAX_TX_RATE_VALUES]; 5714 } __packed; 5715 5716 struct ath12k_wmi_bcn_stats_params { 5717 __le32 vdev_id; 5718 __le32 tx_bcn_succ_cnt; 5719 __le32 tx_bcn_outage_cnt; 5720 } __packed; 5721 5722 struct ath12k_wmi_pdev_base_stats_params { 5723 a_sle32 chan_nf; 5724 __le32 tx_frame_count; /* Cycles spent transmitting frames */ 5725 __le32 rx_frame_count; /* Cycles spent receiving frames */ 5726 __le32 rx_clear_count; /* Total channel busy time, evidently */ 5727 __le32 cycle_count; /* Total on-channel time */ 5728 __le32 phy_err_count; 5729 __le32 chan_tx_pwr; 5730 } __packed; 5731 5732 struct ath12k_wmi_pdev_tx_stats_params { 5733 a_sle32 comp_queued; 5734 a_sle32 comp_delivered; 5735 a_sle32 msdu_enqued; 5736 a_sle32 mpdu_enqued; 5737 a_sle32 wmm_drop; 5738 a_sle32 local_enqued; 5739 a_sle32 local_freed; 5740 a_sle32 hw_queued; 5741 a_sle32 hw_reaped; 5742 a_sle32 underrun; 5743 a_sle32 tx_abort; 5744 a_sle32 mpdus_requed; 5745 __le32 tx_ko; 5746 __le32 data_rc; 5747 __le32 self_triggers; 5748 __le32 sw_retry_failure; 5749 __le32 illgl_rate_phy_err; 5750 __le32 pdev_cont_xretry; 5751 __le32 pdev_tx_timeout; 5752 __le32 pdev_resets; 5753 __le32 stateless_tid_alloc_failure; 5754 __le32 phy_underrun; 5755 __le32 txop_ovf; 5756 } __packed; 5757 5758 struct ath12k_wmi_pdev_rx_stats_params { 5759 a_sle32 mid_ppdu_route_change; 5760 a_sle32 status_rcvd; 5761 a_sle32 r0_frags; 5762 a_sle32 r1_frags; 5763 a_sle32 r2_frags; 5764 a_sle32 r3_frags; 5765 a_sle32 htt_msdus; 5766 a_sle32 htt_mpdus; 5767 a_sle32 loc_msdus; 5768 a_sle32 loc_mpdus; 5769 a_sle32 oversize_amsdu; 5770 a_sle32 phy_errs; 5771 a_sle32 phy_err_drop; 5772 a_sle32 mpdu_errs; 5773 } __packed; 5774 5775 struct ath12k_wmi_pdev_stats_params { 5776 struct ath12k_wmi_pdev_base_stats_params base; 5777 struct ath12k_wmi_pdev_tx_stats_params tx; 5778 struct ath12k_wmi_pdev_rx_stats_params rx; 5779 } __packed; 5780 5781 struct ath12k_fw_stats_req_params { 5782 u32 stats_id; 5783 u32 vdev_id; 5784 u32 pdev_id; 5785 }; 5786 5787 #define WMI_REQ_CTRL_PATH_PDEV_TX_STAT 1 5788 #define WMI_REQUEST_CTRL_PATH_STAT_GET 1 5789 5790 #define WMI_TPC_CONFIG BIT(1) 5791 #define WMI_TPC_REG_PWR_ALLOWED BIT(2) 5792 #define WMI_TPC_RATES_ARRAY1 BIT(3) 5793 #define WMI_TPC_RATES_ARRAY2 BIT(4) 5794 #define WMI_TPC_RATES_DL_OFDMA_ARRAY BIT(5) 5795 #define WMI_TPC_CTL_PWR_ARRAY BIT(6) 5796 #define WMI_TPC_CONFIG_PARAM 0x1 5797 #define ATH12K_TPC_RATE_ARRAY_MU GENMASK(15, 8) 5798 #define ATH12K_TPC_RATE_ARRAY_SU GENMASK(7, 0) 5799 #define TPC_STATS_REG_PWR_ALLOWED_TYPE 0 5800 5801 enum wmi_halphy_ctrl_path_stats_id { 5802 WMI_HALPHY_PDEV_TX_SU_STATS = 0, 5803 WMI_HALPHY_PDEV_TX_SUTXBF_STATS, 5804 WMI_HALPHY_PDEV_TX_MU_STATS, 5805 WMI_HALPHY_PDEV_TX_MUTXBF_STATS, 5806 WMI_HALPHY_PDEV_TX_STATS_MAX, 5807 }; 5808 5809 enum ath12k_wmi_tpc_stats_rates_array { 5810 ATH12K_TPC_STATS_RATES_ARRAY1, 5811 ATH12K_TPC_STATS_RATES_ARRAY2, 5812 }; 5813 5814 enum ath12k_wmi_tpc_stats_ctl_array { 5815 ATH12K_TPC_STATS_CTL_ARRAY, 5816 ATH12K_TPC_STATS_CTL_160ARRAY, 5817 }; 5818 5819 enum ath12k_wmi_tpc_stats_events { 5820 ATH12K_TPC_STATS_CONFIG_REG_PWR_EVENT, 5821 ATH12K_TPC_STATS_RATES_EVENT1, 5822 ATH12K_TPC_STATS_RATES_EVENT2, 5823 ATH12K_TPC_STATS_CTL_TABLE_EVENT 5824 }; 5825 5826 struct wmi_request_halphy_ctrl_path_stats_cmd_fixed_params { 5827 __le32 tlv_header; 5828 __le32 stats_id_mask; 5829 __le32 request_id; 5830 __le32 action; 5831 __le32 subid; 5832 } __packed; 5833 5834 struct ath12k_wmi_pdev_tpc_stats_event_fixed_params { 5835 __le32 pdev_id; 5836 __le32 end_of_event; 5837 __le32 event_count; 5838 } __packed; 5839 5840 struct wmi_tpc_config_params { 5841 __le32 reg_domain; 5842 __le32 chan_freq; 5843 __le32 phy_mode; 5844 __le32 twice_antenna_reduction; 5845 __le32 twice_max_reg_power; 5846 __le32 twice_antenna_gain; 5847 __le32 power_limit; 5848 __le32 rate_max; 5849 __le32 num_tx_chain; 5850 __le32 ctl; 5851 __le32 flags; 5852 __le32 caps; 5853 } __packed; 5854 5855 struct wmi_max_reg_power_fixed_params { 5856 __le32 reg_power_type; 5857 __le32 reg_array_len; 5858 __le32 d1; 5859 __le32 d2; 5860 __le32 d3; 5861 __le32 d4; 5862 } __packed; 5863 5864 struct wmi_max_reg_power_allowed_arg { 5865 struct wmi_max_reg_power_fixed_params tpc_reg_pwr; 5866 s16 *reg_pwr_array; 5867 }; 5868 5869 struct wmi_tpc_rates_array_fixed_params { 5870 __le32 rate_array_type; 5871 __le32 rate_array_len; 5872 } __packed; 5873 5874 struct wmi_tpc_rates_array_arg { 5875 struct wmi_tpc_rates_array_fixed_params tpc_rates_array; 5876 s16 *rate_array; 5877 }; 5878 5879 struct wmi_tpc_ctl_pwr_fixed_params { 5880 __le32 ctl_array_type; 5881 __le32 ctl_array_len; 5882 __le32 end_of_ctl_pwr; 5883 __le32 ctl_pwr_count; 5884 __le32 d1; 5885 __le32 d2; 5886 __le32 d3; 5887 __le32 d4; 5888 } __packed; 5889 5890 struct wmi_tpc_ctl_pwr_table_arg { 5891 struct wmi_tpc_ctl_pwr_fixed_params tpc_ctl_pwr; 5892 s8 *ctl_pwr_table; 5893 }; 5894 5895 struct wmi_tpc_stats_arg { 5896 u32 pdev_id; 5897 u32 event_count; 5898 u32 end_of_event; 5899 u32 tlvs_rcvd; 5900 struct wmi_max_reg_power_allowed_arg max_reg_allowed_power; 5901 struct wmi_tpc_rates_array_arg rates_array1; 5902 struct wmi_tpc_rates_array_arg rates_array2; 5903 struct wmi_tpc_config_params tpc_config; 5904 struct wmi_tpc_ctl_pwr_table_arg ctl_array; 5905 }; 5906 5907 void ath12k_wmi_init_qcn9274(struct ath12k_base *ab, 5908 struct ath12k_wmi_resource_config_arg *config); 5909 void ath12k_wmi_init_wcn7850(struct ath12k_base *ab, 5910 struct ath12k_wmi_resource_config_arg *config); 5911 int ath12k_wmi_cmd_send(struct ath12k_wmi_pdev *wmi, struct sk_buff *skb, 5912 u32 cmd_id); 5913 struct sk_buff *ath12k_wmi_alloc_skb(struct ath12k_wmi_base *wmi_sc, u32 len); 5914 int ath12k_wmi_mgmt_send(struct ath12k *ar, u32 vdev_id, u32 buf_id, 5915 struct sk_buff *frame); 5916 int ath12k_wmi_p2p_go_bcn_ie(struct ath12k *ar, u32 vdev_id, 5917 const u8 *p2p_ie); 5918 int ath12k_wmi_bcn_tmpl(struct ath12k_link_vif *arvif, 5919 struct ieee80211_mutable_offsets *offs, 5920 struct sk_buff *bcn, 5921 struct ath12k_wmi_bcn_tmpl_ema_arg *ema_args); 5922 int ath12k_wmi_vdev_down(struct ath12k *ar, u8 vdev_id); 5923 int ath12k_wmi_vdev_up(struct ath12k *ar, struct ath12k_wmi_vdev_up_params *params); 5924 int ath12k_wmi_vdev_stop(struct ath12k *ar, u8 vdev_id); 5925 int ath12k_wmi_vdev_start(struct ath12k *ar, struct wmi_vdev_start_req_arg *arg, 5926 bool restart); 5927 int ath12k_wmi_set_peer_param(struct ath12k *ar, const u8 *peer_addr, 5928 u32 vdev_id, u32 param_id, u32 param_val); 5929 int ath12k_wmi_pdev_set_param(struct ath12k *ar, u32 param_id, 5930 u32 param_value, u8 pdev_id); 5931 int ath12k_wmi_pdev_set_ps_mode(struct ath12k *ar, int vdev_id, u32 enable); 5932 int ath12k_wmi_wait_for_unified_ready(struct ath12k_base *ab); 5933 int ath12k_wmi_cmd_init(struct ath12k_base *ab); 5934 int ath12k_wmi_wait_for_service_ready(struct ath12k_base *ab); 5935 int ath12k_wmi_connect(struct ath12k_base *ab); 5936 int ath12k_wmi_pdev_attach(struct ath12k_base *ab, 5937 u8 pdev_id); 5938 int ath12k_wmi_attach(struct ath12k_base *ab); 5939 void ath12k_wmi_detach(struct ath12k_base *ab); 5940 int ath12k_wmi_vdev_create(struct ath12k *ar, u8 *macaddr, 5941 struct ath12k_wmi_vdev_create_arg *arg); 5942 int ath12k_wmi_send_peer_create_cmd(struct ath12k *ar, 5943 struct ath12k_wmi_peer_create_arg *arg); 5944 int ath12k_wmi_vdev_set_param_cmd(struct ath12k *ar, u32 vdev_id, 5945 u32 param_id, u32 param_value); 5946 5947 int ath12k_wmi_set_sta_ps_param(struct ath12k *ar, u32 vdev_id, 5948 u32 param, u32 param_value); 5949 int ath12k_wmi_force_fw_hang_cmd(struct ath12k *ar, u32 type, u32 delay_time_ms); 5950 int ath12k_wmi_send_peer_delete_cmd(struct ath12k *ar, 5951 const u8 *peer_addr, u8 vdev_id); 5952 int ath12k_wmi_vdev_delete(struct ath12k *ar, u8 vdev_id); 5953 void ath12k_wmi_start_scan_init(struct ath12k *ar, 5954 struct ath12k_wmi_scan_req_arg *arg); 5955 int ath12k_wmi_send_scan_start_cmd(struct ath12k *ar, 5956 struct ath12k_wmi_scan_req_arg *arg); 5957 int ath12k_wmi_send_scan_stop_cmd(struct ath12k *ar, 5958 struct ath12k_wmi_scan_cancel_arg *arg); 5959 int ath12k_wmi_send_wmm_update_cmd(struct ath12k *ar, u32 vdev_id, 5960 struct wmi_wmm_params_all_arg *param); 5961 int ath12k_wmi_pdev_suspend(struct ath12k *ar, u32 suspend_opt, 5962 u32 pdev_id); 5963 int ath12k_wmi_pdev_resume(struct ath12k *ar, u32 pdev_id); 5964 5965 int ath12k_wmi_send_peer_assoc_cmd(struct ath12k *ar, 5966 struct ath12k_wmi_peer_assoc_arg *arg); 5967 int ath12k_wmi_vdev_install_key(struct ath12k *ar, 5968 struct wmi_vdev_install_key_arg *arg); 5969 int ath12k_wmi_pdev_bss_chan_info_request(struct ath12k *ar, 5970 enum wmi_bss_chan_info_req_type type); 5971 int ath12k_wmi_send_pdev_temperature_cmd(struct ath12k *ar); 5972 int ath12k_wmi_send_peer_flush_tids_cmd(struct ath12k *ar, 5973 u8 peer_addr[ETH_ALEN], 5974 u32 peer_tid_bitmap, 5975 u8 vdev_id); 5976 int ath12k_wmi_send_set_ap_ps_param_cmd(struct ath12k *ar, u8 *peer_addr, 5977 struct ath12k_wmi_ap_ps_arg *arg); 5978 int ath12k_wmi_send_scan_chan_list_cmd(struct ath12k *ar, 5979 struct ath12k_wmi_scan_chan_list_arg *arg); 5980 int ath12k_wmi_send_dfs_phyerr_offload_enable_cmd(struct ath12k *ar, 5981 u32 pdev_id); 5982 int ath12k_wmi_addba_clear_resp(struct ath12k *ar, u32 vdev_id, const u8 *mac); 5983 int ath12k_wmi_addba_send(struct ath12k *ar, u32 vdev_id, const u8 *mac, 5984 u32 tid, u32 buf_size); 5985 int ath12k_wmi_addba_set_resp(struct ath12k *ar, u32 vdev_id, const u8 *mac, 5986 u32 tid, u32 status); 5987 int ath12k_wmi_delba_send(struct ath12k *ar, u32 vdev_id, const u8 *mac, 5988 u32 tid, u32 initiator, u32 reason); 5989 int ath12k_wmi_send_bcn_offload_control_cmd(struct ath12k *ar, 5990 u32 vdev_id, u32 bcn_ctrl_op); 5991 int ath12k_wmi_send_init_country_cmd(struct ath12k *ar, 5992 struct ath12k_wmi_init_country_arg *arg); 5993 int ath12k_wmi_peer_rx_reorder_queue_setup(struct ath12k *ar, 5994 int vdev_id, const u8 *addr, 5995 dma_addr_t paddr, u8 tid, 5996 u8 ba_window_size_valid, 5997 u32 ba_window_size); 5998 int 5999 ath12k_wmi_rx_reord_queue_remove(struct ath12k *ar, 6000 struct ath12k_wmi_rx_reorder_queue_remove_arg *arg); 6001 int ath12k_wmi_send_pdev_set_regdomain(struct ath12k *ar, 6002 struct ath12k_wmi_pdev_set_regdomain_arg *arg); 6003 int ath12k_wmi_simulate_radar(struct ath12k *ar); 6004 int ath12k_wmi_send_twt_enable_cmd(struct ath12k *ar, u32 pdev_id); 6005 int ath12k_wmi_send_twt_disable_cmd(struct ath12k *ar, u32 pdev_id); 6006 int ath12k_wmi_send_obss_spr_cmd(struct ath12k *ar, u32 vdev_id, 6007 struct ieee80211_he_obss_pd *he_obss_pd); 6008 int ath12k_wmi_obss_color_cfg_cmd(struct ath12k *ar, u32 vdev_id, 6009 u8 bss_color, u32 period, 6010 bool enable); 6011 int ath12k_wmi_send_bss_color_change_enable_cmd(struct ath12k *ar, u32 vdev_id, 6012 bool enable); 6013 int ath12k_wmi_pdev_lro_cfg(struct ath12k *ar, int pdev_id); 6014 int ath12k_wmi_pdev_dma_ring_cfg(struct ath12k *ar, 6015 struct ath12k_wmi_pdev_dma_ring_cfg_arg *arg); 6016 int ath12k_wmi_vdev_spectral_enable(struct ath12k *ar, u32 vdev_id, 6017 u32 trigger, u32 enable); 6018 int ath12k_wmi_vdev_spectral_conf(struct ath12k *ar, 6019 struct ath12k_wmi_vdev_spectral_conf_arg *arg); 6020 int ath12k_wmi_fils_discovery_tmpl(struct ath12k *ar, u32 vdev_id, 6021 struct sk_buff *tmpl); 6022 int ath12k_wmi_fils_discovery(struct ath12k *ar, u32 vdev_id, u32 interval, 6023 bool unsol_bcast_probe_resp_enabled); 6024 int ath12k_wmi_probe_resp_tmpl(struct ath12k *ar, u32 vdev_id, 6025 struct sk_buff *tmpl); 6026 int ath12k_wmi_set_hw_mode(struct ath12k_base *ab, 6027 enum wmi_host_hw_mode_config_type mode); 6028 int ath12k_wmi_set_bios_cmd(struct ath12k_base *ab, u32 param_id, 6029 const u8 *buf, size_t buf_len); 6030 int ath12k_wmi_set_bios_sar_cmd(struct ath12k_base *ab, const u8 *psar_table); 6031 int ath12k_wmi_set_bios_geo_cmd(struct ath12k_base *ab, const u8 *pgeo_table); 6032 int ath12k_wmi_send_stats_request_cmd(struct ath12k *ar, u32 stats_id, 6033 u32 vdev_id, u32 pdev_id); 6034 __le32 ath12k_wmi_tlv_hdr(u32 cmd, u32 len); 6035 6036 int ath12k_wmi_send_tpc_stats_request(struct ath12k *ar, 6037 enum wmi_halphy_ctrl_path_stats_id tpc_stats_type); 6038 void ath12k_wmi_free_tpc_stats_mem(struct ath12k *ar); 6039 6040 static inline u32 6041 ath12k_wmi_caps_ext_get_pdev_id(const struct ath12k_wmi_caps_ext_params *param) 6042 { 6043 return le32_get_bits(param->pdev_and_hw_link_ids, WMI_CAPS_PARAMS_PDEV_ID); 6044 } 6045 6046 static inline u32 6047 ath12k_wmi_caps_ext_get_hw_link_id(const struct ath12k_wmi_caps_ext_params *param) 6048 { 6049 return le32_get_bits(param->pdev_and_hw_link_ids, WMI_CAPS_PARAMS_HW_LINK_ID); 6050 } 6051 6052 static inline u32 6053 ath12k_wmi_mac_phy_get_pdev_id(const struct ath12k_wmi_mac_phy_caps_params *param) 6054 { 6055 return le32_get_bits(param->pdev_and_hw_link_ids, 6056 WMI_CAPS_PARAMS_PDEV_ID); 6057 } 6058 6059 static inline u32 6060 ath12k_wmi_mac_phy_get_hw_link_id(const struct ath12k_wmi_mac_phy_caps_params *param) 6061 { 6062 return le32_get_bits(param->pdev_and_hw_link_ids, 6063 WMI_CAPS_PARAMS_HW_LINK_ID); 6064 } 6065 6066 int ath12k_wmi_wow_host_wakeup_ind(struct ath12k *ar); 6067 int ath12k_wmi_wow_enable(struct ath12k *ar); 6068 int ath12k_wmi_wow_del_pattern(struct ath12k *ar, u32 vdev_id, u32 pattern_id); 6069 int ath12k_wmi_wow_add_pattern(struct ath12k *ar, u32 vdev_id, u32 pattern_id, 6070 const u8 *pattern, const u8 *mask, 6071 int pattern_len, int pattern_offset); 6072 int ath12k_wmi_wow_add_wakeup_event(struct ath12k *ar, u32 vdev_id, 6073 enum wmi_wow_wakeup_event event, 6074 u32 enable); 6075 int ath12k_wmi_wow_config_pno(struct ath12k *ar, u32 vdev_id, 6076 struct wmi_pno_scan_req_arg *pno_scan); 6077 int ath12k_wmi_hw_data_filter_cmd(struct ath12k *ar, 6078 struct wmi_hw_data_filter_arg *arg); 6079 int ath12k_wmi_arp_ns_offload(struct ath12k *ar, 6080 struct ath12k_link_vif *arvif, 6081 struct wmi_arp_ns_offload_arg *offload, 6082 bool enable); 6083 int ath12k_wmi_gtk_rekey_offload(struct ath12k *ar, 6084 struct ath12k_link_vif *arvif, bool enable); 6085 int ath12k_wmi_gtk_rekey_getinfo(struct ath12k *ar, 6086 struct ath12k_link_vif *arvif); 6087 int ath12k_wmi_sta_keepalive(struct ath12k *ar, 6088 const struct wmi_sta_keepalive_arg *arg); 6089 int ath12k_wmi_mlo_setup(struct ath12k *ar, struct wmi_mlo_setup_arg *mlo_params); 6090 int ath12k_wmi_mlo_ready(struct ath12k *ar); 6091 int ath12k_wmi_mlo_teardown(struct ath12k *ar); 6092 void ath12k_wmi_fw_stats_dump(struct ath12k *ar, 6093 struct ath12k_fw_stats *fw_stats, u32 stats_id, 6094 char *buf); 6095 6096 #endif 6097