1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */ 2 /* 3 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved. 4 * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved. 5 */ 6 7 #ifndef ATH12K_WMI_H 8 #define ATH12K_WMI_H 9 10 #include <net/mac80211.h> 11 #include "htc.h" 12 13 /* Naming conventions for structures: 14 * 15 * _cmd means that this is a firmware command sent from host to firmware. 16 * 17 * _event means that this is a firmware event sent from firmware to host 18 * 19 * _params is a structure which is embedded either into _cmd or _event (or 20 * both), it is not sent individually. 21 * 22 * _arg is used inside the host, the firmware does not see that at all. 23 */ 24 25 struct ath12k_base; 26 struct ath12k; 27 struct ath12k_link_vif; 28 29 /* There is no signed version of __le32, so for a temporary solution come 30 * up with our own version. The idea is from fs/ntfs/endian.h. 31 * 32 * Use a_ prefix so that it doesn't conflict if we get proper support to 33 * linux/types.h. 34 */ 35 typedef __s32 __bitwise a_sle32; 36 37 static inline a_sle32 a_cpu_to_sle32(s32 val) 38 { 39 return (__force a_sle32)cpu_to_le32(val); 40 } 41 42 static inline s32 a_sle32_to_cpu(a_sle32 val) 43 { 44 return le32_to_cpu((__force __le32)val); 45 } 46 47 /* defines to set Packet extension values which can be 0 us, 8 usec or 16 usec */ 48 #define MAX_HE_NSS 8 49 #define MAX_HE_MODULATION 8 50 #define MAX_HE_RU 4 51 #define HE_MODULATION_NONE 7 52 #define HE_PET_0_USEC 0 53 #define HE_PET_8_USEC 1 54 #define HE_PET_16_USEC 2 55 56 #define WMI_MAX_CHAINS 8 57 58 #define WMI_MAX_NUM_SS MAX_HE_NSS 59 #define WMI_MAX_NUM_RU MAX_HE_RU 60 61 #define WMI_TLV_CMD(grp_id) (((grp_id) << 12) | 0x1) 62 #define WMI_TLV_EV(grp_id) (((grp_id) << 12) | 0x1) 63 #define WMI_TLV_CMD_UNSUPPORTED 0 64 #define WMI_TLV_PDEV_PARAM_UNSUPPORTED 0 65 #define WMI_TLV_VDEV_PARAM_UNSUPPORTED 0 66 67 struct wmi_cmd_hdr { 68 __le32 cmd_id; 69 } __packed; 70 71 struct wmi_tlv { 72 __le32 header; 73 u8 value[]; 74 } __packed; 75 76 #define WMI_TLV_LEN GENMASK(15, 0) 77 #define WMI_TLV_TAG GENMASK(31, 16) 78 #define TLV_HDR_SIZE sizeof_field(struct wmi_tlv, header) 79 80 #define WMI_CMD_HDR_CMD_ID GENMASK(23, 0) 81 #define WMI_MAX_MEM_REQS 32 82 #define ATH12K_MAX_HW_LISTEN_INTERVAL 5 83 84 #define WMI_HOST_RC_DS_FLAG 0x01 85 #define WMI_HOST_RC_CW40_FLAG 0x02 86 #define WMI_HOST_RC_SGI_FLAG 0x04 87 #define WMI_HOST_RC_HT_FLAG 0x08 88 #define WMI_HOST_RC_RTSCTS_FLAG 0x10 89 #define WMI_HOST_RC_TX_STBC_FLAG 0x20 90 #define WMI_HOST_RC_RX_STBC_FLAG 0xC0 91 #define WMI_HOST_RC_RX_STBC_FLAG_S 6 92 #define WMI_HOST_RC_WEP_TKIP_FLAG 0x100 93 #define WMI_HOST_RC_TS_FLAG 0x200 94 #define WMI_HOST_RC_UAPSD_FLAG 0x400 95 96 #define WMI_HT_CAP_ENABLED 0x0001 97 #define WMI_HT_CAP_HT20_SGI 0x0002 98 #define WMI_HT_CAP_DYNAMIC_SMPS 0x0004 99 #define WMI_HT_CAP_TX_STBC 0x0008 100 #define WMI_HT_CAP_TX_STBC_MASK_SHIFT 3 101 #define WMI_HT_CAP_RX_STBC 0x0030 102 #define WMI_HT_CAP_RX_STBC_MASK_SHIFT 4 103 #define WMI_HT_CAP_LDPC 0x0040 104 #define WMI_HT_CAP_L_SIG_TXOP_PROT 0x0080 105 #define WMI_HT_CAP_MPDU_DENSITY 0x0700 106 #define WMI_HT_CAP_MPDU_DENSITY_MASK_SHIFT 8 107 #define WMI_HT_CAP_HT40_SGI 0x0800 108 #define WMI_HT_CAP_RX_LDPC 0x1000 109 #define WMI_HT_CAP_TX_LDPC 0x2000 110 #define WMI_HT_CAP_IBF_BFER 0x4000 111 112 /* These macros should be used when we wish to advertise STBC support for 113 * only 1SS or 2SS or 3SS. 114 */ 115 #define WMI_HT_CAP_RX_STBC_1SS 0x0010 116 #define WMI_HT_CAP_RX_STBC_2SS 0x0020 117 #define WMI_HT_CAP_RX_STBC_3SS 0x0030 118 119 #define WMI_HT_CAP_DEFAULT_ALL (WMI_HT_CAP_ENABLED | \ 120 WMI_HT_CAP_HT20_SGI | \ 121 WMI_HT_CAP_HT40_SGI | \ 122 WMI_HT_CAP_TX_STBC | \ 123 WMI_HT_CAP_RX_STBC | \ 124 WMI_HT_CAP_LDPC) 125 126 #define WMI_VHT_CAP_MAX_MPDU_LEN_MASK 0x00000003 127 #define WMI_VHT_CAP_RX_LDPC 0x00000010 128 #define WMI_VHT_CAP_SGI_80MHZ 0x00000020 129 #define WMI_VHT_CAP_SGI_160MHZ 0x00000040 130 #define WMI_VHT_CAP_TX_STBC 0x00000080 131 #define WMI_VHT_CAP_RX_STBC_MASK 0x00000300 132 #define WMI_VHT_CAP_RX_STBC_MASK_SHIFT 8 133 #define WMI_VHT_CAP_SU_BFER 0x00000800 134 #define WMI_VHT_CAP_SU_BFEE 0x00001000 135 #define WMI_VHT_CAP_MAX_CS_ANT_MASK 0x0000E000 136 #define WMI_VHT_CAP_MAX_CS_ANT_MASK_SHIFT 13 137 #define WMI_VHT_CAP_MAX_SND_DIM_MASK 0x00070000 138 #define WMI_VHT_CAP_MAX_SND_DIM_MASK_SHIFT 16 139 #define WMI_VHT_CAP_MU_BFER 0x00080000 140 #define WMI_VHT_CAP_MU_BFEE 0x00100000 141 #define WMI_VHT_CAP_MAX_AMPDU_LEN_EXP 0x03800000 142 #define WMI_VHT_CAP_MAX_AMPDU_LEN_EXP_SHIT 23 143 #define WMI_VHT_CAP_RX_FIXED_ANT 0x10000000 144 #define WMI_VHT_CAP_TX_FIXED_ANT 0x20000000 145 146 #define WMI_VHT_CAP_MAX_MPDU_LEN_11454 0x00000002 147 148 /* These macros should be used when we wish to advertise STBC support for 149 * only 1SS or 2SS or 3SS. 150 */ 151 #define WMI_VHT_CAP_RX_STBC_1SS 0x00000100 152 #define WMI_VHT_CAP_RX_STBC_2SS 0x00000200 153 #define WMI_VHT_CAP_RX_STBC_3SS 0x00000300 154 155 #define WMI_VHT_CAP_DEFAULT_ALL (WMI_VHT_CAP_MAX_MPDU_LEN_11454 | \ 156 WMI_VHT_CAP_SGI_80MHZ | \ 157 WMI_VHT_CAP_TX_STBC | \ 158 WMI_VHT_CAP_RX_STBC_MASK | \ 159 WMI_VHT_CAP_RX_LDPC | \ 160 WMI_VHT_CAP_MAX_AMPDU_LEN_EXP | \ 161 WMI_VHT_CAP_RX_FIXED_ANT | \ 162 WMI_VHT_CAP_TX_FIXED_ANT) 163 164 #define WLAN_SCAN_MAX_HINT_S_SSID 10 165 #define WLAN_SCAN_MAX_HINT_BSSID 10 166 #define MAX_RNR_BSS 5 167 168 #define WMI_APPEND_TO_EXISTING_CHAN_LIST_FLAG 1 169 170 #define WMI_BA_MODE_BUFFER_SIZE_256 3 171 172 /* HW mode config type replicated from FW header 173 * @WMI_HOST_HW_MODE_SINGLE: Only one PHY is active. 174 * @WMI_HOST_HW_MODE_DBS: Both PHYs are active in different bands, 175 * one in 2G and another in 5G. 176 * @WMI_HOST_HW_MODE_SBS_PASSIVE: Both PHYs are in passive mode (only rx) in 177 * same band; no tx allowed. 178 * @WMI_HOST_HW_MODE_SBS: Both PHYs are active in the same band. 179 * Support for both PHYs within one band is planned 180 * for 5G only(as indicated in WMI_MAC_PHY_CAPABILITIES), 181 * but could be extended to other bands in the future. 182 * The separation of the band between the two PHYs needs 183 * to be communicated separately. 184 * @WMI_HOST_HW_MODE_DBS_SBS: 3 PHYs, with 2 on the same band doing SBS 185 * as in WMI_HW_MODE_SBS, and 3rd on the other band 186 * @WMI_HOST_HW_MODE_DBS_OR_SBS: Two PHY with one PHY capabale of both 2G and 187 * 5G. It can support SBS (5G + 5G) OR DBS (5G + 2G). 188 * @WMI_HOST_HW_MODE_MAX: Max hw_mode_id. Used to indicate invalid mode. 189 */ 190 enum wmi_host_hw_mode_config_type { 191 WMI_HOST_HW_MODE_SINGLE = 0, 192 WMI_HOST_HW_MODE_DBS = 1, 193 WMI_HOST_HW_MODE_SBS_PASSIVE = 2, 194 WMI_HOST_HW_MODE_SBS = 3, 195 WMI_HOST_HW_MODE_DBS_SBS = 4, 196 WMI_HOST_HW_MODE_DBS_OR_SBS = 5, 197 198 /* keep last */ 199 WMI_HOST_HW_MODE_MAX 200 }; 201 202 /* HW mode priority values used to detect the preferred HW mode 203 * on the available modes. 204 */ 205 enum wmi_host_hw_mode_priority { 206 WMI_HOST_HW_MODE_DBS_SBS_PRI, 207 WMI_HOST_HW_MODE_DBS_PRI, 208 WMI_HOST_HW_MODE_DBS_OR_SBS_PRI, 209 WMI_HOST_HW_MODE_SBS_PRI, 210 WMI_HOST_HW_MODE_SBS_PASSIVE_PRI, 211 WMI_HOST_HW_MODE_SINGLE_PRI, 212 213 /* keep last the lowest priority */ 214 WMI_HOST_HW_MODE_MAX_PRI 215 }; 216 217 enum WMI_HOST_WLAN_BAND { 218 WMI_HOST_WLAN_2G_CAP = 1, 219 WMI_HOST_WLAN_5G_CAP = 2, 220 WMI_HOST_WLAN_2G_5G_CAP = 3, 221 }; 222 223 enum wmi_cmd_group { 224 /* 0 to 2 are reserved */ 225 WMI_GRP_START = 0x3, 226 WMI_GRP_SCAN = WMI_GRP_START, 227 WMI_GRP_PDEV = 0x4, 228 WMI_GRP_VDEV = 0x5, 229 WMI_GRP_PEER = 0x6, 230 WMI_GRP_MGMT = 0x7, 231 WMI_GRP_BA_NEG = 0x8, 232 WMI_GRP_STA_PS = 0x9, 233 WMI_GRP_DFS = 0xa, 234 WMI_GRP_ROAM = 0xb, 235 WMI_GRP_OFL_SCAN = 0xc, 236 WMI_GRP_P2P = 0xd, 237 WMI_GRP_AP_PS = 0xe, 238 WMI_GRP_RATE_CTRL = 0xf, 239 WMI_GRP_PROFILE = 0x10, 240 WMI_GRP_SUSPEND = 0x11, 241 WMI_GRP_BCN_FILTER = 0x12, 242 WMI_GRP_WOW = 0x13, 243 WMI_GRP_RTT = 0x14, 244 WMI_GRP_SPECTRAL = 0x15, 245 WMI_GRP_STATS = 0x16, 246 WMI_GRP_ARP_NS_OFL = 0x17, 247 WMI_GRP_NLO_OFL = 0x18, 248 WMI_GRP_GTK_OFL = 0x19, 249 WMI_GRP_CSA_OFL = 0x1a, 250 WMI_GRP_CHATTER = 0x1b, 251 WMI_GRP_TID_ADDBA = 0x1c, 252 WMI_GRP_MISC = 0x1d, 253 WMI_GRP_GPIO = 0x1e, 254 WMI_GRP_FWTEST = 0x1f, 255 WMI_GRP_TDLS = 0x20, 256 WMI_GRP_RESMGR = 0x21, 257 WMI_GRP_STA_SMPS = 0x22, 258 WMI_GRP_WLAN_HB = 0x23, 259 WMI_GRP_RMC = 0x24, 260 WMI_GRP_MHF_OFL = 0x25, 261 WMI_GRP_LOCATION_SCAN = 0x26, 262 WMI_GRP_OEM = 0x27, 263 WMI_GRP_NAN = 0x28, 264 WMI_GRP_COEX = 0x29, 265 WMI_GRP_OBSS_OFL = 0x2a, 266 WMI_GRP_LPI = 0x2b, 267 WMI_GRP_EXTSCAN = 0x2c, 268 WMI_GRP_DHCP_OFL = 0x2d, 269 WMI_GRP_IPA = 0x2e, 270 WMI_GRP_MDNS_OFL = 0x2f, 271 WMI_GRP_SAP_OFL = 0x30, 272 WMI_GRP_OCB = 0x31, 273 WMI_GRP_SOC = 0x32, 274 WMI_GRP_PKT_FILTER = 0x33, 275 WMI_GRP_MAWC = 0x34, 276 WMI_GRP_PMF_OFFLOAD = 0x35, 277 WMI_GRP_BPF_OFFLOAD = 0x36, 278 WMI_GRP_NAN_DATA = 0x37, 279 WMI_GRP_PROTOTYPE = 0x38, 280 WMI_GRP_MONITOR = 0x39, 281 WMI_GRP_REGULATORY = 0x3a, 282 WMI_GRP_HW_DATA_FILTER = 0x3b, 283 WMI_GRP_WLM = 0x3c, 284 WMI_GRP_11K_OFFLOAD = 0x3d, 285 WMI_GRP_TWT = 0x3e, 286 WMI_GRP_MOTION_DET = 0x3f, 287 WMI_GRP_SPATIAL_REUSE = 0x40, 288 WMI_GRP_MLO = 0x48, 289 }; 290 291 #define WMI_CMD_GRP(grp_id) (((grp_id) << 12) | 0x1) 292 #define WMI_EVT_GRP_START_ID(grp_id) (((grp_id) << 12) | 0x1) 293 294 enum wmi_tlv_cmd_id { 295 WMI_CMD_UNSUPPORTED = 0, 296 WMI_INIT_CMDID = 0x1, 297 WMI_START_SCAN_CMDID = WMI_TLV_CMD(WMI_GRP_SCAN), 298 WMI_STOP_SCAN_CMDID, 299 WMI_SCAN_CHAN_LIST_CMDID, 300 WMI_SCAN_SCH_PRIO_TBL_CMDID, 301 WMI_SCAN_UPDATE_REQUEST_CMDID, 302 WMI_SCAN_PROB_REQ_OUI_CMDID, 303 WMI_SCAN_ADAPTIVE_DWELL_CONFIG_CMDID, 304 WMI_PDEV_SET_REGDOMAIN_CMDID = WMI_TLV_CMD(WMI_GRP_PDEV), 305 WMI_PDEV_SET_CHANNEL_CMDID, 306 WMI_PDEV_SET_PARAM_CMDID, 307 WMI_PDEV_PKTLOG_ENABLE_CMDID, 308 WMI_PDEV_PKTLOG_DISABLE_CMDID, 309 WMI_PDEV_SET_WMM_PARAMS_CMDID, 310 WMI_PDEV_SET_HT_CAP_IE_CMDID, 311 WMI_PDEV_SET_VHT_CAP_IE_CMDID, 312 WMI_PDEV_SET_DSCP_TID_MAP_CMDID, 313 WMI_PDEV_SET_QUIET_MODE_CMDID, 314 WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID, 315 WMI_PDEV_GET_TPC_CONFIG_CMDID, 316 WMI_PDEV_SET_BASE_MACADDR_CMDID, 317 WMI_PDEV_DUMP_CMDID, 318 WMI_PDEV_SET_LED_CONFIG_CMDID, 319 WMI_PDEV_GET_TEMPERATURE_CMDID, 320 WMI_PDEV_SET_LED_FLASHING_CMDID, 321 WMI_PDEV_SMART_ANT_ENABLE_CMDID, 322 WMI_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID, 323 WMI_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID, 324 WMI_PDEV_SET_CTL_TABLE_CMDID, 325 WMI_PDEV_SET_MIMOGAIN_TABLE_CMDID, 326 WMI_PDEV_FIPS_CMDID, 327 WMI_PDEV_GET_ANI_CCK_CONFIG_CMDID, 328 WMI_PDEV_GET_ANI_OFDM_CONFIG_CMDID, 329 WMI_PDEV_GET_NFCAL_POWER_CMDID, 330 WMI_PDEV_GET_TPC_CMDID, 331 WMI_MIB_STATS_ENABLE_CMDID, 332 WMI_PDEV_SET_PCL_CMDID, 333 WMI_PDEV_SET_HW_MODE_CMDID, 334 WMI_PDEV_SET_MAC_CONFIG_CMDID, 335 WMI_PDEV_SET_ANTENNA_MODE_CMDID, 336 WMI_SET_PERIODIC_CHANNEL_STATS_CONFIG_CMDID, 337 WMI_PDEV_WAL_POWER_DEBUG_CMDID, 338 WMI_PDEV_SET_REORDER_TIMEOUT_VAL_CMDID, 339 WMI_PDEV_SET_WAKEUP_CONFIG_CMDID, 340 WMI_PDEV_GET_ANTDIV_STATUS_CMDID, 341 WMI_PDEV_GET_CHIP_POWER_STATS_CMDID, 342 WMI_PDEV_SET_STATS_THRESHOLD_CMDID, 343 WMI_PDEV_MULTIPLE_VDEV_RESTART_REQUEST_CMDID, 344 WMI_PDEV_UPDATE_PKT_ROUTING_CMDID, 345 WMI_PDEV_CHECK_CAL_VERSION_CMDID, 346 WMI_PDEV_SET_DIVERSITY_GAIN_CMDID, 347 WMI_PDEV_DIV_GET_RSSI_ANTID_CMDID, 348 WMI_PDEV_BSS_CHAN_INFO_REQUEST_CMDID, 349 WMI_PDEV_UPDATE_PMK_CACHE_CMDID, 350 WMI_PDEV_UPDATE_FILS_HLP_PKT_CMDID, 351 WMI_PDEV_UPDATE_CTLTABLE_REQUEST_CMDID, 352 WMI_PDEV_CONFIG_VENDOR_OUI_ACTION_CMDID, 353 WMI_PDEV_SET_AC_TX_QUEUE_OPTIMIZED_CMDID, 354 WMI_PDEV_SET_RX_FILTER_PROMISCUOUS_CMDID, 355 WMI_PDEV_DMA_RING_CFG_REQ_CMDID, 356 WMI_PDEV_HE_TB_ACTION_FRM_CMDID, 357 WMI_PDEV_PKTLOG_FILTER_CMDID, 358 WMI_PDEV_SET_BIOS_SAR_TABLE_CMDID = 0x4044, 359 WMI_PDEV_SET_BIOS_GEO_TABLE_CMDID = 0x4045, 360 WMI_PDEV_SET_BIOS_INTERFACE_CMDID = 0x404A, 361 WMI_VDEV_CREATE_CMDID = WMI_TLV_CMD(WMI_GRP_VDEV), 362 WMI_VDEV_DELETE_CMDID, 363 WMI_VDEV_START_REQUEST_CMDID, 364 WMI_VDEV_RESTART_REQUEST_CMDID, 365 WMI_VDEV_UP_CMDID, 366 WMI_VDEV_STOP_CMDID, 367 WMI_VDEV_DOWN_CMDID, 368 WMI_VDEV_SET_PARAM_CMDID, 369 WMI_VDEV_INSTALL_KEY_CMDID, 370 WMI_VDEV_WNM_SLEEPMODE_CMDID, 371 WMI_VDEV_WMM_ADDTS_CMDID, 372 WMI_VDEV_WMM_DELTS_CMDID, 373 WMI_VDEV_SET_WMM_PARAMS_CMDID, 374 WMI_VDEV_SET_GTX_PARAMS_CMDID, 375 WMI_VDEV_IPSEC_NATKEEPALIVE_FILTER_CMDID, 376 WMI_VDEV_PLMREQ_START_CMDID, 377 WMI_VDEV_PLMREQ_STOP_CMDID, 378 WMI_VDEV_TSF_TSTAMP_ACTION_CMDID, 379 WMI_VDEV_SET_IE_CMDID, 380 WMI_VDEV_RATEMASK_CMDID, 381 WMI_VDEV_ATF_REQUEST_CMDID, 382 WMI_VDEV_SET_DSCP_TID_MAP_CMDID, 383 WMI_VDEV_FILTER_NEIGHBOR_RX_PACKETS_CMDID, 384 WMI_VDEV_SET_QUIET_MODE_CMDID, 385 WMI_VDEV_SET_CUSTOM_AGGR_SIZE_CMDID, 386 WMI_VDEV_ENCRYPT_DECRYPT_DATA_REQ_CMDID, 387 WMI_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_CMDID, 388 WMI_PEER_CREATE_CMDID = WMI_TLV_CMD(WMI_GRP_PEER), 389 WMI_PEER_DELETE_CMDID, 390 WMI_PEER_FLUSH_TIDS_CMDID, 391 WMI_PEER_SET_PARAM_CMDID, 392 WMI_PEER_ASSOC_CMDID, 393 WMI_PEER_ADD_WDS_ENTRY_CMDID, 394 WMI_PEER_REMOVE_WDS_ENTRY_CMDID, 395 WMI_PEER_MCAST_GROUP_CMDID, 396 WMI_PEER_INFO_REQ_CMDID, 397 WMI_PEER_GET_ESTIMATED_LINKSPEED_CMDID, 398 WMI_PEER_SET_RATE_REPORT_CONDITION_CMDID, 399 WMI_PEER_UPDATE_WDS_ENTRY_CMDID, 400 WMI_PEER_ADD_PROXY_STA_ENTRY_CMDID, 401 WMI_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID, 402 WMI_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID, 403 WMI_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID, 404 WMI_PEER_ATF_REQUEST_CMDID, 405 WMI_PEER_BWF_REQUEST_CMDID, 406 WMI_PEER_REORDER_QUEUE_SETUP_CMDID, 407 WMI_PEER_REORDER_QUEUE_REMOVE_CMDID, 408 WMI_PEER_SET_RX_BLOCKSIZE_CMDID, 409 WMI_PEER_ANTDIV_INFO_REQ_CMDID, 410 WMI_BCN_TX_CMDID = WMI_TLV_CMD(WMI_GRP_MGMT), 411 WMI_PDEV_SEND_BCN_CMDID, 412 WMI_BCN_TMPL_CMDID, 413 WMI_BCN_FILTER_RX_CMDID, 414 WMI_PRB_REQ_FILTER_RX_CMDID, 415 WMI_MGMT_TX_CMDID, 416 WMI_PRB_TMPL_CMDID, 417 WMI_MGMT_TX_SEND_CMDID, 418 WMI_OFFCHAN_DATA_TX_SEND_CMDID, 419 WMI_PDEV_SEND_FD_CMDID, 420 WMI_BCN_OFFLOAD_CTRL_CMDID, 421 WMI_BSS_COLOR_CHANGE_ENABLE_CMDID, 422 WMI_VDEV_BCN_OFFLOAD_QUIET_CONFIG_CMDID, 423 WMI_FILS_DISCOVERY_TMPL_CMDID, 424 WMI_ADDBA_CLEAR_RESP_CMDID = WMI_TLV_CMD(WMI_GRP_BA_NEG), 425 WMI_ADDBA_SEND_CMDID, 426 WMI_ADDBA_STATUS_CMDID, 427 WMI_DELBA_SEND_CMDID, 428 WMI_ADDBA_SET_RESP_CMDID, 429 WMI_SEND_SINGLEAMSDU_CMDID, 430 WMI_STA_POWERSAVE_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_STA_PS), 431 WMI_STA_POWERSAVE_PARAM_CMDID, 432 WMI_STA_MIMO_PS_MODE_CMDID, 433 WMI_PDEV_DFS_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_DFS), 434 WMI_PDEV_DFS_DISABLE_CMDID, 435 WMI_DFS_PHYERR_FILTER_ENA_CMDID, 436 WMI_DFS_PHYERR_FILTER_DIS_CMDID, 437 WMI_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMDID, 438 WMI_PDEV_DFS_PHYERR_OFFLOAD_DISABLE_CMDID, 439 WMI_VDEV_ADFS_CH_CFG_CMDID, 440 WMI_VDEV_ADFS_OCAC_ABORT_CMDID, 441 WMI_ROAM_SCAN_MODE = WMI_TLV_CMD(WMI_GRP_ROAM), 442 WMI_ROAM_SCAN_RSSI_THRESHOLD, 443 WMI_ROAM_SCAN_PERIOD, 444 WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, 445 WMI_ROAM_AP_PROFILE, 446 WMI_ROAM_CHAN_LIST, 447 WMI_ROAM_SCAN_CMD, 448 WMI_ROAM_SYNCH_COMPLETE, 449 WMI_ROAM_SET_RIC_REQUEST_CMDID, 450 WMI_ROAM_INVOKE_CMDID, 451 WMI_ROAM_FILTER_CMDID, 452 WMI_ROAM_SUBNET_CHANGE_CONFIG_CMDID, 453 WMI_ROAM_CONFIGURE_MAWC_CMDID, 454 WMI_ROAM_SET_MBO_PARAM_CMDID, 455 WMI_ROAM_PER_CONFIG_CMDID, 456 WMI_ROAM_BTM_CONFIG_CMDID, 457 WMI_ENABLE_FILS_CMDID, 458 WMI_OFL_SCAN_ADD_AP_PROFILE = WMI_TLV_CMD(WMI_GRP_OFL_SCAN), 459 WMI_OFL_SCAN_REMOVE_AP_PROFILE, 460 WMI_OFL_SCAN_PERIOD, 461 WMI_P2P_DEV_SET_DEVICE_INFO = WMI_TLV_CMD(WMI_GRP_P2P), 462 WMI_P2P_DEV_SET_DISCOVERABILITY, 463 WMI_P2P_GO_SET_BEACON_IE, 464 WMI_P2P_GO_SET_PROBE_RESP_IE, 465 WMI_P2P_SET_VENDOR_IE_DATA_CMDID, 466 WMI_P2P_DISC_OFFLOAD_CONFIG_CMDID, 467 WMI_P2P_DISC_OFFLOAD_APPIE_CMDID, 468 WMI_P2P_DISC_OFFLOAD_PATTERN_CMDID, 469 WMI_P2P_SET_OPPPS_PARAM_CMDID, 470 WMI_P2P_LISTEN_OFFLOAD_START_CMDID, 471 WMI_P2P_LISTEN_OFFLOAD_STOP_CMDID, 472 WMI_AP_PS_PEER_PARAM_CMDID = WMI_TLV_CMD(WMI_GRP_AP_PS), 473 WMI_AP_PS_PEER_UAPSD_COEX_CMDID, 474 WMI_AP_PS_EGAP_PARAM_CMDID, 475 WMI_PEER_RATE_RETRY_SCHED_CMDID = WMI_TLV_CMD(WMI_GRP_RATE_CTRL), 476 WMI_WLAN_PROFILE_TRIGGER_CMDID = WMI_TLV_CMD(WMI_GRP_PROFILE), 477 WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID, 478 WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID, 479 WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID, 480 WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID, 481 WMI_PDEV_SUSPEND_CMDID = WMI_TLV_CMD(WMI_GRP_SUSPEND), 482 WMI_PDEV_RESUME_CMDID, 483 WMI_ADD_BCN_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_BCN_FILTER), 484 WMI_RMV_BCN_FILTER_CMDID, 485 WMI_WOW_ADD_WAKE_PATTERN_CMDID = WMI_TLV_CMD(WMI_GRP_WOW), 486 WMI_WOW_DEL_WAKE_PATTERN_CMDID, 487 WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID, 488 WMI_WOW_ENABLE_CMDID, 489 WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID, 490 WMI_WOW_IOAC_ADD_KEEPALIVE_CMDID, 491 WMI_WOW_IOAC_DEL_KEEPALIVE_CMDID, 492 WMI_WOW_IOAC_ADD_WAKE_PATTERN_CMDID, 493 WMI_WOW_IOAC_DEL_WAKE_PATTERN_CMDID, 494 WMI_D0_WOW_ENABLE_DISABLE_CMDID, 495 WMI_EXTWOW_ENABLE_CMDID, 496 WMI_EXTWOW_SET_APP_TYPE1_PARAMS_CMDID, 497 WMI_EXTWOW_SET_APP_TYPE2_PARAMS_CMDID, 498 WMI_WOW_ENABLE_ICMPV6_NA_FLT_CMDID, 499 WMI_WOW_UDP_SVC_OFLD_CMDID, 500 WMI_WOW_HOSTWAKEUP_GPIO_PIN_PATTERN_CONFIG_CMDID, 501 WMI_WOW_SET_ACTION_WAKE_UP_CMDID, 502 WMI_RTT_MEASREQ_CMDID = WMI_TLV_CMD(WMI_GRP_RTT), 503 WMI_RTT_TSF_CMDID, 504 WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID = WMI_TLV_CMD(WMI_GRP_SPECTRAL), 505 WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID, 506 WMI_REQUEST_STATS_CMDID = WMI_TLV_CMD(WMI_GRP_STATS), 507 WMI_MCC_SCHED_TRAFFIC_STATS_CMDID, 508 WMI_REQUEST_STATS_EXT_CMDID, 509 WMI_REQUEST_LINK_STATS_CMDID, 510 WMI_START_LINK_STATS_CMDID, 511 WMI_CLEAR_LINK_STATS_CMDID, 512 WMI_GET_FW_MEM_DUMP_CMDID, 513 WMI_DEBUG_MESG_FLUSH_CMDID, 514 WMI_DIAG_EVENT_LOG_CONFIG_CMDID, 515 WMI_REQUEST_WLAN_STATS_CMDID, 516 WMI_REQUEST_RCPI_CMDID, 517 WMI_REQUEST_PEER_STATS_INFO_CMDID, 518 WMI_REQUEST_RADIO_CHAN_STATS_CMDID, 519 WMI_SET_ARP_NS_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_ARP_NS_OFL), 520 WMI_ADD_PROACTIVE_ARP_RSP_PATTERN_CMDID, 521 WMI_DEL_PROACTIVE_ARP_RSP_PATTERN_CMDID, 522 WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_NLO_OFL), 523 WMI_APFIND_CMDID, 524 WMI_PASSPOINT_LIST_CONFIG_CMDID, 525 WMI_NLO_CONFIGURE_MAWC_CMDID, 526 WMI_GTK_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_GTK_OFL), 527 WMI_CSA_OFFLOAD_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_CSA_OFL), 528 WMI_CSA_OFFLOAD_CHANSWITCH_CMDID, 529 WMI_CHATTER_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_CHATTER), 530 WMI_CHATTER_ADD_COALESCING_FILTER_CMDID, 531 WMI_CHATTER_DELETE_COALESCING_FILTER_CMDID, 532 WMI_CHATTER_COALESCING_QUERY_CMDID, 533 WMI_PEER_TID_ADDBA_CMDID = WMI_TLV_CMD(WMI_GRP_TID_ADDBA), 534 WMI_PEER_TID_DELBA_CMDID, 535 WMI_STA_DTIM_PS_METHOD_CMDID, 536 WMI_STA_UAPSD_AUTO_TRIG_CMDID, 537 WMI_STA_KEEPALIVE_CMDID, 538 WMI_BA_REQ_SSN_CMDID, 539 WMI_ECHO_CMDID = WMI_TLV_CMD(WMI_GRP_MISC), 540 WMI_PDEV_UTF_CMDID, 541 WMI_DBGLOG_CFG_CMDID, 542 WMI_PDEV_QVIT_CMDID, 543 WMI_PDEV_FTM_INTG_CMDID, 544 WMI_VDEV_SET_KEEPALIVE_CMDID, 545 WMI_VDEV_GET_KEEPALIVE_CMDID, 546 WMI_FORCE_FW_HANG_CMDID, 547 WMI_SET_MCASTBCAST_FILTER_CMDID, 548 WMI_THERMAL_MGMT_CMDID, 549 WMI_HOST_AUTO_SHUTDOWN_CFG_CMDID, 550 WMI_TPC_CHAINMASK_CONFIG_CMDID, 551 WMI_SET_ANTENNA_DIVERSITY_CMDID, 552 WMI_OCB_SET_SCHED_CMDID, 553 WMI_RSSI_BREACH_MONITOR_CONFIG_CMDID, 554 WMI_LRO_CONFIG_CMDID, 555 WMI_TRANSFER_DATA_TO_FLASH_CMDID, 556 WMI_CONFIG_ENHANCED_MCAST_FILTER_CMDID, 557 WMI_VDEV_WISA_CMDID, 558 WMI_DBGLOG_TIME_STAMP_SYNC_CMDID, 559 WMI_SET_MULTIPLE_MCAST_FILTER_CMDID, 560 WMI_READ_DATA_FROM_FLASH_CMDID, 561 WMI_THERM_THROT_SET_CONF_CMDID, 562 WMI_RUNTIME_DPD_RECAL_CMDID, 563 WMI_GET_TPC_POWER_CMDID, 564 WMI_IDLE_TRIGGER_MONITOR_CMDID, 565 WMI_GPIO_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_GPIO), 566 WMI_GPIO_OUTPUT_CMDID, 567 WMI_TXBF_CMDID, 568 WMI_FWTEST_VDEV_MCC_SET_TBTT_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_FWTEST), 569 WMI_FWTEST_P2P_SET_NOA_PARAM_CMDID, 570 WMI_UNIT_TEST_CMDID, 571 WMI_FWTEST_CMDID, 572 WMI_QBOOST_CFG_CMDID, 573 WMI_TDLS_SET_STATE_CMDID = WMI_TLV_CMD(WMI_GRP_TDLS), 574 WMI_TDLS_PEER_UPDATE_CMDID, 575 WMI_TDLS_SET_OFFCHAN_MODE_CMDID, 576 WMI_RESMGR_ADAPTIVE_OCS_EN_DIS_CMDID = WMI_TLV_CMD(WMI_GRP_RESMGR), 577 WMI_RESMGR_SET_CHAN_TIME_QUOTA_CMDID, 578 WMI_RESMGR_SET_CHAN_LATENCY_CMDID, 579 WMI_STA_SMPS_FORCE_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_STA_SMPS), 580 WMI_STA_SMPS_PARAM_CMDID, 581 WMI_HB_SET_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_WLAN_HB), 582 WMI_HB_SET_TCP_PARAMS_CMDID, 583 WMI_HB_SET_TCP_PKT_FILTER_CMDID, 584 WMI_HB_SET_UDP_PARAMS_CMDID, 585 WMI_HB_SET_UDP_PKT_FILTER_CMDID, 586 WMI_RMC_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_RMC), 587 WMI_RMC_SET_ACTION_PERIOD_CMDID, 588 WMI_RMC_CONFIG_CMDID, 589 WMI_RMC_SET_MANUAL_LEADER_CMDID, 590 WMI_MHF_OFFLOAD_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_MHF_OFL), 591 WMI_MHF_OFFLOAD_PLUMB_ROUTING_TBL_CMDID, 592 WMI_BATCH_SCAN_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_LOCATION_SCAN), 593 WMI_BATCH_SCAN_DISABLE_CMDID, 594 WMI_BATCH_SCAN_TRIGGER_RESULT_CMDID, 595 WMI_OEM_REQ_CMDID = WMI_TLV_CMD(WMI_GRP_OEM), 596 WMI_OEM_REQUEST_CMDID, 597 WMI_LPI_OEM_REQ_CMDID, 598 WMI_NAN_CMDID = WMI_TLV_CMD(WMI_GRP_NAN), 599 WMI_MODEM_POWER_STATE_CMDID = WMI_TLV_CMD(WMI_GRP_COEX), 600 WMI_CHAN_AVOID_UPDATE_CMDID, 601 WMI_COEX_CONFIG_CMDID, 602 WMI_CHAN_AVOID_RPT_ALLOW_CMDID, 603 WMI_COEX_GET_ANTENNA_ISOLATION_CMDID, 604 WMI_SAR_LIMITS_CMDID, 605 WMI_OBSS_SCAN_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_OBSS_OFL), 606 WMI_OBSS_SCAN_DISABLE_CMDID, 607 WMI_OBSS_COLOR_COLLISION_DET_CONFIG_CMDID, 608 WMI_LPI_MGMT_SNOOPING_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_LPI), 609 WMI_LPI_START_SCAN_CMDID, 610 WMI_LPI_STOP_SCAN_CMDID, 611 WMI_EXTSCAN_START_CMDID = WMI_TLV_CMD(WMI_GRP_EXTSCAN), 612 WMI_EXTSCAN_STOP_CMDID, 613 WMI_EXTSCAN_CONFIGURE_WLAN_CHANGE_MONITOR_CMDID, 614 WMI_EXTSCAN_CONFIGURE_HOTLIST_MONITOR_CMDID, 615 WMI_EXTSCAN_GET_CACHED_RESULTS_CMDID, 616 WMI_EXTSCAN_GET_WLAN_CHANGE_RESULTS_CMDID, 617 WMI_EXTSCAN_SET_CAPABILITIES_CMDID, 618 WMI_EXTSCAN_GET_CAPABILITIES_CMDID, 619 WMI_EXTSCAN_CONFIGURE_HOTLIST_SSID_MONITOR_CMDID, 620 WMI_EXTSCAN_CONFIGURE_MAWC_CMDID, 621 WMI_SET_DHCP_SERVER_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_DHCP_OFL), 622 WMI_IPA_OFFLOAD_ENABLE_DISABLE_CMDID = WMI_TLV_CMD(WMI_GRP_IPA), 623 WMI_MDNS_OFFLOAD_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_MDNS_OFL), 624 WMI_MDNS_SET_FQDN_CMDID, 625 WMI_MDNS_SET_RESPONSE_CMDID, 626 WMI_MDNS_GET_STATS_CMDID, 627 WMI_SAP_OFL_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_SAP_OFL), 628 WMI_SAP_SET_BLACKLIST_PARAM_CMDID, 629 WMI_OCB_SET_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_OCB), 630 WMI_OCB_SET_UTC_TIME_CMDID, 631 WMI_OCB_START_TIMING_ADVERT_CMDID, 632 WMI_OCB_STOP_TIMING_ADVERT_CMDID, 633 WMI_OCB_GET_TSF_TIMER_CMDID, 634 WMI_DCC_GET_STATS_CMDID, 635 WMI_DCC_CLEAR_STATS_CMDID, 636 WMI_DCC_UPDATE_NDL_CMDID, 637 WMI_SOC_SET_PCL_CMDID = WMI_TLV_CMD(WMI_GRP_SOC), 638 WMI_SOC_SET_HW_MODE_CMDID, 639 WMI_SOC_SET_DUAL_MAC_CONFIG_CMDID, 640 WMI_SOC_SET_ANTENNA_MODE_CMDID, 641 WMI_PACKET_FILTER_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_PKT_FILTER), 642 WMI_PACKET_FILTER_ENABLE_CMDID, 643 WMI_MAWC_SENSOR_REPORT_IND_CMDID = WMI_TLV_CMD(WMI_GRP_MAWC), 644 WMI_PMF_OFFLOAD_SET_SA_QUERY_CMDID = WMI_TLV_CMD(WMI_GRP_PMF_OFFLOAD), 645 WMI_BPF_GET_CAPABILITY_CMDID = WMI_TLV_CMD(WMI_GRP_BPF_OFFLOAD), 646 WMI_BPF_GET_VDEV_STATS_CMDID, 647 WMI_BPF_SET_VDEV_INSTRUCTIONS_CMDID, 648 WMI_BPF_DEL_VDEV_INSTRUCTIONS_CMDID, 649 WMI_BPF_SET_VDEV_ACTIVE_MODE_CMDID, 650 WMI_MNT_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_MONITOR), 651 WMI_SET_CURRENT_COUNTRY_CMDID = WMI_TLV_CMD(WMI_GRP_REGULATORY), 652 WMI_11D_SCAN_START_CMDID, 653 WMI_11D_SCAN_STOP_CMDID, 654 WMI_SET_INIT_COUNTRY_CMDID, 655 WMI_NDI_GET_CAP_REQ_CMDID = WMI_TLV_CMD(WMI_GRP_PROTOTYPE), 656 WMI_NDP_INITIATOR_REQ_CMDID, 657 WMI_NDP_RESPONDER_REQ_CMDID, 658 WMI_NDP_END_REQ_CMDID, 659 WMI_HW_DATA_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_HW_DATA_FILTER), 660 WMI_TWT_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_TWT), 661 WMI_TWT_DISABLE_CMDID, 662 WMI_TWT_ADD_DIALOG_CMDID, 663 WMI_TWT_DEL_DIALOG_CMDID, 664 WMI_TWT_PAUSE_DIALOG_CMDID, 665 WMI_TWT_RESUME_DIALOG_CMDID, 666 WMI_PDEV_OBSS_PD_SPATIAL_REUSE_CMDID = 667 WMI_TLV_CMD(WMI_GRP_SPATIAL_REUSE), 668 WMI_PDEV_OBSS_PD_SPATIAL_REUSE_SET_DEF_OBSS_THRESH_CMDID, 669 WMI_MLO_LINK_SET_ACTIVE_CMDID = WMI_TLV_CMD(WMI_GRP_MLO), 670 WMI_MLO_SETUP_CMDID, 671 WMI_MLO_READY_CMDID, 672 WMI_MLO_TEARDOWN_CMDID, 673 }; 674 675 enum wmi_tlv_event_id { 676 WMI_SERVICE_READY_EVENTID = 0x1, 677 WMI_READY_EVENTID, 678 WMI_SERVICE_AVAILABLE_EVENTID, 679 WMI_SCAN_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_SCAN), 680 WMI_PDEV_TPC_CONFIG_EVENTID = WMI_TLV_CMD(WMI_GRP_PDEV), 681 WMI_CHAN_INFO_EVENTID, 682 WMI_PHYERR_EVENTID, 683 WMI_PDEV_DUMP_EVENTID, 684 WMI_TX_PAUSE_EVENTID, 685 WMI_DFS_RADAR_EVENTID, 686 WMI_PDEV_L1SS_TRACK_EVENTID, 687 WMI_PDEV_TEMPERATURE_EVENTID, 688 WMI_SERVICE_READY_EXT_EVENTID, 689 WMI_PDEV_FIPS_EVENTID, 690 WMI_PDEV_CHANNEL_HOPPING_EVENTID, 691 WMI_PDEV_ANI_CCK_LEVEL_EVENTID, 692 WMI_PDEV_ANI_OFDM_LEVEL_EVENTID, 693 WMI_PDEV_TPC_EVENTID, 694 WMI_PDEV_NFCAL_POWER_ALL_CHANNELS_EVENTID, 695 WMI_PDEV_SET_HW_MODE_RESP_EVENTID, 696 WMI_PDEV_HW_MODE_TRANSITION_EVENTID, 697 WMI_PDEV_SET_MAC_CONFIG_RESP_EVENTID, 698 WMI_PDEV_ANTDIV_STATUS_EVENTID, 699 WMI_PDEV_CHIP_POWER_STATS_EVENTID, 700 WMI_PDEV_CHIP_POWER_SAVE_FAILURE_DETECTED_EVENTID, 701 WMI_PDEV_CSA_SWITCH_COUNT_STATUS_EVENTID, 702 WMI_PDEV_CHECK_CAL_VERSION_EVENTID, 703 WMI_PDEV_DIV_RSSI_ANTID_EVENTID, 704 WMI_PDEV_BSS_CHAN_INFO_EVENTID, 705 WMI_PDEV_UPDATE_CTLTABLE_EVENTID, 706 WMI_PDEV_DMA_RING_CFG_RSP_EVENTID, 707 WMI_PDEV_DMA_RING_BUF_RELEASE_EVENTID, 708 WMI_PDEV_CTL_FAILSAFE_CHECK_EVENTID, 709 WMI_PDEV_CSC_SWITCH_COUNT_STATUS_EVENTID, 710 WMI_PDEV_COLD_BOOT_CAL_DATA_EVENTID, 711 WMI_PDEV_RAP_INFO_EVENTID, 712 WMI_CHAN_RF_CHARACTERIZATION_INFO_EVENTID, 713 WMI_SERVICE_READY_EXT2_EVENTID, 714 WMI_PDEV_GET_HALPHY_CAL_STATUS_EVENTID = 715 WMI_SERVICE_READY_EXT2_EVENTID + 4, 716 WMI_VDEV_START_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_VDEV), 717 WMI_VDEV_STOPPED_EVENTID, 718 WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID, 719 WMI_VDEV_MCC_BCN_INTERVAL_CHANGE_REQ_EVENTID, 720 WMI_VDEV_TSF_REPORT_EVENTID, 721 WMI_VDEV_DELETE_RESP_EVENTID, 722 WMI_VDEV_ENCRYPT_DECRYPT_DATA_RESP_EVENTID, 723 WMI_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_STATUS_EVENTID, 724 WMI_PEER_STA_KICKOUT_EVENTID = WMI_TLV_CMD(WMI_GRP_PEER), 725 WMI_PEER_INFO_EVENTID, 726 WMI_PEER_TX_FAIL_CNT_THR_EVENTID, 727 WMI_PEER_ESTIMATED_LINKSPEED_EVENTID, 728 WMI_PEER_STATE_EVENTID, 729 WMI_PEER_ASSOC_CONF_EVENTID, 730 WMI_PEER_DELETE_RESP_EVENTID, 731 WMI_PEER_RATECODE_LIST_EVENTID, 732 WMI_WDS_PEER_EVENTID, 733 WMI_PEER_STA_PS_STATECHG_EVENTID, 734 WMI_PEER_ANTDIV_INFO_EVENTID, 735 WMI_PEER_RESERVED0_EVENTID, 736 WMI_PEER_RESERVED1_EVENTID, 737 WMI_PEER_RESERVED2_EVENTID, 738 WMI_PEER_RESERVED3_EVENTID, 739 WMI_PEER_RESERVED4_EVENTID, 740 WMI_PEER_RESERVED5_EVENTID, 741 WMI_PEER_RESERVED6_EVENTID, 742 WMI_PEER_RESERVED7_EVENTID, 743 WMI_PEER_RESERVED8_EVENTID, 744 WMI_PEER_RESERVED9_EVENTID, 745 WMI_PEER_RESERVED10_EVENTID, 746 WMI_PEER_OPER_MODE_CHANGE_EVENTID, 747 WMI_MGMT_RX_EVENTID = WMI_TLV_CMD(WMI_GRP_MGMT), 748 WMI_HOST_SWBA_EVENTID, 749 WMI_TBTTOFFSET_UPDATE_EVENTID, 750 WMI_OFFLOAD_BCN_TX_STATUS_EVENTID, 751 WMI_OFFLOAD_PROB_RESP_TX_STATUS_EVENTID, 752 WMI_MGMT_TX_COMPLETION_EVENTID, 753 WMI_MGMT_TX_BUNDLE_COMPLETION_EVENTID, 754 WMI_TBTTOFFSET_EXT_UPDATE_EVENTID, 755 WMI_OFFCHAN_DATA_TX_COMPLETION_EVENTID, 756 WMI_HOST_FILS_DISCOVERY_EVENTID, 757 WMI_MGMT_RX_FW_CONSUMED_EVENTID = WMI_HOST_FILS_DISCOVERY_EVENTID + 3, 758 WMI_TX_DELBA_COMPLETE_EVENTID = WMI_TLV_CMD(WMI_GRP_BA_NEG), 759 WMI_TX_ADDBA_COMPLETE_EVENTID, 760 WMI_BA_RSP_SSN_EVENTID, 761 WMI_AGGR_STATE_TRIG_EVENTID, 762 WMI_ROAM_EVENTID = WMI_TLV_CMD(WMI_GRP_ROAM), 763 WMI_PROFILE_MATCH, 764 WMI_ROAM_SYNCH_EVENTID, 765 WMI_P2P_DISC_EVENTID = WMI_TLV_CMD(WMI_GRP_P2P), 766 WMI_P2P_NOA_EVENTID, 767 WMI_P2P_LISTEN_OFFLOAD_STOPPED_EVENTID, 768 WMI_AP_PS_EGAP_INFO_EVENTID = WMI_TLV_CMD(WMI_GRP_AP_PS), 769 WMI_PDEV_RESUME_EVENTID = WMI_TLV_CMD(WMI_GRP_SUSPEND), 770 WMI_WOW_WAKEUP_HOST_EVENTID = WMI_TLV_CMD(WMI_GRP_WOW), 771 WMI_D0_WOW_DISABLE_ACK_EVENTID, 772 WMI_WOW_INITIAL_WAKEUP_EVENTID, 773 WMI_RTT_MEASUREMENT_REPORT_EVENTID = WMI_TLV_CMD(WMI_GRP_RTT), 774 WMI_TSF_MEASUREMENT_REPORT_EVENTID, 775 WMI_RTT_ERROR_REPORT_EVENTID, 776 WMI_STATS_EXT_EVENTID = WMI_TLV_CMD(WMI_GRP_STATS), 777 WMI_IFACE_LINK_STATS_EVENTID, 778 WMI_PEER_LINK_STATS_EVENTID, 779 WMI_RADIO_LINK_STATS_EVENTID, 780 WMI_UPDATE_FW_MEM_DUMP_EVENTID, 781 WMI_DIAG_EVENT_LOG_SUPPORTED_EVENTID, 782 WMI_INST_RSSI_STATS_EVENTID, 783 WMI_RADIO_TX_POWER_LEVEL_STATS_EVENTID, 784 WMI_REPORT_STATS_EVENTID, 785 WMI_UPDATE_RCPI_EVENTID, 786 WMI_PEER_STATS_INFO_EVENTID, 787 WMI_RADIO_CHAN_STATS_EVENTID, 788 WMI_NLO_MATCH_EVENTID = WMI_TLV_CMD(WMI_GRP_NLO_OFL), 789 WMI_NLO_SCAN_COMPLETE_EVENTID, 790 WMI_APFIND_EVENTID, 791 WMI_PASSPOINT_MATCH_EVENTID, 792 WMI_GTK_OFFLOAD_STATUS_EVENTID = WMI_TLV_CMD(WMI_GRP_GTK_OFL), 793 WMI_GTK_REKEY_FAIL_EVENTID, 794 WMI_CSA_HANDLING_EVENTID = WMI_TLV_CMD(WMI_GRP_CSA_OFL), 795 WMI_CHATTER_PC_QUERY_EVENTID = WMI_TLV_CMD(WMI_GRP_CHATTER), 796 WMI_PDEV_DFS_RADAR_DETECTION_EVENTID = WMI_TLV_CMD(WMI_GRP_DFS), 797 WMI_VDEV_DFS_CAC_COMPLETE_EVENTID, 798 WMI_VDEV_ADFS_OCAC_COMPLETE_EVENTID, 799 WMI_ECHO_EVENTID = WMI_TLV_CMD(WMI_GRP_MISC), 800 WMI_PDEV_UTF_EVENTID, 801 WMI_DEBUG_MESG_EVENTID, 802 WMI_UPDATE_STATS_EVENTID, 803 WMI_DEBUG_PRINT_EVENTID, 804 WMI_DCS_INTERFERENCE_EVENTID, 805 WMI_PDEV_QVIT_EVENTID, 806 WMI_WLAN_PROFILE_DATA_EVENTID, 807 WMI_PDEV_FTM_INTG_EVENTID, 808 WMI_WLAN_FREQ_AVOID_EVENTID, 809 WMI_VDEV_GET_KEEPALIVE_EVENTID, 810 WMI_THERMAL_MGMT_EVENTID, 811 WMI_DIAG_DATA_CONTAINER_EVENTID, 812 WMI_HOST_AUTO_SHUTDOWN_EVENTID, 813 WMI_UPDATE_WHAL_MIB_STATS_EVENTID, 814 WMI_UPDATE_VDEV_RATE_STATS_EVENTID, 815 WMI_DIAG_EVENTID, 816 WMI_OCB_SET_SCHED_EVENTID, 817 WMI_DEBUG_MESG_FLUSH_COMPLETE_EVENTID, 818 WMI_RSSI_BREACH_EVENTID, 819 WMI_TRANSFER_DATA_TO_FLASH_COMPLETE_EVENTID, 820 WMI_PDEV_UTF_SCPC_EVENTID, 821 WMI_READ_DATA_FROM_FLASH_EVENTID, 822 WMI_REPORT_RX_AGGR_FAILURE_EVENTID, 823 WMI_PKGID_EVENTID, 824 WMI_GPIO_INPUT_EVENTID = WMI_TLV_CMD(WMI_GRP_GPIO), 825 WMI_UPLOADH_EVENTID, 826 WMI_CAPTUREH_EVENTID, 827 WMI_RFKILL_STATE_CHANGE_EVENTID, 828 WMI_TDLS_PEER_EVENTID = WMI_TLV_CMD(WMI_GRP_TDLS), 829 WMI_STA_SMPS_FORCE_MODE_COMPL_EVENTID = WMI_TLV_CMD(WMI_GRP_STA_SMPS), 830 WMI_BATCH_SCAN_ENABLED_EVENTID = WMI_TLV_CMD(WMI_GRP_LOCATION_SCAN), 831 WMI_BATCH_SCAN_RESULT_EVENTID, 832 WMI_OEM_CAPABILITY_EVENTID = WMI_TLV_CMD(WMI_GRP_OEM), 833 WMI_OEM_MEASUREMENT_REPORT_EVENTID, 834 WMI_OEM_ERROR_REPORT_EVENTID, 835 WMI_OEM_RESPONSE_EVENTID, 836 WMI_NAN_EVENTID = WMI_TLV_CMD(WMI_GRP_NAN), 837 WMI_NAN_DISC_IFACE_CREATED_EVENTID, 838 WMI_NAN_DISC_IFACE_DELETED_EVENTID, 839 WMI_NAN_STARTED_CLUSTER_EVENTID, 840 WMI_NAN_JOINED_CLUSTER_EVENTID, 841 WMI_COEX_REPORT_ANTENNA_ISOLATION_EVENTID = WMI_TLV_CMD(WMI_GRP_COEX), 842 WMI_LPI_RESULT_EVENTID = WMI_TLV_CMD(WMI_GRP_LPI), 843 WMI_LPI_STATUS_EVENTID, 844 WMI_LPI_HANDOFF_EVENTID, 845 WMI_EXTSCAN_START_STOP_EVENTID = WMI_TLV_CMD(WMI_GRP_EXTSCAN), 846 WMI_EXTSCAN_OPERATION_EVENTID, 847 WMI_EXTSCAN_TABLE_USAGE_EVENTID, 848 WMI_EXTSCAN_CACHED_RESULTS_EVENTID, 849 WMI_EXTSCAN_WLAN_CHANGE_RESULTS_EVENTID, 850 WMI_EXTSCAN_HOTLIST_MATCH_EVENTID, 851 WMI_EXTSCAN_CAPABILITIES_EVENTID, 852 WMI_EXTSCAN_HOTLIST_SSID_MATCH_EVENTID, 853 WMI_MDNS_STATS_EVENTID = WMI_TLV_CMD(WMI_GRP_MDNS_OFL), 854 WMI_SAP_OFL_ADD_STA_EVENTID = WMI_TLV_CMD(WMI_GRP_SAP_OFL), 855 WMI_SAP_OFL_DEL_STA_EVENTID, 856 WMI_OBSS_COLOR_COLLISION_DETECTION_EVENTID = 857 WMI_EVT_GRP_START_ID(WMI_GRP_OBSS_OFL), 858 WMI_OCB_SET_CONFIG_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_OCB), 859 WMI_OCB_GET_TSF_TIMER_RESP_EVENTID, 860 WMI_DCC_GET_STATS_RESP_EVENTID, 861 WMI_DCC_UPDATE_NDL_RESP_EVENTID, 862 WMI_DCC_STATS_EVENTID, 863 WMI_SOC_SET_HW_MODE_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_SOC), 864 WMI_SOC_HW_MODE_TRANSITION_EVENTID, 865 WMI_SOC_SET_DUAL_MAC_CONFIG_RESP_EVENTID, 866 WMI_MAWC_ENABLE_SENSOR_EVENTID = WMI_TLV_CMD(WMI_GRP_MAWC), 867 WMI_BPF_CAPABILIY_INFO_EVENTID = WMI_TLV_CMD(WMI_GRP_BPF_OFFLOAD), 868 WMI_BPF_VDEV_STATS_INFO_EVENTID, 869 WMI_RMC_NEW_LEADER_EVENTID = WMI_TLV_CMD(WMI_GRP_RMC), 870 WMI_REG_CHAN_LIST_CC_EVENTID = WMI_TLV_CMD(WMI_GRP_REGULATORY), 871 WMI_11D_NEW_COUNTRY_EVENTID, 872 WMI_REG_CHAN_LIST_CC_EXT_EVENTID, 873 WMI_NDI_CAP_RSP_EVENTID = WMI_TLV_CMD(WMI_GRP_PROTOTYPE), 874 WMI_NDP_INITIATOR_RSP_EVENTID, 875 WMI_NDP_RESPONDER_RSP_EVENTID, 876 WMI_NDP_END_RSP_EVENTID, 877 WMI_NDP_INDICATION_EVENTID, 878 WMI_NDP_CONFIRM_EVENTID, 879 WMI_NDP_END_INDICATION_EVENTID, 880 881 WMI_TWT_ENABLE_EVENTID = WMI_TLV_CMD(WMI_GRP_TWT), 882 WMI_TWT_DISABLE_EVENTID, 883 WMI_TWT_ADD_DIALOG_EVENTID, 884 WMI_TWT_DEL_DIALOG_EVENTID, 885 WMI_TWT_PAUSE_DIALOG_EVENTID, 886 WMI_TWT_RESUME_DIALOG_EVENTID, 887 WMI_MLO_LINK_SET_ACTIVE_RESP_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_MLO), 888 WMI_MLO_SETUP_COMPLETE_EVENTID, 889 WMI_MLO_TEARDOWN_COMPLETE_EVENTID, 890 }; 891 892 enum wmi_tlv_pdev_param { 893 WMI_PDEV_PARAM_TX_CHAIN_MASK = 0x1, 894 WMI_PDEV_PARAM_RX_CHAIN_MASK, 895 WMI_PDEV_PARAM_TXPOWER_LIMIT2G, 896 WMI_PDEV_PARAM_TXPOWER_LIMIT5G, 897 WMI_PDEV_PARAM_TXPOWER_SCALE, 898 WMI_PDEV_PARAM_BEACON_GEN_MODE, 899 WMI_PDEV_PARAM_BEACON_TX_MODE, 900 WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE, 901 WMI_PDEV_PARAM_PROTECTION_MODE, 902 WMI_PDEV_PARAM_DYNAMIC_BW, 903 WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH, 904 WMI_PDEV_PARAM_AGG_SW_RETRY_TH, 905 WMI_PDEV_PARAM_STA_KICKOUT_TH, 906 WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING, 907 WMI_PDEV_PARAM_LTR_ENABLE, 908 WMI_PDEV_PARAM_LTR_AC_LATENCY_BE, 909 WMI_PDEV_PARAM_LTR_AC_LATENCY_BK, 910 WMI_PDEV_PARAM_LTR_AC_LATENCY_VI, 911 WMI_PDEV_PARAM_LTR_AC_LATENCY_VO, 912 WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT, 913 WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE, 914 WMI_PDEV_PARAM_LTR_RX_OVERRIDE, 915 WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT, 916 WMI_PDEV_PARAM_L1SS_ENABLE, 917 WMI_PDEV_PARAM_DSLEEP_ENABLE, 918 WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH, 919 WMI_PDEV_PARAM_PCIELP_TXBUF_WATERMARK, 920 WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN, 921 WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE, 922 WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD, 923 WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD, 924 WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD, 925 WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD, 926 WMI_PDEV_PARAM_PMF_QOS, 927 WMI_PDEV_PARAM_ARP_AC_OVERRIDE, 928 WMI_PDEV_PARAM_DCS, 929 WMI_PDEV_PARAM_ANI_ENABLE, 930 WMI_PDEV_PARAM_ANI_POLL_PERIOD, 931 WMI_PDEV_PARAM_ANI_LISTEN_PERIOD, 932 WMI_PDEV_PARAM_ANI_OFDM_LEVEL, 933 WMI_PDEV_PARAM_ANI_CCK_LEVEL, 934 WMI_PDEV_PARAM_DYNTXCHAIN, 935 WMI_PDEV_PARAM_PROXY_STA, 936 WMI_PDEV_PARAM_IDLE_PS_CONFIG, 937 WMI_PDEV_PARAM_POWER_GATING_SLEEP, 938 WMI_PDEV_PARAM_RFKILL_ENABLE, 939 WMI_PDEV_PARAM_BURST_DUR, 940 WMI_PDEV_PARAM_BURST_ENABLE, 941 WMI_PDEV_PARAM_HW_RFKILL_CONFIG, 942 WMI_PDEV_PARAM_LOW_POWER_RF_ENABLE, 943 WMI_PDEV_PARAM_L1SS_TRACK, 944 WMI_PDEV_PARAM_HYST_EN, 945 WMI_PDEV_PARAM_POWER_COLLAPSE_ENABLE, 946 WMI_PDEV_PARAM_LED_SYS_STATE, 947 WMI_PDEV_PARAM_LED_ENABLE, 948 WMI_PDEV_PARAM_AUDIO_OVER_WLAN_LATENCY, 949 WMI_PDEV_PARAM_AUDIO_OVER_WLAN_ENABLE, 950 WMI_PDEV_PARAM_WHAL_MIB_STATS_UPDATE_ENABLE, 951 WMI_PDEV_PARAM_VDEV_RATE_STATS_UPDATE_PERIOD, 952 WMI_PDEV_PARAM_CTS_CBW, 953 WMI_PDEV_PARAM_WNTS_CONFIG, 954 WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_ENABLE, 955 WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_MIN_SLEEP_SLOP, 956 WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_INC_DEC_STEP, 957 WMI_PDEV_PARAM_EARLY_RX_FIX_SLEEP_SLOP, 958 WMI_PDEV_PARAM_BMISS_BASED_ADAPTIVE_BTO_ENABLE, 959 WMI_PDEV_PARAM_BMISS_BTO_MIN_BCN_TIMEOUT, 960 WMI_PDEV_PARAM_BMISS_BTO_INC_DEC_STEP, 961 WMI_PDEV_PARAM_BTO_FIX_BCN_TIMEOUT, 962 WMI_PDEV_PARAM_CE_BASED_ADAPTIVE_BTO_ENABLE, 963 WMI_PDEV_PARAM_CE_BTO_COMBO_CE_VALUE, 964 WMI_PDEV_PARAM_TX_CHAIN_MASK_2G, 965 WMI_PDEV_PARAM_RX_CHAIN_MASK_2G, 966 WMI_PDEV_PARAM_TX_CHAIN_MASK_5G, 967 WMI_PDEV_PARAM_RX_CHAIN_MASK_5G, 968 WMI_PDEV_PARAM_TX_CHAIN_MASK_CCK, 969 WMI_PDEV_PARAM_TX_CHAIN_MASK_1SS, 970 WMI_PDEV_PARAM_CTS2SELF_FOR_P2P_GO_CONFIG, 971 WMI_PDEV_PARAM_TXPOWER_DECR_DB, 972 WMI_PDEV_PARAM_AGGR_BURST, 973 WMI_PDEV_PARAM_RX_DECAP_MODE, 974 WMI_PDEV_PARAM_FAST_CHANNEL_RESET, 975 WMI_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA, 976 WMI_PDEV_PARAM_ANTENNA_GAIN, 977 WMI_PDEV_PARAM_RX_FILTER, 978 WMI_PDEV_SET_MCAST_TO_UCAST_TID, 979 WMI_PDEV_PARAM_PROXY_STA_MODE, 980 WMI_PDEV_PARAM_SET_MCAST2UCAST_MODE, 981 WMI_PDEV_PARAM_SET_MCAST2UCAST_BUFFER, 982 WMI_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER, 983 WMI_PDEV_PEER_STA_PS_STATECHG_ENABLE, 984 WMI_PDEV_PARAM_IGMPMLD_AC_OVERRIDE, 985 WMI_PDEV_PARAM_BLOCK_INTERBSS, 986 WMI_PDEV_PARAM_SET_DISABLE_RESET_CMDID, 987 WMI_PDEV_PARAM_SET_MSDU_TTL_CMDID, 988 WMI_PDEV_PARAM_SET_PPDU_DURATION_CMDID, 989 WMI_PDEV_PARAM_TXBF_SOUND_PERIOD_CMDID, 990 WMI_PDEV_PARAM_SET_PROMISC_MODE_CMDID, 991 WMI_PDEV_PARAM_SET_BURST_MODE_CMDID, 992 WMI_PDEV_PARAM_EN_STATS, 993 WMI_PDEV_PARAM_MU_GROUP_POLICY, 994 WMI_PDEV_PARAM_NOISE_DETECTION, 995 WMI_PDEV_PARAM_NOISE_THRESHOLD, 996 WMI_PDEV_PARAM_DPD_ENABLE, 997 WMI_PDEV_PARAM_SET_MCAST_BCAST_ECHO, 998 WMI_PDEV_PARAM_ATF_STRICT_SCH, 999 WMI_PDEV_PARAM_ATF_SCHED_DURATION, 1000 WMI_PDEV_PARAM_ANT_PLZN, 1001 WMI_PDEV_PARAM_MGMT_RETRY_LIMIT, 1002 WMI_PDEV_PARAM_SENSITIVITY_LEVEL, 1003 WMI_PDEV_PARAM_SIGNED_TXPOWER_2G, 1004 WMI_PDEV_PARAM_SIGNED_TXPOWER_5G, 1005 WMI_PDEV_PARAM_ENABLE_PER_TID_AMSDU, 1006 WMI_PDEV_PARAM_ENABLE_PER_TID_AMPDU, 1007 WMI_PDEV_PARAM_CCA_THRESHOLD, 1008 WMI_PDEV_PARAM_RTS_FIXED_RATE, 1009 WMI_PDEV_PARAM_PDEV_RESET, 1010 WMI_PDEV_PARAM_WAPI_MBSSID_OFFSET, 1011 WMI_PDEV_PARAM_ARP_DBG_SRCADDR, 1012 WMI_PDEV_PARAM_ARP_DBG_DSTADDR, 1013 WMI_PDEV_PARAM_ATF_OBSS_NOISE_SCH, 1014 WMI_PDEV_PARAM_ATF_OBSS_NOISE_SCALING_FACTOR, 1015 WMI_PDEV_PARAM_CUST_TXPOWER_SCALE, 1016 WMI_PDEV_PARAM_ATF_DYNAMIC_ENABLE, 1017 WMI_PDEV_PARAM_CTRL_RETRY_LIMIT, 1018 WMI_PDEV_PARAM_PROPAGATION_DELAY, 1019 WMI_PDEV_PARAM_ENA_ANT_DIV, 1020 WMI_PDEV_PARAM_FORCE_CHAIN_ANT, 1021 WMI_PDEV_PARAM_ANT_DIV_SELFTEST, 1022 WMI_PDEV_PARAM_ANT_DIV_SELFTEST_INTVL, 1023 WMI_PDEV_PARAM_STATS_OBSERVATION_PERIOD, 1024 WMI_PDEV_PARAM_TX_PPDU_DELAY_BIN_SIZE_MS, 1025 WMI_PDEV_PARAM_TX_PPDU_DELAY_ARRAY_LEN, 1026 WMI_PDEV_PARAM_TX_MPDU_AGGR_ARRAY_LEN, 1027 WMI_PDEV_PARAM_RX_MPDU_AGGR_ARRAY_LEN, 1028 WMI_PDEV_PARAM_TX_SCH_DELAY, 1029 WMI_PDEV_PARAM_ENABLE_RTS_SIFS_BURSTING, 1030 WMI_PDEV_PARAM_MAX_MPDUS_IN_AMPDU, 1031 WMI_PDEV_PARAM_PEER_STATS_INFO_ENABLE, 1032 WMI_PDEV_PARAM_FAST_PWR_TRANSITION, 1033 WMI_PDEV_PARAM_RADIO_CHAN_STATS_ENABLE, 1034 WMI_PDEV_PARAM_RADIO_DIAGNOSIS_ENABLE, 1035 WMI_PDEV_PARAM_MESH_MCAST_ENABLE, 1036 }; 1037 1038 enum wmi_tlv_vdev_param { 1039 WMI_VDEV_PARAM_RTS_THRESHOLD = 0x1, 1040 WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD, 1041 WMI_VDEV_PARAM_BEACON_INTERVAL, 1042 WMI_VDEV_PARAM_LISTEN_INTERVAL, 1043 WMI_VDEV_PARAM_MULTICAST_RATE, 1044 WMI_VDEV_PARAM_MGMT_TX_RATE, 1045 WMI_VDEV_PARAM_SLOT_TIME, 1046 WMI_VDEV_PARAM_PREAMBLE, 1047 WMI_VDEV_PARAM_SWBA_TIME, 1048 WMI_VDEV_STATS_UPDATE_PERIOD, 1049 WMI_VDEV_PWRSAVE_AGEOUT_TIME, 1050 WMI_VDEV_HOST_SWBA_INTERVAL, 1051 WMI_VDEV_PARAM_DTIM_PERIOD, 1052 WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT, 1053 WMI_VDEV_PARAM_WDS, 1054 WMI_VDEV_PARAM_ATIM_WINDOW, 1055 WMI_VDEV_PARAM_BMISS_COUNT_MAX, 1056 WMI_VDEV_PARAM_BMISS_FIRST_BCNT, 1057 WMI_VDEV_PARAM_BMISS_FINAL_BCNT, 1058 WMI_VDEV_PARAM_FEATURE_WMM, 1059 WMI_VDEV_PARAM_CHWIDTH, 1060 WMI_VDEV_PARAM_CHEXTOFFSET, 1061 WMI_VDEV_PARAM_DISABLE_HTPROTECTION, 1062 WMI_VDEV_PARAM_STA_QUICKKICKOUT, 1063 WMI_VDEV_PARAM_MGMT_RATE, 1064 WMI_VDEV_PARAM_PROTECTION_MODE, 1065 WMI_VDEV_PARAM_FIXED_RATE, 1066 WMI_VDEV_PARAM_SGI, 1067 WMI_VDEV_PARAM_LDPC, 1068 WMI_VDEV_PARAM_TX_STBC, 1069 WMI_VDEV_PARAM_RX_STBC, 1070 WMI_VDEV_PARAM_INTRA_BSS_FWD, 1071 WMI_VDEV_PARAM_DEF_KEYID, 1072 WMI_VDEV_PARAM_NSS, 1073 WMI_VDEV_PARAM_BCAST_DATA_RATE, 1074 WMI_VDEV_PARAM_MCAST_DATA_RATE, 1075 WMI_VDEV_PARAM_MCAST_INDICATE, 1076 WMI_VDEV_PARAM_DHCP_INDICATE, 1077 WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE, 1078 WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS, 1079 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS, 1080 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS, 1081 WMI_VDEV_PARAM_AP_ENABLE_NAWDS, 1082 WMI_VDEV_PARAM_ENABLE_RTSCTS, 1083 WMI_VDEV_PARAM_TXBF, 1084 WMI_VDEV_PARAM_PACKET_POWERSAVE, 1085 WMI_VDEV_PARAM_DROP_UNENCRY, 1086 WMI_VDEV_PARAM_TX_ENCAP_TYPE, 1087 WMI_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS, 1088 WMI_VDEV_PARAM_EARLY_RX_ADJUST_ENABLE, 1089 WMI_VDEV_PARAM_EARLY_RX_TGT_BMISS_NUM, 1090 WMI_VDEV_PARAM_EARLY_RX_BMISS_SAMPLE_CYCLE, 1091 WMI_VDEV_PARAM_EARLY_RX_SLOP_STEP, 1092 WMI_VDEV_PARAM_EARLY_RX_INIT_SLOP, 1093 WMI_VDEV_PARAM_EARLY_RX_ADJUST_PAUSE, 1094 WMI_VDEV_PARAM_TX_PWRLIMIT, 1095 WMI_VDEV_PARAM_SNR_NUM_FOR_CAL, 1096 WMI_VDEV_PARAM_ROAM_FW_OFFLOAD, 1097 WMI_VDEV_PARAM_ENABLE_RMC, 1098 WMI_VDEV_PARAM_IBSS_MAX_BCN_LOST_MS, 1099 WMI_VDEV_PARAM_MAX_RATE, 1100 WMI_VDEV_PARAM_EARLY_RX_DRIFT_SAMPLE, 1101 WMI_VDEV_PARAM_SET_IBSS_TX_FAIL_CNT_THR, 1102 WMI_VDEV_PARAM_EBT_RESYNC_TIMEOUT, 1103 WMI_VDEV_PARAM_AGGR_TRIG_EVENT_ENABLE, 1104 WMI_VDEV_PARAM_IS_IBSS_POWER_SAVE_ALLOWED, 1105 WMI_VDEV_PARAM_IS_POWER_COLLAPSE_ALLOWED, 1106 WMI_VDEV_PARAM_IS_AWAKE_ON_TXRX_ENABLED, 1107 WMI_VDEV_PARAM_INACTIVITY_CNT, 1108 WMI_VDEV_PARAM_TXSP_END_INACTIVITY_TIME_MS, 1109 WMI_VDEV_PARAM_DTIM_POLICY, 1110 WMI_VDEV_PARAM_IBSS_PS_WARMUP_TIME_SECS, 1111 WMI_VDEV_PARAM_IBSS_PS_1RX_CHAIN_IN_ATIM_WINDOW_ENABLE, 1112 WMI_VDEV_PARAM_RX_LEAK_WINDOW, 1113 WMI_VDEV_PARAM_STATS_AVG_FACTOR, 1114 WMI_VDEV_PARAM_DISCONNECT_TH, 1115 WMI_VDEV_PARAM_RTSCTS_RATE, 1116 WMI_VDEV_PARAM_MCC_RTSCTS_PROTECTION_ENABLE, 1117 WMI_VDEV_PARAM_MCC_BROADCAST_PROBE_ENABLE, 1118 WMI_VDEV_PARAM_TXPOWER_SCALE, 1119 WMI_VDEV_PARAM_TXPOWER_SCALE_DECR_DB, 1120 WMI_VDEV_PARAM_MCAST2UCAST_SET, 1121 WMI_VDEV_PARAM_RC_NUM_RETRIES, 1122 WMI_VDEV_PARAM_CABQ_MAXDUR, 1123 WMI_VDEV_PARAM_MFPTEST_SET, 1124 WMI_VDEV_PARAM_RTS_FIXED_RATE, 1125 WMI_VDEV_PARAM_VHT_SGIMASK, 1126 WMI_VDEV_PARAM_VHT80_RATEMASK, 1127 WMI_VDEV_PARAM_PROXY_STA, 1128 WMI_VDEV_PARAM_VIRTUAL_CELL_MODE, 1129 WMI_VDEV_PARAM_RX_DECAP_TYPE, 1130 WMI_VDEV_PARAM_BW_NSS_RATEMASK, 1131 WMI_VDEV_PARAM_SENSOR_AP, 1132 WMI_VDEV_PARAM_BEACON_RATE, 1133 WMI_VDEV_PARAM_DTIM_ENABLE_CTS, 1134 WMI_VDEV_PARAM_STA_KICKOUT, 1135 WMI_VDEV_PARAM_CAPABILITIES, 1136 WMI_VDEV_PARAM_TSF_INCREMENT, 1137 WMI_VDEV_PARAM_AMPDU_PER_AC, 1138 WMI_VDEV_PARAM_RX_FILTER, 1139 WMI_VDEV_PARAM_MGMT_TX_POWER, 1140 WMI_VDEV_PARAM_NON_AGG_SW_RETRY_TH, 1141 WMI_VDEV_PARAM_AGG_SW_RETRY_TH, 1142 WMI_VDEV_PARAM_DISABLE_DYN_BW_RTS, 1143 WMI_VDEV_PARAM_ATF_SSID_SCHED_POLICY, 1144 WMI_VDEV_PARAM_HE_DCM, 1145 WMI_VDEV_PARAM_HE_RANGE_EXT, 1146 WMI_VDEV_PARAM_ENABLE_BCAST_PROBE_RESPONSE, 1147 WMI_VDEV_PARAM_FILS_MAX_CHANNEL_GUARD_TIME, 1148 WMI_VDEV_PARAM_BA_MODE = 0x7e, 1149 WMI_VDEV_PARAM_SET_HE_SOUNDING_MODE = 0x87, 1150 WMI_VDEV_PARAM_6GHZ_PARAMS = 0x99, 1151 WMI_VDEV_PARAM_PROTOTYPE = 0x8000, 1152 WMI_VDEV_PARAM_BSS_COLOR, 1153 WMI_VDEV_PARAM_SET_HEMU_MODE, 1154 WMI_VDEV_PARAM_HEOPS_0_31 = 0x8003, 1155 }; 1156 1157 enum wmi_tlv_peer_flags { 1158 WMI_PEER_AUTH = 0x00000001, 1159 WMI_PEER_QOS = 0x00000002, 1160 WMI_PEER_NEED_PTK_4_WAY = 0x00000004, 1161 WMI_PEER_NEED_GTK_2_WAY = 0x00000010, 1162 WMI_PEER_HE = 0x00000400, 1163 WMI_PEER_APSD = 0x00000800, 1164 WMI_PEER_HT = 0x00001000, 1165 WMI_PEER_40MHZ = 0x00002000, 1166 WMI_PEER_STBC = 0x00008000, 1167 WMI_PEER_LDPC = 0x00010000, 1168 WMI_PEER_DYN_MIMOPS = 0x00020000, 1169 WMI_PEER_STATIC_MIMOPS = 0x00040000, 1170 WMI_PEER_SPATIAL_MUX = 0x00200000, 1171 WMI_PEER_TWT_REQ = 0x00400000, 1172 WMI_PEER_TWT_RESP = 0x00800000, 1173 WMI_PEER_VHT = 0x02000000, 1174 WMI_PEER_80MHZ = 0x04000000, 1175 WMI_PEER_PMF = 0x08000000, 1176 WMI_PEER_IS_P2P_CAPABLE = 0x20000000, 1177 WMI_PEER_160MHZ = 0x40000000, 1178 WMI_PEER_SAFEMODE_EN = 0x80000000, 1179 }; 1180 1181 enum wmi_tlv_peer_flags_ext { 1182 WMI_PEER_EXT_EHT = BIT(0), 1183 WMI_PEER_EXT_320MHZ = BIT(1), 1184 }; 1185 1186 /** Enum list of TLV Tags for each parameter structure type. */ 1187 enum wmi_tlv_tag { 1188 WMI_TAG_LAST_RESERVED = 15, 1189 WMI_TAG_FIRST_ARRAY_ENUM, 1190 WMI_TAG_ARRAY_UINT32 = WMI_TAG_FIRST_ARRAY_ENUM, 1191 WMI_TAG_ARRAY_BYTE, 1192 WMI_TAG_ARRAY_STRUCT, 1193 WMI_TAG_ARRAY_FIXED_STRUCT, 1194 WMI_TAG_LAST_ARRAY_ENUM = 31, 1195 WMI_TAG_SERVICE_READY_EVENT, 1196 WMI_TAG_HAL_REG_CAPABILITIES, 1197 WMI_TAG_WLAN_HOST_MEM_REQ, 1198 WMI_TAG_READY_EVENT, 1199 WMI_TAG_SCAN_EVENT, 1200 WMI_TAG_PDEV_TPC_CONFIG_EVENT, 1201 WMI_TAG_CHAN_INFO_EVENT, 1202 WMI_TAG_COMB_PHYERR_RX_HDR, 1203 WMI_TAG_VDEV_START_RESPONSE_EVENT, 1204 WMI_TAG_VDEV_STOPPED_EVENT, 1205 WMI_TAG_VDEV_INSTALL_KEY_COMPLETE_EVENT, 1206 WMI_TAG_PEER_STA_KICKOUT_EVENT, 1207 WMI_TAG_MGMT_RX_HDR, 1208 WMI_TAG_TBTT_OFFSET_EVENT, 1209 WMI_TAG_TX_DELBA_COMPLETE_EVENT, 1210 WMI_TAG_TX_ADDBA_COMPLETE_EVENT, 1211 WMI_TAG_ROAM_EVENT, 1212 WMI_TAG_WOW_EVENT_INFO, 1213 WMI_TAG_WOW_EVENT_INFO_SECTION_BITMAP, 1214 WMI_TAG_RTT_EVENT_HEADER, 1215 WMI_TAG_RTT_ERROR_REPORT_EVENT, 1216 WMI_TAG_RTT_MEAS_EVENT, 1217 WMI_TAG_ECHO_EVENT, 1218 WMI_TAG_FTM_INTG_EVENT, 1219 WMI_TAG_VDEV_GET_KEEPALIVE_EVENT, 1220 WMI_TAG_GPIO_INPUT_EVENT, 1221 WMI_TAG_CSA_EVENT, 1222 WMI_TAG_GTK_OFFLOAD_STATUS_EVENT, 1223 WMI_TAG_IGTK_INFO, 1224 WMI_TAG_DCS_INTERFERENCE_EVENT, 1225 WMI_TAG_ATH_DCS_CW_INT, 1226 WMI_TAG_WLAN_DCS_CW_INT = /* ALIAS */ 1227 WMI_TAG_ATH_DCS_CW_INT, 1228 WMI_TAG_ATH_DCS_WLAN_INT_STAT, 1229 WMI_TAG_WLAN_DCS_IM_TGT_STATS_T = /* ALIAS */ 1230 WMI_TAG_ATH_DCS_WLAN_INT_STAT, 1231 WMI_TAG_WLAN_PROFILE_CTX_T, 1232 WMI_TAG_WLAN_PROFILE_T, 1233 WMI_TAG_PDEV_QVIT_EVENT, 1234 WMI_TAG_HOST_SWBA_EVENT, 1235 WMI_TAG_TIM_INFO, 1236 WMI_TAG_P2P_NOA_INFO, 1237 WMI_TAG_STATS_EVENT, 1238 WMI_TAG_AVOID_FREQ_RANGES_EVENT, 1239 WMI_TAG_AVOID_FREQ_RANGE_DESC, 1240 WMI_TAG_GTK_REKEY_FAIL_EVENT, 1241 WMI_TAG_INIT_CMD, 1242 WMI_TAG_RESOURCE_CONFIG, 1243 WMI_TAG_WLAN_HOST_MEMORY_CHUNK, 1244 WMI_TAG_START_SCAN_CMD, 1245 WMI_TAG_STOP_SCAN_CMD, 1246 WMI_TAG_SCAN_CHAN_LIST_CMD, 1247 WMI_TAG_CHANNEL, 1248 WMI_TAG_PDEV_SET_REGDOMAIN_CMD, 1249 WMI_TAG_PDEV_SET_PARAM_CMD, 1250 WMI_TAG_PDEV_SET_WMM_PARAMS_CMD, 1251 WMI_TAG_WMM_PARAMS, 1252 WMI_TAG_PDEV_SET_QUIET_CMD, 1253 WMI_TAG_VDEV_CREATE_CMD, 1254 WMI_TAG_VDEV_DELETE_CMD, 1255 WMI_TAG_VDEV_START_REQUEST_CMD, 1256 WMI_TAG_P2P_NOA_DESCRIPTOR, 1257 WMI_TAG_P2P_GO_SET_BEACON_IE, 1258 WMI_TAG_GTK_OFFLOAD_CMD, 1259 WMI_TAG_VDEV_UP_CMD, 1260 WMI_TAG_VDEV_STOP_CMD, 1261 WMI_TAG_VDEV_DOWN_CMD, 1262 WMI_TAG_VDEV_SET_PARAM_CMD, 1263 WMI_TAG_VDEV_INSTALL_KEY_CMD, 1264 WMI_TAG_PEER_CREATE_CMD, 1265 WMI_TAG_PEER_DELETE_CMD, 1266 WMI_TAG_PEER_FLUSH_TIDS_CMD, 1267 WMI_TAG_PEER_SET_PARAM_CMD, 1268 WMI_TAG_PEER_ASSOC_COMPLETE_CMD, 1269 WMI_TAG_VHT_RATE_SET, 1270 WMI_TAG_BCN_TMPL_CMD, 1271 WMI_TAG_PRB_TMPL_CMD, 1272 WMI_TAG_BCN_PRB_INFO, 1273 WMI_TAG_PEER_TID_ADDBA_CMD, 1274 WMI_TAG_PEER_TID_DELBA_CMD, 1275 WMI_TAG_STA_POWERSAVE_MODE_CMD, 1276 WMI_TAG_STA_POWERSAVE_PARAM_CMD, 1277 WMI_TAG_STA_DTIM_PS_METHOD_CMD, 1278 WMI_TAG_ROAM_SCAN_MODE, 1279 WMI_TAG_ROAM_SCAN_RSSI_THRESHOLD, 1280 WMI_TAG_ROAM_SCAN_PERIOD, 1281 WMI_TAG_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, 1282 WMI_TAG_PDEV_SUSPEND_CMD, 1283 WMI_TAG_PDEV_RESUME_CMD, 1284 WMI_TAG_ADD_BCN_FILTER_CMD, 1285 WMI_TAG_RMV_BCN_FILTER_CMD, 1286 WMI_TAG_WOW_ENABLE_CMD, 1287 WMI_TAG_WOW_HOSTWAKEUP_FROM_SLEEP_CMD, 1288 WMI_TAG_STA_UAPSD_AUTO_TRIG_CMD, 1289 WMI_TAG_STA_UAPSD_AUTO_TRIG_PARAM, 1290 WMI_TAG_SET_ARP_NS_OFFLOAD_CMD, 1291 WMI_TAG_ARP_OFFLOAD_TUPLE, 1292 WMI_TAG_NS_OFFLOAD_TUPLE, 1293 WMI_TAG_FTM_INTG_CMD, 1294 WMI_TAG_STA_KEEPALIVE_CMD, 1295 WMI_TAG_STA_KEEPALVE_ARP_RESPONSE, 1296 WMI_TAG_P2P_SET_VENDOR_IE_DATA_CMD, 1297 WMI_TAG_AP_PS_PEER_CMD, 1298 WMI_TAG_PEER_RATE_RETRY_SCHED_CMD, 1299 WMI_TAG_WLAN_PROFILE_TRIGGER_CMD, 1300 WMI_TAG_WLAN_PROFILE_SET_HIST_INTVL_CMD, 1301 WMI_TAG_WLAN_PROFILE_GET_PROF_DATA_CMD, 1302 WMI_TAG_WLAN_PROFILE_ENABLE_PROFILE_ID_CMD, 1303 WMI_TAG_WOW_DEL_PATTERN_CMD, 1304 WMI_TAG_WOW_ADD_DEL_EVT_CMD, 1305 WMI_TAG_RTT_MEASREQ_HEAD, 1306 WMI_TAG_RTT_MEASREQ_BODY, 1307 WMI_TAG_RTT_TSF_CMD, 1308 WMI_TAG_VDEV_SPECTRAL_CONFIGURE_CMD, 1309 WMI_TAG_VDEV_SPECTRAL_ENABLE_CMD, 1310 WMI_TAG_REQUEST_STATS_CMD, 1311 WMI_TAG_NLO_CONFIG_CMD, 1312 WMI_TAG_NLO_CONFIGURED_PARAMETERS, 1313 WMI_TAG_CSA_OFFLOAD_ENABLE_CMD, 1314 WMI_TAG_CSA_OFFLOAD_CHANSWITCH_CMD, 1315 WMI_TAG_CHATTER_SET_MODE_CMD, 1316 WMI_TAG_ECHO_CMD, 1317 WMI_TAG_VDEV_SET_KEEPALIVE_CMD, 1318 WMI_TAG_VDEV_GET_KEEPALIVE_CMD, 1319 WMI_TAG_FORCE_FW_HANG_CMD, 1320 WMI_TAG_GPIO_CONFIG_CMD, 1321 WMI_TAG_GPIO_OUTPUT_CMD, 1322 WMI_TAG_PEER_ADD_WDS_ENTRY_CMD, 1323 WMI_TAG_PEER_REMOVE_WDS_ENTRY_CMD, 1324 WMI_TAG_BCN_TX_HDR, 1325 WMI_TAG_BCN_SEND_FROM_HOST_CMD, 1326 WMI_TAG_MGMT_TX_HDR, 1327 WMI_TAG_ADDBA_CLEAR_RESP_CMD, 1328 WMI_TAG_ADDBA_SEND_CMD, 1329 WMI_TAG_DELBA_SEND_CMD, 1330 WMI_TAG_ADDBA_SETRESPONSE_CMD, 1331 WMI_TAG_SEND_SINGLEAMSDU_CMD, 1332 WMI_TAG_PDEV_PKTLOG_ENABLE_CMD, 1333 WMI_TAG_PDEV_PKTLOG_DISABLE_CMD, 1334 WMI_TAG_PDEV_SET_HT_IE_CMD, 1335 WMI_TAG_PDEV_SET_VHT_IE_CMD, 1336 WMI_TAG_PDEV_SET_DSCP_TID_MAP_CMD, 1337 WMI_TAG_PDEV_GREEN_AP_PS_ENABLE_CMD, 1338 WMI_TAG_PDEV_GET_TPC_CONFIG_CMD, 1339 WMI_TAG_PDEV_SET_BASE_MACADDR_CMD, 1340 WMI_TAG_PEER_MCAST_GROUP_CMD, 1341 WMI_TAG_ROAM_AP_PROFILE, 1342 WMI_TAG_AP_PROFILE, 1343 WMI_TAG_SCAN_SCH_PRIORITY_TABLE_CMD, 1344 WMI_TAG_PDEV_DFS_ENABLE_CMD, 1345 WMI_TAG_PDEV_DFS_DISABLE_CMD, 1346 WMI_TAG_WOW_ADD_PATTERN_CMD, 1347 WMI_TAG_WOW_BITMAP_PATTERN_T, 1348 WMI_TAG_WOW_IPV4_SYNC_PATTERN_T, 1349 WMI_TAG_WOW_IPV6_SYNC_PATTERN_T, 1350 WMI_TAG_WOW_MAGIC_PATTERN_CMD, 1351 WMI_TAG_SCAN_UPDATE_REQUEST_CMD, 1352 WMI_TAG_CHATTER_PKT_COALESCING_FILTER, 1353 WMI_TAG_CHATTER_COALESCING_ADD_FILTER_CMD, 1354 WMI_TAG_CHATTER_COALESCING_DELETE_FILTER_CMD, 1355 WMI_TAG_CHATTER_COALESCING_QUERY_CMD, 1356 WMI_TAG_TXBF_CMD, 1357 WMI_TAG_DEBUG_LOG_CONFIG_CMD, 1358 WMI_TAG_NLO_EVENT, 1359 WMI_TAG_CHATTER_QUERY_REPLY_EVENT, 1360 WMI_TAG_UPLOAD_H_HDR, 1361 WMI_TAG_CAPTURE_H_EVENT_HDR, 1362 WMI_TAG_VDEV_WNM_SLEEPMODE_CMD, 1363 WMI_TAG_VDEV_IPSEC_NATKEEPALIVE_FILTER_CMD, 1364 WMI_TAG_VDEV_WMM_ADDTS_CMD, 1365 WMI_TAG_VDEV_WMM_DELTS_CMD, 1366 WMI_TAG_VDEV_SET_WMM_PARAMS_CMD, 1367 WMI_TAG_TDLS_SET_STATE_CMD, 1368 WMI_TAG_TDLS_PEER_UPDATE_CMD, 1369 WMI_TAG_TDLS_PEER_EVENT, 1370 WMI_TAG_TDLS_PEER_CAPABILITIES, 1371 WMI_TAG_VDEV_MCC_SET_TBTT_MODE_CMD, 1372 WMI_TAG_ROAM_CHAN_LIST, 1373 WMI_TAG_VDEV_MCC_BCN_INTVL_CHANGE_EVENT, 1374 WMI_TAG_RESMGR_ADAPTIVE_OCS_ENABLE_DISABLE_CMD, 1375 WMI_TAG_RESMGR_SET_CHAN_TIME_QUOTA_CMD, 1376 WMI_TAG_RESMGR_SET_CHAN_LATENCY_CMD, 1377 WMI_TAG_BA_REQ_SSN_CMD, 1378 WMI_TAG_BA_RSP_SSN_EVENT, 1379 WMI_TAG_STA_SMPS_FORCE_MODE_CMD, 1380 WMI_TAG_SET_MCASTBCAST_FILTER_CMD, 1381 WMI_TAG_P2P_SET_OPPPS_CMD, 1382 WMI_TAG_P2P_SET_NOA_CMD, 1383 WMI_TAG_BA_REQ_SSN_CMD_SUB_STRUCT_PARAM, 1384 WMI_TAG_BA_REQ_SSN_EVENT_SUB_STRUCT_PARAM, 1385 WMI_TAG_STA_SMPS_PARAM_CMD, 1386 WMI_TAG_VDEV_SET_GTX_PARAMS_CMD, 1387 WMI_TAG_MCC_SCHED_TRAFFIC_STATS_CMD, 1388 WMI_TAG_MCC_SCHED_STA_TRAFFIC_STATS, 1389 WMI_TAG_OFFLOAD_BCN_TX_STATUS_EVENT, 1390 WMI_TAG_P2P_NOA_EVENT, 1391 WMI_TAG_HB_SET_ENABLE_CMD, 1392 WMI_TAG_HB_SET_TCP_PARAMS_CMD, 1393 WMI_TAG_HB_SET_TCP_PKT_FILTER_CMD, 1394 WMI_TAG_HB_SET_UDP_PARAMS_CMD, 1395 WMI_TAG_HB_SET_UDP_PKT_FILTER_CMD, 1396 WMI_TAG_HB_IND_EVENT, 1397 WMI_TAG_TX_PAUSE_EVENT, 1398 WMI_TAG_RFKILL_EVENT, 1399 WMI_TAG_DFS_RADAR_EVENT, 1400 WMI_TAG_DFS_PHYERR_FILTER_ENA_CMD, 1401 WMI_TAG_DFS_PHYERR_FILTER_DIS_CMD, 1402 WMI_TAG_BATCH_SCAN_RESULT_SCAN_LIST, 1403 WMI_TAG_BATCH_SCAN_RESULT_NETWORK_INFO, 1404 WMI_TAG_BATCH_SCAN_ENABLE_CMD, 1405 WMI_TAG_BATCH_SCAN_DISABLE_CMD, 1406 WMI_TAG_BATCH_SCAN_TRIGGER_RESULT_CMD, 1407 WMI_TAG_BATCH_SCAN_ENABLED_EVENT, 1408 WMI_TAG_BATCH_SCAN_RESULT_EVENT, 1409 WMI_TAG_VDEV_PLMREQ_START_CMD, 1410 WMI_TAG_VDEV_PLMREQ_STOP_CMD, 1411 WMI_TAG_THERMAL_MGMT_CMD, 1412 WMI_TAG_THERMAL_MGMT_EVENT, 1413 WMI_TAG_PEER_INFO_REQ_CMD, 1414 WMI_TAG_PEER_INFO_EVENT, 1415 WMI_TAG_PEER_INFO, 1416 WMI_TAG_PEER_TX_FAIL_CNT_THR_EVENT, 1417 WMI_TAG_RMC_SET_MODE_CMD, 1418 WMI_TAG_RMC_SET_ACTION_PERIOD_CMD, 1419 WMI_TAG_RMC_CONFIG_CMD, 1420 WMI_TAG_MHF_OFFLOAD_SET_MODE_CMD, 1421 WMI_TAG_MHF_OFFLOAD_PLUMB_ROUTING_TABLE_CMD, 1422 WMI_TAG_ADD_PROACTIVE_ARP_RSP_PATTERN_CMD, 1423 WMI_TAG_DEL_PROACTIVE_ARP_RSP_PATTERN_CMD, 1424 WMI_TAG_NAN_CMD_PARAM, 1425 WMI_TAG_NAN_EVENT_HDR, 1426 WMI_TAG_PDEV_L1SS_TRACK_EVENT, 1427 WMI_TAG_DIAG_DATA_CONTAINER_EVENT, 1428 WMI_TAG_MODEM_POWER_STATE_CMD_PARAM, 1429 WMI_TAG_PEER_GET_ESTIMATED_LINKSPEED_CMD, 1430 WMI_TAG_PEER_ESTIMATED_LINKSPEED_EVENT, 1431 WMI_TAG_AGGR_STATE_TRIG_EVENT, 1432 WMI_TAG_MHF_OFFLOAD_ROUTING_TABLE_ENTRY, 1433 WMI_TAG_ROAM_SCAN_CMD, 1434 WMI_TAG_REQ_STATS_EXT_CMD, 1435 WMI_TAG_STATS_EXT_EVENT, 1436 WMI_TAG_OBSS_SCAN_ENABLE_CMD, 1437 WMI_TAG_OBSS_SCAN_DISABLE_CMD, 1438 WMI_TAG_OFFLOAD_PRB_RSP_TX_STATUS_EVENT, 1439 WMI_TAG_PDEV_SET_LED_CONFIG_CMD, 1440 WMI_TAG_HOST_AUTO_SHUTDOWN_CFG_CMD, 1441 WMI_TAG_HOST_AUTO_SHUTDOWN_EVENT, 1442 WMI_TAG_UPDATE_WHAL_MIB_STATS_EVENT, 1443 WMI_TAG_CHAN_AVOID_UPDATE_CMD_PARAM, 1444 WMI_TAG_WOW_IOAC_PKT_PATTERN_T, 1445 WMI_TAG_WOW_IOAC_TMR_PATTERN_T, 1446 WMI_TAG_WOW_IOAC_ADD_KEEPALIVE_CMD, 1447 WMI_TAG_WOW_IOAC_DEL_KEEPALIVE_CMD, 1448 WMI_TAG_WOW_IOAC_KEEPALIVE_T, 1449 WMI_TAG_WOW_IOAC_ADD_PATTERN_CMD, 1450 WMI_TAG_WOW_IOAC_DEL_PATTERN_CMD, 1451 WMI_TAG_START_LINK_STATS_CMD, 1452 WMI_TAG_CLEAR_LINK_STATS_CMD, 1453 WMI_TAG_REQUEST_LINK_STATS_CMD, 1454 WMI_TAG_IFACE_LINK_STATS_EVENT, 1455 WMI_TAG_RADIO_LINK_STATS_EVENT, 1456 WMI_TAG_PEER_STATS_EVENT, 1457 WMI_TAG_CHANNEL_STATS, 1458 WMI_TAG_RADIO_LINK_STATS, 1459 WMI_TAG_RATE_STATS, 1460 WMI_TAG_PEER_LINK_STATS, 1461 WMI_TAG_WMM_AC_STATS, 1462 WMI_TAG_IFACE_LINK_STATS, 1463 WMI_TAG_LPI_MGMT_SNOOPING_CONFIG_CMD, 1464 WMI_TAG_LPI_START_SCAN_CMD, 1465 WMI_TAG_LPI_STOP_SCAN_CMD, 1466 WMI_TAG_LPI_RESULT_EVENT, 1467 WMI_TAG_PEER_STATE_EVENT, 1468 WMI_TAG_EXTSCAN_BUCKET_CMD, 1469 WMI_TAG_EXTSCAN_BUCKET_CHANNEL_EVENT, 1470 WMI_TAG_EXTSCAN_START_CMD, 1471 WMI_TAG_EXTSCAN_STOP_CMD, 1472 WMI_TAG_EXTSCAN_CONFIGURE_WLAN_CHANGE_MONITOR_CMD, 1473 WMI_TAG_EXTSCAN_WLAN_CHANGE_BSSID_PARAM_CMD, 1474 WMI_TAG_EXTSCAN_CONFIGURE_HOTLIST_MONITOR_CMD, 1475 WMI_TAG_EXTSCAN_GET_CACHED_RESULTS_CMD, 1476 WMI_TAG_EXTSCAN_GET_WLAN_CHANGE_RESULTS_CMD, 1477 WMI_TAG_EXTSCAN_SET_CAPABILITIES_CMD, 1478 WMI_TAG_EXTSCAN_GET_CAPABILITIES_CMD, 1479 WMI_TAG_EXTSCAN_OPERATION_EVENT, 1480 WMI_TAG_EXTSCAN_START_STOP_EVENT, 1481 WMI_TAG_EXTSCAN_TABLE_USAGE_EVENT, 1482 WMI_TAG_EXTSCAN_WLAN_DESCRIPTOR_EVENT, 1483 WMI_TAG_EXTSCAN_RSSI_INFO_EVENT, 1484 WMI_TAG_EXTSCAN_CACHED_RESULTS_EVENT, 1485 WMI_TAG_EXTSCAN_WLAN_CHANGE_RESULTS_EVENT, 1486 WMI_TAG_EXTSCAN_WLAN_CHANGE_RESULT_BSSID_EVENT, 1487 WMI_TAG_EXTSCAN_HOTLIST_MATCH_EVENT, 1488 WMI_TAG_EXTSCAN_CAPABILITIES_EVENT, 1489 WMI_TAG_EXTSCAN_CACHE_CAPABILITIES_EVENT, 1490 WMI_TAG_EXTSCAN_WLAN_CHANGE_MONITOR_CAPABILITIES_EVENT, 1491 WMI_TAG_EXTSCAN_HOTLIST_MONITOR_CAPABILITIES_EVENT, 1492 WMI_TAG_D0_WOW_ENABLE_DISABLE_CMD, 1493 WMI_TAG_D0_WOW_DISABLE_ACK_EVENT, 1494 WMI_TAG_UNIT_TEST_CMD, 1495 WMI_TAG_ROAM_OFFLOAD_TLV_PARAM, 1496 WMI_TAG_ROAM_11I_OFFLOAD_TLV_PARAM, 1497 WMI_TAG_ROAM_11R_OFFLOAD_TLV_PARAM, 1498 WMI_TAG_ROAM_ESE_OFFLOAD_TLV_PARAM, 1499 WMI_TAG_ROAM_SYNCH_EVENT, 1500 WMI_TAG_ROAM_SYNCH_COMPLETE, 1501 WMI_TAG_EXTWOW_ENABLE_CMD, 1502 WMI_TAG_EXTWOW_SET_APP_TYPE1_PARAMS_CMD, 1503 WMI_TAG_EXTWOW_SET_APP_TYPE2_PARAMS_CMD, 1504 WMI_TAG_LPI_STATUS_EVENT, 1505 WMI_TAG_LPI_HANDOFF_EVENT, 1506 WMI_TAG_VDEV_RATE_STATS_EVENT, 1507 WMI_TAG_VDEV_RATE_HT_INFO, 1508 WMI_TAG_RIC_REQUEST, 1509 WMI_TAG_PDEV_GET_TEMPERATURE_CMD, 1510 WMI_TAG_PDEV_TEMPERATURE_EVENT, 1511 WMI_TAG_SET_DHCP_SERVER_OFFLOAD_CMD, 1512 WMI_TAG_TPC_CHAINMASK_CONFIG_CMD, 1513 WMI_TAG_RIC_TSPEC, 1514 WMI_TAG_TPC_CHAINMASK_CONFIG, 1515 WMI_TAG_IPA_OFFLOAD_ENABLE_DISABLE_CMD, 1516 WMI_TAG_SCAN_PROB_REQ_OUI_CMD, 1517 WMI_TAG_KEY_MATERIAL, 1518 WMI_TAG_TDLS_SET_OFFCHAN_MODE_CMD, 1519 WMI_TAG_SET_LED_FLASHING_CMD, 1520 WMI_TAG_MDNS_OFFLOAD_CMD, 1521 WMI_TAG_MDNS_SET_FQDN_CMD, 1522 WMI_TAG_MDNS_SET_RESP_CMD, 1523 WMI_TAG_MDNS_GET_STATS_CMD, 1524 WMI_TAG_MDNS_STATS_EVENT, 1525 WMI_TAG_ROAM_INVOKE_CMD, 1526 WMI_TAG_PDEV_RESUME_EVENT, 1527 WMI_TAG_PDEV_SET_ANTENNA_DIVERSITY_CMD, 1528 WMI_TAG_SAP_OFL_ENABLE_CMD, 1529 WMI_TAG_SAP_OFL_ADD_STA_EVENT, 1530 WMI_TAG_SAP_OFL_DEL_STA_EVENT, 1531 WMI_TAG_APFIND_CMD_PARAM, 1532 WMI_TAG_APFIND_EVENT_HDR, 1533 WMI_TAG_OCB_SET_SCHED_CMD, 1534 WMI_TAG_OCB_SET_SCHED_EVENT, 1535 WMI_TAG_OCB_SET_CONFIG_CMD, 1536 WMI_TAG_OCB_SET_CONFIG_RESP_EVENT, 1537 WMI_TAG_OCB_SET_UTC_TIME_CMD, 1538 WMI_TAG_OCB_START_TIMING_ADVERT_CMD, 1539 WMI_TAG_OCB_STOP_TIMING_ADVERT_CMD, 1540 WMI_TAG_OCB_GET_TSF_TIMER_CMD, 1541 WMI_TAG_OCB_GET_TSF_TIMER_RESP_EVENT, 1542 WMI_TAG_DCC_GET_STATS_CMD, 1543 WMI_TAG_DCC_CHANNEL_STATS_REQUEST, 1544 WMI_TAG_DCC_GET_STATS_RESP_EVENT, 1545 WMI_TAG_DCC_CLEAR_STATS_CMD, 1546 WMI_TAG_DCC_UPDATE_NDL_CMD, 1547 WMI_TAG_DCC_UPDATE_NDL_RESP_EVENT, 1548 WMI_TAG_DCC_STATS_EVENT, 1549 WMI_TAG_OCB_CHANNEL, 1550 WMI_TAG_OCB_SCHEDULE_ELEMENT, 1551 WMI_TAG_DCC_NDL_STATS_PER_CHANNEL, 1552 WMI_TAG_DCC_NDL_CHAN, 1553 WMI_TAG_QOS_PARAMETER, 1554 WMI_TAG_DCC_NDL_ACTIVE_STATE_CONFIG, 1555 WMI_TAG_ROAM_SCAN_EXTENDED_THRESHOLD_PARAM, 1556 WMI_TAG_ROAM_FILTER, 1557 WMI_TAG_PASSPOINT_CONFIG_CMD, 1558 WMI_TAG_PASSPOINT_EVENT_HDR, 1559 WMI_TAG_EXTSCAN_CONFIGURE_HOTLIST_SSID_MONITOR_CMD, 1560 WMI_TAG_EXTSCAN_HOTLIST_SSID_MATCH_EVENT, 1561 WMI_TAG_VDEV_TSF_TSTAMP_ACTION_CMD, 1562 WMI_TAG_VDEV_TSF_REPORT_EVENT, 1563 WMI_TAG_GET_FW_MEM_DUMP, 1564 WMI_TAG_UPDATE_FW_MEM_DUMP, 1565 WMI_TAG_FW_MEM_DUMP_PARAMS, 1566 WMI_TAG_DEBUG_MESG_FLUSH, 1567 WMI_TAG_DEBUG_MESG_FLUSH_COMPLETE, 1568 WMI_TAG_PEER_SET_RATE_REPORT_CONDITION, 1569 WMI_TAG_ROAM_SUBNET_CHANGE_CONFIG, 1570 WMI_TAG_VDEV_SET_IE_CMD, 1571 WMI_TAG_RSSI_BREACH_MONITOR_CONFIG, 1572 WMI_TAG_RSSI_BREACH_EVENT, 1573 WMI_TAG_WOW_EVENT_INITIAL_WAKEUP, 1574 WMI_TAG_SOC_SET_PCL_CMD, 1575 WMI_TAG_SOC_SET_HW_MODE_CMD, 1576 WMI_TAG_SOC_SET_HW_MODE_RESPONSE_EVENT, 1577 WMI_TAG_SOC_HW_MODE_TRANSITION_EVENT, 1578 WMI_TAG_VDEV_TXRX_STREAMS, 1579 WMI_TAG_SOC_SET_HW_MODE_RESPONSE_VDEV_MAC_ENTRY, 1580 WMI_TAG_SOC_SET_DUAL_MAC_CONFIG_CMD, 1581 WMI_TAG_SOC_SET_DUAL_MAC_CONFIG_RESPONSE_EVENT, 1582 WMI_TAG_WOW_IOAC_SOCK_PATTERN_T, 1583 WMI_TAG_WOW_ENABLE_ICMPV6_NA_FLT_CMD, 1584 WMI_TAG_DIAG_EVENT_LOG_CONFIG, 1585 WMI_TAG_DIAG_EVENT_LOG_SUPPORTED_EVENT_FIXED_PARAMS, 1586 WMI_TAG_PACKET_FILTER_CONFIG, 1587 WMI_TAG_PACKET_FILTER_ENABLE, 1588 WMI_TAG_SAP_SET_BLACKLIST_PARAM_CMD, 1589 WMI_TAG_MGMT_TX_SEND_CMD, 1590 WMI_TAG_MGMT_TX_COMPL_EVENT, 1591 WMI_TAG_SOC_SET_ANTENNA_MODE_CMD, 1592 WMI_TAG_WOW_UDP_SVC_OFLD_CMD, 1593 WMI_TAG_LRO_INFO_CMD, 1594 WMI_TAG_ROAM_EARLYSTOP_RSSI_THRES_PARAM, 1595 WMI_TAG_SERVICE_READY_EXT_EVENT, 1596 WMI_TAG_MAWC_SENSOR_REPORT_IND_CMD, 1597 WMI_TAG_MAWC_ENABLE_SENSOR_EVENT, 1598 WMI_TAG_ROAM_CONFIGURE_MAWC_CMD, 1599 WMI_TAG_NLO_CONFIGURE_MAWC_CMD, 1600 WMI_TAG_EXTSCAN_CONFIGURE_MAWC_CMD, 1601 WMI_TAG_PEER_ASSOC_CONF_EVENT, 1602 WMI_TAG_WOW_HOSTWAKEUP_GPIO_PIN_PATTERN_CONFIG_CMD, 1603 WMI_TAG_AP_PS_EGAP_PARAM_CMD, 1604 WMI_TAG_AP_PS_EGAP_INFO_EVENT, 1605 WMI_TAG_PMF_OFFLOAD_SET_SA_QUERY_CMD, 1606 WMI_TAG_TRANSFER_DATA_TO_FLASH_CMD, 1607 WMI_TAG_TRANSFER_DATA_TO_FLASH_COMPLETE_EVENT, 1608 WMI_TAG_SCPC_EVENT, 1609 WMI_TAG_AP_PS_EGAP_INFO_CHAINMASK_LIST, 1610 WMI_TAG_STA_SMPS_FORCE_MODE_COMPLETE_EVENT, 1611 WMI_TAG_BPF_GET_CAPABILITY_CMD, 1612 WMI_TAG_BPF_CAPABILITY_INFO_EVT, 1613 WMI_TAG_BPF_GET_VDEV_STATS_CMD, 1614 WMI_TAG_BPF_VDEV_STATS_INFO_EVT, 1615 WMI_TAG_BPF_SET_VDEV_INSTRUCTIONS_CMD, 1616 WMI_TAG_BPF_DEL_VDEV_INSTRUCTIONS_CMD, 1617 WMI_TAG_VDEV_DELETE_RESP_EVENT, 1618 WMI_TAG_PEER_DELETE_RESP_EVENT, 1619 WMI_TAG_ROAM_DENSE_THRES_PARAM, 1620 WMI_TAG_ENLO_CANDIDATE_SCORE_PARAM, 1621 WMI_TAG_PEER_UPDATE_WDS_ENTRY_CMD, 1622 WMI_TAG_VDEV_CONFIG_RATEMASK, 1623 WMI_TAG_PDEV_FIPS_CMD, 1624 WMI_TAG_PDEV_SMART_ANT_ENABLE_CMD, 1625 WMI_TAG_PDEV_SMART_ANT_SET_RX_ANTENNA_CMD, 1626 WMI_TAG_PEER_SMART_ANT_SET_TX_ANTENNA_CMD, 1627 WMI_TAG_PEER_SMART_ANT_SET_TRAIN_ANTENNA_CMD, 1628 WMI_TAG_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMD, 1629 WMI_TAG_PDEV_SET_ANT_SWITCH_TBL_CMD, 1630 WMI_TAG_PDEV_SET_CTL_TABLE_CMD, 1631 WMI_TAG_PDEV_SET_MIMOGAIN_TABLE_CMD, 1632 WMI_TAG_FWTEST_SET_PARAM_CMD, 1633 WMI_TAG_PEER_ATF_REQUEST, 1634 WMI_TAG_VDEV_ATF_REQUEST, 1635 WMI_TAG_PDEV_GET_ANI_CCK_CONFIG_CMD, 1636 WMI_TAG_PDEV_GET_ANI_OFDM_CONFIG_CMD, 1637 WMI_TAG_INST_RSSI_STATS_RESP, 1638 WMI_TAG_MED_UTIL_REPORT_EVENT, 1639 WMI_TAG_PEER_STA_PS_STATECHANGE_EVENT, 1640 WMI_TAG_WDS_ADDR_EVENT, 1641 WMI_TAG_PEER_RATECODE_LIST_EVENT, 1642 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_EVENT, 1643 WMI_TAG_PDEV_TPC_EVENT, 1644 WMI_TAG_ANI_OFDM_EVENT, 1645 WMI_TAG_ANI_CCK_EVENT, 1646 WMI_TAG_PDEV_CHANNEL_HOPPING_EVENT, 1647 WMI_TAG_PDEV_FIPS_EVENT, 1648 WMI_TAG_ATF_PEER_INFO, 1649 WMI_TAG_PDEV_GET_TPC_CMD, 1650 WMI_TAG_VDEV_FILTER_NRP_CONFIG_CMD, 1651 WMI_TAG_QBOOST_CFG_CMD, 1652 WMI_TAG_PDEV_SMART_ANT_GPIO_HANDLE, 1653 WMI_TAG_PEER_SMART_ANT_SET_TX_ANTENNA_SERIES, 1654 WMI_TAG_PEER_SMART_ANT_SET_TRAIN_ANTENNA_PARAM, 1655 WMI_TAG_PDEV_SET_ANT_CTRL_CHAIN, 1656 WMI_TAG_PEER_CCK_OFDM_RATE_INFO, 1657 WMI_TAG_PEER_MCS_RATE_INFO, 1658 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_NFDBR, 1659 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_NFDBM, 1660 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_FREQNUM, 1661 WMI_TAG_MU_REPORT_TOTAL_MU, 1662 WMI_TAG_VDEV_SET_DSCP_TID_MAP_CMD, 1663 WMI_TAG_ROAM_SET_MBO, 1664 WMI_TAG_MIB_STATS_ENABLE_CMD, 1665 WMI_TAG_NAN_DISC_IFACE_CREATED_EVENT, 1666 WMI_TAG_NAN_DISC_IFACE_DELETED_EVENT, 1667 WMI_TAG_NAN_STARTED_CLUSTER_EVENT, 1668 WMI_TAG_NAN_JOINED_CLUSTER_EVENT, 1669 WMI_TAG_NDI_GET_CAP_REQ, 1670 WMI_TAG_NDP_INITIATOR_REQ, 1671 WMI_TAG_NDP_RESPONDER_REQ, 1672 WMI_TAG_NDP_END_REQ, 1673 WMI_TAG_NDI_CAP_RSP_EVENT, 1674 WMI_TAG_NDP_INITIATOR_RSP_EVENT, 1675 WMI_TAG_NDP_RESPONDER_RSP_EVENT, 1676 WMI_TAG_NDP_END_RSP_EVENT, 1677 WMI_TAG_NDP_INDICATION_EVENT, 1678 WMI_TAG_NDP_CONFIRM_EVENT, 1679 WMI_TAG_NDP_END_INDICATION_EVENT, 1680 WMI_TAG_VDEV_SET_QUIET_CMD, 1681 WMI_TAG_PDEV_SET_PCL_CMD, 1682 WMI_TAG_PDEV_SET_HW_MODE_CMD, 1683 WMI_TAG_PDEV_SET_MAC_CONFIG_CMD, 1684 WMI_TAG_PDEV_SET_ANTENNA_MODE_CMD, 1685 WMI_TAG_PDEV_SET_HW_MODE_RESPONSE_EVENT, 1686 WMI_TAG_PDEV_HW_MODE_TRANSITION_EVENT, 1687 WMI_TAG_PDEV_SET_HW_MODE_RESPONSE_VDEV_MAC_ENTRY, 1688 WMI_TAG_PDEV_SET_MAC_CONFIG_RESPONSE_EVENT, 1689 WMI_TAG_COEX_CONFIG_CMD, 1690 WMI_TAG_CONFIG_ENHANCED_MCAST_FILTER, 1691 WMI_TAG_CHAN_AVOID_RPT_ALLOW_CMD, 1692 WMI_TAG_SET_PERIODIC_CHANNEL_STATS_CONFIG, 1693 WMI_TAG_VDEV_SET_CUSTOM_AGGR_SIZE_CMD, 1694 WMI_TAG_PDEV_WAL_POWER_DEBUG_CMD, 1695 WMI_TAG_MAC_PHY_CAPABILITIES, 1696 WMI_TAG_HW_MODE_CAPABILITIES, 1697 WMI_TAG_SOC_MAC_PHY_HW_MODE_CAPS, 1698 WMI_TAG_HAL_REG_CAPABILITIES_EXT, 1699 WMI_TAG_SOC_HAL_REG_CAPABILITIES, 1700 WMI_TAG_VDEV_WISA_CMD, 1701 WMI_TAG_TX_POWER_LEVEL_STATS_EVT, 1702 WMI_TAG_SCAN_ADAPTIVE_DWELL_PARAMETERS_TLV, 1703 WMI_TAG_SCAN_ADAPTIVE_DWELL_CONFIG, 1704 WMI_TAG_WOW_SET_ACTION_WAKE_UP_CMD, 1705 WMI_TAG_NDP_END_RSP_PER_NDI, 1706 WMI_TAG_PEER_BWF_REQUEST, 1707 WMI_TAG_BWF_PEER_INFO, 1708 WMI_TAG_DBGLOG_TIME_STAMP_SYNC_CMD, 1709 WMI_TAG_RMC_SET_LEADER_CMD, 1710 WMI_TAG_RMC_MANUAL_LEADER_EVENT, 1711 WMI_TAG_PER_CHAIN_RSSI_STATS, 1712 WMI_TAG_RSSI_STATS, 1713 WMI_TAG_P2P_LO_START_CMD, 1714 WMI_TAG_P2P_LO_STOP_CMD, 1715 WMI_TAG_P2P_LO_STOPPED_EVENT, 1716 WMI_TAG_REORDER_QUEUE_SETUP_CMD, 1717 WMI_TAG_REORDER_QUEUE_REMOVE_CMD, 1718 WMI_TAG_SET_MULTIPLE_MCAST_FILTER_CMD, 1719 WMI_TAG_MGMT_TX_COMPL_BUNDLE_EVENT, 1720 WMI_TAG_READ_DATA_FROM_FLASH_CMD, 1721 WMI_TAG_READ_DATA_FROM_FLASH_EVENT, 1722 WMI_TAG_PDEV_SET_REORDER_TIMEOUT_VAL_CMD, 1723 WMI_TAG_PEER_SET_RX_BLOCKSIZE_CMD, 1724 WMI_TAG_PDEV_SET_WAKEUP_CONFIG_CMDID, 1725 WMI_TAG_TLV_BUF_LEN_PARAM, 1726 WMI_TAG_SERVICE_AVAILABLE_EVENT, 1727 WMI_TAG_PEER_ANTDIV_INFO_REQ_CMD, 1728 WMI_TAG_PEER_ANTDIV_INFO_EVENT, 1729 WMI_TAG_PEER_ANTDIV_INFO, 1730 WMI_TAG_PDEV_GET_ANTDIV_STATUS_CMD, 1731 WMI_TAG_PDEV_ANTDIV_STATUS_EVENT, 1732 WMI_TAG_MNT_FILTER_CMD, 1733 WMI_TAG_GET_CHIP_POWER_STATS_CMD, 1734 WMI_TAG_PDEV_CHIP_POWER_STATS_EVENT, 1735 WMI_TAG_COEX_GET_ANTENNA_ISOLATION_CMD, 1736 WMI_TAG_COEX_REPORT_ISOLATION_EVENT, 1737 WMI_TAG_CHAN_CCA_STATS, 1738 WMI_TAG_PEER_SIGNAL_STATS, 1739 WMI_TAG_TX_STATS, 1740 WMI_TAG_PEER_AC_TX_STATS, 1741 WMI_TAG_RX_STATS, 1742 WMI_TAG_PEER_AC_RX_STATS, 1743 WMI_TAG_REPORT_STATS_EVENT, 1744 WMI_TAG_CHAN_CCA_STATS_THRESH, 1745 WMI_TAG_PEER_SIGNAL_STATS_THRESH, 1746 WMI_TAG_TX_STATS_THRESH, 1747 WMI_TAG_RX_STATS_THRESH, 1748 WMI_TAG_PDEV_SET_STATS_THRESHOLD_CMD, 1749 WMI_TAG_REQUEST_WLAN_STATS_CMD, 1750 WMI_TAG_RX_AGGR_FAILURE_EVENT, 1751 WMI_TAG_RX_AGGR_FAILURE_INFO, 1752 WMI_TAG_VDEV_ENCRYPT_DECRYPT_DATA_REQ_CMD, 1753 WMI_TAG_VDEV_ENCRYPT_DECRYPT_DATA_RESP_EVENT, 1754 WMI_TAG_PDEV_BAND_TO_MAC, 1755 WMI_TAG_TBTT_OFFSET_INFO, 1756 WMI_TAG_TBTT_OFFSET_EXT_EVENT, 1757 WMI_TAG_SAR_LIMITS_CMD, 1758 WMI_TAG_SAR_LIMIT_CMD_ROW, 1759 WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMD, 1760 WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_DISABLE_CMD, 1761 WMI_TAG_VDEV_ADFS_CH_CFG_CMD, 1762 WMI_TAG_VDEV_ADFS_OCAC_ABORT_CMD, 1763 WMI_TAG_PDEV_DFS_RADAR_DETECTION_EVENT, 1764 WMI_TAG_VDEV_ADFS_OCAC_COMPLETE_EVENT, 1765 WMI_TAG_VDEV_DFS_CAC_COMPLETE_EVENT, 1766 WMI_TAG_VENDOR_OUI, 1767 WMI_TAG_REQUEST_RCPI_CMD, 1768 WMI_TAG_UPDATE_RCPI_EVENT, 1769 WMI_TAG_REQUEST_PEER_STATS_INFO_CMD, 1770 WMI_TAG_PEER_STATS_INFO, 1771 WMI_TAG_PEER_STATS_INFO_EVENT, 1772 WMI_TAG_PKGID_EVENT, 1773 WMI_TAG_CONNECTED_NLO_RSSI_PARAMS, 1774 WMI_TAG_SET_CURRENT_COUNTRY_CMD, 1775 WMI_TAG_REGULATORY_RULE_STRUCT, 1776 WMI_TAG_REG_CHAN_LIST_CC_EVENT, 1777 WMI_TAG_11D_SCAN_START_CMD, 1778 WMI_TAG_11D_SCAN_STOP_CMD, 1779 WMI_TAG_11D_NEW_COUNTRY_EVENT, 1780 WMI_TAG_REQUEST_RADIO_CHAN_STATS_CMD, 1781 WMI_TAG_RADIO_CHAN_STATS, 1782 WMI_TAG_RADIO_CHAN_STATS_EVENT, 1783 WMI_TAG_ROAM_PER_CONFIG, 1784 WMI_TAG_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_CMD, 1785 WMI_TAG_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_STATUS_EVENT, 1786 WMI_TAG_BPF_SET_VDEV_ACTIVE_MODE_CMD, 1787 WMI_TAG_HW_DATA_FILTER_CMD, 1788 WMI_TAG_CONNECTED_NLO_BSS_BAND_RSSI_PREF, 1789 WMI_TAG_PEER_OPER_MODE_CHANGE_EVENT, 1790 WMI_TAG_CHIP_POWER_SAVE_FAILURE_DETECTED, 1791 WMI_TAG_PDEV_MULTIPLE_VDEV_RESTART_REQUEST_CMD, 1792 WMI_TAG_PDEV_CSA_SWITCH_COUNT_STATUS_EVENT, 1793 WMI_TAG_PDEV_UPDATE_PKT_ROUTING_CMD, 1794 WMI_TAG_PDEV_CHECK_CAL_VERSION_CMD, 1795 WMI_TAG_PDEV_CHECK_CAL_VERSION_EVENT, 1796 WMI_TAG_PDEV_SET_DIVERSITY_GAIN_CMD, 1797 WMI_TAG_MAC_PHY_CHAINMASK_COMBO, 1798 WMI_TAG_MAC_PHY_CHAINMASK_CAPABILITY, 1799 WMI_TAG_VDEV_SET_ARP_STATS_CMD, 1800 WMI_TAG_VDEV_GET_ARP_STATS_CMD, 1801 WMI_TAG_VDEV_GET_ARP_STATS_EVENT, 1802 WMI_TAG_IFACE_OFFLOAD_STATS, 1803 WMI_TAG_REQUEST_STATS_CMD_SUB_STRUCT_PARAM, 1804 WMI_TAG_RSSI_CTL_EXT, 1805 WMI_TAG_SINGLE_PHYERR_EXT_RX_HDR, 1806 WMI_TAG_COEX_BT_ACTIVITY_EVENT, 1807 WMI_TAG_VDEV_GET_TX_POWER_CMD, 1808 WMI_TAG_VDEV_TX_POWER_EVENT, 1809 WMI_TAG_OFFCHAN_DATA_TX_COMPL_EVENT, 1810 WMI_TAG_OFFCHAN_DATA_TX_SEND_CMD, 1811 WMI_TAG_TX_SEND_PARAMS, 1812 WMI_TAG_HE_RATE_SET, 1813 WMI_TAG_CONGESTION_STATS, 1814 WMI_TAG_SET_INIT_COUNTRY_CMD, 1815 WMI_TAG_SCAN_DBS_DUTY_CYCLE, 1816 WMI_TAG_SCAN_DBS_DUTY_CYCLE_PARAM_TLV, 1817 WMI_TAG_PDEV_DIV_GET_RSSI_ANTID, 1818 WMI_TAG_THERM_THROT_CONFIG_REQUEST, 1819 WMI_TAG_THERM_THROT_LEVEL_CONFIG_INFO, 1820 WMI_TAG_THERM_THROT_STATS_EVENT, 1821 WMI_TAG_THERM_THROT_LEVEL_STATS_INFO, 1822 WMI_TAG_PDEV_DIV_RSSI_ANTID_EVENT, 1823 WMI_TAG_OEM_DMA_RING_CAPABILITIES, 1824 WMI_TAG_OEM_DMA_RING_CFG_REQ, 1825 WMI_TAG_OEM_DMA_RING_CFG_RSP, 1826 WMI_TAG_OEM_INDIRECT_DATA, 1827 WMI_TAG_OEM_DMA_BUF_RELEASE, 1828 WMI_TAG_OEM_DMA_BUF_RELEASE_ENTRY, 1829 WMI_TAG_PDEV_BSS_CHAN_INFO_REQUEST, 1830 WMI_TAG_PDEV_BSS_CHAN_INFO_EVENT, 1831 WMI_TAG_ROAM_LCA_DISALLOW_CONFIG, 1832 WMI_TAG_VDEV_LIMIT_OFFCHAN_CMD, 1833 WMI_TAG_ROAM_RSSI_REJECTION_OCE_CONFIG, 1834 WMI_TAG_UNIT_TEST_EVENT, 1835 WMI_TAG_ROAM_FILS_OFFLOAD, 1836 WMI_TAG_PDEV_UPDATE_PMK_CACHE_CMD, 1837 WMI_TAG_PMK_CACHE, 1838 WMI_TAG_PDEV_UPDATE_FILS_HLP_PKT_CMD, 1839 WMI_TAG_ROAM_FILS_SYNCH, 1840 WMI_TAG_GTK_OFFLOAD_EXTENDED, 1841 WMI_TAG_ROAM_BG_SCAN_ROAMING, 1842 WMI_TAG_OIC_PING_OFFLOAD_PARAMS_CMD, 1843 WMI_TAG_OIC_PING_OFFLOAD_SET_ENABLE_CMD, 1844 WMI_TAG_OIC_PING_HANDOFF_EVENT, 1845 WMI_TAG_DHCP_LEASE_RENEW_OFFLOAD_CMD, 1846 WMI_TAG_DHCP_LEASE_RENEW_EVENT, 1847 WMI_TAG_BTM_CONFIG, 1848 WMI_TAG_DEBUG_MESG_FW_DATA_STALL, 1849 WMI_TAG_WLM_CONFIG_CMD, 1850 WMI_TAG_PDEV_UPDATE_CTLTABLE_REQUEST, 1851 WMI_TAG_PDEV_UPDATE_CTLTABLE_EVENT, 1852 WMI_TAG_ROAM_CND_SCORING_PARAM, 1853 WMI_TAG_PDEV_CONFIG_VENDOR_OUI_ACTION, 1854 WMI_TAG_VENDOR_OUI_EXT, 1855 WMI_TAG_ROAM_SYNCH_FRAME_EVENT, 1856 WMI_TAG_FD_SEND_FROM_HOST_CMD, 1857 WMI_TAG_ENABLE_FILS_CMD, 1858 WMI_TAG_HOST_SWFDA_EVENT, 1859 WMI_TAG_BCN_OFFLOAD_CTRL_CMD, 1860 WMI_TAG_PDEV_SET_AC_TX_QUEUE_OPTIMIZED_CMD, 1861 WMI_TAG_STATS_PERIOD, 1862 WMI_TAG_NDL_SCHEDULE_UPDATE, 1863 WMI_TAG_PEER_TID_MSDUQ_QDEPTH_THRESH_UPDATE_CMD, 1864 WMI_TAG_MSDUQ_QDEPTH_THRESH_UPDATE, 1865 WMI_TAG_PDEV_SET_RX_FILTER_PROMISCUOUS_CMD, 1866 WMI_TAG_SAR2_RESULT_EVENT, 1867 WMI_TAG_SAR_CAPABILITIES, 1868 WMI_TAG_SAP_OBSS_DETECTION_CFG_CMD, 1869 WMI_TAG_SAP_OBSS_DETECTION_INFO_EVT, 1870 WMI_TAG_DMA_RING_CAPABILITIES, 1871 WMI_TAG_DMA_RING_CFG_REQ, 1872 WMI_TAG_DMA_RING_CFG_RSP, 1873 WMI_TAG_DMA_BUF_RELEASE, 1874 WMI_TAG_DMA_BUF_RELEASE_ENTRY, 1875 WMI_TAG_SAR_GET_LIMITS_CMD, 1876 WMI_TAG_SAR_GET_LIMITS_EVENT, 1877 WMI_TAG_SAR_GET_LIMITS_EVENT_ROW, 1878 WMI_TAG_OFFLOAD_11K_REPORT, 1879 WMI_TAG_INVOKE_NEIGHBOR_REPORT, 1880 WMI_TAG_NEIGHBOR_REPORT_OFFLOAD, 1881 WMI_TAG_VDEV_SET_CONNECTIVITY_CHECK_STATS, 1882 WMI_TAG_VDEV_GET_CONNECTIVITY_CHECK_STATS, 1883 WMI_TAG_BPF_SET_VDEV_ENABLE_CMD, 1884 WMI_TAG_BPF_SET_VDEV_WORK_MEMORY_CMD, 1885 WMI_TAG_BPF_GET_VDEV_WORK_MEMORY_CMD, 1886 WMI_TAG_BPF_GET_VDEV_WORK_MEMORY_RESP_EVT, 1887 WMI_TAG_PDEV_GET_NFCAL_POWER, 1888 WMI_TAG_BSS_COLOR_CHANGE_ENABLE, 1889 WMI_TAG_OBSS_COLOR_COLLISION_DET_CONFIG, 1890 WMI_TAG_OBSS_COLOR_COLLISION_EVT, 1891 WMI_TAG_RUNTIME_DPD_RECAL_CMD, 1892 WMI_TAG_TWT_ENABLE_CMD, 1893 WMI_TAG_TWT_DISABLE_CMD, 1894 WMI_TAG_TWT_ADD_DIALOG_CMD, 1895 WMI_TAG_TWT_DEL_DIALOG_CMD, 1896 WMI_TAG_TWT_PAUSE_DIALOG_CMD, 1897 WMI_TAG_TWT_RESUME_DIALOG_CMD, 1898 WMI_TAG_TWT_ENABLE_COMPLETE_EVENT, 1899 WMI_TAG_TWT_DISABLE_COMPLETE_EVENT, 1900 WMI_TAG_TWT_ADD_DIALOG_COMPLETE_EVENT, 1901 WMI_TAG_TWT_DEL_DIALOG_COMPLETE_EVENT, 1902 WMI_TAG_TWT_PAUSE_DIALOG_COMPLETE_EVENT, 1903 WMI_TAG_TWT_RESUME_DIALOG_COMPLETE_EVENT, 1904 WMI_TAG_REQUEST_ROAM_SCAN_STATS_CMD, 1905 WMI_TAG_ROAM_SCAN_STATS_EVENT, 1906 WMI_TAG_PEER_TID_CONFIGURATIONS_CMD, 1907 WMI_TAG_VDEV_SET_CUSTOM_SW_RETRY_TH_CMD, 1908 WMI_TAG_GET_TPC_POWER_CMD, 1909 WMI_TAG_GET_TPC_POWER_EVENT, 1910 WMI_TAG_DMA_BUF_RELEASE_SPECTRAL_META_DATA, 1911 WMI_TAG_MOTION_DET_CONFIG_PARAMS_CMD, 1912 WMI_TAG_MOTION_DET_BASE_LINE_CONFIG_PARAMS_CMD, 1913 WMI_TAG_MOTION_DET_START_STOP_CMD, 1914 WMI_TAG_MOTION_DET_BASE_LINE_START_STOP_CMD, 1915 WMI_TAG_MOTION_DET_EVENT, 1916 WMI_TAG_MOTION_DET_BASE_LINE_EVENT, 1917 WMI_TAG_NDP_TRANSPORT_IP, 1918 WMI_TAG_OBSS_SPATIAL_REUSE_SET_CMD, 1919 WMI_TAG_ESP_ESTIMATE_EVENT, 1920 WMI_TAG_NAN_HOST_CONFIG, 1921 WMI_TAG_SPECTRAL_BIN_SCALING_PARAMS, 1922 WMI_TAG_PEER_CFR_CAPTURE_CMD, 1923 WMI_TAG_PEER_CHAN_WIDTH_SWITCH_CMD, 1924 WMI_TAG_CHAN_WIDTH_PEER_LIST, 1925 WMI_TAG_OBSS_SPATIAL_REUSE_SET_DEF_OBSS_THRESH_CMD, 1926 WMI_TAG_PDEV_HE_TB_ACTION_FRM_CMD, 1927 WMI_TAG_PEER_EXTD2_STATS, 1928 WMI_TAG_HPCS_PULSE_START_CMD, 1929 WMI_TAG_PDEV_CTL_FAILSAFE_CHECK_EVENT, 1930 WMI_TAG_VDEV_CHAINMASK_CONFIG_CMD, 1931 WMI_TAG_VDEV_BCN_OFFLOAD_QUIET_CONFIG_CMD, 1932 WMI_TAG_NAN_EVENT_INFO, 1933 WMI_TAG_NDP_CHANNEL_INFO, 1934 WMI_TAG_NDP_CMD, 1935 WMI_TAG_NDP_EVENT, 1936 /* TODO add all the missing cmds */ 1937 WMI_TAG_PDEV_PEER_PKTLOG_FILTER_CMD = 0x301, 1938 WMI_TAG_PDEV_PEER_PKTLOG_FILTER_INFO, 1939 WMI_TAG_SERVICE_READY_EXT2_EVENT = 0x334, 1940 WMI_TAG_FILS_DISCOVERY_TMPL_CMD = 0x344, 1941 WMI_TAG_MAC_PHY_CAPABILITIES_EXT = 0x36F, 1942 WMI_TAG_REGULATORY_RULE_EXT_STRUCT = 0x3A9, 1943 WMI_TAG_REG_CHAN_LIST_CC_EXT_EVENT, 1944 WMI_TAG_EHT_RATE_SET = 0x3C4, 1945 WMI_TAG_DCS_AWGN_INT_TYPE = 0x3C5, 1946 WMI_TAG_MLO_TX_SEND_PARAMS, 1947 WMI_TAG_MLO_PARTNER_LINK_PARAMS, 1948 WMI_TAG_MLO_PARTNER_LINK_PARAMS_PEER_ASSOC, 1949 WMI_TAG_MLO_SETUP_CMD = 0x3C9, 1950 WMI_TAG_MLO_SETUP_COMPLETE_EVENT, 1951 WMI_TAG_MLO_READY_CMD, 1952 WMI_TAG_MLO_TEARDOWN_CMD, 1953 WMI_TAG_MLO_TEARDOWN_COMPLETE, 1954 WMI_TAG_MLO_PEER_ASSOC_PARAMS = 0x3D0, 1955 WMI_TAG_MLO_PEER_CREATE_PARAMS = 0x3D5, 1956 WMI_TAG_MLO_VDEV_START_PARAMS = 0x3D6, 1957 WMI_TAG_MLO_VDEV_CREATE_PARAMS = 0x3D7, 1958 WMI_TAG_PDEV_SET_BIOS_SAR_TABLE_CMD = 0x3D8, 1959 WMI_TAG_PDEV_SET_BIOS_GEO_TABLE_CMD = 0x3D9, 1960 WMI_TAG_PDEV_SET_BIOS_INTERFACE_CMD = 0x3FB, 1961 WMI_TAG_MAX 1962 }; 1963 1964 enum wmi_tlv_service { 1965 WMI_TLV_SERVICE_BEACON_OFFLOAD = 0, 1966 WMI_TLV_SERVICE_SCAN_OFFLOAD = 1, 1967 WMI_TLV_SERVICE_ROAM_SCAN_OFFLOAD = 2, 1968 WMI_TLV_SERVICE_BCN_MISS_OFFLOAD = 3, 1969 WMI_TLV_SERVICE_STA_PWRSAVE = 4, 1970 WMI_TLV_SERVICE_STA_ADVANCED_PWRSAVE = 5, 1971 WMI_TLV_SERVICE_AP_UAPSD = 6, 1972 WMI_TLV_SERVICE_AP_DFS = 7, 1973 WMI_TLV_SERVICE_11AC = 8, 1974 WMI_TLV_SERVICE_BLOCKACK = 9, 1975 WMI_TLV_SERVICE_PHYERR = 10, 1976 WMI_TLV_SERVICE_BCN_FILTER = 11, 1977 WMI_TLV_SERVICE_RTT = 12, 1978 WMI_TLV_SERVICE_WOW = 13, 1979 WMI_TLV_SERVICE_RATECTRL_CACHE = 14, 1980 WMI_TLV_SERVICE_IRAM_TIDS = 15, 1981 WMI_TLV_SERVICE_ARPNS_OFFLOAD = 16, 1982 WMI_TLV_SERVICE_NLO = 17, 1983 WMI_TLV_SERVICE_GTK_OFFLOAD = 18, 1984 WMI_TLV_SERVICE_SCAN_SCH = 19, 1985 WMI_TLV_SERVICE_CSA_OFFLOAD = 20, 1986 WMI_TLV_SERVICE_CHATTER = 21, 1987 WMI_TLV_SERVICE_COEX_FREQAVOID = 22, 1988 WMI_TLV_SERVICE_PACKET_POWER_SAVE = 23, 1989 WMI_TLV_SERVICE_FORCE_FW_HANG = 24, 1990 WMI_TLV_SERVICE_GPIO = 25, 1991 WMI_TLV_SERVICE_STA_DTIM_PS_MODULATED_DTIM = 26, 1992 WMI_STA_UAPSD_BASIC_AUTO_TRIG = 27, 1993 WMI_STA_UAPSD_VAR_AUTO_TRIG = 28, 1994 WMI_TLV_SERVICE_STA_KEEP_ALIVE = 29, 1995 WMI_TLV_SERVICE_TX_ENCAP = 30, 1996 WMI_TLV_SERVICE_AP_PS_DETECT_OUT_OF_SYNC = 31, 1997 WMI_TLV_SERVICE_EARLY_RX = 32, 1998 WMI_TLV_SERVICE_STA_SMPS = 33, 1999 WMI_TLV_SERVICE_FWTEST = 34, 2000 WMI_TLV_SERVICE_STA_WMMAC = 35, 2001 WMI_TLV_SERVICE_TDLS = 36, 2002 WMI_TLV_SERVICE_BURST = 37, 2003 WMI_TLV_SERVICE_MCC_BCN_INTERVAL_CHANGE = 38, 2004 WMI_TLV_SERVICE_ADAPTIVE_OCS = 39, 2005 WMI_TLV_SERVICE_BA_SSN_SUPPORT = 40, 2006 WMI_TLV_SERVICE_FILTER_IPSEC_NATKEEPALIVE = 41, 2007 WMI_TLV_SERVICE_WLAN_HB = 42, 2008 WMI_TLV_SERVICE_LTE_ANT_SHARE_SUPPORT = 43, 2009 WMI_TLV_SERVICE_BATCH_SCAN = 44, 2010 WMI_TLV_SERVICE_QPOWER = 45, 2011 WMI_TLV_SERVICE_PLMREQ = 46, 2012 WMI_TLV_SERVICE_THERMAL_MGMT = 47, 2013 WMI_TLV_SERVICE_RMC = 48, 2014 WMI_TLV_SERVICE_MHF_OFFLOAD = 49, 2015 WMI_TLV_SERVICE_COEX_SAR = 50, 2016 WMI_TLV_SERVICE_BCN_TXRATE_OVERRIDE = 51, 2017 WMI_TLV_SERVICE_NAN = 52, 2018 WMI_TLV_SERVICE_L1SS_STAT = 53, 2019 WMI_TLV_SERVICE_ESTIMATE_LINKSPEED = 54, 2020 WMI_TLV_SERVICE_OBSS_SCAN = 55, 2021 WMI_TLV_SERVICE_TDLS_OFFCHAN = 56, 2022 WMI_TLV_SERVICE_TDLS_UAPSD_BUFFER_STA = 57, 2023 WMI_TLV_SERVICE_TDLS_UAPSD_SLEEP_STA = 58, 2024 WMI_TLV_SERVICE_IBSS_PWRSAVE = 59, 2025 WMI_TLV_SERVICE_LPASS = 60, 2026 WMI_TLV_SERVICE_EXTSCAN = 61, 2027 WMI_TLV_SERVICE_D0WOW = 62, 2028 WMI_TLV_SERVICE_HSOFFLOAD = 63, 2029 WMI_TLV_SERVICE_ROAM_HO_OFFLOAD = 64, 2030 WMI_TLV_SERVICE_RX_FULL_REORDER = 65, 2031 WMI_TLV_SERVICE_DHCP_OFFLOAD = 66, 2032 WMI_TLV_SERVICE_STA_RX_IPA_OFFLOAD_SUPPORT = 67, 2033 WMI_TLV_SERVICE_MDNS_OFFLOAD = 68, 2034 WMI_TLV_SERVICE_SAP_AUTH_OFFLOAD = 69, 2035 WMI_TLV_SERVICE_DUAL_BAND_SIMULTANEOUS_SUPPORT = 70, 2036 WMI_TLV_SERVICE_OCB = 71, 2037 WMI_TLV_SERVICE_AP_ARPNS_OFFLOAD = 72, 2038 WMI_TLV_SERVICE_PER_BAND_CHAINMASK_SUPPORT = 73, 2039 WMI_TLV_SERVICE_PACKET_FILTER_OFFLOAD = 74, 2040 WMI_TLV_SERVICE_MGMT_TX_HTT = 75, 2041 WMI_TLV_SERVICE_MGMT_TX_WMI = 76, 2042 WMI_TLV_SERVICE_EXT_MSG = 77, 2043 WMI_TLV_SERVICE_MAWC = 78, 2044 WMI_TLV_SERVICE_PEER_ASSOC_CONF = 79, 2045 WMI_TLV_SERVICE_EGAP = 80, 2046 WMI_TLV_SERVICE_STA_PMF_OFFLOAD = 81, 2047 WMI_TLV_SERVICE_UNIFIED_WOW_CAPABILITY = 82, 2048 WMI_TLV_SERVICE_ENHANCED_PROXY_STA = 83, 2049 WMI_TLV_SERVICE_ATF = 84, 2050 WMI_TLV_SERVICE_COEX_GPIO = 85, 2051 WMI_TLV_SERVICE_AUX_SPECTRAL_INTF = 86, 2052 WMI_TLV_SERVICE_AUX_CHAN_LOAD_INTF = 87, 2053 WMI_TLV_SERVICE_BSS_CHANNEL_INFO_64 = 88, 2054 WMI_TLV_SERVICE_ENTERPRISE_MESH = 89, 2055 WMI_TLV_SERVICE_RESTRT_CHNL_SUPPORT = 90, 2056 WMI_TLV_SERVICE_BPF_OFFLOAD = 91, 2057 WMI_TLV_SERVICE_SYNC_DELETE_CMDS = 92, 2058 WMI_TLV_SERVICE_SMART_ANTENNA_SW_SUPPORT = 93, 2059 WMI_TLV_SERVICE_SMART_ANTENNA_HW_SUPPORT = 94, 2060 WMI_TLV_SERVICE_RATECTRL_LIMIT_MAX_MIN_RATES = 95, 2061 WMI_TLV_SERVICE_NAN_DATA = 96, 2062 WMI_TLV_SERVICE_NAN_RTT = 97, 2063 WMI_TLV_SERVICE_11AX = 98, 2064 WMI_TLV_SERVICE_DEPRECATED_REPLACE = 99, 2065 WMI_TLV_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE = 100, 2066 WMI_TLV_SERVICE_ENHANCED_MCAST_FILTER = 101, 2067 WMI_TLV_SERVICE_PERIODIC_CHAN_STAT_SUPPORT = 102, 2068 WMI_TLV_SERVICE_MESH_11S = 103, 2069 WMI_TLV_SERVICE_HALF_RATE_QUARTER_RATE_SUPPORT = 104, 2070 WMI_TLV_SERVICE_VDEV_RX_FILTER = 105, 2071 WMI_TLV_SERVICE_P2P_LISTEN_OFFLOAD_SUPPORT = 106, 2072 WMI_TLV_SERVICE_MARK_FIRST_WAKEUP_PACKET = 107, 2073 WMI_TLV_SERVICE_MULTIPLE_MCAST_FILTER_SET = 108, 2074 WMI_TLV_SERVICE_HOST_MANAGED_RX_REORDER = 109, 2075 WMI_TLV_SERVICE_FLASH_RDWR_SUPPORT = 110, 2076 WMI_TLV_SERVICE_WLAN_STATS_REPORT = 111, 2077 WMI_TLV_SERVICE_TX_MSDU_ID_NEW_PARTITION_SUPPORT = 112, 2078 WMI_TLV_SERVICE_DFS_PHYERR_OFFLOAD = 113, 2079 WMI_TLV_SERVICE_RCPI_SUPPORT = 114, 2080 WMI_TLV_SERVICE_FW_MEM_DUMP_SUPPORT = 115, 2081 WMI_TLV_SERVICE_PEER_STATS_INFO = 116, 2082 WMI_TLV_SERVICE_REGULATORY_DB = 117, 2083 WMI_TLV_SERVICE_11D_OFFLOAD = 118, 2084 WMI_TLV_SERVICE_HW_DATA_FILTERING = 119, 2085 WMI_TLV_SERVICE_MULTIPLE_VDEV_RESTART = 120, 2086 WMI_TLV_SERVICE_PKT_ROUTING = 121, 2087 WMI_TLV_SERVICE_CHECK_CAL_VERSION = 122, 2088 WMI_TLV_SERVICE_OFFCHAN_TX_WMI = 123, 2089 WMI_TLV_SERVICE_8SS_TX_BFEE = 124, 2090 WMI_TLV_SERVICE_EXTENDED_NSS_SUPPORT = 125, 2091 WMI_TLV_SERVICE_ACK_TIMEOUT = 126, 2092 WMI_TLV_SERVICE_PDEV_BSS_CHANNEL_INFO_64 = 127, 2093 2094 WMI_MAX_SERVICE = 128, 2095 2096 WMI_TLV_SERVICE_CHAN_LOAD_INFO = 128, 2097 WMI_TLV_SERVICE_TX_PPDU_INFO_STATS_SUPPORT = 129, 2098 WMI_TLV_SERVICE_VDEV_LIMIT_OFFCHAN_SUPPORT = 130, 2099 WMI_TLV_SERVICE_FILS_SUPPORT = 131, 2100 WMI_TLV_SERVICE_WLAN_OIC_PING_OFFLOAD = 132, 2101 WMI_TLV_SERVICE_WLAN_DHCP_RENEW = 133, 2102 WMI_TLV_SERVICE_MAWC_SUPPORT = 134, 2103 WMI_TLV_SERVICE_VDEV_LATENCY_CONFIG = 135, 2104 WMI_TLV_SERVICE_PDEV_UPDATE_CTLTABLE_SUPPORT = 136, 2105 WMI_TLV_SERVICE_PKTLOG_SUPPORT_OVER_HTT = 137, 2106 WMI_TLV_SERVICE_VDEV_MULTI_GROUP_KEY_SUPPORT = 138, 2107 WMI_TLV_SERVICE_SCAN_PHYMODE_SUPPORT = 139, 2108 WMI_TLV_SERVICE_THERM_THROT = 140, 2109 WMI_TLV_SERVICE_BCN_OFFLOAD_START_STOP_SUPPORT = 141, 2110 WMI_TLV_SERVICE_WOW_WAKEUP_BY_TIMER_PATTERN = 142, 2111 WMI_TLV_SERVICE_PEER_MAP_UNMAP_V2_SUPPORT = 143, 2112 WMI_TLV_SERVICE_OFFCHAN_DATA_TID_SUPPORT = 144, 2113 WMI_TLV_SERVICE_RX_PROMISC_ENABLE_SUPPORT = 145, 2114 WMI_TLV_SERVICE_SUPPORT_DIRECT_DMA = 146, 2115 WMI_TLV_SERVICE_AP_OBSS_DETECTION_OFFLOAD = 147, 2116 WMI_TLV_SERVICE_11K_NEIGHBOUR_REPORT_SUPPORT = 148, 2117 WMI_TLV_SERVICE_LISTEN_INTERVAL_OFFLOAD_SUPPORT = 149, 2118 WMI_TLV_SERVICE_BSS_COLOR_OFFLOAD = 150, 2119 WMI_TLV_SERVICE_RUNTIME_DPD_RECAL = 151, 2120 WMI_TLV_SERVICE_STA_TWT = 152, 2121 WMI_TLV_SERVICE_AP_TWT = 153, 2122 WMI_TLV_SERVICE_GMAC_OFFLOAD_SUPPORT = 154, 2123 WMI_TLV_SERVICE_SPOOF_MAC_SUPPORT = 155, 2124 WMI_TLV_SERVICE_PEER_TID_CONFIGS_SUPPORT = 156, 2125 WMI_TLV_SERVICE_VDEV_SWRETRY_PER_AC_CONFIG_SUPPORT = 157, 2126 WMI_TLV_SERVICE_DUAL_BEACON_ON_SINGLE_MAC_SCC_SUPPORT = 158, 2127 WMI_TLV_SERVICE_DUAL_BEACON_ON_SINGLE_MAC_MCC_SUPPORT = 159, 2128 WMI_TLV_SERVICE_MOTION_DET = 160, 2129 WMI_TLV_SERVICE_INFRA_MBSSID = 161, 2130 WMI_TLV_SERVICE_OBSS_SPATIAL_REUSE = 162, 2131 WMI_TLV_SERVICE_VDEV_DIFFERENT_BEACON_INTERVAL_SUPPORT = 163, 2132 WMI_TLV_SERVICE_NAN_DBS_SUPPORT = 164, 2133 WMI_TLV_SERVICE_NDI_DBS_SUPPORT = 165, 2134 WMI_TLV_SERVICE_NAN_SAP_SUPPORT = 166, 2135 WMI_TLV_SERVICE_NDI_SAP_SUPPORT = 167, 2136 WMI_TLV_SERVICE_CFR_CAPTURE_SUPPORT = 168, 2137 WMI_TLV_SERVICE_CFR_CAPTURE_IND_MSG_TYPE_1 = 169, 2138 WMI_TLV_SERVICE_ESP_SUPPORT = 170, 2139 WMI_TLV_SERVICE_PEER_CHWIDTH_CHANGE = 171, 2140 WMI_TLV_SERVICE_WLAN_HPCS_PULSE = 172, 2141 WMI_TLV_SERVICE_PER_VDEV_CHAINMASK_CONFIG_SUPPORT = 173, 2142 WMI_TLV_SERVICE_TX_DATA_MGMT_ACK_RSSI = 174, 2143 WMI_TLV_SERVICE_NAN_DISABLE_SUPPORT = 175, 2144 WMI_TLV_SERVICE_HTT_H2T_NO_HTC_HDR_LEN_IN_MSG_LEN = 176, 2145 WMI_TLV_SERVICE_COEX_SUPPORT_UNEQUAL_ISOLATION = 177, 2146 WMI_TLV_SERVICE_HW_DB2DBM_CONVERSION_SUPPORT = 178, 2147 WMI_TLV_SERVICE_SUPPORT_EXTEND_ADDRESS = 179, 2148 WMI_TLV_SERVICE_BEACON_RECEPTION_STATS = 180, 2149 WMI_TLV_SERVICE_FETCH_TX_PN = 181, 2150 WMI_TLV_SERVICE_PEER_UNMAP_RESPONSE_SUPPORT = 182, 2151 WMI_TLV_SERVICE_TX_PER_PEER_AMPDU_SIZE = 183, 2152 WMI_TLV_SERVICE_BSS_COLOR_SWITCH_COUNT = 184, 2153 WMI_TLV_SERVICE_HTT_PEER_STATS_SUPPORT = 185, 2154 WMI_TLV_SERVICE_UL_RU26_ALLOWED = 186, 2155 WMI_TLV_SERVICE_GET_MWS_COEX_STATE = 187, 2156 WMI_TLV_SERVICE_GET_MWS_DPWB_STATE = 188, 2157 WMI_TLV_SERVICE_GET_MWS_TDM_STATE = 189, 2158 WMI_TLV_SERVICE_GET_MWS_IDRX_STATE = 190, 2159 WMI_TLV_SERVICE_GET_MWS_ANTENNA_SHARING_STATE = 191, 2160 WMI_TLV_SERVICE_ENHANCED_TPC_CONFIG_EVENT = 192, 2161 WMI_TLV_SERVICE_WLM_STATS_REQUEST = 193, 2162 WMI_TLV_SERVICE_EXT_PEER_TID_CONFIGS_SUPPORT = 194, 2163 WMI_TLV_SERVICE_WPA3_FT_SAE_SUPPORT = 195, 2164 WMI_TLV_SERVICE_WPA3_FT_SUITE_B_SUPPORT = 196, 2165 WMI_TLV_SERVICE_VOW_ENABLE = 197, 2166 WMI_TLV_SERVICE_CFR_CAPTURE_IND_EVT_TYPE_1 = 198, 2167 WMI_TLV_SERVICE_BROADCAST_TWT = 199, 2168 WMI_TLV_SERVICE_RAP_DETECTION_SUPPORT = 200, 2169 WMI_TLV_SERVICE_PS_TDCC = 201, 2170 WMI_TLV_SERVICE_THREE_WAY_COEX_CONFIG_LEGACY = 202, 2171 WMI_TLV_SERVICE_THREE_WAY_COEX_CONFIG_OVERRIDE = 203, 2172 WMI_TLV_SERVICE_TX_PWR_PER_PEER = 204, 2173 WMI_TLV_SERVICE_STA_PLUS_STA_SUPPORT = 205, 2174 WMI_TLV_SERVICE_WPA3_FT_FILS = 206, 2175 WMI_TLV_SERVICE_ADAPTIVE_11R_ROAM = 207, 2176 WMI_TLV_SERVICE_CHAN_RF_CHARACTERIZATION_INFO = 208, 2177 WMI_TLV_SERVICE_FW_IFACE_COMBINATION_SUPPORT = 209, 2178 WMI_TLV_SERVICE_TX_COMPL_TSF64 = 210, 2179 WMI_TLV_SERVICE_DSM_ROAM_FILTER = 211, 2180 WMI_TLV_SERVICE_PACKET_CAPTURE_SUPPORT = 212, 2181 WMI_TLV_SERVICE_PER_PEER_HTT_STATS_RESET = 213, 2182 WMI_TLV_SERVICE_FREQINFO_IN_METADATA = 219, 2183 WMI_TLV_SERVICE_EXT2_MSG = 220, 2184 WMI_TLV_SERVICE_MBSS_PARAM_IN_VDEV_START_SUPPORT = 253, 2185 2186 WMI_MAX_EXT_SERVICE = 256, 2187 2188 WMI_TLV_SERVICE_REG_CC_EXT_EVENT_SUPPORT = 281, 2189 2190 WMI_TLV_SERVICE_11BE = 289, 2191 2192 WMI_TLV_SERVICE_WMSK_COMPACTION_RX_TLVS = 361, 2193 2194 WMI_TLV_SERVICE_PEER_METADATA_V1A_V1B_SUPPORT = 365, 2195 2196 WMI_MAX_EXT2_SERVICE, 2197 }; 2198 2199 enum { 2200 WMI_SMPS_FORCED_MODE_NONE = 0, 2201 WMI_SMPS_FORCED_MODE_DISABLED, 2202 WMI_SMPS_FORCED_MODE_STATIC, 2203 WMI_SMPS_FORCED_MODE_DYNAMIC 2204 }; 2205 2206 enum wmi_tpc_chainmask { 2207 WMI_TPC_CHAINMASK_CONFIG_BAND_2G = 0, 2208 WMI_TPC_CHAINMASK_CONFIG_BAND_5G = 1, 2209 WMI_NUM_SUPPORTED_BAND_MAX = 2, 2210 }; 2211 2212 enum wmi_peer_param { 2213 WMI_PEER_MIMO_PS_STATE = 1, 2214 WMI_PEER_AMPDU = 2, 2215 WMI_PEER_AUTHORIZE = 3, 2216 WMI_PEER_CHWIDTH = 4, 2217 WMI_PEER_NSS = 5, 2218 WMI_PEER_USE_4ADDR = 6, 2219 WMI_PEER_MEMBERSHIP = 7, 2220 WMI_PEER_USERPOS = 8, 2221 WMI_PEER_CRIT_PROTO_HINT_ENABLED = 9, 2222 WMI_PEER_TX_FAIL_CNT_THR = 10, 2223 WMI_PEER_SET_HW_RETRY_CTS2S = 11, 2224 WMI_PEER_IBSS_ATIM_WINDOW_LENGTH = 12, 2225 WMI_PEER_PHYMODE = 13, 2226 WMI_PEER_USE_FIXED_PWR = 14, 2227 WMI_PEER_PARAM_FIXED_RATE = 15, 2228 WMI_PEER_SET_MU_WHITELIST = 16, 2229 WMI_PEER_SET_MAX_TX_RATE = 17, 2230 WMI_PEER_SET_MIN_TX_RATE = 18, 2231 WMI_PEER_SET_DEFAULT_ROUTING = 19, 2232 WMI_PEER_CHWIDTH_PUNCTURE_20MHZ_BITMAP = 39, 2233 }; 2234 2235 #define WMI_PEER_PUNCTURE_BITMAP GENMASK(23, 8) 2236 2237 enum wmi_slot_time { 2238 WMI_VDEV_SLOT_TIME_LONG = 1, 2239 WMI_VDEV_SLOT_TIME_SHORT = 2, 2240 }; 2241 2242 enum wmi_preamble { 2243 WMI_VDEV_PREAMBLE_LONG = 1, 2244 WMI_VDEV_PREAMBLE_SHORT = 2, 2245 }; 2246 2247 enum wmi_peer_smps_state { 2248 WMI_PEER_SMPS_PS_NONE = 0, 2249 WMI_PEER_SMPS_STATIC = 1, 2250 WMI_PEER_SMPS_DYNAMIC = 2 2251 }; 2252 2253 enum wmi_peer_chwidth { 2254 WMI_PEER_CHWIDTH_20MHZ = 0, 2255 WMI_PEER_CHWIDTH_40MHZ = 1, 2256 WMI_PEER_CHWIDTH_80MHZ = 2, 2257 WMI_PEER_CHWIDTH_160MHZ = 3, 2258 WMI_PEER_CHWIDTH_320MHZ = 4, 2259 }; 2260 2261 enum wmi_beacon_gen_mode { 2262 WMI_BEACON_STAGGERED_MODE = 0, 2263 WMI_BEACON_BURST_MODE = 1 2264 }; 2265 2266 enum wmi_direct_buffer_module { 2267 WMI_DIRECT_BUF_SPECTRAL = 0, 2268 WMI_DIRECT_BUF_CFR = 1, 2269 2270 /* keep it last */ 2271 WMI_DIRECT_BUF_MAX 2272 }; 2273 2274 struct ath12k_wmi_pdev_band_arg { 2275 u32 pdev_id; 2276 u32 start_freq; 2277 u32 end_freq; 2278 }; 2279 2280 struct ath12k_wmi_ppe_threshold_arg { 2281 u32 numss_m1; 2282 u32 ru_bit_mask; 2283 u32 ppet16_ppet8_ru3_ru0[WMI_MAX_NUM_SS]; 2284 }; 2285 2286 #define PSOC_HOST_MAX_PHY_SIZE (3) 2287 #define ATH12K_11B_SUPPORT BIT(0) 2288 #define ATH12K_11G_SUPPORT BIT(1) 2289 #define ATH12K_11A_SUPPORT BIT(2) 2290 #define ATH12K_11N_SUPPORT BIT(3) 2291 #define ATH12K_11AC_SUPPORT BIT(4) 2292 #define ATH12K_11AX_SUPPORT BIT(5) 2293 2294 struct ath12k_wmi_hal_reg_capabilities_ext_arg { 2295 u32 phy_id; 2296 u32 eeprom_reg_domain; 2297 u32 eeprom_reg_domain_ext; 2298 u32 regcap1; 2299 u32 regcap2; 2300 u32 wireless_modes; 2301 u32 low_2ghz_chan; 2302 u32 high_2ghz_chan; 2303 u32 low_5ghz_chan; 2304 u32 high_5ghz_chan; 2305 }; 2306 2307 #define WMI_HOST_MAX_PDEV 3 2308 2309 struct ath12k_wmi_host_mem_chunk_params { 2310 __le32 tlv_header; 2311 __le32 req_id; 2312 __le32 ptr; 2313 __le32 size; 2314 } __packed; 2315 2316 struct ath12k_wmi_host_mem_chunk_arg { 2317 void *vaddr; 2318 dma_addr_t paddr; 2319 u32 len; 2320 u32 req_id; 2321 }; 2322 2323 enum ath12k_peer_metadata_version { 2324 ATH12K_PEER_METADATA_V0, 2325 ATH12K_PEER_METADATA_V1, 2326 ATH12K_PEER_METADATA_V1A, 2327 ATH12K_PEER_METADATA_V1B 2328 }; 2329 2330 struct ath12k_wmi_resource_config_arg { 2331 u32 num_vdevs; 2332 u32 num_peers; 2333 u32 num_active_peers; 2334 u32 num_offload_peers; 2335 u32 num_offload_reorder_buffs; 2336 u32 num_peer_keys; 2337 u32 num_tids; 2338 u32 ast_skid_limit; 2339 u32 tx_chain_mask; 2340 u32 rx_chain_mask; 2341 u32 rx_timeout_pri[4]; 2342 u32 rx_decap_mode; 2343 u32 scan_max_pending_req; 2344 u32 bmiss_offload_max_vdev; 2345 u32 roam_offload_max_vdev; 2346 u32 roam_offload_max_ap_profiles; 2347 u32 num_mcast_groups; 2348 u32 num_mcast_table_elems; 2349 u32 mcast2ucast_mode; 2350 u32 tx_dbg_log_size; 2351 u32 num_wds_entries; 2352 u32 dma_burst_size; 2353 u32 mac_aggr_delim; 2354 u32 rx_skip_defrag_timeout_dup_detection_check; 2355 u32 vow_config; 2356 u32 gtk_offload_max_vdev; 2357 u32 num_msdu_desc; 2358 u32 max_frag_entries; 2359 u32 max_peer_ext_stats; 2360 u32 smart_ant_cap; 2361 u32 bk_minfree; 2362 u32 be_minfree; 2363 u32 vi_minfree; 2364 u32 vo_minfree; 2365 u32 rx_batchmode; 2366 u32 tt_support; 2367 u32 atf_config; 2368 u32 iphdr_pad_config; 2369 u32 qwrap_config:16, 2370 alloc_frag_desc_for_data_pkt:16; 2371 u32 num_tdls_vdevs; 2372 u32 num_tdls_conn_table_entries; 2373 u32 beacon_tx_offload_max_vdev; 2374 u32 num_multicast_filter_entries; 2375 u32 num_wow_filters; 2376 u32 num_keep_alive_pattern; 2377 u32 keep_alive_pattern_size; 2378 u32 max_tdls_concurrent_sleep_sta; 2379 u32 max_tdls_concurrent_buffer_sta; 2380 u32 wmi_send_separate; 2381 u32 num_ocb_vdevs; 2382 u32 num_ocb_channels; 2383 u32 num_ocb_schedules; 2384 u32 num_ns_ext_tuples_cfg; 2385 u32 bpf_instruction_size; 2386 u32 max_bssid_rx_filters; 2387 u32 use_pdev_id; 2388 u32 peer_map_unmap_version; 2389 u32 sched_params; 2390 u32 twt_ap_pdev_count; 2391 u32 twt_ap_sta_count; 2392 enum ath12k_peer_metadata_version peer_metadata_ver; 2393 u32 ema_max_vap_cnt; 2394 u32 ema_max_profile_period; 2395 bool is_reg_cc_ext_event_supported; 2396 }; 2397 2398 struct ath12k_wmi_init_cmd_arg { 2399 struct ath12k_wmi_resource_config_arg res_cfg; 2400 u8 num_mem_chunks; 2401 struct ath12k_wmi_host_mem_chunk_arg *mem_chunks; 2402 u32 hw_mode_id; 2403 u32 num_band_to_mac; 2404 struct ath12k_wmi_pdev_band_arg band_to_mac[WMI_HOST_MAX_PDEV]; 2405 }; 2406 2407 struct ath12k_wmi_pdev_band_to_mac_params { 2408 __le32 tlv_header; 2409 __le32 pdev_id; 2410 __le32 start_freq; 2411 __le32 end_freq; 2412 } __packed; 2413 2414 /* This is both individual command WMI_PDEV_SET_HW_MODE_CMDID and also part 2415 * of WMI_TAG_INIT_CMD. 2416 */ 2417 struct ath12k_wmi_pdev_set_hw_mode_cmd { 2418 __le32 tlv_header; 2419 __le32 pdev_id; 2420 __le32 hw_mode_index; 2421 __le32 num_band_to_mac; 2422 } __packed; 2423 2424 struct ath12k_wmi_ppe_threshold_params { 2425 __le32 numss_m1; /** NSS - 1*/ 2426 __le32 ru_info; 2427 __le32 ppet16_ppet8_ru3_ru0[WMI_MAX_NUM_SS]; 2428 } __packed; 2429 2430 #define HW_BD_INFO_SIZE 5 2431 2432 struct ath12k_wmi_abi_version_params { 2433 __le32 abi_version_0; 2434 __le32 abi_version_1; 2435 __le32 abi_version_ns_0; 2436 __le32 abi_version_ns_1; 2437 __le32 abi_version_ns_2; 2438 __le32 abi_version_ns_3; 2439 } __packed; 2440 2441 struct wmi_init_cmd { 2442 __le32 tlv_header; 2443 struct ath12k_wmi_abi_version_params host_abi_vers; 2444 __le32 num_host_mem_chunks; 2445 } __packed; 2446 2447 #define WMI_RSRC_CFG_HOST_SVC_FLAG_REG_CC_EXT_SUPPORT_BIT 4 2448 #define WMI_RSRC_CFG_FLAGS2_RX_PEER_METADATA_VERSION GENMASK(5, 4) 2449 #define WMI_RSRC_CFG_FLAG1_BSS_CHANNEL_INFO_64 BIT(5) 2450 #define WMI_RSRC_CFG_FLAGS2_CALC_NEXT_DTIM_COUNT_SET BIT(9) 2451 2452 struct ath12k_wmi_resource_config_params { 2453 __le32 tlv_header; 2454 __le32 num_vdevs; 2455 __le32 num_peers; 2456 __le32 num_offload_peers; 2457 __le32 num_offload_reorder_buffs; 2458 __le32 num_peer_keys; 2459 __le32 num_tids; 2460 __le32 ast_skid_limit; 2461 __le32 tx_chain_mask; 2462 __le32 rx_chain_mask; 2463 __le32 rx_timeout_pri[4]; 2464 __le32 rx_decap_mode; 2465 __le32 scan_max_pending_req; 2466 __le32 bmiss_offload_max_vdev; 2467 __le32 roam_offload_max_vdev; 2468 __le32 roam_offload_max_ap_profiles; 2469 __le32 num_mcast_groups; 2470 __le32 num_mcast_table_elems; 2471 __le32 mcast2ucast_mode; 2472 __le32 tx_dbg_log_size; 2473 __le32 num_wds_entries; 2474 __le32 dma_burst_size; 2475 __le32 mac_aggr_delim; 2476 __le32 rx_skip_defrag_timeout_dup_detection_check; 2477 __le32 vow_config; 2478 __le32 gtk_offload_max_vdev; 2479 __le32 num_msdu_desc; 2480 __le32 max_frag_entries; 2481 __le32 num_tdls_vdevs; 2482 __le32 num_tdls_conn_table_entries; 2483 __le32 beacon_tx_offload_max_vdev; 2484 __le32 num_multicast_filter_entries; 2485 __le32 num_wow_filters; 2486 __le32 num_keep_alive_pattern; 2487 __le32 keep_alive_pattern_size; 2488 __le32 max_tdls_concurrent_sleep_sta; 2489 __le32 max_tdls_concurrent_buffer_sta; 2490 __le32 wmi_send_separate; 2491 __le32 num_ocb_vdevs; 2492 __le32 num_ocb_channels; 2493 __le32 num_ocb_schedules; 2494 __le32 flag1; 2495 __le32 smart_ant_cap; 2496 __le32 bk_minfree; 2497 __le32 be_minfree; 2498 __le32 vi_minfree; 2499 __le32 vo_minfree; 2500 __le32 alloc_frag_desc_for_data_pkt; 2501 __le32 num_ns_ext_tuples_cfg; 2502 __le32 bpf_instruction_size; 2503 __le32 max_bssid_rx_filters; 2504 __le32 use_pdev_id; 2505 __le32 max_num_dbs_scan_duty_cycle; 2506 __le32 max_num_group_keys; 2507 __le32 peer_map_unmap_version; 2508 __le32 sched_params; 2509 __le32 twt_ap_pdev_count; 2510 __le32 twt_ap_sta_count; 2511 __le32 max_nlo_ssids; 2512 __le32 num_pkt_filters; 2513 __le32 num_max_sta_vdevs; 2514 __le32 max_bssid_indicator; 2515 __le32 ul_resp_config; 2516 __le32 msdu_flow_override_config0; 2517 __le32 msdu_flow_override_config1; 2518 __le32 flags2; 2519 __le32 host_service_flags; 2520 __le32 max_rnr_neighbours; 2521 __le32 ema_max_vap_cnt; 2522 __le32 ema_max_profile_period; 2523 } __packed; 2524 2525 struct wmi_service_ready_event { 2526 __le32 fw_build_vers; 2527 struct ath12k_wmi_abi_version_params fw_abi_vers; 2528 __le32 phy_capability; 2529 __le32 max_frag_entry; 2530 __le32 num_rf_chains; 2531 __le32 ht_cap_info; 2532 __le32 vht_cap_info; 2533 __le32 vht_supp_mcs; 2534 __le32 hw_min_tx_power; 2535 __le32 hw_max_tx_power; 2536 __le32 sys_cap_info; 2537 __le32 min_pkt_size_enable; 2538 __le32 max_bcn_ie_size; 2539 __le32 num_mem_reqs; 2540 __le32 max_num_scan_channels; 2541 __le32 hw_bd_id; 2542 __le32 hw_bd_info[HW_BD_INFO_SIZE]; 2543 __le32 max_supported_macs; 2544 __le32 wmi_fw_sub_feat_caps; 2545 __le32 num_dbs_hw_modes; 2546 /* txrx_chainmask 2547 * [7:0] - 2G band tx chain mask 2548 * [15:8] - 2G band rx chain mask 2549 * [23:16] - 5G band tx chain mask 2550 * [31:24] - 5G band rx chain mask 2551 */ 2552 __le32 txrx_chainmask; 2553 __le32 default_dbs_hw_mode_index; 2554 __le32 num_msdu_desc; 2555 } __packed; 2556 2557 #define WMI_SERVICE_BM_SIZE ((WMI_MAX_SERVICE + sizeof(u32) - 1) / sizeof(u32)) 2558 2559 #define WMI_SERVICE_SEGMENT_BM_SIZE32 4 /* 4x u32 = 128 bits */ 2560 #define WMI_SERVICE_EXT_BM_SIZE (WMI_SERVICE_SEGMENT_BM_SIZE32 * sizeof(u32)) 2561 #define WMI_AVAIL_SERVICE_BITS_IN_SIZE32 32 2562 #define WMI_SERVICE_BITS_IN_SIZE32 4 2563 2564 struct wmi_service_ready_ext_event { 2565 __le32 default_conc_scan_config_bits; 2566 __le32 default_fw_config_bits; 2567 struct ath12k_wmi_ppe_threshold_params ppet; 2568 __le32 he_cap_info; 2569 __le32 mpdu_density; 2570 __le32 max_bssid_rx_filters; 2571 __le32 fw_build_vers_ext; 2572 __le32 max_nlo_ssids; 2573 __le32 max_bssid_indicator; 2574 __le32 he_cap_info_ext; 2575 } __packed; 2576 2577 struct ath12k_wmi_soc_mac_phy_hw_mode_caps_params { 2578 __le32 num_hw_modes; 2579 __le32 num_chainmask_tables; 2580 } __packed; 2581 2582 struct ath12k_wmi_hw_mode_cap_params { 2583 __le32 tlv_header; 2584 __le32 hw_mode_id; 2585 __le32 phy_id_map; 2586 __le32 hw_mode_config_type; 2587 } __packed; 2588 2589 #define WMI_MAX_HECAP_PHY_SIZE (3) 2590 2591 /* pdev_id is present in lower 16 bits of pdev_and_hw_link_ids in 2592 * ath12k_wmi_mac_phy_caps_params & ath12k_wmi_caps_ext_params. 2593 * 2594 * hw_link_id is present in higher 16 bits of pdev_and_hw_link_ids. 2595 */ 2596 #define WMI_CAPS_PARAMS_PDEV_ID GENMASK(15, 0) 2597 #define WMI_CAPS_PARAMS_HW_LINK_ID GENMASK(31, 16) 2598 2599 struct ath12k_wmi_mac_phy_caps_params { 2600 __le32 hw_mode_id; 2601 __le32 pdev_and_hw_link_ids; 2602 __le32 phy_id; 2603 __le32 supported_flags; 2604 __le32 supported_bands; 2605 __le32 ampdu_density; 2606 __le32 max_bw_supported_2g; 2607 __le32 ht_cap_info_2g; 2608 __le32 vht_cap_info_2g; 2609 __le32 vht_supp_mcs_2g; 2610 __le32 he_cap_info_2g; 2611 __le32 he_supp_mcs_2g; 2612 __le32 tx_chain_mask_2g; 2613 __le32 rx_chain_mask_2g; 2614 __le32 max_bw_supported_5g; 2615 __le32 ht_cap_info_5g; 2616 __le32 vht_cap_info_5g; 2617 __le32 vht_supp_mcs_5g; 2618 __le32 he_cap_info_5g; 2619 __le32 he_supp_mcs_5g; 2620 __le32 tx_chain_mask_5g; 2621 __le32 rx_chain_mask_5g; 2622 __le32 he_cap_phy_info_2g[WMI_MAX_HECAP_PHY_SIZE]; 2623 __le32 he_cap_phy_info_5g[WMI_MAX_HECAP_PHY_SIZE]; 2624 struct ath12k_wmi_ppe_threshold_params he_ppet2g; 2625 struct ath12k_wmi_ppe_threshold_params he_ppet5g; 2626 __le32 chainmask_table_id; 2627 __le32 lmac_id; 2628 __le32 he_cap_info_2g_ext; 2629 __le32 he_cap_info_5g_ext; 2630 __le32 he_cap_info_internal; 2631 } __packed; 2632 2633 struct ath12k_wmi_hal_reg_caps_ext_params { 2634 __le32 tlv_header; 2635 __le32 phy_id; 2636 __le32 eeprom_reg_domain; 2637 __le32 eeprom_reg_domain_ext; 2638 __le32 regcap1; 2639 __le32 regcap2; 2640 __le32 wireless_modes; 2641 __le32 low_2ghz_chan; 2642 __le32 high_2ghz_chan; 2643 __le32 low_5ghz_chan; 2644 __le32 high_5ghz_chan; 2645 } __packed; 2646 2647 struct ath12k_wmi_soc_hal_reg_caps_params { 2648 __le32 num_phy; 2649 } __packed; 2650 2651 enum wmi_channel_width { 2652 WMI_CHAN_WIDTH_20 = 0, 2653 WMI_CHAN_WIDTH_40 = 1, 2654 WMI_CHAN_WIDTH_80 = 2, 2655 WMI_CHAN_WIDTH_160 = 3, 2656 WMI_CHAN_WIDTH_80P80 = 4, 2657 WMI_CHAN_WIDTH_5 = 5, 2658 WMI_CHAN_WIDTH_10 = 6, 2659 WMI_CHAN_WIDTH_165 = 7, 2660 WMI_CHAN_WIDTH_160P160 = 8, 2661 WMI_CHAN_WIDTH_320 = 9, 2662 }; 2663 2664 #define WMI_MAX_EHTCAP_MAC_SIZE 2 2665 #define WMI_MAX_EHTCAP_PHY_SIZE 3 2666 #define WMI_MAX_EHTCAP_RATE_SET 3 2667 2668 /* Used for EHT MCS-NSS array. Data at each array index follows the format given 2669 * in IEEE P802.11be/D2.0, May 20229.4.2.313.4. 2670 * 2671 * Index interpretation: 2672 * 0 - 20 MHz only sta, all 4 bytes valid 2673 * 1 - index for bandwidths <= 80 MHz except 20 MHz-only, first 3 bytes valid 2674 * 2 - index for 160 MHz, first 3 bytes valid 2675 * 3 - index for 320 MHz, first 3 bytes valid 2676 */ 2677 #define WMI_MAX_EHT_SUPP_MCS_2G_SIZE 2 2678 #define WMI_MAX_EHT_SUPP_MCS_5G_SIZE 4 2679 2680 #define WMI_EHTCAP_TXRX_MCS_NSS_IDX_80 0 2681 #define WMI_EHTCAP_TXRX_MCS_NSS_IDX_160 1 2682 #define WMI_EHTCAP_TXRX_MCS_NSS_IDX_320 2 2683 2684 #define WMI_EHT_MCS_NSS_0_7 GENMASK(3, 0) 2685 #define WMI_EHT_MCS_NSS_8_9 GENMASK(7, 4) 2686 #define WMI_EHT_MCS_NSS_10_11 GENMASK(11, 8) 2687 #define WMI_EHT_MCS_NSS_12_13 GENMASK(15, 12) 2688 2689 struct wmi_service_ready_ext2_event { 2690 __le32 reg_db_version; 2691 __le32 hw_min_max_tx_power_2ghz; 2692 __le32 hw_min_max_tx_power_5ghz; 2693 __le32 chwidth_num_peer_caps; 2694 __le32 preamble_puncture_bw; 2695 __le32 max_user_per_ppdu_ofdma; 2696 __le32 max_user_per_ppdu_mumimo; 2697 __le32 target_cap_flags; 2698 __le32 eht_cap_mac_info[WMI_MAX_EHTCAP_MAC_SIZE]; 2699 __le32 max_num_linkview_peers; 2700 __le32 max_num_msduq_supported_per_tid; 2701 __le32 default_num_msduq_supported_per_tid; 2702 } __packed; 2703 2704 struct ath12k_wmi_caps_ext_params { 2705 __le32 hw_mode_id; 2706 __le32 pdev_and_hw_link_ids; 2707 __le32 phy_id; 2708 __le32 wireless_modes_ext; 2709 __le32 eht_cap_mac_info_2ghz[WMI_MAX_EHTCAP_MAC_SIZE]; 2710 __le32 eht_cap_mac_info_5ghz[WMI_MAX_EHTCAP_MAC_SIZE]; 2711 __le32 rsvd0[2]; 2712 __le32 eht_cap_phy_info_2ghz[WMI_MAX_EHTCAP_PHY_SIZE]; 2713 __le32 eht_cap_phy_info_5ghz[WMI_MAX_EHTCAP_PHY_SIZE]; 2714 struct ath12k_wmi_ppe_threshold_params eht_ppet_2ghz; 2715 struct ath12k_wmi_ppe_threshold_params eht_ppet_5ghz; 2716 __le32 eht_cap_info_internal; 2717 __le32 eht_supp_mcs_ext_2ghz[WMI_MAX_EHT_SUPP_MCS_2G_SIZE]; 2718 __le32 eht_supp_mcs_ext_5ghz[WMI_MAX_EHT_SUPP_MCS_5G_SIZE]; 2719 __le32 eml_capability; 2720 __le32 mld_capability; 2721 } __packed; 2722 2723 /* 2 word representation of MAC addr */ 2724 struct ath12k_wmi_mac_addr_params { 2725 u8 addr[ETH_ALEN]; 2726 u8 padding[2]; 2727 } __packed; 2728 2729 struct ath12k_wmi_dma_ring_caps_params { 2730 __le32 tlv_header; 2731 __le32 pdev_id; 2732 __le32 module_id; 2733 __le32 min_elem; 2734 __le32 min_buf_sz; 2735 __le32 min_buf_align; 2736 } __packed; 2737 2738 struct ath12k_wmi_ready_event_min_params { 2739 struct ath12k_wmi_abi_version_params fw_abi_vers; 2740 struct ath12k_wmi_mac_addr_params mac_addr; 2741 __le32 status; 2742 __le32 num_dscp_table; 2743 __le32 num_extra_mac_addr; 2744 __le32 num_total_peers; 2745 __le32 num_extra_peers; 2746 } __packed; 2747 2748 struct wmi_ready_event { 2749 struct ath12k_wmi_ready_event_min_params ready_event_min; 2750 __le32 max_ast_index; 2751 __le32 pktlog_defs_checksum; 2752 } __packed; 2753 2754 struct wmi_service_available_event { 2755 __le32 wmi_service_segment_offset; 2756 __le32 wmi_service_segment_bitmap[WMI_SERVICE_SEGMENT_BM_SIZE32]; 2757 } __packed; 2758 2759 struct ath12k_wmi_vdev_create_arg { 2760 u8 if_id; 2761 u32 type; 2762 u32 subtype; 2763 struct { 2764 u8 tx; 2765 u8 rx; 2766 } chains[NUM_NL80211_BANDS]; 2767 u32 pdev_id; 2768 u8 if_stats_id; 2769 u32 mbssid_flags; 2770 u32 mbssid_tx_vdev_id; 2771 u8 mld_addr[ETH_ALEN]; 2772 }; 2773 2774 #define ATH12K_MAX_VDEV_STATS_ID 0x30 2775 #define ATH12K_INVAL_VDEV_STATS_ID 0xFF 2776 2777 struct wmi_vdev_create_cmd { 2778 __le32 tlv_header; 2779 __le32 vdev_id; 2780 __le32 vdev_type; 2781 __le32 vdev_subtype; 2782 struct ath12k_wmi_mac_addr_params vdev_macaddr; 2783 __le32 num_cfg_txrx_streams; 2784 __le32 pdev_id; 2785 __le32 mbssid_flags; 2786 __le32 mbssid_tx_vdev_id; 2787 __le32 vdev_stats_id_valid; 2788 __le32 vdev_stats_id; 2789 } __packed; 2790 2791 struct ath12k_wmi_vdev_txrx_streams_params { 2792 __le32 tlv_header; 2793 __le32 band; 2794 __le32 supported_tx_streams; 2795 __le32 supported_rx_streams; 2796 } __packed; 2797 2798 struct wmi_vdev_create_mlo_params { 2799 __le32 tlv_header; 2800 struct ath12k_wmi_mac_addr_params mld_macaddr; 2801 } __packed; 2802 2803 #define ATH12K_WMI_FLAG_MLO_ENABLED BIT(0) 2804 #define ATH12K_WMI_FLAG_MLO_ASSOC_LINK BIT(1) 2805 #define ATH12K_WMI_FLAG_MLO_PRIMARY_UMAC BIT(2) 2806 #define ATH12K_WMI_FLAG_MLO_LOGICAL_LINK_IDX_VALID BIT(3) 2807 #define ATH12K_WMI_FLAG_MLO_PEER_ID_VALID BIT(4) 2808 #define ATH12K_WMI_FLAG_MLO_MCAST_VDEV BIT(5) 2809 #define ATH12K_WMI_FLAG_MLO_EMLSR_SUPPORT BIT(6) 2810 #define ATH12K_WMI_FLAG_MLO_FORCED_INACTIVE BIT(7) 2811 #define ATH12K_WMI_FLAG_MLO_LINK_ADD BIT(8) 2812 2813 struct wmi_vdev_start_mlo_params { 2814 __le32 tlv_header; 2815 __le32 flags; 2816 } __packed; 2817 2818 struct wmi_partner_link_info { 2819 __le32 tlv_header; 2820 __le32 vdev_id; 2821 __le32 hw_link_id; 2822 struct ath12k_wmi_mac_addr_params vdev_addr; 2823 } __packed; 2824 2825 struct wmi_vdev_delete_cmd { 2826 __le32 tlv_header; 2827 __le32 vdev_id; 2828 } __packed; 2829 2830 struct ath12k_wmi_vdev_up_params { 2831 u32 vdev_id; 2832 u32 aid; 2833 const u8 *bssid; 2834 const u8 *tx_bssid; 2835 u32 nontx_profile_idx; 2836 u32 nontx_profile_cnt; 2837 }; 2838 2839 struct wmi_vdev_up_cmd { 2840 __le32 tlv_header; 2841 __le32 vdev_id; 2842 __le32 vdev_assoc_id; 2843 struct ath12k_wmi_mac_addr_params vdev_bssid; 2844 struct ath12k_wmi_mac_addr_params tx_vdev_bssid; 2845 __le32 nontx_profile_idx; 2846 __le32 nontx_profile_cnt; 2847 } __packed; 2848 2849 struct wmi_vdev_stop_cmd { 2850 __le32 tlv_header; 2851 __le32 vdev_id; 2852 } __packed; 2853 2854 struct wmi_vdev_down_cmd { 2855 __le32 tlv_header; 2856 __le32 vdev_id; 2857 } __packed; 2858 2859 #define WMI_VDEV_START_HIDDEN_SSID BIT(0) 2860 #define WMI_VDEV_START_PMF_ENABLED BIT(1) 2861 #define WMI_VDEV_START_LDPC_RX_ENABLED BIT(3) 2862 2863 #define ATH12K_WMI_SSID_LEN 32 2864 2865 struct ath12k_wmi_ssid_params { 2866 __le32 ssid_len; 2867 u8 ssid[ATH12K_WMI_SSID_LEN]; 2868 } __packed; 2869 2870 #define ATH12K_VDEV_SETUP_TIMEOUT_HZ (5 * HZ) 2871 2872 enum wmi_vdev_mbssid_flags { 2873 WMI_VDEV_MBSSID_FLAGS_NON_MBSSID_AP = BIT(0), 2874 WMI_VDEV_MBSSID_FLAGS_TRANSMIT_AP = BIT(1), 2875 WMI_VDEV_MBSSID_FLAGS_NON_TRANSMIT_AP = BIT(2), 2876 WMI_VDEV_MBSSID_FLAGS_EMA_MODE = BIT(3), 2877 WMI_VDEV_MBSSID_FLAGS_SCAN_MODE_VAP = BIT(4), 2878 }; 2879 2880 struct wmi_vdev_start_request_cmd { 2881 __le32 tlv_header; 2882 __le32 vdev_id; 2883 __le32 requestor_id; 2884 __le32 beacon_interval; 2885 __le32 dtim_period; 2886 __le32 flags; 2887 struct ath12k_wmi_ssid_params ssid; 2888 __le32 bcn_tx_rate; 2889 __le32 bcn_txpower; 2890 __le32 num_noa_descriptors; 2891 __le32 disable_hw_ack; 2892 __le32 preferred_tx_streams; 2893 __le32 preferred_rx_streams; 2894 __le32 he_ops; 2895 __le32 cac_duration_ms; 2896 __le32 regdomain; 2897 __le32 min_data_rate; 2898 __le32 mbssid_flags; /* uses enum wmi_vdev_mbssid_flags */ 2899 __le32 mbssid_tx_vdev_id; 2900 __le32 eht_ops; 2901 __le32 punct_bitmap; 2902 } __packed; 2903 2904 #define MGMT_TX_DL_FRM_LEN 64 2905 2906 struct ath12k_wmi_channel_arg { 2907 u8 chan_id; 2908 u8 pwr; 2909 u32 mhz; 2910 u32 half_rate:1, 2911 quarter_rate:1, 2912 dfs_set:1, 2913 dfs_set_cfreq2:1, 2914 is_chan_passive:1, 2915 allow_ht:1, 2916 allow_vht:1, 2917 allow_he:1, 2918 set_agile:1, 2919 psc_channel:1; 2920 u32 phy_mode; 2921 u32 cfreq1; 2922 u32 cfreq2; 2923 char maxpower; 2924 char minpower; 2925 char maxregpower; 2926 u8 antennamax; 2927 u8 reg_class_id; 2928 }; 2929 2930 enum wmi_phy_mode { 2931 MODE_11A = 0, 2932 MODE_11G = 1, /* 11b/g Mode */ 2933 MODE_11B = 2, /* 11b Mode */ 2934 MODE_11GONLY = 3, /* 11g only Mode */ 2935 MODE_11NA_HT20 = 4, 2936 MODE_11NG_HT20 = 5, 2937 MODE_11NA_HT40 = 6, 2938 MODE_11NG_HT40 = 7, 2939 MODE_11AC_VHT20 = 8, 2940 MODE_11AC_VHT40 = 9, 2941 MODE_11AC_VHT80 = 10, 2942 MODE_11AC_VHT20_2G = 11, 2943 MODE_11AC_VHT40_2G = 12, 2944 MODE_11AC_VHT80_2G = 13, 2945 MODE_11AC_VHT80_80 = 14, 2946 MODE_11AC_VHT160 = 15, 2947 MODE_11AX_HE20 = 16, 2948 MODE_11AX_HE40 = 17, 2949 MODE_11AX_HE80 = 18, 2950 MODE_11AX_HE80_80 = 19, 2951 MODE_11AX_HE160 = 20, 2952 MODE_11AX_HE20_2G = 21, 2953 MODE_11AX_HE40_2G = 22, 2954 MODE_11AX_HE80_2G = 23, 2955 MODE_11BE_EHT20 = 24, 2956 MODE_11BE_EHT40 = 25, 2957 MODE_11BE_EHT80 = 26, 2958 MODE_11BE_EHT80_80 = 27, 2959 MODE_11BE_EHT160 = 28, 2960 MODE_11BE_EHT160_160 = 29, 2961 MODE_11BE_EHT320 = 30, 2962 MODE_11BE_EHT20_2G = 31, 2963 MODE_11BE_EHT40_2G = 32, 2964 MODE_UNKNOWN = 33, 2965 MODE_MAX = 33, 2966 }; 2967 2968 #define ATH12K_WMI_MLO_MAX_LINKS 4 2969 2970 struct wmi_ml_partner_info { 2971 u32 vdev_id; 2972 u32 hw_link_id; 2973 u8 addr[ETH_ALEN]; 2974 bool assoc_link; 2975 bool primary_umac; 2976 bool logical_link_idx_valid; 2977 u32 logical_link_idx; 2978 }; 2979 2980 struct wmi_ml_arg { 2981 bool enabled; 2982 bool assoc_link; 2983 bool mcast_link; 2984 bool link_add; 2985 u8 num_partner_links; 2986 struct wmi_ml_partner_info partner_info[ATH12K_WMI_MLO_MAX_LINKS]; 2987 }; 2988 2989 struct wmi_vdev_start_req_arg { 2990 u32 vdev_id; 2991 u32 freq; 2992 u32 band_center_freq1; 2993 u32 band_center_freq2; 2994 bool passive; 2995 bool allow_ibss; 2996 bool allow_ht; 2997 bool allow_vht; 2998 bool ht40plus; 2999 bool chan_radar; 3000 bool freq2_radar; 3001 bool allow_he; 3002 u32 min_power; 3003 u32 max_power; 3004 u32 max_reg_power; 3005 u32 max_antenna_gain; 3006 enum wmi_phy_mode mode; 3007 u32 bcn_intval; 3008 u32 dtim_period; 3009 u8 *ssid; 3010 u32 ssid_len; 3011 u32 bcn_tx_rate; 3012 u32 bcn_tx_power; 3013 bool disable_hw_ack; 3014 bool hidden_ssid; 3015 bool pmf_enabled; 3016 u32 he_ops; 3017 u32 cac_duration_ms; 3018 u32 regdomain; 3019 u32 pref_rx_streams; 3020 u32 pref_tx_streams; 3021 u32 num_noa_descriptors; 3022 u32 min_data_rate; 3023 u32 mbssid_flags; 3024 u32 mbssid_tx_vdev_id; 3025 u32 punct_bitmap; 3026 struct wmi_ml_arg ml; 3027 }; 3028 3029 struct ath12k_wmi_peer_create_arg { 3030 const u8 *peer_addr; 3031 u32 peer_type; 3032 u32 vdev_id; 3033 bool ml_enabled; 3034 }; 3035 3036 struct wmi_peer_create_mlo_params { 3037 __le32 tlv_header; 3038 __le32 flags; 3039 }; 3040 3041 struct ath12k_wmi_pdev_set_regdomain_arg { 3042 u16 current_rd_in_use; 3043 u16 current_rd_2g; 3044 u16 current_rd_5g; 3045 u32 ctl_2g; 3046 u32 ctl_5g; 3047 u8 dfs_domain; 3048 u32 pdev_id; 3049 }; 3050 3051 struct ath12k_wmi_rx_reorder_queue_remove_arg { 3052 u8 *peer_macaddr; 3053 u16 vdev_id; 3054 u32 peer_tid_bitmap; 3055 }; 3056 3057 #define WMI_HOST_PDEV_ID_SOC 0xFF 3058 #define WMI_HOST_PDEV_ID_0 0 3059 #define WMI_HOST_PDEV_ID_1 1 3060 #define WMI_HOST_PDEV_ID_2 2 3061 3062 #define WMI_PDEV_ID_SOC 0 3063 #define WMI_PDEV_ID_1ST 1 3064 #define WMI_PDEV_ID_2ND 2 3065 #define WMI_PDEV_ID_3RD 3 3066 3067 /* Freq units in MHz */ 3068 #define REG_RULE_START_FREQ 0x0000ffff 3069 #define REG_RULE_END_FREQ 0xffff0000 3070 #define REG_RULE_FLAGS 0x0000ffff 3071 #define REG_RULE_MAX_BW 0x0000ffff 3072 #define REG_RULE_REG_PWR 0x00ff0000 3073 #define REG_RULE_ANT_GAIN 0xff000000 3074 #define REG_RULE_PSD_INFO BIT(2) 3075 #define REG_RULE_PSD_EIRP 0xffff0000 3076 3077 #define WMI_VDEV_PARAM_TXBF_SU_TX_BFEE BIT(0) 3078 #define WMI_VDEV_PARAM_TXBF_MU_TX_BFEE BIT(1) 3079 #define WMI_VDEV_PARAM_TXBF_SU_TX_BFER BIT(2) 3080 #define WMI_VDEV_PARAM_TXBF_MU_TX_BFER BIT(3) 3081 3082 #define HECAP_PHYDWORD_0 0 3083 #define HECAP_PHYDWORD_1 1 3084 #define HECAP_PHYDWORD_2 2 3085 3086 #define HECAP_PHY_SU_BFER BIT(31) 3087 #define HECAP_PHY_SU_BFEE BIT(0) 3088 #define HECAP_PHY_MU_BFER BIT(1) 3089 #define HECAP_PHY_UL_MUMIMO BIT(22) 3090 #define HECAP_PHY_UL_MUOFDMA BIT(23) 3091 3092 #define HECAP_PHY_SUBFMR_GET(hecap_phy) \ 3093 u32_get_bits(hecap_phy[HECAP_PHYDWORD_0], HECAP_PHY_SU_BFER) 3094 3095 #define HECAP_PHY_SUBFME_GET(hecap_phy) \ 3096 u32_get_bits(hecap_phy[HECAP_PHYDWORD_1], HECAP_PHY_SU_BFEE) 3097 3098 #define HECAP_PHY_MUBFMR_GET(hecap_phy) \ 3099 u32_get_bits(hecap_phy[HECAP_PHYDWORD_1], HECAP_PHY_MU_BFER) 3100 3101 #define HECAP_PHY_ULMUMIMO_GET(hecap_phy) \ 3102 u32_get_bits(hecap_phy[HECAP_PHYDWORD_0], HECAP_PHY_UL_MUMIMO) 3103 3104 #define HECAP_PHY_ULOFDMA_GET(hecap_phy) \ 3105 u32_get_bits(hecap_phy[HECAP_PHYDWORD_0], HECAP_PHY_UL_MUOFDMA) 3106 3107 #define HE_MODE_SU_TX_BFEE BIT(0) 3108 #define HE_MODE_SU_TX_BFER BIT(1) 3109 #define HE_MODE_MU_TX_BFEE BIT(2) 3110 #define HE_MODE_MU_TX_BFER BIT(3) 3111 #define HE_MODE_DL_OFDMA BIT(4) 3112 #define HE_MODE_UL_OFDMA BIT(5) 3113 #define HE_MODE_UL_MUMIMO BIT(6) 3114 3115 #define HE_DL_MUOFDMA_ENABLE 1 3116 #define HE_UL_MUOFDMA_ENABLE 1 3117 #define HE_DL_MUMIMO_ENABLE 1 3118 #define HE_MU_BFEE_ENABLE 1 3119 #define HE_SU_BFEE_ENABLE 1 3120 3121 #define HE_VHT_SOUNDING_MODE_ENABLE 1 3122 #define HE_SU_MU_SOUNDING_MODE_ENABLE 1 3123 #define HE_TRIG_NONTRIG_SOUNDING_MODE_ENABLE 1 3124 3125 /* HE or VHT Sounding */ 3126 #define HE_VHT_SOUNDING_MODE BIT(0) 3127 /* SU or MU Sounding */ 3128 #define HE_SU_MU_SOUNDING_MODE BIT(2) 3129 /* Trig or Non-Trig Sounding */ 3130 #define HE_TRIG_NONTRIG_SOUNDING_MODE BIT(3) 3131 3132 #define WMI_TXBF_STS_CAP_OFFSET_LSB 4 3133 #define WMI_TXBF_STS_CAP_OFFSET_MASK 0x70 3134 #define WMI_BF_SOUND_DIM_OFFSET_LSB 8 3135 #define WMI_BF_SOUND_DIM_OFFSET_MASK 0x700 3136 3137 enum wmi_peer_type { 3138 WMI_PEER_TYPE_DEFAULT = 0, 3139 WMI_PEER_TYPE_BSS = 1, 3140 WMI_PEER_TYPE_TDLS = 2, 3141 }; 3142 3143 struct wmi_peer_create_cmd { 3144 __le32 tlv_header; 3145 __le32 vdev_id; 3146 struct ath12k_wmi_mac_addr_params peer_macaddr; 3147 __le32 peer_type; 3148 } __packed; 3149 3150 struct wmi_peer_delete_cmd { 3151 __le32 tlv_header; 3152 __le32 vdev_id; 3153 struct ath12k_wmi_mac_addr_params peer_macaddr; 3154 } __packed; 3155 3156 struct wmi_peer_reorder_queue_setup_cmd { 3157 __le32 tlv_header; 3158 __le32 vdev_id; 3159 struct ath12k_wmi_mac_addr_params peer_macaddr; 3160 __le32 tid; 3161 __le32 queue_ptr_lo; 3162 __le32 queue_ptr_hi; 3163 __le32 queue_no; 3164 __le32 ba_window_size_valid; 3165 __le32 ba_window_size; 3166 } __packed; 3167 3168 struct wmi_peer_reorder_queue_remove_cmd { 3169 __le32 tlv_header; 3170 __le32 vdev_id; 3171 struct ath12k_wmi_mac_addr_params peer_macaddr; 3172 __le32 tid_mask; 3173 } __packed; 3174 3175 enum wmi_bss_chan_info_req_type { 3176 WMI_BSS_SURVEY_REQ_TYPE_READ = 1, 3177 WMI_BSS_SURVEY_REQ_TYPE_READ_CLEAR, 3178 }; 3179 3180 struct wmi_pdev_set_param_cmd { 3181 __le32 tlv_header; 3182 __le32 pdev_id; 3183 __le32 param_id; 3184 __le32 param_value; 3185 } __packed; 3186 3187 struct wmi_pdev_set_ps_mode_cmd { 3188 __le32 tlv_header; 3189 __le32 vdev_id; 3190 __le32 sta_ps_mode; 3191 } __packed; 3192 3193 struct wmi_pdev_suspend_cmd { 3194 __le32 tlv_header; 3195 __le32 pdev_id; 3196 __le32 suspend_opt; 3197 } __packed; 3198 3199 struct wmi_pdev_resume_cmd { 3200 __le32 tlv_header; 3201 __le32 pdev_id; 3202 } __packed; 3203 3204 struct wmi_pdev_bss_chan_info_req_cmd { 3205 __le32 tlv_header; 3206 /* ref wmi_bss_chan_info_req_type */ 3207 __le32 req_type; 3208 __le32 pdev_id; 3209 } __packed; 3210 3211 struct wmi_ap_ps_peer_cmd { 3212 __le32 tlv_header; 3213 __le32 vdev_id; 3214 struct ath12k_wmi_mac_addr_params peer_macaddr; 3215 __le32 param; 3216 __le32 value; 3217 } __packed; 3218 3219 struct wmi_sta_powersave_param_cmd { 3220 __le32 tlv_header; 3221 __le32 vdev_id; 3222 __le32 param; 3223 __le32 value; 3224 } __packed; 3225 3226 struct wmi_pdev_set_regdomain_cmd { 3227 __le32 tlv_header; 3228 __le32 pdev_id; 3229 __le32 reg_domain; 3230 __le32 reg_domain_2g; 3231 __le32 reg_domain_5g; 3232 __le32 conformance_test_limit_2g; 3233 __le32 conformance_test_limit_5g; 3234 __le32 dfs_domain; 3235 } __packed; 3236 3237 struct wmi_peer_set_param_cmd { 3238 __le32 tlv_header; 3239 __le32 vdev_id; 3240 struct ath12k_wmi_mac_addr_params peer_macaddr; 3241 __le32 param_id; 3242 __le32 param_value; 3243 } __packed; 3244 3245 struct wmi_peer_flush_tids_cmd { 3246 __le32 tlv_header; 3247 __le32 vdev_id; 3248 struct ath12k_wmi_mac_addr_params peer_macaddr; 3249 __le32 peer_tid_bitmap; 3250 } __packed; 3251 3252 struct wmi_dfs_phyerr_offload_cmd { 3253 __le32 tlv_header; 3254 __le32 pdev_id; 3255 } __packed; 3256 3257 struct wmi_bcn_offload_ctrl_cmd { 3258 __le32 tlv_header; 3259 __le32 vdev_id; 3260 __le32 bcn_ctrl_op; 3261 } __packed; 3262 3263 enum scan_dwelltime_adaptive_mode { 3264 SCAN_DWELL_MODE_DEFAULT = 0, 3265 SCAN_DWELL_MODE_CONSERVATIVE = 1, 3266 SCAN_DWELL_MODE_MODERATE = 2, 3267 SCAN_DWELL_MODE_AGGRESSIVE = 3, 3268 SCAN_DWELL_MODE_STATIC = 4 3269 }; 3270 3271 #define WLAN_SCAN_MAX_NUM_SSID 10 3272 #define WLAN_SCAN_MAX_NUM_BSSID 10 3273 3274 struct ath12k_wmi_element_info_arg { 3275 u32 len; 3276 u8 *ptr; 3277 }; 3278 3279 #define WMI_IE_BITMAP_SIZE 8 3280 3281 #define WMI_SCAN_MAX_NUM_SSID 0x0A 3282 /* prefix used by scan requestor ids on the host */ 3283 #define WMI_HOST_SCAN_REQUESTOR_ID_PREFIX 0xA000 3284 3285 /* prefix used by scan request ids generated on the host */ 3286 /* host cycles through the lower 12 bits to generate ids */ 3287 #define WMI_HOST_SCAN_REQ_ID_PREFIX 0xA000 3288 3289 #define WLAN_SCAN_PARAMS_MAX_SSID 16 3290 #define WLAN_SCAN_PARAMS_MAX_BSSID 4 3291 #define WLAN_SCAN_PARAMS_MAX_IE_LEN 512 3292 3293 /* Values lower than this may be refused by some firmware revisions with a scan 3294 * completion with a timedout reason. 3295 */ 3296 #define WMI_SCAN_CHAN_MIN_TIME_MSEC 40 3297 3298 /* Scan priority numbers must be sequential, starting with 0 */ 3299 enum wmi_scan_priority { 3300 WMI_SCAN_PRIORITY_VERY_LOW = 0, 3301 WMI_SCAN_PRIORITY_LOW, 3302 WMI_SCAN_PRIORITY_MEDIUM, 3303 WMI_SCAN_PRIORITY_HIGH, 3304 WMI_SCAN_PRIORITY_VERY_HIGH, 3305 WMI_SCAN_PRIORITY_COUNT /* number of priorities supported */ 3306 }; 3307 3308 enum wmi_scan_event_type { 3309 WMI_SCAN_EVENT_STARTED = BIT(0), 3310 WMI_SCAN_EVENT_COMPLETED = BIT(1), 3311 WMI_SCAN_EVENT_BSS_CHANNEL = BIT(2), 3312 WMI_SCAN_EVENT_FOREIGN_CHAN = BIT(3), 3313 WMI_SCAN_EVENT_DEQUEUED = BIT(4), 3314 /* possibly by high-prio scan */ 3315 WMI_SCAN_EVENT_PREEMPTED = BIT(5), 3316 WMI_SCAN_EVENT_START_FAILED = BIT(6), 3317 WMI_SCAN_EVENT_RESTARTED = BIT(7), 3318 WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT = BIT(8), 3319 WMI_SCAN_EVENT_SUSPENDED = BIT(9), 3320 WMI_SCAN_EVENT_RESUMED = BIT(10), 3321 WMI_SCAN_EVENT_MAX = BIT(15), 3322 }; 3323 3324 enum wmi_scan_completion_reason { 3325 WMI_SCAN_REASON_COMPLETED, 3326 WMI_SCAN_REASON_CANCELLED, 3327 WMI_SCAN_REASON_PREEMPTED, 3328 WMI_SCAN_REASON_TIMEDOUT, 3329 WMI_SCAN_REASON_INTERNAL_FAILURE, 3330 WMI_SCAN_REASON_MAX, 3331 }; 3332 3333 struct wmi_start_scan_cmd { 3334 __le32 tlv_header; 3335 __le32 scan_id; 3336 __le32 scan_req_id; 3337 __le32 vdev_id; 3338 __le32 scan_priority; 3339 __le32 notify_scan_events; 3340 __le32 dwell_time_active; 3341 __le32 dwell_time_passive; 3342 __le32 min_rest_time; 3343 __le32 max_rest_time; 3344 __le32 repeat_probe_time; 3345 __le32 probe_spacing_time; 3346 __le32 idle_time; 3347 __le32 max_scan_time; 3348 __le32 probe_delay; 3349 __le32 scan_ctrl_flags; 3350 __le32 burst_duration; 3351 __le32 num_chan; 3352 __le32 num_bssid; 3353 __le32 num_ssids; 3354 __le32 ie_len; 3355 __le32 n_probes; 3356 struct ath12k_wmi_mac_addr_params mac_addr; 3357 struct ath12k_wmi_mac_addr_params mac_mask; 3358 u32 ie_bitmap[WMI_IE_BITMAP_SIZE]; 3359 __le32 num_vendor_oui; 3360 __le32 scan_ctrl_flags_ext; 3361 __le32 dwell_time_active_2g; 3362 __le32 dwell_time_active_6g; 3363 __le32 dwell_time_passive_6g; 3364 __le32 scan_start_offset; 3365 } __packed; 3366 3367 #define WMI_SCAN_FLAG_PASSIVE 0x1 3368 #define WMI_SCAN_ADD_BCAST_PROBE_REQ 0x2 3369 #define WMI_SCAN_ADD_CCK_RATES 0x4 3370 #define WMI_SCAN_ADD_OFDM_RATES 0x8 3371 #define WMI_SCAN_CHAN_STAT_EVENT 0x10 3372 #define WMI_SCAN_FILTER_PROBE_REQ 0x20 3373 #define WMI_SCAN_BYPASS_DFS_CHN 0x40 3374 #define WMI_SCAN_CONTINUE_ON_ERROR 0x80 3375 #define WMI_SCAN_FILTER_PROMISCUOS 0x100 3376 #define WMI_SCAN_FLAG_FORCE_ACTIVE_ON_DFS 0x200 3377 #define WMI_SCAN_ADD_TPC_IE_IN_PROBE_REQ 0x400 3378 #define WMI_SCAN_ADD_DS_IE_IN_PROBE_REQ 0x800 3379 #define WMI_SCAN_ADD_SPOOF_MAC_IN_PROBE_REQ 0x1000 3380 #define WMI_SCAN_OFFCHAN_MGMT_TX 0x2000 3381 #define WMI_SCAN_OFFCHAN_DATA_TX 0x4000 3382 #define WMI_SCAN_CAPTURE_PHY_ERROR 0x8000 3383 #define WMI_SCAN_FLAG_STRICT_PASSIVE_ON_PCHN 0x10000 3384 #define WMI_SCAN_FLAG_HALF_RATE_SUPPORT 0x20000 3385 #define WMI_SCAN_FLAG_QUARTER_RATE_SUPPORT 0x40000 3386 #define WMI_SCAN_RANDOM_SEQ_NO_IN_PROBE_REQ 0x80000 3387 #define WMI_SCAN_ENABLE_IE_WHTELIST_IN_PROBE_REQ 0x100000 3388 3389 #define WMI_SCAN_DWELL_MODE_MASK GENMASK(23, 21) 3390 3391 enum { 3392 WMI_SCAN_DWELL_MODE_DEFAULT = 0, 3393 WMI_SCAN_DWELL_MODE_CONSERVATIVE = 1, 3394 WMI_SCAN_DWELL_MODE_MODERATE = 2, 3395 WMI_SCAN_DWELL_MODE_AGGRESSIVE = 3, 3396 WMI_SCAN_DWELL_MODE_STATIC = 4, 3397 }; 3398 3399 struct ath12k_wmi_hint_short_ssid_arg { 3400 u32 freq_flags; 3401 u32 short_ssid; 3402 }; 3403 3404 struct ath12k_wmi_hint_bssid_arg { 3405 u32 freq_flags; 3406 struct ath12k_wmi_mac_addr_params bssid; 3407 }; 3408 3409 struct ath12k_wmi_scan_req_arg { 3410 u32 scan_id; 3411 u32 scan_req_id; 3412 u32 vdev_id; 3413 u32 pdev_id; 3414 enum wmi_scan_priority scan_priority; 3415 u32 scan_ev_started:1, 3416 scan_ev_completed:1, 3417 scan_ev_bss_chan:1, 3418 scan_ev_foreign_chan:1, 3419 scan_ev_dequeued:1, 3420 scan_ev_preempted:1, 3421 scan_ev_start_failed:1, 3422 scan_ev_restarted:1, 3423 scan_ev_foreign_chn_exit:1, 3424 scan_ev_invalid:1, 3425 scan_ev_gpio_timeout:1, 3426 scan_ev_suspended:1, 3427 scan_ev_resumed:1; 3428 u32 dwell_time_active; 3429 u32 dwell_time_active_2g; 3430 u32 dwell_time_passive; 3431 u32 dwell_time_active_6g; 3432 u32 dwell_time_passive_6g; 3433 u32 min_rest_time; 3434 u32 max_rest_time; 3435 u32 repeat_probe_time; 3436 u32 probe_spacing_time; 3437 u32 idle_time; 3438 u32 max_scan_time; 3439 u32 probe_delay; 3440 u32 scan_f_passive:1, 3441 scan_f_bcast_probe:1, 3442 scan_f_cck_rates:1, 3443 scan_f_ofdm_rates:1, 3444 scan_f_chan_stat_evnt:1, 3445 scan_f_filter_prb_req:1, 3446 scan_f_bypass_dfs_chn:1, 3447 scan_f_continue_on_err:1, 3448 scan_f_offchan_mgmt_tx:1, 3449 scan_f_offchan_data_tx:1, 3450 scan_f_promisc_mode:1, 3451 scan_f_capture_phy_err:1, 3452 scan_f_strict_passive_pch:1, 3453 scan_f_half_rate:1, 3454 scan_f_quarter_rate:1, 3455 scan_f_force_active_dfs_chn:1, 3456 scan_f_add_tpc_ie_in_probe:1, 3457 scan_f_add_ds_ie_in_probe:1, 3458 scan_f_add_spoofed_mac_in_probe:1, 3459 scan_f_add_rand_seq_in_probe:1, 3460 scan_f_en_ie_whitelist_in_probe:1, 3461 scan_f_forced:1, 3462 scan_f_2ghz:1, 3463 scan_f_5ghz:1, 3464 scan_f_80mhz:1; 3465 enum scan_dwelltime_adaptive_mode adaptive_dwell_time_mode; 3466 u32 burst_duration; 3467 u32 num_chan; 3468 u32 num_bssid; 3469 u32 num_ssids; 3470 u32 n_probes; 3471 u32 *chan_list; 3472 u32 notify_scan_events; 3473 struct cfg80211_ssid ssid[WLAN_SCAN_MAX_NUM_SSID]; 3474 struct ath12k_wmi_mac_addr_params bssid_list[WLAN_SCAN_MAX_NUM_BSSID]; 3475 struct ath12k_wmi_element_info_arg extraie; 3476 u32 num_hint_s_ssid; 3477 u32 num_hint_bssid; 3478 struct ath12k_wmi_hint_short_ssid_arg hint_s_ssid[WLAN_SCAN_MAX_HINT_S_SSID]; 3479 struct ath12k_wmi_hint_bssid_arg hint_bssid[WLAN_SCAN_MAX_HINT_BSSID]; 3480 }; 3481 3482 struct wmi_ssid_arg { 3483 int len; 3484 const u8 *ssid; 3485 }; 3486 3487 struct wmi_bssid_arg { 3488 const u8 *bssid; 3489 }; 3490 3491 #define WMI_SCAN_STOP_ONE 0x00000000 3492 #define WMI_SCAN_STOP_VAP_ALL 0x01000000 3493 #define WMI_SCAN_STOP_ALL 0x04000000 3494 3495 /* Prefix 0xA000 indicates that the scan request 3496 * is trigger by HOST 3497 */ 3498 #define ATH12K_SCAN_ID 0xA000 3499 3500 enum scan_cancel_req_type { 3501 WLAN_SCAN_CANCEL_SINGLE = 1, 3502 WLAN_SCAN_CANCEL_VDEV_ALL, 3503 WLAN_SCAN_CANCEL_PDEV_ALL, 3504 }; 3505 3506 struct ath12k_wmi_scan_cancel_arg { 3507 u32 requester; 3508 u32 scan_id; 3509 enum scan_cancel_req_type req_type; 3510 u32 vdev_id; 3511 u32 pdev_id; 3512 }; 3513 3514 struct wmi_bcn_send_from_host_cmd { 3515 __le32 tlv_header; 3516 __le32 vdev_id; 3517 __le32 data_len; 3518 union { 3519 __le32 frag_ptr; 3520 __le32 frag_ptr_lo; 3521 }; 3522 __le32 frame_ctrl; 3523 __le32 dtim_flag; 3524 __le32 bcn_antenna; 3525 __le32 frag_ptr_hi; 3526 }; 3527 3528 #define WMI_CHAN_INFO_MODE GENMASK(5, 0) 3529 #define WMI_CHAN_INFO_HT40_PLUS BIT(6) 3530 #define WMI_CHAN_INFO_PASSIVE BIT(7) 3531 #define WMI_CHAN_INFO_ADHOC_ALLOWED BIT(8) 3532 #define WMI_CHAN_INFO_AP_DISABLED BIT(9) 3533 #define WMI_CHAN_INFO_DFS BIT(10) 3534 #define WMI_CHAN_INFO_ALLOW_HT BIT(11) 3535 #define WMI_CHAN_INFO_ALLOW_VHT BIT(12) 3536 #define WMI_CHAN_INFO_CHAN_CHANGE_CAUSE_CSA BIT(13) 3537 #define WMI_CHAN_INFO_HALF_RATE BIT(14) 3538 #define WMI_CHAN_INFO_QUARTER_RATE BIT(15) 3539 #define WMI_CHAN_INFO_DFS_FREQ2 BIT(16) 3540 #define WMI_CHAN_INFO_ALLOW_HE BIT(17) 3541 #define WMI_CHAN_INFO_PSC BIT(18) 3542 3543 #define WMI_CHAN_REG_INFO1_MIN_PWR GENMASK(7, 0) 3544 #define WMI_CHAN_REG_INFO1_MAX_PWR GENMASK(15, 8) 3545 #define WMI_CHAN_REG_INFO1_MAX_REG_PWR GENMASK(23, 16) 3546 #define WMI_CHAN_REG_INFO1_REG_CLS GENMASK(31, 24) 3547 3548 #define WMI_CHAN_REG_INFO2_ANT_MAX GENMASK(7, 0) 3549 #define WMI_CHAN_REG_INFO2_MAX_TX_PWR GENMASK(15, 8) 3550 3551 struct ath12k_wmi_channel_params { 3552 __le32 tlv_header; 3553 __le32 mhz; 3554 __le32 band_center_freq1; 3555 __le32 band_center_freq2; 3556 __le32 info; 3557 __le32 reg_info_1; 3558 __le32 reg_info_2; 3559 } __packed; 3560 3561 enum wmi_sta_ps_mode { 3562 WMI_STA_PS_MODE_DISABLED = 0, 3563 WMI_STA_PS_MODE_ENABLED = 1, 3564 }; 3565 3566 #define WMI_SMPS_MASK_LOWER_16BITS 0xFF 3567 #define WMI_SMPS_MASK_UPPER_3BITS 0x7 3568 #define WMI_SMPS_PARAM_VALUE_SHIFT 29 3569 3570 #define ATH12K_WMI_FW_HANG_ASSERT_TYPE 1 3571 #define ATH12K_WMI_FW_HANG_DELAY 0 3572 3573 /* type, 0:unused 1: ASSERT 2: not respond detect command 3574 * delay_time_ms, the simulate will delay time 3575 */ 3576 3577 struct wmi_force_fw_hang_cmd { 3578 __le32 tlv_header; 3579 __le32 type; 3580 __le32 delay_time_ms; 3581 } __packed; 3582 3583 struct wmi_vdev_set_param_cmd { 3584 __le32 tlv_header; 3585 __le32 vdev_id; 3586 __le32 param_id; 3587 __le32 param_value; 3588 } __packed; 3589 3590 struct wmi_get_pdev_temperature_cmd { 3591 __le32 tlv_header; 3592 __le32 param; 3593 __le32 pdev_id; 3594 } __packed; 3595 3596 #define WMI_P2P_MAX_NOA_DESCRIPTORS 4 3597 3598 struct wmi_p2p_noa_event { 3599 __le32 vdev_id; 3600 } __packed; 3601 3602 struct ath12k_wmi_p2p_noa_descriptor { 3603 __le32 type_count; /* 255: continuous schedule, 0: reserved */ 3604 __le32 duration; /* Absent period duration in micro seconds */ 3605 __le32 interval; /* Absent period interval in micro seconds */ 3606 __le32 start_time; /* 32 bit tsf time when in starts */ 3607 } __packed; 3608 3609 #define WMI_P2P_NOA_INFO_CHANGED_FLAG BIT(0) 3610 #define WMI_P2P_NOA_INFO_INDEX GENMASK(15, 8) 3611 #define WMI_P2P_NOA_INFO_OPP_PS BIT(16) 3612 #define WMI_P2P_NOA_INFO_CTWIN_TU GENMASK(23, 17) 3613 #define WMI_P2P_NOA_INFO_DESC_NUM GENMASK(31, 24) 3614 3615 struct ath12k_wmi_p2p_noa_info { 3616 /* Bit 0 - Flag to indicate an update in NOA schedule 3617 * Bits 7-1 - Reserved 3618 * Bits 15-8 - Index (identifies the instance of NOA sub element) 3619 * Bit 16 - Opp PS state of the AP 3620 * Bits 23-17 - Ctwindow in TUs 3621 * Bits 31-24 - Number of NOA descriptors 3622 */ 3623 __le32 noa_attr; 3624 struct ath12k_wmi_p2p_noa_descriptor descriptors[WMI_P2P_MAX_NOA_DESCRIPTORS]; 3625 } __packed; 3626 3627 #define WMI_BEACON_TX_BUFFER_SIZE 512 3628 3629 #define WMI_EMA_BEACON_CNT GENMASK(7, 0) 3630 #define WMI_EMA_BEACON_IDX GENMASK(15, 8) 3631 #define WMI_EMA_BEACON_FIRST GENMASK(23, 16) 3632 #define WMI_EMA_BEACON_LAST GENMASK(31, 24) 3633 3634 struct ath12k_wmi_bcn_tmpl_ema_arg { 3635 u8 bcn_cnt; 3636 u8 bcn_index; 3637 }; 3638 3639 struct wmi_bcn_tmpl_cmd { 3640 __le32 tlv_header; 3641 __le32 vdev_id; 3642 __le32 tim_ie_offset; 3643 __le32 buf_len; 3644 __le32 csa_switch_count_offset; 3645 __le32 ext_csa_switch_count_offset; 3646 __le32 csa_event_bitmap; 3647 __le32 mbssid_ie_offset; 3648 __le32 esp_ie_offset; 3649 __le32 csc_switch_count_offset; 3650 __le32 csc_event_bitmap; 3651 __le32 mu_edca_ie_offset; 3652 __le32 feature_enable_bitmap; 3653 __le32 ema_params; 3654 } __packed; 3655 3656 struct wmi_p2p_go_set_beacon_ie_cmd { 3657 __le32 tlv_header; 3658 __le32 vdev_id; 3659 __le32 ie_buf_len; 3660 } __packed; 3661 3662 struct wmi_vdev_install_key_cmd { 3663 __le32 tlv_header; 3664 __le32 vdev_id; 3665 struct ath12k_wmi_mac_addr_params peer_macaddr; 3666 __le32 key_idx; 3667 __le32 key_flags; 3668 __le32 key_cipher; 3669 __le64 key_rsc_counter; 3670 __le64 key_global_rsc_counter; 3671 __le64 key_tsc_counter; 3672 u8 wpi_key_rsc_counter[16]; 3673 u8 wpi_key_tsc_counter[16]; 3674 __le32 key_len; 3675 __le32 key_txmic_len; 3676 __le32 key_rxmic_len; 3677 __le32 is_group_key_id_valid; 3678 __le32 group_key_id; 3679 3680 /* Followed by key_data containing key followed by 3681 * tx mic and then rx mic 3682 */ 3683 } __packed; 3684 3685 struct wmi_vdev_install_key_arg { 3686 u32 vdev_id; 3687 const u8 *macaddr; 3688 u32 key_idx; 3689 u32 key_flags; 3690 u32 key_cipher; 3691 u32 key_len; 3692 u32 key_txmic_len; 3693 u32 key_rxmic_len; 3694 u64 key_rsc_counter; 3695 const void *key_data; 3696 }; 3697 3698 #define WMI_MAX_SUPPORTED_RATES 128 3699 #define WMI_HOST_MAX_HECAP_PHY_SIZE 3 3700 #define WMI_HOST_MAX_HE_RATE_SET 3 3701 #define WMI_HECAP_TXRX_MCS_NSS_IDX_80 0 3702 #define WMI_HECAP_TXRX_MCS_NSS_IDX_160 1 3703 #define WMI_HECAP_TXRX_MCS_NSS_IDX_80_80 2 3704 3705 #define ATH12K_WMI_MLO_MAX_PARTNER_LINKS \ 3706 (ATH12K_WMI_MLO_MAX_LINKS + ATH12K_MAX_NUM_BRIDGE_LINKS - 1) 3707 3708 struct peer_assoc_mlo_params { 3709 bool enabled; 3710 bool assoc_link; 3711 bool primary_umac; 3712 bool peer_id_valid; 3713 bool logical_link_idx_valid; 3714 bool bridge_peer; 3715 u8 mld_addr[ETH_ALEN]; 3716 u32 logical_link_idx; 3717 u32 ml_peer_id; 3718 u32 ieee_link_id; 3719 u8 num_partner_links; 3720 struct wmi_ml_partner_info partner_info[ATH12K_WMI_MLO_MAX_LINKS]; 3721 }; 3722 3723 struct wmi_rate_set_arg { 3724 u32 num_rates; 3725 u8 rates[WMI_MAX_SUPPORTED_RATES]; 3726 }; 3727 3728 struct ath12k_wmi_peer_assoc_arg { 3729 u32 vdev_id; 3730 u32 peer_new_assoc; 3731 u32 peer_associd; 3732 u32 peer_flags; 3733 u32 peer_caps; 3734 u32 peer_listen_intval; 3735 u32 peer_ht_caps; 3736 u32 peer_max_mpdu; 3737 u32 peer_mpdu_density; 3738 u32 peer_rate_caps; 3739 u32 peer_nss; 3740 u32 peer_vht_caps; 3741 u32 peer_phymode; 3742 u32 peer_ht_info[2]; 3743 struct wmi_rate_set_arg peer_legacy_rates; 3744 struct wmi_rate_set_arg peer_ht_rates; 3745 u32 rx_max_rate; 3746 u32 rx_mcs_set; 3747 u32 tx_max_rate; 3748 u32 tx_mcs_set; 3749 u8 vht_capable; 3750 u8 min_data_rate; 3751 u32 tx_max_mcs_nss; 3752 u32 peer_bw_rxnss_override; 3753 bool is_pmf_enabled; 3754 bool is_wme_set; 3755 bool qos_flag; 3756 bool apsd_flag; 3757 bool ht_flag; 3758 bool bw_40; 3759 bool bw_80; 3760 bool bw_160; 3761 bool bw_320; 3762 bool stbc_flag; 3763 bool ldpc_flag; 3764 bool static_mimops_flag; 3765 bool dynamic_mimops_flag; 3766 bool spatial_mux_flag; 3767 bool vht_flag; 3768 bool vht_ng_flag; 3769 bool need_ptk_4_way; 3770 bool need_gtk_2_way; 3771 bool auth_flag; 3772 bool safe_mode_enabled; 3773 bool amsdu_disable; 3774 /* Use common structure */ 3775 u8 peer_mac[ETH_ALEN]; 3776 3777 bool he_flag; 3778 u32 peer_he_cap_macinfo[2]; 3779 u32 peer_he_cap_macinfo_internal; 3780 u32 peer_he_caps_6ghz; 3781 u32 peer_he_ops; 3782 u32 peer_he_cap_phyinfo[WMI_HOST_MAX_HECAP_PHY_SIZE]; 3783 u32 peer_he_mcs_count; 3784 u32 peer_he_rx_mcs_set[WMI_HOST_MAX_HE_RATE_SET]; 3785 u32 peer_he_tx_mcs_set[WMI_HOST_MAX_HE_RATE_SET]; 3786 bool twt_responder; 3787 bool twt_requester; 3788 struct ath12k_wmi_ppe_threshold_arg peer_ppet; 3789 bool eht_flag; 3790 u32 peer_eht_cap_mac[WMI_MAX_EHTCAP_MAC_SIZE]; 3791 u32 peer_eht_cap_phy[WMI_MAX_EHTCAP_PHY_SIZE]; 3792 u32 peer_eht_mcs_count; 3793 u32 peer_eht_rx_mcs_set[WMI_MAX_EHTCAP_RATE_SET]; 3794 u32 peer_eht_tx_mcs_set[WMI_MAX_EHTCAP_RATE_SET]; 3795 struct ath12k_wmi_ppe_threshold_arg peer_eht_ppet; 3796 u32 punct_bitmap; 3797 bool is_assoc; 3798 struct peer_assoc_mlo_params ml; 3799 }; 3800 3801 #define ATH12K_WMI_FLAG_MLO_ENABLED BIT(0) 3802 #define ATH12K_WMI_FLAG_MLO_ASSOC_LINK BIT(1) 3803 #define ATH12K_WMI_FLAG_MLO_PRIMARY_UMAC BIT(2) 3804 #define ATH12K_WMI_FLAG_MLO_LINK_ID_VALID BIT(3) 3805 #define ATH12K_WMI_FLAG_MLO_PEER_ID_VALID BIT(4) 3806 3807 struct wmi_peer_assoc_mlo_partner_info_params { 3808 __le32 tlv_header; 3809 __le32 vdev_id; 3810 __le32 hw_link_id; 3811 __le32 flags; 3812 __le32 logical_link_idx; 3813 } __packed; 3814 3815 struct wmi_peer_assoc_mlo_params { 3816 __le32 tlv_header; 3817 __le32 flags; 3818 struct ath12k_wmi_mac_addr_params mld_addr; 3819 __le32 logical_link_idx; 3820 __le32 ml_peer_id; 3821 __le32 ieee_link_id; 3822 __le32 emlsr_trans_timeout_us; 3823 __le32 emlsr_trans_delay_us; 3824 __le32 emlsr_padding_delay_us; 3825 } __packed; 3826 3827 struct wmi_peer_assoc_complete_cmd { 3828 __le32 tlv_header; 3829 struct ath12k_wmi_mac_addr_params peer_macaddr; 3830 __le32 vdev_id; 3831 __le32 peer_new_assoc; 3832 __le32 peer_associd; 3833 __le32 peer_flags; 3834 __le32 peer_caps; 3835 __le32 peer_listen_intval; 3836 __le32 peer_ht_caps; 3837 __le32 peer_max_mpdu; 3838 __le32 peer_mpdu_density; 3839 __le32 peer_rate_caps; 3840 __le32 peer_nss; 3841 __le32 peer_vht_caps; 3842 __le32 peer_phymode; 3843 __le32 peer_ht_info[2]; 3844 __le32 num_peer_legacy_rates; 3845 __le32 num_peer_ht_rates; 3846 __le32 peer_bw_rxnss_override; 3847 struct ath12k_wmi_ppe_threshold_params peer_ppet; 3848 __le32 peer_he_cap_info; 3849 __le32 peer_he_ops; 3850 __le32 peer_he_cap_phy[WMI_MAX_HECAP_PHY_SIZE]; 3851 __le32 peer_he_mcs; 3852 __le32 peer_he_cap_info_ext; 3853 __le32 peer_he_cap_info_internal; 3854 __le32 min_data_rate; 3855 __le32 peer_he_caps_6ghz; 3856 __le32 sta_type; 3857 __le32 bss_max_idle_option; 3858 __le32 auth_mode; 3859 __le32 peer_flags_ext; 3860 __le32 punct_bitmap; 3861 __le32 peer_eht_cap_mac[WMI_MAX_EHTCAP_MAC_SIZE]; 3862 __le32 peer_eht_cap_phy[WMI_MAX_EHTCAP_PHY_SIZE]; 3863 __le32 peer_eht_ops; 3864 struct ath12k_wmi_ppe_threshold_params peer_eht_ppet; 3865 } __packed; 3866 3867 struct wmi_stop_scan_cmd { 3868 __le32 tlv_header; 3869 __le32 requestor; 3870 __le32 scan_id; 3871 __le32 req_type; 3872 __le32 vdev_id; 3873 __le32 pdev_id; 3874 } __packed; 3875 3876 struct ath12k_wmi_scan_chan_list_arg { 3877 u32 pdev_id; 3878 u16 nallchans; 3879 struct ath12k_wmi_channel_arg channel[]; 3880 }; 3881 3882 struct wmi_scan_chan_list_cmd { 3883 __le32 tlv_header; 3884 __le32 num_scan_chans; 3885 __le32 flags; 3886 __le32 pdev_id; 3887 } __packed; 3888 3889 #define WMI_MGMT_SEND_DOWNLD_LEN 64 3890 3891 #define WMI_TX_PARAMS_DWORD0_POWER GENMASK(7, 0) 3892 #define WMI_TX_PARAMS_DWORD0_MCS_MASK GENMASK(19, 8) 3893 #define WMI_TX_PARAMS_DWORD0_NSS_MASK GENMASK(27, 20) 3894 #define WMI_TX_PARAMS_DWORD0_RETRY_LIMIT GENMASK(31, 28) 3895 3896 #define WMI_TX_PARAMS_DWORD1_CHAIN_MASK GENMASK(7, 0) 3897 #define WMI_TX_PARAMS_DWORD1_BW_MASK GENMASK(14, 8) 3898 #define WMI_TX_PARAMS_DWORD1_PREAMBLE_TYPE GENMASK(19, 15) 3899 #define WMI_TX_PARAMS_DWORD1_FRAME_TYPE BIT(20) 3900 #define WMI_TX_PARAMS_DWORD1_RSVD GENMASK(31, 21) 3901 3902 struct wmi_mgmt_send_cmd { 3903 __le32 tlv_header; 3904 __le32 vdev_id; 3905 __le32 desc_id; 3906 __le32 chanfreq; 3907 __le32 paddr_lo; 3908 __le32 paddr_hi; 3909 __le32 frame_len; 3910 __le32 buf_len; 3911 __le32 tx_params_valid; 3912 3913 /* This TLV is followed by struct wmi_mgmt_frame */ 3914 3915 /* Followed by struct wmi_mgmt_send_params */ 3916 } __packed; 3917 3918 struct wmi_sta_powersave_mode_cmd { 3919 __le32 tlv_header; 3920 __le32 vdev_id; 3921 __le32 sta_ps_mode; 3922 } __packed; 3923 3924 struct wmi_sta_smps_force_mode_cmd { 3925 __le32 tlv_header; 3926 __le32 vdev_id; 3927 __le32 forced_mode; 3928 } __packed; 3929 3930 struct wmi_sta_smps_param_cmd { 3931 __le32 tlv_header; 3932 __le32 vdev_id; 3933 __le32 param; 3934 __le32 value; 3935 } __packed; 3936 3937 struct ath12k_wmi_bcn_prb_info_params { 3938 __le32 tlv_header; 3939 __le32 caps; 3940 __le32 erp; 3941 } __packed; 3942 3943 enum { 3944 WMI_PDEV_SUSPEND, 3945 WMI_PDEV_SUSPEND_AND_DISABLE_INTR, 3946 }; 3947 3948 struct wmi_pdev_green_ap_ps_enable_cmd_param { 3949 __le32 tlv_header; 3950 __le32 pdev_id; 3951 __le32 enable; 3952 } __packed; 3953 3954 struct ath12k_wmi_ap_ps_arg { 3955 u32 vdev_id; 3956 u32 param; 3957 u32 value; 3958 }; 3959 3960 enum set_init_cc_type { 3961 WMI_COUNTRY_INFO_TYPE_ALPHA, 3962 WMI_COUNTRY_INFO_TYPE_COUNTRY_CODE, 3963 WMI_COUNTRY_INFO_TYPE_REGDOMAIN, 3964 }; 3965 3966 enum set_init_cc_flags { 3967 INVALID_CC, 3968 CC_IS_SET, 3969 REGDMN_IS_SET, 3970 ALPHA_IS_SET, 3971 }; 3972 3973 struct ath12k_wmi_init_country_arg { 3974 union { 3975 u16 country_code; 3976 u16 regdom_id; 3977 u8 alpha2[3]; 3978 } cc_info; 3979 enum set_init_cc_flags flags; 3980 }; 3981 3982 struct wmi_init_country_cmd { 3983 __le32 tlv_header; 3984 __le32 pdev_id; 3985 __le32 init_cc_type; 3986 union { 3987 __le32 country_code; 3988 __le32 regdom_id; 3989 __le32 alpha2; 3990 } cc_info; 3991 } __packed; 3992 3993 struct wmi_delba_send_cmd { 3994 __le32 tlv_header; 3995 __le32 vdev_id; 3996 struct ath12k_wmi_mac_addr_params peer_macaddr; 3997 __le32 tid; 3998 __le32 initiator; 3999 __le32 reasoncode; 4000 } __packed; 4001 4002 struct wmi_addba_setresponse_cmd { 4003 __le32 tlv_header; 4004 __le32 vdev_id; 4005 struct ath12k_wmi_mac_addr_params peer_macaddr; 4006 __le32 tid; 4007 __le32 statuscode; 4008 } __packed; 4009 4010 struct wmi_addba_send_cmd { 4011 __le32 tlv_header; 4012 __le32 vdev_id; 4013 struct ath12k_wmi_mac_addr_params peer_macaddr; 4014 __le32 tid; 4015 __le32 buffersize; 4016 } __packed; 4017 4018 struct wmi_addba_clear_resp_cmd { 4019 __le32 tlv_header; 4020 __le32 vdev_id; 4021 struct ath12k_wmi_mac_addr_params peer_macaddr; 4022 } __packed; 4023 4024 #define DFS_PHYERR_UNIT_TEST_CMD 0 4025 #define DFS_UNIT_TEST_MODULE 0x2b 4026 #define DFS_UNIT_TEST_TOKEN 0xAA 4027 4028 enum dfs_test_args_idx { 4029 DFS_TEST_CMDID = 0, 4030 DFS_TEST_PDEV_ID, 4031 DFS_TEST_RADAR_PARAM, 4032 DFS_MAX_TEST_ARGS, 4033 }; 4034 4035 struct wmi_dfs_unit_test_arg { 4036 u32 cmd_id; 4037 u32 pdev_id; 4038 u32 radar_param; 4039 }; 4040 4041 struct wmi_unit_test_cmd { 4042 __le32 tlv_header; 4043 __le32 vdev_id; 4044 __le32 module_id; 4045 __le32 num_args; 4046 __le32 diag_token; 4047 /* Followed by test args*/ 4048 } __packed; 4049 4050 #define MAX_SUPPORTED_RATES 128 4051 4052 struct ath12k_wmi_vht_rate_set_params { 4053 __le32 tlv_header; 4054 __le32 rx_max_rate; 4055 __le32 rx_mcs_set; 4056 __le32 tx_max_rate; 4057 __le32 tx_mcs_set; 4058 __le32 tx_max_mcs_nss; 4059 } __packed; 4060 4061 struct ath12k_wmi_he_rate_set_params { 4062 __le32 tlv_header; 4063 __le32 rx_mcs_set; 4064 __le32 tx_mcs_set; 4065 } __packed; 4066 4067 struct ath12k_wmi_eht_rate_set_params { 4068 __le32 tlv_header; 4069 __le32 rx_mcs_set; 4070 __le32 tx_mcs_set; 4071 } __packed; 4072 4073 #define MAX_REG_RULES 10 4074 #define REG_ALPHA2_LEN 2 4075 #define MAX_6G_REG_RULES 5 4076 #define REG_US_5G_NUM_REG_RULES 4 4077 4078 enum wmi_start_event_param { 4079 WMI_VDEV_START_RESP_EVENT = 0, 4080 WMI_VDEV_RESTART_RESP_EVENT, 4081 }; 4082 4083 struct wmi_vdev_start_resp_event { 4084 __le32 vdev_id; 4085 __le32 requestor_id; 4086 /* enum wmi_start_event_param */ 4087 __le32 resp_type; 4088 __le32 status; 4089 __le32 chain_mask; 4090 __le32 smps_mode; 4091 union { 4092 __le32 mac_id; 4093 __le32 pdev_id; 4094 }; 4095 __le32 cfgd_tx_streams; 4096 __le32 cfgd_rx_streams; 4097 } __packed; 4098 4099 /* VDEV start response status codes */ 4100 enum wmi_vdev_start_resp_status_code { 4101 WMI_VDEV_START_RESPONSE_STATUS_SUCCESS = 0, 4102 WMI_VDEV_START_RESPONSE_INVALID_VDEVID = 1, 4103 WMI_VDEV_START_RESPONSE_NOT_SUPPORTED = 2, 4104 WMI_VDEV_START_RESPONSE_DFS_VIOLATION = 3, 4105 WMI_VDEV_START_RESPONSE_INVALID_REGDOMAIN = 4, 4106 }; 4107 4108 enum wmi_reg_6g_ap_type { 4109 WMI_REG_INDOOR_AP = 0, 4110 WMI_REG_STD_POWER_AP = 1, 4111 WMI_REG_VLP_AP = 2, 4112 WMI_REG_CURRENT_MAX_AP_TYPE, 4113 WMI_REG_MAX_SUPP_AP_TYPE = WMI_REG_VLP_AP, 4114 WMI_REG_MAX_AP_TYPE = 7, 4115 }; 4116 4117 enum wmi_reg_6g_client_type { 4118 WMI_REG_DEFAULT_CLIENT = 0, 4119 WMI_REG_SUBORDINATE_CLIENT = 1, 4120 WMI_REG_MAX_CLIENT_TYPE = 2, 4121 }; 4122 4123 /* Regulatory Rule Flags Passed by FW */ 4124 #define REGULATORY_CHAN_DISABLED BIT(0) 4125 #define REGULATORY_CHAN_NO_IR BIT(1) 4126 #define REGULATORY_CHAN_RADAR BIT(3) 4127 #define REGULATORY_CHAN_NO_OFDM BIT(6) 4128 #define REGULATORY_CHAN_INDOOR_ONLY BIT(9) 4129 4130 #define REGULATORY_CHAN_NO_HT40 BIT(4) 4131 #define REGULATORY_CHAN_NO_80MHZ BIT(7) 4132 #define REGULATORY_CHAN_NO_160MHZ BIT(8) 4133 #define REGULATORY_CHAN_NO_20MHZ BIT(11) 4134 #define REGULATORY_CHAN_NO_10MHZ BIT(12) 4135 4136 enum { 4137 WMI_REG_SET_CC_STATUS_PASS = 0, 4138 WMI_REG_CURRENT_ALPHA2_NOT_FOUND = 1, 4139 WMI_REG_INIT_ALPHA2_NOT_FOUND = 2, 4140 WMI_REG_SET_CC_CHANGE_NOT_ALLOWED = 3, 4141 WMI_REG_SET_CC_STATUS_NO_MEMORY = 4, 4142 WMI_REG_SET_CC_STATUS_FAIL = 5, 4143 }; 4144 4145 #define WMI_REG_CLIENT_MAX 4 4146 4147 struct wmi_reg_chan_list_cc_ext_event { 4148 __le32 status_code; 4149 __le32 phy_id; 4150 __le32 alpha2; 4151 __le32 num_phy; 4152 __le32 country_id; 4153 __le32 domain_code; 4154 __le32 dfs_region; 4155 __le32 phybitmap; 4156 __le32 min_bw_2g; 4157 __le32 max_bw_2g; 4158 __le32 min_bw_5g; 4159 __le32 max_bw_5g; 4160 __le32 num_2g_reg_rules; 4161 __le32 num_5g_reg_rules; 4162 __le32 client_type; 4163 __le32 rnr_tpe_usable; 4164 __le32 unspecified_ap_usable; 4165 __le32 domain_code_6g_ap_lpi; 4166 __le32 domain_code_6g_ap_sp; 4167 __le32 domain_code_6g_ap_vlp; 4168 __le32 domain_code_6g_client_lpi[WMI_REG_CLIENT_MAX]; 4169 __le32 domain_code_6g_client_sp[WMI_REG_CLIENT_MAX]; 4170 __le32 domain_code_6g_client_vlp[WMI_REG_CLIENT_MAX]; 4171 __le32 domain_code_6g_super_id; 4172 __le32 min_bw_6g_ap_sp; 4173 __le32 max_bw_6g_ap_sp; 4174 __le32 min_bw_6g_ap_lpi; 4175 __le32 max_bw_6g_ap_lpi; 4176 __le32 min_bw_6g_ap_vlp; 4177 __le32 max_bw_6g_ap_vlp; 4178 __le32 min_bw_6g_client_sp[WMI_REG_CLIENT_MAX]; 4179 __le32 max_bw_6g_client_sp[WMI_REG_CLIENT_MAX]; 4180 __le32 min_bw_6g_client_lpi[WMI_REG_CLIENT_MAX]; 4181 __le32 max_bw_6g_client_lpi[WMI_REG_CLIENT_MAX]; 4182 __le32 min_bw_6g_client_vlp[WMI_REG_CLIENT_MAX]; 4183 __le32 max_bw_6g_client_vlp[WMI_REG_CLIENT_MAX]; 4184 __le32 num_6g_reg_rules_ap_sp; 4185 __le32 num_6g_reg_rules_ap_lpi; 4186 __le32 num_6g_reg_rules_ap_vlp; 4187 __le32 num_6g_reg_rules_cl_sp[WMI_REG_CLIENT_MAX]; 4188 __le32 num_6g_reg_rules_cl_lpi[WMI_REG_CLIENT_MAX]; 4189 __le32 num_6g_reg_rules_cl_vlp[WMI_REG_CLIENT_MAX]; 4190 } __packed; 4191 4192 struct ath12k_wmi_reg_rule_ext_params { 4193 __le32 tlv_header; 4194 __le32 freq_info; 4195 __le32 bw_pwr_info; 4196 __le32 flag_info; 4197 __le32 psd_power_info; 4198 } __packed; 4199 4200 struct wmi_vdev_delete_resp_event { 4201 __le32 vdev_id; 4202 } __packed; 4203 4204 struct wmi_peer_delete_resp_event { 4205 __le32 vdev_id; 4206 struct ath12k_wmi_mac_addr_params peer_macaddr; 4207 } __packed; 4208 4209 struct wmi_bcn_tx_status_event { 4210 __le32 vdev_id; 4211 __le32 tx_status; 4212 } __packed; 4213 4214 struct wmi_vdev_stopped_event { 4215 __le32 vdev_id; 4216 } __packed; 4217 4218 struct wmi_pdev_bss_chan_info_event { 4219 __le32 freq; /* Units in MHz */ 4220 __le32 noise_floor; /* units are dBm */ 4221 /* rx clear - how often the channel was unused */ 4222 __le32 rx_clear_count_low; 4223 __le32 rx_clear_count_high; 4224 /* cycle count - elapsed time during measured period, in clock ticks */ 4225 __le32 cycle_count_low; 4226 __le32 cycle_count_high; 4227 /* tx cycle count - elapsed time spent in tx, in clock ticks */ 4228 __le32 tx_cycle_count_low; 4229 __le32 tx_cycle_count_high; 4230 /* rx cycle count - elapsed time spent in rx, in clock ticks */ 4231 __le32 rx_cycle_count_low; 4232 __le32 rx_cycle_count_high; 4233 /*rx_cycle cnt for my bss in 64bits format */ 4234 __le32 rx_bss_cycle_count_low; 4235 __le32 rx_bss_cycle_count_high; 4236 __le32 pdev_id; 4237 } __packed; 4238 4239 #define WMI_VDEV_INSTALL_KEY_COMPL_STATUS_SUCCESS 0 4240 4241 struct wmi_vdev_install_key_compl_event { 4242 __le32 vdev_id; 4243 struct ath12k_wmi_mac_addr_params peer_macaddr; 4244 __le32 key_idx; 4245 __le32 key_flags; 4246 __le32 status; 4247 } __packed; 4248 4249 struct wmi_vdev_install_key_complete_arg { 4250 u32 vdev_id; 4251 const u8 *macaddr; 4252 u32 key_idx; 4253 u32 key_flags; 4254 u32 status; 4255 }; 4256 4257 struct wmi_peer_assoc_conf_event { 4258 __le32 vdev_id; 4259 struct ath12k_wmi_mac_addr_params peer_macaddr; 4260 } __packed; 4261 4262 struct wmi_peer_assoc_conf_arg { 4263 u32 vdev_id; 4264 const u8 *macaddr; 4265 }; 4266 4267 struct wmi_fils_discovery_event { 4268 __le32 vdev_id; 4269 __le32 fils_tt; 4270 __le32 tbtt; 4271 } __packed; 4272 4273 struct wmi_probe_resp_tx_status_event { 4274 __le32 vdev_id; 4275 __le32 tx_status; 4276 } __packed; 4277 4278 struct wmi_pdev_ctl_failsafe_chk_event { 4279 __le32 pdev_id; 4280 __le32 ctl_failsafe_status; 4281 } __packed; 4282 4283 struct ath12k_wmi_pdev_csa_event { 4284 __le32 pdev_id; 4285 __le32 current_switch_count; 4286 __le32 num_vdevs; 4287 } __packed; 4288 4289 struct ath12k_wmi_pdev_radar_event { 4290 __le32 pdev_id; 4291 __le32 detection_mode; 4292 __le32 chan_freq; 4293 __le32 chan_width; 4294 __le32 detector_id; 4295 __le32 segment_id; 4296 __le32 timestamp; 4297 __le32 is_chirp; 4298 a_sle32 freq_offset; 4299 a_sle32 sidx; 4300 } __packed; 4301 4302 struct wmi_pdev_temperature_event { 4303 /* temperature value in Celsius degree */ 4304 a_sle32 temp; 4305 __le32 pdev_id; 4306 } __packed; 4307 4308 #define WMI_RX_STATUS_OK 0x00 4309 #define WMI_RX_STATUS_ERR_CRC 0x01 4310 #define WMI_RX_STATUS_ERR_DECRYPT 0x08 4311 #define WMI_RX_STATUS_ERR_MIC 0x10 4312 #define WMI_RX_STATUS_ERR_KEY_CACHE_MISS 0x20 4313 4314 #define WLAN_MGMT_TXRX_HOST_MAX_ANTENNA 4 4315 4316 struct ath12k_wmi_mgmt_rx_arg { 4317 u32 chan_freq; 4318 u32 channel; 4319 u32 snr; 4320 u8 rssi_ctl[WLAN_MGMT_TXRX_HOST_MAX_ANTENNA]; 4321 u32 rate; 4322 enum wmi_phy_mode phy_mode; 4323 u32 buf_len; 4324 int status; 4325 u32 flags; 4326 int rssi; 4327 u32 tsf_delta; 4328 u8 pdev_id; 4329 }; 4330 4331 #define ATH_MAX_ANTENNA 4 4332 4333 struct ath12k_wmi_mgmt_rx_params { 4334 __le32 channel; 4335 __le32 snr; 4336 __le32 rate; 4337 __le32 phy_mode; 4338 __le32 buf_len; 4339 __le32 status; 4340 __le32 rssi_ctl[ATH_MAX_ANTENNA]; 4341 __le32 flags; 4342 a_sle32 rssi; 4343 __le32 tsf_delta; 4344 __le32 rx_tsf_l32; 4345 __le32 rx_tsf_u32; 4346 __le32 pdev_id; 4347 __le32 chan_freq; 4348 } __packed; 4349 4350 #define MAX_ANTENNA_EIGHT 8 4351 4352 struct wmi_mgmt_tx_compl_event { 4353 __le32 desc_id; 4354 __le32 status; 4355 __le32 pdev_id; 4356 } __packed; 4357 4358 struct wmi_scan_event { 4359 __le32 event_type; /* %WMI_SCAN_EVENT_ */ 4360 __le32 reason; /* %WMI_SCAN_REASON_ */ 4361 __le32 channel_freq; /* only valid for WMI_SCAN_EVENT_FOREIGN_CHANNEL */ 4362 __le32 scan_req_id; 4363 __le32 scan_id; 4364 __le32 vdev_id; 4365 /* TSF Timestamp when the scan event (%WMI_SCAN_EVENT_) is completed 4366 * In case of AP it is TSF of the AP vdev 4367 * In case of STA connected state, this is the TSF of the AP 4368 * In case of STA not connected, it will be the free running HW timer 4369 */ 4370 __le32 tsf_timestamp; 4371 } __packed; 4372 4373 struct wmi_peer_sta_kickout_arg { 4374 const u8 *mac_addr; 4375 }; 4376 4377 struct wmi_peer_sta_kickout_event { 4378 struct ath12k_wmi_mac_addr_params peer_macaddr; 4379 } __packed; 4380 4381 #define WMI_ROAM_REASON_MASK GENMASK(3, 0) 4382 #define WMI_ROAM_SUBNET_STATUS_MASK GENMASK(5, 4) 4383 4384 enum wmi_roam_reason { 4385 WMI_ROAM_REASON_BETTER_AP = 1, 4386 WMI_ROAM_REASON_BEACON_MISS = 2, 4387 WMI_ROAM_REASON_LOW_RSSI = 3, 4388 WMI_ROAM_REASON_SUITABLE_AP_FOUND = 4, 4389 WMI_ROAM_REASON_HO_FAILED = 5, 4390 4391 /* keep last */ 4392 WMI_ROAM_REASON_MAX, 4393 }; 4394 4395 struct wmi_roam_event { 4396 __le32 vdev_id; 4397 __le32 reason; 4398 __le32 rssi; 4399 } __packed; 4400 4401 #define WMI_CHAN_INFO_START_RESP 0 4402 #define WMI_CHAN_INFO_END_RESP 1 4403 4404 struct wmi_chan_info_event { 4405 __le32 err_code; 4406 __le32 freq; 4407 __le32 cmd_flags; 4408 __le32 noise_floor; 4409 __le32 rx_clear_count; 4410 __le32 cycle_count; 4411 __le32 chan_tx_pwr_range; 4412 __le32 chan_tx_pwr_tp; 4413 __le32 rx_frame_count; 4414 __le32 my_bss_rx_cycle_count; 4415 __le32 rx_11b_mode_data_duration; 4416 __le32 tx_frame_cnt; 4417 __le32 mac_clk_mhz; 4418 __le32 vdev_id; 4419 } __packed; 4420 4421 struct ath12k_wmi_target_cap_arg { 4422 u32 phy_capability; 4423 u32 max_frag_entry; 4424 u32 num_rf_chains; 4425 u32 ht_cap_info; 4426 u32 vht_cap_info; 4427 u32 vht_supp_mcs; 4428 u32 hw_min_tx_power; 4429 u32 hw_max_tx_power; 4430 u32 sys_cap_info; 4431 u32 min_pkt_size_enable; 4432 u32 max_bcn_ie_size; 4433 u32 max_num_scan_channels; 4434 u32 max_supported_macs; 4435 u32 wmi_fw_sub_feat_caps; 4436 u32 txrx_chainmask; 4437 u32 default_dbs_hw_mode_index; 4438 u32 num_msdu_desc; 4439 }; 4440 4441 enum wmi_vdev_type { 4442 WMI_VDEV_TYPE_AP = 1, 4443 WMI_VDEV_TYPE_STA = 2, 4444 WMI_VDEV_TYPE_IBSS = 3, 4445 WMI_VDEV_TYPE_MONITOR = 4, 4446 }; 4447 4448 enum wmi_vdev_subtype { 4449 WMI_VDEV_SUBTYPE_NONE, 4450 WMI_VDEV_SUBTYPE_P2P_DEVICE, 4451 WMI_VDEV_SUBTYPE_P2P_CLIENT, 4452 WMI_VDEV_SUBTYPE_P2P_GO, 4453 WMI_VDEV_SUBTYPE_PROXY_STA, 4454 WMI_VDEV_SUBTYPE_MESH_NON_11S, 4455 WMI_VDEV_SUBTYPE_MESH_11S, 4456 }; 4457 4458 enum wmi_sta_powersave_param { 4459 WMI_STA_PS_PARAM_RX_WAKE_POLICY = 0, 4460 WMI_STA_PS_PARAM_TX_WAKE_THRESHOLD = 1, 4461 WMI_STA_PS_PARAM_PSPOLL_COUNT = 2, 4462 WMI_STA_PS_PARAM_INACTIVITY_TIME = 3, 4463 WMI_STA_PS_PARAM_UAPSD = 4, 4464 }; 4465 4466 enum wmi_sta_ps_param_uapsd { 4467 WMI_STA_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0), 4468 WMI_STA_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1), 4469 WMI_STA_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2), 4470 WMI_STA_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3), 4471 WMI_STA_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4), 4472 WMI_STA_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5), 4473 WMI_STA_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6), 4474 WMI_STA_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7), 4475 }; 4476 4477 enum wmi_sta_ps_param_tx_wake_threshold { 4478 WMI_STA_PS_TX_WAKE_THRESHOLD_NEVER = 0, 4479 WMI_STA_PS_TX_WAKE_THRESHOLD_ALWAYS = 1, 4480 4481 /* Values greater than one indicate that many TX attempts per beacon 4482 * interval before the STA will wake up 4483 */ 4484 }; 4485 4486 /* The maximum number of PS-Poll frames the FW will send in response to 4487 * traffic advertised in TIM before waking up (by sending a null frame with PS 4488 * = 0). Value 0 has a special meaning: there is no maximum count and the FW 4489 * will send as many PS-Poll as are necessary to retrieve buffered BU. This 4490 * parameter is used when the RX wake policy is 4491 * WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD and ignored when the RX wake 4492 * policy is WMI_STA_PS_RX_WAKE_POLICY_WAKE. 4493 */ 4494 enum wmi_sta_ps_param_pspoll_count { 4495 WMI_STA_PS_PSPOLL_COUNT_NO_MAX = 0, 4496 /* Values greater than 0 indicate the maximum number of PS-Poll frames 4497 * FW will send before waking up. 4498 */ 4499 }; 4500 4501 /* U-APSD configuration of peer station from (re)assoc request and TSPECs */ 4502 enum wmi_ap_ps_param_uapsd { 4503 WMI_AP_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0), 4504 WMI_AP_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1), 4505 WMI_AP_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2), 4506 WMI_AP_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3), 4507 WMI_AP_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4), 4508 WMI_AP_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5), 4509 WMI_AP_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6), 4510 WMI_AP_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7), 4511 }; 4512 4513 /* U-APSD maximum service period of peer station */ 4514 enum wmi_ap_ps_peer_param_max_sp { 4515 WMI_AP_PS_PEER_PARAM_MAX_SP_UNLIMITED = 0, 4516 WMI_AP_PS_PEER_PARAM_MAX_SP_2 = 1, 4517 WMI_AP_PS_PEER_PARAM_MAX_SP_4 = 2, 4518 WMI_AP_PS_PEER_PARAM_MAX_SP_6 = 3, 4519 MAX_WMI_AP_PS_PEER_PARAM_MAX_SP, 4520 }; 4521 4522 enum wmi_ap_ps_peer_param { 4523 /** Set uapsd configuration for a given peer. 4524 * 4525 * This include the delivery and trigger enabled state for each AC. 4526 * The host MLME needs to set this based on AP capability and stations 4527 * request Set in the association request received from the station. 4528 * 4529 * Lower 8 bits of the value specify the UAPSD configuration. 4530 * 4531 * (see enum wmi_ap_ps_param_uapsd) 4532 * The default value is 0. 4533 */ 4534 WMI_AP_PS_PEER_PARAM_UAPSD = 0, 4535 4536 /** 4537 * Set the service period for a UAPSD capable station 4538 * 4539 * The service period from wme ie in the (re)assoc request frame. 4540 * 4541 * (see enum wmi_ap_ps_peer_param_max_sp) 4542 */ 4543 WMI_AP_PS_PEER_PARAM_MAX_SP = 1, 4544 4545 /** Time in seconds for aging out buffered frames 4546 * for STA in power save 4547 */ 4548 WMI_AP_PS_PEER_PARAM_AGEOUT_TIME = 2, 4549 4550 /** Specify frame types that are considered SIFS 4551 * RESP trigger frame 4552 */ 4553 WMI_AP_PS_PEER_PARAM_SIFS_RESP_FRMTYPE = 3, 4554 4555 /** Specifies the trigger state of TID. 4556 * Valid only for UAPSD frame type 4557 */ 4558 WMI_AP_PS_PEER_PARAM_SIFS_RESP_UAPSD = 4, 4559 4560 /* Specifies the WNM sleep state of a STA */ 4561 WMI_AP_PS_PEER_PARAM_WNM_SLEEP = 5, 4562 }; 4563 4564 #define DISABLE_SIFS_RESPONSE_TRIGGER 0 4565 4566 #define WMI_MAX_KEY_INDEX 3 4567 #define WMI_MAX_KEY_LEN 32 4568 4569 enum wmi_key_type { 4570 WMI_KEY_PAIRWISE = 0, 4571 WMI_KEY_GROUP = 1, 4572 }; 4573 4574 enum wmi_cipher_type { 4575 WMI_CIPHER_NONE = 0, /* clear key */ 4576 WMI_CIPHER_WEP = 1, 4577 WMI_CIPHER_TKIP = 2, 4578 WMI_CIPHER_AES_OCB = 3, 4579 WMI_CIPHER_AES_CCM = 4, 4580 WMI_CIPHER_WAPI = 5, 4581 WMI_CIPHER_CKIP = 6, 4582 WMI_CIPHER_AES_CMAC = 7, 4583 WMI_CIPHER_ANY = 8, 4584 WMI_CIPHER_AES_GCM = 9, 4585 WMI_CIPHER_AES_GMAC = 10, 4586 }; 4587 4588 /* Value to disable fixed rate setting */ 4589 #define WMI_FIXED_RATE_NONE (0xffff) 4590 4591 #define ATH12K_RC_VERSION_OFFSET 28 4592 #define ATH12K_RC_PREAMBLE_OFFSET 8 4593 #define ATH12K_RC_NSS_OFFSET 5 4594 4595 #define ATH12K_HW_RATE_CODE(rate, nss, preamble) \ 4596 ((1 << ATH12K_RC_VERSION_OFFSET) | \ 4597 ((nss) << ATH12K_RC_NSS_OFFSET) | \ 4598 ((preamble) << ATH12K_RC_PREAMBLE_OFFSET) | \ 4599 (rate)) 4600 4601 /* Preamble types to be used with VDEV fixed rate configuration */ 4602 enum wmi_rate_preamble { 4603 WMI_RATE_PREAMBLE_OFDM, 4604 WMI_RATE_PREAMBLE_CCK, 4605 WMI_RATE_PREAMBLE_HT, 4606 WMI_RATE_PREAMBLE_VHT, 4607 WMI_RATE_PREAMBLE_HE, 4608 }; 4609 4610 /** 4611 * enum wmi_rtscts_prot_mode - Enable/Disable RTS/CTS and CTS2Self Protection. 4612 * @WMI_RTS_CTS_DISABLED: RTS/CTS protection is disabled. 4613 * @WMI_USE_RTS_CTS: RTS/CTS Enabled. 4614 * @WMI_USE_CTS2SELF: CTS to self protection Enabled. 4615 */ 4616 enum wmi_rtscts_prot_mode { 4617 WMI_RTS_CTS_DISABLED = 0, 4618 WMI_USE_RTS_CTS = 1, 4619 WMI_USE_CTS2SELF = 2, 4620 }; 4621 4622 /** 4623 * enum wmi_rtscts_profile - Selection of RTS CTS profile along with enabling 4624 * protection mode. 4625 * @WMI_RTSCTS_FOR_NO_RATESERIES: Neither of rate-series should use RTS-CTS 4626 * @WMI_RTSCTS_FOR_SECOND_RATESERIES: Only second rate-series will use RTS-CTS 4627 * @WMI_RTSCTS_ACROSS_SW_RETRIES: Only the second rate-series will use RTS-CTS, 4628 * but if there's a sw retry, both the rate 4629 * series will use RTS-CTS. 4630 * @WMI_RTSCTS_ERP: RTS/CTS used for ERP protection for every PPDU. 4631 * @WMI_RTSCTS_FOR_ALL_RATESERIES: Enable RTS-CTS for all rate series. 4632 */ 4633 enum wmi_rtscts_profile { 4634 WMI_RTSCTS_FOR_NO_RATESERIES = 0, 4635 WMI_RTSCTS_FOR_SECOND_RATESERIES = 1, 4636 WMI_RTSCTS_ACROSS_SW_RETRIES = 2, 4637 WMI_RTSCTS_ERP = 3, 4638 WMI_RTSCTS_FOR_ALL_RATESERIES = 4, 4639 }; 4640 4641 #define WMI_SKB_HEADROOM sizeof(struct wmi_cmd_hdr) 4642 4643 enum wmi_sta_ps_param_rx_wake_policy { 4644 WMI_STA_PS_RX_WAKE_POLICY_WAKE = 0, 4645 WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD = 1, 4646 }; 4647 4648 /* Do not change existing values! Used by ath12k_frame_mode parameter 4649 * module parameter. 4650 */ 4651 enum ath12k_hw_txrx_mode { 4652 ATH12K_HW_TXRX_RAW = 0, 4653 ATH12K_HW_TXRX_NATIVE_WIFI = 1, 4654 ATH12K_HW_TXRX_ETHERNET = 2, 4655 }; 4656 4657 struct wmi_wmm_params { 4658 __le32 tlv_header; 4659 __le32 cwmin; 4660 __le32 cwmax; 4661 __le32 aifs; 4662 __le32 txoplimit; 4663 __le32 acm; 4664 __le32 no_ack; 4665 } __packed; 4666 4667 struct wmi_wmm_params_arg { 4668 u8 acm; 4669 u8 aifs; 4670 u16 cwmin; 4671 u16 cwmax; 4672 u16 txop; 4673 u8 no_ack; 4674 }; 4675 4676 struct wmi_vdev_set_wmm_params_cmd { 4677 __le32 tlv_header; 4678 __le32 vdev_id; 4679 struct wmi_wmm_params wmm_params[4]; 4680 __le32 wmm_param_type; 4681 } __packed; 4682 4683 struct wmi_wmm_params_all_arg { 4684 struct wmi_wmm_params_arg ac_be; 4685 struct wmi_wmm_params_arg ac_bk; 4686 struct wmi_wmm_params_arg ac_vi; 4687 struct wmi_wmm_params_arg ac_vo; 4688 }; 4689 4690 #define ATH12K_TWT_DEF_STA_CONG_TIMER_MS 5000 4691 #define ATH12K_TWT_DEF_DEFAULT_SLOT_SIZE 10 4692 #define ATH12K_TWT_DEF_CONGESTION_THRESH_SETUP 50 4693 #define ATH12K_TWT_DEF_CONGESTION_THRESH_TEARDOWN 20 4694 #define ATH12K_TWT_DEF_CONGESTION_THRESH_CRITICAL 100 4695 #define ATH12K_TWT_DEF_INTERFERENCE_THRESH_TEARDOWN 80 4696 #define ATH12K_TWT_DEF_INTERFERENCE_THRESH_SETUP 50 4697 #define ATH12K_TWT_DEF_MIN_NO_STA_SETUP 10 4698 #define ATH12K_TWT_DEF_MIN_NO_STA_TEARDOWN 2 4699 #define ATH12K_TWT_DEF_NO_OF_BCAST_MCAST_SLOTS 2 4700 #define ATH12K_TWT_DEF_MIN_NO_TWT_SLOTS 2 4701 #define ATH12K_TWT_DEF_MAX_NO_STA_TWT 500 4702 #define ATH12K_TWT_DEF_MODE_CHECK_INTERVAL 10000 4703 #define ATH12K_TWT_DEF_ADD_STA_SLOT_INTERVAL 1000 4704 #define ATH12K_TWT_DEF_REMOVE_STA_SLOT_INTERVAL 5000 4705 4706 struct wmi_twt_enable_params_cmd { 4707 __le32 tlv_header; 4708 __le32 pdev_id; 4709 __le32 sta_cong_timer_ms; 4710 __le32 mbss_support; 4711 __le32 default_slot_size; 4712 __le32 congestion_thresh_setup; 4713 __le32 congestion_thresh_teardown; 4714 __le32 congestion_thresh_critical; 4715 __le32 interference_thresh_teardown; 4716 __le32 interference_thresh_setup; 4717 __le32 min_no_sta_setup; 4718 __le32 min_no_sta_teardown; 4719 __le32 no_of_bcast_mcast_slots; 4720 __le32 min_no_twt_slots; 4721 __le32 max_no_sta_twt; 4722 __le32 mode_check_interval; 4723 __le32 add_sta_slot_interval; 4724 __le32 remove_sta_slot_interval; 4725 } __packed; 4726 4727 struct wmi_twt_disable_params_cmd { 4728 __le32 tlv_header; 4729 __le32 pdev_id; 4730 } __packed; 4731 4732 struct wmi_obss_spatial_reuse_params_cmd { 4733 __le32 tlv_header; 4734 __le32 pdev_id; 4735 __le32 enable; 4736 a_sle32 obss_min; 4737 a_sle32 obss_max; 4738 __le32 vdev_id; 4739 } __packed; 4740 4741 #define ATH12K_BSS_COLOR_COLLISION_SCAN_PERIOD_MS 200 4742 #define ATH12K_OBSS_COLOR_COLLISION_DETECTION_DISABLE 0 4743 #define ATH12K_OBSS_COLOR_COLLISION_DETECTION 1 4744 4745 #define ATH12K_BSS_COLOR_STA_PERIODS 10000 4746 #define ATH12K_BSS_COLOR_AP_PERIODS 5000 4747 4748 struct wmi_obss_color_collision_cfg_params_cmd { 4749 __le32 tlv_header; 4750 __le32 vdev_id; 4751 __le32 flags; 4752 __le32 evt_type; 4753 __le32 current_bss_color; 4754 __le32 detection_period_ms; 4755 __le32 scan_period_ms; 4756 __le32 free_slot_expiry_time_ms; 4757 } __packed; 4758 4759 struct wmi_bss_color_change_enable_params_cmd { 4760 __le32 tlv_header; 4761 __le32 vdev_id; 4762 __le32 enable; 4763 } __packed; 4764 4765 #define ATH12K_IPV4_TH_SEED_SIZE 5 4766 #define ATH12K_IPV6_TH_SEED_SIZE 11 4767 4768 struct ath12k_wmi_pdev_lro_config_cmd { 4769 __le32 tlv_header; 4770 __le32 lro_enable; 4771 __le32 res; 4772 u32 th_4[ATH12K_IPV4_TH_SEED_SIZE]; 4773 u32 th_6[ATH12K_IPV6_TH_SEED_SIZE]; 4774 __le32 pdev_id; 4775 } __packed; 4776 4777 #define ATH12K_WMI_SPECTRAL_COUNT_DEFAULT 0 4778 #define ATH12K_WMI_SPECTRAL_PERIOD_DEFAULT 224 4779 #define ATH12K_WMI_SPECTRAL_PRIORITY_DEFAULT 1 4780 #define ATH12K_WMI_SPECTRAL_FFT_SIZE_DEFAULT 7 4781 #define ATH12K_WMI_SPECTRAL_GC_ENA_DEFAULT 1 4782 #define ATH12K_WMI_SPECTRAL_RESTART_ENA_DEFAULT 0 4783 #define ATH12K_WMI_SPECTRAL_NOISE_FLOOR_REF_DEFAULT -96 4784 #define ATH12K_WMI_SPECTRAL_INIT_DELAY_DEFAULT 80 4785 #define ATH12K_WMI_SPECTRAL_NB_TONE_THR_DEFAULT 12 4786 #define ATH12K_WMI_SPECTRAL_STR_BIN_THR_DEFAULT 8 4787 #define ATH12K_WMI_SPECTRAL_WB_RPT_MODE_DEFAULT 0 4788 #define ATH12K_WMI_SPECTRAL_RSSI_RPT_MODE_DEFAULT 0 4789 #define ATH12K_WMI_SPECTRAL_RSSI_THR_DEFAULT 0xf0 4790 #define ATH12K_WMI_SPECTRAL_PWR_FORMAT_DEFAULT 0 4791 #define ATH12K_WMI_SPECTRAL_RPT_MODE_DEFAULT 2 4792 #define ATH12K_WMI_SPECTRAL_BIN_SCALE_DEFAULT 1 4793 #define ATH12K_WMI_SPECTRAL_DBM_ADJ_DEFAULT 1 4794 #define ATH12K_WMI_SPECTRAL_CHN_MASK_DEFAULT 1 4795 4796 struct ath12k_wmi_vdev_spectral_conf_arg { 4797 u32 vdev_id; 4798 u32 scan_count; 4799 u32 scan_period; 4800 u32 scan_priority; 4801 u32 scan_fft_size; 4802 u32 scan_gc_ena; 4803 u32 scan_restart_ena; 4804 u32 scan_noise_floor_ref; 4805 u32 scan_init_delay; 4806 u32 scan_nb_tone_thr; 4807 u32 scan_str_bin_thr; 4808 u32 scan_wb_rpt_mode; 4809 u32 scan_rssi_rpt_mode; 4810 u32 scan_rssi_thr; 4811 u32 scan_pwr_format; 4812 u32 scan_rpt_mode; 4813 u32 scan_bin_scale; 4814 u32 scan_dbm_adj; 4815 u32 scan_chn_mask; 4816 }; 4817 4818 struct ath12k_wmi_vdev_spectral_conf_cmd { 4819 __le32 tlv_header; 4820 __le32 vdev_id; 4821 __le32 scan_count; 4822 __le32 scan_period; 4823 __le32 scan_priority; 4824 __le32 scan_fft_size; 4825 __le32 scan_gc_ena; 4826 __le32 scan_restart_ena; 4827 __le32 scan_noise_floor_ref; 4828 __le32 scan_init_delay; 4829 __le32 scan_nb_tone_thr; 4830 __le32 scan_str_bin_thr; 4831 __le32 scan_wb_rpt_mode; 4832 __le32 scan_rssi_rpt_mode; 4833 __le32 scan_rssi_thr; 4834 __le32 scan_pwr_format; 4835 __le32 scan_rpt_mode; 4836 __le32 scan_bin_scale; 4837 __le32 scan_dbm_adj; 4838 __le32 scan_chn_mask; 4839 } __packed; 4840 4841 #define ATH12K_WMI_SPECTRAL_TRIGGER_CMD_TRIGGER 1 4842 #define ATH12K_WMI_SPECTRAL_TRIGGER_CMD_CLEAR 2 4843 #define ATH12K_WMI_SPECTRAL_ENABLE_CMD_ENABLE 1 4844 #define ATH12K_WMI_SPECTRAL_ENABLE_CMD_DISABLE 2 4845 4846 struct ath12k_wmi_vdev_spectral_enable_cmd { 4847 __le32 tlv_header; 4848 __le32 vdev_id; 4849 __le32 trigger_cmd; 4850 __le32 enable_cmd; 4851 } __packed; 4852 4853 struct ath12k_wmi_pdev_dma_ring_cfg_arg { 4854 u32 tlv_header; 4855 u32 pdev_id; 4856 u32 module_id; 4857 u32 base_paddr_lo; 4858 u32 base_paddr_hi; 4859 u32 head_idx_paddr_lo; 4860 u32 head_idx_paddr_hi; 4861 u32 tail_idx_paddr_lo; 4862 u32 tail_idx_paddr_hi; 4863 u32 num_elems; 4864 u32 buf_size; 4865 u32 num_resp_per_event; 4866 u32 event_timeout_ms; 4867 }; 4868 4869 struct ath12k_wmi_pdev_dma_ring_cfg_req_cmd { 4870 __le32 tlv_header; 4871 __le32 pdev_id; 4872 __le32 module_id; /* see enum wmi_direct_buffer_module */ 4873 __le32 base_paddr_lo; 4874 __le32 base_paddr_hi; 4875 __le32 head_idx_paddr_lo; 4876 __le32 head_idx_paddr_hi; 4877 __le32 tail_idx_paddr_lo; 4878 __le32 tail_idx_paddr_hi; 4879 __le32 num_elems; /* Number of elems in the ring */ 4880 __le32 buf_size; /* size of allocated buffer in bytes */ 4881 4882 /* Number of wmi_dma_buf_release_entry packed together */ 4883 __le32 num_resp_per_event; 4884 4885 /* Target should timeout and send whatever resp 4886 * it has if this time expires, units in milliseconds 4887 */ 4888 __le32 event_timeout_ms; 4889 } __packed; 4890 4891 struct ath12k_wmi_dma_buf_release_fixed_params { 4892 __le32 pdev_id; 4893 __le32 module_id; 4894 __le32 num_buf_release_entry; 4895 __le32 num_meta_data_entry; 4896 } __packed; 4897 4898 struct ath12k_wmi_dma_buf_release_entry_params { 4899 __le32 tlv_header; 4900 __le32 paddr_lo; 4901 4902 /* Bits 11:0: address of data 4903 * Bits 31:12: host context data 4904 */ 4905 __le32 paddr_hi; 4906 } __packed; 4907 4908 #define WMI_SPECTRAL_META_INFO1_FREQ1 GENMASK(15, 0) 4909 #define WMI_SPECTRAL_META_INFO1_FREQ2 GENMASK(31, 16) 4910 4911 #define WMI_SPECTRAL_META_INFO2_CHN_WIDTH GENMASK(7, 0) 4912 4913 struct ath12k_wmi_dma_buf_release_meta_data_params { 4914 __le32 tlv_header; 4915 a_sle32 noise_floor[WMI_MAX_CHAINS]; 4916 __le32 reset_delay; 4917 __le32 freq1; 4918 __le32 freq2; 4919 __le32 ch_width; 4920 } __packed; 4921 4922 enum wmi_fils_discovery_cmd_type { 4923 WMI_FILS_DISCOVERY_CMD, 4924 WMI_UNSOL_BCAST_PROBE_RESP, 4925 }; 4926 4927 struct wmi_fils_discovery_cmd { 4928 __le32 tlv_header; 4929 __le32 vdev_id; 4930 __le32 interval; 4931 __le32 config; /* enum wmi_fils_discovery_cmd_type */ 4932 } __packed; 4933 4934 struct wmi_fils_discovery_tmpl_cmd { 4935 __le32 tlv_header; 4936 __le32 vdev_id; 4937 __le32 buf_len; 4938 } __packed; 4939 4940 struct wmi_probe_tmpl_cmd { 4941 __le32 tlv_header; 4942 __le32 vdev_id; 4943 __le32 buf_len; 4944 } __packed; 4945 4946 #define MAX_RADIOS 2 4947 4948 #define WMI_MLO_CMD_TIMEOUT_HZ (5 * HZ) 4949 #define WMI_SERVICE_READY_TIMEOUT_HZ (5 * HZ) 4950 #define WMI_SEND_TIMEOUT_HZ (3 * HZ) 4951 4952 struct ath12k_wmi_pdev { 4953 struct ath12k_wmi_base *wmi_ab; 4954 enum ath12k_htc_ep_id eid; 4955 u32 rx_decap_mode; 4956 }; 4957 4958 struct ath12k_wmi_base { 4959 struct ath12k_base *ab; 4960 struct ath12k_wmi_pdev wmi[MAX_RADIOS]; 4961 enum ath12k_htc_ep_id wmi_endpoint_id[MAX_RADIOS]; 4962 u32 max_msg_len[MAX_RADIOS]; 4963 4964 struct completion service_ready; 4965 struct completion unified_ready; 4966 DECLARE_BITMAP(svc_map, WMI_MAX_EXT2_SERVICE); 4967 wait_queue_head_t tx_credits_wq; 4968 u32 num_mem_chunks; 4969 u32 rx_decap_mode; 4970 struct ath12k_wmi_host_mem_chunk_arg mem_chunks[WMI_MAX_MEM_REQS]; 4971 4972 enum wmi_host_hw_mode_config_type preferred_hw_mode; 4973 4974 struct ath12k_wmi_target_cap_arg *targ_cap; 4975 }; 4976 4977 struct wmi_pdev_set_bios_interface_cmd { 4978 __le32 tlv_header; 4979 __le32 pdev_id; 4980 __le32 param_type_id; 4981 __le32 length; 4982 } __packed; 4983 4984 enum wmi_bios_param_type { 4985 WMI_BIOS_PARAM_CCA_THRESHOLD_TYPE = 0, 4986 WMI_BIOS_PARAM_TAS_CONFIG_TYPE = 1, 4987 WMI_BIOS_PARAM_TAS_DATA_TYPE = 2, 4988 4989 /* bandedge control power */ 4990 WMI_BIOS_PARAM_TYPE_BANDEDGE = 3, 4991 4992 WMI_BIOS_PARAM_TYPE_MAX, 4993 }; 4994 4995 struct wmi_pdev_set_bios_sar_table_cmd { 4996 __le32 tlv_header; 4997 __le32 pdev_id; 4998 __le32 sar_len; 4999 __le32 dbs_backoff_len; 5000 } __packed; 5001 5002 struct wmi_pdev_set_bios_geo_table_cmd { 5003 __le32 tlv_header; 5004 __le32 pdev_id; 5005 __le32 geo_len; 5006 } __packed; 5007 5008 #define ATH12K_FW_STATS_BUF_SIZE (1024 * 1024) 5009 5010 enum wmi_sys_cap_info_flags { 5011 WMI_SYS_CAP_INFO_RXTX_LED = BIT(0), 5012 WMI_SYS_CAP_INFO_RFKILL = BIT(1), 5013 }; 5014 5015 #define WMI_RFKILL_CFG_GPIO_PIN_NUM GENMASK(5, 0) 5016 #define WMI_RFKILL_CFG_RADIO_LEVEL BIT(6) 5017 #define WMI_RFKILL_CFG_PIN_AS_GPIO GENMASK(10, 7) 5018 5019 enum wmi_rfkill_enable_radio { 5020 WMI_RFKILL_ENABLE_RADIO_ON = 0, 5021 WMI_RFKILL_ENABLE_RADIO_OFF = 1, 5022 }; 5023 5024 enum wmi_rfkill_radio_state { 5025 WMI_RFKILL_RADIO_STATE_OFF = 1, 5026 WMI_RFKILL_RADIO_STATE_ON = 2, 5027 }; 5028 5029 struct wmi_rfkill_state_change_event { 5030 __le32 gpio_pin_num; 5031 __le32 int_type; 5032 __le32 radio_state; 5033 } __packed; 5034 5035 struct wmi_twt_enable_event { 5036 __le32 pdev_id; 5037 __le32 status; 5038 } __packed; 5039 5040 struct wmi_twt_disable_event { 5041 __le32 pdev_id; 5042 __le32 status; 5043 } __packed; 5044 5045 struct wmi_mlo_setup_cmd { 5046 __le32 tlv_header; 5047 __le32 mld_group_id; 5048 __le32 pdev_id; 5049 } __packed; 5050 5051 struct wmi_mlo_setup_arg { 5052 __le32 group_id; 5053 u8 num_partner_links; 5054 u8 *partner_link_id; 5055 }; 5056 5057 struct wmi_mlo_ready_cmd { 5058 __le32 tlv_header; 5059 __le32 pdev_id; 5060 } __packed; 5061 5062 enum wmi_mlo_tear_down_reason_code_type { 5063 WMI_MLO_TEARDOWN_SSR_REASON, 5064 }; 5065 5066 struct wmi_mlo_teardown_cmd { 5067 __le32 tlv_header; 5068 __le32 pdev_id; 5069 __le32 reason_code; 5070 } __packed; 5071 5072 struct wmi_mlo_setup_complete_event { 5073 __le32 pdev_id; 5074 __le32 status; 5075 } __packed; 5076 5077 struct wmi_mlo_teardown_complete_event { 5078 __le32 pdev_id; 5079 __le32 status; 5080 } __packed; 5081 5082 /* WOW structures */ 5083 enum wmi_wow_wakeup_event { 5084 WOW_BMISS_EVENT = 0, 5085 WOW_BETTER_AP_EVENT, 5086 WOW_DEAUTH_RECVD_EVENT, 5087 WOW_MAGIC_PKT_RECVD_EVENT, 5088 WOW_GTK_ERR_EVENT, 5089 WOW_FOURWAY_HSHAKE_EVENT, 5090 WOW_EAPOL_RECVD_EVENT, 5091 WOW_NLO_DETECTED_EVENT, 5092 WOW_DISASSOC_RECVD_EVENT, 5093 WOW_PATTERN_MATCH_EVENT, 5094 WOW_CSA_IE_EVENT, 5095 WOW_PROBE_REQ_WPS_IE_EVENT, 5096 WOW_AUTH_REQ_EVENT, 5097 WOW_ASSOC_REQ_EVENT, 5098 WOW_HTT_EVENT, 5099 WOW_RA_MATCH_EVENT, 5100 WOW_HOST_AUTO_SHUTDOWN_EVENT, 5101 WOW_IOAC_MAGIC_EVENT, 5102 WOW_IOAC_SHORT_EVENT, 5103 WOW_IOAC_EXTEND_EVENT, 5104 WOW_IOAC_TIMER_EVENT, 5105 WOW_DFS_PHYERR_RADAR_EVENT, 5106 WOW_BEACON_EVENT, 5107 WOW_CLIENT_KICKOUT_EVENT, 5108 WOW_EVENT_MAX, 5109 }; 5110 5111 enum wmi_wow_interface_cfg { 5112 WOW_IFACE_PAUSE_ENABLED, 5113 WOW_IFACE_PAUSE_DISABLED 5114 }; 5115 5116 #define C2S(x) case x: return #x 5117 5118 static inline const char *wow_wakeup_event(enum wmi_wow_wakeup_event ev) 5119 { 5120 switch (ev) { 5121 C2S(WOW_BMISS_EVENT); 5122 C2S(WOW_BETTER_AP_EVENT); 5123 C2S(WOW_DEAUTH_RECVD_EVENT); 5124 C2S(WOW_MAGIC_PKT_RECVD_EVENT); 5125 C2S(WOW_GTK_ERR_EVENT); 5126 C2S(WOW_FOURWAY_HSHAKE_EVENT); 5127 C2S(WOW_EAPOL_RECVD_EVENT); 5128 C2S(WOW_NLO_DETECTED_EVENT); 5129 C2S(WOW_DISASSOC_RECVD_EVENT); 5130 C2S(WOW_PATTERN_MATCH_EVENT); 5131 C2S(WOW_CSA_IE_EVENT); 5132 C2S(WOW_PROBE_REQ_WPS_IE_EVENT); 5133 C2S(WOW_AUTH_REQ_EVENT); 5134 C2S(WOW_ASSOC_REQ_EVENT); 5135 C2S(WOW_HTT_EVENT); 5136 C2S(WOW_RA_MATCH_EVENT); 5137 C2S(WOW_HOST_AUTO_SHUTDOWN_EVENT); 5138 C2S(WOW_IOAC_MAGIC_EVENT); 5139 C2S(WOW_IOAC_SHORT_EVENT); 5140 C2S(WOW_IOAC_EXTEND_EVENT); 5141 C2S(WOW_IOAC_TIMER_EVENT); 5142 C2S(WOW_DFS_PHYERR_RADAR_EVENT); 5143 C2S(WOW_BEACON_EVENT); 5144 C2S(WOW_CLIENT_KICKOUT_EVENT); 5145 C2S(WOW_EVENT_MAX); 5146 default: 5147 return NULL; 5148 } 5149 } 5150 5151 enum wmi_wow_wake_reason { 5152 WOW_REASON_UNSPECIFIED = -1, 5153 WOW_REASON_NLOD = 0, 5154 WOW_REASON_AP_ASSOC_LOST, 5155 WOW_REASON_LOW_RSSI, 5156 WOW_REASON_DEAUTH_RECVD, 5157 WOW_REASON_DISASSOC_RECVD, 5158 WOW_REASON_GTK_HS_ERR, 5159 WOW_REASON_EAP_REQ, 5160 WOW_REASON_FOURWAY_HS_RECV, 5161 WOW_REASON_TIMER_INTR_RECV, 5162 WOW_REASON_PATTERN_MATCH_FOUND, 5163 WOW_REASON_RECV_MAGIC_PATTERN, 5164 WOW_REASON_P2P_DISC, 5165 WOW_REASON_WLAN_HB, 5166 WOW_REASON_CSA_EVENT, 5167 WOW_REASON_PROBE_REQ_WPS_IE_RECV, 5168 WOW_REASON_AUTH_REQ_RECV, 5169 WOW_REASON_ASSOC_REQ_RECV, 5170 WOW_REASON_HTT_EVENT, 5171 WOW_REASON_RA_MATCH, 5172 WOW_REASON_HOST_AUTO_SHUTDOWN, 5173 WOW_REASON_IOAC_MAGIC_EVENT, 5174 WOW_REASON_IOAC_SHORT_EVENT, 5175 WOW_REASON_IOAC_EXTEND_EVENT, 5176 WOW_REASON_IOAC_TIMER_EVENT, 5177 WOW_REASON_ROAM_HO, 5178 WOW_REASON_DFS_PHYERR_RADADR_EVENT, 5179 WOW_REASON_BEACON_RECV, 5180 WOW_REASON_CLIENT_KICKOUT_EVENT, 5181 WOW_REASON_PAGE_FAULT = 0x3a, 5182 WOW_REASON_DEBUG_TEST = 0xFF, 5183 }; 5184 5185 static inline const char *wow_reason(enum wmi_wow_wake_reason reason) 5186 { 5187 switch (reason) { 5188 C2S(WOW_REASON_UNSPECIFIED); 5189 C2S(WOW_REASON_NLOD); 5190 C2S(WOW_REASON_AP_ASSOC_LOST); 5191 C2S(WOW_REASON_LOW_RSSI); 5192 C2S(WOW_REASON_DEAUTH_RECVD); 5193 C2S(WOW_REASON_DISASSOC_RECVD); 5194 C2S(WOW_REASON_GTK_HS_ERR); 5195 C2S(WOW_REASON_EAP_REQ); 5196 C2S(WOW_REASON_FOURWAY_HS_RECV); 5197 C2S(WOW_REASON_TIMER_INTR_RECV); 5198 C2S(WOW_REASON_PATTERN_MATCH_FOUND); 5199 C2S(WOW_REASON_RECV_MAGIC_PATTERN); 5200 C2S(WOW_REASON_P2P_DISC); 5201 C2S(WOW_REASON_WLAN_HB); 5202 C2S(WOW_REASON_CSA_EVENT); 5203 C2S(WOW_REASON_PROBE_REQ_WPS_IE_RECV); 5204 C2S(WOW_REASON_AUTH_REQ_RECV); 5205 C2S(WOW_REASON_ASSOC_REQ_RECV); 5206 C2S(WOW_REASON_HTT_EVENT); 5207 C2S(WOW_REASON_RA_MATCH); 5208 C2S(WOW_REASON_HOST_AUTO_SHUTDOWN); 5209 C2S(WOW_REASON_IOAC_MAGIC_EVENT); 5210 C2S(WOW_REASON_IOAC_SHORT_EVENT); 5211 C2S(WOW_REASON_IOAC_EXTEND_EVENT); 5212 C2S(WOW_REASON_IOAC_TIMER_EVENT); 5213 C2S(WOW_REASON_ROAM_HO); 5214 C2S(WOW_REASON_DFS_PHYERR_RADADR_EVENT); 5215 C2S(WOW_REASON_BEACON_RECV); 5216 C2S(WOW_REASON_CLIENT_KICKOUT_EVENT); 5217 C2S(WOW_REASON_PAGE_FAULT); 5218 C2S(WOW_REASON_DEBUG_TEST); 5219 default: 5220 return NULL; 5221 } 5222 } 5223 5224 #undef C2S 5225 5226 #define WOW_DEFAULT_BITMAP_PATTERN_SIZE 148 5227 #define WOW_DEFAULT_BITMASK_SIZE 148 5228 5229 #define WOW_MIN_PATTERN_SIZE 1 5230 #define WOW_MAX_PATTERN_SIZE 148 5231 #define WOW_MAX_PKT_OFFSET 128 5232 #define WOW_HDR_LEN (sizeof(struct ieee80211_hdr_3addr) + \ 5233 sizeof(struct rfc1042_hdr)) 5234 #define WOW_MAX_REDUCE (WOW_HDR_LEN - sizeof(struct ethhdr) - \ 5235 offsetof(struct ieee80211_hdr_3addr, addr1)) 5236 5237 struct wmi_wow_bitmap_pattern_params { 5238 __le32 tlv_header; 5239 u8 patternbuf[WOW_DEFAULT_BITMAP_PATTERN_SIZE]; 5240 u8 bitmaskbuf[WOW_DEFAULT_BITMASK_SIZE]; 5241 __le32 pattern_offset; 5242 __le32 pattern_len; 5243 __le32 bitmask_len; 5244 __le32 pattern_id; 5245 } __packed; 5246 5247 struct wmi_wow_add_pattern_cmd { 5248 __le32 tlv_header; 5249 __le32 vdev_id; 5250 __le32 pattern_id; 5251 __le32 pattern_type; 5252 } __packed; 5253 5254 struct wmi_wow_del_pattern_cmd { 5255 __le32 tlv_header; 5256 __le32 vdev_id; 5257 __le32 pattern_id; 5258 __le32 pattern_type; 5259 } __packed; 5260 5261 enum wmi_tlv_pattern_type { 5262 WOW_PATTERN_MIN = 0, 5263 WOW_BITMAP_PATTERN = WOW_PATTERN_MIN, 5264 WOW_IPV4_SYNC_PATTERN, 5265 WOW_IPV6_SYNC_PATTERN, 5266 WOW_WILD_CARD_PATTERN, 5267 WOW_TIMER_PATTERN, 5268 WOW_MAGIC_PATTERN, 5269 WOW_IPV6_RA_PATTERN, 5270 WOW_IOAC_PKT_PATTERN, 5271 WOW_IOAC_TMR_PATTERN, 5272 WOW_PATTERN_MAX 5273 }; 5274 5275 struct wmi_wow_add_del_event_cmd { 5276 __le32 tlv_header; 5277 __le32 vdev_id; 5278 __le32 is_add; 5279 __le32 event_bitmap; 5280 } __packed; 5281 5282 struct wmi_wow_enable_cmd { 5283 __le32 tlv_header; 5284 __le32 enable; 5285 __le32 pause_iface_config; 5286 __le32 flags; 5287 } __packed; 5288 5289 struct wmi_wow_host_wakeup_cmd { 5290 __le32 tlv_header; 5291 __le32 reserved; 5292 } __packed; 5293 5294 struct wmi_wow_ev_param { 5295 __le32 vdev_id; 5296 __le32 flag; 5297 __le32 wake_reason; 5298 __le32 data_len; 5299 } __packed; 5300 5301 struct wmi_wow_ev_pg_fault_param { 5302 __le32 len; 5303 u8 data[]; 5304 } __packed; 5305 5306 struct wmi_wow_ev_arg { 5307 enum wmi_wow_wake_reason wake_reason; 5308 }; 5309 5310 #define WMI_PNO_MAX_SCHED_SCAN_PLANS 2 5311 #define WMI_PNO_MAX_SCHED_SCAN_PLAN_INT 7200 5312 #define WMI_PNO_MAX_SCHED_SCAN_PLAN_ITRNS 100 5313 #define WMI_PNO_MAX_NETW_CHANNELS 26 5314 #define WMI_PNO_MAX_NETW_CHANNELS_EX 60 5315 #define WMI_PNO_MAX_SUPP_NETWORKS WLAN_SCAN_PARAMS_MAX_SSID 5316 #define WMI_PNO_MAX_IE_LENGTH WLAN_SCAN_PARAMS_MAX_IE_LEN 5317 5318 /* size based of dot11 declaration without extra IEs as we will not carry those for PNO */ 5319 #define WMI_PNO_MAX_PB_REQ_SIZE 450 5320 5321 #define WMI_PNO_24GHZ_DEFAULT_CH 1 5322 #define WMI_PNO_5GHZ_DEFAULT_CH 36 5323 5324 #define WMI_ACTIVE_MAX_CHANNEL_TIME 40 5325 #define WMI_PASSIVE_MAX_CHANNEL_TIME 110 5326 5327 /* SSID broadcast type */ 5328 enum wmi_ssid_bcast_type { 5329 BCAST_UNKNOWN = 0, 5330 BCAST_NORMAL = 1, 5331 BCAST_HIDDEN = 2, 5332 }; 5333 5334 #define WMI_NLO_MAX_SSIDS 16 5335 #define WMI_NLO_MAX_CHAN 48 5336 5337 #define WMI_NLO_CONFIG_STOP BIT(0) 5338 #define WMI_NLO_CONFIG_START BIT(1) 5339 #define WMI_NLO_CONFIG_RESET BIT(2) 5340 #define WMI_NLO_CONFIG_SLOW_SCAN BIT(4) 5341 #define WMI_NLO_CONFIG_FAST_SCAN BIT(5) 5342 #define WMI_NLO_CONFIG_SSID_HIDE_EN BIT(6) 5343 5344 /* This bit is used to indicate if EPNO or supplicant PNO is enabled. 5345 * Only one of them can be enabled at a given time 5346 */ 5347 #define WMI_NLO_CONFIG_ENLO BIT(7) 5348 #define WMI_NLO_CONFIG_SCAN_PASSIVE BIT(8) 5349 #define WMI_NLO_CONFIG_ENLO_RESET BIT(9) 5350 #define WMI_NLO_CONFIG_SPOOFED_MAC_IN_PROBE_REQ BIT(10) 5351 #define WMI_NLO_CONFIG_RANDOM_SEQ_NO_IN_PROBE_REQ BIT(11) 5352 #define WMI_NLO_CONFIG_ENABLE_IE_WHITELIST_IN_PROBE_REQ BIT(12) 5353 #define WMI_NLO_CONFIG_ENABLE_CNLO_RSSI_CONFIG BIT(13) 5354 5355 struct wmi_nlo_ssid_params { 5356 __le32 valid; 5357 struct ath12k_wmi_ssid_params ssid; 5358 } __packed; 5359 5360 struct wmi_nlo_enc_params { 5361 __le32 valid; 5362 __le32 enc_type; 5363 } __packed; 5364 5365 struct wmi_nlo_auth_params { 5366 __le32 valid; 5367 __le32 auth_type; 5368 } __packed; 5369 5370 struct wmi_nlo_bcast_nw_params { 5371 __le32 valid; 5372 __le32 bcast_nw_type; 5373 } __packed; 5374 5375 struct wmi_nlo_rssi_params { 5376 __le32 valid; 5377 __le32 rssi; 5378 } __packed; 5379 5380 struct nlo_configured_params { 5381 /* TLV tag and len;*/ 5382 __le32 tlv_header; 5383 struct wmi_nlo_ssid_params ssid; 5384 struct wmi_nlo_enc_params enc_type; 5385 struct wmi_nlo_auth_params auth_type; 5386 struct wmi_nlo_rssi_params rssi_cond; 5387 5388 /* indicates if the SSID is hidden or not */ 5389 struct wmi_nlo_bcast_nw_params bcast_nw_type; 5390 } __packed; 5391 5392 struct wmi_network_type_arg { 5393 struct cfg80211_ssid ssid; 5394 u32 authentication; 5395 u32 encryption; 5396 u32 bcast_nw_type; 5397 u8 channel_count; 5398 u16 channels[WMI_PNO_MAX_NETW_CHANNELS_EX]; 5399 s32 rssi_threshold; 5400 }; 5401 5402 struct wmi_pno_scan_req_arg { 5403 u8 enable; 5404 u8 vdev_id; 5405 u8 uc_networks_count; 5406 struct wmi_network_type_arg a_networks[WMI_PNO_MAX_SUPP_NETWORKS]; 5407 u32 fast_scan_period; 5408 u32 slow_scan_period; 5409 u8 fast_scan_max_cycles; 5410 5411 bool do_passive_scan; 5412 5413 u32 delay_start_time; 5414 u32 active_min_time; 5415 u32 active_max_time; 5416 u32 passive_min_time; 5417 u32 passive_max_time; 5418 5419 /* mac address randomization attributes */ 5420 u32 enable_pno_scan_randomization; 5421 u8 mac_addr[ETH_ALEN]; 5422 u8 mac_addr_mask[ETH_ALEN]; 5423 }; 5424 5425 struct wmi_wow_nlo_config_cmd { 5426 __le32 tlv_header; 5427 __le32 flags; 5428 __le32 vdev_id; 5429 __le32 fast_scan_max_cycles; 5430 __le32 active_dwell_time; 5431 __le32 passive_dwell_time; 5432 __le32 probe_bundle_size; 5433 5434 /* ART = IRT */ 5435 __le32 rest_time; 5436 5437 /* max value that can be reached after scan_backoff_multiplier */ 5438 __le32 max_rest_time; 5439 5440 __le32 scan_backoff_multiplier; 5441 __le32 fast_scan_period; 5442 5443 /* specific to windows */ 5444 __le32 slow_scan_period; 5445 5446 __le32 no_of_ssids; 5447 5448 __le32 num_of_channels; 5449 5450 /* NLO scan start delay time in milliseconds */ 5451 __le32 delay_start_time; 5452 5453 /* MAC Address to use in Probe Req as SA */ 5454 struct ath12k_wmi_mac_addr_params mac_addr; 5455 5456 /* Mask on which MAC has to be randomized */ 5457 struct ath12k_wmi_mac_addr_params mac_mask; 5458 5459 /* IE bitmap to use in Probe Req */ 5460 __le32 ie_bitmap[8]; 5461 5462 /* Number of vendor OUIs. In the TLV vendor_oui[] */ 5463 __le32 num_vendor_oui; 5464 5465 /* Number of connected NLO band preferences */ 5466 __le32 num_cnlo_band_pref; 5467 5468 /* The TLVs will follow. 5469 * nlo_configured_params nlo_list[]; 5470 * u32 channel_list[num_of_channels]; 5471 */ 5472 } __packed; 5473 5474 /* Definition of HW data filtering */ 5475 enum hw_data_filter_type { 5476 WMI_HW_DATA_FILTER_DROP_NON_ARP_BC = BIT(0), 5477 WMI_HW_DATA_FILTER_DROP_NON_ICMPV6_MC = BIT(1), 5478 }; 5479 5480 struct wmi_hw_data_filter_cmd { 5481 __le32 tlv_header; 5482 __le32 vdev_id; 5483 __le32 enable; 5484 __le32 hw_filter_bitmap; 5485 } __packed; 5486 5487 struct wmi_hw_data_filter_arg { 5488 u32 vdev_id; 5489 bool enable; 5490 u32 hw_filter_bitmap; 5491 }; 5492 5493 #define WMI_IPV6_UC_TYPE 0 5494 #define WMI_IPV6_AC_TYPE 1 5495 5496 #define WMI_IPV6_MAX_COUNT 16 5497 #define WMI_IPV4_MAX_COUNT 2 5498 5499 struct wmi_arp_ns_offload_arg { 5500 u8 ipv4_addr[WMI_IPV4_MAX_COUNT][4]; 5501 u32 ipv4_count; 5502 u32 ipv6_count; 5503 u8 ipv6_addr[WMI_IPV6_MAX_COUNT][16]; 5504 u8 self_ipv6_addr[WMI_IPV6_MAX_COUNT][16]; 5505 u8 ipv6_type[WMI_IPV6_MAX_COUNT]; 5506 bool ipv6_valid[WMI_IPV6_MAX_COUNT]; 5507 u8 mac_addr[ETH_ALEN]; 5508 }; 5509 5510 #define WMI_MAX_NS_OFFLOADS 2 5511 #define WMI_MAX_ARP_OFFLOADS 2 5512 5513 #define WMI_ARPOL_FLAGS_VALID BIT(0) 5514 #define WMI_ARPOL_FLAGS_MAC_VALID BIT(1) 5515 #define WMI_ARPOL_FLAGS_REMOTE_IP_VALID BIT(2) 5516 5517 struct wmi_arp_offload_params { 5518 __le32 tlv_header; 5519 __le32 flags; 5520 u8 target_ipaddr[4]; 5521 u8 remote_ipaddr[4]; 5522 struct ath12k_wmi_mac_addr_params target_mac; 5523 } __packed; 5524 5525 #define WMI_NSOL_FLAGS_VALID BIT(0) 5526 #define WMI_NSOL_FLAGS_MAC_VALID BIT(1) 5527 #define WMI_NSOL_FLAGS_REMOTE_IP_VALID BIT(2) 5528 #define WMI_NSOL_FLAGS_IS_IPV6_ANYCAST BIT(3) 5529 5530 #define WMI_NSOL_MAX_TARGET_IPS 2 5531 5532 struct wmi_ns_offload_params { 5533 __le32 tlv_header; 5534 __le32 flags; 5535 u8 target_ipaddr[WMI_NSOL_MAX_TARGET_IPS][16]; 5536 u8 solicitation_ipaddr[16]; 5537 u8 remote_ipaddr[16]; 5538 struct ath12k_wmi_mac_addr_params target_mac; 5539 } __packed; 5540 5541 struct wmi_set_arp_ns_offload_cmd { 5542 __le32 tlv_header; 5543 __le32 flags; 5544 __le32 vdev_id; 5545 __le32 num_ns_ext_tuples; 5546 /* The TLVs follow: 5547 * wmi_ns_offload_params ns[WMI_MAX_NS_OFFLOADS]; 5548 * wmi_arp_offload_params arp[WMI_MAX_ARP_OFFLOADS]; 5549 * wmi_ns_offload_params ns_ext[num_ns_ext_tuples]; 5550 */ 5551 } __packed; 5552 5553 #define GTK_OFFLOAD_OPCODE_MASK 0xFF000000 5554 #define GTK_OFFLOAD_ENABLE_OPCODE 0x01000000 5555 #define GTK_OFFLOAD_DISABLE_OPCODE 0x02000000 5556 #define GTK_OFFLOAD_REQUEST_STATUS_OPCODE 0x04000000 5557 5558 #define GTK_OFFLOAD_KEK_BYTES 16 5559 #define GTK_OFFLOAD_KCK_BYTES 16 5560 #define GTK_REPLAY_COUNTER_BYTES 8 5561 #define WMI_MAX_KEY_LEN 32 5562 #define IGTK_PN_SIZE 6 5563 5564 struct wmi_gtk_offload_status_event { 5565 __le32 vdev_id; 5566 __le32 flags; 5567 __le32 refresh_cnt; 5568 __le64 replay_ctr; 5569 u8 igtk_key_index; 5570 u8 igtk_key_length; 5571 u8 igtk_key_rsc[IGTK_PN_SIZE]; 5572 u8 igtk_key[WMI_MAX_KEY_LEN]; 5573 u8 gtk_key_index; 5574 u8 gtk_key_length; 5575 u8 gtk_key_rsc[GTK_REPLAY_COUNTER_BYTES]; 5576 u8 gtk_key[WMI_MAX_KEY_LEN]; 5577 } __packed; 5578 5579 struct wmi_gtk_rekey_offload_cmd { 5580 __le32 tlv_header; 5581 __le32 vdev_id; 5582 __le32 flags; 5583 u8 kek[GTK_OFFLOAD_KEK_BYTES]; 5584 u8 kck[GTK_OFFLOAD_KCK_BYTES]; 5585 u8 replay_ctr[GTK_REPLAY_COUNTER_BYTES]; 5586 } __packed; 5587 5588 struct wmi_sta_keepalive_cmd { 5589 __le32 tlv_header; 5590 __le32 vdev_id; 5591 __le32 enabled; 5592 5593 /* WMI_STA_KEEPALIVE_METHOD_ */ 5594 __le32 method; 5595 5596 /* in seconds */ 5597 __le32 interval; 5598 5599 /* following this structure is the TLV for struct 5600 * wmi_sta_keepalive_arp_resp_params 5601 */ 5602 } __packed; 5603 5604 struct wmi_sta_keepalive_arp_resp_params { 5605 __le32 tlv_header; 5606 __le32 src_ip4_addr; 5607 __le32 dest_ip4_addr; 5608 struct ath12k_wmi_mac_addr_params dest_mac_addr; 5609 } __packed; 5610 5611 struct wmi_sta_keepalive_arg { 5612 u32 vdev_id; 5613 u32 enabled; 5614 u32 method; 5615 u32 interval; 5616 u32 src_ip4_addr; 5617 u32 dest_ip4_addr; 5618 const u8 dest_mac_addr[ETH_ALEN]; 5619 }; 5620 5621 enum wmi_sta_keepalive_method { 5622 WMI_STA_KEEPALIVE_METHOD_NULL_FRAME = 1, 5623 WMI_STA_KEEPALIVE_METHOD_UNSOLICITED_ARP_RESPONSE = 2, 5624 WMI_STA_KEEPALIVE_METHOD_ETHERNET_LOOPBACK = 3, 5625 WMI_STA_KEEPALIVE_METHOD_GRATUITOUS_ARP_REQUEST = 4, 5626 WMI_STA_KEEPALIVE_METHOD_MGMT_VENDOR_ACTION = 5, 5627 }; 5628 5629 #define WMI_STA_KEEPALIVE_INTERVAL_DEFAULT 30 5630 #define WMI_STA_KEEPALIVE_INTERVAL_DISABLE 0 5631 5632 void ath12k_wmi_init_qcn9274(struct ath12k_base *ab, 5633 struct ath12k_wmi_resource_config_arg *config); 5634 void ath12k_wmi_init_wcn7850(struct ath12k_base *ab, 5635 struct ath12k_wmi_resource_config_arg *config); 5636 int ath12k_wmi_cmd_send(struct ath12k_wmi_pdev *wmi, struct sk_buff *skb, 5637 u32 cmd_id); 5638 struct sk_buff *ath12k_wmi_alloc_skb(struct ath12k_wmi_base *wmi_sc, u32 len); 5639 int ath12k_wmi_mgmt_send(struct ath12k *ar, u32 vdev_id, u32 buf_id, 5640 struct sk_buff *frame); 5641 int ath12k_wmi_p2p_go_bcn_ie(struct ath12k *ar, u32 vdev_id, 5642 const u8 *p2p_ie); 5643 int ath12k_wmi_bcn_tmpl(struct ath12k *ar, u32 vdev_id, 5644 struct ieee80211_mutable_offsets *offs, 5645 struct sk_buff *bcn, 5646 struct ath12k_wmi_bcn_tmpl_ema_arg *ema_args); 5647 int ath12k_wmi_vdev_down(struct ath12k *ar, u8 vdev_id); 5648 int ath12k_wmi_vdev_up(struct ath12k *ar, struct ath12k_wmi_vdev_up_params *params); 5649 int ath12k_wmi_vdev_stop(struct ath12k *ar, u8 vdev_id); 5650 int ath12k_wmi_vdev_start(struct ath12k *ar, struct wmi_vdev_start_req_arg *arg, 5651 bool restart); 5652 int ath12k_wmi_set_peer_param(struct ath12k *ar, const u8 *peer_addr, 5653 u32 vdev_id, u32 param_id, u32 param_val); 5654 int ath12k_wmi_pdev_set_param(struct ath12k *ar, u32 param_id, 5655 u32 param_value, u8 pdev_id); 5656 int ath12k_wmi_pdev_set_ps_mode(struct ath12k *ar, int vdev_id, u32 enable); 5657 int ath12k_wmi_wait_for_unified_ready(struct ath12k_base *ab); 5658 int ath12k_wmi_cmd_init(struct ath12k_base *ab); 5659 int ath12k_wmi_wait_for_service_ready(struct ath12k_base *ab); 5660 int ath12k_wmi_connect(struct ath12k_base *ab); 5661 int ath12k_wmi_pdev_attach(struct ath12k_base *ab, 5662 u8 pdev_id); 5663 int ath12k_wmi_attach(struct ath12k_base *ab); 5664 void ath12k_wmi_detach(struct ath12k_base *ab); 5665 int ath12k_wmi_vdev_create(struct ath12k *ar, u8 *macaddr, 5666 struct ath12k_wmi_vdev_create_arg *arg); 5667 int ath12k_wmi_send_peer_create_cmd(struct ath12k *ar, 5668 struct ath12k_wmi_peer_create_arg *arg); 5669 int ath12k_wmi_vdev_set_param_cmd(struct ath12k *ar, u32 vdev_id, 5670 u32 param_id, u32 param_value); 5671 5672 int ath12k_wmi_set_sta_ps_param(struct ath12k *ar, u32 vdev_id, 5673 u32 param, u32 param_value); 5674 int ath12k_wmi_force_fw_hang_cmd(struct ath12k *ar, u32 type, u32 delay_time_ms); 5675 int ath12k_wmi_send_peer_delete_cmd(struct ath12k *ar, 5676 const u8 *peer_addr, u8 vdev_id); 5677 int ath12k_wmi_vdev_delete(struct ath12k *ar, u8 vdev_id); 5678 void ath12k_wmi_start_scan_init(struct ath12k *ar, 5679 struct ath12k_wmi_scan_req_arg *arg); 5680 int ath12k_wmi_send_scan_start_cmd(struct ath12k *ar, 5681 struct ath12k_wmi_scan_req_arg *arg); 5682 int ath12k_wmi_send_scan_stop_cmd(struct ath12k *ar, 5683 struct ath12k_wmi_scan_cancel_arg *arg); 5684 int ath12k_wmi_send_wmm_update_cmd(struct ath12k *ar, u32 vdev_id, 5685 struct wmi_wmm_params_all_arg *param); 5686 int ath12k_wmi_pdev_suspend(struct ath12k *ar, u32 suspend_opt, 5687 u32 pdev_id); 5688 int ath12k_wmi_pdev_resume(struct ath12k *ar, u32 pdev_id); 5689 5690 int ath12k_wmi_send_peer_assoc_cmd(struct ath12k *ar, 5691 struct ath12k_wmi_peer_assoc_arg *arg); 5692 int ath12k_wmi_vdev_install_key(struct ath12k *ar, 5693 struct wmi_vdev_install_key_arg *arg); 5694 int ath12k_wmi_pdev_bss_chan_info_request(struct ath12k *ar, 5695 enum wmi_bss_chan_info_req_type type); 5696 int ath12k_wmi_send_pdev_temperature_cmd(struct ath12k *ar); 5697 int ath12k_wmi_send_peer_flush_tids_cmd(struct ath12k *ar, 5698 u8 peer_addr[ETH_ALEN], 5699 u32 peer_tid_bitmap, 5700 u8 vdev_id); 5701 int ath12k_wmi_send_set_ap_ps_param_cmd(struct ath12k *ar, u8 *peer_addr, 5702 struct ath12k_wmi_ap_ps_arg *arg); 5703 int ath12k_wmi_send_scan_chan_list_cmd(struct ath12k *ar, 5704 struct ath12k_wmi_scan_chan_list_arg *arg); 5705 int ath12k_wmi_send_dfs_phyerr_offload_enable_cmd(struct ath12k *ar, 5706 u32 pdev_id); 5707 int ath12k_wmi_addba_clear_resp(struct ath12k *ar, u32 vdev_id, const u8 *mac); 5708 int ath12k_wmi_addba_send(struct ath12k *ar, u32 vdev_id, const u8 *mac, 5709 u32 tid, u32 buf_size); 5710 int ath12k_wmi_addba_set_resp(struct ath12k *ar, u32 vdev_id, const u8 *mac, 5711 u32 tid, u32 status); 5712 int ath12k_wmi_delba_send(struct ath12k *ar, u32 vdev_id, const u8 *mac, 5713 u32 tid, u32 initiator, u32 reason); 5714 int ath12k_wmi_send_bcn_offload_control_cmd(struct ath12k *ar, 5715 u32 vdev_id, u32 bcn_ctrl_op); 5716 int ath12k_wmi_send_init_country_cmd(struct ath12k *ar, 5717 struct ath12k_wmi_init_country_arg *arg); 5718 int ath12k_wmi_peer_rx_reorder_queue_setup(struct ath12k *ar, 5719 int vdev_id, const u8 *addr, 5720 dma_addr_t paddr, u8 tid, 5721 u8 ba_window_size_valid, 5722 u32 ba_window_size); 5723 int 5724 ath12k_wmi_rx_reord_queue_remove(struct ath12k *ar, 5725 struct ath12k_wmi_rx_reorder_queue_remove_arg *arg); 5726 int ath12k_wmi_send_pdev_set_regdomain(struct ath12k *ar, 5727 struct ath12k_wmi_pdev_set_regdomain_arg *arg); 5728 int ath12k_wmi_simulate_radar(struct ath12k *ar); 5729 int ath12k_wmi_send_twt_enable_cmd(struct ath12k *ar, u32 pdev_id); 5730 int ath12k_wmi_send_twt_disable_cmd(struct ath12k *ar, u32 pdev_id); 5731 int ath12k_wmi_send_obss_spr_cmd(struct ath12k *ar, u32 vdev_id, 5732 struct ieee80211_he_obss_pd *he_obss_pd); 5733 int ath12k_wmi_obss_color_cfg_cmd(struct ath12k *ar, u32 vdev_id, 5734 u8 bss_color, u32 period, 5735 bool enable); 5736 int ath12k_wmi_send_bss_color_change_enable_cmd(struct ath12k *ar, u32 vdev_id, 5737 bool enable); 5738 int ath12k_wmi_pdev_lro_cfg(struct ath12k *ar, int pdev_id); 5739 int ath12k_wmi_pdev_dma_ring_cfg(struct ath12k *ar, 5740 struct ath12k_wmi_pdev_dma_ring_cfg_arg *arg); 5741 int ath12k_wmi_vdev_spectral_enable(struct ath12k *ar, u32 vdev_id, 5742 u32 trigger, u32 enable); 5743 int ath12k_wmi_vdev_spectral_conf(struct ath12k *ar, 5744 struct ath12k_wmi_vdev_spectral_conf_arg *arg); 5745 int ath12k_wmi_fils_discovery_tmpl(struct ath12k *ar, u32 vdev_id, 5746 struct sk_buff *tmpl); 5747 int ath12k_wmi_fils_discovery(struct ath12k *ar, u32 vdev_id, u32 interval, 5748 bool unsol_bcast_probe_resp_enabled); 5749 int ath12k_wmi_probe_resp_tmpl(struct ath12k *ar, u32 vdev_id, 5750 struct sk_buff *tmpl); 5751 int ath12k_wmi_set_hw_mode(struct ath12k_base *ab, 5752 enum wmi_host_hw_mode_config_type mode); 5753 int ath12k_wmi_set_bios_cmd(struct ath12k_base *ab, u32 param_id, 5754 const u8 *buf, size_t buf_len); 5755 int ath12k_wmi_set_bios_sar_cmd(struct ath12k_base *ab, const u8 *psar_table); 5756 int ath12k_wmi_set_bios_geo_cmd(struct ath12k_base *ab, const u8 *pgeo_table); 5757 5758 static inline u32 5759 ath12k_wmi_caps_ext_get_pdev_id(const struct ath12k_wmi_caps_ext_params *param) 5760 { 5761 return le32_get_bits(param->pdev_and_hw_link_ids, WMI_CAPS_PARAMS_PDEV_ID); 5762 } 5763 5764 static inline u32 5765 ath12k_wmi_caps_ext_get_hw_link_id(const struct ath12k_wmi_caps_ext_params *param) 5766 { 5767 return le32_get_bits(param->pdev_and_hw_link_ids, WMI_CAPS_PARAMS_HW_LINK_ID); 5768 } 5769 5770 static inline u32 5771 ath12k_wmi_mac_phy_get_pdev_id(const struct ath12k_wmi_mac_phy_caps_params *param) 5772 { 5773 return le32_get_bits(param->pdev_and_hw_link_ids, 5774 WMI_CAPS_PARAMS_PDEV_ID); 5775 } 5776 5777 static inline u32 5778 ath12k_wmi_mac_phy_get_hw_link_id(const struct ath12k_wmi_mac_phy_caps_params *param) 5779 { 5780 return le32_get_bits(param->pdev_and_hw_link_ids, 5781 WMI_CAPS_PARAMS_HW_LINK_ID); 5782 } 5783 5784 int ath12k_wmi_wow_host_wakeup_ind(struct ath12k *ar); 5785 int ath12k_wmi_wow_enable(struct ath12k *ar); 5786 int ath12k_wmi_wow_del_pattern(struct ath12k *ar, u32 vdev_id, u32 pattern_id); 5787 int ath12k_wmi_wow_add_pattern(struct ath12k *ar, u32 vdev_id, u32 pattern_id, 5788 const u8 *pattern, const u8 *mask, 5789 int pattern_len, int pattern_offset); 5790 int ath12k_wmi_wow_add_wakeup_event(struct ath12k *ar, u32 vdev_id, 5791 enum wmi_wow_wakeup_event event, 5792 u32 enable); 5793 int ath12k_wmi_wow_config_pno(struct ath12k *ar, u32 vdev_id, 5794 struct wmi_pno_scan_req_arg *pno_scan); 5795 int ath12k_wmi_hw_data_filter_cmd(struct ath12k *ar, 5796 struct wmi_hw_data_filter_arg *arg); 5797 int ath12k_wmi_arp_ns_offload(struct ath12k *ar, 5798 struct ath12k_link_vif *arvif, 5799 struct wmi_arp_ns_offload_arg *offload, 5800 bool enable); 5801 int ath12k_wmi_gtk_rekey_offload(struct ath12k *ar, 5802 struct ath12k_link_vif *arvif, bool enable); 5803 int ath12k_wmi_gtk_rekey_getinfo(struct ath12k *ar, 5804 struct ath12k_link_vif *arvif); 5805 int ath12k_wmi_sta_keepalive(struct ath12k *ar, 5806 const struct wmi_sta_keepalive_arg *arg); 5807 int ath12k_wmi_mlo_setup(struct ath12k *ar, struct wmi_mlo_setup_arg *mlo_params); 5808 int ath12k_wmi_mlo_ready(struct ath12k *ar); 5809 int ath12k_wmi_mlo_teardown(struct ath12k *ar); 5810 5811 #endif 5812