1 // SPDX-License-Identifier: BSD-3-Clause-Clear 2 /* 3 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved. 4 * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved. 5 */ 6 #include <linux/skbuff.h> 7 #include <linux/ctype.h> 8 #include <net/mac80211.h> 9 #include <net/cfg80211.h> 10 #include <linux/completion.h> 11 #include <linux/if_ether.h> 12 #include <linux/types.h> 13 #include <linux/pci.h> 14 #include <linux/uuid.h> 15 #include <linux/time.h> 16 #include <linux/of.h> 17 #include "core.h" 18 #include "debug.h" 19 #include "mac.h" 20 #include "hw.h" 21 #include "peer.h" 22 23 struct ath12k_wmi_svc_ready_parse { 24 bool wmi_svc_bitmap_done; 25 }; 26 27 struct ath12k_wmi_dma_ring_caps_parse { 28 struct ath12k_wmi_dma_ring_caps_params *dma_ring_caps; 29 u32 n_dma_ring_caps; 30 }; 31 32 struct ath12k_wmi_service_ext_arg { 33 u32 default_conc_scan_config_bits; 34 u32 default_fw_config_bits; 35 struct ath12k_wmi_ppe_threshold_arg ppet; 36 u32 he_cap_info; 37 u32 mpdu_density; 38 u32 max_bssid_rx_filters; 39 u32 num_hw_modes; 40 u32 num_phy; 41 }; 42 43 struct ath12k_wmi_svc_rdy_ext_parse { 44 struct ath12k_wmi_service_ext_arg arg; 45 const struct ath12k_wmi_soc_mac_phy_hw_mode_caps_params *hw_caps; 46 const struct ath12k_wmi_hw_mode_cap_params *hw_mode_caps; 47 u32 n_hw_mode_caps; 48 u32 tot_phy_id; 49 struct ath12k_wmi_hw_mode_cap_params pref_hw_mode_caps; 50 struct ath12k_wmi_mac_phy_caps_params *mac_phy_caps; 51 u32 n_mac_phy_caps; 52 const struct ath12k_wmi_soc_hal_reg_caps_params *soc_hal_reg_caps; 53 const struct ath12k_wmi_hal_reg_caps_ext_params *ext_hal_reg_caps; 54 u32 n_ext_hal_reg_caps; 55 struct ath12k_wmi_dma_ring_caps_parse dma_caps_parse; 56 bool hw_mode_done; 57 bool mac_phy_done; 58 bool ext_hal_reg_done; 59 bool mac_phy_chainmask_combo_done; 60 bool mac_phy_chainmask_cap_done; 61 bool oem_dma_ring_cap_done; 62 bool dma_ring_cap_done; 63 }; 64 65 struct ath12k_wmi_svc_rdy_ext2_arg { 66 u32 reg_db_version; 67 u32 hw_min_max_tx_power_2ghz; 68 u32 hw_min_max_tx_power_5ghz; 69 u32 chwidth_num_peer_caps; 70 u32 preamble_puncture_bw; 71 u32 max_user_per_ppdu_ofdma; 72 u32 max_user_per_ppdu_mumimo; 73 u32 target_cap_flags; 74 u32 eht_cap_mac_info[WMI_MAX_EHTCAP_MAC_SIZE]; 75 u32 max_num_linkview_peers; 76 u32 max_num_msduq_supported_per_tid; 77 u32 default_num_msduq_supported_per_tid; 78 }; 79 80 struct ath12k_wmi_svc_rdy_ext2_parse { 81 struct ath12k_wmi_svc_rdy_ext2_arg arg; 82 struct ath12k_wmi_dma_ring_caps_parse dma_caps_parse; 83 bool dma_ring_cap_done; 84 bool spectral_bin_scaling_done; 85 bool mac_phy_caps_ext_done; 86 }; 87 88 struct ath12k_wmi_rdy_parse { 89 u32 num_extra_mac_addr; 90 }; 91 92 struct ath12k_wmi_dma_buf_release_arg { 93 struct ath12k_wmi_dma_buf_release_fixed_params fixed; 94 const struct ath12k_wmi_dma_buf_release_entry_params *buf_entry; 95 const struct ath12k_wmi_dma_buf_release_meta_data_params *meta_data; 96 u32 num_buf_entry; 97 u32 num_meta; 98 bool buf_entry_done; 99 bool meta_data_done; 100 }; 101 102 struct ath12k_wmi_tlv_policy { 103 size_t min_len; 104 }; 105 106 struct wmi_tlv_mgmt_rx_parse { 107 const struct ath12k_wmi_mgmt_rx_params *fixed; 108 const u8 *frame_buf; 109 bool frame_buf_done; 110 }; 111 112 static const struct ath12k_wmi_tlv_policy ath12k_wmi_tlv_policies[] = { 113 [WMI_TAG_ARRAY_BYTE] = { .min_len = 0 }, 114 [WMI_TAG_ARRAY_UINT32] = { .min_len = 0 }, 115 [WMI_TAG_SERVICE_READY_EVENT] = { 116 .min_len = sizeof(struct wmi_service_ready_event) }, 117 [WMI_TAG_SERVICE_READY_EXT_EVENT] = { 118 .min_len = sizeof(struct wmi_service_ready_ext_event) }, 119 [WMI_TAG_SOC_MAC_PHY_HW_MODE_CAPS] = { 120 .min_len = sizeof(struct ath12k_wmi_soc_mac_phy_hw_mode_caps_params) }, 121 [WMI_TAG_SOC_HAL_REG_CAPABILITIES] = { 122 .min_len = sizeof(struct ath12k_wmi_soc_hal_reg_caps_params) }, 123 [WMI_TAG_VDEV_START_RESPONSE_EVENT] = { 124 .min_len = sizeof(struct wmi_vdev_start_resp_event) }, 125 [WMI_TAG_PEER_DELETE_RESP_EVENT] = { 126 .min_len = sizeof(struct wmi_peer_delete_resp_event) }, 127 [WMI_TAG_OFFLOAD_BCN_TX_STATUS_EVENT] = { 128 .min_len = sizeof(struct wmi_bcn_tx_status_event) }, 129 [WMI_TAG_VDEV_STOPPED_EVENT] = { 130 .min_len = sizeof(struct wmi_vdev_stopped_event) }, 131 [WMI_TAG_REG_CHAN_LIST_CC_EXT_EVENT] = { 132 .min_len = sizeof(struct wmi_reg_chan_list_cc_ext_event) }, 133 [WMI_TAG_MGMT_RX_HDR] = { 134 .min_len = sizeof(struct ath12k_wmi_mgmt_rx_params) }, 135 [WMI_TAG_MGMT_TX_COMPL_EVENT] = { 136 .min_len = sizeof(struct wmi_mgmt_tx_compl_event) }, 137 [WMI_TAG_SCAN_EVENT] = { 138 .min_len = sizeof(struct wmi_scan_event) }, 139 [WMI_TAG_PEER_STA_KICKOUT_EVENT] = { 140 .min_len = sizeof(struct wmi_peer_sta_kickout_event) }, 141 [WMI_TAG_ROAM_EVENT] = { 142 .min_len = sizeof(struct wmi_roam_event) }, 143 [WMI_TAG_CHAN_INFO_EVENT] = { 144 .min_len = sizeof(struct wmi_chan_info_event) }, 145 [WMI_TAG_PDEV_BSS_CHAN_INFO_EVENT] = { 146 .min_len = sizeof(struct wmi_pdev_bss_chan_info_event) }, 147 [WMI_TAG_VDEV_INSTALL_KEY_COMPLETE_EVENT] = { 148 .min_len = sizeof(struct wmi_vdev_install_key_compl_event) }, 149 [WMI_TAG_READY_EVENT] = { 150 .min_len = sizeof(struct ath12k_wmi_ready_event_min_params) }, 151 [WMI_TAG_SERVICE_AVAILABLE_EVENT] = { 152 .min_len = sizeof(struct wmi_service_available_event) }, 153 [WMI_TAG_PEER_ASSOC_CONF_EVENT] = { 154 .min_len = sizeof(struct wmi_peer_assoc_conf_event) }, 155 [WMI_TAG_PDEV_CTL_FAILSAFE_CHECK_EVENT] = { 156 .min_len = sizeof(struct wmi_pdev_ctl_failsafe_chk_event) }, 157 [WMI_TAG_HOST_SWFDA_EVENT] = { 158 .min_len = sizeof(struct wmi_fils_discovery_event) }, 159 [WMI_TAG_OFFLOAD_PRB_RSP_TX_STATUS_EVENT] = { 160 .min_len = sizeof(struct wmi_probe_resp_tx_status_event) }, 161 [WMI_TAG_VDEV_DELETE_RESP_EVENT] = { 162 .min_len = sizeof(struct wmi_vdev_delete_resp_event) }, 163 }; 164 165 static __le32 ath12k_wmi_tlv_hdr(u32 cmd, u32 len) 166 { 167 return le32_encode_bits(cmd, WMI_TLV_TAG) | 168 le32_encode_bits(len, WMI_TLV_LEN); 169 } 170 171 static __le32 ath12k_wmi_tlv_cmd_hdr(u32 cmd, u32 len) 172 { 173 return ath12k_wmi_tlv_hdr(cmd, len - TLV_HDR_SIZE); 174 } 175 176 void ath12k_wmi_init_qcn9274(struct ath12k_base *ab, 177 struct ath12k_wmi_resource_config_arg *config) 178 { 179 config->num_vdevs = ab->num_radios * TARGET_NUM_VDEVS; 180 181 if (ab->num_radios == 2) { 182 config->num_peers = TARGET_NUM_PEERS(DBS); 183 config->num_tids = TARGET_NUM_TIDS(DBS); 184 } else if (ab->num_radios == 3) { 185 config->num_peers = TARGET_NUM_PEERS(DBS_SBS); 186 config->num_tids = TARGET_NUM_TIDS(DBS_SBS); 187 } else { 188 /* Control should not reach here */ 189 config->num_peers = TARGET_NUM_PEERS(SINGLE); 190 config->num_tids = TARGET_NUM_TIDS(SINGLE); 191 } 192 config->num_offload_peers = TARGET_NUM_OFFLD_PEERS; 193 config->num_offload_reorder_buffs = TARGET_NUM_OFFLD_REORDER_BUFFS; 194 config->num_peer_keys = TARGET_NUM_PEER_KEYS; 195 config->ast_skid_limit = TARGET_AST_SKID_LIMIT; 196 config->tx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1; 197 config->rx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1; 198 config->rx_timeout_pri[0] = TARGET_RX_TIMEOUT_LO_PRI; 199 config->rx_timeout_pri[1] = TARGET_RX_TIMEOUT_LO_PRI; 200 config->rx_timeout_pri[2] = TARGET_RX_TIMEOUT_LO_PRI; 201 config->rx_timeout_pri[3] = TARGET_RX_TIMEOUT_HI_PRI; 202 203 if (test_bit(ATH12K_FLAG_RAW_MODE, &ab->dev_flags)) 204 config->rx_decap_mode = TARGET_DECAP_MODE_RAW; 205 else 206 config->rx_decap_mode = TARGET_DECAP_MODE_NATIVE_WIFI; 207 208 config->scan_max_pending_req = TARGET_SCAN_MAX_PENDING_REQS; 209 config->bmiss_offload_max_vdev = TARGET_BMISS_OFFLOAD_MAX_VDEV; 210 config->roam_offload_max_vdev = TARGET_ROAM_OFFLOAD_MAX_VDEV; 211 config->roam_offload_max_ap_profiles = TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES; 212 config->num_mcast_groups = TARGET_NUM_MCAST_GROUPS; 213 config->num_mcast_table_elems = TARGET_NUM_MCAST_TABLE_ELEMS; 214 config->mcast2ucast_mode = TARGET_MCAST2UCAST_MODE; 215 config->tx_dbg_log_size = TARGET_TX_DBG_LOG_SIZE; 216 config->num_wds_entries = TARGET_NUM_WDS_ENTRIES; 217 config->dma_burst_size = TARGET_DMA_BURST_SIZE; 218 config->rx_skip_defrag_timeout_dup_detection_check = 219 TARGET_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK; 220 config->vow_config = TARGET_VOW_CONFIG; 221 config->gtk_offload_max_vdev = TARGET_GTK_OFFLOAD_MAX_VDEV; 222 config->num_msdu_desc = TARGET_NUM_MSDU_DESC; 223 config->beacon_tx_offload_max_vdev = ab->num_radios * TARGET_MAX_BCN_OFFLD; 224 config->rx_batchmode = TARGET_RX_BATCHMODE; 225 /* Indicates host supports peer map v3 and unmap v2 support */ 226 config->peer_map_unmap_version = 0x32; 227 config->twt_ap_pdev_count = ab->num_radios; 228 config->twt_ap_sta_count = 1000; 229 } 230 231 void ath12k_wmi_init_wcn7850(struct ath12k_base *ab, 232 struct ath12k_wmi_resource_config_arg *config) 233 { 234 config->num_vdevs = 4; 235 config->num_peers = 16; 236 config->num_tids = 32; 237 238 config->num_offload_peers = 3; 239 config->num_offload_reorder_buffs = 3; 240 config->num_peer_keys = TARGET_NUM_PEER_KEYS; 241 config->ast_skid_limit = TARGET_AST_SKID_LIMIT; 242 config->tx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1; 243 config->rx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1; 244 config->rx_timeout_pri[0] = TARGET_RX_TIMEOUT_LO_PRI; 245 config->rx_timeout_pri[1] = TARGET_RX_TIMEOUT_LO_PRI; 246 config->rx_timeout_pri[2] = TARGET_RX_TIMEOUT_LO_PRI; 247 config->rx_timeout_pri[3] = TARGET_RX_TIMEOUT_HI_PRI; 248 config->rx_decap_mode = TARGET_DECAP_MODE_NATIVE_WIFI; 249 config->scan_max_pending_req = TARGET_SCAN_MAX_PENDING_REQS; 250 config->bmiss_offload_max_vdev = TARGET_BMISS_OFFLOAD_MAX_VDEV; 251 config->roam_offload_max_vdev = TARGET_ROAM_OFFLOAD_MAX_VDEV; 252 config->roam_offload_max_ap_profiles = TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES; 253 config->num_mcast_groups = 0; 254 config->num_mcast_table_elems = 0; 255 config->mcast2ucast_mode = 0; 256 config->tx_dbg_log_size = TARGET_TX_DBG_LOG_SIZE; 257 config->num_wds_entries = 0; 258 config->dma_burst_size = 0; 259 config->rx_skip_defrag_timeout_dup_detection_check = 0; 260 config->vow_config = TARGET_VOW_CONFIG; 261 config->gtk_offload_max_vdev = 2; 262 config->num_msdu_desc = 0x400; 263 config->beacon_tx_offload_max_vdev = 2; 264 config->rx_batchmode = TARGET_RX_BATCHMODE; 265 266 config->peer_map_unmap_version = 0x1; 267 config->use_pdev_id = 1; 268 config->max_frag_entries = 0xa; 269 config->num_tdls_vdevs = 0x1; 270 config->num_tdls_conn_table_entries = 8; 271 config->beacon_tx_offload_max_vdev = 0x2; 272 config->num_multicast_filter_entries = 0x20; 273 config->num_wow_filters = 0x16; 274 config->num_keep_alive_pattern = 0; 275 } 276 277 #define PRIMAP(_hw_mode_) \ 278 [_hw_mode_] = _hw_mode_##_PRI 279 280 static const int ath12k_hw_mode_pri_map[] = { 281 PRIMAP(WMI_HOST_HW_MODE_SINGLE), 282 PRIMAP(WMI_HOST_HW_MODE_DBS), 283 PRIMAP(WMI_HOST_HW_MODE_SBS_PASSIVE), 284 PRIMAP(WMI_HOST_HW_MODE_SBS), 285 PRIMAP(WMI_HOST_HW_MODE_DBS_SBS), 286 PRIMAP(WMI_HOST_HW_MODE_DBS_OR_SBS), 287 /* keep last */ 288 PRIMAP(WMI_HOST_HW_MODE_MAX), 289 }; 290 291 static int 292 ath12k_wmi_tlv_iter(struct ath12k_base *ab, const void *ptr, size_t len, 293 int (*iter)(struct ath12k_base *ab, u16 tag, u16 len, 294 const void *ptr, void *data), 295 void *data) 296 { 297 const void *begin = ptr; 298 const struct wmi_tlv *tlv; 299 u16 tlv_tag, tlv_len; 300 int ret; 301 302 while (len > 0) { 303 if (len < sizeof(*tlv)) { 304 ath12k_err(ab, "wmi tlv parse failure at byte %zd (%zu bytes left, %zu expected)\n", 305 ptr - begin, len, sizeof(*tlv)); 306 return -EINVAL; 307 } 308 309 tlv = ptr; 310 tlv_tag = le32_get_bits(tlv->header, WMI_TLV_TAG); 311 tlv_len = le32_get_bits(tlv->header, WMI_TLV_LEN); 312 ptr += sizeof(*tlv); 313 len -= sizeof(*tlv); 314 315 if (tlv_len > len) { 316 ath12k_err(ab, "wmi tlv parse failure of tag %u at byte %zd (%zu bytes left, %u expected)\n", 317 tlv_tag, ptr - begin, len, tlv_len); 318 return -EINVAL; 319 } 320 321 if (tlv_tag < ARRAY_SIZE(ath12k_wmi_tlv_policies) && 322 ath12k_wmi_tlv_policies[tlv_tag].min_len && 323 ath12k_wmi_tlv_policies[tlv_tag].min_len > tlv_len) { 324 ath12k_err(ab, "wmi tlv parse failure of tag %u at byte %zd (%u bytes is less than min length %zu)\n", 325 tlv_tag, ptr - begin, tlv_len, 326 ath12k_wmi_tlv_policies[tlv_tag].min_len); 327 return -EINVAL; 328 } 329 330 ret = iter(ab, tlv_tag, tlv_len, ptr, data); 331 if (ret) 332 return ret; 333 334 ptr += tlv_len; 335 len -= tlv_len; 336 } 337 338 return 0; 339 } 340 341 static int ath12k_wmi_tlv_iter_parse(struct ath12k_base *ab, u16 tag, u16 len, 342 const void *ptr, void *data) 343 { 344 const void **tb = data; 345 346 if (tag < WMI_TAG_MAX) 347 tb[tag] = ptr; 348 349 return 0; 350 } 351 352 static int ath12k_wmi_tlv_parse(struct ath12k_base *ar, const void **tb, 353 const void *ptr, size_t len) 354 { 355 return ath12k_wmi_tlv_iter(ar, ptr, len, ath12k_wmi_tlv_iter_parse, 356 (void *)tb); 357 } 358 359 static const void ** 360 ath12k_wmi_tlv_parse_alloc(struct ath12k_base *ab, const void *ptr, 361 size_t len, gfp_t gfp) 362 { 363 const void **tb; 364 int ret; 365 366 tb = kcalloc(WMI_TAG_MAX, sizeof(*tb), gfp); 367 if (!tb) 368 return ERR_PTR(-ENOMEM); 369 370 ret = ath12k_wmi_tlv_parse(ab, tb, ptr, len); 371 if (ret) { 372 kfree(tb); 373 return ERR_PTR(ret); 374 } 375 376 return tb; 377 } 378 379 static int ath12k_wmi_cmd_send_nowait(struct ath12k_wmi_pdev *wmi, struct sk_buff *skb, 380 u32 cmd_id) 381 { 382 struct ath12k_skb_cb *skb_cb = ATH12K_SKB_CB(skb); 383 struct ath12k_base *ab = wmi->wmi_ab->ab; 384 struct wmi_cmd_hdr *cmd_hdr; 385 int ret; 386 387 if (!skb_push(skb, sizeof(struct wmi_cmd_hdr))) 388 return -ENOMEM; 389 390 cmd_hdr = (struct wmi_cmd_hdr *)skb->data; 391 cmd_hdr->cmd_id = le32_encode_bits(cmd_id, WMI_CMD_HDR_CMD_ID); 392 393 memset(skb_cb, 0, sizeof(*skb_cb)); 394 ret = ath12k_htc_send(&ab->htc, wmi->eid, skb); 395 396 if (ret) 397 goto err_pull; 398 399 return 0; 400 401 err_pull: 402 skb_pull(skb, sizeof(struct wmi_cmd_hdr)); 403 return ret; 404 } 405 406 int ath12k_wmi_cmd_send(struct ath12k_wmi_pdev *wmi, struct sk_buff *skb, 407 u32 cmd_id) 408 { 409 struct ath12k_wmi_base *wmi_sc = wmi->wmi_ab; 410 int ret = -EOPNOTSUPP; 411 412 might_sleep(); 413 414 wait_event_timeout(wmi_sc->tx_credits_wq, ({ 415 ret = ath12k_wmi_cmd_send_nowait(wmi, skb, cmd_id); 416 417 if (ret && test_bit(ATH12K_FLAG_CRASH_FLUSH, &wmi_sc->ab->dev_flags)) 418 ret = -ESHUTDOWN; 419 420 (ret != -EAGAIN); 421 }), WMI_SEND_TIMEOUT_HZ); 422 423 if (ret == -EAGAIN) 424 ath12k_warn(wmi_sc->ab, "wmi command %d timeout\n", cmd_id); 425 426 return ret; 427 } 428 429 static int ath12k_pull_svc_ready_ext(struct ath12k_wmi_pdev *wmi_handle, 430 const void *ptr, 431 struct ath12k_wmi_service_ext_arg *arg) 432 { 433 const struct wmi_service_ready_ext_event *ev = ptr; 434 int i; 435 436 if (!ev) 437 return -EINVAL; 438 439 /* Move this to host based bitmap */ 440 arg->default_conc_scan_config_bits = 441 le32_to_cpu(ev->default_conc_scan_config_bits); 442 arg->default_fw_config_bits = le32_to_cpu(ev->default_fw_config_bits); 443 arg->he_cap_info = le32_to_cpu(ev->he_cap_info); 444 arg->mpdu_density = le32_to_cpu(ev->mpdu_density); 445 arg->max_bssid_rx_filters = le32_to_cpu(ev->max_bssid_rx_filters); 446 arg->ppet.numss_m1 = le32_to_cpu(ev->ppet.numss_m1); 447 arg->ppet.ru_bit_mask = le32_to_cpu(ev->ppet.ru_info); 448 449 for (i = 0; i < WMI_MAX_NUM_SS; i++) 450 arg->ppet.ppet16_ppet8_ru3_ru0[i] = 451 le32_to_cpu(ev->ppet.ppet16_ppet8_ru3_ru0[i]); 452 453 return 0; 454 } 455 456 static int 457 ath12k_pull_mac_phy_cap_svc_ready_ext(struct ath12k_wmi_pdev *wmi_handle, 458 struct ath12k_wmi_svc_rdy_ext_parse *svc, 459 u8 hw_mode_id, u8 phy_id, 460 struct ath12k_pdev *pdev) 461 { 462 const struct ath12k_wmi_mac_phy_caps_params *mac_caps; 463 const struct ath12k_wmi_soc_mac_phy_hw_mode_caps_params *hw_caps = svc->hw_caps; 464 const struct ath12k_wmi_hw_mode_cap_params *wmi_hw_mode_caps = svc->hw_mode_caps; 465 const struct ath12k_wmi_mac_phy_caps_params *wmi_mac_phy_caps = svc->mac_phy_caps; 466 struct ath12k_base *ab = wmi_handle->wmi_ab->ab; 467 struct ath12k_band_cap *cap_band; 468 struct ath12k_pdev_cap *pdev_cap = &pdev->cap; 469 struct ath12k_fw_pdev *fw_pdev; 470 u32 phy_map; 471 u32 hw_idx, phy_idx = 0; 472 int i; 473 474 if (!hw_caps || !wmi_hw_mode_caps || !svc->soc_hal_reg_caps) 475 return -EINVAL; 476 477 for (hw_idx = 0; hw_idx < le32_to_cpu(hw_caps->num_hw_modes); hw_idx++) { 478 if (hw_mode_id == le32_to_cpu(wmi_hw_mode_caps[hw_idx].hw_mode_id)) 479 break; 480 481 phy_map = le32_to_cpu(wmi_hw_mode_caps[hw_idx].phy_id_map); 482 phy_idx = fls(phy_map); 483 } 484 485 if (hw_idx == le32_to_cpu(hw_caps->num_hw_modes)) 486 return -EINVAL; 487 488 phy_idx += phy_id; 489 if (phy_id >= le32_to_cpu(svc->soc_hal_reg_caps->num_phy)) 490 return -EINVAL; 491 492 mac_caps = wmi_mac_phy_caps + phy_idx; 493 494 pdev->pdev_id = le32_to_cpu(mac_caps->pdev_id); 495 pdev_cap->supported_bands |= le32_to_cpu(mac_caps->supported_bands); 496 pdev_cap->ampdu_density = le32_to_cpu(mac_caps->ampdu_density); 497 498 fw_pdev = &ab->fw_pdev[ab->fw_pdev_count]; 499 fw_pdev->supported_bands = le32_to_cpu(mac_caps->supported_bands); 500 fw_pdev->pdev_id = le32_to_cpu(mac_caps->pdev_id); 501 fw_pdev->phy_id = le32_to_cpu(mac_caps->phy_id); 502 ab->fw_pdev_count++; 503 504 /* Take non-zero tx/rx chainmask. If tx/rx chainmask differs from 505 * band to band for a single radio, need to see how this should be 506 * handled. 507 */ 508 if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_2G_CAP) { 509 pdev_cap->tx_chain_mask = le32_to_cpu(mac_caps->tx_chain_mask_2g); 510 pdev_cap->rx_chain_mask = le32_to_cpu(mac_caps->rx_chain_mask_2g); 511 } else if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_5G_CAP) { 512 pdev_cap->vht_cap = le32_to_cpu(mac_caps->vht_cap_info_5g); 513 pdev_cap->vht_mcs = le32_to_cpu(mac_caps->vht_supp_mcs_5g); 514 pdev_cap->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_5g); 515 pdev_cap->tx_chain_mask = le32_to_cpu(mac_caps->tx_chain_mask_5g); 516 pdev_cap->rx_chain_mask = le32_to_cpu(mac_caps->rx_chain_mask_5g); 517 } else { 518 return -EINVAL; 519 } 520 521 /* tx/rx chainmask reported from fw depends on the actual hw chains used, 522 * For example, for 4x4 capable macphys, first 4 chains can be used for first 523 * mac and the remaining 4 chains can be used for the second mac or vice-versa. 524 * In this case, tx/rx chainmask 0xf will be advertised for first mac and 0xf0 525 * will be advertised for second mac or vice-versa. Compute the shift value 526 * for tx/rx chainmask which will be used to advertise supported ht/vht rates to 527 * mac80211. 528 */ 529 pdev_cap->tx_chain_mask_shift = 530 find_first_bit((unsigned long *)&pdev_cap->tx_chain_mask, 32); 531 pdev_cap->rx_chain_mask_shift = 532 find_first_bit((unsigned long *)&pdev_cap->rx_chain_mask, 32); 533 534 if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_2G_CAP) { 535 cap_band = &pdev_cap->band[NL80211_BAND_2GHZ]; 536 cap_band->phy_id = le32_to_cpu(mac_caps->phy_id); 537 cap_band->max_bw_supported = le32_to_cpu(mac_caps->max_bw_supported_2g); 538 cap_band->ht_cap_info = le32_to_cpu(mac_caps->ht_cap_info_2g); 539 cap_band->he_cap_info[0] = le32_to_cpu(mac_caps->he_cap_info_2g); 540 cap_band->he_cap_info[1] = le32_to_cpu(mac_caps->he_cap_info_2g_ext); 541 cap_band->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_2g); 542 for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++) 543 cap_band->he_cap_phy_info[i] = 544 le32_to_cpu(mac_caps->he_cap_phy_info_2g[i]); 545 546 cap_band->he_ppet.numss_m1 = le32_to_cpu(mac_caps->he_ppet2g.numss_m1); 547 cap_band->he_ppet.ru_bit_mask = le32_to_cpu(mac_caps->he_ppet2g.ru_info); 548 549 for (i = 0; i < WMI_MAX_NUM_SS; i++) 550 cap_band->he_ppet.ppet16_ppet8_ru3_ru0[i] = 551 le32_to_cpu(mac_caps->he_ppet2g.ppet16_ppet8_ru3_ru0[i]); 552 } 553 554 if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_5G_CAP) { 555 cap_band = &pdev_cap->band[NL80211_BAND_5GHZ]; 556 cap_band->phy_id = le32_to_cpu(mac_caps->phy_id); 557 cap_band->max_bw_supported = 558 le32_to_cpu(mac_caps->max_bw_supported_5g); 559 cap_band->ht_cap_info = le32_to_cpu(mac_caps->ht_cap_info_5g); 560 cap_band->he_cap_info[0] = le32_to_cpu(mac_caps->he_cap_info_5g); 561 cap_band->he_cap_info[1] = le32_to_cpu(mac_caps->he_cap_info_5g_ext); 562 cap_band->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_5g); 563 for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++) 564 cap_band->he_cap_phy_info[i] = 565 le32_to_cpu(mac_caps->he_cap_phy_info_5g[i]); 566 567 cap_band->he_ppet.numss_m1 = le32_to_cpu(mac_caps->he_ppet5g.numss_m1); 568 cap_band->he_ppet.ru_bit_mask = le32_to_cpu(mac_caps->he_ppet5g.ru_info); 569 570 for (i = 0; i < WMI_MAX_NUM_SS; i++) 571 cap_band->he_ppet.ppet16_ppet8_ru3_ru0[i] = 572 le32_to_cpu(mac_caps->he_ppet5g.ppet16_ppet8_ru3_ru0[i]); 573 574 cap_band = &pdev_cap->band[NL80211_BAND_6GHZ]; 575 cap_band->max_bw_supported = 576 le32_to_cpu(mac_caps->max_bw_supported_5g); 577 cap_band->ht_cap_info = le32_to_cpu(mac_caps->ht_cap_info_5g); 578 cap_band->he_cap_info[0] = le32_to_cpu(mac_caps->he_cap_info_5g); 579 cap_band->he_cap_info[1] = le32_to_cpu(mac_caps->he_cap_info_5g_ext); 580 cap_band->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_5g); 581 for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++) 582 cap_band->he_cap_phy_info[i] = 583 le32_to_cpu(mac_caps->he_cap_phy_info_5g[i]); 584 585 cap_band->he_ppet.numss_m1 = le32_to_cpu(mac_caps->he_ppet5g.numss_m1); 586 cap_band->he_ppet.ru_bit_mask = le32_to_cpu(mac_caps->he_ppet5g.ru_info); 587 588 for (i = 0; i < WMI_MAX_NUM_SS; i++) 589 cap_band->he_ppet.ppet16_ppet8_ru3_ru0[i] = 590 le32_to_cpu(mac_caps->he_ppet5g.ppet16_ppet8_ru3_ru0[i]); 591 } 592 593 return 0; 594 } 595 596 static int 597 ath12k_pull_reg_cap_svc_rdy_ext(struct ath12k_wmi_pdev *wmi_handle, 598 const struct ath12k_wmi_soc_hal_reg_caps_params *reg_caps, 599 const struct ath12k_wmi_hal_reg_caps_ext_params *ext_caps, 600 u8 phy_idx, 601 struct ath12k_wmi_hal_reg_capabilities_ext_arg *param) 602 { 603 const struct ath12k_wmi_hal_reg_caps_ext_params *ext_reg_cap; 604 605 if (!reg_caps || !ext_caps) 606 return -EINVAL; 607 608 if (phy_idx >= le32_to_cpu(reg_caps->num_phy)) 609 return -EINVAL; 610 611 ext_reg_cap = &ext_caps[phy_idx]; 612 613 param->phy_id = le32_to_cpu(ext_reg_cap->phy_id); 614 param->eeprom_reg_domain = le32_to_cpu(ext_reg_cap->eeprom_reg_domain); 615 param->eeprom_reg_domain_ext = 616 le32_to_cpu(ext_reg_cap->eeprom_reg_domain_ext); 617 param->regcap1 = le32_to_cpu(ext_reg_cap->regcap1); 618 param->regcap2 = le32_to_cpu(ext_reg_cap->regcap2); 619 /* check if param->wireless_mode is needed */ 620 param->low_2ghz_chan = le32_to_cpu(ext_reg_cap->low_2ghz_chan); 621 param->high_2ghz_chan = le32_to_cpu(ext_reg_cap->high_2ghz_chan); 622 param->low_5ghz_chan = le32_to_cpu(ext_reg_cap->low_5ghz_chan); 623 param->high_5ghz_chan = le32_to_cpu(ext_reg_cap->high_5ghz_chan); 624 625 return 0; 626 } 627 628 static int ath12k_pull_service_ready_tlv(struct ath12k_base *ab, 629 const void *evt_buf, 630 struct ath12k_wmi_target_cap_arg *cap) 631 { 632 const struct wmi_service_ready_event *ev = evt_buf; 633 634 if (!ev) { 635 ath12k_err(ab, "%s: failed by NULL param\n", 636 __func__); 637 return -EINVAL; 638 } 639 640 cap->phy_capability = le32_to_cpu(ev->phy_capability); 641 cap->max_frag_entry = le32_to_cpu(ev->max_frag_entry); 642 cap->num_rf_chains = le32_to_cpu(ev->num_rf_chains); 643 cap->ht_cap_info = le32_to_cpu(ev->ht_cap_info); 644 cap->vht_cap_info = le32_to_cpu(ev->vht_cap_info); 645 cap->vht_supp_mcs = le32_to_cpu(ev->vht_supp_mcs); 646 cap->hw_min_tx_power = le32_to_cpu(ev->hw_min_tx_power); 647 cap->hw_max_tx_power = le32_to_cpu(ev->hw_max_tx_power); 648 cap->sys_cap_info = le32_to_cpu(ev->sys_cap_info); 649 cap->min_pkt_size_enable = le32_to_cpu(ev->min_pkt_size_enable); 650 cap->max_bcn_ie_size = le32_to_cpu(ev->max_bcn_ie_size); 651 cap->max_num_scan_channels = le32_to_cpu(ev->max_num_scan_channels); 652 cap->max_supported_macs = le32_to_cpu(ev->max_supported_macs); 653 cap->wmi_fw_sub_feat_caps = le32_to_cpu(ev->wmi_fw_sub_feat_caps); 654 cap->txrx_chainmask = le32_to_cpu(ev->txrx_chainmask); 655 cap->default_dbs_hw_mode_index = le32_to_cpu(ev->default_dbs_hw_mode_index); 656 cap->num_msdu_desc = le32_to_cpu(ev->num_msdu_desc); 657 658 return 0; 659 } 660 661 /* Save the wmi_service_bitmap into a linear bitmap. The wmi_services in 662 * wmi_service ready event are advertised in b0-b3 (LSB 4-bits) of each 663 * 4-byte word. 664 */ 665 static void ath12k_wmi_service_bitmap_copy(struct ath12k_wmi_pdev *wmi, 666 const u32 *wmi_svc_bm) 667 { 668 int i, j; 669 670 for (i = 0, j = 0; i < WMI_SERVICE_BM_SIZE && j < WMI_MAX_SERVICE; i++) { 671 do { 672 if (wmi_svc_bm[i] & BIT(j % WMI_SERVICE_BITS_IN_SIZE32)) 673 set_bit(j, wmi->wmi_ab->svc_map); 674 } while (++j % WMI_SERVICE_BITS_IN_SIZE32); 675 } 676 } 677 678 static int ath12k_wmi_svc_rdy_parse(struct ath12k_base *ab, u16 tag, u16 len, 679 const void *ptr, void *data) 680 { 681 struct ath12k_wmi_svc_ready_parse *svc_ready = data; 682 struct ath12k_wmi_pdev *wmi_handle = &ab->wmi_ab.wmi[0]; 683 u16 expect_len; 684 685 switch (tag) { 686 case WMI_TAG_SERVICE_READY_EVENT: 687 if (ath12k_pull_service_ready_tlv(ab, ptr, &ab->target_caps)) 688 return -EINVAL; 689 break; 690 691 case WMI_TAG_ARRAY_UINT32: 692 if (!svc_ready->wmi_svc_bitmap_done) { 693 expect_len = WMI_SERVICE_BM_SIZE * sizeof(u32); 694 if (len < expect_len) { 695 ath12k_warn(ab, "invalid len %d for the tag 0x%x\n", 696 len, tag); 697 return -EINVAL; 698 } 699 700 ath12k_wmi_service_bitmap_copy(wmi_handle, ptr); 701 702 svc_ready->wmi_svc_bitmap_done = true; 703 } 704 break; 705 default: 706 break; 707 } 708 709 return 0; 710 } 711 712 static int ath12k_service_ready_event(struct ath12k_base *ab, struct sk_buff *skb) 713 { 714 struct ath12k_wmi_svc_ready_parse svc_ready = { }; 715 int ret; 716 717 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 718 ath12k_wmi_svc_rdy_parse, 719 &svc_ready); 720 if (ret) { 721 ath12k_warn(ab, "failed to parse tlv %d\n", ret); 722 return ret; 723 } 724 725 return 0; 726 } 727 728 struct sk_buff *ath12k_wmi_alloc_skb(struct ath12k_wmi_base *wmi_sc, u32 len) 729 { 730 struct sk_buff *skb; 731 struct ath12k_base *ab = wmi_sc->ab; 732 u32 round_len = roundup(len, 4); 733 734 skb = ath12k_htc_alloc_skb(ab, WMI_SKB_HEADROOM + round_len); 735 if (!skb) 736 return NULL; 737 738 skb_reserve(skb, WMI_SKB_HEADROOM); 739 if (!IS_ALIGNED((unsigned long)skb->data, 4)) 740 ath12k_warn(ab, "unaligned WMI skb data\n"); 741 742 skb_put(skb, round_len); 743 memset(skb->data, 0, round_len); 744 745 return skb; 746 } 747 748 int ath12k_wmi_mgmt_send(struct ath12k *ar, u32 vdev_id, u32 buf_id, 749 struct sk_buff *frame) 750 { 751 struct ath12k_wmi_pdev *wmi = ar->wmi; 752 struct wmi_mgmt_send_cmd *cmd; 753 struct wmi_tlv *frame_tlv; 754 struct sk_buff *skb; 755 u32 buf_len; 756 int ret, len; 757 758 buf_len = min_t(int, frame->len, WMI_MGMT_SEND_DOWNLD_LEN); 759 760 len = sizeof(*cmd) + sizeof(*frame_tlv) + roundup(buf_len, 4); 761 762 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 763 if (!skb) 764 return -ENOMEM; 765 766 cmd = (struct wmi_mgmt_send_cmd *)skb->data; 767 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MGMT_TX_SEND_CMD, 768 sizeof(*cmd)); 769 cmd->vdev_id = cpu_to_le32(vdev_id); 770 cmd->desc_id = cpu_to_le32(buf_id); 771 cmd->chanfreq = 0; 772 cmd->paddr_lo = cpu_to_le32(lower_32_bits(ATH12K_SKB_CB(frame)->paddr)); 773 cmd->paddr_hi = cpu_to_le32(upper_32_bits(ATH12K_SKB_CB(frame)->paddr)); 774 cmd->frame_len = cpu_to_le32(frame->len); 775 cmd->buf_len = cpu_to_le32(buf_len); 776 cmd->tx_params_valid = 0; 777 778 frame_tlv = (struct wmi_tlv *)(skb->data + sizeof(*cmd)); 779 frame_tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, buf_len); 780 781 memcpy(frame_tlv->value, frame->data, buf_len); 782 783 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_MGMT_TX_SEND_CMDID); 784 if (ret) { 785 ath12k_warn(ar->ab, 786 "failed to submit WMI_MGMT_TX_SEND_CMDID cmd\n"); 787 dev_kfree_skb(skb); 788 } 789 790 return ret; 791 } 792 793 int ath12k_wmi_vdev_create(struct ath12k *ar, u8 *macaddr, 794 struct ath12k_wmi_vdev_create_arg *args) 795 { 796 struct ath12k_wmi_pdev *wmi = ar->wmi; 797 struct wmi_vdev_create_cmd *cmd; 798 struct sk_buff *skb; 799 struct ath12k_wmi_vdev_txrx_streams_params *txrx_streams; 800 struct wmi_tlv *tlv; 801 int ret, len; 802 void *ptr; 803 804 /* It can be optimized my sending tx/rx chain configuration 805 * only for supported bands instead of always sending it for 806 * both the bands. 807 */ 808 len = sizeof(*cmd) + TLV_HDR_SIZE + 809 (WMI_NUM_SUPPORTED_BAND_MAX * sizeof(*txrx_streams)); 810 811 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 812 if (!skb) 813 return -ENOMEM; 814 815 cmd = (struct wmi_vdev_create_cmd *)skb->data; 816 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_CREATE_CMD, 817 sizeof(*cmd)); 818 819 cmd->vdev_id = cpu_to_le32(args->if_id); 820 cmd->vdev_type = cpu_to_le32(args->type); 821 cmd->vdev_subtype = cpu_to_le32(args->subtype); 822 cmd->num_cfg_txrx_streams = cpu_to_le32(WMI_NUM_SUPPORTED_BAND_MAX); 823 cmd->pdev_id = cpu_to_le32(args->pdev_id); 824 cmd->vdev_stats_id = cpu_to_le32(args->if_stats_id); 825 ether_addr_copy(cmd->vdev_macaddr.addr, macaddr); 826 827 ptr = skb->data + sizeof(*cmd); 828 len = WMI_NUM_SUPPORTED_BAND_MAX * sizeof(*txrx_streams); 829 830 tlv = ptr; 831 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len); 832 833 ptr += TLV_HDR_SIZE; 834 txrx_streams = ptr; 835 len = sizeof(*txrx_streams); 836 txrx_streams->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_TXRX_STREAMS, 837 len); 838 txrx_streams->band = WMI_TPC_CHAINMASK_CONFIG_BAND_2G; 839 txrx_streams->supported_tx_streams = 840 args->chains[NL80211_BAND_2GHZ].tx; 841 txrx_streams->supported_rx_streams = 842 args->chains[NL80211_BAND_2GHZ].rx; 843 844 txrx_streams++; 845 txrx_streams->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_TXRX_STREAMS, 846 len); 847 txrx_streams->band = WMI_TPC_CHAINMASK_CONFIG_BAND_5G; 848 txrx_streams->supported_tx_streams = 849 args->chains[NL80211_BAND_5GHZ].tx; 850 txrx_streams->supported_rx_streams = 851 args->chains[NL80211_BAND_5GHZ].rx; 852 853 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 854 "WMI vdev create: id %d type %d subtype %d macaddr %pM pdevid %d\n", 855 args->if_id, args->type, args->subtype, 856 macaddr, args->pdev_id); 857 858 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_CREATE_CMDID); 859 if (ret) { 860 ath12k_warn(ar->ab, 861 "failed to submit WMI_VDEV_CREATE_CMDID\n"); 862 dev_kfree_skb(skb); 863 } 864 865 return ret; 866 } 867 868 int ath12k_wmi_vdev_delete(struct ath12k *ar, u8 vdev_id) 869 { 870 struct ath12k_wmi_pdev *wmi = ar->wmi; 871 struct wmi_vdev_delete_cmd *cmd; 872 struct sk_buff *skb; 873 int ret; 874 875 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 876 if (!skb) 877 return -ENOMEM; 878 879 cmd = (struct wmi_vdev_delete_cmd *)skb->data; 880 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_DELETE_CMD, 881 sizeof(*cmd)); 882 cmd->vdev_id = cpu_to_le32(vdev_id); 883 884 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "WMI vdev delete id %d\n", vdev_id); 885 886 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_DELETE_CMDID); 887 if (ret) { 888 ath12k_warn(ar->ab, "failed to submit WMI_VDEV_DELETE_CMDID\n"); 889 dev_kfree_skb(skb); 890 } 891 892 return ret; 893 } 894 895 int ath12k_wmi_vdev_stop(struct ath12k *ar, u8 vdev_id) 896 { 897 struct ath12k_wmi_pdev *wmi = ar->wmi; 898 struct wmi_vdev_stop_cmd *cmd; 899 struct sk_buff *skb; 900 int ret; 901 902 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 903 if (!skb) 904 return -ENOMEM; 905 906 cmd = (struct wmi_vdev_stop_cmd *)skb->data; 907 908 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_STOP_CMD, 909 sizeof(*cmd)); 910 cmd->vdev_id = cpu_to_le32(vdev_id); 911 912 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "WMI vdev stop id 0x%x\n", vdev_id); 913 914 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_STOP_CMDID); 915 if (ret) { 916 ath12k_warn(ar->ab, "failed to submit WMI_VDEV_STOP cmd\n"); 917 dev_kfree_skb(skb); 918 } 919 920 return ret; 921 } 922 923 int ath12k_wmi_vdev_down(struct ath12k *ar, u8 vdev_id) 924 { 925 struct ath12k_wmi_pdev *wmi = ar->wmi; 926 struct wmi_vdev_down_cmd *cmd; 927 struct sk_buff *skb; 928 int ret; 929 930 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 931 if (!skb) 932 return -ENOMEM; 933 934 cmd = (struct wmi_vdev_down_cmd *)skb->data; 935 936 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_DOWN_CMD, 937 sizeof(*cmd)); 938 cmd->vdev_id = cpu_to_le32(vdev_id); 939 940 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "WMI vdev down id 0x%x\n", vdev_id); 941 942 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_DOWN_CMDID); 943 if (ret) { 944 ath12k_warn(ar->ab, "failed to submit WMI_VDEV_DOWN cmd\n"); 945 dev_kfree_skb(skb); 946 } 947 948 return ret; 949 } 950 951 static void ath12k_wmi_put_wmi_channel(struct ath12k_wmi_channel_params *chan, 952 struct wmi_vdev_start_req_arg *arg) 953 { 954 memset(chan, 0, sizeof(*chan)); 955 956 chan->mhz = cpu_to_le32(arg->freq); 957 chan->band_center_freq1 = cpu_to_le32(arg->band_center_freq1); 958 if (arg->mode == MODE_11AC_VHT80_80) 959 chan->band_center_freq2 = cpu_to_le32(arg->band_center_freq2); 960 else 961 chan->band_center_freq2 = 0; 962 963 chan->info |= le32_encode_bits(arg->mode, WMI_CHAN_INFO_MODE); 964 if (arg->passive) 965 chan->info |= cpu_to_le32(WMI_CHAN_INFO_PASSIVE); 966 if (arg->allow_ibss) 967 chan->info |= cpu_to_le32(WMI_CHAN_INFO_ADHOC_ALLOWED); 968 if (arg->allow_ht) 969 chan->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HT); 970 if (arg->allow_vht) 971 chan->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_VHT); 972 if (arg->allow_he) 973 chan->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HE); 974 if (arg->ht40plus) 975 chan->info |= cpu_to_le32(WMI_CHAN_INFO_HT40_PLUS); 976 if (arg->chan_radar) 977 chan->info |= cpu_to_le32(WMI_CHAN_INFO_DFS); 978 if (arg->freq2_radar) 979 chan->info |= cpu_to_le32(WMI_CHAN_INFO_DFS_FREQ2); 980 981 chan->reg_info_1 = le32_encode_bits(arg->max_power, 982 WMI_CHAN_REG_INFO1_MAX_PWR) | 983 le32_encode_bits(arg->max_reg_power, 984 WMI_CHAN_REG_INFO1_MAX_REG_PWR); 985 986 chan->reg_info_2 = le32_encode_bits(arg->max_antenna_gain, 987 WMI_CHAN_REG_INFO2_ANT_MAX) | 988 le32_encode_bits(arg->max_power, WMI_CHAN_REG_INFO2_MAX_TX_PWR); 989 } 990 991 int ath12k_wmi_vdev_start(struct ath12k *ar, struct wmi_vdev_start_req_arg *arg, 992 bool restart) 993 { 994 struct ath12k_wmi_pdev *wmi = ar->wmi; 995 struct wmi_vdev_start_request_cmd *cmd; 996 struct sk_buff *skb; 997 struct ath12k_wmi_channel_params *chan; 998 struct wmi_tlv *tlv; 999 void *ptr; 1000 int ret, len; 1001 1002 if (WARN_ON(arg->ssid_len > sizeof(cmd->ssid.ssid))) 1003 return -EINVAL; 1004 1005 len = sizeof(*cmd) + sizeof(*chan) + TLV_HDR_SIZE; 1006 1007 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 1008 if (!skb) 1009 return -ENOMEM; 1010 1011 cmd = (struct wmi_vdev_start_request_cmd *)skb->data; 1012 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_START_REQUEST_CMD, 1013 sizeof(*cmd)); 1014 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 1015 cmd->beacon_interval = cpu_to_le32(arg->bcn_intval); 1016 cmd->bcn_tx_rate = cpu_to_le32(arg->bcn_tx_rate); 1017 cmd->dtim_period = cpu_to_le32(arg->dtim_period); 1018 cmd->num_noa_descriptors = cpu_to_le32(arg->num_noa_descriptors); 1019 cmd->preferred_rx_streams = cpu_to_le32(arg->pref_rx_streams); 1020 cmd->preferred_tx_streams = cpu_to_le32(arg->pref_tx_streams); 1021 cmd->cac_duration_ms = cpu_to_le32(arg->cac_duration_ms); 1022 cmd->regdomain = cpu_to_le32(arg->regdomain); 1023 cmd->he_ops = cpu_to_le32(arg->he_ops); 1024 cmd->punct_bitmap = cpu_to_le32(arg->punct_bitmap); 1025 1026 if (!restart) { 1027 if (arg->ssid) { 1028 cmd->ssid.ssid_len = cpu_to_le32(arg->ssid_len); 1029 memcpy(cmd->ssid.ssid, arg->ssid, arg->ssid_len); 1030 } 1031 if (arg->hidden_ssid) 1032 cmd->flags |= cpu_to_le32(WMI_VDEV_START_HIDDEN_SSID); 1033 if (arg->pmf_enabled) 1034 cmd->flags |= cpu_to_le32(WMI_VDEV_START_PMF_ENABLED); 1035 } 1036 1037 cmd->flags |= cpu_to_le32(WMI_VDEV_START_LDPC_RX_ENABLED); 1038 1039 ptr = skb->data + sizeof(*cmd); 1040 chan = ptr; 1041 1042 ath12k_wmi_put_wmi_channel(chan, arg); 1043 1044 chan->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_CHANNEL, 1045 sizeof(*chan)); 1046 ptr += sizeof(*chan); 1047 1048 tlv = ptr; 1049 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 0); 1050 1051 /* Note: This is a nested TLV containing: 1052 * [wmi_tlv][wmi_p2p_noa_descriptor][wmi_tlv].. 1053 */ 1054 1055 ptr += sizeof(*tlv); 1056 1057 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "vdev %s id 0x%x freq 0x%x mode 0x%x\n", 1058 restart ? "restart" : "start", arg->vdev_id, 1059 arg->freq, arg->mode); 1060 1061 if (restart) 1062 ret = ath12k_wmi_cmd_send(wmi, skb, 1063 WMI_VDEV_RESTART_REQUEST_CMDID); 1064 else 1065 ret = ath12k_wmi_cmd_send(wmi, skb, 1066 WMI_VDEV_START_REQUEST_CMDID); 1067 if (ret) { 1068 ath12k_warn(ar->ab, "failed to submit vdev_%s cmd\n", 1069 restart ? "restart" : "start"); 1070 dev_kfree_skb(skb); 1071 } 1072 1073 return ret; 1074 } 1075 1076 int ath12k_wmi_vdev_up(struct ath12k *ar, u32 vdev_id, u32 aid, const u8 *bssid) 1077 { 1078 struct ath12k_wmi_pdev *wmi = ar->wmi; 1079 struct wmi_vdev_up_cmd *cmd; 1080 struct sk_buff *skb; 1081 int ret; 1082 1083 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1084 if (!skb) 1085 return -ENOMEM; 1086 1087 cmd = (struct wmi_vdev_up_cmd *)skb->data; 1088 1089 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_UP_CMD, 1090 sizeof(*cmd)); 1091 cmd->vdev_id = cpu_to_le32(vdev_id); 1092 cmd->vdev_assoc_id = cpu_to_le32(aid); 1093 1094 ether_addr_copy(cmd->vdev_bssid.addr, bssid); 1095 1096 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1097 "WMI mgmt vdev up id 0x%x assoc id %d bssid %pM\n", 1098 vdev_id, aid, bssid); 1099 1100 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_UP_CMDID); 1101 if (ret) { 1102 ath12k_warn(ar->ab, "failed to submit WMI_VDEV_UP cmd\n"); 1103 dev_kfree_skb(skb); 1104 } 1105 1106 return ret; 1107 } 1108 1109 int ath12k_wmi_send_peer_create_cmd(struct ath12k *ar, 1110 struct ath12k_wmi_peer_create_arg *arg) 1111 { 1112 struct ath12k_wmi_pdev *wmi = ar->wmi; 1113 struct wmi_peer_create_cmd *cmd; 1114 struct sk_buff *skb; 1115 int ret; 1116 1117 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1118 if (!skb) 1119 return -ENOMEM; 1120 1121 cmd = (struct wmi_peer_create_cmd *)skb->data; 1122 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_CREATE_CMD, 1123 sizeof(*cmd)); 1124 1125 ether_addr_copy(cmd->peer_macaddr.addr, arg->peer_addr); 1126 cmd->peer_type = cpu_to_le32(arg->peer_type); 1127 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 1128 1129 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1130 "WMI peer create vdev_id %d peer_addr %pM\n", 1131 arg->vdev_id, arg->peer_addr); 1132 1133 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_CREATE_CMDID); 1134 if (ret) { 1135 ath12k_warn(ar->ab, "failed to submit WMI_PEER_CREATE cmd\n"); 1136 dev_kfree_skb(skb); 1137 } 1138 1139 return ret; 1140 } 1141 1142 int ath12k_wmi_send_peer_delete_cmd(struct ath12k *ar, 1143 const u8 *peer_addr, u8 vdev_id) 1144 { 1145 struct ath12k_wmi_pdev *wmi = ar->wmi; 1146 struct wmi_peer_delete_cmd *cmd; 1147 struct sk_buff *skb; 1148 int ret; 1149 1150 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1151 if (!skb) 1152 return -ENOMEM; 1153 1154 cmd = (struct wmi_peer_delete_cmd *)skb->data; 1155 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_DELETE_CMD, 1156 sizeof(*cmd)); 1157 1158 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr); 1159 cmd->vdev_id = cpu_to_le32(vdev_id); 1160 1161 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1162 "WMI peer delete vdev_id %d peer_addr %pM\n", 1163 vdev_id, peer_addr); 1164 1165 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_DELETE_CMDID); 1166 if (ret) { 1167 ath12k_warn(ar->ab, "failed to send WMI_PEER_DELETE cmd\n"); 1168 dev_kfree_skb(skb); 1169 } 1170 1171 return ret; 1172 } 1173 1174 int ath12k_wmi_send_pdev_set_regdomain(struct ath12k *ar, 1175 struct ath12k_wmi_pdev_set_regdomain_arg *arg) 1176 { 1177 struct ath12k_wmi_pdev *wmi = ar->wmi; 1178 struct wmi_pdev_set_regdomain_cmd *cmd; 1179 struct sk_buff *skb; 1180 int ret; 1181 1182 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1183 if (!skb) 1184 return -ENOMEM; 1185 1186 cmd = (struct wmi_pdev_set_regdomain_cmd *)skb->data; 1187 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_REGDOMAIN_CMD, 1188 sizeof(*cmd)); 1189 1190 cmd->reg_domain = cpu_to_le32(arg->current_rd_in_use); 1191 cmd->reg_domain_2g = cpu_to_le32(arg->current_rd_2g); 1192 cmd->reg_domain_5g = cpu_to_le32(arg->current_rd_5g); 1193 cmd->conformance_test_limit_2g = cpu_to_le32(arg->ctl_2g); 1194 cmd->conformance_test_limit_5g = cpu_to_le32(arg->ctl_5g); 1195 cmd->dfs_domain = cpu_to_le32(arg->dfs_domain); 1196 cmd->pdev_id = cpu_to_le32(arg->pdev_id); 1197 1198 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1199 "WMI pdev regd rd %d rd2g %d rd5g %d domain %d pdev id %d\n", 1200 arg->current_rd_in_use, arg->current_rd_2g, 1201 arg->current_rd_5g, arg->dfs_domain, arg->pdev_id); 1202 1203 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_SET_REGDOMAIN_CMDID); 1204 if (ret) { 1205 ath12k_warn(ar->ab, 1206 "failed to send WMI_PDEV_SET_REGDOMAIN cmd\n"); 1207 dev_kfree_skb(skb); 1208 } 1209 1210 return ret; 1211 } 1212 1213 int ath12k_wmi_set_peer_param(struct ath12k *ar, const u8 *peer_addr, 1214 u32 vdev_id, u32 param_id, u32 param_val) 1215 { 1216 struct ath12k_wmi_pdev *wmi = ar->wmi; 1217 struct wmi_peer_set_param_cmd *cmd; 1218 struct sk_buff *skb; 1219 int ret; 1220 1221 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1222 if (!skb) 1223 return -ENOMEM; 1224 1225 cmd = (struct wmi_peer_set_param_cmd *)skb->data; 1226 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_SET_PARAM_CMD, 1227 sizeof(*cmd)); 1228 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr); 1229 cmd->vdev_id = cpu_to_le32(vdev_id); 1230 cmd->param_id = cpu_to_le32(param_id); 1231 cmd->param_value = cpu_to_le32(param_val); 1232 1233 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1234 "WMI vdev %d peer 0x%pM set param %d value %d\n", 1235 vdev_id, peer_addr, param_id, param_val); 1236 1237 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_SET_PARAM_CMDID); 1238 if (ret) { 1239 ath12k_warn(ar->ab, "failed to send WMI_PEER_SET_PARAM cmd\n"); 1240 dev_kfree_skb(skb); 1241 } 1242 1243 return ret; 1244 } 1245 1246 int ath12k_wmi_send_peer_flush_tids_cmd(struct ath12k *ar, 1247 u8 peer_addr[ETH_ALEN], 1248 u32 peer_tid_bitmap, 1249 u8 vdev_id) 1250 { 1251 struct ath12k_wmi_pdev *wmi = ar->wmi; 1252 struct wmi_peer_flush_tids_cmd *cmd; 1253 struct sk_buff *skb; 1254 int ret; 1255 1256 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1257 if (!skb) 1258 return -ENOMEM; 1259 1260 cmd = (struct wmi_peer_flush_tids_cmd *)skb->data; 1261 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_FLUSH_TIDS_CMD, 1262 sizeof(*cmd)); 1263 1264 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr); 1265 cmd->peer_tid_bitmap = cpu_to_le32(peer_tid_bitmap); 1266 cmd->vdev_id = cpu_to_le32(vdev_id); 1267 1268 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1269 "WMI peer flush vdev_id %d peer_addr %pM tids %08x\n", 1270 vdev_id, peer_addr, peer_tid_bitmap); 1271 1272 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_FLUSH_TIDS_CMDID); 1273 if (ret) { 1274 ath12k_warn(ar->ab, 1275 "failed to send WMI_PEER_FLUSH_TIDS cmd\n"); 1276 dev_kfree_skb(skb); 1277 } 1278 1279 return ret; 1280 } 1281 1282 int ath12k_wmi_peer_rx_reorder_queue_setup(struct ath12k *ar, 1283 int vdev_id, const u8 *addr, 1284 dma_addr_t paddr, u8 tid, 1285 u8 ba_window_size_valid, 1286 u32 ba_window_size) 1287 { 1288 struct wmi_peer_reorder_queue_setup_cmd *cmd; 1289 struct sk_buff *skb; 1290 int ret; 1291 1292 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd)); 1293 if (!skb) 1294 return -ENOMEM; 1295 1296 cmd = (struct wmi_peer_reorder_queue_setup_cmd *)skb->data; 1297 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_REORDER_QUEUE_SETUP_CMD, 1298 sizeof(*cmd)); 1299 1300 ether_addr_copy(cmd->peer_macaddr.addr, addr); 1301 cmd->vdev_id = cpu_to_le32(vdev_id); 1302 cmd->tid = cpu_to_le32(tid); 1303 cmd->queue_ptr_lo = cpu_to_le32(lower_32_bits(paddr)); 1304 cmd->queue_ptr_hi = cpu_to_le32(upper_32_bits(paddr)); 1305 cmd->queue_no = cpu_to_le32(tid); 1306 cmd->ba_window_size_valid = cpu_to_le32(ba_window_size_valid); 1307 cmd->ba_window_size = cpu_to_le32(ba_window_size); 1308 1309 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1310 "wmi rx reorder queue setup addr %pM vdev_id %d tid %d\n", 1311 addr, vdev_id, tid); 1312 1313 ret = ath12k_wmi_cmd_send(ar->wmi, skb, 1314 WMI_PEER_REORDER_QUEUE_SETUP_CMDID); 1315 if (ret) { 1316 ath12k_warn(ar->ab, 1317 "failed to send WMI_PEER_REORDER_QUEUE_SETUP\n"); 1318 dev_kfree_skb(skb); 1319 } 1320 1321 return ret; 1322 } 1323 1324 int 1325 ath12k_wmi_rx_reord_queue_remove(struct ath12k *ar, 1326 struct ath12k_wmi_rx_reorder_queue_remove_arg *arg) 1327 { 1328 struct ath12k_wmi_pdev *wmi = ar->wmi; 1329 struct wmi_peer_reorder_queue_remove_cmd *cmd; 1330 struct sk_buff *skb; 1331 int ret; 1332 1333 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1334 if (!skb) 1335 return -ENOMEM; 1336 1337 cmd = (struct wmi_peer_reorder_queue_remove_cmd *)skb->data; 1338 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_REORDER_QUEUE_REMOVE_CMD, 1339 sizeof(*cmd)); 1340 1341 ether_addr_copy(cmd->peer_macaddr.addr, arg->peer_macaddr); 1342 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 1343 cmd->tid_mask = cpu_to_le32(arg->peer_tid_bitmap); 1344 1345 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1346 "%s: peer_macaddr %pM vdev_id %d, tid_map %d", __func__, 1347 arg->peer_macaddr, arg->vdev_id, arg->peer_tid_bitmap); 1348 1349 ret = ath12k_wmi_cmd_send(wmi, skb, 1350 WMI_PEER_REORDER_QUEUE_REMOVE_CMDID); 1351 if (ret) { 1352 ath12k_warn(ar->ab, 1353 "failed to send WMI_PEER_REORDER_QUEUE_REMOVE_CMDID"); 1354 dev_kfree_skb(skb); 1355 } 1356 1357 return ret; 1358 } 1359 1360 int ath12k_wmi_pdev_set_param(struct ath12k *ar, u32 param_id, 1361 u32 param_value, u8 pdev_id) 1362 { 1363 struct ath12k_wmi_pdev *wmi = ar->wmi; 1364 struct wmi_pdev_set_param_cmd *cmd; 1365 struct sk_buff *skb; 1366 int ret; 1367 1368 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1369 if (!skb) 1370 return -ENOMEM; 1371 1372 cmd = (struct wmi_pdev_set_param_cmd *)skb->data; 1373 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_PARAM_CMD, 1374 sizeof(*cmd)); 1375 cmd->pdev_id = cpu_to_le32(pdev_id); 1376 cmd->param_id = cpu_to_le32(param_id); 1377 cmd->param_value = cpu_to_le32(param_value); 1378 1379 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1380 "WMI pdev set param %d pdev id %d value %d\n", 1381 param_id, pdev_id, param_value); 1382 1383 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_SET_PARAM_CMDID); 1384 if (ret) { 1385 ath12k_warn(ar->ab, "failed to send WMI_PDEV_SET_PARAM cmd\n"); 1386 dev_kfree_skb(skb); 1387 } 1388 1389 return ret; 1390 } 1391 1392 int ath12k_wmi_pdev_set_ps_mode(struct ath12k *ar, int vdev_id, u32 enable) 1393 { 1394 struct ath12k_wmi_pdev *wmi = ar->wmi; 1395 struct wmi_pdev_set_ps_mode_cmd *cmd; 1396 struct sk_buff *skb; 1397 int ret; 1398 1399 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1400 if (!skb) 1401 return -ENOMEM; 1402 1403 cmd = (struct wmi_pdev_set_ps_mode_cmd *)skb->data; 1404 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STA_POWERSAVE_MODE_CMD, 1405 sizeof(*cmd)); 1406 cmd->vdev_id = cpu_to_le32(vdev_id); 1407 cmd->sta_ps_mode = cpu_to_le32(enable); 1408 1409 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1410 "WMI vdev set psmode %d vdev id %d\n", 1411 enable, vdev_id); 1412 1413 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_STA_POWERSAVE_MODE_CMDID); 1414 if (ret) { 1415 ath12k_warn(ar->ab, "failed to send WMI_PDEV_SET_PARAM cmd\n"); 1416 dev_kfree_skb(skb); 1417 } 1418 1419 return ret; 1420 } 1421 1422 int ath12k_wmi_pdev_suspend(struct ath12k *ar, u32 suspend_opt, 1423 u32 pdev_id) 1424 { 1425 struct ath12k_wmi_pdev *wmi = ar->wmi; 1426 struct wmi_pdev_suspend_cmd *cmd; 1427 struct sk_buff *skb; 1428 int ret; 1429 1430 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1431 if (!skb) 1432 return -ENOMEM; 1433 1434 cmd = (struct wmi_pdev_suspend_cmd *)skb->data; 1435 1436 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SUSPEND_CMD, 1437 sizeof(*cmd)); 1438 1439 cmd->suspend_opt = cpu_to_le32(suspend_opt); 1440 cmd->pdev_id = cpu_to_le32(pdev_id); 1441 1442 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1443 "WMI pdev suspend pdev_id %d\n", pdev_id); 1444 1445 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_SUSPEND_CMDID); 1446 if (ret) { 1447 ath12k_warn(ar->ab, "failed to send WMI_PDEV_SUSPEND cmd\n"); 1448 dev_kfree_skb(skb); 1449 } 1450 1451 return ret; 1452 } 1453 1454 int ath12k_wmi_pdev_resume(struct ath12k *ar, u32 pdev_id) 1455 { 1456 struct ath12k_wmi_pdev *wmi = ar->wmi; 1457 struct wmi_pdev_resume_cmd *cmd; 1458 struct sk_buff *skb; 1459 int ret; 1460 1461 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1462 if (!skb) 1463 return -ENOMEM; 1464 1465 cmd = (struct wmi_pdev_resume_cmd *)skb->data; 1466 1467 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_RESUME_CMD, 1468 sizeof(*cmd)); 1469 cmd->pdev_id = cpu_to_le32(pdev_id); 1470 1471 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1472 "WMI pdev resume pdev id %d\n", pdev_id); 1473 1474 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_RESUME_CMDID); 1475 if (ret) { 1476 ath12k_warn(ar->ab, "failed to send WMI_PDEV_RESUME cmd\n"); 1477 dev_kfree_skb(skb); 1478 } 1479 1480 return ret; 1481 } 1482 1483 /* TODO FW Support for the cmd is not available yet. 1484 * Can be tested once the command and corresponding 1485 * event is implemented in FW 1486 */ 1487 int ath12k_wmi_pdev_bss_chan_info_request(struct ath12k *ar, 1488 enum wmi_bss_chan_info_req_type type) 1489 { 1490 struct ath12k_wmi_pdev *wmi = ar->wmi; 1491 struct wmi_pdev_bss_chan_info_req_cmd *cmd; 1492 struct sk_buff *skb; 1493 int ret; 1494 1495 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1496 if (!skb) 1497 return -ENOMEM; 1498 1499 cmd = (struct wmi_pdev_bss_chan_info_req_cmd *)skb->data; 1500 1501 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_BSS_CHAN_INFO_REQUEST, 1502 sizeof(*cmd)); 1503 cmd->req_type = cpu_to_le32(type); 1504 1505 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1506 "WMI bss chan info req type %d\n", type); 1507 1508 ret = ath12k_wmi_cmd_send(wmi, skb, 1509 WMI_PDEV_BSS_CHAN_INFO_REQUEST_CMDID); 1510 if (ret) { 1511 ath12k_warn(ar->ab, 1512 "failed to send WMI_PDEV_BSS_CHAN_INFO_REQUEST cmd\n"); 1513 dev_kfree_skb(skb); 1514 } 1515 1516 return ret; 1517 } 1518 1519 int ath12k_wmi_send_set_ap_ps_param_cmd(struct ath12k *ar, u8 *peer_addr, 1520 struct ath12k_wmi_ap_ps_arg *arg) 1521 { 1522 struct ath12k_wmi_pdev *wmi = ar->wmi; 1523 struct wmi_ap_ps_peer_cmd *cmd; 1524 struct sk_buff *skb; 1525 int ret; 1526 1527 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1528 if (!skb) 1529 return -ENOMEM; 1530 1531 cmd = (struct wmi_ap_ps_peer_cmd *)skb->data; 1532 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_AP_PS_PEER_CMD, 1533 sizeof(*cmd)); 1534 1535 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 1536 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr); 1537 cmd->param = cpu_to_le32(arg->param); 1538 cmd->value = cpu_to_le32(arg->value); 1539 1540 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1541 "WMI set ap ps vdev id %d peer %pM param %d value %d\n", 1542 arg->vdev_id, peer_addr, arg->param, arg->value); 1543 1544 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_AP_PS_PEER_PARAM_CMDID); 1545 if (ret) { 1546 ath12k_warn(ar->ab, 1547 "failed to send WMI_AP_PS_PEER_PARAM_CMDID\n"); 1548 dev_kfree_skb(skb); 1549 } 1550 1551 return ret; 1552 } 1553 1554 int ath12k_wmi_set_sta_ps_param(struct ath12k *ar, u32 vdev_id, 1555 u32 param, u32 param_value) 1556 { 1557 struct ath12k_wmi_pdev *wmi = ar->wmi; 1558 struct wmi_sta_powersave_param_cmd *cmd; 1559 struct sk_buff *skb; 1560 int ret; 1561 1562 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1563 if (!skb) 1564 return -ENOMEM; 1565 1566 cmd = (struct wmi_sta_powersave_param_cmd *)skb->data; 1567 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STA_POWERSAVE_PARAM_CMD, 1568 sizeof(*cmd)); 1569 1570 cmd->vdev_id = cpu_to_le32(vdev_id); 1571 cmd->param = cpu_to_le32(param); 1572 cmd->value = cpu_to_le32(param_value); 1573 1574 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1575 "WMI set sta ps vdev_id %d param %d value %d\n", 1576 vdev_id, param, param_value); 1577 1578 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_STA_POWERSAVE_PARAM_CMDID); 1579 if (ret) { 1580 ath12k_warn(ar->ab, "failed to send WMI_STA_POWERSAVE_PARAM_CMDID"); 1581 dev_kfree_skb(skb); 1582 } 1583 1584 return ret; 1585 } 1586 1587 int ath12k_wmi_force_fw_hang_cmd(struct ath12k *ar, u32 type, u32 delay_time_ms) 1588 { 1589 struct ath12k_wmi_pdev *wmi = ar->wmi; 1590 struct wmi_force_fw_hang_cmd *cmd; 1591 struct sk_buff *skb; 1592 int ret, len; 1593 1594 len = sizeof(*cmd); 1595 1596 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 1597 if (!skb) 1598 return -ENOMEM; 1599 1600 cmd = (struct wmi_force_fw_hang_cmd *)skb->data; 1601 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_FORCE_FW_HANG_CMD, 1602 len); 1603 1604 cmd->type = cpu_to_le32(type); 1605 cmd->delay_time_ms = cpu_to_le32(delay_time_ms); 1606 1607 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_FORCE_FW_HANG_CMDID); 1608 1609 if (ret) { 1610 ath12k_warn(ar->ab, "Failed to send WMI_FORCE_FW_HANG_CMDID"); 1611 dev_kfree_skb(skb); 1612 } 1613 return ret; 1614 } 1615 1616 int ath12k_wmi_vdev_set_param_cmd(struct ath12k *ar, u32 vdev_id, 1617 u32 param_id, u32 param_value) 1618 { 1619 struct ath12k_wmi_pdev *wmi = ar->wmi; 1620 struct wmi_vdev_set_param_cmd *cmd; 1621 struct sk_buff *skb; 1622 int ret; 1623 1624 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1625 if (!skb) 1626 return -ENOMEM; 1627 1628 cmd = (struct wmi_vdev_set_param_cmd *)skb->data; 1629 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SET_PARAM_CMD, 1630 sizeof(*cmd)); 1631 1632 cmd->vdev_id = cpu_to_le32(vdev_id); 1633 cmd->param_id = cpu_to_le32(param_id); 1634 cmd->param_value = cpu_to_le32(param_value); 1635 1636 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1637 "WMI vdev id 0x%x set param %d value %d\n", 1638 vdev_id, param_id, param_value); 1639 1640 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_SET_PARAM_CMDID); 1641 if (ret) { 1642 ath12k_warn(ar->ab, 1643 "failed to send WMI_VDEV_SET_PARAM_CMDID\n"); 1644 dev_kfree_skb(skb); 1645 } 1646 1647 return ret; 1648 } 1649 1650 int ath12k_wmi_send_pdev_temperature_cmd(struct ath12k *ar) 1651 { 1652 struct ath12k_wmi_pdev *wmi = ar->wmi; 1653 struct wmi_get_pdev_temperature_cmd *cmd; 1654 struct sk_buff *skb; 1655 int ret; 1656 1657 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1658 if (!skb) 1659 return -ENOMEM; 1660 1661 cmd = (struct wmi_get_pdev_temperature_cmd *)skb->data; 1662 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_GET_TEMPERATURE_CMD, 1663 sizeof(*cmd)); 1664 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id); 1665 1666 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1667 "WMI pdev get temperature for pdev_id %d\n", ar->pdev->pdev_id); 1668 1669 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_GET_TEMPERATURE_CMDID); 1670 if (ret) { 1671 ath12k_warn(ar->ab, "failed to send WMI_PDEV_GET_TEMPERATURE cmd\n"); 1672 dev_kfree_skb(skb); 1673 } 1674 1675 return ret; 1676 } 1677 1678 int ath12k_wmi_send_bcn_offload_control_cmd(struct ath12k *ar, 1679 u32 vdev_id, u32 bcn_ctrl_op) 1680 { 1681 struct ath12k_wmi_pdev *wmi = ar->wmi; 1682 struct wmi_bcn_offload_ctrl_cmd *cmd; 1683 struct sk_buff *skb; 1684 int ret; 1685 1686 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1687 if (!skb) 1688 return -ENOMEM; 1689 1690 cmd = (struct wmi_bcn_offload_ctrl_cmd *)skb->data; 1691 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_OFFLOAD_CTRL_CMD, 1692 sizeof(*cmd)); 1693 1694 cmd->vdev_id = cpu_to_le32(vdev_id); 1695 cmd->bcn_ctrl_op = cpu_to_le32(bcn_ctrl_op); 1696 1697 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1698 "WMI bcn ctrl offload vdev id %d ctrl_op %d\n", 1699 vdev_id, bcn_ctrl_op); 1700 1701 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_BCN_OFFLOAD_CTRL_CMDID); 1702 if (ret) { 1703 ath12k_warn(ar->ab, 1704 "failed to send WMI_BCN_OFFLOAD_CTRL_CMDID\n"); 1705 dev_kfree_skb(skb); 1706 } 1707 1708 return ret; 1709 } 1710 1711 int ath12k_wmi_bcn_tmpl(struct ath12k *ar, u32 vdev_id, 1712 struct ieee80211_mutable_offsets *offs, 1713 struct sk_buff *bcn) 1714 { 1715 struct ath12k_wmi_pdev *wmi = ar->wmi; 1716 struct wmi_bcn_tmpl_cmd *cmd; 1717 struct ath12k_wmi_bcn_prb_info_params *bcn_prb_info; 1718 struct wmi_tlv *tlv; 1719 struct sk_buff *skb; 1720 void *ptr; 1721 int ret, len; 1722 size_t aligned_len = roundup(bcn->len, 4); 1723 1724 len = sizeof(*cmd) + sizeof(*bcn_prb_info) + TLV_HDR_SIZE + aligned_len; 1725 1726 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 1727 if (!skb) 1728 return -ENOMEM; 1729 1730 cmd = (struct wmi_bcn_tmpl_cmd *)skb->data; 1731 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_TMPL_CMD, 1732 sizeof(*cmd)); 1733 cmd->vdev_id = cpu_to_le32(vdev_id); 1734 cmd->tim_ie_offset = cpu_to_le32(offs->tim_offset); 1735 cmd->csa_switch_count_offset = cpu_to_le32(offs->cntdwn_counter_offs[0]); 1736 cmd->ext_csa_switch_count_offset = cpu_to_le32(offs->cntdwn_counter_offs[1]); 1737 cmd->buf_len = cpu_to_le32(bcn->len); 1738 1739 ptr = skb->data + sizeof(*cmd); 1740 1741 bcn_prb_info = ptr; 1742 len = sizeof(*bcn_prb_info); 1743 bcn_prb_info->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_PRB_INFO, 1744 len); 1745 bcn_prb_info->caps = 0; 1746 bcn_prb_info->erp = 0; 1747 1748 ptr += sizeof(*bcn_prb_info); 1749 1750 tlv = ptr; 1751 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, aligned_len); 1752 memcpy(tlv->value, bcn->data, bcn->len); 1753 1754 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_BCN_TMPL_CMDID); 1755 if (ret) { 1756 ath12k_warn(ar->ab, "failed to send WMI_BCN_TMPL_CMDID\n"); 1757 dev_kfree_skb(skb); 1758 } 1759 1760 return ret; 1761 } 1762 1763 int ath12k_wmi_vdev_install_key(struct ath12k *ar, 1764 struct wmi_vdev_install_key_arg *arg) 1765 { 1766 struct ath12k_wmi_pdev *wmi = ar->wmi; 1767 struct wmi_vdev_install_key_cmd *cmd; 1768 struct wmi_tlv *tlv; 1769 struct sk_buff *skb; 1770 int ret, len, key_len_aligned; 1771 1772 /* WMI_TAG_ARRAY_BYTE needs to be aligned with 4, the actual key 1773 * length is specified in cmd->key_len. 1774 */ 1775 key_len_aligned = roundup(arg->key_len, 4); 1776 1777 len = sizeof(*cmd) + TLV_HDR_SIZE + key_len_aligned; 1778 1779 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 1780 if (!skb) 1781 return -ENOMEM; 1782 1783 cmd = (struct wmi_vdev_install_key_cmd *)skb->data; 1784 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_INSTALL_KEY_CMD, 1785 sizeof(*cmd)); 1786 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 1787 ether_addr_copy(cmd->peer_macaddr.addr, arg->macaddr); 1788 cmd->key_idx = cpu_to_le32(arg->key_idx); 1789 cmd->key_flags = cpu_to_le32(arg->key_flags); 1790 cmd->key_cipher = cpu_to_le32(arg->key_cipher); 1791 cmd->key_len = cpu_to_le32(arg->key_len); 1792 cmd->key_txmic_len = cpu_to_le32(arg->key_txmic_len); 1793 cmd->key_rxmic_len = cpu_to_le32(arg->key_rxmic_len); 1794 1795 if (arg->key_rsc_counter) 1796 cmd->key_rsc_counter = cpu_to_le64(arg->key_rsc_counter); 1797 1798 tlv = (struct wmi_tlv *)(skb->data + sizeof(*cmd)); 1799 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, key_len_aligned); 1800 memcpy(tlv->value, arg->key_data, arg->key_len); 1801 1802 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1803 "WMI vdev install key idx %d cipher %d len %d\n", 1804 arg->key_idx, arg->key_cipher, arg->key_len); 1805 1806 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_INSTALL_KEY_CMDID); 1807 if (ret) { 1808 ath12k_warn(ar->ab, 1809 "failed to send WMI_VDEV_INSTALL_KEY cmd\n"); 1810 dev_kfree_skb(skb); 1811 } 1812 1813 return ret; 1814 } 1815 1816 static void ath12k_wmi_copy_peer_flags(struct wmi_peer_assoc_complete_cmd *cmd, 1817 struct ath12k_wmi_peer_assoc_arg *arg, 1818 bool hw_crypto_disabled) 1819 { 1820 cmd->peer_flags = 0; 1821 cmd->peer_flags_ext = 0; 1822 1823 if (arg->is_wme_set) { 1824 if (arg->qos_flag) 1825 cmd->peer_flags |= cpu_to_le32(WMI_PEER_QOS); 1826 if (arg->apsd_flag) 1827 cmd->peer_flags |= cpu_to_le32(WMI_PEER_APSD); 1828 if (arg->ht_flag) 1829 cmd->peer_flags |= cpu_to_le32(WMI_PEER_HT); 1830 if (arg->bw_40) 1831 cmd->peer_flags |= cpu_to_le32(WMI_PEER_40MHZ); 1832 if (arg->bw_80) 1833 cmd->peer_flags |= cpu_to_le32(WMI_PEER_80MHZ); 1834 if (arg->bw_160) 1835 cmd->peer_flags |= cpu_to_le32(WMI_PEER_160MHZ); 1836 if (arg->bw_320) 1837 cmd->peer_flags |= cpu_to_le32(WMI_PEER_EXT_320MHZ); 1838 1839 /* Typically if STBC is enabled for VHT it should be enabled 1840 * for HT as well 1841 **/ 1842 if (arg->stbc_flag) 1843 cmd->peer_flags |= cpu_to_le32(WMI_PEER_STBC); 1844 1845 /* Typically if LDPC is enabled for VHT it should be enabled 1846 * for HT as well 1847 **/ 1848 if (arg->ldpc_flag) 1849 cmd->peer_flags |= cpu_to_le32(WMI_PEER_LDPC); 1850 1851 if (arg->static_mimops_flag) 1852 cmd->peer_flags |= cpu_to_le32(WMI_PEER_STATIC_MIMOPS); 1853 if (arg->dynamic_mimops_flag) 1854 cmd->peer_flags |= cpu_to_le32(WMI_PEER_DYN_MIMOPS); 1855 if (arg->spatial_mux_flag) 1856 cmd->peer_flags |= cpu_to_le32(WMI_PEER_SPATIAL_MUX); 1857 if (arg->vht_flag) 1858 cmd->peer_flags |= cpu_to_le32(WMI_PEER_VHT); 1859 if (arg->he_flag) 1860 cmd->peer_flags |= cpu_to_le32(WMI_PEER_HE); 1861 if (arg->twt_requester) 1862 cmd->peer_flags |= cpu_to_le32(WMI_PEER_TWT_REQ); 1863 if (arg->twt_responder) 1864 cmd->peer_flags |= cpu_to_le32(WMI_PEER_TWT_RESP); 1865 if (arg->eht_flag) 1866 cmd->peer_flags_ext |= cpu_to_le32(WMI_PEER_EXT_EHT); 1867 } 1868 1869 /* Suppress authorization for all AUTH modes that need 4-way handshake 1870 * (during re-association). 1871 * Authorization will be done for these modes on key installation. 1872 */ 1873 if (arg->auth_flag) 1874 cmd->peer_flags |= cpu_to_le32(WMI_PEER_AUTH); 1875 if (arg->need_ptk_4_way) { 1876 cmd->peer_flags |= cpu_to_le32(WMI_PEER_NEED_PTK_4_WAY); 1877 if (!hw_crypto_disabled) 1878 cmd->peer_flags &= cpu_to_le32(~WMI_PEER_AUTH); 1879 } 1880 if (arg->need_gtk_2_way) 1881 cmd->peer_flags |= cpu_to_le32(WMI_PEER_NEED_GTK_2_WAY); 1882 /* safe mode bypass the 4-way handshake */ 1883 if (arg->safe_mode_enabled) 1884 cmd->peer_flags &= cpu_to_le32(~(WMI_PEER_NEED_PTK_4_WAY | 1885 WMI_PEER_NEED_GTK_2_WAY)); 1886 1887 if (arg->is_pmf_enabled) 1888 cmd->peer_flags |= cpu_to_le32(WMI_PEER_PMF); 1889 1890 /* Disable AMSDU for station transmit, if user configures it */ 1891 /* Disable AMSDU for AP transmit to 11n Stations, if user configures 1892 * it 1893 * if (arg->amsdu_disable) Add after FW support 1894 **/ 1895 1896 /* Target asserts if node is marked HT and all MCS is set to 0. 1897 * Mark the node as non-HT if all the mcs rates are disabled through 1898 * iwpriv 1899 **/ 1900 if (arg->peer_ht_rates.num_rates == 0) 1901 cmd->peer_flags &= cpu_to_le32(~WMI_PEER_HT); 1902 } 1903 1904 int ath12k_wmi_send_peer_assoc_cmd(struct ath12k *ar, 1905 struct ath12k_wmi_peer_assoc_arg *arg) 1906 { 1907 struct ath12k_wmi_pdev *wmi = ar->wmi; 1908 struct wmi_peer_assoc_complete_cmd *cmd; 1909 struct ath12k_wmi_vht_rate_set_params *mcs; 1910 struct ath12k_wmi_he_rate_set_params *he_mcs; 1911 struct ath12k_wmi_eht_rate_set_params *eht_mcs; 1912 struct sk_buff *skb; 1913 struct wmi_tlv *tlv; 1914 void *ptr; 1915 u32 peer_legacy_rates_align; 1916 u32 peer_ht_rates_align; 1917 int i, ret, len; 1918 1919 peer_legacy_rates_align = roundup(arg->peer_legacy_rates.num_rates, 1920 sizeof(u32)); 1921 peer_ht_rates_align = roundup(arg->peer_ht_rates.num_rates, 1922 sizeof(u32)); 1923 1924 len = sizeof(*cmd) + 1925 TLV_HDR_SIZE + (peer_legacy_rates_align * sizeof(u8)) + 1926 TLV_HDR_SIZE + (peer_ht_rates_align * sizeof(u8)) + 1927 sizeof(*mcs) + TLV_HDR_SIZE + 1928 (sizeof(*he_mcs) * arg->peer_he_mcs_count) + 1929 TLV_HDR_SIZE + (sizeof(*eht_mcs) * arg->peer_eht_mcs_count) + 1930 TLV_HDR_SIZE + TLV_HDR_SIZE; 1931 1932 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 1933 if (!skb) 1934 return -ENOMEM; 1935 1936 ptr = skb->data; 1937 1938 cmd = ptr; 1939 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_ASSOC_COMPLETE_CMD, 1940 sizeof(*cmd)); 1941 1942 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 1943 1944 cmd->peer_new_assoc = cpu_to_le32(arg->peer_new_assoc); 1945 cmd->peer_associd = cpu_to_le32(arg->peer_associd); 1946 cmd->punct_bitmap = cpu_to_le32(arg->punct_bitmap); 1947 1948 ath12k_wmi_copy_peer_flags(cmd, arg, 1949 test_bit(ATH12K_FLAG_HW_CRYPTO_DISABLED, 1950 &ar->ab->dev_flags)); 1951 1952 ether_addr_copy(cmd->peer_macaddr.addr, arg->peer_mac); 1953 1954 cmd->peer_rate_caps = cpu_to_le32(arg->peer_rate_caps); 1955 cmd->peer_caps = cpu_to_le32(arg->peer_caps); 1956 cmd->peer_listen_intval = cpu_to_le32(arg->peer_listen_intval); 1957 cmd->peer_ht_caps = cpu_to_le32(arg->peer_ht_caps); 1958 cmd->peer_max_mpdu = cpu_to_le32(arg->peer_max_mpdu); 1959 cmd->peer_mpdu_density = cpu_to_le32(arg->peer_mpdu_density); 1960 cmd->peer_vht_caps = cpu_to_le32(arg->peer_vht_caps); 1961 cmd->peer_phymode = cpu_to_le32(arg->peer_phymode); 1962 1963 /* Update 11ax capabilities */ 1964 cmd->peer_he_cap_info = cpu_to_le32(arg->peer_he_cap_macinfo[0]); 1965 cmd->peer_he_cap_info_ext = cpu_to_le32(arg->peer_he_cap_macinfo[1]); 1966 cmd->peer_he_cap_info_internal = cpu_to_le32(arg->peer_he_cap_macinfo_internal); 1967 cmd->peer_he_caps_6ghz = cpu_to_le32(arg->peer_he_caps_6ghz); 1968 cmd->peer_he_ops = cpu_to_le32(arg->peer_he_ops); 1969 for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++) 1970 cmd->peer_he_cap_phy[i] = 1971 cpu_to_le32(arg->peer_he_cap_phyinfo[i]); 1972 cmd->peer_ppet.numss_m1 = cpu_to_le32(arg->peer_ppet.numss_m1); 1973 cmd->peer_ppet.ru_info = cpu_to_le32(arg->peer_ppet.ru_bit_mask); 1974 for (i = 0; i < WMI_MAX_NUM_SS; i++) 1975 cmd->peer_ppet.ppet16_ppet8_ru3_ru0[i] = 1976 cpu_to_le32(arg->peer_ppet.ppet16_ppet8_ru3_ru0[i]); 1977 1978 /* Update 11be capabilities */ 1979 memcpy_and_pad(cmd->peer_eht_cap_mac, sizeof(cmd->peer_eht_cap_mac), 1980 arg->peer_eht_cap_mac, sizeof(arg->peer_eht_cap_mac), 1981 0); 1982 memcpy_and_pad(cmd->peer_eht_cap_phy, sizeof(cmd->peer_eht_cap_phy), 1983 arg->peer_eht_cap_phy, sizeof(arg->peer_eht_cap_phy), 1984 0); 1985 memcpy_and_pad(&cmd->peer_eht_ppet, sizeof(cmd->peer_eht_ppet), 1986 &arg->peer_eht_ppet, sizeof(arg->peer_eht_ppet), 0); 1987 1988 /* Update peer legacy rate information */ 1989 ptr += sizeof(*cmd); 1990 1991 tlv = ptr; 1992 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, peer_legacy_rates_align); 1993 1994 ptr += TLV_HDR_SIZE; 1995 1996 cmd->num_peer_legacy_rates = cpu_to_le32(arg->peer_legacy_rates.num_rates); 1997 memcpy(ptr, arg->peer_legacy_rates.rates, 1998 arg->peer_legacy_rates.num_rates); 1999 2000 /* Update peer HT rate information */ 2001 ptr += peer_legacy_rates_align; 2002 2003 tlv = ptr; 2004 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, peer_ht_rates_align); 2005 ptr += TLV_HDR_SIZE; 2006 cmd->num_peer_ht_rates = cpu_to_le32(arg->peer_ht_rates.num_rates); 2007 memcpy(ptr, arg->peer_ht_rates.rates, 2008 arg->peer_ht_rates.num_rates); 2009 2010 /* VHT Rates */ 2011 ptr += peer_ht_rates_align; 2012 2013 mcs = ptr; 2014 2015 mcs->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VHT_RATE_SET, 2016 sizeof(*mcs)); 2017 2018 cmd->peer_nss = cpu_to_le32(arg->peer_nss); 2019 2020 /* Update bandwidth-NSS mapping */ 2021 cmd->peer_bw_rxnss_override = 0; 2022 cmd->peer_bw_rxnss_override |= cpu_to_le32(arg->peer_bw_rxnss_override); 2023 2024 if (arg->vht_capable) { 2025 mcs->rx_max_rate = cpu_to_le32(arg->rx_max_rate); 2026 mcs->rx_mcs_set = cpu_to_le32(arg->rx_mcs_set); 2027 mcs->tx_max_rate = cpu_to_le32(arg->tx_max_rate); 2028 mcs->tx_mcs_set = cpu_to_le32(arg->tx_mcs_set); 2029 } 2030 2031 /* HE Rates */ 2032 cmd->peer_he_mcs = cpu_to_le32(arg->peer_he_mcs_count); 2033 cmd->min_data_rate = cpu_to_le32(arg->min_data_rate); 2034 2035 ptr += sizeof(*mcs); 2036 2037 len = arg->peer_he_mcs_count * sizeof(*he_mcs); 2038 2039 tlv = ptr; 2040 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len); 2041 ptr += TLV_HDR_SIZE; 2042 2043 /* Loop through the HE rate set */ 2044 for (i = 0; i < arg->peer_he_mcs_count; i++) { 2045 he_mcs = ptr; 2046 he_mcs->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_HE_RATE_SET, 2047 sizeof(*he_mcs)); 2048 2049 he_mcs->rx_mcs_set = cpu_to_le32(arg->peer_he_rx_mcs_set[i]); 2050 he_mcs->tx_mcs_set = cpu_to_le32(arg->peer_he_tx_mcs_set[i]); 2051 ptr += sizeof(*he_mcs); 2052 } 2053 2054 /* MLO header tag with 0 length */ 2055 len = 0; 2056 tlv = ptr; 2057 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len); 2058 ptr += TLV_HDR_SIZE; 2059 2060 /* Loop through the EHT rate set */ 2061 len = arg->peer_eht_mcs_count * sizeof(*eht_mcs); 2062 tlv = ptr; 2063 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len); 2064 ptr += TLV_HDR_SIZE; 2065 2066 for (i = 0; i < arg->peer_eht_mcs_count; i++) { 2067 eht_mcs = ptr; 2068 eht_mcs->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_HE_RATE_SET, 2069 sizeof(*eht_mcs)); 2070 2071 eht_mcs->rx_mcs_set = cpu_to_le32(arg->peer_eht_rx_mcs_set[i]); 2072 eht_mcs->tx_mcs_set = cpu_to_le32(arg->peer_eht_tx_mcs_set[i]); 2073 ptr += sizeof(*eht_mcs); 2074 } 2075 2076 /* ML partner links tag with 0 length */ 2077 len = 0; 2078 tlv = ptr; 2079 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len); 2080 ptr += TLV_HDR_SIZE; 2081 2082 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2083 "wmi peer assoc vdev id %d assoc id %d peer mac %pM peer_flags %x rate_caps %x peer_caps %x listen_intval %d ht_caps %x max_mpdu %d nss %d phymode %d peer_mpdu_density %d vht_caps %x he cap_info %x he ops %x he cap_info_ext %x he phy %x %x %x peer_bw_rxnss_override %x peer_flags_ext %x eht mac_cap %x %x eht phy_cap %x %x %x\n", 2084 cmd->vdev_id, cmd->peer_associd, arg->peer_mac, 2085 cmd->peer_flags, cmd->peer_rate_caps, cmd->peer_caps, 2086 cmd->peer_listen_intval, cmd->peer_ht_caps, 2087 cmd->peer_max_mpdu, cmd->peer_nss, cmd->peer_phymode, 2088 cmd->peer_mpdu_density, 2089 cmd->peer_vht_caps, cmd->peer_he_cap_info, 2090 cmd->peer_he_ops, cmd->peer_he_cap_info_ext, 2091 cmd->peer_he_cap_phy[0], cmd->peer_he_cap_phy[1], 2092 cmd->peer_he_cap_phy[2], 2093 cmd->peer_bw_rxnss_override, cmd->peer_flags_ext, 2094 cmd->peer_eht_cap_mac[0], cmd->peer_eht_cap_mac[1], 2095 cmd->peer_eht_cap_phy[0], cmd->peer_eht_cap_phy[1], 2096 cmd->peer_eht_cap_phy[2]); 2097 2098 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_ASSOC_CMDID); 2099 if (ret) { 2100 ath12k_warn(ar->ab, 2101 "failed to send WMI_PEER_ASSOC_CMDID\n"); 2102 dev_kfree_skb(skb); 2103 } 2104 2105 return ret; 2106 } 2107 2108 void ath12k_wmi_start_scan_init(struct ath12k *ar, 2109 struct ath12k_wmi_scan_req_arg *arg) 2110 { 2111 /* setup commonly used values */ 2112 arg->scan_req_id = 1; 2113 arg->scan_priority = WMI_SCAN_PRIORITY_LOW; 2114 arg->dwell_time_active = 50; 2115 arg->dwell_time_active_2g = 0; 2116 arg->dwell_time_passive = 150; 2117 arg->dwell_time_active_6g = 40; 2118 arg->dwell_time_passive_6g = 30; 2119 arg->min_rest_time = 50; 2120 arg->max_rest_time = 500; 2121 arg->repeat_probe_time = 0; 2122 arg->probe_spacing_time = 0; 2123 arg->idle_time = 0; 2124 arg->max_scan_time = 20000; 2125 arg->probe_delay = 5; 2126 arg->notify_scan_events = WMI_SCAN_EVENT_STARTED | 2127 WMI_SCAN_EVENT_COMPLETED | 2128 WMI_SCAN_EVENT_BSS_CHANNEL | 2129 WMI_SCAN_EVENT_FOREIGN_CHAN | 2130 WMI_SCAN_EVENT_DEQUEUED; 2131 arg->scan_flags |= WMI_SCAN_CHAN_STAT_EVENT; 2132 arg->num_bssid = 1; 2133 2134 /* fill bssid_list[0] with 0xff, otherwise bssid and RA will be 2135 * ZEROs in probe request 2136 */ 2137 eth_broadcast_addr(arg->bssid_list[0].addr); 2138 } 2139 2140 static void ath12k_wmi_copy_scan_event_cntrl_flags(struct wmi_start_scan_cmd *cmd, 2141 struct ath12k_wmi_scan_req_arg *arg) 2142 { 2143 /* Scan events subscription */ 2144 if (arg->scan_ev_started) 2145 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_STARTED); 2146 if (arg->scan_ev_completed) 2147 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_COMPLETED); 2148 if (arg->scan_ev_bss_chan) 2149 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_BSS_CHANNEL); 2150 if (arg->scan_ev_foreign_chan) 2151 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_FOREIGN_CHAN); 2152 if (arg->scan_ev_dequeued) 2153 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_DEQUEUED); 2154 if (arg->scan_ev_preempted) 2155 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_PREEMPTED); 2156 if (arg->scan_ev_start_failed) 2157 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_START_FAILED); 2158 if (arg->scan_ev_restarted) 2159 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_RESTARTED); 2160 if (arg->scan_ev_foreign_chn_exit) 2161 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT); 2162 if (arg->scan_ev_suspended) 2163 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_SUSPENDED); 2164 if (arg->scan_ev_resumed) 2165 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_RESUMED); 2166 2167 /** Set scan control flags */ 2168 cmd->scan_ctrl_flags = 0; 2169 if (arg->scan_f_passive) 2170 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_PASSIVE); 2171 if (arg->scan_f_strict_passive_pch) 2172 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_STRICT_PASSIVE_ON_PCHN); 2173 if (arg->scan_f_promisc_mode) 2174 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FILTER_PROMISCUOS); 2175 if (arg->scan_f_capture_phy_err) 2176 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_CAPTURE_PHY_ERROR); 2177 if (arg->scan_f_half_rate) 2178 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_HALF_RATE_SUPPORT); 2179 if (arg->scan_f_quarter_rate) 2180 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_QUARTER_RATE_SUPPORT); 2181 if (arg->scan_f_cck_rates) 2182 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_CCK_RATES); 2183 if (arg->scan_f_ofdm_rates) 2184 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_OFDM_RATES); 2185 if (arg->scan_f_chan_stat_evnt) 2186 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_CHAN_STAT_EVENT); 2187 if (arg->scan_f_filter_prb_req) 2188 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FILTER_PROBE_REQ); 2189 if (arg->scan_f_bcast_probe) 2190 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_BCAST_PROBE_REQ); 2191 if (arg->scan_f_offchan_mgmt_tx) 2192 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_OFFCHAN_MGMT_TX); 2193 if (arg->scan_f_offchan_data_tx) 2194 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_OFFCHAN_DATA_TX); 2195 if (arg->scan_f_force_active_dfs_chn) 2196 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_FORCE_ACTIVE_ON_DFS); 2197 if (arg->scan_f_add_tpc_ie_in_probe) 2198 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_TPC_IE_IN_PROBE_REQ); 2199 if (arg->scan_f_add_ds_ie_in_probe) 2200 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_DS_IE_IN_PROBE_REQ); 2201 if (arg->scan_f_add_spoofed_mac_in_probe) 2202 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_SPOOF_MAC_IN_PROBE_REQ); 2203 if (arg->scan_f_add_rand_seq_in_probe) 2204 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_RANDOM_SEQ_NO_IN_PROBE_REQ); 2205 if (arg->scan_f_en_ie_whitelist_in_probe) 2206 cmd->scan_ctrl_flags |= 2207 cpu_to_le32(WMI_SCAN_ENABLE_IE_WHTELIST_IN_PROBE_REQ); 2208 2209 cmd->scan_ctrl_flags |= le32_encode_bits(arg->adaptive_dwell_time_mode, 2210 WMI_SCAN_DWELL_MODE_MASK); 2211 } 2212 2213 int ath12k_wmi_send_scan_start_cmd(struct ath12k *ar, 2214 struct ath12k_wmi_scan_req_arg *arg) 2215 { 2216 struct ath12k_wmi_pdev *wmi = ar->wmi; 2217 struct wmi_start_scan_cmd *cmd; 2218 struct ath12k_wmi_ssid_params *ssid = NULL; 2219 struct ath12k_wmi_mac_addr_params *bssid; 2220 struct sk_buff *skb; 2221 struct wmi_tlv *tlv; 2222 void *ptr; 2223 int i, ret, len; 2224 u32 *tmp_ptr, extraie_len_with_pad = 0; 2225 struct ath12k_wmi_hint_short_ssid_arg *s_ssid = NULL; 2226 struct ath12k_wmi_hint_bssid_arg *hint_bssid = NULL; 2227 2228 len = sizeof(*cmd); 2229 2230 len += TLV_HDR_SIZE; 2231 if (arg->num_chan) 2232 len += arg->num_chan * sizeof(u32); 2233 2234 len += TLV_HDR_SIZE; 2235 if (arg->num_ssids) 2236 len += arg->num_ssids * sizeof(*ssid); 2237 2238 len += TLV_HDR_SIZE; 2239 if (arg->num_bssid) 2240 len += sizeof(*bssid) * arg->num_bssid; 2241 2242 len += TLV_HDR_SIZE; 2243 if (arg->extraie.len) 2244 extraie_len_with_pad = 2245 roundup(arg->extraie.len, sizeof(u32)); 2246 len += extraie_len_with_pad; 2247 2248 if (arg->num_hint_bssid) 2249 len += TLV_HDR_SIZE + 2250 arg->num_hint_bssid * sizeof(*hint_bssid); 2251 2252 if (arg->num_hint_s_ssid) 2253 len += TLV_HDR_SIZE + 2254 arg->num_hint_s_ssid * sizeof(*s_ssid); 2255 2256 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 2257 if (!skb) 2258 return -ENOMEM; 2259 2260 ptr = skb->data; 2261 2262 cmd = ptr; 2263 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_START_SCAN_CMD, 2264 sizeof(*cmd)); 2265 2266 cmd->scan_id = cpu_to_le32(arg->scan_id); 2267 cmd->scan_req_id = cpu_to_le32(arg->scan_req_id); 2268 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 2269 cmd->scan_priority = cpu_to_le32(arg->scan_priority); 2270 cmd->notify_scan_events = cpu_to_le32(arg->notify_scan_events); 2271 2272 ath12k_wmi_copy_scan_event_cntrl_flags(cmd, arg); 2273 2274 cmd->dwell_time_active = cpu_to_le32(arg->dwell_time_active); 2275 cmd->dwell_time_active_2g = cpu_to_le32(arg->dwell_time_active_2g); 2276 cmd->dwell_time_passive = cpu_to_le32(arg->dwell_time_passive); 2277 cmd->dwell_time_active_6g = cpu_to_le32(arg->dwell_time_active_6g); 2278 cmd->dwell_time_passive_6g = cpu_to_le32(arg->dwell_time_passive_6g); 2279 cmd->min_rest_time = cpu_to_le32(arg->min_rest_time); 2280 cmd->max_rest_time = cpu_to_le32(arg->max_rest_time); 2281 cmd->repeat_probe_time = cpu_to_le32(arg->repeat_probe_time); 2282 cmd->probe_spacing_time = cpu_to_le32(arg->probe_spacing_time); 2283 cmd->idle_time = cpu_to_le32(arg->idle_time); 2284 cmd->max_scan_time = cpu_to_le32(arg->max_scan_time); 2285 cmd->probe_delay = cpu_to_le32(arg->probe_delay); 2286 cmd->burst_duration = cpu_to_le32(arg->burst_duration); 2287 cmd->num_chan = cpu_to_le32(arg->num_chan); 2288 cmd->num_bssid = cpu_to_le32(arg->num_bssid); 2289 cmd->num_ssids = cpu_to_le32(arg->num_ssids); 2290 cmd->ie_len = cpu_to_le32(arg->extraie.len); 2291 cmd->n_probes = cpu_to_le32(arg->n_probes); 2292 2293 ptr += sizeof(*cmd); 2294 2295 len = arg->num_chan * sizeof(u32); 2296 2297 tlv = ptr; 2298 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, len); 2299 ptr += TLV_HDR_SIZE; 2300 tmp_ptr = (u32 *)ptr; 2301 2302 memcpy(tmp_ptr, arg->chan_list, arg->num_chan * 4); 2303 2304 ptr += len; 2305 2306 len = arg->num_ssids * sizeof(*ssid); 2307 tlv = ptr; 2308 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len); 2309 2310 ptr += TLV_HDR_SIZE; 2311 2312 if (arg->num_ssids) { 2313 ssid = ptr; 2314 for (i = 0; i < arg->num_ssids; ++i) { 2315 ssid->ssid_len = cpu_to_le32(arg->ssid[i].ssid_len); 2316 memcpy(ssid->ssid, arg->ssid[i].ssid, 2317 arg->ssid[i].ssid_len); 2318 ssid++; 2319 } 2320 } 2321 2322 ptr += (arg->num_ssids * sizeof(*ssid)); 2323 len = arg->num_bssid * sizeof(*bssid); 2324 tlv = ptr; 2325 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len); 2326 2327 ptr += TLV_HDR_SIZE; 2328 bssid = ptr; 2329 2330 if (arg->num_bssid) { 2331 for (i = 0; i < arg->num_bssid; ++i) { 2332 ether_addr_copy(bssid->addr, 2333 arg->bssid_list[i].addr); 2334 bssid++; 2335 } 2336 } 2337 2338 ptr += arg->num_bssid * sizeof(*bssid); 2339 2340 len = extraie_len_with_pad; 2341 tlv = ptr; 2342 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, len); 2343 ptr += TLV_HDR_SIZE; 2344 2345 if (arg->extraie.len) 2346 memcpy(ptr, arg->extraie.ptr, 2347 arg->extraie.len); 2348 2349 ptr += extraie_len_with_pad; 2350 2351 if (arg->num_hint_s_ssid) { 2352 len = arg->num_hint_s_ssid * sizeof(*s_ssid); 2353 tlv = ptr; 2354 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len); 2355 ptr += TLV_HDR_SIZE; 2356 s_ssid = ptr; 2357 for (i = 0; i < arg->num_hint_s_ssid; ++i) { 2358 s_ssid->freq_flags = arg->hint_s_ssid[i].freq_flags; 2359 s_ssid->short_ssid = arg->hint_s_ssid[i].short_ssid; 2360 s_ssid++; 2361 } 2362 ptr += len; 2363 } 2364 2365 if (arg->num_hint_bssid) { 2366 len = arg->num_hint_bssid * sizeof(struct ath12k_wmi_hint_bssid_arg); 2367 tlv = ptr; 2368 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len); 2369 ptr += TLV_HDR_SIZE; 2370 hint_bssid = ptr; 2371 for (i = 0; i < arg->num_hint_bssid; ++i) { 2372 hint_bssid->freq_flags = 2373 arg->hint_bssid[i].freq_flags; 2374 ether_addr_copy(&arg->hint_bssid[i].bssid.addr[0], 2375 &hint_bssid->bssid.addr[0]); 2376 hint_bssid++; 2377 } 2378 } 2379 2380 ret = ath12k_wmi_cmd_send(wmi, skb, 2381 WMI_START_SCAN_CMDID); 2382 if (ret) { 2383 ath12k_warn(ar->ab, "failed to send WMI_START_SCAN_CMDID\n"); 2384 dev_kfree_skb(skb); 2385 } 2386 2387 return ret; 2388 } 2389 2390 int ath12k_wmi_send_scan_stop_cmd(struct ath12k *ar, 2391 struct ath12k_wmi_scan_cancel_arg *arg) 2392 { 2393 struct ath12k_wmi_pdev *wmi = ar->wmi; 2394 struct wmi_stop_scan_cmd *cmd; 2395 struct sk_buff *skb; 2396 int ret; 2397 2398 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 2399 if (!skb) 2400 return -ENOMEM; 2401 2402 cmd = (struct wmi_stop_scan_cmd *)skb->data; 2403 2404 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STOP_SCAN_CMD, 2405 sizeof(*cmd)); 2406 2407 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 2408 cmd->requestor = cpu_to_le32(arg->requester); 2409 cmd->scan_id = cpu_to_le32(arg->scan_id); 2410 cmd->pdev_id = cpu_to_le32(arg->pdev_id); 2411 /* stop the scan with the corresponding scan_id */ 2412 if (arg->req_type == WLAN_SCAN_CANCEL_PDEV_ALL) { 2413 /* Cancelling all scans */ 2414 cmd->req_type = cpu_to_le32(WMI_SCAN_STOP_ALL); 2415 } else if (arg->req_type == WLAN_SCAN_CANCEL_VDEV_ALL) { 2416 /* Cancelling VAP scans */ 2417 cmd->req_type = cpu_to_le32(WMI_SCAN_STOP_VAP_ALL); 2418 } else if (arg->req_type == WLAN_SCAN_CANCEL_SINGLE) { 2419 /* Cancelling specific scan */ 2420 cmd->req_type = WMI_SCAN_STOP_ONE; 2421 } else { 2422 ath12k_warn(ar->ab, "invalid scan cancel req_type %d", 2423 arg->req_type); 2424 dev_kfree_skb(skb); 2425 return -EINVAL; 2426 } 2427 2428 ret = ath12k_wmi_cmd_send(wmi, skb, 2429 WMI_STOP_SCAN_CMDID); 2430 if (ret) { 2431 ath12k_warn(ar->ab, "failed to send WMI_STOP_SCAN_CMDID\n"); 2432 dev_kfree_skb(skb); 2433 } 2434 2435 return ret; 2436 } 2437 2438 int ath12k_wmi_send_scan_chan_list_cmd(struct ath12k *ar, 2439 struct ath12k_wmi_scan_chan_list_arg *arg) 2440 { 2441 struct ath12k_wmi_pdev *wmi = ar->wmi; 2442 struct wmi_scan_chan_list_cmd *cmd; 2443 struct sk_buff *skb; 2444 struct ath12k_wmi_channel_params *chan_info; 2445 struct ath12k_wmi_channel_arg *channel_arg; 2446 struct wmi_tlv *tlv; 2447 void *ptr; 2448 int i, ret, len; 2449 u16 num_send_chans, num_sends = 0, max_chan_limit = 0; 2450 __le32 *reg1, *reg2; 2451 2452 channel_arg = &arg->channel[0]; 2453 while (arg->nallchans) { 2454 len = sizeof(*cmd) + TLV_HDR_SIZE; 2455 max_chan_limit = (wmi->wmi_ab->max_msg_len[ar->pdev_idx] - len) / 2456 sizeof(*chan_info); 2457 2458 num_send_chans = min(arg->nallchans, max_chan_limit); 2459 2460 arg->nallchans -= num_send_chans; 2461 len += sizeof(*chan_info) * num_send_chans; 2462 2463 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 2464 if (!skb) 2465 return -ENOMEM; 2466 2467 cmd = (struct wmi_scan_chan_list_cmd *)skb->data; 2468 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_SCAN_CHAN_LIST_CMD, 2469 sizeof(*cmd)); 2470 cmd->pdev_id = cpu_to_le32(arg->pdev_id); 2471 cmd->num_scan_chans = cpu_to_le32(num_send_chans); 2472 if (num_sends) 2473 cmd->flags |= cpu_to_le32(WMI_APPEND_TO_EXISTING_CHAN_LIST_FLAG); 2474 2475 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2476 "WMI no.of chan = %d len = %d pdev_id = %d num_sends = %d\n", 2477 num_send_chans, len, cmd->pdev_id, num_sends); 2478 2479 ptr = skb->data + sizeof(*cmd); 2480 2481 len = sizeof(*chan_info) * num_send_chans; 2482 tlv = ptr; 2483 tlv->header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ARRAY_STRUCT, 2484 len); 2485 ptr += TLV_HDR_SIZE; 2486 2487 for (i = 0; i < num_send_chans; ++i) { 2488 chan_info = ptr; 2489 memset(chan_info, 0, sizeof(*chan_info)); 2490 len = sizeof(*chan_info); 2491 chan_info->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_CHANNEL, 2492 len); 2493 2494 reg1 = &chan_info->reg_info_1; 2495 reg2 = &chan_info->reg_info_2; 2496 chan_info->mhz = cpu_to_le32(channel_arg->mhz); 2497 chan_info->band_center_freq1 = cpu_to_le32(channel_arg->cfreq1); 2498 chan_info->band_center_freq2 = cpu_to_le32(channel_arg->cfreq2); 2499 2500 if (channel_arg->is_chan_passive) 2501 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_PASSIVE); 2502 if (channel_arg->allow_he) 2503 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HE); 2504 else if (channel_arg->allow_vht) 2505 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_VHT); 2506 else if (channel_arg->allow_ht) 2507 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HT); 2508 if (channel_arg->half_rate) 2509 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_HALF_RATE); 2510 if (channel_arg->quarter_rate) 2511 chan_info->info |= 2512 cpu_to_le32(WMI_CHAN_INFO_QUARTER_RATE); 2513 2514 if (channel_arg->psc_channel) 2515 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_PSC); 2516 2517 if (channel_arg->dfs_set) 2518 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_DFS); 2519 2520 chan_info->info |= le32_encode_bits(channel_arg->phy_mode, 2521 WMI_CHAN_INFO_MODE); 2522 *reg1 |= le32_encode_bits(channel_arg->minpower, 2523 WMI_CHAN_REG_INFO1_MIN_PWR); 2524 *reg1 |= le32_encode_bits(channel_arg->maxpower, 2525 WMI_CHAN_REG_INFO1_MAX_PWR); 2526 *reg1 |= le32_encode_bits(channel_arg->maxregpower, 2527 WMI_CHAN_REG_INFO1_MAX_REG_PWR); 2528 *reg1 |= le32_encode_bits(channel_arg->reg_class_id, 2529 WMI_CHAN_REG_INFO1_REG_CLS); 2530 *reg2 |= le32_encode_bits(channel_arg->antennamax, 2531 WMI_CHAN_REG_INFO2_ANT_MAX); 2532 2533 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2534 "WMI chan scan list chan[%d] = %u, chan_info->info %8x\n", 2535 i, chan_info->mhz, chan_info->info); 2536 2537 ptr += sizeof(*chan_info); 2538 2539 channel_arg++; 2540 } 2541 2542 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_SCAN_CHAN_LIST_CMDID); 2543 if (ret) { 2544 ath12k_warn(ar->ab, "failed to send WMI_SCAN_CHAN_LIST cmd\n"); 2545 dev_kfree_skb(skb); 2546 return ret; 2547 } 2548 2549 num_sends++; 2550 } 2551 2552 return 0; 2553 } 2554 2555 int ath12k_wmi_send_wmm_update_cmd(struct ath12k *ar, u32 vdev_id, 2556 struct wmi_wmm_params_all_arg *param) 2557 { 2558 struct ath12k_wmi_pdev *wmi = ar->wmi; 2559 struct wmi_vdev_set_wmm_params_cmd *cmd; 2560 struct wmi_wmm_params *wmm_param; 2561 struct wmi_wmm_params_arg *wmi_wmm_arg; 2562 struct sk_buff *skb; 2563 int ret, ac; 2564 2565 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 2566 if (!skb) 2567 return -ENOMEM; 2568 2569 cmd = (struct wmi_vdev_set_wmm_params_cmd *)skb->data; 2570 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SET_WMM_PARAMS_CMD, 2571 sizeof(*cmd)); 2572 2573 cmd->vdev_id = cpu_to_le32(vdev_id); 2574 cmd->wmm_param_type = 0; 2575 2576 for (ac = 0; ac < WME_NUM_AC; ac++) { 2577 switch (ac) { 2578 case WME_AC_BE: 2579 wmi_wmm_arg = ¶m->ac_be; 2580 break; 2581 case WME_AC_BK: 2582 wmi_wmm_arg = ¶m->ac_bk; 2583 break; 2584 case WME_AC_VI: 2585 wmi_wmm_arg = ¶m->ac_vi; 2586 break; 2587 case WME_AC_VO: 2588 wmi_wmm_arg = ¶m->ac_vo; 2589 break; 2590 } 2591 2592 wmm_param = (struct wmi_wmm_params *)&cmd->wmm_params[ac]; 2593 wmm_param->tlv_header = 2594 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SET_WMM_PARAMS_CMD, 2595 sizeof(*wmm_param)); 2596 2597 wmm_param->aifs = cpu_to_le32(wmi_wmm_arg->aifs); 2598 wmm_param->cwmin = cpu_to_le32(wmi_wmm_arg->cwmin); 2599 wmm_param->cwmax = cpu_to_le32(wmi_wmm_arg->cwmax); 2600 wmm_param->txoplimit = cpu_to_le32(wmi_wmm_arg->txop); 2601 wmm_param->acm = cpu_to_le32(wmi_wmm_arg->acm); 2602 wmm_param->no_ack = cpu_to_le32(wmi_wmm_arg->no_ack); 2603 2604 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2605 "wmi wmm set ac %d aifs %d cwmin %d cwmax %d txop %d acm %d no_ack %d\n", 2606 ac, wmm_param->aifs, wmm_param->cwmin, 2607 wmm_param->cwmax, wmm_param->txoplimit, 2608 wmm_param->acm, wmm_param->no_ack); 2609 } 2610 ret = ath12k_wmi_cmd_send(wmi, skb, 2611 WMI_VDEV_SET_WMM_PARAMS_CMDID); 2612 if (ret) { 2613 ath12k_warn(ar->ab, 2614 "failed to send WMI_VDEV_SET_WMM_PARAMS_CMDID"); 2615 dev_kfree_skb(skb); 2616 } 2617 2618 return ret; 2619 } 2620 2621 int ath12k_wmi_send_dfs_phyerr_offload_enable_cmd(struct ath12k *ar, 2622 u32 pdev_id) 2623 { 2624 struct ath12k_wmi_pdev *wmi = ar->wmi; 2625 struct wmi_dfs_phyerr_offload_cmd *cmd; 2626 struct sk_buff *skb; 2627 int ret; 2628 2629 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 2630 if (!skb) 2631 return -ENOMEM; 2632 2633 cmd = (struct wmi_dfs_phyerr_offload_cmd *)skb->data; 2634 cmd->tlv_header = 2635 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMD, 2636 sizeof(*cmd)); 2637 2638 cmd->pdev_id = cpu_to_le32(pdev_id); 2639 2640 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2641 "WMI dfs phy err offload enable pdev id %d\n", pdev_id); 2642 2643 ret = ath12k_wmi_cmd_send(wmi, skb, 2644 WMI_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMDID); 2645 if (ret) { 2646 ath12k_warn(ar->ab, 2647 "failed to send WMI_PDEV_DFS_PHYERR_OFFLOAD_ENABLE cmd\n"); 2648 dev_kfree_skb(skb); 2649 } 2650 2651 return ret; 2652 } 2653 2654 int ath12k_wmi_delba_send(struct ath12k *ar, u32 vdev_id, const u8 *mac, 2655 u32 tid, u32 initiator, u32 reason) 2656 { 2657 struct ath12k_wmi_pdev *wmi = ar->wmi; 2658 struct wmi_delba_send_cmd *cmd; 2659 struct sk_buff *skb; 2660 int ret; 2661 2662 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 2663 if (!skb) 2664 return -ENOMEM; 2665 2666 cmd = (struct wmi_delba_send_cmd *)skb->data; 2667 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_DELBA_SEND_CMD, 2668 sizeof(*cmd)); 2669 cmd->vdev_id = cpu_to_le32(vdev_id); 2670 ether_addr_copy(cmd->peer_macaddr.addr, mac); 2671 cmd->tid = cpu_to_le32(tid); 2672 cmd->initiator = cpu_to_le32(initiator); 2673 cmd->reasoncode = cpu_to_le32(reason); 2674 2675 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2676 "wmi delba send vdev_id 0x%X mac_addr %pM tid %u initiator %u reason %u\n", 2677 vdev_id, mac, tid, initiator, reason); 2678 2679 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_DELBA_SEND_CMDID); 2680 2681 if (ret) { 2682 ath12k_warn(ar->ab, 2683 "failed to send WMI_DELBA_SEND_CMDID cmd\n"); 2684 dev_kfree_skb(skb); 2685 } 2686 2687 return ret; 2688 } 2689 2690 int ath12k_wmi_addba_set_resp(struct ath12k *ar, u32 vdev_id, const u8 *mac, 2691 u32 tid, u32 status) 2692 { 2693 struct ath12k_wmi_pdev *wmi = ar->wmi; 2694 struct wmi_addba_setresponse_cmd *cmd; 2695 struct sk_buff *skb; 2696 int ret; 2697 2698 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 2699 if (!skb) 2700 return -ENOMEM; 2701 2702 cmd = (struct wmi_addba_setresponse_cmd *)skb->data; 2703 cmd->tlv_header = 2704 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ADDBA_SETRESPONSE_CMD, 2705 sizeof(*cmd)); 2706 cmd->vdev_id = cpu_to_le32(vdev_id); 2707 ether_addr_copy(cmd->peer_macaddr.addr, mac); 2708 cmd->tid = cpu_to_le32(tid); 2709 cmd->statuscode = cpu_to_le32(status); 2710 2711 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2712 "wmi addba set resp vdev_id 0x%X mac_addr %pM tid %u status %u\n", 2713 vdev_id, mac, tid, status); 2714 2715 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_ADDBA_SET_RESP_CMDID); 2716 2717 if (ret) { 2718 ath12k_warn(ar->ab, 2719 "failed to send WMI_ADDBA_SET_RESP_CMDID cmd\n"); 2720 dev_kfree_skb(skb); 2721 } 2722 2723 return ret; 2724 } 2725 2726 int ath12k_wmi_addba_send(struct ath12k *ar, u32 vdev_id, const u8 *mac, 2727 u32 tid, u32 buf_size) 2728 { 2729 struct ath12k_wmi_pdev *wmi = ar->wmi; 2730 struct wmi_addba_send_cmd *cmd; 2731 struct sk_buff *skb; 2732 int ret; 2733 2734 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 2735 if (!skb) 2736 return -ENOMEM; 2737 2738 cmd = (struct wmi_addba_send_cmd *)skb->data; 2739 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ADDBA_SEND_CMD, 2740 sizeof(*cmd)); 2741 cmd->vdev_id = cpu_to_le32(vdev_id); 2742 ether_addr_copy(cmd->peer_macaddr.addr, mac); 2743 cmd->tid = cpu_to_le32(tid); 2744 cmd->buffersize = cpu_to_le32(buf_size); 2745 2746 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2747 "wmi addba send vdev_id 0x%X mac_addr %pM tid %u bufsize %u\n", 2748 vdev_id, mac, tid, buf_size); 2749 2750 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_ADDBA_SEND_CMDID); 2751 2752 if (ret) { 2753 ath12k_warn(ar->ab, 2754 "failed to send WMI_ADDBA_SEND_CMDID cmd\n"); 2755 dev_kfree_skb(skb); 2756 } 2757 2758 return ret; 2759 } 2760 2761 int ath12k_wmi_addba_clear_resp(struct ath12k *ar, u32 vdev_id, const u8 *mac) 2762 { 2763 struct ath12k_wmi_pdev *wmi = ar->wmi; 2764 struct wmi_addba_clear_resp_cmd *cmd; 2765 struct sk_buff *skb; 2766 int ret; 2767 2768 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 2769 if (!skb) 2770 return -ENOMEM; 2771 2772 cmd = (struct wmi_addba_clear_resp_cmd *)skb->data; 2773 cmd->tlv_header = 2774 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ADDBA_CLEAR_RESP_CMD, 2775 sizeof(*cmd)); 2776 cmd->vdev_id = cpu_to_le32(vdev_id); 2777 ether_addr_copy(cmd->peer_macaddr.addr, mac); 2778 2779 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2780 "wmi addba clear resp vdev_id 0x%X mac_addr %pM\n", 2781 vdev_id, mac); 2782 2783 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_ADDBA_CLEAR_RESP_CMDID); 2784 2785 if (ret) { 2786 ath12k_warn(ar->ab, 2787 "failed to send WMI_ADDBA_CLEAR_RESP_CMDID cmd\n"); 2788 dev_kfree_skb(skb); 2789 } 2790 2791 return ret; 2792 } 2793 2794 int ath12k_wmi_send_init_country_cmd(struct ath12k *ar, 2795 struct ath12k_wmi_init_country_arg *arg) 2796 { 2797 struct ath12k_wmi_pdev *wmi = ar->wmi; 2798 struct wmi_init_country_cmd *cmd; 2799 struct sk_buff *skb; 2800 int ret; 2801 2802 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 2803 if (!skb) 2804 return -ENOMEM; 2805 2806 cmd = (struct wmi_init_country_cmd *)skb->data; 2807 cmd->tlv_header = 2808 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_SET_INIT_COUNTRY_CMD, 2809 sizeof(*cmd)); 2810 2811 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id); 2812 2813 switch (arg->flags) { 2814 case ALPHA_IS_SET: 2815 cmd->init_cc_type = WMI_COUNTRY_INFO_TYPE_ALPHA; 2816 memcpy(&cmd->cc_info.alpha2, arg->cc_info.alpha2, 3); 2817 break; 2818 case CC_IS_SET: 2819 cmd->init_cc_type = cpu_to_le32(WMI_COUNTRY_INFO_TYPE_COUNTRY_CODE); 2820 cmd->cc_info.country_code = 2821 cpu_to_le32(arg->cc_info.country_code); 2822 break; 2823 case REGDMN_IS_SET: 2824 cmd->init_cc_type = cpu_to_le32(WMI_COUNTRY_INFO_TYPE_REGDOMAIN); 2825 cmd->cc_info.regdom_id = cpu_to_le32(arg->cc_info.regdom_id); 2826 break; 2827 default: 2828 ret = -EINVAL; 2829 goto out; 2830 } 2831 2832 ret = ath12k_wmi_cmd_send(wmi, skb, 2833 WMI_SET_INIT_COUNTRY_CMDID); 2834 2835 out: 2836 if (ret) { 2837 ath12k_warn(ar->ab, 2838 "failed to send WMI_SET_INIT_COUNTRY CMD :%d\n", 2839 ret); 2840 dev_kfree_skb(skb); 2841 } 2842 2843 return ret; 2844 } 2845 2846 int 2847 ath12k_wmi_send_twt_enable_cmd(struct ath12k *ar, u32 pdev_id) 2848 { 2849 struct ath12k_wmi_pdev *wmi = ar->wmi; 2850 struct ath12k_base *ab = wmi->wmi_ab->ab; 2851 struct wmi_twt_enable_params_cmd *cmd; 2852 struct sk_buff *skb; 2853 int ret, len; 2854 2855 len = sizeof(*cmd); 2856 2857 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 2858 if (!skb) 2859 return -ENOMEM; 2860 2861 cmd = (struct wmi_twt_enable_params_cmd *)skb->data; 2862 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_TWT_ENABLE_CMD, 2863 len); 2864 cmd->pdev_id = cpu_to_le32(pdev_id); 2865 cmd->sta_cong_timer_ms = cpu_to_le32(ATH12K_TWT_DEF_STA_CONG_TIMER_MS); 2866 cmd->default_slot_size = cpu_to_le32(ATH12K_TWT_DEF_DEFAULT_SLOT_SIZE); 2867 cmd->congestion_thresh_setup = 2868 cpu_to_le32(ATH12K_TWT_DEF_CONGESTION_THRESH_SETUP); 2869 cmd->congestion_thresh_teardown = 2870 cpu_to_le32(ATH12K_TWT_DEF_CONGESTION_THRESH_TEARDOWN); 2871 cmd->congestion_thresh_critical = 2872 cpu_to_le32(ATH12K_TWT_DEF_CONGESTION_THRESH_CRITICAL); 2873 cmd->interference_thresh_teardown = 2874 cpu_to_le32(ATH12K_TWT_DEF_INTERFERENCE_THRESH_TEARDOWN); 2875 cmd->interference_thresh_setup = 2876 cpu_to_le32(ATH12K_TWT_DEF_INTERFERENCE_THRESH_SETUP); 2877 cmd->min_no_sta_setup = cpu_to_le32(ATH12K_TWT_DEF_MIN_NO_STA_SETUP); 2878 cmd->min_no_sta_teardown = cpu_to_le32(ATH12K_TWT_DEF_MIN_NO_STA_TEARDOWN); 2879 cmd->no_of_bcast_mcast_slots = 2880 cpu_to_le32(ATH12K_TWT_DEF_NO_OF_BCAST_MCAST_SLOTS); 2881 cmd->min_no_twt_slots = cpu_to_le32(ATH12K_TWT_DEF_MIN_NO_TWT_SLOTS); 2882 cmd->max_no_sta_twt = cpu_to_le32(ATH12K_TWT_DEF_MAX_NO_STA_TWT); 2883 cmd->mode_check_interval = cpu_to_le32(ATH12K_TWT_DEF_MODE_CHECK_INTERVAL); 2884 cmd->add_sta_slot_interval = cpu_to_le32(ATH12K_TWT_DEF_ADD_STA_SLOT_INTERVAL); 2885 cmd->remove_sta_slot_interval = 2886 cpu_to_le32(ATH12K_TWT_DEF_REMOVE_STA_SLOT_INTERVAL); 2887 /* TODO add MBSSID support */ 2888 cmd->mbss_support = 0; 2889 2890 ret = ath12k_wmi_cmd_send(wmi, skb, 2891 WMI_TWT_ENABLE_CMDID); 2892 if (ret) { 2893 ath12k_warn(ab, "Failed to send WMI_TWT_ENABLE_CMDID"); 2894 dev_kfree_skb(skb); 2895 } 2896 return ret; 2897 } 2898 2899 int 2900 ath12k_wmi_send_twt_disable_cmd(struct ath12k *ar, u32 pdev_id) 2901 { 2902 struct ath12k_wmi_pdev *wmi = ar->wmi; 2903 struct ath12k_base *ab = wmi->wmi_ab->ab; 2904 struct wmi_twt_disable_params_cmd *cmd; 2905 struct sk_buff *skb; 2906 int ret, len; 2907 2908 len = sizeof(*cmd); 2909 2910 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 2911 if (!skb) 2912 return -ENOMEM; 2913 2914 cmd = (struct wmi_twt_disable_params_cmd *)skb->data; 2915 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_TWT_DISABLE_CMD, 2916 len); 2917 cmd->pdev_id = cpu_to_le32(pdev_id); 2918 2919 ret = ath12k_wmi_cmd_send(wmi, skb, 2920 WMI_TWT_DISABLE_CMDID); 2921 if (ret) { 2922 ath12k_warn(ab, "Failed to send WMI_TWT_DISABLE_CMDID"); 2923 dev_kfree_skb(skb); 2924 } 2925 return ret; 2926 } 2927 2928 int 2929 ath12k_wmi_send_obss_spr_cmd(struct ath12k *ar, u32 vdev_id, 2930 struct ieee80211_he_obss_pd *he_obss_pd) 2931 { 2932 struct ath12k_wmi_pdev *wmi = ar->wmi; 2933 struct ath12k_base *ab = wmi->wmi_ab->ab; 2934 struct wmi_obss_spatial_reuse_params_cmd *cmd; 2935 struct sk_buff *skb; 2936 int ret, len; 2937 2938 len = sizeof(*cmd); 2939 2940 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 2941 if (!skb) 2942 return -ENOMEM; 2943 2944 cmd = (struct wmi_obss_spatial_reuse_params_cmd *)skb->data; 2945 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_OBSS_SPATIAL_REUSE_SET_CMD, 2946 len); 2947 cmd->vdev_id = cpu_to_le32(vdev_id); 2948 cmd->enable = cpu_to_le32(he_obss_pd->enable); 2949 cmd->obss_min = a_cpu_to_sle32(he_obss_pd->min_offset); 2950 cmd->obss_max = a_cpu_to_sle32(he_obss_pd->max_offset); 2951 2952 ret = ath12k_wmi_cmd_send(wmi, skb, 2953 WMI_PDEV_OBSS_PD_SPATIAL_REUSE_CMDID); 2954 if (ret) { 2955 ath12k_warn(ab, 2956 "Failed to send WMI_PDEV_OBSS_PD_SPATIAL_REUSE_CMDID"); 2957 dev_kfree_skb(skb); 2958 } 2959 return ret; 2960 } 2961 2962 int ath12k_wmi_obss_color_cfg_cmd(struct ath12k *ar, u32 vdev_id, 2963 u8 bss_color, u32 period, 2964 bool enable) 2965 { 2966 struct ath12k_wmi_pdev *wmi = ar->wmi; 2967 struct ath12k_base *ab = wmi->wmi_ab->ab; 2968 struct wmi_obss_color_collision_cfg_params_cmd *cmd; 2969 struct sk_buff *skb; 2970 int ret, len; 2971 2972 len = sizeof(*cmd); 2973 2974 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 2975 if (!skb) 2976 return -ENOMEM; 2977 2978 cmd = (struct wmi_obss_color_collision_cfg_params_cmd *)skb->data; 2979 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_OBSS_COLOR_COLLISION_DET_CONFIG, 2980 len); 2981 cmd->vdev_id = cpu_to_le32(vdev_id); 2982 cmd->evt_type = enable ? cpu_to_le32(ATH12K_OBSS_COLOR_COLLISION_DETECTION) : 2983 cpu_to_le32(ATH12K_OBSS_COLOR_COLLISION_DETECTION_DISABLE); 2984 cmd->current_bss_color = cpu_to_le32(bss_color); 2985 cmd->detection_period_ms = cpu_to_le32(period); 2986 cmd->scan_period_ms = cpu_to_le32(ATH12K_BSS_COLOR_COLLISION_SCAN_PERIOD_MS); 2987 cmd->free_slot_expiry_time_ms = 0; 2988 cmd->flags = 0; 2989 2990 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2991 "wmi_send_obss_color_collision_cfg id %d type %d bss_color %d detect_period %d scan_period %d\n", 2992 cmd->vdev_id, cmd->evt_type, cmd->current_bss_color, 2993 cmd->detection_period_ms, cmd->scan_period_ms); 2994 2995 ret = ath12k_wmi_cmd_send(wmi, skb, 2996 WMI_OBSS_COLOR_COLLISION_DET_CONFIG_CMDID); 2997 if (ret) { 2998 ath12k_warn(ab, "Failed to send WMI_OBSS_COLOR_COLLISION_DET_CONFIG_CMDID"); 2999 dev_kfree_skb(skb); 3000 } 3001 return ret; 3002 } 3003 3004 int ath12k_wmi_send_bss_color_change_enable_cmd(struct ath12k *ar, u32 vdev_id, 3005 bool enable) 3006 { 3007 struct ath12k_wmi_pdev *wmi = ar->wmi; 3008 struct ath12k_base *ab = wmi->wmi_ab->ab; 3009 struct wmi_bss_color_change_enable_params_cmd *cmd; 3010 struct sk_buff *skb; 3011 int ret, len; 3012 3013 len = sizeof(*cmd); 3014 3015 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 3016 if (!skb) 3017 return -ENOMEM; 3018 3019 cmd = (struct wmi_bss_color_change_enable_params_cmd *)skb->data; 3020 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BSS_COLOR_CHANGE_ENABLE, 3021 len); 3022 cmd->vdev_id = cpu_to_le32(vdev_id); 3023 cmd->enable = enable ? cpu_to_le32(1) : 0; 3024 3025 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3026 "wmi_send_bss_color_change_enable id %d enable %d\n", 3027 cmd->vdev_id, cmd->enable); 3028 3029 ret = ath12k_wmi_cmd_send(wmi, skb, 3030 WMI_BSS_COLOR_CHANGE_ENABLE_CMDID); 3031 if (ret) { 3032 ath12k_warn(ab, "Failed to send WMI_BSS_COLOR_CHANGE_ENABLE_CMDID"); 3033 dev_kfree_skb(skb); 3034 } 3035 return ret; 3036 } 3037 3038 int ath12k_wmi_fils_discovery_tmpl(struct ath12k *ar, u32 vdev_id, 3039 struct sk_buff *tmpl) 3040 { 3041 struct wmi_tlv *tlv; 3042 struct sk_buff *skb; 3043 void *ptr; 3044 int ret, len; 3045 size_t aligned_len; 3046 struct wmi_fils_discovery_tmpl_cmd *cmd; 3047 3048 aligned_len = roundup(tmpl->len, 4); 3049 len = sizeof(*cmd) + TLV_HDR_SIZE + aligned_len; 3050 3051 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3052 "WMI vdev %i set FILS discovery template\n", vdev_id); 3053 3054 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 3055 if (!skb) 3056 return -ENOMEM; 3057 3058 cmd = (struct wmi_fils_discovery_tmpl_cmd *)skb->data; 3059 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_FILS_DISCOVERY_TMPL_CMD, 3060 sizeof(*cmd)); 3061 cmd->vdev_id = cpu_to_le32(vdev_id); 3062 cmd->buf_len = cpu_to_le32(tmpl->len); 3063 ptr = skb->data + sizeof(*cmd); 3064 3065 tlv = ptr; 3066 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, aligned_len); 3067 memcpy(tlv->value, tmpl->data, tmpl->len); 3068 3069 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_FILS_DISCOVERY_TMPL_CMDID); 3070 if (ret) { 3071 ath12k_warn(ar->ab, 3072 "WMI vdev %i failed to send FILS discovery template command\n", 3073 vdev_id); 3074 dev_kfree_skb(skb); 3075 } 3076 return ret; 3077 } 3078 3079 int ath12k_wmi_probe_resp_tmpl(struct ath12k *ar, u32 vdev_id, 3080 struct sk_buff *tmpl) 3081 { 3082 struct wmi_probe_tmpl_cmd *cmd; 3083 struct ath12k_wmi_bcn_prb_info_params *probe_info; 3084 struct wmi_tlv *tlv; 3085 struct sk_buff *skb; 3086 void *ptr; 3087 int ret, len; 3088 size_t aligned_len = roundup(tmpl->len, 4); 3089 3090 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3091 "WMI vdev %i set probe response template\n", vdev_id); 3092 3093 len = sizeof(*cmd) + sizeof(*probe_info) + TLV_HDR_SIZE + aligned_len; 3094 3095 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 3096 if (!skb) 3097 return -ENOMEM; 3098 3099 cmd = (struct wmi_probe_tmpl_cmd *)skb->data; 3100 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PRB_TMPL_CMD, 3101 sizeof(*cmd)); 3102 cmd->vdev_id = cpu_to_le32(vdev_id); 3103 cmd->buf_len = cpu_to_le32(tmpl->len); 3104 3105 ptr = skb->data + sizeof(*cmd); 3106 3107 probe_info = ptr; 3108 len = sizeof(*probe_info); 3109 probe_info->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_PRB_INFO, 3110 len); 3111 probe_info->caps = 0; 3112 probe_info->erp = 0; 3113 3114 ptr += sizeof(*probe_info); 3115 3116 tlv = ptr; 3117 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, aligned_len); 3118 memcpy(tlv->value, tmpl->data, tmpl->len); 3119 3120 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_PRB_TMPL_CMDID); 3121 if (ret) { 3122 ath12k_warn(ar->ab, 3123 "WMI vdev %i failed to send probe response template command\n", 3124 vdev_id); 3125 dev_kfree_skb(skb); 3126 } 3127 return ret; 3128 } 3129 3130 int ath12k_wmi_fils_discovery(struct ath12k *ar, u32 vdev_id, u32 interval, 3131 bool unsol_bcast_probe_resp_enabled) 3132 { 3133 struct sk_buff *skb; 3134 int ret, len; 3135 struct wmi_fils_discovery_cmd *cmd; 3136 3137 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3138 "WMI vdev %i set %s interval to %u TU\n", 3139 vdev_id, unsol_bcast_probe_resp_enabled ? 3140 "unsolicited broadcast probe response" : "FILS discovery", 3141 interval); 3142 3143 len = sizeof(*cmd); 3144 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 3145 if (!skb) 3146 return -ENOMEM; 3147 3148 cmd = (struct wmi_fils_discovery_cmd *)skb->data; 3149 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ENABLE_FILS_CMD, 3150 len); 3151 cmd->vdev_id = cpu_to_le32(vdev_id); 3152 cmd->interval = cpu_to_le32(interval); 3153 cmd->config = cpu_to_le32(unsol_bcast_probe_resp_enabled); 3154 3155 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_ENABLE_FILS_CMDID); 3156 if (ret) { 3157 ath12k_warn(ar->ab, 3158 "WMI vdev %i failed to send FILS discovery enable/disable command\n", 3159 vdev_id); 3160 dev_kfree_skb(skb); 3161 } 3162 return ret; 3163 } 3164 3165 static void 3166 ath12k_fill_band_to_mac_param(struct ath12k_base *soc, 3167 struct ath12k_wmi_pdev_band_arg *arg) 3168 { 3169 u8 i; 3170 struct ath12k_wmi_hal_reg_capabilities_ext_arg *hal_reg_cap; 3171 struct ath12k_pdev *pdev; 3172 3173 for (i = 0; i < soc->num_radios; i++) { 3174 pdev = &soc->pdevs[i]; 3175 hal_reg_cap = &soc->hal_reg_cap[i]; 3176 arg[i].pdev_id = pdev->pdev_id; 3177 3178 switch (pdev->cap.supported_bands) { 3179 case WMI_HOST_WLAN_2G_5G_CAP: 3180 arg[i].start_freq = hal_reg_cap->low_2ghz_chan; 3181 arg[i].end_freq = hal_reg_cap->high_5ghz_chan; 3182 break; 3183 case WMI_HOST_WLAN_2G_CAP: 3184 arg[i].start_freq = hal_reg_cap->low_2ghz_chan; 3185 arg[i].end_freq = hal_reg_cap->high_2ghz_chan; 3186 break; 3187 case WMI_HOST_WLAN_5G_CAP: 3188 arg[i].start_freq = hal_reg_cap->low_5ghz_chan; 3189 arg[i].end_freq = hal_reg_cap->high_5ghz_chan; 3190 break; 3191 default: 3192 break; 3193 } 3194 } 3195 } 3196 3197 static void 3198 ath12k_wmi_copy_resource_config(struct ath12k_wmi_resource_config_params *wmi_cfg, 3199 struct ath12k_wmi_resource_config_arg *tg_cfg) 3200 { 3201 wmi_cfg->num_vdevs = cpu_to_le32(tg_cfg->num_vdevs); 3202 wmi_cfg->num_peers = cpu_to_le32(tg_cfg->num_peers); 3203 wmi_cfg->num_offload_peers = cpu_to_le32(tg_cfg->num_offload_peers); 3204 wmi_cfg->num_offload_reorder_buffs = 3205 cpu_to_le32(tg_cfg->num_offload_reorder_buffs); 3206 wmi_cfg->num_peer_keys = cpu_to_le32(tg_cfg->num_peer_keys); 3207 wmi_cfg->num_tids = cpu_to_le32(tg_cfg->num_tids); 3208 wmi_cfg->ast_skid_limit = cpu_to_le32(tg_cfg->ast_skid_limit); 3209 wmi_cfg->tx_chain_mask = cpu_to_le32(tg_cfg->tx_chain_mask); 3210 wmi_cfg->rx_chain_mask = cpu_to_le32(tg_cfg->rx_chain_mask); 3211 wmi_cfg->rx_timeout_pri[0] = cpu_to_le32(tg_cfg->rx_timeout_pri[0]); 3212 wmi_cfg->rx_timeout_pri[1] = cpu_to_le32(tg_cfg->rx_timeout_pri[1]); 3213 wmi_cfg->rx_timeout_pri[2] = cpu_to_le32(tg_cfg->rx_timeout_pri[2]); 3214 wmi_cfg->rx_timeout_pri[3] = cpu_to_le32(tg_cfg->rx_timeout_pri[3]); 3215 wmi_cfg->rx_decap_mode = cpu_to_le32(tg_cfg->rx_decap_mode); 3216 wmi_cfg->scan_max_pending_req = cpu_to_le32(tg_cfg->scan_max_pending_req); 3217 wmi_cfg->bmiss_offload_max_vdev = cpu_to_le32(tg_cfg->bmiss_offload_max_vdev); 3218 wmi_cfg->roam_offload_max_vdev = cpu_to_le32(tg_cfg->roam_offload_max_vdev); 3219 wmi_cfg->roam_offload_max_ap_profiles = 3220 cpu_to_le32(tg_cfg->roam_offload_max_ap_profiles); 3221 wmi_cfg->num_mcast_groups = cpu_to_le32(tg_cfg->num_mcast_groups); 3222 wmi_cfg->num_mcast_table_elems = cpu_to_le32(tg_cfg->num_mcast_table_elems); 3223 wmi_cfg->mcast2ucast_mode = cpu_to_le32(tg_cfg->mcast2ucast_mode); 3224 wmi_cfg->tx_dbg_log_size = cpu_to_le32(tg_cfg->tx_dbg_log_size); 3225 wmi_cfg->num_wds_entries = cpu_to_le32(tg_cfg->num_wds_entries); 3226 wmi_cfg->dma_burst_size = cpu_to_le32(tg_cfg->dma_burst_size); 3227 wmi_cfg->mac_aggr_delim = cpu_to_le32(tg_cfg->mac_aggr_delim); 3228 wmi_cfg->rx_skip_defrag_timeout_dup_detection_check = 3229 cpu_to_le32(tg_cfg->rx_skip_defrag_timeout_dup_detection_check); 3230 wmi_cfg->vow_config = cpu_to_le32(tg_cfg->vow_config); 3231 wmi_cfg->gtk_offload_max_vdev = cpu_to_le32(tg_cfg->gtk_offload_max_vdev); 3232 wmi_cfg->num_msdu_desc = cpu_to_le32(tg_cfg->num_msdu_desc); 3233 wmi_cfg->max_frag_entries = cpu_to_le32(tg_cfg->max_frag_entries); 3234 wmi_cfg->num_tdls_vdevs = cpu_to_le32(tg_cfg->num_tdls_vdevs); 3235 wmi_cfg->num_tdls_conn_table_entries = 3236 cpu_to_le32(tg_cfg->num_tdls_conn_table_entries); 3237 wmi_cfg->beacon_tx_offload_max_vdev = 3238 cpu_to_le32(tg_cfg->beacon_tx_offload_max_vdev); 3239 wmi_cfg->num_multicast_filter_entries = 3240 cpu_to_le32(tg_cfg->num_multicast_filter_entries); 3241 wmi_cfg->num_wow_filters = cpu_to_le32(tg_cfg->num_wow_filters); 3242 wmi_cfg->num_keep_alive_pattern = cpu_to_le32(tg_cfg->num_keep_alive_pattern); 3243 wmi_cfg->keep_alive_pattern_size = cpu_to_le32(tg_cfg->keep_alive_pattern_size); 3244 wmi_cfg->max_tdls_concurrent_sleep_sta = 3245 cpu_to_le32(tg_cfg->max_tdls_concurrent_sleep_sta); 3246 wmi_cfg->max_tdls_concurrent_buffer_sta = 3247 cpu_to_le32(tg_cfg->max_tdls_concurrent_buffer_sta); 3248 wmi_cfg->wmi_send_separate = cpu_to_le32(tg_cfg->wmi_send_separate); 3249 wmi_cfg->num_ocb_vdevs = cpu_to_le32(tg_cfg->num_ocb_vdevs); 3250 wmi_cfg->num_ocb_channels = cpu_to_le32(tg_cfg->num_ocb_channels); 3251 wmi_cfg->num_ocb_schedules = cpu_to_le32(tg_cfg->num_ocb_schedules); 3252 wmi_cfg->bpf_instruction_size = cpu_to_le32(tg_cfg->bpf_instruction_size); 3253 wmi_cfg->max_bssid_rx_filters = cpu_to_le32(tg_cfg->max_bssid_rx_filters); 3254 wmi_cfg->use_pdev_id = cpu_to_le32(tg_cfg->use_pdev_id); 3255 wmi_cfg->flag1 = cpu_to_le32(tg_cfg->atf_config); 3256 wmi_cfg->peer_map_unmap_version = cpu_to_le32(tg_cfg->peer_map_unmap_version); 3257 wmi_cfg->sched_params = cpu_to_le32(tg_cfg->sched_params); 3258 wmi_cfg->twt_ap_pdev_count = cpu_to_le32(tg_cfg->twt_ap_pdev_count); 3259 wmi_cfg->twt_ap_sta_count = cpu_to_le32(tg_cfg->twt_ap_sta_count); 3260 wmi_cfg->host_service_flags = cpu_to_le32(tg_cfg->is_reg_cc_ext_event_supported << 3261 WMI_RSRC_CFG_HOST_SVC_FLAG_REG_CC_EXT_SUPPORT_BIT); 3262 } 3263 3264 static int ath12k_init_cmd_send(struct ath12k_wmi_pdev *wmi, 3265 struct ath12k_wmi_init_cmd_arg *arg) 3266 { 3267 struct ath12k_base *ab = wmi->wmi_ab->ab; 3268 struct sk_buff *skb; 3269 struct wmi_init_cmd *cmd; 3270 struct ath12k_wmi_resource_config_params *cfg; 3271 struct ath12k_wmi_pdev_set_hw_mode_cmd *hw_mode; 3272 struct ath12k_wmi_pdev_band_to_mac_params *band_to_mac; 3273 struct ath12k_wmi_host_mem_chunk_params *host_mem_chunks; 3274 struct wmi_tlv *tlv; 3275 size_t ret, len; 3276 void *ptr; 3277 u32 hw_mode_len = 0; 3278 u16 idx; 3279 3280 if (arg->hw_mode_id != WMI_HOST_HW_MODE_MAX) 3281 hw_mode_len = sizeof(*hw_mode) + TLV_HDR_SIZE + 3282 (arg->num_band_to_mac * sizeof(*band_to_mac)); 3283 3284 len = sizeof(*cmd) + TLV_HDR_SIZE + sizeof(*cfg) + hw_mode_len + 3285 (arg->num_mem_chunks ? (sizeof(*host_mem_chunks) * WMI_MAX_MEM_REQS) : 0); 3286 3287 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 3288 if (!skb) 3289 return -ENOMEM; 3290 3291 cmd = (struct wmi_init_cmd *)skb->data; 3292 3293 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_INIT_CMD, 3294 sizeof(*cmd)); 3295 3296 ptr = skb->data + sizeof(*cmd); 3297 cfg = ptr; 3298 3299 ath12k_wmi_copy_resource_config(cfg, &arg->res_cfg); 3300 3301 cfg->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_RESOURCE_CONFIG, 3302 sizeof(*cfg)); 3303 3304 ptr += sizeof(*cfg); 3305 host_mem_chunks = ptr + TLV_HDR_SIZE; 3306 len = sizeof(struct ath12k_wmi_host_mem_chunk_params); 3307 3308 for (idx = 0; idx < arg->num_mem_chunks; ++idx) { 3309 host_mem_chunks[idx].tlv_header = 3310 ath12k_wmi_tlv_hdr(WMI_TAG_WLAN_HOST_MEMORY_CHUNK, 3311 len); 3312 3313 host_mem_chunks[idx].ptr = cpu_to_le32(arg->mem_chunks[idx].paddr); 3314 host_mem_chunks[idx].size = cpu_to_le32(arg->mem_chunks[idx].len); 3315 host_mem_chunks[idx].req_id = cpu_to_le32(arg->mem_chunks[idx].req_id); 3316 3317 ath12k_dbg(ab, ATH12K_DBG_WMI, 3318 "WMI host mem chunk req_id %d paddr 0x%llx len %d\n", 3319 arg->mem_chunks[idx].req_id, 3320 (u64)arg->mem_chunks[idx].paddr, 3321 arg->mem_chunks[idx].len); 3322 } 3323 cmd->num_host_mem_chunks = cpu_to_le32(arg->num_mem_chunks); 3324 len = sizeof(struct ath12k_wmi_host_mem_chunk_params) * arg->num_mem_chunks; 3325 3326 /* num_mem_chunks is zero */ 3327 tlv = ptr; 3328 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len); 3329 ptr += TLV_HDR_SIZE + len; 3330 3331 if (arg->hw_mode_id != WMI_HOST_HW_MODE_MAX) { 3332 hw_mode = (struct ath12k_wmi_pdev_set_hw_mode_cmd *)ptr; 3333 hw_mode->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_HW_MODE_CMD, 3334 sizeof(*hw_mode)); 3335 3336 hw_mode->hw_mode_index = cpu_to_le32(arg->hw_mode_id); 3337 hw_mode->num_band_to_mac = cpu_to_le32(arg->num_band_to_mac); 3338 3339 ptr += sizeof(*hw_mode); 3340 3341 len = arg->num_band_to_mac * sizeof(*band_to_mac); 3342 tlv = ptr; 3343 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len); 3344 3345 ptr += TLV_HDR_SIZE; 3346 len = sizeof(*band_to_mac); 3347 3348 for (idx = 0; idx < arg->num_band_to_mac; idx++) { 3349 band_to_mac = (void *)ptr; 3350 3351 band_to_mac->tlv_header = 3352 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_BAND_TO_MAC, 3353 len); 3354 band_to_mac->pdev_id = cpu_to_le32(arg->band_to_mac[idx].pdev_id); 3355 band_to_mac->start_freq = 3356 cpu_to_le32(arg->band_to_mac[idx].start_freq); 3357 band_to_mac->end_freq = 3358 cpu_to_le32(arg->band_to_mac[idx].end_freq); 3359 ptr += sizeof(*band_to_mac); 3360 } 3361 } 3362 3363 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_INIT_CMDID); 3364 if (ret) { 3365 ath12k_warn(ab, "failed to send WMI_INIT_CMDID\n"); 3366 dev_kfree_skb(skb); 3367 } 3368 3369 return ret; 3370 } 3371 3372 int ath12k_wmi_pdev_lro_cfg(struct ath12k *ar, 3373 int pdev_id) 3374 { 3375 struct ath12k_wmi_pdev_lro_config_cmd *cmd; 3376 struct sk_buff *skb; 3377 int ret; 3378 3379 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd)); 3380 if (!skb) 3381 return -ENOMEM; 3382 3383 cmd = (struct ath12k_wmi_pdev_lro_config_cmd *)skb->data; 3384 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_LRO_INFO_CMD, 3385 sizeof(*cmd)); 3386 3387 get_random_bytes(cmd->th_4, sizeof(cmd->th_4)); 3388 get_random_bytes(cmd->th_6, sizeof(cmd->th_6)); 3389 3390 cmd->pdev_id = cpu_to_le32(pdev_id); 3391 3392 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3393 "WMI lro cfg cmd pdev_id 0x%x\n", pdev_id); 3394 3395 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_LRO_CONFIG_CMDID); 3396 if (ret) { 3397 ath12k_warn(ar->ab, 3398 "failed to send lro cfg req wmi cmd\n"); 3399 goto err; 3400 } 3401 3402 return 0; 3403 err: 3404 dev_kfree_skb(skb); 3405 return ret; 3406 } 3407 3408 int ath12k_wmi_wait_for_service_ready(struct ath12k_base *ab) 3409 { 3410 unsigned long time_left; 3411 3412 time_left = wait_for_completion_timeout(&ab->wmi_ab.service_ready, 3413 WMI_SERVICE_READY_TIMEOUT_HZ); 3414 if (!time_left) 3415 return -ETIMEDOUT; 3416 3417 return 0; 3418 } 3419 3420 int ath12k_wmi_wait_for_unified_ready(struct ath12k_base *ab) 3421 { 3422 unsigned long time_left; 3423 3424 time_left = wait_for_completion_timeout(&ab->wmi_ab.unified_ready, 3425 WMI_SERVICE_READY_TIMEOUT_HZ); 3426 if (!time_left) 3427 return -ETIMEDOUT; 3428 3429 return 0; 3430 } 3431 3432 int ath12k_wmi_set_hw_mode(struct ath12k_base *ab, 3433 enum wmi_host_hw_mode_config_type mode) 3434 { 3435 struct ath12k_wmi_pdev_set_hw_mode_cmd *cmd; 3436 struct sk_buff *skb; 3437 struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab; 3438 int len; 3439 int ret; 3440 3441 len = sizeof(*cmd); 3442 3443 skb = ath12k_wmi_alloc_skb(wmi_ab, len); 3444 if (!skb) 3445 return -ENOMEM; 3446 3447 cmd = (struct ath12k_wmi_pdev_set_hw_mode_cmd *)skb->data; 3448 3449 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_HW_MODE_CMD, 3450 sizeof(*cmd)); 3451 3452 cmd->pdev_id = WMI_PDEV_ID_SOC; 3453 cmd->hw_mode_index = cpu_to_le32(mode); 3454 3455 ret = ath12k_wmi_cmd_send(&wmi_ab->wmi[0], skb, WMI_PDEV_SET_HW_MODE_CMDID); 3456 if (ret) { 3457 ath12k_warn(ab, "failed to send WMI_PDEV_SET_HW_MODE_CMDID\n"); 3458 dev_kfree_skb(skb); 3459 } 3460 3461 return ret; 3462 } 3463 3464 int ath12k_wmi_cmd_init(struct ath12k_base *ab) 3465 { 3466 struct ath12k_wmi_base *wmi_sc = &ab->wmi_ab; 3467 struct ath12k_wmi_init_cmd_arg arg = {}; 3468 3469 if (test_bit(WMI_TLV_SERVICE_REG_CC_EXT_EVENT_SUPPORT, 3470 ab->wmi_ab.svc_map)) 3471 arg.res_cfg.is_reg_cc_ext_event_supported = true; 3472 3473 ab->hw_params->wmi_init(ab, &arg.res_cfg); 3474 3475 arg.num_mem_chunks = wmi_sc->num_mem_chunks; 3476 arg.hw_mode_id = wmi_sc->preferred_hw_mode; 3477 arg.mem_chunks = wmi_sc->mem_chunks; 3478 3479 if (ab->hw_params->single_pdev_only) 3480 arg.hw_mode_id = WMI_HOST_HW_MODE_MAX; 3481 3482 arg.num_band_to_mac = ab->num_radios; 3483 ath12k_fill_band_to_mac_param(ab, arg.band_to_mac); 3484 3485 return ath12k_init_cmd_send(&wmi_sc->wmi[0], &arg); 3486 } 3487 3488 int ath12k_wmi_vdev_spectral_conf(struct ath12k *ar, 3489 struct ath12k_wmi_vdev_spectral_conf_arg *arg) 3490 { 3491 struct ath12k_wmi_vdev_spectral_conf_cmd *cmd; 3492 struct sk_buff *skb; 3493 int ret; 3494 3495 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd)); 3496 if (!skb) 3497 return -ENOMEM; 3498 3499 cmd = (struct ath12k_wmi_vdev_spectral_conf_cmd *)skb->data; 3500 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SPECTRAL_CONFIGURE_CMD, 3501 sizeof(*cmd)); 3502 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 3503 cmd->scan_count = cpu_to_le32(arg->scan_count); 3504 cmd->scan_period = cpu_to_le32(arg->scan_period); 3505 cmd->scan_priority = cpu_to_le32(arg->scan_priority); 3506 cmd->scan_fft_size = cpu_to_le32(arg->scan_fft_size); 3507 cmd->scan_gc_ena = cpu_to_le32(arg->scan_gc_ena); 3508 cmd->scan_restart_ena = cpu_to_le32(arg->scan_restart_ena); 3509 cmd->scan_noise_floor_ref = cpu_to_le32(arg->scan_noise_floor_ref); 3510 cmd->scan_init_delay = cpu_to_le32(arg->scan_init_delay); 3511 cmd->scan_nb_tone_thr = cpu_to_le32(arg->scan_nb_tone_thr); 3512 cmd->scan_str_bin_thr = cpu_to_le32(arg->scan_str_bin_thr); 3513 cmd->scan_wb_rpt_mode = cpu_to_le32(arg->scan_wb_rpt_mode); 3514 cmd->scan_rssi_rpt_mode = cpu_to_le32(arg->scan_rssi_rpt_mode); 3515 cmd->scan_rssi_thr = cpu_to_le32(arg->scan_rssi_thr); 3516 cmd->scan_pwr_format = cpu_to_le32(arg->scan_pwr_format); 3517 cmd->scan_rpt_mode = cpu_to_le32(arg->scan_rpt_mode); 3518 cmd->scan_bin_scale = cpu_to_le32(arg->scan_bin_scale); 3519 cmd->scan_dbm_adj = cpu_to_le32(arg->scan_dbm_adj); 3520 cmd->scan_chn_mask = cpu_to_le32(arg->scan_chn_mask); 3521 3522 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3523 "WMI spectral scan config cmd vdev_id 0x%x\n", 3524 arg->vdev_id); 3525 3526 ret = ath12k_wmi_cmd_send(ar->wmi, skb, 3527 WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID); 3528 if (ret) { 3529 ath12k_warn(ar->ab, 3530 "failed to send spectral scan config wmi cmd\n"); 3531 goto err; 3532 } 3533 3534 return 0; 3535 err: 3536 dev_kfree_skb(skb); 3537 return ret; 3538 } 3539 3540 int ath12k_wmi_vdev_spectral_enable(struct ath12k *ar, u32 vdev_id, 3541 u32 trigger, u32 enable) 3542 { 3543 struct ath12k_wmi_vdev_spectral_enable_cmd *cmd; 3544 struct sk_buff *skb; 3545 int ret; 3546 3547 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd)); 3548 if (!skb) 3549 return -ENOMEM; 3550 3551 cmd = (struct ath12k_wmi_vdev_spectral_enable_cmd *)skb->data; 3552 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SPECTRAL_ENABLE_CMD, 3553 sizeof(*cmd)); 3554 3555 cmd->vdev_id = cpu_to_le32(vdev_id); 3556 cmd->trigger_cmd = cpu_to_le32(trigger); 3557 cmd->enable_cmd = cpu_to_le32(enable); 3558 3559 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3560 "WMI spectral enable cmd vdev id 0x%x\n", 3561 vdev_id); 3562 3563 ret = ath12k_wmi_cmd_send(ar->wmi, skb, 3564 WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID); 3565 if (ret) { 3566 ath12k_warn(ar->ab, 3567 "failed to send spectral enable wmi cmd\n"); 3568 goto err; 3569 } 3570 3571 return 0; 3572 err: 3573 dev_kfree_skb(skb); 3574 return ret; 3575 } 3576 3577 int ath12k_wmi_pdev_dma_ring_cfg(struct ath12k *ar, 3578 struct ath12k_wmi_pdev_dma_ring_cfg_arg *arg) 3579 { 3580 struct ath12k_wmi_pdev_dma_ring_cfg_req_cmd *cmd; 3581 struct sk_buff *skb; 3582 int ret; 3583 3584 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd)); 3585 if (!skb) 3586 return -ENOMEM; 3587 3588 cmd = (struct ath12k_wmi_pdev_dma_ring_cfg_req_cmd *)skb->data; 3589 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_DMA_RING_CFG_REQ, 3590 sizeof(*cmd)); 3591 3592 cmd->pdev_id = cpu_to_le32(DP_SW2HW_MACID(arg->pdev_id)); 3593 cmd->module_id = cpu_to_le32(arg->module_id); 3594 cmd->base_paddr_lo = cpu_to_le32(arg->base_paddr_lo); 3595 cmd->base_paddr_hi = cpu_to_le32(arg->base_paddr_hi); 3596 cmd->head_idx_paddr_lo = cpu_to_le32(arg->head_idx_paddr_lo); 3597 cmd->head_idx_paddr_hi = cpu_to_le32(arg->head_idx_paddr_hi); 3598 cmd->tail_idx_paddr_lo = cpu_to_le32(arg->tail_idx_paddr_lo); 3599 cmd->tail_idx_paddr_hi = cpu_to_le32(arg->tail_idx_paddr_hi); 3600 cmd->num_elems = cpu_to_le32(arg->num_elems); 3601 cmd->buf_size = cpu_to_le32(arg->buf_size); 3602 cmd->num_resp_per_event = cpu_to_le32(arg->num_resp_per_event); 3603 cmd->event_timeout_ms = cpu_to_le32(arg->event_timeout_ms); 3604 3605 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3606 "WMI DMA ring cfg req cmd pdev_id 0x%x\n", 3607 arg->pdev_id); 3608 3609 ret = ath12k_wmi_cmd_send(ar->wmi, skb, 3610 WMI_PDEV_DMA_RING_CFG_REQ_CMDID); 3611 if (ret) { 3612 ath12k_warn(ar->ab, 3613 "failed to send dma ring cfg req wmi cmd\n"); 3614 goto err; 3615 } 3616 3617 return 0; 3618 err: 3619 dev_kfree_skb(skb); 3620 return ret; 3621 } 3622 3623 static int ath12k_wmi_dma_buf_entry_parse(struct ath12k_base *soc, 3624 u16 tag, u16 len, 3625 const void *ptr, void *data) 3626 { 3627 struct ath12k_wmi_dma_buf_release_arg *arg = data; 3628 3629 if (tag != WMI_TAG_DMA_BUF_RELEASE_ENTRY) 3630 return -EPROTO; 3631 3632 if (arg->num_buf_entry >= le32_to_cpu(arg->fixed.num_buf_release_entry)) 3633 return -ENOBUFS; 3634 3635 arg->num_buf_entry++; 3636 return 0; 3637 } 3638 3639 static int ath12k_wmi_dma_buf_meta_parse(struct ath12k_base *soc, 3640 u16 tag, u16 len, 3641 const void *ptr, void *data) 3642 { 3643 struct ath12k_wmi_dma_buf_release_arg *arg = data; 3644 3645 if (tag != WMI_TAG_DMA_BUF_RELEASE_SPECTRAL_META_DATA) 3646 return -EPROTO; 3647 3648 if (arg->num_meta >= le32_to_cpu(arg->fixed.num_meta_data_entry)) 3649 return -ENOBUFS; 3650 3651 arg->num_meta++; 3652 3653 return 0; 3654 } 3655 3656 static int ath12k_wmi_dma_buf_parse(struct ath12k_base *ab, 3657 u16 tag, u16 len, 3658 const void *ptr, void *data) 3659 { 3660 struct ath12k_wmi_dma_buf_release_arg *arg = data; 3661 const struct ath12k_wmi_dma_buf_release_fixed_params *fixed; 3662 u32 pdev_id; 3663 int ret; 3664 3665 switch (tag) { 3666 case WMI_TAG_DMA_BUF_RELEASE: 3667 fixed = ptr; 3668 arg->fixed = *fixed; 3669 pdev_id = DP_HW2SW_MACID(le32_to_cpu(fixed->pdev_id)); 3670 arg->fixed.pdev_id = cpu_to_le32(pdev_id); 3671 break; 3672 case WMI_TAG_ARRAY_STRUCT: 3673 if (!arg->buf_entry_done) { 3674 arg->num_buf_entry = 0; 3675 arg->buf_entry = ptr; 3676 3677 ret = ath12k_wmi_tlv_iter(ab, ptr, len, 3678 ath12k_wmi_dma_buf_entry_parse, 3679 arg); 3680 if (ret) { 3681 ath12k_warn(ab, "failed to parse dma buf entry tlv %d\n", 3682 ret); 3683 return ret; 3684 } 3685 3686 arg->buf_entry_done = true; 3687 } else if (!arg->meta_data_done) { 3688 arg->num_meta = 0; 3689 arg->meta_data = ptr; 3690 3691 ret = ath12k_wmi_tlv_iter(ab, ptr, len, 3692 ath12k_wmi_dma_buf_meta_parse, 3693 arg); 3694 if (ret) { 3695 ath12k_warn(ab, "failed to parse dma buf meta tlv %d\n", 3696 ret); 3697 return ret; 3698 } 3699 3700 arg->meta_data_done = true; 3701 } 3702 break; 3703 default: 3704 break; 3705 } 3706 return 0; 3707 } 3708 3709 static void ath12k_wmi_pdev_dma_ring_buf_release_event(struct ath12k_base *ab, 3710 struct sk_buff *skb) 3711 { 3712 struct ath12k_wmi_dma_buf_release_arg arg = {}; 3713 struct ath12k_dbring_buf_release_event param; 3714 int ret; 3715 3716 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 3717 ath12k_wmi_dma_buf_parse, 3718 &arg); 3719 if (ret) { 3720 ath12k_warn(ab, "failed to parse dma buf release tlv %d\n", ret); 3721 return; 3722 } 3723 3724 param.fixed = arg.fixed; 3725 param.buf_entry = arg.buf_entry; 3726 param.num_buf_entry = arg.num_buf_entry; 3727 param.meta_data = arg.meta_data; 3728 param.num_meta = arg.num_meta; 3729 3730 ret = ath12k_dbring_buffer_release_event(ab, ¶m); 3731 if (ret) { 3732 ath12k_warn(ab, "failed to handle dma buf release event %d\n", ret); 3733 return; 3734 } 3735 } 3736 3737 static int ath12k_wmi_hw_mode_caps_parse(struct ath12k_base *soc, 3738 u16 tag, u16 len, 3739 const void *ptr, void *data) 3740 { 3741 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data; 3742 struct ath12k_wmi_hw_mode_cap_params *hw_mode_cap; 3743 u32 phy_map = 0; 3744 3745 if (tag != WMI_TAG_HW_MODE_CAPABILITIES) 3746 return -EPROTO; 3747 3748 if (svc_rdy_ext->n_hw_mode_caps >= svc_rdy_ext->arg.num_hw_modes) 3749 return -ENOBUFS; 3750 3751 hw_mode_cap = container_of(ptr, struct ath12k_wmi_hw_mode_cap_params, 3752 hw_mode_id); 3753 svc_rdy_ext->n_hw_mode_caps++; 3754 3755 phy_map = le32_to_cpu(hw_mode_cap->phy_id_map); 3756 svc_rdy_ext->tot_phy_id += fls(phy_map); 3757 3758 return 0; 3759 } 3760 3761 static int ath12k_wmi_hw_mode_caps(struct ath12k_base *soc, 3762 u16 len, const void *ptr, void *data) 3763 { 3764 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data; 3765 const struct ath12k_wmi_hw_mode_cap_params *hw_mode_caps; 3766 enum wmi_host_hw_mode_config_type mode, pref; 3767 u32 i; 3768 int ret; 3769 3770 svc_rdy_ext->n_hw_mode_caps = 0; 3771 svc_rdy_ext->hw_mode_caps = ptr; 3772 3773 ret = ath12k_wmi_tlv_iter(soc, ptr, len, 3774 ath12k_wmi_hw_mode_caps_parse, 3775 svc_rdy_ext); 3776 if (ret) { 3777 ath12k_warn(soc, "failed to parse tlv %d\n", ret); 3778 return ret; 3779 } 3780 3781 for (i = 0 ; i < svc_rdy_ext->n_hw_mode_caps; i++) { 3782 hw_mode_caps = &svc_rdy_ext->hw_mode_caps[i]; 3783 mode = le32_to_cpu(hw_mode_caps->hw_mode_id); 3784 3785 if (mode >= WMI_HOST_HW_MODE_MAX) 3786 continue; 3787 3788 pref = soc->wmi_ab.preferred_hw_mode; 3789 3790 if (ath12k_hw_mode_pri_map[mode] < ath12k_hw_mode_pri_map[pref]) { 3791 svc_rdy_ext->pref_hw_mode_caps = *hw_mode_caps; 3792 soc->wmi_ab.preferred_hw_mode = mode; 3793 } 3794 } 3795 3796 ath12k_dbg(soc, ATH12K_DBG_WMI, "preferred_hw_mode:%d\n", 3797 soc->wmi_ab.preferred_hw_mode); 3798 if (soc->wmi_ab.preferred_hw_mode == WMI_HOST_HW_MODE_MAX) 3799 return -EINVAL; 3800 3801 return 0; 3802 } 3803 3804 static int ath12k_wmi_mac_phy_caps_parse(struct ath12k_base *soc, 3805 u16 tag, u16 len, 3806 const void *ptr, void *data) 3807 { 3808 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data; 3809 3810 if (tag != WMI_TAG_MAC_PHY_CAPABILITIES) 3811 return -EPROTO; 3812 3813 if (svc_rdy_ext->n_mac_phy_caps >= svc_rdy_ext->tot_phy_id) 3814 return -ENOBUFS; 3815 3816 len = min_t(u16, len, sizeof(struct ath12k_wmi_mac_phy_caps_params)); 3817 if (!svc_rdy_ext->n_mac_phy_caps) { 3818 svc_rdy_ext->mac_phy_caps = kzalloc((svc_rdy_ext->tot_phy_id) * len, 3819 GFP_ATOMIC); 3820 if (!svc_rdy_ext->mac_phy_caps) 3821 return -ENOMEM; 3822 } 3823 3824 memcpy(svc_rdy_ext->mac_phy_caps + svc_rdy_ext->n_mac_phy_caps, ptr, len); 3825 svc_rdy_ext->n_mac_phy_caps++; 3826 return 0; 3827 } 3828 3829 static int ath12k_wmi_ext_hal_reg_caps_parse(struct ath12k_base *soc, 3830 u16 tag, u16 len, 3831 const void *ptr, void *data) 3832 { 3833 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data; 3834 3835 if (tag != WMI_TAG_HAL_REG_CAPABILITIES_EXT) 3836 return -EPROTO; 3837 3838 if (svc_rdy_ext->n_ext_hal_reg_caps >= svc_rdy_ext->arg.num_phy) 3839 return -ENOBUFS; 3840 3841 svc_rdy_ext->n_ext_hal_reg_caps++; 3842 return 0; 3843 } 3844 3845 static int ath12k_wmi_ext_hal_reg_caps(struct ath12k_base *soc, 3846 u16 len, const void *ptr, void *data) 3847 { 3848 struct ath12k_wmi_pdev *wmi_handle = &soc->wmi_ab.wmi[0]; 3849 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data; 3850 struct ath12k_wmi_hal_reg_capabilities_ext_arg reg_cap; 3851 int ret; 3852 u32 i; 3853 3854 svc_rdy_ext->n_ext_hal_reg_caps = 0; 3855 svc_rdy_ext->ext_hal_reg_caps = ptr; 3856 ret = ath12k_wmi_tlv_iter(soc, ptr, len, 3857 ath12k_wmi_ext_hal_reg_caps_parse, 3858 svc_rdy_ext); 3859 if (ret) { 3860 ath12k_warn(soc, "failed to parse tlv %d\n", ret); 3861 return ret; 3862 } 3863 3864 for (i = 0; i < svc_rdy_ext->arg.num_phy; i++) { 3865 ret = ath12k_pull_reg_cap_svc_rdy_ext(wmi_handle, 3866 svc_rdy_ext->soc_hal_reg_caps, 3867 svc_rdy_ext->ext_hal_reg_caps, i, 3868 ®_cap); 3869 if (ret) { 3870 ath12k_warn(soc, "failed to extract reg cap %d\n", i); 3871 return ret; 3872 } 3873 soc->hal_reg_cap[reg_cap.phy_id] = reg_cap; 3874 } 3875 return 0; 3876 } 3877 3878 static int ath12k_wmi_ext_soc_hal_reg_caps_parse(struct ath12k_base *soc, 3879 u16 len, const void *ptr, 3880 void *data) 3881 { 3882 struct ath12k_wmi_pdev *wmi_handle = &soc->wmi_ab.wmi[0]; 3883 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data; 3884 u8 hw_mode_id = le32_to_cpu(svc_rdy_ext->pref_hw_mode_caps.hw_mode_id); 3885 u32 phy_id_map; 3886 int pdev_index = 0; 3887 int ret; 3888 3889 svc_rdy_ext->soc_hal_reg_caps = ptr; 3890 svc_rdy_ext->arg.num_phy = le32_to_cpu(svc_rdy_ext->soc_hal_reg_caps->num_phy); 3891 3892 soc->num_radios = 0; 3893 phy_id_map = le32_to_cpu(svc_rdy_ext->pref_hw_mode_caps.phy_id_map); 3894 soc->fw_pdev_count = 0; 3895 3896 while (phy_id_map && soc->num_radios < MAX_RADIOS) { 3897 ret = ath12k_pull_mac_phy_cap_svc_ready_ext(wmi_handle, 3898 svc_rdy_ext, 3899 hw_mode_id, soc->num_radios, 3900 &soc->pdevs[pdev_index]); 3901 if (ret) { 3902 ath12k_warn(soc, "failed to extract mac caps, idx :%d\n", 3903 soc->num_radios); 3904 return ret; 3905 } 3906 3907 soc->num_radios++; 3908 3909 /* For single_pdev_only targets, 3910 * save mac_phy capability in the same pdev 3911 */ 3912 if (soc->hw_params->single_pdev_only) 3913 pdev_index = 0; 3914 else 3915 pdev_index = soc->num_radios; 3916 3917 /* TODO: mac_phy_cap prints */ 3918 phy_id_map >>= 1; 3919 } 3920 3921 if (soc->hw_params->single_pdev_only) { 3922 soc->num_radios = 1; 3923 soc->pdevs[0].pdev_id = 0; 3924 } 3925 3926 return 0; 3927 } 3928 3929 static int ath12k_wmi_dma_ring_caps_parse(struct ath12k_base *soc, 3930 u16 tag, u16 len, 3931 const void *ptr, void *data) 3932 { 3933 struct ath12k_wmi_dma_ring_caps_parse *parse = data; 3934 3935 if (tag != WMI_TAG_DMA_RING_CAPABILITIES) 3936 return -EPROTO; 3937 3938 parse->n_dma_ring_caps++; 3939 return 0; 3940 } 3941 3942 static int ath12k_wmi_alloc_dbring_caps(struct ath12k_base *ab, 3943 u32 num_cap) 3944 { 3945 size_t sz; 3946 void *ptr; 3947 3948 sz = num_cap * sizeof(struct ath12k_dbring_cap); 3949 ptr = kzalloc(sz, GFP_ATOMIC); 3950 if (!ptr) 3951 return -ENOMEM; 3952 3953 ab->db_caps = ptr; 3954 ab->num_db_cap = num_cap; 3955 3956 return 0; 3957 } 3958 3959 static void ath12k_wmi_free_dbring_caps(struct ath12k_base *ab) 3960 { 3961 kfree(ab->db_caps); 3962 ab->db_caps = NULL; 3963 } 3964 3965 static int ath12k_wmi_dma_ring_caps(struct ath12k_base *ab, 3966 u16 len, const void *ptr, void *data) 3967 { 3968 struct ath12k_wmi_dma_ring_caps_parse *dma_caps_parse = data; 3969 struct ath12k_wmi_dma_ring_caps_params *dma_caps; 3970 struct ath12k_dbring_cap *dir_buff_caps; 3971 int ret; 3972 u32 i; 3973 3974 dma_caps_parse->n_dma_ring_caps = 0; 3975 dma_caps = (struct ath12k_wmi_dma_ring_caps_params *)ptr; 3976 ret = ath12k_wmi_tlv_iter(ab, ptr, len, 3977 ath12k_wmi_dma_ring_caps_parse, 3978 dma_caps_parse); 3979 if (ret) { 3980 ath12k_warn(ab, "failed to parse dma ring caps tlv %d\n", ret); 3981 return ret; 3982 } 3983 3984 if (!dma_caps_parse->n_dma_ring_caps) 3985 return 0; 3986 3987 if (ab->num_db_cap) { 3988 ath12k_warn(ab, "Already processed, so ignoring dma ring caps\n"); 3989 return 0; 3990 } 3991 3992 ret = ath12k_wmi_alloc_dbring_caps(ab, dma_caps_parse->n_dma_ring_caps); 3993 if (ret) 3994 return ret; 3995 3996 dir_buff_caps = ab->db_caps; 3997 for (i = 0; i < dma_caps_parse->n_dma_ring_caps; i++) { 3998 if (le32_to_cpu(dma_caps[i].module_id) >= WMI_DIRECT_BUF_MAX) { 3999 ath12k_warn(ab, "Invalid module id %d\n", 4000 le32_to_cpu(dma_caps[i].module_id)); 4001 ret = -EINVAL; 4002 goto free_dir_buff; 4003 } 4004 4005 dir_buff_caps[i].id = le32_to_cpu(dma_caps[i].module_id); 4006 dir_buff_caps[i].pdev_id = 4007 DP_HW2SW_MACID(le32_to_cpu(dma_caps[i].pdev_id)); 4008 dir_buff_caps[i].min_elem = le32_to_cpu(dma_caps[i].min_elem); 4009 dir_buff_caps[i].min_buf_sz = le32_to_cpu(dma_caps[i].min_buf_sz); 4010 dir_buff_caps[i].min_buf_align = le32_to_cpu(dma_caps[i].min_buf_align); 4011 } 4012 4013 return 0; 4014 4015 free_dir_buff: 4016 ath12k_wmi_free_dbring_caps(ab); 4017 return ret; 4018 } 4019 4020 static int ath12k_wmi_svc_rdy_ext_parse(struct ath12k_base *ab, 4021 u16 tag, u16 len, 4022 const void *ptr, void *data) 4023 { 4024 struct ath12k_wmi_pdev *wmi_handle = &ab->wmi_ab.wmi[0]; 4025 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data; 4026 int ret; 4027 4028 switch (tag) { 4029 case WMI_TAG_SERVICE_READY_EXT_EVENT: 4030 ret = ath12k_pull_svc_ready_ext(wmi_handle, ptr, 4031 &svc_rdy_ext->arg); 4032 if (ret) { 4033 ath12k_warn(ab, "unable to extract ext params\n"); 4034 return ret; 4035 } 4036 break; 4037 4038 case WMI_TAG_SOC_MAC_PHY_HW_MODE_CAPS: 4039 svc_rdy_ext->hw_caps = ptr; 4040 svc_rdy_ext->arg.num_hw_modes = 4041 le32_to_cpu(svc_rdy_ext->hw_caps->num_hw_modes); 4042 break; 4043 4044 case WMI_TAG_SOC_HAL_REG_CAPABILITIES: 4045 ret = ath12k_wmi_ext_soc_hal_reg_caps_parse(ab, len, ptr, 4046 svc_rdy_ext); 4047 if (ret) 4048 return ret; 4049 break; 4050 4051 case WMI_TAG_ARRAY_STRUCT: 4052 if (!svc_rdy_ext->hw_mode_done) { 4053 ret = ath12k_wmi_hw_mode_caps(ab, len, ptr, svc_rdy_ext); 4054 if (ret) 4055 return ret; 4056 4057 svc_rdy_ext->hw_mode_done = true; 4058 } else if (!svc_rdy_ext->mac_phy_done) { 4059 svc_rdy_ext->n_mac_phy_caps = 0; 4060 ret = ath12k_wmi_tlv_iter(ab, ptr, len, 4061 ath12k_wmi_mac_phy_caps_parse, 4062 svc_rdy_ext); 4063 if (ret) { 4064 ath12k_warn(ab, "failed to parse tlv %d\n", ret); 4065 return ret; 4066 } 4067 4068 svc_rdy_ext->mac_phy_done = true; 4069 } else if (!svc_rdy_ext->ext_hal_reg_done) { 4070 ret = ath12k_wmi_ext_hal_reg_caps(ab, len, ptr, svc_rdy_ext); 4071 if (ret) 4072 return ret; 4073 4074 svc_rdy_ext->ext_hal_reg_done = true; 4075 } else if (!svc_rdy_ext->mac_phy_chainmask_combo_done) { 4076 svc_rdy_ext->mac_phy_chainmask_combo_done = true; 4077 } else if (!svc_rdy_ext->mac_phy_chainmask_cap_done) { 4078 svc_rdy_ext->mac_phy_chainmask_cap_done = true; 4079 } else if (!svc_rdy_ext->oem_dma_ring_cap_done) { 4080 svc_rdy_ext->oem_dma_ring_cap_done = true; 4081 } else if (!svc_rdy_ext->dma_ring_cap_done) { 4082 ret = ath12k_wmi_dma_ring_caps(ab, len, ptr, 4083 &svc_rdy_ext->dma_caps_parse); 4084 if (ret) 4085 return ret; 4086 4087 svc_rdy_ext->dma_ring_cap_done = true; 4088 } 4089 break; 4090 4091 default: 4092 break; 4093 } 4094 return 0; 4095 } 4096 4097 static int ath12k_service_ready_ext_event(struct ath12k_base *ab, 4098 struct sk_buff *skb) 4099 { 4100 struct ath12k_wmi_svc_rdy_ext_parse svc_rdy_ext = { }; 4101 int ret; 4102 4103 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 4104 ath12k_wmi_svc_rdy_ext_parse, 4105 &svc_rdy_ext); 4106 if (ret) { 4107 ath12k_warn(ab, "failed to parse tlv %d\n", ret); 4108 goto err; 4109 } 4110 4111 if (!test_bit(WMI_TLV_SERVICE_EXT2_MSG, ab->wmi_ab.svc_map)) 4112 complete(&ab->wmi_ab.service_ready); 4113 4114 kfree(svc_rdy_ext.mac_phy_caps); 4115 return 0; 4116 4117 err: 4118 ath12k_wmi_free_dbring_caps(ab); 4119 return ret; 4120 } 4121 4122 static int ath12k_pull_svc_ready_ext2(struct ath12k_wmi_pdev *wmi_handle, 4123 const void *ptr, 4124 struct ath12k_wmi_svc_rdy_ext2_arg *arg) 4125 { 4126 const struct wmi_service_ready_ext2_event *ev = ptr; 4127 4128 if (!ev) 4129 return -EINVAL; 4130 4131 arg->reg_db_version = le32_to_cpu(ev->reg_db_version); 4132 arg->hw_min_max_tx_power_2ghz = le32_to_cpu(ev->hw_min_max_tx_power_2ghz); 4133 arg->hw_min_max_tx_power_5ghz = le32_to_cpu(ev->hw_min_max_tx_power_5ghz); 4134 arg->chwidth_num_peer_caps = le32_to_cpu(ev->chwidth_num_peer_caps); 4135 arg->preamble_puncture_bw = le32_to_cpu(ev->preamble_puncture_bw); 4136 arg->max_user_per_ppdu_ofdma = le32_to_cpu(ev->max_user_per_ppdu_ofdma); 4137 arg->max_user_per_ppdu_mumimo = le32_to_cpu(ev->max_user_per_ppdu_mumimo); 4138 arg->target_cap_flags = le32_to_cpu(ev->target_cap_flags); 4139 return 0; 4140 } 4141 4142 static void ath12k_wmi_eht_caps_parse(struct ath12k_pdev *pdev, u32 band, 4143 const __le32 cap_mac_info[], 4144 const __le32 cap_phy_info[], 4145 const __le32 supp_mcs[], 4146 const struct ath12k_wmi_ppe_threshold_params *ppet, 4147 __le32 cap_info_internal) 4148 { 4149 struct ath12k_band_cap *cap_band = &pdev->cap.band[band]; 4150 u8 i; 4151 4152 for (i = 0; i < WMI_MAX_EHTCAP_MAC_SIZE; i++) 4153 cap_band->eht_cap_mac_info[i] = le32_to_cpu(cap_mac_info[i]); 4154 4155 for (i = 0; i < WMI_MAX_EHTCAP_PHY_SIZE; i++) 4156 cap_band->eht_cap_phy_info[i] = le32_to_cpu(cap_phy_info[i]); 4157 4158 cap_band->eht_mcs_20_only = le32_to_cpu(supp_mcs[0]); 4159 cap_band->eht_mcs_80 = le32_to_cpu(supp_mcs[1]); 4160 if (band != NL80211_BAND_2GHZ) { 4161 cap_band->eht_mcs_160 = le32_to_cpu(supp_mcs[2]); 4162 cap_band->eht_mcs_320 = le32_to_cpu(supp_mcs[3]); 4163 } 4164 4165 cap_band->eht_ppet.numss_m1 = le32_to_cpu(ppet->numss_m1); 4166 cap_band->eht_ppet.ru_bit_mask = le32_to_cpu(ppet->ru_info); 4167 for (i = 0; i < WMI_MAX_NUM_SS; i++) 4168 cap_band->eht_ppet.ppet16_ppet8_ru3_ru0[i] = 4169 le32_to_cpu(ppet->ppet16_ppet8_ru3_ru0[i]); 4170 4171 cap_band->eht_cap_info_internal = le32_to_cpu(cap_info_internal); 4172 } 4173 4174 static int 4175 ath12k_wmi_tlv_mac_phy_caps_ext_parse(struct ath12k_base *ab, 4176 const struct ath12k_wmi_caps_ext_params *caps, 4177 struct ath12k_pdev *pdev) 4178 { 4179 u32 bands; 4180 int i; 4181 4182 if (ab->hw_params->single_pdev_only) { 4183 for (i = 0; i < ab->fw_pdev_count; i++) { 4184 struct ath12k_fw_pdev *fw_pdev = &ab->fw_pdev[i]; 4185 4186 if (fw_pdev->pdev_id == le32_to_cpu(caps->pdev_id) && 4187 fw_pdev->phy_id == le32_to_cpu(caps->phy_id)) { 4188 bands = fw_pdev->supported_bands; 4189 break; 4190 } 4191 } 4192 4193 if (i == ab->fw_pdev_count) 4194 return -EINVAL; 4195 } else { 4196 bands = pdev->cap.supported_bands; 4197 } 4198 4199 if (bands & WMI_HOST_WLAN_2G_CAP) { 4200 ath12k_wmi_eht_caps_parse(pdev, NL80211_BAND_2GHZ, 4201 caps->eht_cap_mac_info_2ghz, 4202 caps->eht_cap_phy_info_2ghz, 4203 caps->eht_supp_mcs_ext_2ghz, 4204 &caps->eht_ppet_2ghz, 4205 caps->eht_cap_info_internal); 4206 } 4207 4208 if (bands & WMI_HOST_WLAN_5G_CAP) { 4209 ath12k_wmi_eht_caps_parse(pdev, NL80211_BAND_5GHZ, 4210 caps->eht_cap_mac_info_5ghz, 4211 caps->eht_cap_phy_info_5ghz, 4212 caps->eht_supp_mcs_ext_5ghz, 4213 &caps->eht_ppet_5ghz, 4214 caps->eht_cap_info_internal); 4215 4216 ath12k_wmi_eht_caps_parse(pdev, NL80211_BAND_6GHZ, 4217 caps->eht_cap_mac_info_5ghz, 4218 caps->eht_cap_phy_info_5ghz, 4219 caps->eht_supp_mcs_ext_5ghz, 4220 &caps->eht_ppet_5ghz, 4221 caps->eht_cap_info_internal); 4222 } 4223 4224 return 0; 4225 } 4226 4227 static int ath12k_wmi_tlv_mac_phy_caps_ext(struct ath12k_base *ab, u16 tag, 4228 u16 len, const void *ptr, 4229 void *data) 4230 { 4231 const struct ath12k_wmi_caps_ext_params *caps = ptr; 4232 int i = 0, ret; 4233 4234 if (tag != WMI_TAG_MAC_PHY_CAPABILITIES_EXT) 4235 return -EPROTO; 4236 4237 if (ab->hw_params->single_pdev_only) { 4238 if (ab->wmi_ab.preferred_hw_mode != le32_to_cpu(caps->hw_mode_id)) 4239 return 0; 4240 } else { 4241 for (i = 0; i < ab->num_radios; i++) { 4242 if (ab->pdevs[i].pdev_id == le32_to_cpu(caps->pdev_id)) 4243 break; 4244 } 4245 4246 if (i == ab->num_radios) 4247 return -EINVAL; 4248 } 4249 4250 ret = ath12k_wmi_tlv_mac_phy_caps_ext_parse(ab, caps, &ab->pdevs[i]); 4251 if (ret) { 4252 ath12k_warn(ab, 4253 "failed to parse extended MAC PHY capabilities for pdev %d: %d\n", 4254 ret, ab->pdevs[i].pdev_id); 4255 return ret; 4256 } 4257 4258 return 0; 4259 } 4260 4261 static int ath12k_wmi_svc_rdy_ext2_parse(struct ath12k_base *ab, 4262 u16 tag, u16 len, 4263 const void *ptr, void *data) 4264 { 4265 struct ath12k_wmi_pdev *wmi_handle = &ab->wmi_ab.wmi[0]; 4266 struct ath12k_wmi_svc_rdy_ext2_parse *parse = data; 4267 int ret; 4268 4269 switch (tag) { 4270 case WMI_TAG_SERVICE_READY_EXT2_EVENT: 4271 ret = ath12k_pull_svc_ready_ext2(wmi_handle, ptr, 4272 &parse->arg); 4273 if (ret) { 4274 ath12k_warn(ab, 4275 "failed to extract wmi service ready ext2 parameters: %d\n", 4276 ret); 4277 return ret; 4278 } 4279 break; 4280 4281 case WMI_TAG_ARRAY_STRUCT: 4282 if (!parse->dma_ring_cap_done) { 4283 ret = ath12k_wmi_dma_ring_caps(ab, len, ptr, 4284 &parse->dma_caps_parse); 4285 if (ret) 4286 return ret; 4287 4288 parse->dma_ring_cap_done = true; 4289 } else if (!parse->spectral_bin_scaling_done) { 4290 /* TODO: This is a place-holder as WMI tag for 4291 * spectral scaling is before 4292 * WMI_TAG_MAC_PHY_CAPABILITIES_EXT 4293 */ 4294 parse->spectral_bin_scaling_done = true; 4295 } else if (!parse->mac_phy_caps_ext_done) { 4296 ret = ath12k_wmi_tlv_iter(ab, ptr, len, 4297 ath12k_wmi_tlv_mac_phy_caps_ext, 4298 parse); 4299 if (ret) { 4300 ath12k_warn(ab, "failed to parse extended MAC PHY capabilities WMI TLV: %d\n", 4301 ret); 4302 return ret; 4303 } 4304 4305 parse->mac_phy_caps_ext_done = true; 4306 } 4307 break; 4308 default: 4309 break; 4310 } 4311 4312 return 0; 4313 } 4314 4315 static int ath12k_service_ready_ext2_event(struct ath12k_base *ab, 4316 struct sk_buff *skb) 4317 { 4318 struct ath12k_wmi_svc_rdy_ext2_parse svc_rdy_ext2 = { }; 4319 int ret; 4320 4321 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 4322 ath12k_wmi_svc_rdy_ext2_parse, 4323 &svc_rdy_ext2); 4324 if (ret) { 4325 ath12k_warn(ab, "failed to parse ext2 event tlv %d\n", ret); 4326 goto err; 4327 } 4328 4329 complete(&ab->wmi_ab.service_ready); 4330 4331 return 0; 4332 4333 err: 4334 ath12k_wmi_free_dbring_caps(ab); 4335 return ret; 4336 } 4337 4338 static int ath12k_pull_vdev_start_resp_tlv(struct ath12k_base *ab, struct sk_buff *skb, 4339 struct wmi_vdev_start_resp_event *vdev_rsp) 4340 { 4341 const void **tb; 4342 const struct wmi_vdev_start_resp_event *ev; 4343 int ret; 4344 4345 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC); 4346 if (IS_ERR(tb)) { 4347 ret = PTR_ERR(tb); 4348 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 4349 return ret; 4350 } 4351 4352 ev = tb[WMI_TAG_VDEV_START_RESPONSE_EVENT]; 4353 if (!ev) { 4354 ath12k_warn(ab, "failed to fetch vdev start resp ev"); 4355 kfree(tb); 4356 return -EPROTO; 4357 } 4358 4359 *vdev_rsp = *ev; 4360 4361 kfree(tb); 4362 return 0; 4363 } 4364 4365 static struct ath12k_reg_rule 4366 *create_ext_reg_rules_from_wmi(u32 num_reg_rules, 4367 struct ath12k_wmi_reg_rule_ext_params *wmi_reg_rule) 4368 { 4369 struct ath12k_reg_rule *reg_rule_ptr; 4370 u32 count; 4371 4372 reg_rule_ptr = kzalloc((num_reg_rules * sizeof(*reg_rule_ptr)), 4373 GFP_ATOMIC); 4374 4375 if (!reg_rule_ptr) 4376 return NULL; 4377 4378 for (count = 0; count < num_reg_rules; count++) { 4379 reg_rule_ptr[count].start_freq = 4380 le32_get_bits(wmi_reg_rule[count].freq_info, 4381 REG_RULE_START_FREQ); 4382 reg_rule_ptr[count].end_freq = 4383 le32_get_bits(wmi_reg_rule[count].freq_info, 4384 REG_RULE_END_FREQ); 4385 reg_rule_ptr[count].max_bw = 4386 le32_get_bits(wmi_reg_rule[count].bw_pwr_info, 4387 REG_RULE_MAX_BW); 4388 reg_rule_ptr[count].reg_power = 4389 le32_get_bits(wmi_reg_rule[count].bw_pwr_info, 4390 REG_RULE_REG_PWR); 4391 reg_rule_ptr[count].ant_gain = 4392 le32_get_bits(wmi_reg_rule[count].bw_pwr_info, 4393 REG_RULE_ANT_GAIN); 4394 reg_rule_ptr[count].flags = 4395 le32_get_bits(wmi_reg_rule[count].flag_info, 4396 REG_RULE_FLAGS); 4397 reg_rule_ptr[count].psd_flag = 4398 le32_get_bits(wmi_reg_rule[count].psd_power_info, 4399 REG_RULE_PSD_INFO); 4400 reg_rule_ptr[count].psd_eirp = 4401 le32_get_bits(wmi_reg_rule[count].psd_power_info, 4402 REG_RULE_PSD_EIRP); 4403 } 4404 4405 return reg_rule_ptr; 4406 } 4407 4408 static int ath12k_pull_reg_chan_list_ext_update_ev(struct ath12k_base *ab, 4409 struct sk_buff *skb, 4410 struct ath12k_reg_info *reg_info) 4411 { 4412 const void **tb; 4413 const struct wmi_reg_chan_list_cc_ext_event *ev; 4414 struct ath12k_wmi_reg_rule_ext_params *ext_wmi_reg_rule; 4415 u32 num_2g_reg_rules, num_5g_reg_rules; 4416 u32 num_6g_reg_rules_ap[WMI_REG_CURRENT_MAX_AP_TYPE]; 4417 u32 num_6g_reg_rules_cl[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE]; 4418 u32 total_reg_rules = 0; 4419 int ret, i, j; 4420 4421 ath12k_dbg(ab, ATH12K_DBG_WMI, "processing regulatory ext channel list\n"); 4422 4423 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC); 4424 if (IS_ERR(tb)) { 4425 ret = PTR_ERR(tb); 4426 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 4427 return ret; 4428 } 4429 4430 ev = tb[WMI_TAG_REG_CHAN_LIST_CC_EXT_EVENT]; 4431 if (!ev) { 4432 ath12k_warn(ab, "failed to fetch reg chan list ext update ev\n"); 4433 kfree(tb); 4434 return -EPROTO; 4435 } 4436 4437 reg_info->num_2g_reg_rules = le32_to_cpu(ev->num_2g_reg_rules); 4438 reg_info->num_5g_reg_rules = le32_to_cpu(ev->num_5g_reg_rules); 4439 reg_info->num_6g_reg_rules_ap[WMI_REG_INDOOR_AP] = 4440 le32_to_cpu(ev->num_6g_reg_rules_ap_lpi); 4441 reg_info->num_6g_reg_rules_ap[WMI_REG_STD_POWER_AP] = 4442 le32_to_cpu(ev->num_6g_reg_rules_ap_sp); 4443 reg_info->num_6g_reg_rules_ap[WMI_REG_VLP_AP] = 4444 le32_to_cpu(ev->num_6g_reg_rules_ap_vlp); 4445 4446 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) { 4447 reg_info->num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i] = 4448 le32_to_cpu(ev->num_6g_reg_rules_cl_lpi[i]); 4449 reg_info->num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i] = 4450 le32_to_cpu(ev->num_6g_reg_rules_cl_sp[i]); 4451 reg_info->num_6g_reg_rules_cl[WMI_REG_VLP_AP][i] = 4452 le32_to_cpu(ev->num_6g_reg_rules_cl_vlp[i]); 4453 } 4454 4455 num_2g_reg_rules = reg_info->num_2g_reg_rules; 4456 total_reg_rules += num_2g_reg_rules; 4457 num_5g_reg_rules = reg_info->num_5g_reg_rules; 4458 total_reg_rules += num_5g_reg_rules; 4459 4460 if (num_2g_reg_rules > MAX_REG_RULES || num_5g_reg_rules > MAX_REG_RULES) { 4461 ath12k_warn(ab, "Num reg rules for 2G/5G exceeds max limit (num_2g_reg_rules: %d num_5g_reg_rules: %d max_rules: %d)\n", 4462 num_2g_reg_rules, num_5g_reg_rules, MAX_REG_RULES); 4463 kfree(tb); 4464 return -EINVAL; 4465 } 4466 4467 for (i = 0; i < WMI_REG_CURRENT_MAX_AP_TYPE; i++) { 4468 num_6g_reg_rules_ap[i] = reg_info->num_6g_reg_rules_ap[i]; 4469 4470 if (num_6g_reg_rules_ap[i] > MAX_6G_REG_RULES) { 4471 ath12k_warn(ab, "Num 6G reg rules for AP mode(%d) exceeds max limit (num_6g_reg_rules_ap: %d, max_rules: %d)\n", 4472 i, num_6g_reg_rules_ap[i], MAX_6G_REG_RULES); 4473 kfree(tb); 4474 return -EINVAL; 4475 } 4476 4477 total_reg_rules += num_6g_reg_rules_ap[i]; 4478 } 4479 4480 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) { 4481 num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i] = 4482 reg_info->num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i]; 4483 total_reg_rules += num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i]; 4484 4485 num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i] = 4486 reg_info->num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i]; 4487 total_reg_rules += num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i]; 4488 4489 num_6g_reg_rules_cl[WMI_REG_VLP_AP][i] = 4490 reg_info->num_6g_reg_rules_cl[WMI_REG_VLP_AP][i]; 4491 total_reg_rules += num_6g_reg_rules_cl[WMI_REG_VLP_AP][i]; 4492 4493 if (num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i] > MAX_6G_REG_RULES || 4494 num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i] > MAX_6G_REG_RULES || 4495 num_6g_reg_rules_cl[WMI_REG_VLP_AP][i] > MAX_6G_REG_RULES) { 4496 ath12k_warn(ab, "Num 6g client reg rules exceeds max limit, for client(type: %d)\n", 4497 i); 4498 kfree(tb); 4499 return -EINVAL; 4500 } 4501 } 4502 4503 if (!total_reg_rules) { 4504 ath12k_warn(ab, "No reg rules available\n"); 4505 kfree(tb); 4506 return -EINVAL; 4507 } 4508 4509 memcpy(reg_info->alpha2, &ev->alpha2, REG_ALPHA2_LEN); 4510 4511 /* FIXME: Currently FW includes 6G reg rule also in 5G rule 4512 * list for country US. 4513 * Having same 6G reg rule in 5G and 6G rules list causes 4514 * intersect check to be true, and same rules will be shown 4515 * multiple times in iw cmd. So added hack below to avoid 4516 * parsing 6G rule from 5G reg rule list, and this can be 4517 * removed later, after FW updates to remove 6G reg rule 4518 * from 5G rules list. 4519 */ 4520 if (memcmp(reg_info->alpha2, "US", 2) == 0) { 4521 reg_info->num_5g_reg_rules = REG_US_5G_NUM_REG_RULES; 4522 num_5g_reg_rules = reg_info->num_5g_reg_rules; 4523 } 4524 4525 reg_info->dfs_region = le32_to_cpu(ev->dfs_region); 4526 reg_info->phybitmap = le32_to_cpu(ev->phybitmap); 4527 reg_info->num_phy = le32_to_cpu(ev->num_phy); 4528 reg_info->phy_id = le32_to_cpu(ev->phy_id); 4529 reg_info->ctry_code = le32_to_cpu(ev->country_id); 4530 reg_info->reg_dmn_pair = le32_to_cpu(ev->domain_code); 4531 4532 switch (le32_to_cpu(ev->status_code)) { 4533 case WMI_REG_SET_CC_STATUS_PASS: 4534 reg_info->status_code = REG_SET_CC_STATUS_PASS; 4535 break; 4536 case WMI_REG_CURRENT_ALPHA2_NOT_FOUND: 4537 reg_info->status_code = REG_CURRENT_ALPHA2_NOT_FOUND; 4538 break; 4539 case WMI_REG_INIT_ALPHA2_NOT_FOUND: 4540 reg_info->status_code = REG_INIT_ALPHA2_NOT_FOUND; 4541 break; 4542 case WMI_REG_SET_CC_CHANGE_NOT_ALLOWED: 4543 reg_info->status_code = REG_SET_CC_CHANGE_NOT_ALLOWED; 4544 break; 4545 case WMI_REG_SET_CC_STATUS_NO_MEMORY: 4546 reg_info->status_code = REG_SET_CC_STATUS_NO_MEMORY; 4547 break; 4548 case WMI_REG_SET_CC_STATUS_FAIL: 4549 reg_info->status_code = REG_SET_CC_STATUS_FAIL; 4550 break; 4551 } 4552 4553 reg_info->is_ext_reg_event = true; 4554 4555 reg_info->min_bw_2g = le32_to_cpu(ev->min_bw_2g); 4556 reg_info->max_bw_2g = le32_to_cpu(ev->max_bw_2g); 4557 reg_info->min_bw_5g = le32_to_cpu(ev->min_bw_5g); 4558 reg_info->max_bw_5g = le32_to_cpu(ev->max_bw_5g); 4559 reg_info->min_bw_6g_ap[WMI_REG_INDOOR_AP] = le32_to_cpu(ev->min_bw_6g_ap_lpi); 4560 reg_info->max_bw_6g_ap[WMI_REG_INDOOR_AP] = le32_to_cpu(ev->max_bw_6g_ap_lpi); 4561 reg_info->min_bw_6g_ap[WMI_REG_STD_POWER_AP] = le32_to_cpu(ev->min_bw_6g_ap_sp); 4562 reg_info->max_bw_6g_ap[WMI_REG_STD_POWER_AP] = le32_to_cpu(ev->max_bw_6g_ap_sp); 4563 reg_info->min_bw_6g_ap[WMI_REG_VLP_AP] = le32_to_cpu(ev->min_bw_6g_ap_vlp); 4564 reg_info->max_bw_6g_ap[WMI_REG_VLP_AP] = le32_to_cpu(ev->max_bw_6g_ap_vlp); 4565 4566 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) { 4567 reg_info->min_bw_6g_client[WMI_REG_INDOOR_AP][i] = 4568 le32_to_cpu(ev->min_bw_6g_client_lpi[i]); 4569 reg_info->max_bw_6g_client[WMI_REG_INDOOR_AP][i] = 4570 le32_to_cpu(ev->max_bw_6g_client_lpi[i]); 4571 reg_info->min_bw_6g_client[WMI_REG_STD_POWER_AP][i] = 4572 le32_to_cpu(ev->min_bw_6g_client_sp[i]); 4573 reg_info->max_bw_6g_client[WMI_REG_STD_POWER_AP][i] = 4574 le32_to_cpu(ev->max_bw_6g_client_sp[i]); 4575 reg_info->min_bw_6g_client[WMI_REG_VLP_AP][i] = 4576 le32_to_cpu(ev->min_bw_6g_client_vlp[i]); 4577 reg_info->max_bw_6g_client[WMI_REG_VLP_AP][i] = 4578 le32_to_cpu(ev->max_bw_6g_client_vlp[i]); 4579 } 4580 4581 ath12k_dbg(ab, ATH12K_DBG_WMI, 4582 "%s:cc_ext %s dsf %d BW: min_2g %d max_2g %d min_5g %d max_5g %d", 4583 __func__, reg_info->alpha2, reg_info->dfs_region, 4584 reg_info->min_bw_2g, reg_info->max_bw_2g, 4585 reg_info->min_bw_5g, reg_info->max_bw_5g); 4586 4587 ath12k_dbg(ab, ATH12K_DBG_WMI, 4588 "num_2g_reg_rules %d num_5g_reg_rules %d", 4589 num_2g_reg_rules, num_5g_reg_rules); 4590 4591 ath12k_dbg(ab, ATH12K_DBG_WMI, 4592 "num_6g_reg_rules_ap_lpi: %d num_6g_reg_rules_ap_sp: %d num_6g_reg_rules_ap_vlp: %d", 4593 num_6g_reg_rules_ap[WMI_REG_INDOOR_AP], 4594 num_6g_reg_rules_ap[WMI_REG_STD_POWER_AP], 4595 num_6g_reg_rules_ap[WMI_REG_VLP_AP]); 4596 4597 ath12k_dbg(ab, ATH12K_DBG_WMI, 4598 "6g Regular client: num_6g_reg_rules_lpi: %d num_6g_reg_rules_sp: %d num_6g_reg_rules_vlp: %d", 4599 num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][WMI_REG_DEFAULT_CLIENT], 4600 num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][WMI_REG_DEFAULT_CLIENT], 4601 num_6g_reg_rules_cl[WMI_REG_VLP_AP][WMI_REG_DEFAULT_CLIENT]); 4602 4603 ath12k_dbg(ab, ATH12K_DBG_WMI, 4604 "6g Subordinate client: num_6g_reg_rules_lpi: %d num_6g_reg_rules_sp: %d num_6g_reg_rules_vlp: %d", 4605 num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][WMI_REG_SUBORDINATE_CLIENT], 4606 num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][WMI_REG_SUBORDINATE_CLIENT], 4607 num_6g_reg_rules_cl[WMI_REG_VLP_AP][WMI_REG_SUBORDINATE_CLIENT]); 4608 4609 ext_wmi_reg_rule = 4610 (struct ath12k_wmi_reg_rule_ext_params *)((u8 *)ev 4611 + sizeof(*ev) 4612 + sizeof(struct wmi_tlv)); 4613 4614 if (num_2g_reg_rules) { 4615 reg_info->reg_rules_2g_ptr = 4616 create_ext_reg_rules_from_wmi(num_2g_reg_rules, 4617 ext_wmi_reg_rule); 4618 4619 if (!reg_info->reg_rules_2g_ptr) { 4620 kfree(tb); 4621 ath12k_warn(ab, "Unable to Allocate memory for 2g rules\n"); 4622 return -ENOMEM; 4623 } 4624 } 4625 4626 if (num_5g_reg_rules) { 4627 ext_wmi_reg_rule += num_2g_reg_rules; 4628 reg_info->reg_rules_5g_ptr = 4629 create_ext_reg_rules_from_wmi(num_5g_reg_rules, 4630 ext_wmi_reg_rule); 4631 4632 if (!reg_info->reg_rules_5g_ptr) { 4633 kfree(tb); 4634 ath12k_warn(ab, "Unable to Allocate memory for 5g rules\n"); 4635 return -ENOMEM; 4636 } 4637 } 4638 4639 ext_wmi_reg_rule += num_5g_reg_rules; 4640 4641 for (i = 0; i < WMI_REG_CURRENT_MAX_AP_TYPE; i++) { 4642 reg_info->reg_rules_6g_ap_ptr[i] = 4643 create_ext_reg_rules_from_wmi(num_6g_reg_rules_ap[i], 4644 ext_wmi_reg_rule); 4645 4646 if (!reg_info->reg_rules_6g_ap_ptr[i]) { 4647 kfree(tb); 4648 ath12k_warn(ab, "Unable to Allocate memory for 6g ap rules\n"); 4649 return -ENOMEM; 4650 } 4651 4652 ext_wmi_reg_rule += num_6g_reg_rules_ap[i]; 4653 } 4654 4655 for (j = 0; j < WMI_REG_CURRENT_MAX_AP_TYPE; j++) { 4656 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) { 4657 reg_info->reg_rules_6g_client_ptr[j][i] = 4658 create_ext_reg_rules_from_wmi(num_6g_reg_rules_cl[j][i], 4659 ext_wmi_reg_rule); 4660 4661 if (!reg_info->reg_rules_6g_client_ptr[j][i]) { 4662 kfree(tb); 4663 ath12k_warn(ab, "Unable to Allocate memory for 6g client rules\n"); 4664 return -ENOMEM; 4665 } 4666 4667 ext_wmi_reg_rule += num_6g_reg_rules_cl[j][i]; 4668 } 4669 } 4670 4671 reg_info->client_type = le32_to_cpu(ev->client_type); 4672 reg_info->rnr_tpe_usable = ev->rnr_tpe_usable; 4673 reg_info->unspecified_ap_usable = ev->unspecified_ap_usable; 4674 reg_info->domain_code_6g_ap[WMI_REG_INDOOR_AP] = 4675 le32_to_cpu(ev->domain_code_6g_ap_lpi); 4676 reg_info->domain_code_6g_ap[WMI_REG_STD_POWER_AP] = 4677 le32_to_cpu(ev->domain_code_6g_ap_sp); 4678 reg_info->domain_code_6g_ap[WMI_REG_VLP_AP] = 4679 le32_to_cpu(ev->domain_code_6g_ap_vlp); 4680 4681 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) { 4682 reg_info->domain_code_6g_client[WMI_REG_INDOOR_AP][i] = 4683 le32_to_cpu(ev->domain_code_6g_client_lpi[i]); 4684 reg_info->domain_code_6g_client[WMI_REG_STD_POWER_AP][i] = 4685 le32_to_cpu(ev->domain_code_6g_client_sp[i]); 4686 reg_info->domain_code_6g_client[WMI_REG_VLP_AP][i] = 4687 le32_to_cpu(ev->domain_code_6g_client_vlp[i]); 4688 } 4689 4690 reg_info->domain_code_6g_super_id = le32_to_cpu(ev->domain_code_6g_super_id); 4691 4692 ath12k_dbg(ab, ATH12K_DBG_WMI, "6g client_type: %d domain_code_6g_super_id: %d", 4693 reg_info->client_type, reg_info->domain_code_6g_super_id); 4694 4695 ath12k_dbg(ab, ATH12K_DBG_WMI, "processed regulatory ext channel list\n"); 4696 4697 kfree(tb); 4698 return 0; 4699 } 4700 4701 static int ath12k_pull_peer_del_resp_ev(struct ath12k_base *ab, struct sk_buff *skb, 4702 struct wmi_peer_delete_resp_event *peer_del_resp) 4703 { 4704 const void **tb; 4705 const struct wmi_peer_delete_resp_event *ev; 4706 int ret; 4707 4708 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC); 4709 if (IS_ERR(tb)) { 4710 ret = PTR_ERR(tb); 4711 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 4712 return ret; 4713 } 4714 4715 ev = tb[WMI_TAG_PEER_DELETE_RESP_EVENT]; 4716 if (!ev) { 4717 ath12k_warn(ab, "failed to fetch peer delete resp ev"); 4718 kfree(tb); 4719 return -EPROTO; 4720 } 4721 4722 memset(peer_del_resp, 0, sizeof(*peer_del_resp)); 4723 4724 peer_del_resp->vdev_id = ev->vdev_id; 4725 ether_addr_copy(peer_del_resp->peer_macaddr.addr, 4726 ev->peer_macaddr.addr); 4727 4728 kfree(tb); 4729 return 0; 4730 } 4731 4732 static int ath12k_pull_vdev_del_resp_ev(struct ath12k_base *ab, 4733 struct sk_buff *skb, 4734 u32 *vdev_id) 4735 { 4736 const void **tb; 4737 const struct wmi_vdev_delete_resp_event *ev; 4738 int ret; 4739 4740 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC); 4741 if (IS_ERR(tb)) { 4742 ret = PTR_ERR(tb); 4743 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 4744 return ret; 4745 } 4746 4747 ev = tb[WMI_TAG_VDEV_DELETE_RESP_EVENT]; 4748 if (!ev) { 4749 ath12k_warn(ab, "failed to fetch vdev delete resp ev"); 4750 kfree(tb); 4751 return -EPROTO; 4752 } 4753 4754 *vdev_id = le32_to_cpu(ev->vdev_id); 4755 4756 kfree(tb); 4757 return 0; 4758 } 4759 4760 static int ath12k_pull_bcn_tx_status_ev(struct ath12k_base *ab, void *evt_buf, 4761 u32 len, u32 *vdev_id, 4762 u32 *tx_status) 4763 { 4764 const void **tb; 4765 const struct wmi_bcn_tx_status_event *ev; 4766 int ret; 4767 4768 tb = ath12k_wmi_tlv_parse_alloc(ab, evt_buf, len, GFP_ATOMIC); 4769 if (IS_ERR(tb)) { 4770 ret = PTR_ERR(tb); 4771 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 4772 return ret; 4773 } 4774 4775 ev = tb[WMI_TAG_OFFLOAD_BCN_TX_STATUS_EVENT]; 4776 if (!ev) { 4777 ath12k_warn(ab, "failed to fetch bcn tx status ev"); 4778 kfree(tb); 4779 return -EPROTO; 4780 } 4781 4782 *vdev_id = le32_to_cpu(ev->vdev_id); 4783 *tx_status = le32_to_cpu(ev->tx_status); 4784 4785 kfree(tb); 4786 return 0; 4787 } 4788 4789 static int ath12k_pull_vdev_stopped_param_tlv(struct ath12k_base *ab, struct sk_buff *skb, 4790 u32 *vdev_id) 4791 { 4792 const void **tb; 4793 const struct wmi_vdev_stopped_event *ev; 4794 int ret; 4795 4796 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC); 4797 if (IS_ERR(tb)) { 4798 ret = PTR_ERR(tb); 4799 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 4800 return ret; 4801 } 4802 4803 ev = tb[WMI_TAG_VDEV_STOPPED_EVENT]; 4804 if (!ev) { 4805 ath12k_warn(ab, "failed to fetch vdev stop ev"); 4806 kfree(tb); 4807 return -EPROTO; 4808 } 4809 4810 *vdev_id = le32_to_cpu(ev->vdev_id); 4811 4812 kfree(tb); 4813 return 0; 4814 } 4815 4816 static int ath12k_wmi_tlv_mgmt_rx_parse(struct ath12k_base *ab, 4817 u16 tag, u16 len, 4818 const void *ptr, void *data) 4819 { 4820 struct wmi_tlv_mgmt_rx_parse *parse = data; 4821 4822 switch (tag) { 4823 case WMI_TAG_MGMT_RX_HDR: 4824 parse->fixed = ptr; 4825 break; 4826 case WMI_TAG_ARRAY_BYTE: 4827 if (!parse->frame_buf_done) { 4828 parse->frame_buf = ptr; 4829 parse->frame_buf_done = true; 4830 } 4831 break; 4832 } 4833 return 0; 4834 } 4835 4836 static int ath12k_pull_mgmt_rx_params_tlv(struct ath12k_base *ab, 4837 struct sk_buff *skb, 4838 struct ath12k_wmi_mgmt_rx_arg *hdr) 4839 { 4840 struct wmi_tlv_mgmt_rx_parse parse = { }; 4841 const struct ath12k_wmi_mgmt_rx_params *ev; 4842 const u8 *frame; 4843 int i, ret; 4844 4845 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 4846 ath12k_wmi_tlv_mgmt_rx_parse, 4847 &parse); 4848 if (ret) { 4849 ath12k_warn(ab, "failed to parse mgmt rx tlv %d\n", ret); 4850 return ret; 4851 } 4852 4853 ev = parse.fixed; 4854 frame = parse.frame_buf; 4855 4856 if (!ev || !frame) { 4857 ath12k_warn(ab, "failed to fetch mgmt rx hdr"); 4858 return -EPROTO; 4859 } 4860 4861 hdr->pdev_id = le32_to_cpu(ev->pdev_id); 4862 hdr->chan_freq = le32_to_cpu(ev->chan_freq); 4863 hdr->channel = le32_to_cpu(ev->channel); 4864 hdr->snr = le32_to_cpu(ev->snr); 4865 hdr->rate = le32_to_cpu(ev->rate); 4866 hdr->phy_mode = le32_to_cpu(ev->phy_mode); 4867 hdr->buf_len = le32_to_cpu(ev->buf_len); 4868 hdr->status = le32_to_cpu(ev->status); 4869 hdr->flags = le32_to_cpu(ev->flags); 4870 hdr->rssi = a_sle32_to_cpu(ev->rssi); 4871 hdr->tsf_delta = le32_to_cpu(ev->tsf_delta); 4872 4873 for (i = 0; i < ATH_MAX_ANTENNA; i++) 4874 hdr->rssi_ctl[i] = le32_to_cpu(ev->rssi_ctl[i]); 4875 4876 if (skb->len < (frame - skb->data) + hdr->buf_len) { 4877 ath12k_warn(ab, "invalid length in mgmt rx hdr ev"); 4878 return -EPROTO; 4879 } 4880 4881 /* shift the sk_buff to point to `frame` */ 4882 skb_trim(skb, 0); 4883 skb_put(skb, frame - skb->data); 4884 skb_pull(skb, frame - skb->data); 4885 skb_put(skb, hdr->buf_len); 4886 4887 return 0; 4888 } 4889 4890 static int wmi_process_mgmt_tx_comp(struct ath12k *ar, u32 desc_id, 4891 u32 status) 4892 { 4893 struct sk_buff *msdu; 4894 struct ieee80211_tx_info *info; 4895 struct ath12k_skb_cb *skb_cb; 4896 int num_mgmt; 4897 4898 spin_lock_bh(&ar->txmgmt_idr_lock); 4899 msdu = idr_find(&ar->txmgmt_idr, desc_id); 4900 4901 if (!msdu) { 4902 ath12k_warn(ar->ab, "received mgmt tx compl for invalid msdu_id: %d\n", 4903 desc_id); 4904 spin_unlock_bh(&ar->txmgmt_idr_lock); 4905 return -ENOENT; 4906 } 4907 4908 idr_remove(&ar->txmgmt_idr, desc_id); 4909 spin_unlock_bh(&ar->txmgmt_idr_lock); 4910 4911 skb_cb = ATH12K_SKB_CB(msdu); 4912 dma_unmap_single(ar->ab->dev, skb_cb->paddr, msdu->len, DMA_TO_DEVICE); 4913 4914 info = IEEE80211_SKB_CB(msdu); 4915 if ((!(info->flags & IEEE80211_TX_CTL_NO_ACK)) && !status) 4916 info->flags |= IEEE80211_TX_STAT_ACK; 4917 4918 ieee80211_tx_status_irqsafe(ar->hw, msdu); 4919 4920 num_mgmt = atomic_dec_if_positive(&ar->num_pending_mgmt_tx); 4921 4922 /* WARN when we received this event without doing any mgmt tx */ 4923 if (num_mgmt < 0) 4924 WARN_ON_ONCE(1); 4925 4926 if (!num_mgmt) 4927 wake_up(&ar->txmgmt_empty_waitq); 4928 4929 return 0; 4930 } 4931 4932 static int ath12k_pull_mgmt_tx_compl_param_tlv(struct ath12k_base *ab, 4933 struct sk_buff *skb, 4934 struct wmi_mgmt_tx_compl_event *param) 4935 { 4936 const void **tb; 4937 const struct wmi_mgmt_tx_compl_event *ev; 4938 int ret; 4939 4940 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC); 4941 if (IS_ERR(tb)) { 4942 ret = PTR_ERR(tb); 4943 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 4944 return ret; 4945 } 4946 4947 ev = tb[WMI_TAG_MGMT_TX_COMPL_EVENT]; 4948 if (!ev) { 4949 ath12k_warn(ab, "failed to fetch mgmt tx compl ev"); 4950 kfree(tb); 4951 return -EPROTO; 4952 } 4953 4954 param->pdev_id = ev->pdev_id; 4955 param->desc_id = ev->desc_id; 4956 param->status = ev->status; 4957 4958 kfree(tb); 4959 return 0; 4960 } 4961 4962 static void ath12k_wmi_event_scan_started(struct ath12k *ar) 4963 { 4964 lockdep_assert_held(&ar->data_lock); 4965 4966 switch (ar->scan.state) { 4967 case ATH12K_SCAN_IDLE: 4968 case ATH12K_SCAN_RUNNING: 4969 case ATH12K_SCAN_ABORTING: 4970 ath12k_warn(ar->ab, "received scan started event in an invalid scan state: %s (%d)\n", 4971 ath12k_scan_state_str(ar->scan.state), 4972 ar->scan.state); 4973 break; 4974 case ATH12K_SCAN_STARTING: 4975 ar->scan.state = ATH12K_SCAN_RUNNING; 4976 complete(&ar->scan.started); 4977 break; 4978 } 4979 } 4980 4981 static void ath12k_wmi_event_scan_start_failed(struct ath12k *ar) 4982 { 4983 lockdep_assert_held(&ar->data_lock); 4984 4985 switch (ar->scan.state) { 4986 case ATH12K_SCAN_IDLE: 4987 case ATH12K_SCAN_RUNNING: 4988 case ATH12K_SCAN_ABORTING: 4989 ath12k_warn(ar->ab, "received scan start failed event in an invalid scan state: %s (%d)\n", 4990 ath12k_scan_state_str(ar->scan.state), 4991 ar->scan.state); 4992 break; 4993 case ATH12K_SCAN_STARTING: 4994 complete(&ar->scan.started); 4995 __ath12k_mac_scan_finish(ar); 4996 break; 4997 } 4998 } 4999 5000 static void ath12k_wmi_event_scan_completed(struct ath12k *ar) 5001 { 5002 lockdep_assert_held(&ar->data_lock); 5003 5004 switch (ar->scan.state) { 5005 case ATH12K_SCAN_IDLE: 5006 case ATH12K_SCAN_STARTING: 5007 /* One suspected reason scan can be completed while starting is 5008 * if firmware fails to deliver all scan events to the host, 5009 * e.g. when transport pipe is full. This has been observed 5010 * with spectral scan phyerr events starving wmi transport 5011 * pipe. In such case the "scan completed" event should be (and 5012 * is) ignored by the host as it may be just firmware's scan 5013 * state machine recovering. 5014 */ 5015 ath12k_warn(ar->ab, "received scan completed event in an invalid scan state: %s (%d)\n", 5016 ath12k_scan_state_str(ar->scan.state), 5017 ar->scan.state); 5018 break; 5019 case ATH12K_SCAN_RUNNING: 5020 case ATH12K_SCAN_ABORTING: 5021 __ath12k_mac_scan_finish(ar); 5022 break; 5023 } 5024 } 5025 5026 static void ath12k_wmi_event_scan_bss_chan(struct ath12k *ar) 5027 { 5028 lockdep_assert_held(&ar->data_lock); 5029 5030 switch (ar->scan.state) { 5031 case ATH12K_SCAN_IDLE: 5032 case ATH12K_SCAN_STARTING: 5033 ath12k_warn(ar->ab, "received scan bss chan event in an invalid scan state: %s (%d)\n", 5034 ath12k_scan_state_str(ar->scan.state), 5035 ar->scan.state); 5036 break; 5037 case ATH12K_SCAN_RUNNING: 5038 case ATH12K_SCAN_ABORTING: 5039 ar->scan_channel = NULL; 5040 break; 5041 } 5042 } 5043 5044 static void ath12k_wmi_event_scan_foreign_chan(struct ath12k *ar, u32 freq) 5045 { 5046 lockdep_assert_held(&ar->data_lock); 5047 5048 switch (ar->scan.state) { 5049 case ATH12K_SCAN_IDLE: 5050 case ATH12K_SCAN_STARTING: 5051 ath12k_warn(ar->ab, "received scan foreign chan event in an invalid scan state: %s (%d)\n", 5052 ath12k_scan_state_str(ar->scan.state), 5053 ar->scan.state); 5054 break; 5055 case ATH12K_SCAN_RUNNING: 5056 case ATH12K_SCAN_ABORTING: 5057 ar->scan_channel = ieee80211_get_channel(ar->hw->wiphy, freq); 5058 break; 5059 } 5060 } 5061 5062 static const char * 5063 ath12k_wmi_event_scan_type_str(enum wmi_scan_event_type type, 5064 enum wmi_scan_completion_reason reason) 5065 { 5066 switch (type) { 5067 case WMI_SCAN_EVENT_STARTED: 5068 return "started"; 5069 case WMI_SCAN_EVENT_COMPLETED: 5070 switch (reason) { 5071 case WMI_SCAN_REASON_COMPLETED: 5072 return "completed"; 5073 case WMI_SCAN_REASON_CANCELLED: 5074 return "completed [cancelled]"; 5075 case WMI_SCAN_REASON_PREEMPTED: 5076 return "completed [preempted]"; 5077 case WMI_SCAN_REASON_TIMEDOUT: 5078 return "completed [timedout]"; 5079 case WMI_SCAN_REASON_INTERNAL_FAILURE: 5080 return "completed [internal err]"; 5081 case WMI_SCAN_REASON_MAX: 5082 break; 5083 } 5084 return "completed [unknown]"; 5085 case WMI_SCAN_EVENT_BSS_CHANNEL: 5086 return "bss channel"; 5087 case WMI_SCAN_EVENT_FOREIGN_CHAN: 5088 return "foreign channel"; 5089 case WMI_SCAN_EVENT_DEQUEUED: 5090 return "dequeued"; 5091 case WMI_SCAN_EVENT_PREEMPTED: 5092 return "preempted"; 5093 case WMI_SCAN_EVENT_START_FAILED: 5094 return "start failed"; 5095 case WMI_SCAN_EVENT_RESTARTED: 5096 return "restarted"; 5097 case WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT: 5098 return "foreign channel exit"; 5099 default: 5100 return "unknown"; 5101 } 5102 } 5103 5104 static int ath12k_pull_scan_ev(struct ath12k_base *ab, struct sk_buff *skb, 5105 struct wmi_scan_event *scan_evt_param) 5106 { 5107 const void **tb; 5108 const struct wmi_scan_event *ev; 5109 int ret; 5110 5111 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC); 5112 if (IS_ERR(tb)) { 5113 ret = PTR_ERR(tb); 5114 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5115 return ret; 5116 } 5117 5118 ev = tb[WMI_TAG_SCAN_EVENT]; 5119 if (!ev) { 5120 ath12k_warn(ab, "failed to fetch scan ev"); 5121 kfree(tb); 5122 return -EPROTO; 5123 } 5124 5125 scan_evt_param->event_type = ev->event_type; 5126 scan_evt_param->reason = ev->reason; 5127 scan_evt_param->channel_freq = ev->channel_freq; 5128 scan_evt_param->scan_req_id = ev->scan_req_id; 5129 scan_evt_param->scan_id = ev->scan_id; 5130 scan_evt_param->vdev_id = ev->vdev_id; 5131 scan_evt_param->tsf_timestamp = ev->tsf_timestamp; 5132 5133 kfree(tb); 5134 return 0; 5135 } 5136 5137 static int ath12k_pull_peer_sta_kickout_ev(struct ath12k_base *ab, struct sk_buff *skb, 5138 struct wmi_peer_sta_kickout_arg *arg) 5139 { 5140 const void **tb; 5141 const struct wmi_peer_sta_kickout_event *ev; 5142 int ret; 5143 5144 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC); 5145 if (IS_ERR(tb)) { 5146 ret = PTR_ERR(tb); 5147 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5148 return ret; 5149 } 5150 5151 ev = tb[WMI_TAG_PEER_STA_KICKOUT_EVENT]; 5152 if (!ev) { 5153 ath12k_warn(ab, "failed to fetch peer sta kickout ev"); 5154 kfree(tb); 5155 return -EPROTO; 5156 } 5157 5158 arg->mac_addr = ev->peer_macaddr.addr; 5159 5160 kfree(tb); 5161 return 0; 5162 } 5163 5164 static int ath12k_pull_roam_ev(struct ath12k_base *ab, struct sk_buff *skb, 5165 struct wmi_roam_event *roam_ev) 5166 { 5167 const void **tb; 5168 const struct wmi_roam_event *ev; 5169 int ret; 5170 5171 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC); 5172 if (IS_ERR(tb)) { 5173 ret = PTR_ERR(tb); 5174 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5175 return ret; 5176 } 5177 5178 ev = tb[WMI_TAG_ROAM_EVENT]; 5179 if (!ev) { 5180 ath12k_warn(ab, "failed to fetch roam ev"); 5181 kfree(tb); 5182 return -EPROTO; 5183 } 5184 5185 roam_ev->vdev_id = ev->vdev_id; 5186 roam_ev->reason = ev->reason; 5187 roam_ev->rssi = ev->rssi; 5188 5189 kfree(tb); 5190 return 0; 5191 } 5192 5193 static int freq_to_idx(struct ath12k *ar, int freq) 5194 { 5195 struct ieee80211_supported_band *sband; 5196 int band, ch, idx = 0; 5197 5198 for (band = NL80211_BAND_2GHZ; band < NUM_NL80211_BANDS; band++) { 5199 if (!ar->mac.sbands[band].channels) 5200 continue; 5201 5202 sband = ar->hw->wiphy->bands[band]; 5203 if (!sband) 5204 continue; 5205 5206 for (ch = 0; ch < sband->n_channels; ch++, idx++) 5207 if (sband->channels[ch].center_freq == freq) 5208 goto exit; 5209 } 5210 5211 exit: 5212 return idx; 5213 } 5214 5215 static int ath12k_pull_chan_info_ev(struct ath12k_base *ab, u8 *evt_buf, 5216 u32 len, struct wmi_chan_info_event *ch_info_ev) 5217 { 5218 const void **tb; 5219 const struct wmi_chan_info_event *ev; 5220 int ret; 5221 5222 tb = ath12k_wmi_tlv_parse_alloc(ab, evt_buf, len, GFP_ATOMIC); 5223 if (IS_ERR(tb)) { 5224 ret = PTR_ERR(tb); 5225 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5226 return ret; 5227 } 5228 5229 ev = tb[WMI_TAG_CHAN_INFO_EVENT]; 5230 if (!ev) { 5231 ath12k_warn(ab, "failed to fetch chan info ev"); 5232 kfree(tb); 5233 return -EPROTO; 5234 } 5235 5236 ch_info_ev->err_code = ev->err_code; 5237 ch_info_ev->freq = ev->freq; 5238 ch_info_ev->cmd_flags = ev->cmd_flags; 5239 ch_info_ev->noise_floor = ev->noise_floor; 5240 ch_info_ev->rx_clear_count = ev->rx_clear_count; 5241 ch_info_ev->cycle_count = ev->cycle_count; 5242 ch_info_ev->chan_tx_pwr_range = ev->chan_tx_pwr_range; 5243 ch_info_ev->chan_tx_pwr_tp = ev->chan_tx_pwr_tp; 5244 ch_info_ev->rx_frame_count = ev->rx_frame_count; 5245 ch_info_ev->tx_frame_cnt = ev->tx_frame_cnt; 5246 ch_info_ev->mac_clk_mhz = ev->mac_clk_mhz; 5247 ch_info_ev->vdev_id = ev->vdev_id; 5248 5249 kfree(tb); 5250 return 0; 5251 } 5252 5253 static int 5254 ath12k_pull_pdev_bss_chan_info_ev(struct ath12k_base *ab, struct sk_buff *skb, 5255 struct wmi_pdev_bss_chan_info_event *bss_ch_info_ev) 5256 { 5257 const void **tb; 5258 const struct wmi_pdev_bss_chan_info_event *ev; 5259 int ret; 5260 5261 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC); 5262 if (IS_ERR(tb)) { 5263 ret = PTR_ERR(tb); 5264 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5265 return ret; 5266 } 5267 5268 ev = tb[WMI_TAG_PDEV_BSS_CHAN_INFO_EVENT]; 5269 if (!ev) { 5270 ath12k_warn(ab, "failed to fetch pdev bss chan info ev"); 5271 kfree(tb); 5272 return -EPROTO; 5273 } 5274 5275 bss_ch_info_ev->pdev_id = ev->pdev_id; 5276 bss_ch_info_ev->freq = ev->freq; 5277 bss_ch_info_ev->noise_floor = ev->noise_floor; 5278 bss_ch_info_ev->rx_clear_count_low = ev->rx_clear_count_low; 5279 bss_ch_info_ev->rx_clear_count_high = ev->rx_clear_count_high; 5280 bss_ch_info_ev->cycle_count_low = ev->cycle_count_low; 5281 bss_ch_info_ev->cycle_count_high = ev->cycle_count_high; 5282 bss_ch_info_ev->tx_cycle_count_low = ev->tx_cycle_count_low; 5283 bss_ch_info_ev->tx_cycle_count_high = ev->tx_cycle_count_high; 5284 bss_ch_info_ev->rx_cycle_count_low = ev->rx_cycle_count_low; 5285 bss_ch_info_ev->rx_cycle_count_high = ev->rx_cycle_count_high; 5286 bss_ch_info_ev->rx_bss_cycle_count_low = ev->rx_bss_cycle_count_low; 5287 bss_ch_info_ev->rx_bss_cycle_count_high = ev->rx_bss_cycle_count_high; 5288 5289 kfree(tb); 5290 return 0; 5291 } 5292 5293 static int 5294 ath12k_pull_vdev_install_key_compl_ev(struct ath12k_base *ab, struct sk_buff *skb, 5295 struct wmi_vdev_install_key_complete_arg *arg) 5296 { 5297 const void **tb; 5298 const struct wmi_vdev_install_key_compl_event *ev; 5299 int ret; 5300 5301 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC); 5302 if (IS_ERR(tb)) { 5303 ret = PTR_ERR(tb); 5304 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5305 return ret; 5306 } 5307 5308 ev = tb[WMI_TAG_VDEV_INSTALL_KEY_COMPLETE_EVENT]; 5309 if (!ev) { 5310 ath12k_warn(ab, "failed to fetch vdev install key compl ev"); 5311 kfree(tb); 5312 return -EPROTO; 5313 } 5314 5315 arg->vdev_id = le32_to_cpu(ev->vdev_id); 5316 arg->macaddr = ev->peer_macaddr.addr; 5317 arg->key_idx = le32_to_cpu(ev->key_idx); 5318 arg->key_flags = le32_to_cpu(ev->key_flags); 5319 arg->status = le32_to_cpu(ev->status); 5320 5321 kfree(tb); 5322 return 0; 5323 } 5324 5325 static int ath12k_pull_peer_assoc_conf_ev(struct ath12k_base *ab, struct sk_buff *skb, 5326 struct wmi_peer_assoc_conf_arg *peer_assoc_conf) 5327 { 5328 const void **tb; 5329 const struct wmi_peer_assoc_conf_event *ev; 5330 int ret; 5331 5332 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC); 5333 if (IS_ERR(tb)) { 5334 ret = PTR_ERR(tb); 5335 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5336 return ret; 5337 } 5338 5339 ev = tb[WMI_TAG_PEER_ASSOC_CONF_EVENT]; 5340 if (!ev) { 5341 ath12k_warn(ab, "failed to fetch peer assoc conf ev"); 5342 kfree(tb); 5343 return -EPROTO; 5344 } 5345 5346 peer_assoc_conf->vdev_id = le32_to_cpu(ev->vdev_id); 5347 peer_assoc_conf->macaddr = ev->peer_macaddr.addr; 5348 5349 kfree(tb); 5350 return 0; 5351 } 5352 5353 static int 5354 ath12k_pull_pdev_temp_ev(struct ath12k_base *ab, u8 *evt_buf, 5355 u32 len, const struct wmi_pdev_temperature_event *ev) 5356 { 5357 const void **tb; 5358 int ret; 5359 5360 tb = ath12k_wmi_tlv_parse_alloc(ab, evt_buf, len, GFP_ATOMIC); 5361 if (IS_ERR(tb)) { 5362 ret = PTR_ERR(tb); 5363 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5364 return ret; 5365 } 5366 5367 ev = tb[WMI_TAG_PDEV_TEMPERATURE_EVENT]; 5368 if (!ev) { 5369 ath12k_warn(ab, "failed to fetch pdev temp ev"); 5370 kfree(tb); 5371 return -EPROTO; 5372 } 5373 5374 kfree(tb); 5375 return 0; 5376 } 5377 5378 static void ath12k_wmi_op_ep_tx_credits(struct ath12k_base *ab) 5379 { 5380 /* try to send pending beacons first. they take priority */ 5381 wake_up(&ab->wmi_ab.tx_credits_wq); 5382 } 5383 5384 static void ath12k_wmi_htc_tx_complete(struct ath12k_base *ab, 5385 struct sk_buff *skb) 5386 { 5387 dev_kfree_skb(skb); 5388 } 5389 5390 static bool ath12k_reg_is_world_alpha(char *alpha) 5391 { 5392 return alpha[0] == '0' && alpha[1] == '0'; 5393 } 5394 5395 static int ath12k_reg_chan_list_event(struct ath12k_base *ab, struct sk_buff *skb) 5396 { 5397 struct ath12k_reg_info *reg_info = NULL; 5398 struct ieee80211_regdomain *regd = NULL; 5399 bool intersect = false; 5400 int ret = 0, pdev_idx, i, j; 5401 struct ath12k *ar; 5402 5403 reg_info = kzalloc(sizeof(*reg_info), GFP_ATOMIC); 5404 if (!reg_info) { 5405 ret = -ENOMEM; 5406 goto fallback; 5407 } 5408 5409 ret = ath12k_pull_reg_chan_list_ext_update_ev(ab, skb, reg_info); 5410 5411 if (ret) { 5412 ath12k_warn(ab, "failed to extract regulatory info from received event\n"); 5413 goto fallback; 5414 } 5415 5416 if (reg_info->status_code != REG_SET_CC_STATUS_PASS) { 5417 /* In case of failure to set the requested ctry, 5418 * fw retains the current regd. We print a failure info 5419 * and return from here. 5420 */ 5421 ath12k_warn(ab, "Failed to set the requested Country regulatory setting\n"); 5422 goto mem_free; 5423 } 5424 5425 pdev_idx = reg_info->phy_id; 5426 5427 if (pdev_idx >= ab->num_radios) { 5428 /* Process the event for phy0 only if single_pdev_only 5429 * is true. If pdev_idx is valid but not 0, discard the 5430 * event. Otherwise, it goes to fallback. 5431 */ 5432 if (ab->hw_params->single_pdev_only && 5433 pdev_idx < ab->hw_params->num_rxmda_per_pdev) 5434 goto mem_free; 5435 else 5436 goto fallback; 5437 } 5438 5439 /* Avoid multiple overwrites to default regd, during core 5440 * stop-start after mac registration. 5441 */ 5442 if (ab->default_regd[pdev_idx] && !ab->new_regd[pdev_idx] && 5443 !memcmp(ab->default_regd[pdev_idx]->alpha2, 5444 reg_info->alpha2, 2)) 5445 goto mem_free; 5446 5447 /* Intersect new rules with default regd if a new country setting was 5448 * requested, i.e a default regd was already set during initialization 5449 * and the regd coming from this event has a valid country info. 5450 */ 5451 if (ab->default_regd[pdev_idx] && 5452 !ath12k_reg_is_world_alpha((char *) 5453 ab->default_regd[pdev_idx]->alpha2) && 5454 !ath12k_reg_is_world_alpha((char *)reg_info->alpha2)) 5455 intersect = true; 5456 5457 regd = ath12k_reg_build_regd(ab, reg_info, intersect); 5458 if (!regd) { 5459 ath12k_warn(ab, "failed to build regd from reg_info\n"); 5460 goto fallback; 5461 } 5462 5463 spin_lock(&ab->base_lock); 5464 if (test_bit(ATH12K_FLAG_REGISTERED, &ab->dev_flags)) { 5465 /* Once mac is registered, ar is valid and all CC events from 5466 * fw is considered to be received due to user requests 5467 * currently. 5468 * Free previously built regd before assigning the newly 5469 * generated regd to ar. NULL pointer handling will be 5470 * taken care by kfree itself. 5471 */ 5472 ar = ab->pdevs[pdev_idx].ar; 5473 kfree(ab->new_regd[pdev_idx]); 5474 ab->new_regd[pdev_idx] = regd; 5475 queue_work(ab->workqueue, &ar->regd_update_work); 5476 } else { 5477 /* Multiple events for the same *ar is not expected. But we 5478 * can still clear any previously stored default_regd if we 5479 * are receiving this event for the same radio by mistake. 5480 * NULL pointer handling will be taken care by kfree itself. 5481 */ 5482 kfree(ab->default_regd[pdev_idx]); 5483 /* This regd would be applied during mac registration */ 5484 ab->default_regd[pdev_idx] = regd; 5485 } 5486 ab->dfs_region = reg_info->dfs_region; 5487 spin_unlock(&ab->base_lock); 5488 5489 goto mem_free; 5490 5491 fallback: 5492 /* Fallback to older reg (by sending previous country setting 5493 * again if fw has succeeded and we failed to process here. 5494 * The Regdomain should be uniform across driver and fw. Since the 5495 * FW has processed the command and sent a success status, we expect 5496 * this function to succeed as well. If it doesn't, CTRY needs to be 5497 * reverted at the fw and the old SCAN_CHAN_LIST cmd needs to be sent. 5498 */ 5499 /* TODO: This is rare, but still should also be handled */ 5500 WARN_ON(1); 5501 mem_free: 5502 if (reg_info) { 5503 kfree(reg_info->reg_rules_2g_ptr); 5504 kfree(reg_info->reg_rules_5g_ptr); 5505 if (reg_info->is_ext_reg_event) { 5506 for (i = 0; i < WMI_REG_CURRENT_MAX_AP_TYPE; i++) 5507 kfree(reg_info->reg_rules_6g_ap_ptr[i]); 5508 5509 for (j = 0; j < WMI_REG_CURRENT_MAX_AP_TYPE; j++) 5510 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) 5511 kfree(reg_info->reg_rules_6g_client_ptr[j][i]); 5512 } 5513 kfree(reg_info); 5514 } 5515 return ret; 5516 } 5517 5518 static int ath12k_wmi_rdy_parse(struct ath12k_base *ab, u16 tag, u16 len, 5519 const void *ptr, void *data) 5520 { 5521 struct ath12k_wmi_rdy_parse *rdy_parse = data; 5522 struct wmi_ready_event fixed_param; 5523 struct ath12k_wmi_mac_addr_params *addr_list; 5524 struct ath12k_pdev *pdev; 5525 u32 num_mac_addr; 5526 int i; 5527 5528 switch (tag) { 5529 case WMI_TAG_READY_EVENT: 5530 memset(&fixed_param, 0, sizeof(fixed_param)); 5531 memcpy(&fixed_param, (struct wmi_ready_event *)ptr, 5532 min_t(u16, sizeof(fixed_param), len)); 5533 ab->wlan_init_status = le32_to_cpu(fixed_param.ready_event_min.status); 5534 rdy_parse->num_extra_mac_addr = 5535 le32_to_cpu(fixed_param.ready_event_min.num_extra_mac_addr); 5536 5537 ether_addr_copy(ab->mac_addr, 5538 fixed_param.ready_event_min.mac_addr.addr); 5539 ab->pktlog_defs_checksum = le32_to_cpu(fixed_param.pktlog_defs_checksum); 5540 ab->wmi_ready = true; 5541 break; 5542 case WMI_TAG_ARRAY_FIXED_STRUCT: 5543 addr_list = (struct ath12k_wmi_mac_addr_params *)ptr; 5544 num_mac_addr = rdy_parse->num_extra_mac_addr; 5545 5546 if (!(ab->num_radios > 1 && num_mac_addr >= ab->num_radios)) 5547 break; 5548 5549 for (i = 0; i < ab->num_radios; i++) { 5550 pdev = &ab->pdevs[i]; 5551 ether_addr_copy(pdev->mac_addr, addr_list[i].addr); 5552 } 5553 ab->pdevs_macaddr_valid = true; 5554 break; 5555 default: 5556 break; 5557 } 5558 5559 return 0; 5560 } 5561 5562 static int ath12k_ready_event(struct ath12k_base *ab, struct sk_buff *skb) 5563 { 5564 struct ath12k_wmi_rdy_parse rdy_parse = { }; 5565 int ret; 5566 5567 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 5568 ath12k_wmi_rdy_parse, &rdy_parse); 5569 if (ret) { 5570 ath12k_warn(ab, "failed to parse tlv %d\n", ret); 5571 return ret; 5572 } 5573 5574 complete(&ab->wmi_ab.unified_ready); 5575 return 0; 5576 } 5577 5578 static void ath12k_peer_delete_resp_event(struct ath12k_base *ab, struct sk_buff *skb) 5579 { 5580 struct wmi_peer_delete_resp_event peer_del_resp; 5581 struct ath12k *ar; 5582 5583 if (ath12k_pull_peer_del_resp_ev(ab, skb, &peer_del_resp) != 0) { 5584 ath12k_warn(ab, "failed to extract peer delete resp"); 5585 return; 5586 } 5587 5588 rcu_read_lock(); 5589 ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(peer_del_resp.vdev_id)); 5590 if (!ar) { 5591 ath12k_warn(ab, "invalid vdev id in peer delete resp ev %d", 5592 peer_del_resp.vdev_id); 5593 rcu_read_unlock(); 5594 return; 5595 } 5596 5597 complete(&ar->peer_delete_done); 5598 rcu_read_unlock(); 5599 ath12k_dbg(ab, ATH12K_DBG_WMI, "peer delete resp for vdev id %d addr %pM\n", 5600 peer_del_resp.vdev_id, peer_del_resp.peer_macaddr.addr); 5601 } 5602 5603 static void ath12k_vdev_delete_resp_event(struct ath12k_base *ab, 5604 struct sk_buff *skb) 5605 { 5606 struct ath12k *ar; 5607 u32 vdev_id = 0; 5608 5609 if (ath12k_pull_vdev_del_resp_ev(ab, skb, &vdev_id) != 0) { 5610 ath12k_warn(ab, "failed to extract vdev delete resp"); 5611 return; 5612 } 5613 5614 rcu_read_lock(); 5615 ar = ath12k_mac_get_ar_by_vdev_id(ab, vdev_id); 5616 if (!ar) { 5617 ath12k_warn(ab, "invalid vdev id in vdev delete resp ev %d", 5618 vdev_id); 5619 rcu_read_unlock(); 5620 return; 5621 } 5622 5623 complete(&ar->vdev_delete_done); 5624 5625 rcu_read_unlock(); 5626 5627 ath12k_dbg(ab, ATH12K_DBG_WMI, "vdev delete resp for vdev id %d\n", 5628 vdev_id); 5629 } 5630 5631 static const char *ath12k_wmi_vdev_resp_print(u32 vdev_resp_status) 5632 { 5633 switch (vdev_resp_status) { 5634 case WMI_VDEV_START_RESPONSE_INVALID_VDEVID: 5635 return "invalid vdev id"; 5636 case WMI_VDEV_START_RESPONSE_NOT_SUPPORTED: 5637 return "not supported"; 5638 case WMI_VDEV_START_RESPONSE_DFS_VIOLATION: 5639 return "dfs violation"; 5640 case WMI_VDEV_START_RESPONSE_INVALID_REGDOMAIN: 5641 return "invalid regdomain"; 5642 default: 5643 return "unknown"; 5644 } 5645 } 5646 5647 static void ath12k_vdev_start_resp_event(struct ath12k_base *ab, struct sk_buff *skb) 5648 { 5649 struct wmi_vdev_start_resp_event vdev_start_resp; 5650 struct ath12k *ar; 5651 u32 status; 5652 5653 if (ath12k_pull_vdev_start_resp_tlv(ab, skb, &vdev_start_resp) != 0) { 5654 ath12k_warn(ab, "failed to extract vdev start resp"); 5655 return; 5656 } 5657 5658 rcu_read_lock(); 5659 ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(vdev_start_resp.vdev_id)); 5660 if (!ar) { 5661 ath12k_warn(ab, "invalid vdev id in vdev start resp ev %d", 5662 vdev_start_resp.vdev_id); 5663 rcu_read_unlock(); 5664 return; 5665 } 5666 5667 ar->last_wmi_vdev_start_status = 0; 5668 5669 status = le32_to_cpu(vdev_start_resp.status); 5670 5671 if (WARN_ON_ONCE(status)) { 5672 ath12k_warn(ab, "vdev start resp error status %d (%s)\n", 5673 status, ath12k_wmi_vdev_resp_print(status)); 5674 ar->last_wmi_vdev_start_status = status; 5675 } 5676 5677 complete(&ar->vdev_setup_done); 5678 5679 rcu_read_unlock(); 5680 5681 ath12k_dbg(ab, ATH12K_DBG_WMI, "vdev start resp for vdev id %d", 5682 vdev_start_resp.vdev_id); 5683 } 5684 5685 static void ath12k_bcn_tx_status_event(struct ath12k_base *ab, struct sk_buff *skb) 5686 { 5687 u32 vdev_id, tx_status; 5688 5689 if (ath12k_pull_bcn_tx_status_ev(ab, skb->data, skb->len, 5690 &vdev_id, &tx_status) != 0) { 5691 ath12k_warn(ab, "failed to extract bcn tx status"); 5692 return; 5693 } 5694 } 5695 5696 static void ath12k_vdev_stopped_event(struct ath12k_base *ab, struct sk_buff *skb) 5697 { 5698 struct ath12k *ar; 5699 u32 vdev_id = 0; 5700 5701 if (ath12k_pull_vdev_stopped_param_tlv(ab, skb, &vdev_id) != 0) { 5702 ath12k_warn(ab, "failed to extract vdev stopped event"); 5703 return; 5704 } 5705 5706 rcu_read_lock(); 5707 ar = ath12k_mac_get_ar_by_vdev_id(ab, vdev_id); 5708 if (!ar) { 5709 ath12k_warn(ab, "invalid vdev id in vdev stopped ev %d", 5710 vdev_id); 5711 rcu_read_unlock(); 5712 return; 5713 } 5714 5715 complete(&ar->vdev_setup_done); 5716 5717 rcu_read_unlock(); 5718 5719 ath12k_dbg(ab, ATH12K_DBG_WMI, "vdev stopped for vdev id %d", vdev_id); 5720 } 5721 5722 static void ath12k_mgmt_rx_event(struct ath12k_base *ab, struct sk_buff *skb) 5723 { 5724 struct ath12k_wmi_mgmt_rx_arg rx_ev = {0}; 5725 struct ath12k *ar; 5726 struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb); 5727 struct ieee80211_hdr *hdr; 5728 u16 fc; 5729 struct ieee80211_supported_band *sband; 5730 5731 if (ath12k_pull_mgmt_rx_params_tlv(ab, skb, &rx_ev) != 0) { 5732 ath12k_warn(ab, "failed to extract mgmt rx event"); 5733 dev_kfree_skb(skb); 5734 return; 5735 } 5736 5737 memset(status, 0, sizeof(*status)); 5738 5739 ath12k_dbg(ab, ATH12K_DBG_MGMT, "mgmt rx event status %08x\n", 5740 rx_ev.status); 5741 5742 rcu_read_lock(); 5743 ar = ath12k_mac_get_ar_by_pdev_id(ab, rx_ev.pdev_id); 5744 5745 if (!ar) { 5746 ath12k_warn(ab, "invalid pdev_id %d in mgmt_rx_event\n", 5747 rx_ev.pdev_id); 5748 dev_kfree_skb(skb); 5749 goto exit; 5750 } 5751 5752 if ((test_bit(ATH12K_CAC_RUNNING, &ar->dev_flags)) || 5753 (rx_ev.status & (WMI_RX_STATUS_ERR_DECRYPT | 5754 WMI_RX_STATUS_ERR_KEY_CACHE_MISS | 5755 WMI_RX_STATUS_ERR_CRC))) { 5756 dev_kfree_skb(skb); 5757 goto exit; 5758 } 5759 5760 if (rx_ev.status & WMI_RX_STATUS_ERR_MIC) 5761 status->flag |= RX_FLAG_MMIC_ERROR; 5762 5763 if (rx_ev.chan_freq >= ATH12K_MIN_6G_FREQ) { 5764 status->band = NL80211_BAND_6GHZ; 5765 } else if (rx_ev.channel >= 1 && rx_ev.channel <= 14) { 5766 status->band = NL80211_BAND_2GHZ; 5767 } else if (rx_ev.channel >= 36 && rx_ev.channel <= ATH12K_MAX_5G_CHAN) { 5768 status->band = NL80211_BAND_5GHZ; 5769 } else { 5770 /* Shouldn't happen unless list of advertised channels to 5771 * mac80211 has been changed. 5772 */ 5773 WARN_ON_ONCE(1); 5774 dev_kfree_skb(skb); 5775 goto exit; 5776 } 5777 5778 if (rx_ev.phy_mode == MODE_11B && 5779 (status->band == NL80211_BAND_5GHZ || status->band == NL80211_BAND_6GHZ)) 5780 ath12k_dbg(ab, ATH12K_DBG_WMI, 5781 "wmi mgmt rx 11b (CCK) on 5/6GHz, band = %d\n", status->band); 5782 5783 sband = &ar->mac.sbands[status->band]; 5784 5785 status->freq = ieee80211_channel_to_frequency(rx_ev.channel, 5786 status->band); 5787 status->signal = rx_ev.snr + ATH12K_DEFAULT_NOISE_FLOOR; 5788 status->rate_idx = ath12k_mac_bitrate_to_idx(sband, rx_ev.rate / 100); 5789 5790 hdr = (struct ieee80211_hdr *)skb->data; 5791 fc = le16_to_cpu(hdr->frame_control); 5792 5793 /* Firmware is guaranteed to report all essential management frames via 5794 * WMI while it can deliver some extra via HTT. Since there can be 5795 * duplicates split the reporting wrt monitor/sniffing. 5796 */ 5797 status->flag |= RX_FLAG_SKIP_MONITOR; 5798 5799 /* In case of PMF, FW delivers decrypted frames with Protected Bit set 5800 * including group privacy action frames. 5801 */ 5802 if (ieee80211_has_protected(hdr->frame_control)) { 5803 status->flag |= RX_FLAG_DECRYPTED; 5804 5805 if (!ieee80211_is_robust_mgmt_frame(skb)) { 5806 status->flag |= RX_FLAG_IV_STRIPPED | 5807 RX_FLAG_MMIC_STRIPPED; 5808 hdr->frame_control = __cpu_to_le16(fc & 5809 ~IEEE80211_FCTL_PROTECTED); 5810 } 5811 } 5812 5813 /* TODO: Pending handle beacon implementation 5814 *if (ieee80211_is_beacon(hdr->frame_control)) 5815 * ath12k_mac_handle_beacon(ar, skb); 5816 */ 5817 5818 ath12k_dbg(ab, ATH12K_DBG_MGMT, 5819 "event mgmt rx skb %pK len %d ftype %02x stype %02x\n", 5820 skb, skb->len, 5821 fc & IEEE80211_FCTL_FTYPE, fc & IEEE80211_FCTL_STYPE); 5822 5823 ath12k_dbg(ab, ATH12K_DBG_MGMT, 5824 "event mgmt rx freq %d band %d snr %d, rate_idx %d\n", 5825 status->freq, status->band, status->signal, 5826 status->rate_idx); 5827 5828 ieee80211_rx_ni(ar->hw, skb); 5829 5830 exit: 5831 rcu_read_unlock(); 5832 } 5833 5834 static void ath12k_mgmt_tx_compl_event(struct ath12k_base *ab, struct sk_buff *skb) 5835 { 5836 struct wmi_mgmt_tx_compl_event tx_compl_param = {0}; 5837 struct ath12k *ar; 5838 5839 if (ath12k_pull_mgmt_tx_compl_param_tlv(ab, skb, &tx_compl_param) != 0) { 5840 ath12k_warn(ab, "failed to extract mgmt tx compl event"); 5841 return; 5842 } 5843 5844 rcu_read_lock(); 5845 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(tx_compl_param.pdev_id)); 5846 if (!ar) { 5847 ath12k_warn(ab, "invalid pdev id %d in mgmt_tx_compl_event\n", 5848 tx_compl_param.pdev_id); 5849 goto exit; 5850 } 5851 5852 wmi_process_mgmt_tx_comp(ar, le32_to_cpu(tx_compl_param.desc_id), 5853 le32_to_cpu(tx_compl_param.status)); 5854 5855 ath12k_dbg(ab, ATH12K_DBG_MGMT, 5856 "mgmt tx compl ev pdev_id %d, desc_id %d, status %d", 5857 tx_compl_param.pdev_id, tx_compl_param.desc_id, 5858 tx_compl_param.status); 5859 5860 exit: 5861 rcu_read_unlock(); 5862 } 5863 5864 static struct ath12k *ath12k_get_ar_on_scan_abort(struct ath12k_base *ab, 5865 u32 vdev_id) 5866 { 5867 int i; 5868 struct ath12k_pdev *pdev; 5869 struct ath12k *ar; 5870 5871 for (i = 0; i < ab->num_radios; i++) { 5872 pdev = rcu_dereference(ab->pdevs_active[i]); 5873 if (pdev && pdev->ar) { 5874 ar = pdev->ar; 5875 5876 spin_lock_bh(&ar->data_lock); 5877 if (ar->scan.state == ATH12K_SCAN_ABORTING && 5878 ar->scan.vdev_id == vdev_id) { 5879 spin_unlock_bh(&ar->data_lock); 5880 return ar; 5881 } 5882 spin_unlock_bh(&ar->data_lock); 5883 } 5884 } 5885 return NULL; 5886 } 5887 5888 static void ath12k_scan_event(struct ath12k_base *ab, struct sk_buff *skb) 5889 { 5890 struct ath12k *ar; 5891 struct wmi_scan_event scan_ev = {0}; 5892 5893 if (ath12k_pull_scan_ev(ab, skb, &scan_ev) != 0) { 5894 ath12k_warn(ab, "failed to extract scan event"); 5895 return; 5896 } 5897 5898 rcu_read_lock(); 5899 5900 /* In case the scan was cancelled, ex. during interface teardown, 5901 * the interface will not be found in active interfaces. 5902 * Rather, in such scenarios, iterate over the active pdev's to 5903 * search 'ar' if the corresponding 'ar' scan is ABORTING and the 5904 * aborting scan's vdev id matches this event info. 5905 */ 5906 if (le32_to_cpu(scan_ev.event_type) == WMI_SCAN_EVENT_COMPLETED && 5907 le32_to_cpu(scan_ev.reason) == WMI_SCAN_REASON_CANCELLED) 5908 ar = ath12k_get_ar_on_scan_abort(ab, le32_to_cpu(scan_ev.vdev_id)); 5909 else 5910 ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(scan_ev.vdev_id)); 5911 5912 if (!ar) { 5913 ath12k_warn(ab, "Received scan event for unknown vdev"); 5914 rcu_read_unlock(); 5915 return; 5916 } 5917 5918 spin_lock_bh(&ar->data_lock); 5919 5920 ath12k_dbg(ab, ATH12K_DBG_WMI, 5921 "scan event %s type %d reason %d freq %d req_id %d scan_id %d vdev_id %d state %s (%d)\n", 5922 ath12k_wmi_event_scan_type_str(le32_to_cpu(scan_ev.event_type), 5923 le32_to_cpu(scan_ev.reason)), 5924 le32_to_cpu(scan_ev.event_type), 5925 le32_to_cpu(scan_ev.reason), 5926 le32_to_cpu(scan_ev.channel_freq), 5927 le32_to_cpu(scan_ev.scan_req_id), 5928 le32_to_cpu(scan_ev.scan_id), 5929 le32_to_cpu(scan_ev.vdev_id), 5930 ath12k_scan_state_str(ar->scan.state), ar->scan.state); 5931 5932 switch (le32_to_cpu(scan_ev.event_type)) { 5933 case WMI_SCAN_EVENT_STARTED: 5934 ath12k_wmi_event_scan_started(ar); 5935 break; 5936 case WMI_SCAN_EVENT_COMPLETED: 5937 ath12k_wmi_event_scan_completed(ar); 5938 break; 5939 case WMI_SCAN_EVENT_BSS_CHANNEL: 5940 ath12k_wmi_event_scan_bss_chan(ar); 5941 break; 5942 case WMI_SCAN_EVENT_FOREIGN_CHAN: 5943 ath12k_wmi_event_scan_foreign_chan(ar, le32_to_cpu(scan_ev.channel_freq)); 5944 break; 5945 case WMI_SCAN_EVENT_START_FAILED: 5946 ath12k_warn(ab, "received scan start failure event\n"); 5947 ath12k_wmi_event_scan_start_failed(ar); 5948 break; 5949 case WMI_SCAN_EVENT_DEQUEUED: 5950 __ath12k_mac_scan_finish(ar); 5951 break; 5952 case WMI_SCAN_EVENT_PREEMPTED: 5953 case WMI_SCAN_EVENT_RESTARTED: 5954 case WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT: 5955 default: 5956 break; 5957 } 5958 5959 spin_unlock_bh(&ar->data_lock); 5960 5961 rcu_read_unlock(); 5962 } 5963 5964 static void ath12k_peer_sta_kickout_event(struct ath12k_base *ab, struct sk_buff *skb) 5965 { 5966 struct wmi_peer_sta_kickout_arg arg = {}; 5967 struct ieee80211_sta *sta; 5968 struct ath12k_peer *peer; 5969 struct ath12k *ar; 5970 5971 if (ath12k_pull_peer_sta_kickout_ev(ab, skb, &arg) != 0) { 5972 ath12k_warn(ab, "failed to extract peer sta kickout event"); 5973 return; 5974 } 5975 5976 rcu_read_lock(); 5977 5978 spin_lock_bh(&ab->base_lock); 5979 5980 peer = ath12k_peer_find_by_addr(ab, arg.mac_addr); 5981 5982 if (!peer) { 5983 ath12k_warn(ab, "peer not found %pM\n", 5984 arg.mac_addr); 5985 goto exit; 5986 } 5987 5988 ar = ath12k_mac_get_ar_by_vdev_id(ab, peer->vdev_id); 5989 if (!ar) { 5990 ath12k_warn(ab, "invalid vdev id in peer sta kickout ev %d", 5991 peer->vdev_id); 5992 goto exit; 5993 } 5994 5995 sta = ieee80211_find_sta_by_ifaddr(ar->hw, 5996 arg.mac_addr, NULL); 5997 if (!sta) { 5998 ath12k_warn(ab, "Spurious quick kickout for STA %pM\n", 5999 arg.mac_addr); 6000 goto exit; 6001 } 6002 6003 ath12k_dbg(ab, ATH12K_DBG_WMI, "peer sta kickout event %pM", 6004 arg.mac_addr); 6005 6006 ieee80211_report_low_ack(sta, 10); 6007 6008 exit: 6009 spin_unlock_bh(&ab->base_lock); 6010 rcu_read_unlock(); 6011 } 6012 6013 static void ath12k_roam_event(struct ath12k_base *ab, struct sk_buff *skb) 6014 { 6015 struct wmi_roam_event roam_ev = {}; 6016 struct ath12k *ar; 6017 6018 if (ath12k_pull_roam_ev(ab, skb, &roam_ev) != 0) { 6019 ath12k_warn(ab, "failed to extract roam event"); 6020 return; 6021 } 6022 6023 ath12k_dbg(ab, ATH12K_DBG_WMI, 6024 "wmi roam event vdev %u reason 0x%08x rssi %d\n", 6025 roam_ev.vdev_id, roam_ev.reason, roam_ev.rssi); 6026 6027 rcu_read_lock(); 6028 ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(roam_ev.vdev_id)); 6029 if (!ar) { 6030 ath12k_warn(ab, "invalid vdev id in roam ev %d", 6031 roam_ev.vdev_id); 6032 rcu_read_unlock(); 6033 return; 6034 } 6035 6036 if (le32_to_cpu(roam_ev.reason) >= WMI_ROAM_REASON_MAX) 6037 ath12k_warn(ab, "ignoring unknown roam event reason %d on vdev %i\n", 6038 roam_ev.reason, roam_ev.vdev_id); 6039 6040 switch (le32_to_cpu(roam_ev.reason)) { 6041 case WMI_ROAM_REASON_BEACON_MISS: 6042 /* TODO: Pending beacon miss and connection_loss_work 6043 * implementation 6044 * ath12k_mac_handle_beacon_miss(ar, vdev_id); 6045 */ 6046 break; 6047 case WMI_ROAM_REASON_BETTER_AP: 6048 case WMI_ROAM_REASON_LOW_RSSI: 6049 case WMI_ROAM_REASON_SUITABLE_AP_FOUND: 6050 case WMI_ROAM_REASON_HO_FAILED: 6051 ath12k_warn(ab, "ignoring not implemented roam event reason %d on vdev %i\n", 6052 roam_ev.reason, roam_ev.vdev_id); 6053 break; 6054 } 6055 6056 rcu_read_unlock(); 6057 } 6058 6059 static void ath12k_chan_info_event(struct ath12k_base *ab, struct sk_buff *skb) 6060 { 6061 struct wmi_chan_info_event ch_info_ev = {0}; 6062 struct ath12k *ar; 6063 struct survey_info *survey; 6064 int idx; 6065 /* HW channel counters frequency value in hertz */ 6066 u32 cc_freq_hz = ab->cc_freq_hz; 6067 6068 if (ath12k_pull_chan_info_ev(ab, skb->data, skb->len, &ch_info_ev) != 0) { 6069 ath12k_warn(ab, "failed to extract chan info event"); 6070 return; 6071 } 6072 6073 ath12k_dbg(ab, ATH12K_DBG_WMI, 6074 "chan info vdev_id %d err_code %d freq %d cmd_flags %d noise_floor %d rx_clear_count %d cycle_count %d mac_clk_mhz %d\n", 6075 ch_info_ev.vdev_id, ch_info_ev.err_code, ch_info_ev.freq, 6076 ch_info_ev.cmd_flags, ch_info_ev.noise_floor, 6077 ch_info_ev.rx_clear_count, ch_info_ev.cycle_count, 6078 ch_info_ev.mac_clk_mhz); 6079 6080 if (le32_to_cpu(ch_info_ev.cmd_flags) == WMI_CHAN_INFO_END_RESP) { 6081 ath12k_dbg(ab, ATH12K_DBG_WMI, "chan info report completed\n"); 6082 return; 6083 } 6084 6085 rcu_read_lock(); 6086 ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(ch_info_ev.vdev_id)); 6087 if (!ar) { 6088 ath12k_warn(ab, "invalid vdev id in chan info ev %d", 6089 ch_info_ev.vdev_id); 6090 rcu_read_unlock(); 6091 return; 6092 } 6093 spin_lock_bh(&ar->data_lock); 6094 6095 switch (ar->scan.state) { 6096 case ATH12K_SCAN_IDLE: 6097 case ATH12K_SCAN_STARTING: 6098 ath12k_warn(ab, "received chan info event without a scan request, ignoring\n"); 6099 goto exit; 6100 case ATH12K_SCAN_RUNNING: 6101 case ATH12K_SCAN_ABORTING: 6102 break; 6103 } 6104 6105 idx = freq_to_idx(ar, le32_to_cpu(ch_info_ev.freq)); 6106 if (idx >= ARRAY_SIZE(ar->survey)) { 6107 ath12k_warn(ab, "chan info: invalid frequency %d (idx %d out of bounds)\n", 6108 ch_info_ev.freq, idx); 6109 goto exit; 6110 } 6111 6112 /* If FW provides MAC clock frequency in Mhz, overriding the initialized 6113 * HW channel counters frequency value 6114 */ 6115 if (ch_info_ev.mac_clk_mhz) 6116 cc_freq_hz = (le32_to_cpu(ch_info_ev.mac_clk_mhz) * 1000); 6117 6118 if (ch_info_ev.cmd_flags == WMI_CHAN_INFO_START_RESP) { 6119 survey = &ar->survey[idx]; 6120 memset(survey, 0, sizeof(*survey)); 6121 survey->noise = le32_to_cpu(ch_info_ev.noise_floor); 6122 survey->filled = SURVEY_INFO_NOISE_DBM | SURVEY_INFO_TIME | 6123 SURVEY_INFO_TIME_BUSY; 6124 survey->time = div_u64(le32_to_cpu(ch_info_ev.cycle_count), cc_freq_hz); 6125 survey->time_busy = div_u64(le32_to_cpu(ch_info_ev.rx_clear_count), 6126 cc_freq_hz); 6127 } 6128 exit: 6129 spin_unlock_bh(&ar->data_lock); 6130 rcu_read_unlock(); 6131 } 6132 6133 static void 6134 ath12k_pdev_bss_chan_info_event(struct ath12k_base *ab, struct sk_buff *skb) 6135 { 6136 struct wmi_pdev_bss_chan_info_event bss_ch_info_ev = {}; 6137 struct survey_info *survey; 6138 struct ath12k *ar; 6139 u32 cc_freq_hz = ab->cc_freq_hz; 6140 u64 busy, total, tx, rx, rx_bss; 6141 int idx; 6142 6143 if (ath12k_pull_pdev_bss_chan_info_ev(ab, skb, &bss_ch_info_ev) != 0) { 6144 ath12k_warn(ab, "failed to extract pdev bss chan info event"); 6145 return; 6146 } 6147 6148 busy = (u64)(le32_to_cpu(bss_ch_info_ev.rx_clear_count_high)) << 32 | 6149 le32_to_cpu(bss_ch_info_ev.rx_clear_count_low); 6150 6151 total = (u64)(le32_to_cpu(bss_ch_info_ev.cycle_count_high)) << 32 | 6152 le32_to_cpu(bss_ch_info_ev.cycle_count_low); 6153 6154 tx = (u64)(le32_to_cpu(bss_ch_info_ev.tx_cycle_count_high)) << 32 | 6155 le32_to_cpu(bss_ch_info_ev.tx_cycle_count_low); 6156 6157 rx = (u64)(le32_to_cpu(bss_ch_info_ev.rx_cycle_count_high)) << 32 | 6158 le32_to_cpu(bss_ch_info_ev.rx_cycle_count_low); 6159 6160 rx_bss = (u64)(le32_to_cpu(bss_ch_info_ev.rx_bss_cycle_count_high)) << 32 | 6161 le32_to_cpu(bss_ch_info_ev.rx_bss_cycle_count_low); 6162 6163 ath12k_dbg(ab, ATH12K_DBG_WMI, 6164 "pdev bss chan info:\n pdev_id: %d freq: %d noise: %d cycle: busy %llu total %llu tx %llu rx %llu rx_bss %llu\n", 6165 bss_ch_info_ev.pdev_id, bss_ch_info_ev.freq, 6166 bss_ch_info_ev.noise_floor, busy, total, 6167 tx, rx, rx_bss); 6168 6169 rcu_read_lock(); 6170 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(bss_ch_info_ev.pdev_id)); 6171 6172 if (!ar) { 6173 ath12k_warn(ab, "invalid pdev id %d in bss_chan_info event\n", 6174 bss_ch_info_ev.pdev_id); 6175 rcu_read_unlock(); 6176 return; 6177 } 6178 6179 spin_lock_bh(&ar->data_lock); 6180 idx = freq_to_idx(ar, le32_to_cpu(bss_ch_info_ev.freq)); 6181 if (idx >= ARRAY_SIZE(ar->survey)) { 6182 ath12k_warn(ab, "bss chan info: invalid frequency %d (idx %d out of bounds)\n", 6183 bss_ch_info_ev.freq, idx); 6184 goto exit; 6185 } 6186 6187 survey = &ar->survey[idx]; 6188 6189 survey->noise = le32_to_cpu(bss_ch_info_ev.noise_floor); 6190 survey->time = div_u64(total, cc_freq_hz); 6191 survey->time_busy = div_u64(busy, cc_freq_hz); 6192 survey->time_rx = div_u64(rx_bss, cc_freq_hz); 6193 survey->time_tx = div_u64(tx, cc_freq_hz); 6194 survey->filled |= (SURVEY_INFO_NOISE_DBM | 6195 SURVEY_INFO_TIME | 6196 SURVEY_INFO_TIME_BUSY | 6197 SURVEY_INFO_TIME_RX | 6198 SURVEY_INFO_TIME_TX); 6199 exit: 6200 spin_unlock_bh(&ar->data_lock); 6201 complete(&ar->bss_survey_done); 6202 6203 rcu_read_unlock(); 6204 } 6205 6206 static void ath12k_vdev_install_key_compl_event(struct ath12k_base *ab, 6207 struct sk_buff *skb) 6208 { 6209 struct wmi_vdev_install_key_complete_arg install_key_compl = {0}; 6210 struct ath12k *ar; 6211 6212 if (ath12k_pull_vdev_install_key_compl_ev(ab, skb, &install_key_compl) != 0) { 6213 ath12k_warn(ab, "failed to extract install key compl event"); 6214 return; 6215 } 6216 6217 ath12k_dbg(ab, ATH12K_DBG_WMI, 6218 "vdev install key ev idx %d flags %08x macaddr %pM status %d\n", 6219 install_key_compl.key_idx, install_key_compl.key_flags, 6220 install_key_compl.macaddr, install_key_compl.status); 6221 6222 rcu_read_lock(); 6223 ar = ath12k_mac_get_ar_by_vdev_id(ab, install_key_compl.vdev_id); 6224 if (!ar) { 6225 ath12k_warn(ab, "invalid vdev id in install key compl ev %d", 6226 install_key_compl.vdev_id); 6227 rcu_read_unlock(); 6228 return; 6229 } 6230 6231 ar->install_key_status = 0; 6232 6233 if (install_key_compl.status != WMI_VDEV_INSTALL_KEY_COMPL_STATUS_SUCCESS) { 6234 ath12k_warn(ab, "install key failed for %pM status %d\n", 6235 install_key_compl.macaddr, install_key_compl.status); 6236 ar->install_key_status = install_key_compl.status; 6237 } 6238 6239 complete(&ar->install_key_done); 6240 rcu_read_unlock(); 6241 } 6242 6243 static int ath12k_wmi_tlv_services_parser(struct ath12k_base *ab, 6244 u16 tag, u16 len, 6245 const void *ptr, 6246 void *data) 6247 { 6248 const struct wmi_service_available_event *ev; 6249 u32 *wmi_ext2_service_bitmap; 6250 int i, j; 6251 u16 expected_len; 6252 6253 expected_len = WMI_SERVICE_SEGMENT_BM_SIZE32 * sizeof(u32); 6254 if (len < expected_len) { 6255 ath12k_warn(ab, "invalid length %d for the WMI services available tag 0x%x\n", 6256 len, tag); 6257 return -EINVAL; 6258 } 6259 6260 switch (tag) { 6261 case WMI_TAG_SERVICE_AVAILABLE_EVENT: 6262 ev = (struct wmi_service_available_event *)ptr; 6263 for (i = 0, j = WMI_MAX_SERVICE; 6264 i < WMI_SERVICE_SEGMENT_BM_SIZE32 && j < WMI_MAX_EXT_SERVICE; 6265 i++) { 6266 do { 6267 if (le32_to_cpu(ev->wmi_service_segment_bitmap[i]) & 6268 BIT(j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32)) 6269 set_bit(j, ab->wmi_ab.svc_map); 6270 } while (++j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32); 6271 } 6272 6273 ath12k_dbg(ab, ATH12K_DBG_WMI, 6274 "wmi_ext_service_bitmap 0x%x 0x%x 0x%x 0x%x", 6275 ev->wmi_service_segment_bitmap[0], 6276 ev->wmi_service_segment_bitmap[1], 6277 ev->wmi_service_segment_bitmap[2], 6278 ev->wmi_service_segment_bitmap[3]); 6279 break; 6280 case WMI_TAG_ARRAY_UINT32: 6281 wmi_ext2_service_bitmap = (u32 *)ptr; 6282 for (i = 0, j = WMI_MAX_EXT_SERVICE; 6283 i < WMI_SERVICE_SEGMENT_BM_SIZE32 && j < WMI_MAX_EXT2_SERVICE; 6284 i++) { 6285 do { 6286 if (wmi_ext2_service_bitmap[i] & 6287 BIT(j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32)) 6288 set_bit(j, ab->wmi_ab.svc_map); 6289 } while (++j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32); 6290 } 6291 6292 ath12k_dbg(ab, ATH12K_DBG_WMI, 6293 "wmi_ext2_service_bitmap 0x%04x 0x%04x 0x%04x 0x%04x", 6294 wmi_ext2_service_bitmap[0], wmi_ext2_service_bitmap[1], 6295 wmi_ext2_service_bitmap[2], wmi_ext2_service_bitmap[3]); 6296 break; 6297 } 6298 return 0; 6299 } 6300 6301 static int ath12k_service_available_event(struct ath12k_base *ab, struct sk_buff *skb) 6302 { 6303 int ret; 6304 6305 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 6306 ath12k_wmi_tlv_services_parser, 6307 NULL); 6308 return ret; 6309 } 6310 6311 static void ath12k_peer_assoc_conf_event(struct ath12k_base *ab, struct sk_buff *skb) 6312 { 6313 struct wmi_peer_assoc_conf_arg peer_assoc_conf = {0}; 6314 struct ath12k *ar; 6315 6316 if (ath12k_pull_peer_assoc_conf_ev(ab, skb, &peer_assoc_conf) != 0) { 6317 ath12k_warn(ab, "failed to extract peer assoc conf event"); 6318 return; 6319 } 6320 6321 ath12k_dbg(ab, ATH12K_DBG_WMI, 6322 "peer assoc conf ev vdev id %d macaddr %pM\n", 6323 peer_assoc_conf.vdev_id, peer_assoc_conf.macaddr); 6324 6325 rcu_read_lock(); 6326 ar = ath12k_mac_get_ar_by_vdev_id(ab, peer_assoc_conf.vdev_id); 6327 6328 if (!ar) { 6329 ath12k_warn(ab, "invalid vdev id in peer assoc conf ev %d", 6330 peer_assoc_conf.vdev_id); 6331 rcu_read_unlock(); 6332 return; 6333 } 6334 6335 complete(&ar->peer_assoc_done); 6336 rcu_read_unlock(); 6337 } 6338 6339 static void ath12k_update_stats_event(struct ath12k_base *ab, struct sk_buff *skb) 6340 { 6341 } 6342 6343 /* PDEV_CTL_FAILSAFE_CHECK_EVENT is received from FW when the frequency scanned 6344 * is not part of BDF CTL(Conformance test limits) table entries. 6345 */ 6346 static void ath12k_pdev_ctl_failsafe_check_event(struct ath12k_base *ab, 6347 struct sk_buff *skb) 6348 { 6349 const void **tb; 6350 const struct wmi_pdev_ctl_failsafe_chk_event *ev; 6351 int ret; 6352 6353 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC); 6354 if (IS_ERR(tb)) { 6355 ret = PTR_ERR(tb); 6356 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 6357 return; 6358 } 6359 6360 ev = tb[WMI_TAG_PDEV_CTL_FAILSAFE_CHECK_EVENT]; 6361 if (!ev) { 6362 ath12k_warn(ab, "failed to fetch pdev ctl failsafe check ev"); 6363 kfree(tb); 6364 return; 6365 } 6366 6367 ath12k_dbg(ab, ATH12K_DBG_WMI, 6368 "pdev ctl failsafe check ev status %d\n", 6369 ev->ctl_failsafe_status); 6370 6371 /* If ctl_failsafe_status is set to 1 FW will max out the Transmit power 6372 * to 10 dBm else the CTL power entry in the BDF would be picked up. 6373 */ 6374 if (ev->ctl_failsafe_status != 0) 6375 ath12k_warn(ab, "pdev ctl failsafe failure status %d", 6376 ev->ctl_failsafe_status); 6377 6378 kfree(tb); 6379 } 6380 6381 static void 6382 ath12k_wmi_process_csa_switch_count_event(struct ath12k_base *ab, 6383 const struct ath12k_wmi_pdev_csa_event *ev, 6384 const u32 *vdev_ids) 6385 { 6386 int i; 6387 struct ath12k_vif *arvif; 6388 6389 /* Finish CSA once the switch count becomes NULL */ 6390 if (ev->current_switch_count) 6391 return; 6392 6393 rcu_read_lock(); 6394 for (i = 0; i < le32_to_cpu(ev->num_vdevs); i++) { 6395 arvif = ath12k_mac_get_arvif_by_vdev_id(ab, vdev_ids[i]); 6396 6397 if (!arvif) { 6398 ath12k_warn(ab, "Recvd csa status for unknown vdev %d", 6399 vdev_ids[i]); 6400 continue; 6401 } 6402 6403 if (arvif->is_up && arvif->vif->bss_conf.csa_active) 6404 ieee80211_csa_finish(arvif->vif); 6405 } 6406 rcu_read_unlock(); 6407 } 6408 6409 static void 6410 ath12k_wmi_pdev_csa_switch_count_status_event(struct ath12k_base *ab, 6411 struct sk_buff *skb) 6412 { 6413 const void **tb; 6414 const struct ath12k_wmi_pdev_csa_event *ev; 6415 const u32 *vdev_ids; 6416 int ret; 6417 6418 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC); 6419 if (IS_ERR(tb)) { 6420 ret = PTR_ERR(tb); 6421 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 6422 return; 6423 } 6424 6425 ev = tb[WMI_TAG_PDEV_CSA_SWITCH_COUNT_STATUS_EVENT]; 6426 vdev_ids = tb[WMI_TAG_ARRAY_UINT32]; 6427 6428 if (!ev || !vdev_ids) { 6429 ath12k_warn(ab, "failed to fetch pdev csa switch count ev"); 6430 kfree(tb); 6431 return; 6432 } 6433 6434 ath12k_dbg(ab, ATH12K_DBG_WMI, 6435 "pdev csa switch count %d for pdev %d, num_vdevs %d", 6436 ev->current_switch_count, ev->pdev_id, 6437 ev->num_vdevs); 6438 6439 ath12k_wmi_process_csa_switch_count_event(ab, ev, vdev_ids); 6440 6441 kfree(tb); 6442 } 6443 6444 static void 6445 ath12k_wmi_pdev_dfs_radar_detected_event(struct ath12k_base *ab, struct sk_buff *skb) 6446 { 6447 const void **tb; 6448 const struct ath12k_wmi_pdev_radar_event *ev; 6449 struct ath12k *ar; 6450 int ret; 6451 6452 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC); 6453 if (IS_ERR(tb)) { 6454 ret = PTR_ERR(tb); 6455 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 6456 return; 6457 } 6458 6459 ev = tb[WMI_TAG_PDEV_DFS_RADAR_DETECTION_EVENT]; 6460 6461 if (!ev) { 6462 ath12k_warn(ab, "failed to fetch pdev dfs radar detected ev"); 6463 kfree(tb); 6464 return; 6465 } 6466 6467 ath12k_dbg(ab, ATH12K_DBG_WMI, 6468 "pdev dfs radar detected on pdev %d, detection mode %d, chan freq %d, chan_width %d, detector id %d, seg id %d, timestamp %d, chirp %d, freq offset %d, sidx %d", 6469 ev->pdev_id, ev->detection_mode, ev->chan_freq, ev->chan_width, 6470 ev->detector_id, ev->segment_id, ev->timestamp, ev->is_chirp, 6471 ev->freq_offset, ev->sidx); 6472 6473 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(ev->pdev_id)); 6474 6475 if (!ar) { 6476 ath12k_warn(ab, "radar detected in invalid pdev %d\n", 6477 ev->pdev_id); 6478 goto exit; 6479 } 6480 6481 ath12k_dbg(ar->ab, ATH12K_DBG_REG, "DFS Radar Detected in pdev %d\n", 6482 ev->pdev_id); 6483 6484 if (ar->dfs_block_radar_events) 6485 ath12k_info(ab, "DFS Radar detected, but ignored as requested\n"); 6486 else 6487 ieee80211_radar_detected(ar->hw); 6488 6489 exit: 6490 kfree(tb); 6491 } 6492 6493 static void 6494 ath12k_wmi_pdev_temperature_event(struct ath12k_base *ab, 6495 struct sk_buff *skb) 6496 { 6497 struct ath12k *ar; 6498 struct wmi_pdev_temperature_event ev = {0}; 6499 6500 if (ath12k_pull_pdev_temp_ev(ab, skb->data, skb->len, &ev) != 0) { 6501 ath12k_warn(ab, "failed to extract pdev temperature event"); 6502 return; 6503 } 6504 6505 ath12k_dbg(ab, ATH12K_DBG_WMI, 6506 "pdev temperature ev temp %d pdev_id %d\n", ev.temp, ev.pdev_id); 6507 6508 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(ev.pdev_id)); 6509 if (!ar) { 6510 ath12k_warn(ab, "invalid pdev id in pdev temperature ev %d", ev.pdev_id); 6511 return; 6512 } 6513 } 6514 6515 static void ath12k_fils_discovery_event(struct ath12k_base *ab, 6516 struct sk_buff *skb) 6517 { 6518 const void **tb; 6519 const struct wmi_fils_discovery_event *ev; 6520 int ret; 6521 6522 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC); 6523 if (IS_ERR(tb)) { 6524 ret = PTR_ERR(tb); 6525 ath12k_warn(ab, 6526 "failed to parse FILS discovery event tlv %d\n", 6527 ret); 6528 return; 6529 } 6530 6531 ev = tb[WMI_TAG_HOST_SWFDA_EVENT]; 6532 if (!ev) { 6533 ath12k_warn(ab, "failed to fetch FILS discovery event\n"); 6534 kfree(tb); 6535 return; 6536 } 6537 6538 ath12k_warn(ab, 6539 "FILS discovery frame expected from host for vdev_id: %u, transmission scheduled at %u, next TBTT: %u\n", 6540 ev->vdev_id, ev->fils_tt, ev->tbtt); 6541 6542 kfree(tb); 6543 } 6544 6545 static void ath12k_probe_resp_tx_status_event(struct ath12k_base *ab, 6546 struct sk_buff *skb) 6547 { 6548 const void **tb; 6549 const struct wmi_probe_resp_tx_status_event *ev; 6550 int ret; 6551 6552 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC); 6553 if (IS_ERR(tb)) { 6554 ret = PTR_ERR(tb); 6555 ath12k_warn(ab, 6556 "failed to parse probe response transmission status event tlv: %d\n", 6557 ret); 6558 return; 6559 } 6560 6561 ev = tb[WMI_TAG_OFFLOAD_PRB_RSP_TX_STATUS_EVENT]; 6562 if (!ev) { 6563 ath12k_warn(ab, 6564 "failed to fetch probe response transmission status event"); 6565 kfree(tb); 6566 return; 6567 } 6568 6569 if (ev->tx_status) 6570 ath12k_warn(ab, 6571 "Probe response transmission failed for vdev_id %u, status %u\n", 6572 ev->vdev_id, ev->tx_status); 6573 6574 kfree(tb); 6575 } 6576 6577 static void ath12k_wmi_op_rx(struct ath12k_base *ab, struct sk_buff *skb) 6578 { 6579 struct wmi_cmd_hdr *cmd_hdr; 6580 enum wmi_tlv_event_id id; 6581 6582 cmd_hdr = (struct wmi_cmd_hdr *)skb->data; 6583 id = le32_get_bits(cmd_hdr->cmd_id, WMI_CMD_HDR_CMD_ID); 6584 6585 if (!skb_pull(skb, sizeof(struct wmi_cmd_hdr))) 6586 goto out; 6587 6588 switch (id) { 6589 /* Process all the WMI events here */ 6590 case WMI_SERVICE_READY_EVENTID: 6591 ath12k_service_ready_event(ab, skb); 6592 break; 6593 case WMI_SERVICE_READY_EXT_EVENTID: 6594 ath12k_service_ready_ext_event(ab, skb); 6595 break; 6596 case WMI_SERVICE_READY_EXT2_EVENTID: 6597 ath12k_service_ready_ext2_event(ab, skb); 6598 break; 6599 case WMI_REG_CHAN_LIST_CC_EXT_EVENTID: 6600 ath12k_reg_chan_list_event(ab, skb); 6601 break; 6602 case WMI_READY_EVENTID: 6603 ath12k_ready_event(ab, skb); 6604 break; 6605 case WMI_PEER_DELETE_RESP_EVENTID: 6606 ath12k_peer_delete_resp_event(ab, skb); 6607 break; 6608 case WMI_VDEV_START_RESP_EVENTID: 6609 ath12k_vdev_start_resp_event(ab, skb); 6610 break; 6611 case WMI_OFFLOAD_BCN_TX_STATUS_EVENTID: 6612 ath12k_bcn_tx_status_event(ab, skb); 6613 break; 6614 case WMI_VDEV_STOPPED_EVENTID: 6615 ath12k_vdev_stopped_event(ab, skb); 6616 break; 6617 case WMI_MGMT_RX_EVENTID: 6618 ath12k_mgmt_rx_event(ab, skb); 6619 /* mgmt_rx_event() owns the skb now! */ 6620 return; 6621 case WMI_MGMT_TX_COMPLETION_EVENTID: 6622 ath12k_mgmt_tx_compl_event(ab, skb); 6623 break; 6624 case WMI_SCAN_EVENTID: 6625 ath12k_scan_event(ab, skb); 6626 break; 6627 case WMI_PEER_STA_KICKOUT_EVENTID: 6628 ath12k_peer_sta_kickout_event(ab, skb); 6629 break; 6630 case WMI_ROAM_EVENTID: 6631 ath12k_roam_event(ab, skb); 6632 break; 6633 case WMI_CHAN_INFO_EVENTID: 6634 ath12k_chan_info_event(ab, skb); 6635 break; 6636 case WMI_PDEV_BSS_CHAN_INFO_EVENTID: 6637 ath12k_pdev_bss_chan_info_event(ab, skb); 6638 break; 6639 case WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID: 6640 ath12k_vdev_install_key_compl_event(ab, skb); 6641 break; 6642 case WMI_SERVICE_AVAILABLE_EVENTID: 6643 ath12k_service_available_event(ab, skb); 6644 break; 6645 case WMI_PEER_ASSOC_CONF_EVENTID: 6646 ath12k_peer_assoc_conf_event(ab, skb); 6647 break; 6648 case WMI_UPDATE_STATS_EVENTID: 6649 ath12k_update_stats_event(ab, skb); 6650 break; 6651 case WMI_PDEV_CTL_FAILSAFE_CHECK_EVENTID: 6652 ath12k_pdev_ctl_failsafe_check_event(ab, skb); 6653 break; 6654 case WMI_PDEV_CSA_SWITCH_COUNT_STATUS_EVENTID: 6655 ath12k_wmi_pdev_csa_switch_count_status_event(ab, skb); 6656 break; 6657 case WMI_PDEV_TEMPERATURE_EVENTID: 6658 ath12k_wmi_pdev_temperature_event(ab, skb); 6659 break; 6660 case WMI_PDEV_DMA_RING_BUF_RELEASE_EVENTID: 6661 ath12k_wmi_pdev_dma_ring_buf_release_event(ab, skb); 6662 break; 6663 case WMI_HOST_FILS_DISCOVERY_EVENTID: 6664 ath12k_fils_discovery_event(ab, skb); 6665 break; 6666 case WMI_OFFLOAD_PROB_RESP_TX_STATUS_EVENTID: 6667 ath12k_probe_resp_tx_status_event(ab, skb); 6668 break; 6669 /* add Unsupported events here */ 6670 case WMI_TBTTOFFSET_EXT_UPDATE_EVENTID: 6671 case WMI_PEER_OPER_MODE_CHANGE_EVENTID: 6672 case WMI_TWT_ENABLE_EVENTID: 6673 case WMI_TWT_DISABLE_EVENTID: 6674 case WMI_PDEV_DMA_RING_CFG_RSP_EVENTID: 6675 ath12k_dbg(ab, ATH12K_DBG_WMI, 6676 "ignoring unsupported event 0x%x\n", id); 6677 break; 6678 case WMI_PDEV_DFS_RADAR_DETECTION_EVENTID: 6679 ath12k_wmi_pdev_dfs_radar_detected_event(ab, skb); 6680 break; 6681 case WMI_VDEV_DELETE_RESP_EVENTID: 6682 ath12k_vdev_delete_resp_event(ab, skb); 6683 break; 6684 /* TODO: Add remaining events */ 6685 default: 6686 ath12k_dbg(ab, ATH12K_DBG_WMI, "Unknown eventid: 0x%x\n", id); 6687 break; 6688 } 6689 6690 out: 6691 dev_kfree_skb(skb); 6692 } 6693 6694 static int ath12k_connect_pdev_htc_service(struct ath12k_base *ab, 6695 u32 pdev_idx) 6696 { 6697 int status; 6698 u32 svc_id[] = { ATH12K_HTC_SVC_ID_WMI_CONTROL, 6699 ATH12K_HTC_SVC_ID_WMI_CONTROL_MAC1, 6700 ATH12K_HTC_SVC_ID_WMI_CONTROL_MAC2 }; 6701 struct ath12k_htc_svc_conn_req conn_req = {}; 6702 struct ath12k_htc_svc_conn_resp conn_resp = {}; 6703 6704 /* these fields are the same for all service endpoints */ 6705 conn_req.ep_ops.ep_tx_complete = ath12k_wmi_htc_tx_complete; 6706 conn_req.ep_ops.ep_rx_complete = ath12k_wmi_op_rx; 6707 conn_req.ep_ops.ep_tx_credits = ath12k_wmi_op_ep_tx_credits; 6708 6709 /* connect to control service */ 6710 conn_req.service_id = svc_id[pdev_idx]; 6711 6712 status = ath12k_htc_connect_service(&ab->htc, &conn_req, &conn_resp); 6713 if (status) { 6714 ath12k_warn(ab, "failed to connect to WMI CONTROL service status: %d\n", 6715 status); 6716 return status; 6717 } 6718 6719 ab->wmi_ab.wmi_endpoint_id[pdev_idx] = conn_resp.eid; 6720 ab->wmi_ab.wmi[pdev_idx].eid = conn_resp.eid; 6721 ab->wmi_ab.max_msg_len[pdev_idx] = conn_resp.max_msg_len; 6722 6723 return 0; 6724 } 6725 6726 static int 6727 ath12k_wmi_send_unit_test_cmd(struct ath12k *ar, 6728 struct wmi_unit_test_cmd ut_cmd, 6729 u32 *test_args) 6730 { 6731 struct ath12k_wmi_pdev *wmi = ar->wmi; 6732 struct wmi_unit_test_cmd *cmd; 6733 struct sk_buff *skb; 6734 struct wmi_tlv *tlv; 6735 void *ptr; 6736 u32 *ut_cmd_args; 6737 int buf_len, arg_len; 6738 int ret; 6739 int i; 6740 6741 arg_len = sizeof(u32) * le32_to_cpu(ut_cmd.num_args); 6742 buf_len = sizeof(ut_cmd) + arg_len + TLV_HDR_SIZE; 6743 6744 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, buf_len); 6745 if (!skb) 6746 return -ENOMEM; 6747 6748 cmd = (struct wmi_unit_test_cmd *)skb->data; 6749 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_UNIT_TEST_CMD, 6750 sizeof(ut_cmd)); 6751 6752 cmd->vdev_id = ut_cmd.vdev_id; 6753 cmd->module_id = ut_cmd.module_id; 6754 cmd->num_args = ut_cmd.num_args; 6755 cmd->diag_token = ut_cmd.diag_token; 6756 6757 ptr = skb->data + sizeof(ut_cmd); 6758 6759 tlv = ptr; 6760 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, arg_len); 6761 6762 ptr += TLV_HDR_SIZE; 6763 6764 ut_cmd_args = ptr; 6765 for (i = 0; i < le32_to_cpu(ut_cmd.num_args); i++) 6766 ut_cmd_args[i] = test_args[i]; 6767 6768 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 6769 "WMI unit test : module %d vdev %d n_args %d token %d\n", 6770 cmd->module_id, cmd->vdev_id, cmd->num_args, 6771 cmd->diag_token); 6772 6773 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_UNIT_TEST_CMDID); 6774 6775 if (ret) { 6776 ath12k_warn(ar->ab, "failed to send WMI_UNIT_TEST CMD :%d\n", 6777 ret); 6778 dev_kfree_skb(skb); 6779 } 6780 6781 return ret; 6782 } 6783 6784 int ath12k_wmi_simulate_radar(struct ath12k *ar) 6785 { 6786 struct ath12k_vif *arvif; 6787 u32 dfs_args[DFS_MAX_TEST_ARGS]; 6788 struct wmi_unit_test_cmd wmi_ut; 6789 bool arvif_found = false; 6790 6791 list_for_each_entry(arvif, &ar->arvifs, list) { 6792 if (arvif->is_started && arvif->vdev_type == WMI_VDEV_TYPE_AP) { 6793 arvif_found = true; 6794 break; 6795 } 6796 } 6797 6798 if (!arvif_found) 6799 return -EINVAL; 6800 6801 dfs_args[DFS_TEST_CMDID] = 0; 6802 dfs_args[DFS_TEST_PDEV_ID] = ar->pdev->pdev_id; 6803 /* Currently we could pass segment_id(b0 - b1), chirp(b2) 6804 * freq offset (b3 - b10) to unit test. For simulation 6805 * purpose this can be set to 0 which is valid. 6806 */ 6807 dfs_args[DFS_TEST_RADAR_PARAM] = 0; 6808 6809 wmi_ut.vdev_id = cpu_to_le32(arvif->vdev_id); 6810 wmi_ut.module_id = cpu_to_le32(DFS_UNIT_TEST_MODULE); 6811 wmi_ut.num_args = cpu_to_le32(DFS_MAX_TEST_ARGS); 6812 wmi_ut.diag_token = cpu_to_le32(DFS_UNIT_TEST_TOKEN); 6813 6814 ath12k_dbg(ar->ab, ATH12K_DBG_REG, "Triggering Radar Simulation\n"); 6815 6816 return ath12k_wmi_send_unit_test_cmd(ar, wmi_ut, dfs_args); 6817 } 6818 6819 int ath12k_wmi_connect(struct ath12k_base *ab) 6820 { 6821 u32 i; 6822 u8 wmi_ep_count; 6823 6824 wmi_ep_count = ab->htc.wmi_ep_count; 6825 if (wmi_ep_count > ab->hw_params->max_radios) 6826 return -1; 6827 6828 for (i = 0; i < wmi_ep_count; i++) 6829 ath12k_connect_pdev_htc_service(ab, i); 6830 6831 return 0; 6832 } 6833 6834 static void ath12k_wmi_pdev_detach(struct ath12k_base *ab, u8 pdev_id) 6835 { 6836 if (WARN_ON(pdev_id >= MAX_RADIOS)) 6837 return; 6838 6839 /* TODO: Deinit any pdev specific wmi resource */ 6840 } 6841 6842 int ath12k_wmi_pdev_attach(struct ath12k_base *ab, 6843 u8 pdev_id) 6844 { 6845 struct ath12k_wmi_pdev *wmi_handle; 6846 6847 if (pdev_id >= ab->hw_params->max_radios) 6848 return -EINVAL; 6849 6850 wmi_handle = &ab->wmi_ab.wmi[pdev_id]; 6851 6852 wmi_handle->wmi_ab = &ab->wmi_ab; 6853 6854 ab->wmi_ab.ab = ab; 6855 /* TODO: Init remaining resource specific to pdev */ 6856 6857 return 0; 6858 } 6859 6860 int ath12k_wmi_attach(struct ath12k_base *ab) 6861 { 6862 int ret; 6863 6864 ret = ath12k_wmi_pdev_attach(ab, 0); 6865 if (ret) 6866 return ret; 6867 6868 ab->wmi_ab.ab = ab; 6869 ab->wmi_ab.preferred_hw_mode = WMI_HOST_HW_MODE_MAX; 6870 6871 /* It's overwritten when service_ext_ready is handled */ 6872 if (ab->hw_params->single_pdev_only) 6873 ab->wmi_ab.preferred_hw_mode = WMI_HOST_HW_MODE_SINGLE; 6874 6875 /* TODO: Init remaining wmi soc resources required */ 6876 init_completion(&ab->wmi_ab.service_ready); 6877 init_completion(&ab->wmi_ab.unified_ready); 6878 6879 return 0; 6880 } 6881 6882 void ath12k_wmi_detach(struct ath12k_base *ab) 6883 { 6884 int i; 6885 6886 /* TODO: Deinit wmi resource specific to SOC as required */ 6887 6888 for (i = 0; i < ab->htc.wmi_ep_count; i++) 6889 ath12k_wmi_pdev_detach(ab, i); 6890 6891 ath12k_wmi_free_dbring_caps(ab); 6892 } 6893