1 // SPDX-License-Identifier: BSD-3-Clause-Clear 2 /* 3 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved. 4 * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved. 5 */ 6 #include <linux/skbuff.h> 7 #include <linux/ctype.h> 8 #include <net/mac80211.h> 9 #include <net/cfg80211.h> 10 #include <linux/completion.h> 11 #include <linux/if_ether.h> 12 #include <linux/types.h> 13 #include <linux/pci.h> 14 #include <linux/uuid.h> 15 #include <linux/time.h> 16 #include <linux/of.h> 17 #include "core.h" 18 #include "debug.h" 19 #include "mac.h" 20 #include "hw.h" 21 #include "peer.h" 22 #include "p2p.h" 23 24 struct ath12k_wmi_svc_ready_parse { 25 bool wmi_svc_bitmap_done; 26 }; 27 28 struct ath12k_wmi_dma_ring_caps_parse { 29 struct ath12k_wmi_dma_ring_caps_params *dma_ring_caps; 30 u32 n_dma_ring_caps; 31 }; 32 33 struct ath12k_wmi_service_ext_arg { 34 u32 default_conc_scan_config_bits; 35 u32 default_fw_config_bits; 36 struct ath12k_wmi_ppe_threshold_arg ppet; 37 u32 he_cap_info; 38 u32 mpdu_density; 39 u32 max_bssid_rx_filters; 40 u32 num_hw_modes; 41 u32 num_phy; 42 }; 43 44 struct ath12k_wmi_svc_rdy_ext_parse { 45 struct ath12k_wmi_service_ext_arg arg; 46 const struct ath12k_wmi_soc_mac_phy_hw_mode_caps_params *hw_caps; 47 const struct ath12k_wmi_hw_mode_cap_params *hw_mode_caps; 48 u32 n_hw_mode_caps; 49 u32 tot_phy_id; 50 struct ath12k_wmi_hw_mode_cap_params pref_hw_mode_caps; 51 struct ath12k_wmi_mac_phy_caps_params *mac_phy_caps; 52 u32 n_mac_phy_caps; 53 const struct ath12k_wmi_soc_hal_reg_caps_params *soc_hal_reg_caps; 54 const struct ath12k_wmi_hal_reg_caps_ext_params *ext_hal_reg_caps; 55 u32 n_ext_hal_reg_caps; 56 struct ath12k_wmi_dma_ring_caps_parse dma_caps_parse; 57 bool hw_mode_done; 58 bool mac_phy_done; 59 bool ext_hal_reg_done; 60 bool mac_phy_chainmask_combo_done; 61 bool mac_phy_chainmask_cap_done; 62 bool oem_dma_ring_cap_done; 63 bool dma_ring_cap_done; 64 }; 65 66 struct ath12k_wmi_svc_rdy_ext2_arg { 67 u32 reg_db_version; 68 u32 hw_min_max_tx_power_2ghz; 69 u32 hw_min_max_tx_power_5ghz; 70 u32 chwidth_num_peer_caps; 71 u32 preamble_puncture_bw; 72 u32 max_user_per_ppdu_ofdma; 73 u32 max_user_per_ppdu_mumimo; 74 u32 target_cap_flags; 75 u32 eht_cap_mac_info[WMI_MAX_EHTCAP_MAC_SIZE]; 76 u32 max_num_linkview_peers; 77 u32 max_num_msduq_supported_per_tid; 78 u32 default_num_msduq_supported_per_tid; 79 }; 80 81 struct ath12k_wmi_svc_rdy_ext2_parse { 82 struct ath12k_wmi_svc_rdy_ext2_arg arg; 83 struct ath12k_wmi_dma_ring_caps_parse dma_caps_parse; 84 bool dma_ring_cap_done; 85 bool spectral_bin_scaling_done; 86 bool mac_phy_caps_ext_done; 87 }; 88 89 struct ath12k_wmi_rdy_parse { 90 u32 num_extra_mac_addr; 91 }; 92 93 struct ath12k_wmi_dma_buf_release_arg { 94 struct ath12k_wmi_dma_buf_release_fixed_params fixed; 95 const struct ath12k_wmi_dma_buf_release_entry_params *buf_entry; 96 const struct ath12k_wmi_dma_buf_release_meta_data_params *meta_data; 97 u32 num_buf_entry; 98 u32 num_meta; 99 bool buf_entry_done; 100 bool meta_data_done; 101 }; 102 103 struct ath12k_wmi_tlv_policy { 104 size_t min_len; 105 }; 106 107 struct wmi_tlv_mgmt_rx_parse { 108 const struct ath12k_wmi_mgmt_rx_params *fixed; 109 const u8 *frame_buf; 110 bool frame_buf_done; 111 }; 112 113 static const struct ath12k_wmi_tlv_policy ath12k_wmi_tlv_policies[] = { 114 [WMI_TAG_ARRAY_BYTE] = { .min_len = 0 }, 115 [WMI_TAG_ARRAY_UINT32] = { .min_len = 0 }, 116 [WMI_TAG_SERVICE_READY_EVENT] = { 117 .min_len = sizeof(struct wmi_service_ready_event) }, 118 [WMI_TAG_SERVICE_READY_EXT_EVENT] = { 119 .min_len = sizeof(struct wmi_service_ready_ext_event) }, 120 [WMI_TAG_SOC_MAC_PHY_HW_MODE_CAPS] = { 121 .min_len = sizeof(struct ath12k_wmi_soc_mac_phy_hw_mode_caps_params) }, 122 [WMI_TAG_SOC_HAL_REG_CAPABILITIES] = { 123 .min_len = sizeof(struct ath12k_wmi_soc_hal_reg_caps_params) }, 124 [WMI_TAG_VDEV_START_RESPONSE_EVENT] = { 125 .min_len = sizeof(struct wmi_vdev_start_resp_event) }, 126 [WMI_TAG_PEER_DELETE_RESP_EVENT] = { 127 .min_len = sizeof(struct wmi_peer_delete_resp_event) }, 128 [WMI_TAG_OFFLOAD_BCN_TX_STATUS_EVENT] = { 129 .min_len = sizeof(struct wmi_bcn_tx_status_event) }, 130 [WMI_TAG_VDEV_STOPPED_EVENT] = { 131 .min_len = sizeof(struct wmi_vdev_stopped_event) }, 132 [WMI_TAG_REG_CHAN_LIST_CC_EXT_EVENT] = { 133 .min_len = sizeof(struct wmi_reg_chan_list_cc_ext_event) }, 134 [WMI_TAG_MGMT_RX_HDR] = { 135 .min_len = sizeof(struct ath12k_wmi_mgmt_rx_params) }, 136 [WMI_TAG_MGMT_TX_COMPL_EVENT] = { 137 .min_len = sizeof(struct wmi_mgmt_tx_compl_event) }, 138 [WMI_TAG_SCAN_EVENT] = { 139 .min_len = sizeof(struct wmi_scan_event) }, 140 [WMI_TAG_PEER_STA_KICKOUT_EVENT] = { 141 .min_len = sizeof(struct wmi_peer_sta_kickout_event) }, 142 [WMI_TAG_ROAM_EVENT] = { 143 .min_len = sizeof(struct wmi_roam_event) }, 144 [WMI_TAG_CHAN_INFO_EVENT] = { 145 .min_len = sizeof(struct wmi_chan_info_event) }, 146 [WMI_TAG_PDEV_BSS_CHAN_INFO_EVENT] = { 147 .min_len = sizeof(struct wmi_pdev_bss_chan_info_event) }, 148 [WMI_TAG_VDEV_INSTALL_KEY_COMPLETE_EVENT] = { 149 .min_len = sizeof(struct wmi_vdev_install_key_compl_event) }, 150 [WMI_TAG_READY_EVENT] = { 151 .min_len = sizeof(struct ath12k_wmi_ready_event_min_params) }, 152 [WMI_TAG_SERVICE_AVAILABLE_EVENT] = { 153 .min_len = sizeof(struct wmi_service_available_event) }, 154 [WMI_TAG_PEER_ASSOC_CONF_EVENT] = { 155 .min_len = sizeof(struct wmi_peer_assoc_conf_event) }, 156 [WMI_TAG_RFKILL_EVENT] = { 157 .min_len = sizeof(struct wmi_rfkill_state_change_event) }, 158 [WMI_TAG_PDEV_CTL_FAILSAFE_CHECK_EVENT] = { 159 .min_len = sizeof(struct wmi_pdev_ctl_failsafe_chk_event) }, 160 [WMI_TAG_HOST_SWFDA_EVENT] = { 161 .min_len = sizeof(struct wmi_fils_discovery_event) }, 162 [WMI_TAG_OFFLOAD_PRB_RSP_TX_STATUS_EVENT] = { 163 .min_len = sizeof(struct wmi_probe_resp_tx_status_event) }, 164 [WMI_TAG_VDEV_DELETE_RESP_EVENT] = { 165 .min_len = sizeof(struct wmi_vdev_delete_resp_event) }, 166 [WMI_TAG_TWT_ENABLE_COMPLETE_EVENT] = { 167 .min_len = sizeof(struct wmi_twt_enable_event) }, 168 [WMI_TAG_TWT_DISABLE_COMPLETE_EVENT] = { 169 .min_len = sizeof(struct wmi_twt_disable_event) }, 170 [WMI_TAG_P2P_NOA_INFO] = { 171 .min_len = sizeof(struct ath12k_wmi_p2p_noa_info) }, 172 [WMI_TAG_P2P_NOA_EVENT] = { 173 .min_len = sizeof(struct wmi_p2p_noa_event) }, 174 }; 175 176 static __le32 ath12k_wmi_tlv_hdr(u32 cmd, u32 len) 177 { 178 return le32_encode_bits(cmd, WMI_TLV_TAG) | 179 le32_encode_bits(len, WMI_TLV_LEN); 180 } 181 182 static __le32 ath12k_wmi_tlv_cmd_hdr(u32 cmd, u32 len) 183 { 184 return ath12k_wmi_tlv_hdr(cmd, len - TLV_HDR_SIZE); 185 } 186 187 void ath12k_wmi_init_qcn9274(struct ath12k_base *ab, 188 struct ath12k_wmi_resource_config_arg *config) 189 { 190 config->num_vdevs = ab->num_radios * TARGET_NUM_VDEVS; 191 config->num_peers = ab->num_radios * 192 ath12k_core_get_max_peers_per_radio(ab); 193 config->num_tids = ath12k_core_get_max_num_tids(ab); 194 config->num_offload_peers = TARGET_NUM_OFFLD_PEERS; 195 config->num_offload_reorder_buffs = TARGET_NUM_OFFLD_REORDER_BUFFS; 196 config->num_peer_keys = TARGET_NUM_PEER_KEYS; 197 config->ast_skid_limit = TARGET_AST_SKID_LIMIT; 198 config->tx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1; 199 config->rx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1; 200 config->rx_timeout_pri[0] = TARGET_RX_TIMEOUT_LO_PRI; 201 config->rx_timeout_pri[1] = TARGET_RX_TIMEOUT_LO_PRI; 202 config->rx_timeout_pri[2] = TARGET_RX_TIMEOUT_LO_PRI; 203 config->rx_timeout_pri[3] = TARGET_RX_TIMEOUT_HI_PRI; 204 205 if (test_bit(ATH12K_FLAG_RAW_MODE, &ab->dev_flags)) 206 config->rx_decap_mode = TARGET_DECAP_MODE_RAW; 207 else 208 config->rx_decap_mode = TARGET_DECAP_MODE_NATIVE_WIFI; 209 210 config->scan_max_pending_req = TARGET_SCAN_MAX_PENDING_REQS; 211 config->bmiss_offload_max_vdev = TARGET_BMISS_OFFLOAD_MAX_VDEV; 212 config->roam_offload_max_vdev = TARGET_ROAM_OFFLOAD_MAX_VDEV; 213 config->roam_offload_max_ap_profiles = TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES; 214 config->num_mcast_groups = TARGET_NUM_MCAST_GROUPS; 215 config->num_mcast_table_elems = TARGET_NUM_MCAST_TABLE_ELEMS; 216 config->mcast2ucast_mode = TARGET_MCAST2UCAST_MODE; 217 config->tx_dbg_log_size = TARGET_TX_DBG_LOG_SIZE; 218 config->num_wds_entries = TARGET_NUM_WDS_ENTRIES; 219 config->dma_burst_size = TARGET_DMA_BURST_SIZE; 220 config->rx_skip_defrag_timeout_dup_detection_check = 221 TARGET_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK; 222 config->vow_config = TARGET_VOW_CONFIG; 223 config->gtk_offload_max_vdev = TARGET_GTK_OFFLOAD_MAX_VDEV; 224 config->num_msdu_desc = TARGET_NUM_MSDU_DESC; 225 config->beacon_tx_offload_max_vdev = ab->num_radios * TARGET_MAX_BCN_OFFLD; 226 config->rx_batchmode = TARGET_RX_BATCHMODE; 227 /* Indicates host supports peer map v3 and unmap v2 support */ 228 config->peer_map_unmap_version = 0x32; 229 config->twt_ap_pdev_count = ab->num_radios; 230 config->twt_ap_sta_count = 1000; 231 config->ema_max_vap_cnt = ab->num_radios; 232 config->ema_max_profile_period = TARGET_EMA_MAX_PROFILE_PERIOD; 233 config->beacon_tx_offload_max_vdev += config->ema_max_vap_cnt; 234 235 if (test_bit(WMI_TLV_SERVICE_PEER_METADATA_V1A_V1B_SUPPORT, ab->wmi_ab.svc_map)) 236 config->dp_peer_meta_data_ver = TARGET_RX_PEER_METADATA_VER_V1B; 237 } 238 239 void ath12k_wmi_init_wcn7850(struct ath12k_base *ab, 240 struct ath12k_wmi_resource_config_arg *config) 241 { 242 config->num_vdevs = 4; 243 config->num_peers = 16; 244 config->num_tids = 32; 245 246 config->num_offload_peers = 3; 247 config->num_offload_reorder_buffs = 3; 248 config->num_peer_keys = TARGET_NUM_PEER_KEYS; 249 config->ast_skid_limit = TARGET_AST_SKID_LIMIT; 250 config->tx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1; 251 config->rx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1; 252 config->rx_timeout_pri[0] = TARGET_RX_TIMEOUT_LO_PRI; 253 config->rx_timeout_pri[1] = TARGET_RX_TIMEOUT_LO_PRI; 254 config->rx_timeout_pri[2] = TARGET_RX_TIMEOUT_LO_PRI; 255 config->rx_timeout_pri[3] = TARGET_RX_TIMEOUT_HI_PRI; 256 config->rx_decap_mode = TARGET_DECAP_MODE_NATIVE_WIFI; 257 config->scan_max_pending_req = TARGET_SCAN_MAX_PENDING_REQS; 258 config->bmiss_offload_max_vdev = TARGET_BMISS_OFFLOAD_MAX_VDEV; 259 config->roam_offload_max_vdev = TARGET_ROAM_OFFLOAD_MAX_VDEV; 260 config->roam_offload_max_ap_profiles = TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES; 261 config->num_mcast_groups = 0; 262 config->num_mcast_table_elems = 0; 263 config->mcast2ucast_mode = 0; 264 config->tx_dbg_log_size = TARGET_TX_DBG_LOG_SIZE; 265 config->num_wds_entries = 0; 266 config->dma_burst_size = 0; 267 config->rx_skip_defrag_timeout_dup_detection_check = 0; 268 config->vow_config = TARGET_VOW_CONFIG; 269 config->gtk_offload_max_vdev = 2; 270 config->num_msdu_desc = 0x400; 271 config->beacon_tx_offload_max_vdev = 2; 272 config->rx_batchmode = TARGET_RX_BATCHMODE; 273 274 config->peer_map_unmap_version = 0x1; 275 config->use_pdev_id = 1; 276 config->max_frag_entries = 0xa; 277 config->num_tdls_vdevs = 0x1; 278 config->num_tdls_conn_table_entries = 8; 279 config->beacon_tx_offload_max_vdev = 0x2; 280 config->num_multicast_filter_entries = 0x20; 281 config->num_wow_filters = 0x16; 282 config->num_keep_alive_pattern = 0; 283 } 284 285 #define PRIMAP(_hw_mode_) \ 286 [_hw_mode_] = _hw_mode_##_PRI 287 288 static const int ath12k_hw_mode_pri_map[] = { 289 PRIMAP(WMI_HOST_HW_MODE_SINGLE), 290 PRIMAP(WMI_HOST_HW_MODE_DBS), 291 PRIMAP(WMI_HOST_HW_MODE_SBS_PASSIVE), 292 PRIMAP(WMI_HOST_HW_MODE_SBS), 293 PRIMAP(WMI_HOST_HW_MODE_DBS_SBS), 294 PRIMAP(WMI_HOST_HW_MODE_DBS_OR_SBS), 295 /* keep last */ 296 PRIMAP(WMI_HOST_HW_MODE_MAX), 297 }; 298 299 static int 300 ath12k_wmi_tlv_iter(struct ath12k_base *ab, const void *ptr, size_t len, 301 int (*iter)(struct ath12k_base *ab, u16 tag, u16 len, 302 const void *ptr, void *data), 303 void *data) 304 { 305 const void *begin = ptr; 306 const struct wmi_tlv *tlv; 307 u16 tlv_tag, tlv_len; 308 int ret; 309 310 while (len > 0) { 311 if (len < sizeof(*tlv)) { 312 ath12k_err(ab, "wmi tlv parse failure at byte %zd (%zu bytes left, %zu expected)\n", 313 ptr - begin, len, sizeof(*tlv)); 314 return -EINVAL; 315 } 316 317 tlv = ptr; 318 tlv_tag = le32_get_bits(tlv->header, WMI_TLV_TAG); 319 tlv_len = le32_get_bits(tlv->header, WMI_TLV_LEN); 320 ptr += sizeof(*tlv); 321 len -= sizeof(*tlv); 322 323 if (tlv_len > len) { 324 ath12k_err(ab, "wmi tlv parse failure of tag %u at byte %zd (%zu bytes left, %u expected)\n", 325 tlv_tag, ptr - begin, len, tlv_len); 326 return -EINVAL; 327 } 328 329 if (tlv_tag < ARRAY_SIZE(ath12k_wmi_tlv_policies) && 330 ath12k_wmi_tlv_policies[tlv_tag].min_len && 331 ath12k_wmi_tlv_policies[tlv_tag].min_len > tlv_len) { 332 ath12k_err(ab, "wmi tlv parse failure of tag %u at byte %zd (%u bytes is less than min length %zu)\n", 333 tlv_tag, ptr - begin, tlv_len, 334 ath12k_wmi_tlv_policies[tlv_tag].min_len); 335 return -EINVAL; 336 } 337 338 ret = iter(ab, tlv_tag, tlv_len, ptr, data); 339 if (ret) 340 return ret; 341 342 ptr += tlv_len; 343 len -= tlv_len; 344 } 345 346 return 0; 347 } 348 349 static int ath12k_wmi_tlv_iter_parse(struct ath12k_base *ab, u16 tag, u16 len, 350 const void *ptr, void *data) 351 { 352 const void **tb = data; 353 354 if (tag < WMI_TAG_MAX) 355 tb[tag] = ptr; 356 357 return 0; 358 } 359 360 static int ath12k_wmi_tlv_parse(struct ath12k_base *ar, const void **tb, 361 const void *ptr, size_t len) 362 { 363 return ath12k_wmi_tlv_iter(ar, ptr, len, ath12k_wmi_tlv_iter_parse, 364 (void *)tb); 365 } 366 367 static const void ** 368 ath12k_wmi_tlv_parse_alloc(struct ath12k_base *ab, 369 struct sk_buff *skb, gfp_t gfp) 370 { 371 const void **tb; 372 int ret; 373 374 tb = kcalloc(WMI_TAG_MAX, sizeof(*tb), gfp); 375 if (!tb) 376 return ERR_PTR(-ENOMEM); 377 378 ret = ath12k_wmi_tlv_parse(ab, tb, skb->data, skb->len); 379 if (ret) { 380 kfree(tb); 381 return ERR_PTR(ret); 382 } 383 384 return tb; 385 } 386 387 static int ath12k_wmi_cmd_send_nowait(struct ath12k_wmi_pdev *wmi, struct sk_buff *skb, 388 u32 cmd_id) 389 { 390 struct ath12k_skb_cb *skb_cb = ATH12K_SKB_CB(skb); 391 struct ath12k_base *ab = wmi->wmi_ab->ab; 392 struct wmi_cmd_hdr *cmd_hdr; 393 int ret; 394 395 if (!skb_push(skb, sizeof(struct wmi_cmd_hdr))) 396 return -ENOMEM; 397 398 cmd_hdr = (struct wmi_cmd_hdr *)skb->data; 399 cmd_hdr->cmd_id = le32_encode_bits(cmd_id, WMI_CMD_HDR_CMD_ID); 400 401 memset(skb_cb, 0, sizeof(*skb_cb)); 402 ret = ath12k_htc_send(&ab->htc, wmi->eid, skb); 403 404 if (ret) 405 goto err_pull; 406 407 return 0; 408 409 err_pull: 410 skb_pull(skb, sizeof(struct wmi_cmd_hdr)); 411 return ret; 412 } 413 414 int ath12k_wmi_cmd_send(struct ath12k_wmi_pdev *wmi, struct sk_buff *skb, 415 u32 cmd_id) 416 { 417 struct ath12k_wmi_base *wmi_ab = wmi->wmi_ab; 418 int ret = -EOPNOTSUPP; 419 420 might_sleep(); 421 422 wait_event_timeout(wmi_ab->tx_credits_wq, ({ 423 ret = ath12k_wmi_cmd_send_nowait(wmi, skb, cmd_id); 424 425 if (ret && test_bit(ATH12K_FLAG_CRASH_FLUSH, &wmi_ab->ab->dev_flags)) 426 ret = -ESHUTDOWN; 427 428 (ret != -EAGAIN); 429 }), WMI_SEND_TIMEOUT_HZ); 430 431 if (ret == -EAGAIN) 432 ath12k_warn(wmi_ab->ab, "wmi command %d timeout\n", cmd_id); 433 434 return ret; 435 } 436 437 static int ath12k_pull_svc_ready_ext(struct ath12k_wmi_pdev *wmi_handle, 438 const void *ptr, 439 struct ath12k_wmi_service_ext_arg *arg) 440 { 441 const struct wmi_service_ready_ext_event *ev = ptr; 442 int i; 443 444 if (!ev) 445 return -EINVAL; 446 447 /* Move this to host based bitmap */ 448 arg->default_conc_scan_config_bits = 449 le32_to_cpu(ev->default_conc_scan_config_bits); 450 arg->default_fw_config_bits = le32_to_cpu(ev->default_fw_config_bits); 451 arg->he_cap_info = le32_to_cpu(ev->he_cap_info); 452 arg->mpdu_density = le32_to_cpu(ev->mpdu_density); 453 arg->max_bssid_rx_filters = le32_to_cpu(ev->max_bssid_rx_filters); 454 arg->ppet.numss_m1 = le32_to_cpu(ev->ppet.numss_m1); 455 arg->ppet.ru_bit_mask = le32_to_cpu(ev->ppet.ru_info); 456 457 for (i = 0; i < WMI_MAX_NUM_SS; i++) 458 arg->ppet.ppet16_ppet8_ru3_ru0[i] = 459 le32_to_cpu(ev->ppet.ppet16_ppet8_ru3_ru0[i]); 460 461 return 0; 462 } 463 464 static int 465 ath12k_pull_mac_phy_cap_svc_ready_ext(struct ath12k_wmi_pdev *wmi_handle, 466 struct ath12k_wmi_svc_rdy_ext_parse *svc, 467 u8 hw_mode_id, u8 phy_id, 468 struct ath12k_pdev *pdev) 469 { 470 const struct ath12k_wmi_mac_phy_caps_params *mac_caps; 471 const struct ath12k_wmi_soc_mac_phy_hw_mode_caps_params *hw_caps = svc->hw_caps; 472 const struct ath12k_wmi_hw_mode_cap_params *wmi_hw_mode_caps = svc->hw_mode_caps; 473 const struct ath12k_wmi_mac_phy_caps_params *wmi_mac_phy_caps = svc->mac_phy_caps; 474 struct ath12k_base *ab = wmi_handle->wmi_ab->ab; 475 struct ath12k_band_cap *cap_band; 476 struct ath12k_pdev_cap *pdev_cap = &pdev->cap; 477 struct ath12k_fw_pdev *fw_pdev; 478 u32 phy_map; 479 u32 hw_idx, phy_idx = 0; 480 int i; 481 482 if (!hw_caps || !wmi_hw_mode_caps || !svc->soc_hal_reg_caps) 483 return -EINVAL; 484 485 for (hw_idx = 0; hw_idx < le32_to_cpu(hw_caps->num_hw_modes); hw_idx++) { 486 if (hw_mode_id == le32_to_cpu(wmi_hw_mode_caps[hw_idx].hw_mode_id)) 487 break; 488 489 phy_map = le32_to_cpu(wmi_hw_mode_caps[hw_idx].phy_id_map); 490 phy_idx = fls(phy_map); 491 } 492 493 if (hw_idx == le32_to_cpu(hw_caps->num_hw_modes)) 494 return -EINVAL; 495 496 phy_idx += phy_id; 497 if (phy_id >= le32_to_cpu(svc->soc_hal_reg_caps->num_phy)) 498 return -EINVAL; 499 500 mac_caps = wmi_mac_phy_caps + phy_idx; 501 502 pdev->pdev_id = ath12k_wmi_mac_phy_get_pdev_id(mac_caps); 503 pdev->hw_link_id = ath12k_wmi_mac_phy_get_hw_link_id(mac_caps); 504 pdev_cap->supported_bands |= le32_to_cpu(mac_caps->supported_bands); 505 pdev_cap->ampdu_density = le32_to_cpu(mac_caps->ampdu_density); 506 507 fw_pdev = &ab->fw_pdev[ab->fw_pdev_count]; 508 fw_pdev->supported_bands = le32_to_cpu(mac_caps->supported_bands); 509 fw_pdev->pdev_id = ath12k_wmi_mac_phy_get_pdev_id(mac_caps); 510 fw_pdev->phy_id = le32_to_cpu(mac_caps->phy_id); 511 ab->fw_pdev_count++; 512 513 /* Take non-zero tx/rx chainmask. If tx/rx chainmask differs from 514 * band to band for a single radio, need to see how this should be 515 * handled. 516 */ 517 if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_2G_CAP) { 518 pdev_cap->tx_chain_mask = le32_to_cpu(mac_caps->tx_chain_mask_2g); 519 pdev_cap->rx_chain_mask = le32_to_cpu(mac_caps->rx_chain_mask_2g); 520 } else if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_5G_CAP) { 521 pdev_cap->vht_cap = le32_to_cpu(mac_caps->vht_cap_info_5g); 522 pdev_cap->vht_mcs = le32_to_cpu(mac_caps->vht_supp_mcs_5g); 523 pdev_cap->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_5g); 524 pdev_cap->tx_chain_mask = le32_to_cpu(mac_caps->tx_chain_mask_5g); 525 pdev_cap->rx_chain_mask = le32_to_cpu(mac_caps->rx_chain_mask_5g); 526 } else { 527 return -EINVAL; 528 } 529 530 /* tx/rx chainmask reported from fw depends on the actual hw chains used, 531 * For example, for 4x4 capable macphys, first 4 chains can be used for first 532 * mac and the remaining 4 chains can be used for the second mac or vice-versa. 533 * In this case, tx/rx chainmask 0xf will be advertised for first mac and 0xf0 534 * will be advertised for second mac or vice-versa. Compute the shift value 535 * for tx/rx chainmask which will be used to advertise supported ht/vht rates to 536 * mac80211. 537 */ 538 pdev_cap->tx_chain_mask_shift = 539 find_first_bit((unsigned long *)&pdev_cap->tx_chain_mask, 32); 540 pdev_cap->rx_chain_mask_shift = 541 find_first_bit((unsigned long *)&pdev_cap->rx_chain_mask, 32); 542 543 if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_2G_CAP) { 544 cap_band = &pdev_cap->band[NL80211_BAND_2GHZ]; 545 cap_band->phy_id = le32_to_cpu(mac_caps->phy_id); 546 cap_band->max_bw_supported = le32_to_cpu(mac_caps->max_bw_supported_2g); 547 cap_band->ht_cap_info = le32_to_cpu(mac_caps->ht_cap_info_2g); 548 cap_band->he_cap_info[0] = le32_to_cpu(mac_caps->he_cap_info_2g); 549 cap_band->he_cap_info[1] = le32_to_cpu(mac_caps->he_cap_info_2g_ext); 550 cap_band->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_2g); 551 for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++) 552 cap_band->he_cap_phy_info[i] = 553 le32_to_cpu(mac_caps->he_cap_phy_info_2g[i]); 554 555 cap_band->he_ppet.numss_m1 = le32_to_cpu(mac_caps->he_ppet2g.numss_m1); 556 cap_band->he_ppet.ru_bit_mask = le32_to_cpu(mac_caps->he_ppet2g.ru_info); 557 558 for (i = 0; i < WMI_MAX_NUM_SS; i++) 559 cap_band->he_ppet.ppet16_ppet8_ru3_ru0[i] = 560 le32_to_cpu(mac_caps->he_ppet2g.ppet16_ppet8_ru3_ru0[i]); 561 } 562 563 if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_5G_CAP) { 564 cap_band = &pdev_cap->band[NL80211_BAND_5GHZ]; 565 cap_band->phy_id = le32_to_cpu(mac_caps->phy_id); 566 cap_band->max_bw_supported = 567 le32_to_cpu(mac_caps->max_bw_supported_5g); 568 cap_band->ht_cap_info = le32_to_cpu(mac_caps->ht_cap_info_5g); 569 cap_band->he_cap_info[0] = le32_to_cpu(mac_caps->he_cap_info_5g); 570 cap_band->he_cap_info[1] = le32_to_cpu(mac_caps->he_cap_info_5g_ext); 571 cap_band->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_5g); 572 for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++) 573 cap_band->he_cap_phy_info[i] = 574 le32_to_cpu(mac_caps->he_cap_phy_info_5g[i]); 575 576 cap_band->he_ppet.numss_m1 = le32_to_cpu(mac_caps->he_ppet5g.numss_m1); 577 cap_band->he_ppet.ru_bit_mask = le32_to_cpu(mac_caps->he_ppet5g.ru_info); 578 579 for (i = 0; i < WMI_MAX_NUM_SS; i++) 580 cap_band->he_ppet.ppet16_ppet8_ru3_ru0[i] = 581 le32_to_cpu(mac_caps->he_ppet5g.ppet16_ppet8_ru3_ru0[i]); 582 583 cap_band = &pdev_cap->band[NL80211_BAND_6GHZ]; 584 cap_band->max_bw_supported = 585 le32_to_cpu(mac_caps->max_bw_supported_5g); 586 cap_band->ht_cap_info = le32_to_cpu(mac_caps->ht_cap_info_5g); 587 cap_band->he_cap_info[0] = le32_to_cpu(mac_caps->he_cap_info_5g); 588 cap_band->he_cap_info[1] = le32_to_cpu(mac_caps->he_cap_info_5g_ext); 589 cap_band->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_5g); 590 for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++) 591 cap_band->he_cap_phy_info[i] = 592 le32_to_cpu(mac_caps->he_cap_phy_info_5g[i]); 593 594 cap_band->he_ppet.numss_m1 = le32_to_cpu(mac_caps->he_ppet5g.numss_m1); 595 cap_band->he_ppet.ru_bit_mask = le32_to_cpu(mac_caps->he_ppet5g.ru_info); 596 597 for (i = 0; i < WMI_MAX_NUM_SS; i++) 598 cap_band->he_ppet.ppet16_ppet8_ru3_ru0[i] = 599 le32_to_cpu(mac_caps->he_ppet5g.ppet16_ppet8_ru3_ru0[i]); 600 } 601 602 return 0; 603 } 604 605 static int 606 ath12k_pull_reg_cap_svc_rdy_ext(struct ath12k_wmi_pdev *wmi_handle, 607 const struct ath12k_wmi_soc_hal_reg_caps_params *reg_caps, 608 const struct ath12k_wmi_hal_reg_caps_ext_params *ext_caps, 609 u8 phy_idx, 610 struct ath12k_wmi_hal_reg_capabilities_ext_arg *param) 611 { 612 const struct ath12k_wmi_hal_reg_caps_ext_params *ext_reg_cap; 613 614 if (!reg_caps || !ext_caps) 615 return -EINVAL; 616 617 if (phy_idx >= le32_to_cpu(reg_caps->num_phy)) 618 return -EINVAL; 619 620 ext_reg_cap = &ext_caps[phy_idx]; 621 622 param->phy_id = le32_to_cpu(ext_reg_cap->phy_id); 623 param->eeprom_reg_domain = le32_to_cpu(ext_reg_cap->eeprom_reg_domain); 624 param->eeprom_reg_domain_ext = 625 le32_to_cpu(ext_reg_cap->eeprom_reg_domain_ext); 626 param->regcap1 = le32_to_cpu(ext_reg_cap->regcap1); 627 param->regcap2 = le32_to_cpu(ext_reg_cap->regcap2); 628 /* check if param->wireless_mode is needed */ 629 param->low_2ghz_chan = le32_to_cpu(ext_reg_cap->low_2ghz_chan); 630 param->high_2ghz_chan = le32_to_cpu(ext_reg_cap->high_2ghz_chan); 631 param->low_5ghz_chan = le32_to_cpu(ext_reg_cap->low_5ghz_chan); 632 param->high_5ghz_chan = le32_to_cpu(ext_reg_cap->high_5ghz_chan); 633 634 return 0; 635 } 636 637 static int ath12k_pull_service_ready_tlv(struct ath12k_base *ab, 638 const void *evt_buf, 639 struct ath12k_wmi_target_cap_arg *cap) 640 { 641 const struct wmi_service_ready_event *ev = evt_buf; 642 643 if (!ev) { 644 ath12k_err(ab, "%s: failed by NULL param\n", 645 __func__); 646 return -EINVAL; 647 } 648 649 cap->phy_capability = le32_to_cpu(ev->phy_capability); 650 cap->max_frag_entry = le32_to_cpu(ev->max_frag_entry); 651 cap->num_rf_chains = le32_to_cpu(ev->num_rf_chains); 652 cap->ht_cap_info = le32_to_cpu(ev->ht_cap_info); 653 cap->vht_cap_info = le32_to_cpu(ev->vht_cap_info); 654 cap->vht_supp_mcs = le32_to_cpu(ev->vht_supp_mcs); 655 cap->hw_min_tx_power = le32_to_cpu(ev->hw_min_tx_power); 656 cap->hw_max_tx_power = le32_to_cpu(ev->hw_max_tx_power); 657 cap->sys_cap_info = le32_to_cpu(ev->sys_cap_info); 658 cap->min_pkt_size_enable = le32_to_cpu(ev->min_pkt_size_enable); 659 cap->max_bcn_ie_size = le32_to_cpu(ev->max_bcn_ie_size); 660 cap->max_num_scan_channels = le32_to_cpu(ev->max_num_scan_channels); 661 cap->max_supported_macs = le32_to_cpu(ev->max_supported_macs); 662 cap->wmi_fw_sub_feat_caps = le32_to_cpu(ev->wmi_fw_sub_feat_caps); 663 cap->txrx_chainmask = le32_to_cpu(ev->txrx_chainmask); 664 cap->default_dbs_hw_mode_index = le32_to_cpu(ev->default_dbs_hw_mode_index); 665 cap->num_msdu_desc = le32_to_cpu(ev->num_msdu_desc); 666 667 return 0; 668 } 669 670 /* Save the wmi_service_bitmap into a linear bitmap. The wmi_services in 671 * wmi_service ready event are advertised in b0-b3 (LSB 4-bits) of each 672 * 4-byte word. 673 */ 674 static void ath12k_wmi_service_bitmap_copy(struct ath12k_wmi_pdev *wmi, 675 const u32 *wmi_svc_bm) 676 { 677 int i, j; 678 679 for (i = 0, j = 0; i < WMI_SERVICE_BM_SIZE && j < WMI_MAX_SERVICE; i++) { 680 do { 681 if (wmi_svc_bm[i] & BIT(j % WMI_SERVICE_BITS_IN_SIZE32)) 682 set_bit(j, wmi->wmi_ab->svc_map); 683 } while (++j % WMI_SERVICE_BITS_IN_SIZE32); 684 } 685 } 686 687 static int ath12k_wmi_svc_rdy_parse(struct ath12k_base *ab, u16 tag, u16 len, 688 const void *ptr, void *data) 689 { 690 struct ath12k_wmi_svc_ready_parse *svc_ready = data; 691 struct ath12k_wmi_pdev *wmi_handle = &ab->wmi_ab.wmi[0]; 692 u16 expect_len; 693 694 switch (tag) { 695 case WMI_TAG_SERVICE_READY_EVENT: 696 if (ath12k_pull_service_ready_tlv(ab, ptr, &ab->target_caps)) 697 return -EINVAL; 698 break; 699 700 case WMI_TAG_ARRAY_UINT32: 701 if (!svc_ready->wmi_svc_bitmap_done) { 702 expect_len = WMI_SERVICE_BM_SIZE * sizeof(u32); 703 if (len < expect_len) { 704 ath12k_warn(ab, "invalid len %d for the tag 0x%x\n", 705 len, tag); 706 return -EINVAL; 707 } 708 709 ath12k_wmi_service_bitmap_copy(wmi_handle, ptr); 710 711 svc_ready->wmi_svc_bitmap_done = true; 712 } 713 break; 714 default: 715 break; 716 } 717 718 return 0; 719 } 720 721 static int ath12k_service_ready_event(struct ath12k_base *ab, struct sk_buff *skb) 722 { 723 struct ath12k_wmi_svc_ready_parse svc_ready = { }; 724 int ret; 725 726 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 727 ath12k_wmi_svc_rdy_parse, 728 &svc_ready); 729 if (ret) { 730 ath12k_warn(ab, "failed to parse tlv %d\n", ret); 731 return ret; 732 } 733 734 return 0; 735 } 736 737 static u32 ath12k_wmi_mgmt_get_freq(struct ath12k *ar, 738 struct ieee80211_tx_info *info) 739 { 740 struct ath12k_base *ab = ar->ab; 741 u32 freq = 0; 742 743 if (ab->hw_params->single_pdev_only && 744 ar->scan.is_roc && 745 (info->flags & IEEE80211_TX_CTL_TX_OFFCHAN)) 746 freq = ar->scan.roc_freq; 747 748 return freq; 749 } 750 751 struct sk_buff *ath12k_wmi_alloc_skb(struct ath12k_wmi_base *wmi_ab, u32 len) 752 { 753 struct sk_buff *skb; 754 struct ath12k_base *ab = wmi_ab->ab; 755 u32 round_len = roundup(len, 4); 756 757 skb = ath12k_htc_alloc_skb(ab, WMI_SKB_HEADROOM + round_len); 758 if (!skb) 759 return NULL; 760 761 skb_reserve(skb, WMI_SKB_HEADROOM); 762 if (!IS_ALIGNED((unsigned long)skb->data, 4)) 763 ath12k_warn(ab, "unaligned WMI skb data\n"); 764 765 skb_put(skb, round_len); 766 memset(skb->data, 0, round_len); 767 768 return skb; 769 } 770 771 int ath12k_wmi_mgmt_send(struct ath12k *ar, u32 vdev_id, u32 buf_id, 772 struct sk_buff *frame) 773 { 774 struct ath12k_wmi_pdev *wmi = ar->wmi; 775 struct wmi_mgmt_send_cmd *cmd; 776 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(frame); 777 struct wmi_tlv *frame_tlv; 778 struct sk_buff *skb; 779 u32 buf_len; 780 int ret, len; 781 782 buf_len = min_t(int, frame->len, WMI_MGMT_SEND_DOWNLD_LEN); 783 784 len = sizeof(*cmd) + sizeof(*frame_tlv) + roundup(buf_len, 4); 785 786 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 787 if (!skb) 788 return -ENOMEM; 789 790 cmd = (struct wmi_mgmt_send_cmd *)skb->data; 791 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MGMT_TX_SEND_CMD, 792 sizeof(*cmd)); 793 cmd->vdev_id = cpu_to_le32(vdev_id); 794 cmd->desc_id = cpu_to_le32(buf_id); 795 cmd->chanfreq = cpu_to_le32(ath12k_wmi_mgmt_get_freq(ar, info)); 796 cmd->paddr_lo = cpu_to_le32(lower_32_bits(ATH12K_SKB_CB(frame)->paddr)); 797 cmd->paddr_hi = cpu_to_le32(upper_32_bits(ATH12K_SKB_CB(frame)->paddr)); 798 cmd->frame_len = cpu_to_le32(frame->len); 799 cmd->buf_len = cpu_to_le32(buf_len); 800 cmd->tx_params_valid = 0; 801 802 frame_tlv = (struct wmi_tlv *)(skb->data + sizeof(*cmd)); 803 frame_tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, buf_len); 804 805 memcpy(frame_tlv->value, frame->data, buf_len); 806 807 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_MGMT_TX_SEND_CMDID); 808 if (ret) { 809 ath12k_warn(ar->ab, 810 "failed to submit WMI_MGMT_TX_SEND_CMDID cmd\n"); 811 dev_kfree_skb(skb); 812 } 813 814 return ret; 815 } 816 817 int ath12k_wmi_vdev_create(struct ath12k *ar, u8 *macaddr, 818 struct ath12k_wmi_vdev_create_arg *args) 819 { 820 struct ath12k_wmi_pdev *wmi = ar->wmi; 821 struct wmi_vdev_create_cmd *cmd; 822 struct sk_buff *skb; 823 struct ath12k_wmi_vdev_txrx_streams_params *txrx_streams; 824 struct wmi_tlv *tlv; 825 int ret, len; 826 void *ptr; 827 828 /* It can be optimized my sending tx/rx chain configuration 829 * only for supported bands instead of always sending it for 830 * both the bands. 831 */ 832 len = sizeof(*cmd) + TLV_HDR_SIZE + 833 (WMI_NUM_SUPPORTED_BAND_MAX * sizeof(*txrx_streams)); 834 835 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 836 if (!skb) 837 return -ENOMEM; 838 839 cmd = (struct wmi_vdev_create_cmd *)skb->data; 840 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_CREATE_CMD, 841 sizeof(*cmd)); 842 843 cmd->vdev_id = cpu_to_le32(args->if_id); 844 cmd->vdev_type = cpu_to_le32(args->type); 845 cmd->vdev_subtype = cpu_to_le32(args->subtype); 846 cmd->num_cfg_txrx_streams = cpu_to_le32(WMI_NUM_SUPPORTED_BAND_MAX); 847 cmd->pdev_id = cpu_to_le32(args->pdev_id); 848 cmd->mbssid_flags = cpu_to_le32(args->mbssid_flags); 849 cmd->mbssid_tx_vdev_id = cpu_to_le32(args->mbssid_tx_vdev_id); 850 cmd->vdev_stats_id = cpu_to_le32(args->if_stats_id); 851 ether_addr_copy(cmd->vdev_macaddr.addr, macaddr); 852 853 if (args->if_stats_id != ATH12K_INVAL_VDEV_STATS_ID) 854 cmd->vdev_stats_id_valid = cpu_to_le32(BIT(0)); 855 856 ptr = skb->data + sizeof(*cmd); 857 len = WMI_NUM_SUPPORTED_BAND_MAX * sizeof(*txrx_streams); 858 859 tlv = ptr; 860 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len); 861 862 ptr += TLV_HDR_SIZE; 863 txrx_streams = ptr; 864 len = sizeof(*txrx_streams); 865 txrx_streams->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_TXRX_STREAMS, 866 len); 867 txrx_streams->band = cpu_to_le32(WMI_TPC_CHAINMASK_CONFIG_BAND_2G); 868 txrx_streams->supported_tx_streams = 869 cpu_to_le32(args->chains[NL80211_BAND_2GHZ].tx); 870 txrx_streams->supported_rx_streams = 871 cpu_to_le32(args->chains[NL80211_BAND_2GHZ].rx); 872 873 txrx_streams++; 874 txrx_streams->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_TXRX_STREAMS, 875 len); 876 txrx_streams->band = cpu_to_le32(WMI_TPC_CHAINMASK_CONFIG_BAND_5G); 877 txrx_streams->supported_tx_streams = 878 cpu_to_le32(args->chains[NL80211_BAND_5GHZ].tx); 879 txrx_streams->supported_rx_streams = 880 cpu_to_le32(args->chains[NL80211_BAND_5GHZ].rx); 881 882 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 883 "WMI vdev create: id %d type %d subtype %d macaddr %pM pdevid %d\n", 884 args->if_id, args->type, args->subtype, 885 macaddr, args->pdev_id); 886 887 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_CREATE_CMDID); 888 if (ret) { 889 ath12k_warn(ar->ab, 890 "failed to submit WMI_VDEV_CREATE_CMDID\n"); 891 dev_kfree_skb(skb); 892 } 893 894 return ret; 895 } 896 897 int ath12k_wmi_vdev_delete(struct ath12k *ar, u8 vdev_id) 898 { 899 struct ath12k_wmi_pdev *wmi = ar->wmi; 900 struct wmi_vdev_delete_cmd *cmd; 901 struct sk_buff *skb; 902 int ret; 903 904 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 905 if (!skb) 906 return -ENOMEM; 907 908 cmd = (struct wmi_vdev_delete_cmd *)skb->data; 909 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_DELETE_CMD, 910 sizeof(*cmd)); 911 cmd->vdev_id = cpu_to_le32(vdev_id); 912 913 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "WMI vdev delete id %d\n", vdev_id); 914 915 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_DELETE_CMDID); 916 if (ret) { 917 ath12k_warn(ar->ab, "failed to submit WMI_VDEV_DELETE_CMDID\n"); 918 dev_kfree_skb(skb); 919 } 920 921 return ret; 922 } 923 924 int ath12k_wmi_vdev_stop(struct ath12k *ar, u8 vdev_id) 925 { 926 struct ath12k_wmi_pdev *wmi = ar->wmi; 927 struct wmi_vdev_stop_cmd *cmd; 928 struct sk_buff *skb; 929 int ret; 930 931 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 932 if (!skb) 933 return -ENOMEM; 934 935 cmd = (struct wmi_vdev_stop_cmd *)skb->data; 936 937 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_STOP_CMD, 938 sizeof(*cmd)); 939 cmd->vdev_id = cpu_to_le32(vdev_id); 940 941 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "WMI vdev stop id 0x%x\n", vdev_id); 942 943 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_STOP_CMDID); 944 if (ret) { 945 ath12k_warn(ar->ab, "failed to submit WMI_VDEV_STOP cmd\n"); 946 dev_kfree_skb(skb); 947 } 948 949 return ret; 950 } 951 952 int ath12k_wmi_vdev_down(struct ath12k *ar, u8 vdev_id) 953 { 954 struct ath12k_wmi_pdev *wmi = ar->wmi; 955 struct wmi_vdev_down_cmd *cmd; 956 struct sk_buff *skb; 957 int ret; 958 959 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 960 if (!skb) 961 return -ENOMEM; 962 963 cmd = (struct wmi_vdev_down_cmd *)skb->data; 964 965 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_DOWN_CMD, 966 sizeof(*cmd)); 967 cmd->vdev_id = cpu_to_le32(vdev_id); 968 969 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "WMI vdev down id 0x%x\n", vdev_id); 970 971 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_DOWN_CMDID); 972 if (ret) { 973 ath12k_warn(ar->ab, "failed to submit WMI_VDEV_DOWN cmd\n"); 974 dev_kfree_skb(skb); 975 } 976 977 return ret; 978 } 979 980 static void ath12k_wmi_put_wmi_channel(struct ath12k_wmi_channel_params *chan, 981 struct wmi_vdev_start_req_arg *arg) 982 { 983 memset(chan, 0, sizeof(*chan)); 984 985 chan->mhz = cpu_to_le32(arg->freq); 986 chan->band_center_freq1 = cpu_to_le32(arg->band_center_freq1); 987 if (arg->mode == MODE_11AC_VHT80_80) 988 chan->band_center_freq2 = cpu_to_le32(arg->band_center_freq2); 989 else 990 chan->band_center_freq2 = 0; 991 992 chan->info |= le32_encode_bits(arg->mode, WMI_CHAN_INFO_MODE); 993 if (arg->passive) 994 chan->info |= cpu_to_le32(WMI_CHAN_INFO_PASSIVE); 995 if (arg->allow_ibss) 996 chan->info |= cpu_to_le32(WMI_CHAN_INFO_ADHOC_ALLOWED); 997 if (arg->allow_ht) 998 chan->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HT); 999 if (arg->allow_vht) 1000 chan->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_VHT); 1001 if (arg->allow_he) 1002 chan->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HE); 1003 if (arg->ht40plus) 1004 chan->info |= cpu_to_le32(WMI_CHAN_INFO_HT40_PLUS); 1005 if (arg->chan_radar) 1006 chan->info |= cpu_to_le32(WMI_CHAN_INFO_DFS); 1007 if (arg->freq2_radar) 1008 chan->info |= cpu_to_le32(WMI_CHAN_INFO_DFS_FREQ2); 1009 1010 chan->reg_info_1 = le32_encode_bits(arg->max_power, 1011 WMI_CHAN_REG_INFO1_MAX_PWR) | 1012 le32_encode_bits(arg->max_reg_power, 1013 WMI_CHAN_REG_INFO1_MAX_REG_PWR); 1014 1015 chan->reg_info_2 = le32_encode_bits(arg->max_antenna_gain, 1016 WMI_CHAN_REG_INFO2_ANT_MAX) | 1017 le32_encode_bits(arg->max_power, WMI_CHAN_REG_INFO2_MAX_TX_PWR); 1018 } 1019 1020 int ath12k_wmi_vdev_start(struct ath12k *ar, struct wmi_vdev_start_req_arg *arg, 1021 bool restart) 1022 { 1023 struct ath12k_wmi_pdev *wmi = ar->wmi; 1024 struct wmi_vdev_start_request_cmd *cmd; 1025 struct sk_buff *skb; 1026 struct ath12k_wmi_channel_params *chan; 1027 struct wmi_tlv *tlv; 1028 void *ptr; 1029 int ret, len; 1030 1031 if (WARN_ON(arg->ssid_len > sizeof(cmd->ssid.ssid))) 1032 return -EINVAL; 1033 1034 len = sizeof(*cmd) + sizeof(*chan) + TLV_HDR_SIZE; 1035 1036 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 1037 if (!skb) 1038 return -ENOMEM; 1039 1040 cmd = (struct wmi_vdev_start_request_cmd *)skb->data; 1041 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_START_REQUEST_CMD, 1042 sizeof(*cmd)); 1043 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 1044 cmd->beacon_interval = cpu_to_le32(arg->bcn_intval); 1045 cmd->bcn_tx_rate = cpu_to_le32(arg->bcn_tx_rate); 1046 cmd->dtim_period = cpu_to_le32(arg->dtim_period); 1047 cmd->num_noa_descriptors = cpu_to_le32(arg->num_noa_descriptors); 1048 cmd->preferred_rx_streams = cpu_to_le32(arg->pref_rx_streams); 1049 cmd->preferred_tx_streams = cpu_to_le32(arg->pref_tx_streams); 1050 cmd->cac_duration_ms = cpu_to_le32(arg->cac_duration_ms); 1051 cmd->regdomain = cpu_to_le32(arg->regdomain); 1052 cmd->he_ops = cpu_to_le32(arg->he_ops); 1053 cmd->punct_bitmap = cpu_to_le32(arg->punct_bitmap); 1054 cmd->mbssid_flags = cpu_to_le32(arg->mbssid_flags); 1055 cmd->mbssid_tx_vdev_id = cpu_to_le32(arg->mbssid_tx_vdev_id); 1056 1057 if (!restart) { 1058 if (arg->ssid) { 1059 cmd->ssid.ssid_len = cpu_to_le32(arg->ssid_len); 1060 memcpy(cmd->ssid.ssid, arg->ssid, arg->ssid_len); 1061 } 1062 if (arg->hidden_ssid) 1063 cmd->flags |= cpu_to_le32(WMI_VDEV_START_HIDDEN_SSID); 1064 if (arg->pmf_enabled) 1065 cmd->flags |= cpu_to_le32(WMI_VDEV_START_PMF_ENABLED); 1066 } 1067 1068 cmd->flags |= cpu_to_le32(WMI_VDEV_START_LDPC_RX_ENABLED); 1069 1070 ptr = skb->data + sizeof(*cmd); 1071 chan = ptr; 1072 1073 ath12k_wmi_put_wmi_channel(chan, arg); 1074 1075 chan->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_CHANNEL, 1076 sizeof(*chan)); 1077 ptr += sizeof(*chan); 1078 1079 tlv = ptr; 1080 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 0); 1081 1082 /* Note: This is a nested TLV containing: 1083 * [wmi_tlv][ath12k_wmi_p2p_noa_descriptor][wmi_tlv].. 1084 */ 1085 1086 ptr += sizeof(*tlv); 1087 1088 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "vdev %s id 0x%x freq 0x%x mode 0x%x\n", 1089 restart ? "restart" : "start", arg->vdev_id, 1090 arg->freq, arg->mode); 1091 1092 if (restart) 1093 ret = ath12k_wmi_cmd_send(wmi, skb, 1094 WMI_VDEV_RESTART_REQUEST_CMDID); 1095 else 1096 ret = ath12k_wmi_cmd_send(wmi, skb, 1097 WMI_VDEV_START_REQUEST_CMDID); 1098 if (ret) { 1099 ath12k_warn(ar->ab, "failed to submit vdev_%s cmd\n", 1100 restart ? "restart" : "start"); 1101 dev_kfree_skb(skb); 1102 } 1103 1104 return ret; 1105 } 1106 1107 int ath12k_wmi_vdev_up(struct ath12k *ar, struct ath12k_wmi_vdev_up_params *params) 1108 { 1109 struct ath12k_wmi_pdev *wmi = ar->wmi; 1110 struct wmi_vdev_up_cmd *cmd; 1111 struct sk_buff *skb; 1112 int ret; 1113 1114 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1115 if (!skb) 1116 return -ENOMEM; 1117 1118 cmd = (struct wmi_vdev_up_cmd *)skb->data; 1119 1120 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_UP_CMD, 1121 sizeof(*cmd)); 1122 cmd->vdev_id = cpu_to_le32(params->vdev_id); 1123 cmd->vdev_assoc_id = cpu_to_le32(params->aid); 1124 1125 ether_addr_copy(cmd->vdev_bssid.addr, params->bssid); 1126 1127 if (params->tx_bssid) { 1128 ether_addr_copy(cmd->tx_vdev_bssid.addr, params->tx_bssid); 1129 cmd->nontx_profile_idx = cpu_to_le32(params->nontx_profile_idx); 1130 cmd->nontx_profile_cnt = cpu_to_le32(params->nontx_profile_cnt); 1131 } 1132 1133 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1134 "WMI mgmt vdev up id 0x%x assoc id %d bssid %pM\n", 1135 params->vdev_id, params->aid, params->bssid); 1136 1137 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_UP_CMDID); 1138 if (ret) { 1139 ath12k_warn(ar->ab, "failed to submit WMI_VDEV_UP cmd\n"); 1140 dev_kfree_skb(skb); 1141 } 1142 1143 return ret; 1144 } 1145 1146 int ath12k_wmi_send_peer_create_cmd(struct ath12k *ar, 1147 struct ath12k_wmi_peer_create_arg *arg) 1148 { 1149 struct ath12k_wmi_pdev *wmi = ar->wmi; 1150 struct wmi_peer_create_cmd *cmd; 1151 struct sk_buff *skb; 1152 int ret; 1153 1154 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1155 if (!skb) 1156 return -ENOMEM; 1157 1158 cmd = (struct wmi_peer_create_cmd *)skb->data; 1159 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_CREATE_CMD, 1160 sizeof(*cmd)); 1161 1162 ether_addr_copy(cmd->peer_macaddr.addr, arg->peer_addr); 1163 cmd->peer_type = cpu_to_le32(arg->peer_type); 1164 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 1165 1166 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1167 "WMI peer create vdev_id %d peer_addr %pM\n", 1168 arg->vdev_id, arg->peer_addr); 1169 1170 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_CREATE_CMDID); 1171 if (ret) { 1172 ath12k_warn(ar->ab, "failed to submit WMI_PEER_CREATE cmd\n"); 1173 dev_kfree_skb(skb); 1174 } 1175 1176 return ret; 1177 } 1178 1179 int ath12k_wmi_send_peer_delete_cmd(struct ath12k *ar, 1180 const u8 *peer_addr, u8 vdev_id) 1181 { 1182 struct ath12k_wmi_pdev *wmi = ar->wmi; 1183 struct wmi_peer_delete_cmd *cmd; 1184 struct sk_buff *skb; 1185 int ret; 1186 1187 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1188 if (!skb) 1189 return -ENOMEM; 1190 1191 cmd = (struct wmi_peer_delete_cmd *)skb->data; 1192 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_DELETE_CMD, 1193 sizeof(*cmd)); 1194 1195 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr); 1196 cmd->vdev_id = cpu_to_le32(vdev_id); 1197 1198 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1199 "WMI peer delete vdev_id %d peer_addr %pM\n", 1200 vdev_id, peer_addr); 1201 1202 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_DELETE_CMDID); 1203 if (ret) { 1204 ath12k_warn(ar->ab, "failed to send WMI_PEER_DELETE cmd\n"); 1205 dev_kfree_skb(skb); 1206 } 1207 1208 return ret; 1209 } 1210 1211 int ath12k_wmi_send_pdev_set_regdomain(struct ath12k *ar, 1212 struct ath12k_wmi_pdev_set_regdomain_arg *arg) 1213 { 1214 struct ath12k_wmi_pdev *wmi = ar->wmi; 1215 struct wmi_pdev_set_regdomain_cmd *cmd; 1216 struct sk_buff *skb; 1217 int ret; 1218 1219 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1220 if (!skb) 1221 return -ENOMEM; 1222 1223 cmd = (struct wmi_pdev_set_regdomain_cmd *)skb->data; 1224 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_REGDOMAIN_CMD, 1225 sizeof(*cmd)); 1226 1227 cmd->reg_domain = cpu_to_le32(arg->current_rd_in_use); 1228 cmd->reg_domain_2g = cpu_to_le32(arg->current_rd_2g); 1229 cmd->reg_domain_5g = cpu_to_le32(arg->current_rd_5g); 1230 cmd->conformance_test_limit_2g = cpu_to_le32(arg->ctl_2g); 1231 cmd->conformance_test_limit_5g = cpu_to_le32(arg->ctl_5g); 1232 cmd->dfs_domain = cpu_to_le32(arg->dfs_domain); 1233 cmd->pdev_id = cpu_to_le32(arg->pdev_id); 1234 1235 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1236 "WMI pdev regd rd %d rd2g %d rd5g %d domain %d pdev id %d\n", 1237 arg->current_rd_in_use, arg->current_rd_2g, 1238 arg->current_rd_5g, arg->dfs_domain, arg->pdev_id); 1239 1240 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_SET_REGDOMAIN_CMDID); 1241 if (ret) { 1242 ath12k_warn(ar->ab, 1243 "failed to send WMI_PDEV_SET_REGDOMAIN cmd\n"); 1244 dev_kfree_skb(skb); 1245 } 1246 1247 return ret; 1248 } 1249 1250 int ath12k_wmi_set_peer_param(struct ath12k *ar, const u8 *peer_addr, 1251 u32 vdev_id, u32 param_id, u32 param_val) 1252 { 1253 struct ath12k_wmi_pdev *wmi = ar->wmi; 1254 struct wmi_peer_set_param_cmd *cmd; 1255 struct sk_buff *skb; 1256 int ret; 1257 1258 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1259 if (!skb) 1260 return -ENOMEM; 1261 1262 cmd = (struct wmi_peer_set_param_cmd *)skb->data; 1263 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_SET_PARAM_CMD, 1264 sizeof(*cmd)); 1265 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr); 1266 cmd->vdev_id = cpu_to_le32(vdev_id); 1267 cmd->param_id = cpu_to_le32(param_id); 1268 cmd->param_value = cpu_to_le32(param_val); 1269 1270 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1271 "WMI vdev %d peer 0x%pM set param %d value %d\n", 1272 vdev_id, peer_addr, param_id, param_val); 1273 1274 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_SET_PARAM_CMDID); 1275 if (ret) { 1276 ath12k_warn(ar->ab, "failed to send WMI_PEER_SET_PARAM cmd\n"); 1277 dev_kfree_skb(skb); 1278 } 1279 1280 return ret; 1281 } 1282 1283 int ath12k_wmi_send_peer_flush_tids_cmd(struct ath12k *ar, 1284 u8 peer_addr[ETH_ALEN], 1285 u32 peer_tid_bitmap, 1286 u8 vdev_id) 1287 { 1288 struct ath12k_wmi_pdev *wmi = ar->wmi; 1289 struct wmi_peer_flush_tids_cmd *cmd; 1290 struct sk_buff *skb; 1291 int ret; 1292 1293 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1294 if (!skb) 1295 return -ENOMEM; 1296 1297 cmd = (struct wmi_peer_flush_tids_cmd *)skb->data; 1298 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_FLUSH_TIDS_CMD, 1299 sizeof(*cmd)); 1300 1301 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr); 1302 cmd->peer_tid_bitmap = cpu_to_le32(peer_tid_bitmap); 1303 cmd->vdev_id = cpu_to_le32(vdev_id); 1304 1305 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1306 "WMI peer flush vdev_id %d peer_addr %pM tids %08x\n", 1307 vdev_id, peer_addr, peer_tid_bitmap); 1308 1309 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_FLUSH_TIDS_CMDID); 1310 if (ret) { 1311 ath12k_warn(ar->ab, 1312 "failed to send WMI_PEER_FLUSH_TIDS cmd\n"); 1313 dev_kfree_skb(skb); 1314 } 1315 1316 return ret; 1317 } 1318 1319 int ath12k_wmi_peer_rx_reorder_queue_setup(struct ath12k *ar, 1320 int vdev_id, const u8 *addr, 1321 dma_addr_t paddr, u8 tid, 1322 u8 ba_window_size_valid, 1323 u32 ba_window_size) 1324 { 1325 struct wmi_peer_reorder_queue_setup_cmd *cmd; 1326 struct sk_buff *skb; 1327 int ret; 1328 1329 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd)); 1330 if (!skb) 1331 return -ENOMEM; 1332 1333 cmd = (struct wmi_peer_reorder_queue_setup_cmd *)skb->data; 1334 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_REORDER_QUEUE_SETUP_CMD, 1335 sizeof(*cmd)); 1336 1337 ether_addr_copy(cmd->peer_macaddr.addr, addr); 1338 cmd->vdev_id = cpu_to_le32(vdev_id); 1339 cmd->tid = cpu_to_le32(tid); 1340 cmd->queue_ptr_lo = cpu_to_le32(lower_32_bits(paddr)); 1341 cmd->queue_ptr_hi = cpu_to_le32(upper_32_bits(paddr)); 1342 cmd->queue_no = cpu_to_le32(tid); 1343 cmd->ba_window_size_valid = cpu_to_le32(ba_window_size_valid); 1344 cmd->ba_window_size = cpu_to_le32(ba_window_size); 1345 1346 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1347 "wmi rx reorder queue setup addr %pM vdev_id %d tid %d\n", 1348 addr, vdev_id, tid); 1349 1350 ret = ath12k_wmi_cmd_send(ar->wmi, skb, 1351 WMI_PEER_REORDER_QUEUE_SETUP_CMDID); 1352 if (ret) { 1353 ath12k_warn(ar->ab, 1354 "failed to send WMI_PEER_REORDER_QUEUE_SETUP\n"); 1355 dev_kfree_skb(skb); 1356 } 1357 1358 return ret; 1359 } 1360 1361 int 1362 ath12k_wmi_rx_reord_queue_remove(struct ath12k *ar, 1363 struct ath12k_wmi_rx_reorder_queue_remove_arg *arg) 1364 { 1365 struct ath12k_wmi_pdev *wmi = ar->wmi; 1366 struct wmi_peer_reorder_queue_remove_cmd *cmd; 1367 struct sk_buff *skb; 1368 int ret; 1369 1370 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1371 if (!skb) 1372 return -ENOMEM; 1373 1374 cmd = (struct wmi_peer_reorder_queue_remove_cmd *)skb->data; 1375 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_REORDER_QUEUE_REMOVE_CMD, 1376 sizeof(*cmd)); 1377 1378 ether_addr_copy(cmd->peer_macaddr.addr, arg->peer_macaddr); 1379 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 1380 cmd->tid_mask = cpu_to_le32(arg->peer_tid_bitmap); 1381 1382 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1383 "%s: peer_macaddr %pM vdev_id %d, tid_map %d", __func__, 1384 arg->peer_macaddr, arg->vdev_id, arg->peer_tid_bitmap); 1385 1386 ret = ath12k_wmi_cmd_send(wmi, skb, 1387 WMI_PEER_REORDER_QUEUE_REMOVE_CMDID); 1388 if (ret) { 1389 ath12k_warn(ar->ab, 1390 "failed to send WMI_PEER_REORDER_QUEUE_REMOVE_CMDID"); 1391 dev_kfree_skb(skb); 1392 } 1393 1394 return ret; 1395 } 1396 1397 int ath12k_wmi_pdev_set_param(struct ath12k *ar, u32 param_id, 1398 u32 param_value, u8 pdev_id) 1399 { 1400 struct ath12k_wmi_pdev *wmi = ar->wmi; 1401 struct wmi_pdev_set_param_cmd *cmd; 1402 struct sk_buff *skb; 1403 int ret; 1404 1405 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1406 if (!skb) 1407 return -ENOMEM; 1408 1409 cmd = (struct wmi_pdev_set_param_cmd *)skb->data; 1410 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_PARAM_CMD, 1411 sizeof(*cmd)); 1412 cmd->pdev_id = cpu_to_le32(pdev_id); 1413 cmd->param_id = cpu_to_le32(param_id); 1414 cmd->param_value = cpu_to_le32(param_value); 1415 1416 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1417 "WMI pdev set param %d pdev id %d value %d\n", 1418 param_id, pdev_id, param_value); 1419 1420 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_SET_PARAM_CMDID); 1421 if (ret) { 1422 ath12k_warn(ar->ab, "failed to send WMI_PDEV_SET_PARAM cmd\n"); 1423 dev_kfree_skb(skb); 1424 } 1425 1426 return ret; 1427 } 1428 1429 int ath12k_wmi_pdev_set_ps_mode(struct ath12k *ar, int vdev_id, u32 enable) 1430 { 1431 struct ath12k_wmi_pdev *wmi = ar->wmi; 1432 struct wmi_pdev_set_ps_mode_cmd *cmd; 1433 struct sk_buff *skb; 1434 int ret; 1435 1436 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1437 if (!skb) 1438 return -ENOMEM; 1439 1440 cmd = (struct wmi_pdev_set_ps_mode_cmd *)skb->data; 1441 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STA_POWERSAVE_MODE_CMD, 1442 sizeof(*cmd)); 1443 cmd->vdev_id = cpu_to_le32(vdev_id); 1444 cmd->sta_ps_mode = cpu_to_le32(enable); 1445 1446 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1447 "WMI vdev set psmode %d vdev id %d\n", 1448 enable, vdev_id); 1449 1450 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_STA_POWERSAVE_MODE_CMDID); 1451 if (ret) { 1452 ath12k_warn(ar->ab, "failed to send WMI_PDEV_SET_PARAM cmd\n"); 1453 dev_kfree_skb(skb); 1454 } 1455 1456 return ret; 1457 } 1458 1459 int ath12k_wmi_pdev_suspend(struct ath12k *ar, u32 suspend_opt, 1460 u32 pdev_id) 1461 { 1462 struct ath12k_wmi_pdev *wmi = ar->wmi; 1463 struct wmi_pdev_suspend_cmd *cmd; 1464 struct sk_buff *skb; 1465 int ret; 1466 1467 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1468 if (!skb) 1469 return -ENOMEM; 1470 1471 cmd = (struct wmi_pdev_suspend_cmd *)skb->data; 1472 1473 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SUSPEND_CMD, 1474 sizeof(*cmd)); 1475 1476 cmd->suspend_opt = cpu_to_le32(suspend_opt); 1477 cmd->pdev_id = cpu_to_le32(pdev_id); 1478 1479 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1480 "WMI pdev suspend pdev_id %d\n", pdev_id); 1481 1482 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_SUSPEND_CMDID); 1483 if (ret) { 1484 ath12k_warn(ar->ab, "failed to send WMI_PDEV_SUSPEND cmd\n"); 1485 dev_kfree_skb(skb); 1486 } 1487 1488 return ret; 1489 } 1490 1491 int ath12k_wmi_pdev_resume(struct ath12k *ar, u32 pdev_id) 1492 { 1493 struct ath12k_wmi_pdev *wmi = ar->wmi; 1494 struct wmi_pdev_resume_cmd *cmd; 1495 struct sk_buff *skb; 1496 int ret; 1497 1498 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1499 if (!skb) 1500 return -ENOMEM; 1501 1502 cmd = (struct wmi_pdev_resume_cmd *)skb->data; 1503 1504 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_RESUME_CMD, 1505 sizeof(*cmd)); 1506 cmd->pdev_id = cpu_to_le32(pdev_id); 1507 1508 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1509 "WMI pdev resume pdev id %d\n", pdev_id); 1510 1511 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_RESUME_CMDID); 1512 if (ret) { 1513 ath12k_warn(ar->ab, "failed to send WMI_PDEV_RESUME cmd\n"); 1514 dev_kfree_skb(skb); 1515 } 1516 1517 return ret; 1518 } 1519 1520 /* TODO FW Support for the cmd is not available yet. 1521 * Can be tested once the command and corresponding 1522 * event is implemented in FW 1523 */ 1524 int ath12k_wmi_pdev_bss_chan_info_request(struct ath12k *ar, 1525 enum wmi_bss_chan_info_req_type type) 1526 { 1527 struct ath12k_wmi_pdev *wmi = ar->wmi; 1528 struct wmi_pdev_bss_chan_info_req_cmd *cmd; 1529 struct sk_buff *skb; 1530 int ret; 1531 1532 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1533 if (!skb) 1534 return -ENOMEM; 1535 1536 cmd = (struct wmi_pdev_bss_chan_info_req_cmd *)skb->data; 1537 1538 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_BSS_CHAN_INFO_REQUEST, 1539 sizeof(*cmd)); 1540 cmd->req_type = cpu_to_le32(type); 1541 1542 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1543 "WMI bss chan info req type %d\n", type); 1544 1545 ret = ath12k_wmi_cmd_send(wmi, skb, 1546 WMI_PDEV_BSS_CHAN_INFO_REQUEST_CMDID); 1547 if (ret) { 1548 ath12k_warn(ar->ab, 1549 "failed to send WMI_PDEV_BSS_CHAN_INFO_REQUEST cmd\n"); 1550 dev_kfree_skb(skb); 1551 } 1552 1553 return ret; 1554 } 1555 1556 int ath12k_wmi_send_set_ap_ps_param_cmd(struct ath12k *ar, u8 *peer_addr, 1557 struct ath12k_wmi_ap_ps_arg *arg) 1558 { 1559 struct ath12k_wmi_pdev *wmi = ar->wmi; 1560 struct wmi_ap_ps_peer_cmd *cmd; 1561 struct sk_buff *skb; 1562 int ret; 1563 1564 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1565 if (!skb) 1566 return -ENOMEM; 1567 1568 cmd = (struct wmi_ap_ps_peer_cmd *)skb->data; 1569 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_AP_PS_PEER_CMD, 1570 sizeof(*cmd)); 1571 1572 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 1573 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr); 1574 cmd->param = cpu_to_le32(arg->param); 1575 cmd->value = cpu_to_le32(arg->value); 1576 1577 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1578 "WMI set ap ps vdev id %d peer %pM param %d value %d\n", 1579 arg->vdev_id, peer_addr, arg->param, arg->value); 1580 1581 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_AP_PS_PEER_PARAM_CMDID); 1582 if (ret) { 1583 ath12k_warn(ar->ab, 1584 "failed to send WMI_AP_PS_PEER_PARAM_CMDID\n"); 1585 dev_kfree_skb(skb); 1586 } 1587 1588 return ret; 1589 } 1590 1591 int ath12k_wmi_set_sta_ps_param(struct ath12k *ar, u32 vdev_id, 1592 u32 param, u32 param_value) 1593 { 1594 struct ath12k_wmi_pdev *wmi = ar->wmi; 1595 struct wmi_sta_powersave_param_cmd *cmd; 1596 struct sk_buff *skb; 1597 int ret; 1598 1599 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1600 if (!skb) 1601 return -ENOMEM; 1602 1603 cmd = (struct wmi_sta_powersave_param_cmd *)skb->data; 1604 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STA_POWERSAVE_PARAM_CMD, 1605 sizeof(*cmd)); 1606 1607 cmd->vdev_id = cpu_to_le32(vdev_id); 1608 cmd->param = cpu_to_le32(param); 1609 cmd->value = cpu_to_le32(param_value); 1610 1611 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1612 "WMI set sta ps vdev_id %d param %d value %d\n", 1613 vdev_id, param, param_value); 1614 1615 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_STA_POWERSAVE_PARAM_CMDID); 1616 if (ret) { 1617 ath12k_warn(ar->ab, "failed to send WMI_STA_POWERSAVE_PARAM_CMDID"); 1618 dev_kfree_skb(skb); 1619 } 1620 1621 return ret; 1622 } 1623 1624 int ath12k_wmi_force_fw_hang_cmd(struct ath12k *ar, u32 type, u32 delay_time_ms) 1625 { 1626 struct ath12k_wmi_pdev *wmi = ar->wmi; 1627 struct wmi_force_fw_hang_cmd *cmd; 1628 struct sk_buff *skb; 1629 int ret, len; 1630 1631 len = sizeof(*cmd); 1632 1633 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 1634 if (!skb) 1635 return -ENOMEM; 1636 1637 cmd = (struct wmi_force_fw_hang_cmd *)skb->data; 1638 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_FORCE_FW_HANG_CMD, 1639 len); 1640 1641 cmd->type = cpu_to_le32(type); 1642 cmd->delay_time_ms = cpu_to_le32(delay_time_ms); 1643 1644 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_FORCE_FW_HANG_CMDID); 1645 1646 if (ret) { 1647 ath12k_warn(ar->ab, "Failed to send WMI_FORCE_FW_HANG_CMDID"); 1648 dev_kfree_skb(skb); 1649 } 1650 return ret; 1651 } 1652 1653 int ath12k_wmi_vdev_set_param_cmd(struct ath12k *ar, u32 vdev_id, 1654 u32 param_id, u32 param_value) 1655 { 1656 struct ath12k_wmi_pdev *wmi = ar->wmi; 1657 struct wmi_vdev_set_param_cmd *cmd; 1658 struct sk_buff *skb; 1659 int ret; 1660 1661 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1662 if (!skb) 1663 return -ENOMEM; 1664 1665 cmd = (struct wmi_vdev_set_param_cmd *)skb->data; 1666 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SET_PARAM_CMD, 1667 sizeof(*cmd)); 1668 1669 cmd->vdev_id = cpu_to_le32(vdev_id); 1670 cmd->param_id = cpu_to_le32(param_id); 1671 cmd->param_value = cpu_to_le32(param_value); 1672 1673 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1674 "WMI vdev id 0x%x set param %d value %d\n", 1675 vdev_id, param_id, param_value); 1676 1677 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_SET_PARAM_CMDID); 1678 if (ret) { 1679 ath12k_warn(ar->ab, 1680 "failed to send WMI_VDEV_SET_PARAM_CMDID\n"); 1681 dev_kfree_skb(skb); 1682 } 1683 1684 return ret; 1685 } 1686 1687 int ath12k_wmi_send_pdev_temperature_cmd(struct ath12k *ar) 1688 { 1689 struct ath12k_wmi_pdev *wmi = ar->wmi; 1690 struct wmi_get_pdev_temperature_cmd *cmd; 1691 struct sk_buff *skb; 1692 int ret; 1693 1694 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1695 if (!skb) 1696 return -ENOMEM; 1697 1698 cmd = (struct wmi_get_pdev_temperature_cmd *)skb->data; 1699 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_GET_TEMPERATURE_CMD, 1700 sizeof(*cmd)); 1701 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id); 1702 1703 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1704 "WMI pdev get temperature for pdev_id %d\n", ar->pdev->pdev_id); 1705 1706 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_GET_TEMPERATURE_CMDID); 1707 if (ret) { 1708 ath12k_warn(ar->ab, "failed to send WMI_PDEV_GET_TEMPERATURE cmd\n"); 1709 dev_kfree_skb(skb); 1710 } 1711 1712 return ret; 1713 } 1714 1715 int ath12k_wmi_send_bcn_offload_control_cmd(struct ath12k *ar, 1716 u32 vdev_id, u32 bcn_ctrl_op) 1717 { 1718 struct ath12k_wmi_pdev *wmi = ar->wmi; 1719 struct wmi_bcn_offload_ctrl_cmd *cmd; 1720 struct sk_buff *skb; 1721 int ret; 1722 1723 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1724 if (!skb) 1725 return -ENOMEM; 1726 1727 cmd = (struct wmi_bcn_offload_ctrl_cmd *)skb->data; 1728 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_OFFLOAD_CTRL_CMD, 1729 sizeof(*cmd)); 1730 1731 cmd->vdev_id = cpu_to_le32(vdev_id); 1732 cmd->bcn_ctrl_op = cpu_to_le32(bcn_ctrl_op); 1733 1734 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1735 "WMI bcn ctrl offload vdev id %d ctrl_op %d\n", 1736 vdev_id, bcn_ctrl_op); 1737 1738 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_BCN_OFFLOAD_CTRL_CMDID); 1739 if (ret) { 1740 ath12k_warn(ar->ab, 1741 "failed to send WMI_BCN_OFFLOAD_CTRL_CMDID\n"); 1742 dev_kfree_skb(skb); 1743 } 1744 1745 return ret; 1746 } 1747 1748 int ath12k_wmi_p2p_go_bcn_ie(struct ath12k *ar, u32 vdev_id, 1749 const u8 *p2p_ie) 1750 { 1751 struct ath12k_wmi_pdev *wmi = ar->wmi; 1752 struct wmi_p2p_go_set_beacon_ie_cmd *cmd; 1753 size_t p2p_ie_len, aligned_len; 1754 struct wmi_tlv *tlv; 1755 struct sk_buff *skb; 1756 void *ptr; 1757 int ret, len; 1758 1759 p2p_ie_len = p2p_ie[1] + 2; 1760 aligned_len = roundup(p2p_ie_len, sizeof(u32)); 1761 1762 len = sizeof(*cmd) + TLV_HDR_SIZE + aligned_len; 1763 1764 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 1765 if (!skb) 1766 return -ENOMEM; 1767 1768 ptr = skb->data; 1769 cmd = ptr; 1770 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_P2P_GO_SET_BEACON_IE, 1771 sizeof(*cmd)); 1772 cmd->vdev_id = cpu_to_le32(vdev_id); 1773 cmd->ie_buf_len = cpu_to_le32(p2p_ie_len); 1774 1775 ptr += sizeof(*cmd); 1776 tlv = ptr; 1777 tlv->header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ARRAY_BYTE, 1778 aligned_len); 1779 memcpy(tlv->value, p2p_ie, p2p_ie_len); 1780 1781 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_P2P_GO_SET_BEACON_IE); 1782 if (ret) { 1783 ath12k_warn(ar->ab, "failed to send WMI_P2P_GO_SET_BEACON_IE\n"); 1784 dev_kfree_skb(skb); 1785 } 1786 1787 return ret; 1788 } 1789 1790 int ath12k_wmi_bcn_tmpl(struct ath12k *ar, u32 vdev_id, 1791 struct ieee80211_mutable_offsets *offs, 1792 struct sk_buff *bcn, 1793 struct ath12k_wmi_bcn_tmpl_ema_arg *ema_args) 1794 { 1795 struct ath12k_wmi_pdev *wmi = ar->wmi; 1796 struct wmi_bcn_tmpl_cmd *cmd; 1797 struct ath12k_wmi_bcn_prb_info_params *bcn_prb_info; 1798 struct wmi_tlv *tlv; 1799 struct sk_buff *skb; 1800 u32 ema_params = 0; 1801 void *ptr; 1802 int ret, len; 1803 size_t aligned_len = roundup(bcn->len, 4); 1804 1805 len = sizeof(*cmd) + sizeof(*bcn_prb_info) + TLV_HDR_SIZE + aligned_len; 1806 1807 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 1808 if (!skb) 1809 return -ENOMEM; 1810 1811 cmd = (struct wmi_bcn_tmpl_cmd *)skb->data; 1812 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_TMPL_CMD, 1813 sizeof(*cmd)); 1814 cmd->vdev_id = cpu_to_le32(vdev_id); 1815 cmd->tim_ie_offset = cpu_to_le32(offs->tim_offset); 1816 cmd->csa_switch_count_offset = cpu_to_le32(offs->cntdwn_counter_offs[0]); 1817 cmd->ext_csa_switch_count_offset = cpu_to_le32(offs->cntdwn_counter_offs[1]); 1818 cmd->buf_len = cpu_to_le32(bcn->len); 1819 cmd->mbssid_ie_offset = cpu_to_le32(offs->mbssid_off); 1820 if (ema_args) { 1821 u32p_replace_bits(&ema_params, ema_args->bcn_cnt, WMI_EMA_BEACON_CNT); 1822 u32p_replace_bits(&ema_params, ema_args->bcn_index, WMI_EMA_BEACON_IDX); 1823 if (ema_args->bcn_index == 0) 1824 u32p_replace_bits(&ema_params, 1, WMI_EMA_BEACON_FIRST); 1825 if (ema_args->bcn_index + 1 == ema_args->bcn_cnt) 1826 u32p_replace_bits(&ema_params, 1, WMI_EMA_BEACON_LAST); 1827 cmd->ema_params = cpu_to_le32(ema_params); 1828 } 1829 1830 ptr = skb->data + sizeof(*cmd); 1831 1832 bcn_prb_info = ptr; 1833 len = sizeof(*bcn_prb_info); 1834 bcn_prb_info->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_PRB_INFO, 1835 len); 1836 bcn_prb_info->caps = 0; 1837 bcn_prb_info->erp = 0; 1838 1839 ptr += sizeof(*bcn_prb_info); 1840 1841 tlv = ptr; 1842 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, aligned_len); 1843 memcpy(tlv->value, bcn->data, bcn->len); 1844 1845 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_BCN_TMPL_CMDID); 1846 if (ret) { 1847 ath12k_warn(ar->ab, "failed to send WMI_BCN_TMPL_CMDID\n"); 1848 dev_kfree_skb(skb); 1849 } 1850 1851 return ret; 1852 } 1853 1854 int ath12k_wmi_vdev_install_key(struct ath12k *ar, 1855 struct wmi_vdev_install_key_arg *arg) 1856 { 1857 struct ath12k_wmi_pdev *wmi = ar->wmi; 1858 struct wmi_vdev_install_key_cmd *cmd; 1859 struct wmi_tlv *tlv; 1860 struct sk_buff *skb; 1861 int ret, len, key_len_aligned; 1862 1863 /* WMI_TAG_ARRAY_BYTE needs to be aligned with 4, the actual key 1864 * length is specified in cmd->key_len. 1865 */ 1866 key_len_aligned = roundup(arg->key_len, 4); 1867 1868 len = sizeof(*cmd) + TLV_HDR_SIZE + key_len_aligned; 1869 1870 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 1871 if (!skb) 1872 return -ENOMEM; 1873 1874 cmd = (struct wmi_vdev_install_key_cmd *)skb->data; 1875 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_INSTALL_KEY_CMD, 1876 sizeof(*cmd)); 1877 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 1878 ether_addr_copy(cmd->peer_macaddr.addr, arg->macaddr); 1879 cmd->key_idx = cpu_to_le32(arg->key_idx); 1880 cmd->key_flags = cpu_to_le32(arg->key_flags); 1881 cmd->key_cipher = cpu_to_le32(arg->key_cipher); 1882 cmd->key_len = cpu_to_le32(arg->key_len); 1883 cmd->key_txmic_len = cpu_to_le32(arg->key_txmic_len); 1884 cmd->key_rxmic_len = cpu_to_le32(arg->key_rxmic_len); 1885 1886 if (arg->key_rsc_counter) 1887 cmd->key_rsc_counter = cpu_to_le64(arg->key_rsc_counter); 1888 1889 tlv = (struct wmi_tlv *)(skb->data + sizeof(*cmd)); 1890 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, key_len_aligned); 1891 memcpy(tlv->value, arg->key_data, arg->key_len); 1892 1893 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1894 "WMI vdev install key idx %d cipher %d len %d\n", 1895 arg->key_idx, arg->key_cipher, arg->key_len); 1896 1897 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_INSTALL_KEY_CMDID); 1898 if (ret) { 1899 ath12k_warn(ar->ab, 1900 "failed to send WMI_VDEV_INSTALL_KEY cmd\n"); 1901 dev_kfree_skb(skb); 1902 } 1903 1904 return ret; 1905 } 1906 1907 static void ath12k_wmi_copy_peer_flags(struct wmi_peer_assoc_complete_cmd *cmd, 1908 struct ath12k_wmi_peer_assoc_arg *arg, 1909 bool hw_crypto_disabled) 1910 { 1911 cmd->peer_flags = 0; 1912 cmd->peer_flags_ext = 0; 1913 1914 if (arg->is_wme_set) { 1915 if (arg->qos_flag) 1916 cmd->peer_flags |= cpu_to_le32(WMI_PEER_QOS); 1917 if (arg->apsd_flag) 1918 cmd->peer_flags |= cpu_to_le32(WMI_PEER_APSD); 1919 if (arg->ht_flag) 1920 cmd->peer_flags |= cpu_to_le32(WMI_PEER_HT); 1921 if (arg->bw_40) 1922 cmd->peer_flags |= cpu_to_le32(WMI_PEER_40MHZ); 1923 if (arg->bw_80) 1924 cmd->peer_flags |= cpu_to_le32(WMI_PEER_80MHZ); 1925 if (arg->bw_160) 1926 cmd->peer_flags |= cpu_to_le32(WMI_PEER_160MHZ); 1927 if (arg->bw_320) 1928 cmd->peer_flags_ext |= cpu_to_le32(WMI_PEER_EXT_320MHZ); 1929 1930 /* Typically if STBC is enabled for VHT it should be enabled 1931 * for HT as well 1932 **/ 1933 if (arg->stbc_flag) 1934 cmd->peer_flags |= cpu_to_le32(WMI_PEER_STBC); 1935 1936 /* Typically if LDPC is enabled for VHT it should be enabled 1937 * for HT as well 1938 **/ 1939 if (arg->ldpc_flag) 1940 cmd->peer_flags |= cpu_to_le32(WMI_PEER_LDPC); 1941 1942 if (arg->static_mimops_flag) 1943 cmd->peer_flags |= cpu_to_le32(WMI_PEER_STATIC_MIMOPS); 1944 if (arg->dynamic_mimops_flag) 1945 cmd->peer_flags |= cpu_to_le32(WMI_PEER_DYN_MIMOPS); 1946 if (arg->spatial_mux_flag) 1947 cmd->peer_flags |= cpu_to_le32(WMI_PEER_SPATIAL_MUX); 1948 if (arg->vht_flag) 1949 cmd->peer_flags |= cpu_to_le32(WMI_PEER_VHT); 1950 if (arg->he_flag) 1951 cmd->peer_flags |= cpu_to_le32(WMI_PEER_HE); 1952 if (arg->twt_requester) 1953 cmd->peer_flags |= cpu_to_le32(WMI_PEER_TWT_REQ); 1954 if (arg->twt_responder) 1955 cmd->peer_flags |= cpu_to_le32(WMI_PEER_TWT_RESP); 1956 if (arg->eht_flag) 1957 cmd->peer_flags_ext |= cpu_to_le32(WMI_PEER_EXT_EHT); 1958 } 1959 1960 /* Suppress authorization for all AUTH modes that need 4-way handshake 1961 * (during re-association). 1962 * Authorization will be done for these modes on key installation. 1963 */ 1964 if (arg->auth_flag) 1965 cmd->peer_flags |= cpu_to_le32(WMI_PEER_AUTH); 1966 if (arg->need_ptk_4_way) { 1967 cmd->peer_flags |= cpu_to_le32(WMI_PEER_NEED_PTK_4_WAY); 1968 if (!hw_crypto_disabled) 1969 cmd->peer_flags &= cpu_to_le32(~WMI_PEER_AUTH); 1970 } 1971 if (arg->need_gtk_2_way) 1972 cmd->peer_flags |= cpu_to_le32(WMI_PEER_NEED_GTK_2_WAY); 1973 /* safe mode bypass the 4-way handshake */ 1974 if (arg->safe_mode_enabled) 1975 cmd->peer_flags &= cpu_to_le32(~(WMI_PEER_NEED_PTK_4_WAY | 1976 WMI_PEER_NEED_GTK_2_WAY)); 1977 1978 if (arg->is_pmf_enabled) 1979 cmd->peer_flags |= cpu_to_le32(WMI_PEER_PMF); 1980 1981 /* Disable AMSDU for station transmit, if user configures it */ 1982 /* Disable AMSDU for AP transmit to 11n Stations, if user configures 1983 * it 1984 * if (arg->amsdu_disable) Add after FW support 1985 **/ 1986 1987 /* Target asserts if node is marked HT and all MCS is set to 0. 1988 * Mark the node as non-HT if all the mcs rates are disabled through 1989 * iwpriv 1990 **/ 1991 if (arg->peer_ht_rates.num_rates == 0) 1992 cmd->peer_flags &= cpu_to_le32(~WMI_PEER_HT); 1993 } 1994 1995 int ath12k_wmi_send_peer_assoc_cmd(struct ath12k *ar, 1996 struct ath12k_wmi_peer_assoc_arg *arg) 1997 { 1998 struct ath12k_wmi_pdev *wmi = ar->wmi; 1999 struct wmi_peer_assoc_complete_cmd *cmd; 2000 struct ath12k_wmi_vht_rate_set_params *mcs; 2001 struct ath12k_wmi_he_rate_set_params *he_mcs; 2002 struct ath12k_wmi_eht_rate_set_params *eht_mcs; 2003 struct sk_buff *skb; 2004 struct wmi_tlv *tlv; 2005 void *ptr; 2006 u32 peer_legacy_rates_align; 2007 u32 peer_ht_rates_align; 2008 int i, ret, len; 2009 2010 peer_legacy_rates_align = roundup(arg->peer_legacy_rates.num_rates, 2011 sizeof(u32)); 2012 peer_ht_rates_align = roundup(arg->peer_ht_rates.num_rates, 2013 sizeof(u32)); 2014 2015 len = sizeof(*cmd) + 2016 TLV_HDR_SIZE + (peer_legacy_rates_align * sizeof(u8)) + 2017 TLV_HDR_SIZE + (peer_ht_rates_align * sizeof(u8)) + 2018 sizeof(*mcs) + TLV_HDR_SIZE + 2019 (sizeof(*he_mcs) * arg->peer_he_mcs_count) + 2020 TLV_HDR_SIZE + (sizeof(*eht_mcs) * arg->peer_eht_mcs_count) + 2021 TLV_HDR_SIZE + TLV_HDR_SIZE; 2022 2023 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 2024 if (!skb) 2025 return -ENOMEM; 2026 2027 ptr = skb->data; 2028 2029 cmd = ptr; 2030 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_ASSOC_COMPLETE_CMD, 2031 sizeof(*cmd)); 2032 2033 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 2034 2035 cmd->peer_new_assoc = cpu_to_le32(arg->peer_new_assoc); 2036 cmd->peer_associd = cpu_to_le32(arg->peer_associd); 2037 cmd->punct_bitmap = cpu_to_le32(arg->punct_bitmap); 2038 2039 ath12k_wmi_copy_peer_flags(cmd, arg, 2040 test_bit(ATH12K_FLAG_HW_CRYPTO_DISABLED, 2041 &ar->ab->dev_flags)); 2042 2043 ether_addr_copy(cmd->peer_macaddr.addr, arg->peer_mac); 2044 2045 cmd->peer_rate_caps = cpu_to_le32(arg->peer_rate_caps); 2046 cmd->peer_caps = cpu_to_le32(arg->peer_caps); 2047 cmd->peer_listen_intval = cpu_to_le32(arg->peer_listen_intval); 2048 cmd->peer_ht_caps = cpu_to_le32(arg->peer_ht_caps); 2049 cmd->peer_max_mpdu = cpu_to_le32(arg->peer_max_mpdu); 2050 cmd->peer_mpdu_density = cpu_to_le32(arg->peer_mpdu_density); 2051 cmd->peer_vht_caps = cpu_to_le32(arg->peer_vht_caps); 2052 cmd->peer_phymode = cpu_to_le32(arg->peer_phymode); 2053 2054 /* Update 11ax capabilities */ 2055 cmd->peer_he_cap_info = cpu_to_le32(arg->peer_he_cap_macinfo[0]); 2056 cmd->peer_he_cap_info_ext = cpu_to_le32(arg->peer_he_cap_macinfo[1]); 2057 cmd->peer_he_cap_info_internal = cpu_to_le32(arg->peer_he_cap_macinfo_internal); 2058 cmd->peer_he_caps_6ghz = cpu_to_le32(arg->peer_he_caps_6ghz); 2059 cmd->peer_he_ops = cpu_to_le32(arg->peer_he_ops); 2060 for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++) 2061 cmd->peer_he_cap_phy[i] = 2062 cpu_to_le32(arg->peer_he_cap_phyinfo[i]); 2063 cmd->peer_ppet.numss_m1 = cpu_to_le32(arg->peer_ppet.numss_m1); 2064 cmd->peer_ppet.ru_info = cpu_to_le32(arg->peer_ppet.ru_bit_mask); 2065 for (i = 0; i < WMI_MAX_NUM_SS; i++) 2066 cmd->peer_ppet.ppet16_ppet8_ru3_ru0[i] = 2067 cpu_to_le32(arg->peer_ppet.ppet16_ppet8_ru3_ru0[i]); 2068 2069 /* Update 11be capabilities */ 2070 memcpy_and_pad(cmd->peer_eht_cap_mac, sizeof(cmd->peer_eht_cap_mac), 2071 arg->peer_eht_cap_mac, sizeof(arg->peer_eht_cap_mac), 2072 0); 2073 memcpy_and_pad(cmd->peer_eht_cap_phy, sizeof(cmd->peer_eht_cap_phy), 2074 arg->peer_eht_cap_phy, sizeof(arg->peer_eht_cap_phy), 2075 0); 2076 memcpy_and_pad(&cmd->peer_eht_ppet, sizeof(cmd->peer_eht_ppet), 2077 &arg->peer_eht_ppet, sizeof(arg->peer_eht_ppet), 0); 2078 2079 /* Update peer legacy rate information */ 2080 ptr += sizeof(*cmd); 2081 2082 tlv = ptr; 2083 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, peer_legacy_rates_align); 2084 2085 ptr += TLV_HDR_SIZE; 2086 2087 cmd->num_peer_legacy_rates = cpu_to_le32(arg->peer_legacy_rates.num_rates); 2088 memcpy(ptr, arg->peer_legacy_rates.rates, 2089 arg->peer_legacy_rates.num_rates); 2090 2091 /* Update peer HT rate information */ 2092 ptr += peer_legacy_rates_align; 2093 2094 tlv = ptr; 2095 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, peer_ht_rates_align); 2096 ptr += TLV_HDR_SIZE; 2097 cmd->num_peer_ht_rates = cpu_to_le32(arg->peer_ht_rates.num_rates); 2098 memcpy(ptr, arg->peer_ht_rates.rates, 2099 arg->peer_ht_rates.num_rates); 2100 2101 /* VHT Rates */ 2102 ptr += peer_ht_rates_align; 2103 2104 mcs = ptr; 2105 2106 mcs->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VHT_RATE_SET, 2107 sizeof(*mcs)); 2108 2109 cmd->peer_nss = cpu_to_le32(arg->peer_nss); 2110 2111 /* Update bandwidth-NSS mapping */ 2112 cmd->peer_bw_rxnss_override = 0; 2113 cmd->peer_bw_rxnss_override |= cpu_to_le32(arg->peer_bw_rxnss_override); 2114 2115 if (arg->vht_capable) { 2116 mcs->rx_max_rate = cpu_to_le32(arg->rx_max_rate); 2117 mcs->rx_mcs_set = cpu_to_le32(arg->rx_mcs_set); 2118 mcs->tx_max_rate = cpu_to_le32(arg->tx_max_rate); 2119 mcs->tx_mcs_set = cpu_to_le32(arg->tx_mcs_set); 2120 } 2121 2122 /* HE Rates */ 2123 cmd->peer_he_mcs = cpu_to_le32(arg->peer_he_mcs_count); 2124 cmd->min_data_rate = cpu_to_le32(arg->min_data_rate); 2125 2126 ptr += sizeof(*mcs); 2127 2128 len = arg->peer_he_mcs_count * sizeof(*he_mcs); 2129 2130 tlv = ptr; 2131 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len); 2132 ptr += TLV_HDR_SIZE; 2133 2134 /* Loop through the HE rate set */ 2135 for (i = 0; i < arg->peer_he_mcs_count; i++) { 2136 he_mcs = ptr; 2137 he_mcs->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_HE_RATE_SET, 2138 sizeof(*he_mcs)); 2139 2140 he_mcs->rx_mcs_set = cpu_to_le32(arg->peer_he_rx_mcs_set[i]); 2141 he_mcs->tx_mcs_set = cpu_to_le32(arg->peer_he_tx_mcs_set[i]); 2142 ptr += sizeof(*he_mcs); 2143 } 2144 2145 /* MLO header tag with 0 length */ 2146 len = 0; 2147 tlv = ptr; 2148 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len); 2149 ptr += TLV_HDR_SIZE; 2150 2151 /* Loop through the EHT rate set */ 2152 len = arg->peer_eht_mcs_count * sizeof(*eht_mcs); 2153 tlv = ptr; 2154 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len); 2155 ptr += TLV_HDR_SIZE; 2156 2157 for (i = 0; i < arg->peer_eht_mcs_count; i++) { 2158 eht_mcs = ptr; 2159 eht_mcs->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_HE_RATE_SET, 2160 sizeof(*eht_mcs)); 2161 2162 eht_mcs->rx_mcs_set = cpu_to_le32(arg->peer_eht_rx_mcs_set[i]); 2163 eht_mcs->tx_mcs_set = cpu_to_le32(arg->peer_eht_tx_mcs_set[i]); 2164 ptr += sizeof(*eht_mcs); 2165 } 2166 2167 /* ML partner links tag with 0 length */ 2168 len = 0; 2169 tlv = ptr; 2170 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len); 2171 ptr += TLV_HDR_SIZE; 2172 2173 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2174 "wmi peer assoc vdev id %d assoc id %d peer mac %pM peer_flags %x rate_caps %x peer_caps %x listen_intval %d ht_caps %x max_mpdu %d nss %d phymode %d peer_mpdu_density %d vht_caps %x he cap_info %x he ops %x he cap_info_ext %x he phy %x %x %x peer_bw_rxnss_override %x peer_flags_ext %x eht mac_cap %x %x eht phy_cap %x %x %x\n", 2175 cmd->vdev_id, cmd->peer_associd, arg->peer_mac, 2176 cmd->peer_flags, cmd->peer_rate_caps, cmd->peer_caps, 2177 cmd->peer_listen_intval, cmd->peer_ht_caps, 2178 cmd->peer_max_mpdu, cmd->peer_nss, cmd->peer_phymode, 2179 cmd->peer_mpdu_density, 2180 cmd->peer_vht_caps, cmd->peer_he_cap_info, 2181 cmd->peer_he_ops, cmd->peer_he_cap_info_ext, 2182 cmd->peer_he_cap_phy[0], cmd->peer_he_cap_phy[1], 2183 cmd->peer_he_cap_phy[2], 2184 cmd->peer_bw_rxnss_override, cmd->peer_flags_ext, 2185 cmd->peer_eht_cap_mac[0], cmd->peer_eht_cap_mac[1], 2186 cmd->peer_eht_cap_phy[0], cmd->peer_eht_cap_phy[1], 2187 cmd->peer_eht_cap_phy[2]); 2188 2189 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_ASSOC_CMDID); 2190 if (ret) { 2191 ath12k_warn(ar->ab, 2192 "failed to send WMI_PEER_ASSOC_CMDID\n"); 2193 dev_kfree_skb(skb); 2194 } 2195 2196 return ret; 2197 } 2198 2199 void ath12k_wmi_start_scan_init(struct ath12k *ar, 2200 struct ath12k_wmi_scan_req_arg *arg) 2201 { 2202 /* setup commonly used values */ 2203 arg->scan_req_id = 1; 2204 arg->scan_priority = WMI_SCAN_PRIORITY_LOW; 2205 arg->dwell_time_active = 50; 2206 arg->dwell_time_active_2g = 0; 2207 arg->dwell_time_passive = 150; 2208 arg->dwell_time_active_6g = 40; 2209 arg->dwell_time_passive_6g = 30; 2210 arg->min_rest_time = 50; 2211 arg->max_rest_time = 500; 2212 arg->repeat_probe_time = 0; 2213 arg->probe_spacing_time = 0; 2214 arg->idle_time = 0; 2215 arg->max_scan_time = 20000; 2216 arg->probe_delay = 5; 2217 arg->notify_scan_events = WMI_SCAN_EVENT_STARTED | 2218 WMI_SCAN_EVENT_COMPLETED | 2219 WMI_SCAN_EVENT_BSS_CHANNEL | 2220 WMI_SCAN_EVENT_FOREIGN_CHAN | 2221 WMI_SCAN_EVENT_DEQUEUED; 2222 arg->scan_f_chan_stat_evnt = 1; 2223 arg->num_bssid = 1; 2224 2225 /* fill bssid_list[0] with 0xff, otherwise bssid and RA will be 2226 * ZEROs in probe request 2227 */ 2228 eth_broadcast_addr(arg->bssid_list[0].addr); 2229 } 2230 2231 static void ath12k_wmi_copy_scan_event_cntrl_flags(struct wmi_start_scan_cmd *cmd, 2232 struct ath12k_wmi_scan_req_arg *arg) 2233 { 2234 /* Scan events subscription */ 2235 if (arg->scan_ev_started) 2236 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_STARTED); 2237 if (arg->scan_ev_completed) 2238 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_COMPLETED); 2239 if (arg->scan_ev_bss_chan) 2240 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_BSS_CHANNEL); 2241 if (arg->scan_ev_foreign_chan) 2242 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_FOREIGN_CHAN); 2243 if (arg->scan_ev_dequeued) 2244 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_DEQUEUED); 2245 if (arg->scan_ev_preempted) 2246 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_PREEMPTED); 2247 if (arg->scan_ev_start_failed) 2248 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_START_FAILED); 2249 if (arg->scan_ev_restarted) 2250 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_RESTARTED); 2251 if (arg->scan_ev_foreign_chn_exit) 2252 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT); 2253 if (arg->scan_ev_suspended) 2254 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_SUSPENDED); 2255 if (arg->scan_ev_resumed) 2256 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_RESUMED); 2257 2258 /** Set scan control flags */ 2259 cmd->scan_ctrl_flags = 0; 2260 if (arg->scan_f_passive) 2261 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_PASSIVE); 2262 if (arg->scan_f_strict_passive_pch) 2263 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_STRICT_PASSIVE_ON_PCHN); 2264 if (arg->scan_f_promisc_mode) 2265 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FILTER_PROMISCUOS); 2266 if (arg->scan_f_capture_phy_err) 2267 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_CAPTURE_PHY_ERROR); 2268 if (arg->scan_f_half_rate) 2269 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_HALF_RATE_SUPPORT); 2270 if (arg->scan_f_quarter_rate) 2271 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_QUARTER_RATE_SUPPORT); 2272 if (arg->scan_f_cck_rates) 2273 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_CCK_RATES); 2274 if (arg->scan_f_ofdm_rates) 2275 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_OFDM_RATES); 2276 if (arg->scan_f_chan_stat_evnt) 2277 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_CHAN_STAT_EVENT); 2278 if (arg->scan_f_filter_prb_req) 2279 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FILTER_PROBE_REQ); 2280 if (arg->scan_f_bcast_probe) 2281 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_BCAST_PROBE_REQ); 2282 if (arg->scan_f_offchan_mgmt_tx) 2283 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_OFFCHAN_MGMT_TX); 2284 if (arg->scan_f_offchan_data_tx) 2285 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_OFFCHAN_DATA_TX); 2286 if (arg->scan_f_force_active_dfs_chn) 2287 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_FORCE_ACTIVE_ON_DFS); 2288 if (arg->scan_f_add_tpc_ie_in_probe) 2289 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_TPC_IE_IN_PROBE_REQ); 2290 if (arg->scan_f_add_ds_ie_in_probe) 2291 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_DS_IE_IN_PROBE_REQ); 2292 if (arg->scan_f_add_spoofed_mac_in_probe) 2293 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_SPOOF_MAC_IN_PROBE_REQ); 2294 if (arg->scan_f_add_rand_seq_in_probe) 2295 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_RANDOM_SEQ_NO_IN_PROBE_REQ); 2296 if (arg->scan_f_en_ie_whitelist_in_probe) 2297 cmd->scan_ctrl_flags |= 2298 cpu_to_le32(WMI_SCAN_ENABLE_IE_WHTELIST_IN_PROBE_REQ); 2299 2300 cmd->scan_ctrl_flags |= le32_encode_bits(arg->adaptive_dwell_time_mode, 2301 WMI_SCAN_DWELL_MODE_MASK); 2302 } 2303 2304 int ath12k_wmi_send_scan_start_cmd(struct ath12k *ar, 2305 struct ath12k_wmi_scan_req_arg *arg) 2306 { 2307 struct ath12k_wmi_pdev *wmi = ar->wmi; 2308 struct wmi_start_scan_cmd *cmd; 2309 struct ath12k_wmi_ssid_params *ssid = NULL; 2310 struct ath12k_wmi_mac_addr_params *bssid; 2311 struct sk_buff *skb; 2312 struct wmi_tlv *tlv; 2313 void *ptr; 2314 int i, ret, len; 2315 u32 *tmp_ptr, extraie_len_with_pad = 0; 2316 struct ath12k_wmi_hint_short_ssid_arg *s_ssid = NULL; 2317 struct ath12k_wmi_hint_bssid_arg *hint_bssid = NULL; 2318 2319 len = sizeof(*cmd); 2320 2321 len += TLV_HDR_SIZE; 2322 if (arg->num_chan) 2323 len += arg->num_chan * sizeof(u32); 2324 2325 len += TLV_HDR_SIZE; 2326 if (arg->num_ssids) 2327 len += arg->num_ssids * sizeof(*ssid); 2328 2329 len += TLV_HDR_SIZE; 2330 if (arg->num_bssid) 2331 len += sizeof(*bssid) * arg->num_bssid; 2332 2333 if (arg->num_hint_bssid) 2334 len += TLV_HDR_SIZE + 2335 arg->num_hint_bssid * sizeof(*hint_bssid); 2336 2337 if (arg->num_hint_s_ssid) 2338 len += TLV_HDR_SIZE + 2339 arg->num_hint_s_ssid * sizeof(*s_ssid); 2340 2341 len += TLV_HDR_SIZE; 2342 if (arg->extraie.len) 2343 extraie_len_with_pad = 2344 roundup(arg->extraie.len, sizeof(u32)); 2345 if (extraie_len_with_pad <= (wmi->wmi_ab->max_msg_len[ar->pdev_idx] - len)) { 2346 len += extraie_len_with_pad; 2347 } else { 2348 ath12k_warn(ar->ab, "discard large size %d bytes extraie for scan start\n", 2349 arg->extraie.len); 2350 extraie_len_with_pad = 0; 2351 } 2352 2353 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 2354 if (!skb) 2355 return -ENOMEM; 2356 2357 ptr = skb->data; 2358 2359 cmd = ptr; 2360 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_START_SCAN_CMD, 2361 sizeof(*cmd)); 2362 2363 cmd->scan_id = cpu_to_le32(arg->scan_id); 2364 cmd->scan_req_id = cpu_to_le32(arg->scan_req_id); 2365 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 2366 cmd->scan_priority = cpu_to_le32(arg->scan_priority); 2367 cmd->notify_scan_events = cpu_to_le32(arg->notify_scan_events); 2368 2369 ath12k_wmi_copy_scan_event_cntrl_flags(cmd, arg); 2370 2371 cmd->dwell_time_active = cpu_to_le32(arg->dwell_time_active); 2372 cmd->dwell_time_active_2g = cpu_to_le32(arg->dwell_time_active_2g); 2373 cmd->dwell_time_passive = cpu_to_le32(arg->dwell_time_passive); 2374 cmd->dwell_time_active_6g = cpu_to_le32(arg->dwell_time_active_6g); 2375 cmd->dwell_time_passive_6g = cpu_to_le32(arg->dwell_time_passive_6g); 2376 cmd->min_rest_time = cpu_to_le32(arg->min_rest_time); 2377 cmd->max_rest_time = cpu_to_le32(arg->max_rest_time); 2378 cmd->repeat_probe_time = cpu_to_le32(arg->repeat_probe_time); 2379 cmd->probe_spacing_time = cpu_to_le32(arg->probe_spacing_time); 2380 cmd->idle_time = cpu_to_le32(arg->idle_time); 2381 cmd->max_scan_time = cpu_to_le32(arg->max_scan_time); 2382 cmd->probe_delay = cpu_to_le32(arg->probe_delay); 2383 cmd->burst_duration = cpu_to_le32(arg->burst_duration); 2384 cmd->num_chan = cpu_to_le32(arg->num_chan); 2385 cmd->num_bssid = cpu_to_le32(arg->num_bssid); 2386 cmd->num_ssids = cpu_to_le32(arg->num_ssids); 2387 cmd->ie_len = cpu_to_le32(arg->extraie.len); 2388 cmd->n_probes = cpu_to_le32(arg->n_probes); 2389 2390 ptr += sizeof(*cmd); 2391 2392 len = arg->num_chan * sizeof(u32); 2393 2394 tlv = ptr; 2395 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, len); 2396 ptr += TLV_HDR_SIZE; 2397 tmp_ptr = (u32 *)ptr; 2398 2399 memcpy(tmp_ptr, arg->chan_list, arg->num_chan * 4); 2400 2401 ptr += len; 2402 2403 len = arg->num_ssids * sizeof(*ssid); 2404 tlv = ptr; 2405 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len); 2406 2407 ptr += TLV_HDR_SIZE; 2408 2409 if (arg->num_ssids) { 2410 ssid = ptr; 2411 for (i = 0; i < arg->num_ssids; ++i) { 2412 ssid->ssid_len = cpu_to_le32(arg->ssid[i].ssid_len); 2413 memcpy(ssid->ssid, arg->ssid[i].ssid, 2414 arg->ssid[i].ssid_len); 2415 ssid++; 2416 } 2417 } 2418 2419 ptr += (arg->num_ssids * sizeof(*ssid)); 2420 len = arg->num_bssid * sizeof(*bssid); 2421 tlv = ptr; 2422 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len); 2423 2424 ptr += TLV_HDR_SIZE; 2425 bssid = ptr; 2426 2427 if (arg->num_bssid) { 2428 for (i = 0; i < arg->num_bssid; ++i) { 2429 ether_addr_copy(bssid->addr, 2430 arg->bssid_list[i].addr); 2431 bssid++; 2432 } 2433 } 2434 2435 ptr += arg->num_bssid * sizeof(*bssid); 2436 2437 len = extraie_len_with_pad; 2438 tlv = ptr; 2439 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, len); 2440 ptr += TLV_HDR_SIZE; 2441 2442 if (extraie_len_with_pad) 2443 memcpy(ptr, arg->extraie.ptr, 2444 arg->extraie.len); 2445 2446 ptr += extraie_len_with_pad; 2447 2448 if (arg->num_hint_s_ssid) { 2449 len = arg->num_hint_s_ssid * sizeof(*s_ssid); 2450 tlv = ptr; 2451 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len); 2452 ptr += TLV_HDR_SIZE; 2453 s_ssid = ptr; 2454 for (i = 0; i < arg->num_hint_s_ssid; ++i) { 2455 s_ssid->freq_flags = arg->hint_s_ssid[i].freq_flags; 2456 s_ssid->short_ssid = arg->hint_s_ssid[i].short_ssid; 2457 s_ssid++; 2458 } 2459 ptr += len; 2460 } 2461 2462 if (arg->num_hint_bssid) { 2463 len = arg->num_hint_bssid * sizeof(struct ath12k_wmi_hint_bssid_arg); 2464 tlv = ptr; 2465 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len); 2466 ptr += TLV_HDR_SIZE; 2467 hint_bssid = ptr; 2468 for (i = 0; i < arg->num_hint_bssid; ++i) { 2469 hint_bssid->freq_flags = 2470 arg->hint_bssid[i].freq_flags; 2471 ether_addr_copy(&arg->hint_bssid[i].bssid.addr[0], 2472 &hint_bssid->bssid.addr[0]); 2473 hint_bssid++; 2474 } 2475 } 2476 2477 ret = ath12k_wmi_cmd_send(wmi, skb, 2478 WMI_START_SCAN_CMDID); 2479 if (ret) { 2480 ath12k_warn(ar->ab, "failed to send WMI_START_SCAN_CMDID\n"); 2481 dev_kfree_skb(skb); 2482 } 2483 2484 return ret; 2485 } 2486 2487 int ath12k_wmi_send_scan_stop_cmd(struct ath12k *ar, 2488 struct ath12k_wmi_scan_cancel_arg *arg) 2489 { 2490 struct ath12k_wmi_pdev *wmi = ar->wmi; 2491 struct wmi_stop_scan_cmd *cmd; 2492 struct sk_buff *skb; 2493 int ret; 2494 2495 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 2496 if (!skb) 2497 return -ENOMEM; 2498 2499 cmd = (struct wmi_stop_scan_cmd *)skb->data; 2500 2501 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STOP_SCAN_CMD, 2502 sizeof(*cmd)); 2503 2504 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 2505 cmd->requestor = cpu_to_le32(arg->requester); 2506 cmd->scan_id = cpu_to_le32(arg->scan_id); 2507 cmd->pdev_id = cpu_to_le32(arg->pdev_id); 2508 /* stop the scan with the corresponding scan_id */ 2509 if (arg->req_type == WLAN_SCAN_CANCEL_PDEV_ALL) { 2510 /* Cancelling all scans */ 2511 cmd->req_type = cpu_to_le32(WMI_SCAN_STOP_ALL); 2512 } else if (arg->req_type == WLAN_SCAN_CANCEL_VDEV_ALL) { 2513 /* Cancelling VAP scans */ 2514 cmd->req_type = cpu_to_le32(WMI_SCAN_STOP_VAP_ALL); 2515 } else if (arg->req_type == WLAN_SCAN_CANCEL_SINGLE) { 2516 /* Cancelling specific scan */ 2517 cmd->req_type = WMI_SCAN_STOP_ONE; 2518 } else { 2519 ath12k_warn(ar->ab, "invalid scan cancel req_type %d", 2520 arg->req_type); 2521 dev_kfree_skb(skb); 2522 return -EINVAL; 2523 } 2524 2525 ret = ath12k_wmi_cmd_send(wmi, skb, 2526 WMI_STOP_SCAN_CMDID); 2527 if (ret) { 2528 ath12k_warn(ar->ab, "failed to send WMI_STOP_SCAN_CMDID\n"); 2529 dev_kfree_skb(skb); 2530 } 2531 2532 return ret; 2533 } 2534 2535 int ath12k_wmi_send_scan_chan_list_cmd(struct ath12k *ar, 2536 struct ath12k_wmi_scan_chan_list_arg *arg) 2537 { 2538 struct ath12k_wmi_pdev *wmi = ar->wmi; 2539 struct wmi_scan_chan_list_cmd *cmd; 2540 struct sk_buff *skb; 2541 struct ath12k_wmi_channel_params *chan_info; 2542 struct ath12k_wmi_channel_arg *channel_arg; 2543 struct wmi_tlv *tlv; 2544 void *ptr; 2545 int i, ret, len; 2546 u16 num_send_chans, num_sends = 0, max_chan_limit = 0; 2547 __le32 *reg1, *reg2; 2548 2549 channel_arg = &arg->channel[0]; 2550 while (arg->nallchans) { 2551 len = sizeof(*cmd) + TLV_HDR_SIZE; 2552 max_chan_limit = (wmi->wmi_ab->max_msg_len[ar->pdev_idx] - len) / 2553 sizeof(*chan_info); 2554 2555 num_send_chans = min(arg->nallchans, max_chan_limit); 2556 2557 arg->nallchans -= num_send_chans; 2558 len += sizeof(*chan_info) * num_send_chans; 2559 2560 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 2561 if (!skb) 2562 return -ENOMEM; 2563 2564 cmd = (struct wmi_scan_chan_list_cmd *)skb->data; 2565 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_SCAN_CHAN_LIST_CMD, 2566 sizeof(*cmd)); 2567 cmd->pdev_id = cpu_to_le32(arg->pdev_id); 2568 cmd->num_scan_chans = cpu_to_le32(num_send_chans); 2569 if (num_sends) 2570 cmd->flags |= cpu_to_le32(WMI_APPEND_TO_EXISTING_CHAN_LIST_FLAG); 2571 2572 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2573 "WMI no.of chan = %d len = %d pdev_id = %d num_sends = %d\n", 2574 num_send_chans, len, cmd->pdev_id, num_sends); 2575 2576 ptr = skb->data + sizeof(*cmd); 2577 2578 len = sizeof(*chan_info) * num_send_chans; 2579 tlv = ptr; 2580 tlv->header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ARRAY_STRUCT, 2581 len); 2582 ptr += TLV_HDR_SIZE; 2583 2584 for (i = 0; i < num_send_chans; ++i) { 2585 chan_info = ptr; 2586 memset(chan_info, 0, sizeof(*chan_info)); 2587 len = sizeof(*chan_info); 2588 chan_info->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_CHANNEL, 2589 len); 2590 2591 reg1 = &chan_info->reg_info_1; 2592 reg2 = &chan_info->reg_info_2; 2593 chan_info->mhz = cpu_to_le32(channel_arg->mhz); 2594 chan_info->band_center_freq1 = cpu_to_le32(channel_arg->cfreq1); 2595 chan_info->band_center_freq2 = cpu_to_le32(channel_arg->cfreq2); 2596 2597 if (channel_arg->is_chan_passive) 2598 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_PASSIVE); 2599 if (channel_arg->allow_he) 2600 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HE); 2601 else if (channel_arg->allow_vht) 2602 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_VHT); 2603 else if (channel_arg->allow_ht) 2604 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HT); 2605 if (channel_arg->half_rate) 2606 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_HALF_RATE); 2607 if (channel_arg->quarter_rate) 2608 chan_info->info |= 2609 cpu_to_le32(WMI_CHAN_INFO_QUARTER_RATE); 2610 2611 if (channel_arg->psc_channel) 2612 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_PSC); 2613 2614 if (channel_arg->dfs_set) 2615 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_DFS); 2616 2617 chan_info->info |= le32_encode_bits(channel_arg->phy_mode, 2618 WMI_CHAN_INFO_MODE); 2619 *reg1 |= le32_encode_bits(channel_arg->minpower, 2620 WMI_CHAN_REG_INFO1_MIN_PWR); 2621 *reg1 |= le32_encode_bits(channel_arg->maxpower, 2622 WMI_CHAN_REG_INFO1_MAX_PWR); 2623 *reg1 |= le32_encode_bits(channel_arg->maxregpower, 2624 WMI_CHAN_REG_INFO1_MAX_REG_PWR); 2625 *reg1 |= le32_encode_bits(channel_arg->reg_class_id, 2626 WMI_CHAN_REG_INFO1_REG_CLS); 2627 *reg2 |= le32_encode_bits(channel_arg->antennamax, 2628 WMI_CHAN_REG_INFO2_ANT_MAX); 2629 2630 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2631 "WMI chan scan list chan[%d] = %u, chan_info->info %8x\n", 2632 i, chan_info->mhz, chan_info->info); 2633 2634 ptr += sizeof(*chan_info); 2635 2636 channel_arg++; 2637 } 2638 2639 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_SCAN_CHAN_LIST_CMDID); 2640 if (ret) { 2641 ath12k_warn(ar->ab, "failed to send WMI_SCAN_CHAN_LIST cmd\n"); 2642 dev_kfree_skb(skb); 2643 return ret; 2644 } 2645 2646 num_sends++; 2647 } 2648 2649 return 0; 2650 } 2651 2652 int ath12k_wmi_send_wmm_update_cmd(struct ath12k *ar, u32 vdev_id, 2653 struct wmi_wmm_params_all_arg *param) 2654 { 2655 struct ath12k_wmi_pdev *wmi = ar->wmi; 2656 struct wmi_vdev_set_wmm_params_cmd *cmd; 2657 struct wmi_wmm_params *wmm_param; 2658 struct wmi_wmm_params_arg *wmi_wmm_arg; 2659 struct sk_buff *skb; 2660 int ret, ac; 2661 2662 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 2663 if (!skb) 2664 return -ENOMEM; 2665 2666 cmd = (struct wmi_vdev_set_wmm_params_cmd *)skb->data; 2667 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SET_WMM_PARAMS_CMD, 2668 sizeof(*cmd)); 2669 2670 cmd->vdev_id = cpu_to_le32(vdev_id); 2671 cmd->wmm_param_type = 0; 2672 2673 for (ac = 0; ac < WME_NUM_AC; ac++) { 2674 switch (ac) { 2675 case WME_AC_BE: 2676 wmi_wmm_arg = ¶m->ac_be; 2677 break; 2678 case WME_AC_BK: 2679 wmi_wmm_arg = ¶m->ac_bk; 2680 break; 2681 case WME_AC_VI: 2682 wmi_wmm_arg = ¶m->ac_vi; 2683 break; 2684 case WME_AC_VO: 2685 wmi_wmm_arg = ¶m->ac_vo; 2686 break; 2687 } 2688 2689 wmm_param = (struct wmi_wmm_params *)&cmd->wmm_params[ac]; 2690 wmm_param->tlv_header = 2691 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SET_WMM_PARAMS_CMD, 2692 sizeof(*wmm_param)); 2693 2694 wmm_param->aifs = cpu_to_le32(wmi_wmm_arg->aifs); 2695 wmm_param->cwmin = cpu_to_le32(wmi_wmm_arg->cwmin); 2696 wmm_param->cwmax = cpu_to_le32(wmi_wmm_arg->cwmax); 2697 wmm_param->txoplimit = cpu_to_le32(wmi_wmm_arg->txop); 2698 wmm_param->acm = cpu_to_le32(wmi_wmm_arg->acm); 2699 wmm_param->no_ack = cpu_to_le32(wmi_wmm_arg->no_ack); 2700 2701 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2702 "wmi wmm set ac %d aifs %d cwmin %d cwmax %d txop %d acm %d no_ack %d\n", 2703 ac, wmm_param->aifs, wmm_param->cwmin, 2704 wmm_param->cwmax, wmm_param->txoplimit, 2705 wmm_param->acm, wmm_param->no_ack); 2706 } 2707 ret = ath12k_wmi_cmd_send(wmi, skb, 2708 WMI_VDEV_SET_WMM_PARAMS_CMDID); 2709 if (ret) { 2710 ath12k_warn(ar->ab, 2711 "failed to send WMI_VDEV_SET_WMM_PARAMS_CMDID"); 2712 dev_kfree_skb(skb); 2713 } 2714 2715 return ret; 2716 } 2717 2718 int ath12k_wmi_send_dfs_phyerr_offload_enable_cmd(struct ath12k *ar, 2719 u32 pdev_id) 2720 { 2721 struct ath12k_wmi_pdev *wmi = ar->wmi; 2722 struct wmi_dfs_phyerr_offload_cmd *cmd; 2723 struct sk_buff *skb; 2724 int ret; 2725 2726 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 2727 if (!skb) 2728 return -ENOMEM; 2729 2730 cmd = (struct wmi_dfs_phyerr_offload_cmd *)skb->data; 2731 cmd->tlv_header = 2732 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMD, 2733 sizeof(*cmd)); 2734 2735 cmd->pdev_id = cpu_to_le32(pdev_id); 2736 2737 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2738 "WMI dfs phy err offload enable pdev id %d\n", pdev_id); 2739 2740 ret = ath12k_wmi_cmd_send(wmi, skb, 2741 WMI_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMDID); 2742 if (ret) { 2743 ath12k_warn(ar->ab, 2744 "failed to send WMI_PDEV_DFS_PHYERR_OFFLOAD_ENABLE cmd\n"); 2745 dev_kfree_skb(skb); 2746 } 2747 2748 return ret; 2749 } 2750 2751 int ath12k_wmi_set_bios_cmd(struct ath12k_base *ab, u32 param_id, 2752 const u8 *buf, size_t buf_len) 2753 { 2754 struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab; 2755 struct wmi_pdev_set_bios_interface_cmd *cmd; 2756 struct wmi_tlv *tlv; 2757 struct sk_buff *skb; 2758 u8 *ptr; 2759 u32 len, len_aligned; 2760 int ret; 2761 2762 len_aligned = roundup(buf_len, sizeof(u32)); 2763 len = sizeof(*cmd) + TLV_HDR_SIZE + len_aligned; 2764 2765 skb = ath12k_wmi_alloc_skb(wmi_ab, len); 2766 if (!skb) 2767 return -ENOMEM; 2768 2769 cmd = (struct wmi_pdev_set_bios_interface_cmd *)skb->data; 2770 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_BIOS_INTERFACE_CMD, 2771 sizeof(*cmd)); 2772 cmd->pdev_id = cpu_to_le32(WMI_PDEV_ID_SOC); 2773 cmd->param_type_id = cpu_to_le32(param_id); 2774 cmd->length = cpu_to_le32(buf_len); 2775 2776 ptr = skb->data + sizeof(*cmd); 2777 tlv = (struct wmi_tlv *)ptr; 2778 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, len_aligned); 2779 ptr += TLV_HDR_SIZE; 2780 memcpy(ptr, buf, buf_len); 2781 2782 ret = ath12k_wmi_cmd_send(&wmi_ab->wmi[0], 2783 skb, 2784 WMI_PDEV_SET_BIOS_INTERFACE_CMDID); 2785 if (ret) { 2786 ath12k_warn(ab, 2787 "failed to send WMI_PDEV_SET_BIOS_INTERFACE_CMDID parameter id %d: %d\n", 2788 param_id, ret); 2789 dev_kfree_skb(skb); 2790 } 2791 2792 return 0; 2793 } 2794 2795 int ath12k_wmi_set_bios_sar_cmd(struct ath12k_base *ab, const u8 *psar_table) 2796 { 2797 struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab; 2798 struct wmi_pdev_set_bios_sar_table_cmd *cmd; 2799 struct wmi_tlv *tlv; 2800 struct sk_buff *skb; 2801 int ret; 2802 u8 *buf_ptr; 2803 u32 len, sar_table_len_aligned, sar_dbs_backoff_len_aligned; 2804 const u8 *psar_value = psar_table + ATH12K_ACPI_POWER_LIMIT_DATA_OFFSET; 2805 const u8 *pdbs_value = psar_table + ATH12K_ACPI_DBS_BACKOFF_DATA_OFFSET; 2806 2807 sar_table_len_aligned = roundup(ATH12K_ACPI_BIOS_SAR_TABLE_LEN, sizeof(u32)); 2808 sar_dbs_backoff_len_aligned = roundup(ATH12K_ACPI_BIOS_SAR_DBS_BACKOFF_LEN, 2809 sizeof(u32)); 2810 len = sizeof(*cmd) + TLV_HDR_SIZE + sar_table_len_aligned + 2811 TLV_HDR_SIZE + sar_dbs_backoff_len_aligned; 2812 2813 skb = ath12k_wmi_alloc_skb(wmi_ab, len); 2814 if (!skb) 2815 return -ENOMEM; 2816 2817 cmd = (struct wmi_pdev_set_bios_sar_table_cmd *)skb->data; 2818 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_BIOS_SAR_TABLE_CMD, 2819 sizeof(*cmd)); 2820 cmd->pdev_id = cpu_to_le32(WMI_PDEV_ID_SOC); 2821 cmd->sar_len = cpu_to_le32(ATH12K_ACPI_BIOS_SAR_TABLE_LEN); 2822 cmd->dbs_backoff_len = cpu_to_le32(ATH12K_ACPI_BIOS_SAR_DBS_BACKOFF_LEN); 2823 2824 buf_ptr = skb->data + sizeof(*cmd); 2825 tlv = (struct wmi_tlv *)buf_ptr; 2826 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, 2827 sar_table_len_aligned); 2828 buf_ptr += TLV_HDR_SIZE; 2829 memcpy(buf_ptr, psar_value, ATH12K_ACPI_BIOS_SAR_TABLE_LEN); 2830 2831 buf_ptr += sar_table_len_aligned; 2832 tlv = (struct wmi_tlv *)buf_ptr; 2833 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, 2834 sar_dbs_backoff_len_aligned); 2835 buf_ptr += TLV_HDR_SIZE; 2836 memcpy(buf_ptr, pdbs_value, ATH12K_ACPI_BIOS_SAR_DBS_BACKOFF_LEN); 2837 2838 ret = ath12k_wmi_cmd_send(&wmi_ab->wmi[0], 2839 skb, 2840 WMI_PDEV_SET_BIOS_SAR_TABLE_CMDID); 2841 if (ret) { 2842 ath12k_warn(ab, 2843 "failed to send WMI_PDEV_SET_BIOS_INTERFACE_CMDID %d\n", 2844 ret); 2845 dev_kfree_skb(skb); 2846 } 2847 2848 return ret; 2849 } 2850 2851 int ath12k_wmi_set_bios_geo_cmd(struct ath12k_base *ab, const u8 *pgeo_table) 2852 { 2853 struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab; 2854 struct wmi_pdev_set_bios_geo_table_cmd *cmd; 2855 struct wmi_tlv *tlv; 2856 struct sk_buff *skb; 2857 int ret; 2858 u8 *buf_ptr; 2859 u32 len, sar_geo_len_aligned; 2860 const u8 *pgeo_value = pgeo_table + ATH12K_ACPI_GEO_OFFSET_DATA_OFFSET; 2861 2862 sar_geo_len_aligned = roundup(ATH12K_ACPI_BIOS_SAR_GEO_OFFSET_LEN, sizeof(u32)); 2863 len = sizeof(*cmd) + TLV_HDR_SIZE + sar_geo_len_aligned; 2864 2865 skb = ath12k_wmi_alloc_skb(wmi_ab, len); 2866 if (!skb) 2867 return -ENOMEM; 2868 2869 cmd = (struct wmi_pdev_set_bios_geo_table_cmd *)skb->data; 2870 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_BIOS_GEO_TABLE_CMD, 2871 sizeof(*cmd)); 2872 cmd->pdev_id = cpu_to_le32(WMI_PDEV_ID_SOC); 2873 cmd->geo_len = cpu_to_le32(ATH12K_ACPI_BIOS_SAR_GEO_OFFSET_LEN); 2874 2875 buf_ptr = skb->data + sizeof(*cmd); 2876 tlv = (struct wmi_tlv *)buf_ptr; 2877 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, sar_geo_len_aligned); 2878 buf_ptr += TLV_HDR_SIZE; 2879 memcpy(buf_ptr, pgeo_value, ATH12K_ACPI_BIOS_SAR_GEO_OFFSET_LEN); 2880 2881 ret = ath12k_wmi_cmd_send(&wmi_ab->wmi[0], 2882 skb, 2883 WMI_PDEV_SET_BIOS_GEO_TABLE_CMDID); 2884 if (ret) { 2885 ath12k_warn(ab, 2886 "failed to send WMI_PDEV_SET_BIOS_GEO_TABLE_CMDID %d\n", 2887 ret); 2888 dev_kfree_skb(skb); 2889 } 2890 2891 return ret; 2892 } 2893 2894 int ath12k_wmi_delba_send(struct ath12k *ar, u32 vdev_id, const u8 *mac, 2895 u32 tid, u32 initiator, u32 reason) 2896 { 2897 struct ath12k_wmi_pdev *wmi = ar->wmi; 2898 struct wmi_delba_send_cmd *cmd; 2899 struct sk_buff *skb; 2900 int ret; 2901 2902 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 2903 if (!skb) 2904 return -ENOMEM; 2905 2906 cmd = (struct wmi_delba_send_cmd *)skb->data; 2907 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_DELBA_SEND_CMD, 2908 sizeof(*cmd)); 2909 cmd->vdev_id = cpu_to_le32(vdev_id); 2910 ether_addr_copy(cmd->peer_macaddr.addr, mac); 2911 cmd->tid = cpu_to_le32(tid); 2912 cmd->initiator = cpu_to_le32(initiator); 2913 cmd->reasoncode = cpu_to_le32(reason); 2914 2915 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2916 "wmi delba send vdev_id 0x%X mac_addr %pM tid %u initiator %u reason %u\n", 2917 vdev_id, mac, tid, initiator, reason); 2918 2919 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_DELBA_SEND_CMDID); 2920 2921 if (ret) { 2922 ath12k_warn(ar->ab, 2923 "failed to send WMI_DELBA_SEND_CMDID cmd\n"); 2924 dev_kfree_skb(skb); 2925 } 2926 2927 return ret; 2928 } 2929 2930 int ath12k_wmi_addba_set_resp(struct ath12k *ar, u32 vdev_id, const u8 *mac, 2931 u32 tid, u32 status) 2932 { 2933 struct ath12k_wmi_pdev *wmi = ar->wmi; 2934 struct wmi_addba_setresponse_cmd *cmd; 2935 struct sk_buff *skb; 2936 int ret; 2937 2938 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 2939 if (!skb) 2940 return -ENOMEM; 2941 2942 cmd = (struct wmi_addba_setresponse_cmd *)skb->data; 2943 cmd->tlv_header = 2944 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ADDBA_SETRESPONSE_CMD, 2945 sizeof(*cmd)); 2946 cmd->vdev_id = cpu_to_le32(vdev_id); 2947 ether_addr_copy(cmd->peer_macaddr.addr, mac); 2948 cmd->tid = cpu_to_le32(tid); 2949 cmd->statuscode = cpu_to_le32(status); 2950 2951 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2952 "wmi addba set resp vdev_id 0x%X mac_addr %pM tid %u status %u\n", 2953 vdev_id, mac, tid, status); 2954 2955 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_ADDBA_SET_RESP_CMDID); 2956 2957 if (ret) { 2958 ath12k_warn(ar->ab, 2959 "failed to send WMI_ADDBA_SET_RESP_CMDID cmd\n"); 2960 dev_kfree_skb(skb); 2961 } 2962 2963 return ret; 2964 } 2965 2966 int ath12k_wmi_addba_send(struct ath12k *ar, u32 vdev_id, const u8 *mac, 2967 u32 tid, u32 buf_size) 2968 { 2969 struct ath12k_wmi_pdev *wmi = ar->wmi; 2970 struct wmi_addba_send_cmd *cmd; 2971 struct sk_buff *skb; 2972 int ret; 2973 2974 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 2975 if (!skb) 2976 return -ENOMEM; 2977 2978 cmd = (struct wmi_addba_send_cmd *)skb->data; 2979 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ADDBA_SEND_CMD, 2980 sizeof(*cmd)); 2981 cmd->vdev_id = cpu_to_le32(vdev_id); 2982 ether_addr_copy(cmd->peer_macaddr.addr, mac); 2983 cmd->tid = cpu_to_le32(tid); 2984 cmd->buffersize = cpu_to_le32(buf_size); 2985 2986 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2987 "wmi addba send vdev_id 0x%X mac_addr %pM tid %u bufsize %u\n", 2988 vdev_id, mac, tid, buf_size); 2989 2990 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_ADDBA_SEND_CMDID); 2991 2992 if (ret) { 2993 ath12k_warn(ar->ab, 2994 "failed to send WMI_ADDBA_SEND_CMDID cmd\n"); 2995 dev_kfree_skb(skb); 2996 } 2997 2998 return ret; 2999 } 3000 3001 int ath12k_wmi_addba_clear_resp(struct ath12k *ar, u32 vdev_id, const u8 *mac) 3002 { 3003 struct ath12k_wmi_pdev *wmi = ar->wmi; 3004 struct wmi_addba_clear_resp_cmd *cmd; 3005 struct sk_buff *skb; 3006 int ret; 3007 3008 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 3009 if (!skb) 3010 return -ENOMEM; 3011 3012 cmd = (struct wmi_addba_clear_resp_cmd *)skb->data; 3013 cmd->tlv_header = 3014 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ADDBA_CLEAR_RESP_CMD, 3015 sizeof(*cmd)); 3016 cmd->vdev_id = cpu_to_le32(vdev_id); 3017 ether_addr_copy(cmd->peer_macaddr.addr, mac); 3018 3019 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3020 "wmi addba clear resp vdev_id 0x%X mac_addr %pM\n", 3021 vdev_id, mac); 3022 3023 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_ADDBA_CLEAR_RESP_CMDID); 3024 3025 if (ret) { 3026 ath12k_warn(ar->ab, 3027 "failed to send WMI_ADDBA_CLEAR_RESP_CMDID cmd\n"); 3028 dev_kfree_skb(skb); 3029 } 3030 3031 return ret; 3032 } 3033 3034 int ath12k_wmi_send_init_country_cmd(struct ath12k *ar, 3035 struct ath12k_wmi_init_country_arg *arg) 3036 { 3037 struct ath12k_wmi_pdev *wmi = ar->wmi; 3038 struct wmi_init_country_cmd *cmd; 3039 struct sk_buff *skb; 3040 int ret; 3041 3042 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 3043 if (!skb) 3044 return -ENOMEM; 3045 3046 cmd = (struct wmi_init_country_cmd *)skb->data; 3047 cmd->tlv_header = 3048 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_SET_INIT_COUNTRY_CMD, 3049 sizeof(*cmd)); 3050 3051 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id); 3052 3053 switch (arg->flags) { 3054 case ALPHA_IS_SET: 3055 cmd->init_cc_type = WMI_COUNTRY_INFO_TYPE_ALPHA; 3056 memcpy(&cmd->cc_info.alpha2, arg->cc_info.alpha2, 3); 3057 break; 3058 case CC_IS_SET: 3059 cmd->init_cc_type = cpu_to_le32(WMI_COUNTRY_INFO_TYPE_COUNTRY_CODE); 3060 cmd->cc_info.country_code = 3061 cpu_to_le32(arg->cc_info.country_code); 3062 break; 3063 case REGDMN_IS_SET: 3064 cmd->init_cc_type = cpu_to_le32(WMI_COUNTRY_INFO_TYPE_REGDOMAIN); 3065 cmd->cc_info.regdom_id = cpu_to_le32(arg->cc_info.regdom_id); 3066 break; 3067 default: 3068 ret = -EINVAL; 3069 goto out; 3070 } 3071 3072 ret = ath12k_wmi_cmd_send(wmi, skb, 3073 WMI_SET_INIT_COUNTRY_CMDID); 3074 3075 out: 3076 if (ret) { 3077 ath12k_warn(ar->ab, 3078 "failed to send WMI_SET_INIT_COUNTRY CMD :%d\n", 3079 ret); 3080 dev_kfree_skb(skb); 3081 } 3082 3083 return ret; 3084 } 3085 3086 int 3087 ath12k_wmi_send_twt_enable_cmd(struct ath12k *ar, u32 pdev_id) 3088 { 3089 struct ath12k_wmi_pdev *wmi = ar->wmi; 3090 struct ath12k_base *ab = wmi->wmi_ab->ab; 3091 struct wmi_twt_enable_params_cmd *cmd; 3092 struct sk_buff *skb; 3093 int ret, len; 3094 3095 len = sizeof(*cmd); 3096 3097 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 3098 if (!skb) 3099 return -ENOMEM; 3100 3101 cmd = (struct wmi_twt_enable_params_cmd *)skb->data; 3102 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_TWT_ENABLE_CMD, 3103 len); 3104 cmd->pdev_id = cpu_to_le32(pdev_id); 3105 cmd->sta_cong_timer_ms = cpu_to_le32(ATH12K_TWT_DEF_STA_CONG_TIMER_MS); 3106 cmd->default_slot_size = cpu_to_le32(ATH12K_TWT_DEF_DEFAULT_SLOT_SIZE); 3107 cmd->congestion_thresh_setup = 3108 cpu_to_le32(ATH12K_TWT_DEF_CONGESTION_THRESH_SETUP); 3109 cmd->congestion_thresh_teardown = 3110 cpu_to_le32(ATH12K_TWT_DEF_CONGESTION_THRESH_TEARDOWN); 3111 cmd->congestion_thresh_critical = 3112 cpu_to_le32(ATH12K_TWT_DEF_CONGESTION_THRESH_CRITICAL); 3113 cmd->interference_thresh_teardown = 3114 cpu_to_le32(ATH12K_TWT_DEF_INTERFERENCE_THRESH_TEARDOWN); 3115 cmd->interference_thresh_setup = 3116 cpu_to_le32(ATH12K_TWT_DEF_INTERFERENCE_THRESH_SETUP); 3117 cmd->min_no_sta_setup = cpu_to_le32(ATH12K_TWT_DEF_MIN_NO_STA_SETUP); 3118 cmd->min_no_sta_teardown = cpu_to_le32(ATH12K_TWT_DEF_MIN_NO_STA_TEARDOWN); 3119 cmd->no_of_bcast_mcast_slots = 3120 cpu_to_le32(ATH12K_TWT_DEF_NO_OF_BCAST_MCAST_SLOTS); 3121 cmd->min_no_twt_slots = cpu_to_le32(ATH12K_TWT_DEF_MIN_NO_TWT_SLOTS); 3122 cmd->max_no_sta_twt = cpu_to_le32(ATH12K_TWT_DEF_MAX_NO_STA_TWT); 3123 cmd->mode_check_interval = cpu_to_le32(ATH12K_TWT_DEF_MODE_CHECK_INTERVAL); 3124 cmd->add_sta_slot_interval = cpu_to_le32(ATH12K_TWT_DEF_ADD_STA_SLOT_INTERVAL); 3125 cmd->remove_sta_slot_interval = 3126 cpu_to_le32(ATH12K_TWT_DEF_REMOVE_STA_SLOT_INTERVAL); 3127 /* TODO add MBSSID support */ 3128 cmd->mbss_support = 0; 3129 3130 ret = ath12k_wmi_cmd_send(wmi, skb, 3131 WMI_TWT_ENABLE_CMDID); 3132 if (ret) { 3133 ath12k_warn(ab, "Failed to send WMI_TWT_ENABLE_CMDID"); 3134 dev_kfree_skb(skb); 3135 } 3136 return ret; 3137 } 3138 3139 int 3140 ath12k_wmi_send_twt_disable_cmd(struct ath12k *ar, u32 pdev_id) 3141 { 3142 struct ath12k_wmi_pdev *wmi = ar->wmi; 3143 struct ath12k_base *ab = wmi->wmi_ab->ab; 3144 struct wmi_twt_disable_params_cmd *cmd; 3145 struct sk_buff *skb; 3146 int ret, len; 3147 3148 len = sizeof(*cmd); 3149 3150 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 3151 if (!skb) 3152 return -ENOMEM; 3153 3154 cmd = (struct wmi_twt_disable_params_cmd *)skb->data; 3155 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_TWT_DISABLE_CMD, 3156 len); 3157 cmd->pdev_id = cpu_to_le32(pdev_id); 3158 3159 ret = ath12k_wmi_cmd_send(wmi, skb, 3160 WMI_TWT_DISABLE_CMDID); 3161 if (ret) { 3162 ath12k_warn(ab, "Failed to send WMI_TWT_DISABLE_CMDID"); 3163 dev_kfree_skb(skb); 3164 } 3165 return ret; 3166 } 3167 3168 int 3169 ath12k_wmi_send_obss_spr_cmd(struct ath12k *ar, u32 vdev_id, 3170 struct ieee80211_he_obss_pd *he_obss_pd) 3171 { 3172 struct ath12k_wmi_pdev *wmi = ar->wmi; 3173 struct ath12k_base *ab = wmi->wmi_ab->ab; 3174 struct wmi_obss_spatial_reuse_params_cmd *cmd; 3175 struct sk_buff *skb; 3176 int ret, len; 3177 3178 len = sizeof(*cmd); 3179 3180 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 3181 if (!skb) 3182 return -ENOMEM; 3183 3184 cmd = (struct wmi_obss_spatial_reuse_params_cmd *)skb->data; 3185 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_OBSS_SPATIAL_REUSE_SET_CMD, 3186 len); 3187 cmd->vdev_id = cpu_to_le32(vdev_id); 3188 cmd->enable = cpu_to_le32(he_obss_pd->enable); 3189 cmd->obss_min = a_cpu_to_sle32(he_obss_pd->min_offset); 3190 cmd->obss_max = a_cpu_to_sle32(he_obss_pd->max_offset); 3191 3192 ret = ath12k_wmi_cmd_send(wmi, skb, 3193 WMI_PDEV_OBSS_PD_SPATIAL_REUSE_CMDID); 3194 if (ret) { 3195 ath12k_warn(ab, 3196 "Failed to send WMI_PDEV_OBSS_PD_SPATIAL_REUSE_CMDID"); 3197 dev_kfree_skb(skb); 3198 } 3199 return ret; 3200 } 3201 3202 int ath12k_wmi_obss_color_cfg_cmd(struct ath12k *ar, u32 vdev_id, 3203 u8 bss_color, u32 period, 3204 bool enable) 3205 { 3206 struct ath12k_wmi_pdev *wmi = ar->wmi; 3207 struct ath12k_base *ab = wmi->wmi_ab->ab; 3208 struct wmi_obss_color_collision_cfg_params_cmd *cmd; 3209 struct sk_buff *skb; 3210 int ret, len; 3211 3212 len = sizeof(*cmd); 3213 3214 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 3215 if (!skb) 3216 return -ENOMEM; 3217 3218 cmd = (struct wmi_obss_color_collision_cfg_params_cmd *)skb->data; 3219 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_OBSS_COLOR_COLLISION_DET_CONFIG, 3220 len); 3221 cmd->vdev_id = cpu_to_le32(vdev_id); 3222 cmd->evt_type = enable ? cpu_to_le32(ATH12K_OBSS_COLOR_COLLISION_DETECTION) : 3223 cpu_to_le32(ATH12K_OBSS_COLOR_COLLISION_DETECTION_DISABLE); 3224 cmd->current_bss_color = cpu_to_le32(bss_color); 3225 cmd->detection_period_ms = cpu_to_le32(period); 3226 cmd->scan_period_ms = cpu_to_le32(ATH12K_BSS_COLOR_COLLISION_SCAN_PERIOD_MS); 3227 cmd->free_slot_expiry_time_ms = 0; 3228 cmd->flags = 0; 3229 3230 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3231 "wmi_send_obss_color_collision_cfg id %d type %d bss_color %d detect_period %d scan_period %d\n", 3232 cmd->vdev_id, cmd->evt_type, cmd->current_bss_color, 3233 cmd->detection_period_ms, cmd->scan_period_ms); 3234 3235 ret = ath12k_wmi_cmd_send(wmi, skb, 3236 WMI_OBSS_COLOR_COLLISION_DET_CONFIG_CMDID); 3237 if (ret) { 3238 ath12k_warn(ab, "Failed to send WMI_OBSS_COLOR_COLLISION_DET_CONFIG_CMDID"); 3239 dev_kfree_skb(skb); 3240 } 3241 return ret; 3242 } 3243 3244 int ath12k_wmi_send_bss_color_change_enable_cmd(struct ath12k *ar, u32 vdev_id, 3245 bool enable) 3246 { 3247 struct ath12k_wmi_pdev *wmi = ar->wmi; 3248 struct ath12k_base *ab = wmi->wmi_ab->ab; 3249 struct wmi_bss_color_change_enable_params_cmd *cmd; 3250 struct sk_buff *skb; 3251 int ret, len; 3252 3253 len = sizeof(*cmd); 3254 3255 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 3256 if (!skb) 3257 return -ENOMEM; 3258 3259 cmd = (struct wmi_bss_color_change_enable_params_cmd *)skb->data; 3260 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BSS_COLOR_CHANGE_ENABLE, 3261 len); 3262 cmd->vdev_id = cpu_to_le32(vdev_id); 3263 cmd->enable = enable ? cpu_to_le32(1) : 0; 3264 3265 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3266 "wmi_send_bss_color_change_enable id %d enable %d\n", 3267 cmd->vdev_id, cmd->enable); 3268 3269 ret = ath12k_wmi_cmd_send(wmi, skb, 3270 WMI_BSS_COLOR_CHANGE_ENABLE_CMDID); 3271 if (ret) { 3272 ath12k_warn(ab, "Failed to send WMI_BSS_COLOR_CHANGE_ENABLE_CMDID"); 3273 dev_kfree_skb(skb); 3274 } 3275 return ret; 3276 } 3277 3278 int ath12k_wmi_fils_discovery_tmpl(struct ath12k *ar, u32 vdev_id, 3279 struct sk_buff *tmpl) 3280 { 3281 struct wmi_tlv *tlv; 3282 struct sk_buff *skb; 3283 void *ptr; 3284 int ret, len; 3285 size_t aligned_len; 3286 struct wmi_fils_discovery_tmpl_cmd *cmd; 3287 3288 aligned_len = roundup(tmpl->len, 4); 3289 len = sizeof(*cmd) + TLV_HDR_SIZE + aligned_len; 3290 3291 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3292 "WMI vdev %i set FILS discovery template\n", vdev_id); 3293 3294 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 3295 if (!skb) 3296 return -ENOMEM; 3297 3298 cmd = (struct wmi_fils_discovery_tmpl_cmd *)skb->data; 3299 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_FILS_DISCOVERY_TMPL_CMD, 3300 sizeof(*cmd)); 3301 cmd->vdev_id = cpu_to_le32(vdev_id); 3302 cmd->buf_len = cpu_to_le32(tmpl->len); 3303 ptr = skb->data + sizeof(*cmd); 3304 3305 tlv = ptr; 3306 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, aligned_len); 3307 memcpy(tlv->value, tmpl->data, tmpl->len); 3308 3309 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_FILS_DISCOVERY_TMPL_CMDID); 3310 if (ret) { 3311 ath12k_warn(ar->ab, 3312 "WMI vdev %i failed to send FILS discovery template command\n", 3313 vdev_id); 3314 dev_kfree_skb(skb); 3315 } 3316 return ret; 3317 } 3318 3319 int ath12k_wmi_probe_resp_tmpl(struct ath12k *ar, u32 vdev_id, 3320 struct sk_buff *tmpl) 3321 { 3322 struct wmi_probe_tmpl_cmd *cmd; 3323 struct ath12k_wmi_bcn_prb_info_params *probe_info; 3324 struct wmi_tlv *tlv; 3325 struct sk_buff *skb; 3326 void *ptr; 3327 int ret, len; 3328 size_t aligned_len = roundup(tmpl->len, 4); 3329 3330 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3331 "WMI vdev %i set probe response template\n", vdev_id); 3332 3333 len = sizeof(*cmd) + sizeof(*probe_info) + TLV_HDR_SIZE + aligned_len; 3334 3335 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 3336 if (!skb) 3337 return -ENOMEM; 3338 3339 cmd = (struct wmi_probe_tmpl_cmd *)skb->data; 3340 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PRB_TMPL_CMD, 3341 sizeof(*cmd)); 3342 cmd->vdev_id = cpu_to_le32(vdev_id); 3343 cmd->buf_len = cpu_to_le32(tmpl->len); 3344 3345 ptr = skb->data + sizeof(*cmd); 3346 3347 probe_info = ptr; 3348 len = sizeof(*probe_info); 3349 probe_info->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_PRB_INFO, 3350 len); 3351 probe_info->caps = 0; 3352 probe_info->erp = 0; 3353 3354 ptr += sizeof(*probe_info); 3355 3356 tlv = ptr; 3357 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, aligned_len); 3358 memcpy(tlv->value, tmpl->data, tmpl->len); 3359 3360 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_PRB_TMPL_CMDID); 3361 if (ret) { 3362 ath12k_warn(ar->ab, 3363 "WMI vdev %i failed to send probe response template command\n", 3364 vdev_id); 3365 dev_kfree_skb(skb); 3366 } 3367 return ret; 3368 } 3369 3370 int ath12k_wmi_fils_discovery(struct ath12k *ar, u32 vdev_id, u32 interval, 3371 bool unsol_bcast_probe_resp_enabled) 3372 { 3373 struct sk_buff *skb; 3374 int ret, len; 3375 struct wmi_fils_discovery_cmd *cmd; 3376 3377 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3378 "WMI vdev %i set %s interval to %u TU\n", 3379 vdev_id, unsol_bcast_probe_resp_enabled ? 3380 "unsolicited broadcast probe response" : "FILS discovery", 3381 interval); 3382 3383 len = sizeof(*cmd); 3384 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 3385 if (!skb) 3386 return -ENOMEM; 3387 3388 cmd = (struct wmi_fils_discovery_cmd *)skb->data; 3389 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ENABLE_FILS_CMD, 3390 len); 3391 cmd->vdev_id = cpu_to_le32(vdev_id); 3392 cmd->interval = cpu_to_le32(interval); 3393 cmd->config = cpu_to_le32(unsol_bcast_probe_resp_enabled); 3394 3395 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_ENABLE_FILS_CMDID); 3396 if (ret) { 3397 ath12k_warn(ar->ab, 3398 "WMI vdev %i failed to send FILS discovery enable/disable command\n", 3399 vdev_id); 3400 dev_kfree_skb(skb); 3401 } 3402 return ret; 3403 } 3404 3405 static void 3406 ath12k_fill_band_to_mac_param(struct ath12k_base *soc, 3407 struct ath12k_wmi_pdev_band_arg *arg) 3408 { 3409 u8 i; 3410 struct ath12k_wmi_hal_reg_capabilities_ext_arg *hal_reg_cap; 3411 struct ath12k_pdev *pdev; 3412 3413 for (i = 0; i < soc->num_radios; i++) { 3414 pdev = &soc->pdevs[i]; 3415 hal_reg_cap = &soc->hal_reg_cap[i]; 3416 arg[i].pdev_id = pdev->pdev_id; 3417 3418 switch (pdev->cap.supported_bands) { 3419 case WMI_HOST_WLAN_2G_5G_CAP: 3420 arg[i].start_freq = hal_reg_cap->low_2ghz_chan; 3421 arg[i].end_freq = hal_reg_cap->high_5ghz_chan; 3422 break; 3423 case WMI_HOST_WLAN_2G_CAP: 3424 arg[i].start_freq = hal_reg_cap->low_2ghz_chan; 3425 arg[i].end_freq = hal_reg_cap->high_2ghz_chan; 3426 break; 3427 case WMI_HOST_WLAN_5G_CAP: 3428 arg[i].start_freq = hal_reg_cap->low_5ghz_chan; 3429 arg[i].end_freq = hal_reg_cap->high_5ghz_chan; 3430 break; 3431 default: 3432 break; 3433 } 3434 } 3435 } 3436 3437 static void 3438 ath12k_wmi_copy_resource_config(struct ath12k_wmi_resource_config_params *wmi_cfg, 3439 struct ath12k_wmi_resource_config_arg *tg_cfg) 3440 { 3441 wmi_cfg->num_vdevs = cpu_to_le32(tg_cfg->num_vdevs); 3442 wmi_cfg->num_peers = cpu_to_le32(tg_cfg->num_peers); 3443 wmi_cfg->num_offload_peers = cpu_to_le32(tg_cfg->num_offload_peers); 3444 wmi_cfg->num_offload_reorder_buffs = 3445 cpu_to_le32(tg_cfg->num_offload_reorder_buffs); 3446 wmi_cfg->num_peer_keys = cpu_to_le32(tg_cfg->num_peer_keys); 3447 wmi_cfg->num_tids = cpu_to_le32(tg_cfg->num_tids); 3448 wmi_cfg->ast_skid_limit = cpu_to_le32(tg_cfg->ast_skid_limit); 3449 wmi_cfg->tx_chain_mask = cpu_to_le32(tg_cfg->tx_chain_mask); 3450 wmi_cfg->rx_chain_mask = cpu_to_le32(tg_cfg->rx_chain_mask); 3451 wmi_cfg->rx_timeout_pri[0] = cpu_to_le32(tg_cfg->rx_timeout_pri[0]); 3452 wmi_cfg->rx_timeout_pri[1] = cpu_to_le32(tg_cfg->rx_timeout_pri[1]); 3453 wmi_cfg->rx_timeout_pri[2] = cpu_to_le32(tg_cfg->rx_timeout_pri[2]); 3454 wmi_cfg->rx_timeout_pri[3] = cpu_to_le32(tg_cfg->rx_timeout_pri[3]); 3455 wmi_cfg->rx_decap_mode = cpu_to_le32(tg_cfg->rx_decap_mode); 3456 wmi_cfg->scan_max_pending_req = cpu_to_le32(tg_cfg->scan_max_pending_req); 3457 wmi_cfg->bmiss_offload_max_vdev = cpu_to_le32(tg_cfg->bmiss_offload_max_vdev); 3458 wmi_cfg->roam_offload_max_vdev = cpu_to_le32(tg_cfg->roam_offload_max_vdev); 3459 wmi_cfg->roam_offload_max_ap_profiles = 3460 cpu_to_le32(tg_cfg->roam_offload_max_ap_profiles); 3461 wmi_cfg->num_mcast_groups = cpu_to_le32(tg_cfg->num_mcast_groups); 3462 wmi_cfg->num_mcast_table_elems = cpu_to_le32(tg_cfg->num_mcast_table_elems); 3463 wmi_cfg->mcast2ucast_mode = cpu_to_le32(tg_cfg->mcast2ucast_mode); 3464 wmi_cfg->tx_dbg_log_size = cpu_to_le32(tg_cfg->tx_dbg_log_size); 3465 wmi_cfg->num_wds_entries = cpu_to_le32(tg_cfg->num_wds_entries); 3466 wmi_cfg->dma_burst_size = cpu_to_le32(tg_cfg->dma_burst_size); 3467 wmi_cfg->mac_aggr_delim = cpu_to_le32(tg_cfg->mac_aggr_delim); 3468 wmi_cfg->rx_skip_defrag_timeout_dup_detection_check = 3469 cpu_to_le32(tg_cfg->rx_skip_defrag_timeout_dup_detection_check); 3470 wmi_cfg->vow_config = cpu_to_le32(tg_cfg->vow_config); 3471 wmi_cfg->gtk_offload_max_vdev = cpu_to_le32(tg_cfg->gtk_offload_max_vdev); 3472 wmi_cfg->num_msdu_desc = cpu_to_le32(tg_cfg->num_msdu_desc); 3473 wmi_cfg->max_frag_entries = cpu_to_le32(tg_cfg->max_frag_entries); 3474 wmi_cfg->num_tdls_vdevs = cpu_to_le32(tg_cfg->num_tdls_vdevs); 3475 wmi_cfg->num_tdls_conn_table_entries = 3476 cpu_to_le32(tg_cfg->num_tdls_conn_table_entries); 3477 wmi_cfg->beacon_tx_offload_max_vdev = 3478 cpu_to_le32(tg_cfg->beacon_tx_offload_max_vdev); 3479 wmi_cfg->num_multicast_filter_entries = 3480 cpu_to_le32(tg_cfg->num_multicast_filter_entries); 3481 wmi_cfg->num_wow_filters = cpu_to_le32(tg_cfg->num_wow_filters); 3482 wmi_cfg->num_keep_alive_pattern = cpu_to_le32(tg_cfg->num_keep_alive_pattern); 3483 wmi_cfg->keep_alive_pattern_size = cpu_to_le32(tg_cfg->keep_alive_pattern_size); 3484 wmi_cfg->max_tdls_concurrent_sleep_sta = 3485 cpu_to_le32(tg_cfg->max_tdls_concurrent_sleep_sta); 3486 wmi_cfg->max_tdls_concurrent_buffer_sta = 3487 cpu_to_le32(tg_cfg->max_tdls_concurrent_buffer_sta); 3488 wmi_cfg->wmi_send_separate = cpu_to_le32(tg_cfg->wmi_send_separate); 3489 wmi_cfg->num_ocb_vdevs = cpu_to_le32(tg_cfg->num_ocb_vdevs); 3490 wmi_cfg->num_ocb_channels = cpu_to_le32(tg_cfg->num_ocb_channels); 3491 wmi_cfg->num_ocb_schedules = cpu_to_le32(tg_cfg->num_ocb_schedules); 3492 wmi_cfg->bpf_instruction_size = cpu_to_le32(tg_cfg->bpf_instruction_size); 3493 wmi_cfg->max_bssid_rx_filters = cpu_to_le32(tg_cfg->max_bssid_rx_filters); 3494 wmi_cfg->use_pdev_id = cpu_to_le32(tg_cfg->use_pdev_id); 3495 wmi_cfg->flag1 = cpu_to_le32(tg_cfg->atf_config | 3496 WMI_RSRC_CFG_FLAG1_BSS_CHANNEL_INFO_64); 3497 wmi_cfg->peer_map_unmap_version = cpu_to_le32(tg_cfg->peer_map_unmap_version); 3498 wmi_cfg->sched_params = cpu_to_le32(tg_cfg->sched_params); 3499 wmi_cfg->twt_ap_pdev_count = cpu_to_le32(tg_cfg->twt_ap_pdev_count); 3500 wmi_cfg->twt_ap_sta_count = cpu_to_le32(tg_cfg->twt_ap_sta_count); 3501 wmi_cfg->flags2 = le32_encode_bits(tg_cfg->dp_peer_meta_data_ver, 3502 WMI_RSRC_CFG_FLAGS2_RX_PEER_METADATA_VERSION); 3503 wmi_cfg->host_service_flags = cpu_to_le32(tg_cfg->is_reg_cc_ext_event_supported << 3504 WMI_RSRC_CFG_HOST_SVC_FLAG_REG_CC_EXT_SUPPORT_BIT); 3505 wmi_cfg->ema_max_vap_cnt = cpu_to_le32(tg_cfg->ema_max_vap_cnt); 3506 wmi_cfg->ema_max_profile_period = cpu_to_le32(tg_cfg->ema_max_profile_period); 3507 wmi_cfg->flags2 |= cpu_to_le32(WMI_RSRC_CFG_FLAGS2_CALC_NEXT_DTIM_COUNT_SET); 3508 } 3509 3510 static int ath12k_init_cmd_send(struct ath12k_wmi_pdev *wmi, 3511 struct ath12k_wmi_init_cmd_arg *arg) 3512 { 3513 struct ath12k_base *ab = wmi->wmi_ab->ab; 3514 struct sk_buff *skb; 3515 struct wmi_init_cmd *cmd; 3516 struct ath12k_wmi_resource_config_params *cfg; 3517 struct ath12k_wmi_pdev_set_hw_mode_cmd *hw_mode; 3518 struct ath12k_wmi_pdev_band_to_mac_params *band_to_mac; 3519 struct ath12k_wmi_host_mem_chunk_params *host_mem_chunks; 3520 struct wmi_tlv *tlv; 3521 size_t ret, len; 3522 void *ptr; 3523 u32 hw_mode_len = 0; 3524 u16 idx; 3525 3526 if (arg->hw_mode_id != WMI_HOST_HW_MODE_MAX) 3527 hw_mode_len = sizeof(*hw_mode) + TLV_HDR_SIZE + 3528 (arg->num_band_to_mac * sizeof(*band_to_mac)); 3529 3530 len = sizeof(*cmd) + TLV_HDR_SIZE + sizeof(*cfg) + hw_mode_len + 3531 (arg->num_mem_chunks ? (sizeof(*host_mem_chunks) * WMI_MAX_MEM_REQS) : 0); 3532 3533 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 3534 if (!skb) 3535 return -ENOMEM; 3536 3537 cmd = (struct wmi_init_cmd *)skb->data; 3538 3539 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_INIT_CMD, 3540 sizeof(*cmd)); 3541 3542 ptr = skb->data + sizeof(*cmd); 3543 cfg = ptr; 3544 3545 ath12k_wmi_copy_resource_config(cfg, &arg->res_cfg); 3546 3547 cfg->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_RESOURCE_CONFIG, 3548 sizeof(*cfg)); 3549 3550 ptr += sizeof(*cfg); 3551 host_mem_chunks = ptr + TLV_HDR_SIZE; 3552 len = sizeof(struct ath12k_wmi_host_mem_chunk_params); 3553 3554 for (idx = 0; idx < arg->num_mem_chunks; ++idx) { 3555 host_mem_chunks[idx].tlv_header = 3556 ath12k_wmi_tlv_hdr(WMI_TAG_WLAN_HOST_MEMORY_CHUNK, 3557 len); 3558 3559 host_mem_chunks[idx].ptr = cpu_to_le32(arg->mem_chunks[idx].paddr); 3560 host_mem_chunks[idx].size = cpu_to_le32(arg->mem_chunks[idx].len); 3561 host_mem_chunks[idx].req_id = cpu_to_le32(arg->mem_chunks[idx].req_id); 3562 3563 ath12k_dbg(ab, ATH12K_DBG_WMI, 3564 "WMI host mem chunk req_id %d paddr 0x%llx len %d\n", 3565 arg->mem_chunks[idx].req_id, 3566 (u64)arg->mem_chunks[idx].paddr, 3567 arg->mem_chunks[idx].len); 3568 } 3569 cmd->num_host_mem_chunks = cpu_to_le32(arg->num_mem_chunks); 3570 len = sizeof(struct ath12k_wmi_host_mem_chunk_params) * arg->num_mem_chunks; 3571 3572 /* num_mem_chunks is zero */ 3573 tlv = ptr; 3574 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len); 3575 ptr += TLV_HDR_SIZE + len; 3576 3577 if (arg->hw_mode_id != WMI_HOST_HW_MODE_MAX) { 3578 hw_mode = (struct ath12k_wmi_pdev_set_hw_mode_cmd *)ptr; 3579 hw_mode->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_HW_MODE_CMD, 3580 sizeof(*hw_mode)); 3581 3582 hw_mode->hw_mode_index = cpu_to_le32(arg->hw_mode_id); 3583 hw_mode->num_band_to_mac = cpu_to_le32(arg->num_band_to_mac); 3584 3585 ptr += sizeof(*hw_mode); 3586 3587 len = arg->num_band_to_mac * sizeof(*band_to_mac); 3588 tlv = ptr; 3589 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len); 3590 3591 ptr += TLV_HDR_SIZE; 3592 len = sizeof(*band_to_mac); 3593 3594 for (idx = 0; idx < arg->num_band_to_mac; idx++) { 3595 band_to_mac = (void *)ptr; 3596 3597 band_to_mac->tlv_header = 3598 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_BAND_TO_MAC, 3599 len); 3600 band_to_mac->pdev_id = cpu_to_le32(arg->band_to_mac[idx].pdev_id); 3601 band_to_mac->start_freq = 3602 cpu_to_le32(arg->band_to_mac[idx].start_freq); 3603 band_to_mac->end_freq = 3604 cpu_to_le32(arg->band_to_mac[idx].end_freq); 3605 ptr += sizeof(*band_to_mac); 3606 } 3607 } 3608 3609 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_INIT_CMDID); 3610 if (ret) { 3611 ath12k_warn(ab, "failed to send WMI_INIT_CMDID\n"); 3612 dev_kfree_skb(skb); 3613 } 3614 3615 return ret; 3616 } 3617 3618 int ath12k_wmi_pdev_lro_cfg(struct ath12k *ar, 3619 int pdev_id) 3620 { 3621 struct ath12k_wmi_pdev_lro_config_cmd *cmd; 3622 struct sk_buff *skb; 3623 int ret; 3624 3625 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd)); 3626 if (!skb) 3627 return -ENOMEM; 3628 3629 cmd = (struct ath12k_wmi_pdev_lro_config_cmd *)skb->data; 3630 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_LRO_INFO_CMD, 3631 sizeof(*cmd)); 3632 3633 get_random_bytes(cmd->th_4, sizeof(cmd->th_4)); 3634 get_random_bytes(cmd->th_6, sizeof(cmd->th_6)); 3635 3636 cmd->pdev_id = cpu_to_le32(pdev_id); 3637 3638 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3639 "WMI lro cfg cmd pdev_id 0x%x\n", pdev_id); 3640 3641 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_LRO_CONFIG_CMDID); 3642 if (ret) { 3643 ath12k_warn(ar->ab, 3644 "failed to send lro cfg req wmi cmd\n"); 3645 goto err; 3646 } 3647 3648 return 0; 3649 err: 3650 dev_kfree_skb(skb); 3651 return ret; 3652 } 3653 3654 int ath12k_wmi_wait_for_service_ready(struct ath12k_base *ab) 3655 { 3656 unsigned long time_left; 3657 3658 time_left = wait_for_completion_timeout(&ab->wmi_ab.service_ready, 3659 WMI_SERVICE_READY_TIMEOUT_HZ); 3660 if (!time_left) 3661 return -ETIMEDOUT; 3662 3663 return 0; 3664 } 3665 3666 int ath12k_wmi_wait_for_unified_ready(struct ath12k_base *ab) 3667 { 3668 unsigned long time_left; 3669 3670 time_left = wait_for_completion_timeout(&ab->wmi_ab.unified_ready, 3671 WMI_SERVICE_READY_TIMEOUT_HZ); 3672 if (!time_left) 3673 return -ETIMEDOUT; 3674 3675 return 0; 3676 } 3677 3678 int ath12k_wmi_set_hw_mode(struct ath12k_base *ab, 3679 enum wmi_host_hw_mode_config_type mode) 3680 { 3681 struct ath12k_wmi_pdev_set_hw_mode_cmd *cmd; 3682 struct sk_buff *skb; 3683 struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab; 3684 int len; 3685 int ret; 3686 3687 len = sizeof(*cmd); 3688 3689 skb = ath12k_wmi_alloc_skb(wmi_ab, len); 3690 if (!skb) 3691 return -ENOMEM; 3692 3693 cmd = (struct ath12k_wmi_pdev_set_hw_mode_cmd *)skb->data; 3694 3695 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_HW_MODE_CMD, 3696 sizeof(*cmd)); 3697 3698 cmd->pdev_id = WMI_PDEV_ID_SOC; 3699 cmd->hw_mode_index = cpu_to_le32(mode); 3700 3701 ret = ath12k_wmi_cmd_send(&wmi_ab->wmi[0], skb, WMI_PDEV_SET_HW_MODE_CMDID); 3702 if (ret) { 3703 ath12k_warn(ab, "failed to send WMI_PDEV_SET_HW_MODE_CMDID\n"); 3704 dev_kfree_skb(skb); 3705 } 3706 3707 return ret; 3708 } 3709 3710 int ath12k_wmi_cmd_init(struct ath12k_base *ab) 3711 { 3712 struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab; 3713 struct ath12k_wmi_init_cmd_arg arg = {}; 3714 3715 if (test_bit(WMI_TLV_SERVICE_REG_CC_EXT_EVENT_SUPPORT, 3716 ab->wmi_ab.svc_map)) 3717 arg.res_cfg.is_reg_cc_ext_event_supported = true; 3718 3719 ab->hw_params->wmi_init(ab, &arg.res_cfg); 3720 3721 arg.num_mem_chunks = wmi_ab->num_mem_chunks; 3722 arg.hw_mode_id = wmi_ab->preferred_hw_mode; 3723 arg.mem_chunks = wmi_ab->mem_chunks; 3724 3725 if (ab->hw_params->single_pdev_only) 3726 arg.hw_mode_id = WMI_HOST_HW_MODE_MAX; 3727 3728 arg.num_band_to_mac = ab->num_radios; 3729 ath12k_fill_band_to_mac_param(ab, arg.band_to_mac); 3730 3731 return ath12k_init_cmd_send(&wmi_ab->wmi[0], &arg); 3732 } 3733 3734 int ath12k_wmi_vdev_spectral_conf(struct ath12k *ar, 3735 struct ath12k_wmi_vdev_spectral_conf_arg *arg) 3736 { 3737 struct ath12k_wmi_vdev_spectral_conf_cmd *cmd; 3738 struct sk_buff *skb; 3739 int ret; 3740 3741 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd)); 3742 if (!skb) 3743 return -ENOMEM; 3744 3745 cmd = (struct ath12k_wmi_vdev_spectral_conf_cmd *)skb->data; 3746 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SPECTRAL_CONFIGURE_CMD, 3747 sizeof(*cmd)); 3748 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 3749 cmd->scan_count = cpu_to_le32(arg->scan_count); 3750 cmd->scan_period = cpu_to_le32(arg->scan_period); 3751 cmd->scan_priority = cpu_to_le32(arg->scan_priority); 3752 cmd->scan_fft_size = cpu_to_le32(arg->scan_fft_size); 3753 cmd->scan_gc_ena = cpu_to_le32(arg->scan_gc_ena); 3754 cmd->scan_restart_ena = cpu_to_le32(arg->scan_restart_ena); 3755 cmd->scan_noise_floor_ref = cpu_to_le32(arg->scan_noise_floor_ref); 3756 cmd->scan_init_delay = cpu_to_le32(arg->scan_init_delay); 3757 cmd->scan_nb_tone_thr = cpu_to_le32(arg->scan_nb_tone_thr); 3758 cmd->scan_str_bin_thr = cpu_to_le32(arg->scan_str_bin_thr); 3759 cmd->scan_wb_rpt_mode = cpu_to_le32(arg->scan_wb_rpt_mode); 3760 cmd->scan_rssi_rpt_mode = cpu_to_le32(arg->scan_rssi_rpt_mode); 3761 cmd->scan_rssi_thr = cpu_to_le32(arg->scan_rssi_thr); 3762 cmd->scan_pwr_format = cpu_to_le32(arg->scan_pwr_format); 3763 cmd->scan_rpt_mode = cpu_to_le32(arg->scan_rpt_mode); 3764 cmd->scan_bin_scale = cpu_to_le32(arg->scan_bin_scale); 3765 cmd->scan_dbm_adj = cpu_to_le32(arg->scan_dbm_adj); 3766 cmd->scan_chn_mask = cpu_to_le32(arg->scan_chn_mask); 3767 3768 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3769 "WMI spectral scan config cmd vdev_id 0x%x\n", 3770 arg->vdev_id); 3771 3772 ret = ath12k_wmi_cmd_send(ar->wmi, skb, 3773 WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID); 3774 if (ret) { 3775 ath12k_warn(ar->ab, 3776 "failed to send spectral scan config wmi cmd\n"); 3777 goto err; 3778 } 3779 3780 return 0; 3781 err: 3782 dev_kfree_skb(skb); 3783 return ret; 3784 } 3785 3786 int ath12k_wmi_vdev_spectral_enable(struct ath12k *ar, u32 vdev_id, 3787 u32 trigger, u32 enable) 3788 { 3789 struct ath12k_wmi_vdev_spectral_enable_cmd *cmd; 3790 struct sk_buff *skb; 3791 int ret; 3792 3793 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd)); 3794 if (!skb) 3795 return -ENOMEM; 3796 3797 cmd = (struct ath12k_wmi_vdev_spectral_enable_cmd *)skb->data; 3798 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SPECTRAL_ENABLE_CMD, 3799 sizeof(*cmd)); 3800 3801 cmd->vdev_id = cpu_to_le32(vdev_id); 3802 cmd->trigger_cmd = cpu_to_le32(trigger); 3803 cmd->enable_cmd = cpu_to_le32(enable); 3804 3805 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3806 "WMI spectral enable cmd vdev id 0x%x\n", 3807 vdev_id); 3808 3809 ret = ath12k_wmi_cmd_send(ar->wmi, skb, 3810 WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID); 3811 if (ret) { 3812 ath12k_warn(ar->ab, 3813 "failed to send spectral enable wmi cmd\n"); 3814 goto err; 3815 } 3816 3817 return 0; 3818 err: 3819 dev_kfree_skb(skb); 3820 return ret; 3821 } 3822 3823 int ath12k_wmi_pdev_dma_ring_cfg(struct ath12k *ar, 3824 struct ath12k_wmi_pdev_dma_ring_cfg_arg *arg) 3825 { 3826 struct ath12k_wmi_pdev_dma_ring_cfg_req_cmd *cmd; 3827 struct sk_buff *skb; 3828 int ret; 3829 3830 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd)); 3831 if (!skb) 3832 return -ENOMEM; 3833 3834 cmd = (struct ath12k_wmi_pdev_dma_ring_cfg_req_cmd *)skb->data; 3835 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_DMA_RING_CFG_REQ, 3836 sizeof(*cmd)); 3837 3838 cmd->pdev_id = cpu_to_le32(arg->pdev_id); 3839 cmd->module_id = cpu_to_le32(arg->module_id); 3840 cmd->base_paddr_lo = cpu_to_le32(arg->base_paddr_lo); 3841 cmd->base_paddr_hi = cpu_to_le32(arg->base_paddr_hi); 3842 cmd->head_idx_paddr_lo = cpu_to_le32(arg->head_idx_paddr_lo); 3843 cmd->head_idx_paddr_hi = cpu_to_le32(arg->head_idx_paddr_hi); 3844 cmd->tail_idx_paddr_lo = cpu_to_le32(arg->tail_idx_paddr_lo); 3845 cmd->tail_idx_paddr_hi = cpu_to_le32(arg->tail_idx_paddr_hi); 3846 cmd->num_elems = cpu_to_le32(arg->num_elems); 3847 cmd->buf_size = cpu_to_le32(arg->buf_size); 3848 cmd->num_resp_per_event = cpu_to_le32(arg->num_resp_per_event); 3849 cmd->event_timeout_ms = cpu_to_le32(arg->event_timeout_ms); 3850 3851 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3852 "WMI DMA ring cfg req cmd pdev_id 0x%x\n", 3853 arg->pdev_id); 3854 3855 ret = ath12k_wmi_cmd_send(ar->wmi, skb, 3856 WMI_PDEV_DMA_RING_CFG_REQ_CMDID); 3857 if (ret) { 3858 ath12k_warn(ar->ab, 3859 "failed to send dma ring cfg req wmi cmd\n"); 3860 goto err; 3861 } 3862 3863 return 0; 3864 err: 3865 dev_kfree_skb(skb); 3866 return ret; 3867 } 3868 3869 static int ath12k_wmi_dma_buf_entry_parse(struct ath12k_base *soc, 3870 u16 tag, u16 len, 3871 const void *ptr, void *data) 3872 { 3873 struct ath12k_wmi_dma_buf_release_arg *arg = data; 3874 3875 if (tag != WMI_TAG_DMA_BUF_RELEASE_ENTRY) 3876 return -EPROTO; 3877 3878 if (arg->num_buf_entry >= le32_to_cpu(arg->fixed.num_buf_release_entry)) 3879 return -ENOBUFS; 3880 3881 arg->num_buf_entry++; 3882 return 0; 3883 } 3884 3885 static int ath12k_wmi_dma_buf_meta_parse(struct ath12k_base *soc, 3886 u16 tag, u16 len, 3887 const void *ptr, void *data) 3888 { 3889 struct ath12k_wmi_dma_buf_release_arg *arg = data; 3890 3891 if (tag != WMI_TAG_DMA_BUF_RELEASE_SPECTRAL_META_DATA) 3892 return -EPROTO; 3893 3894 if (arg->num_meta >= le32_to_cpu(arg->fixed.num_meta_data_entry)) 3895 return -ENOBUFS; 3896 3897 arg->num_meta++; 3898 3899 return 0; 3900 } 3901 3902 static int ath12k_wmi_dma_buf_parse(struct ath12k_base *ab, 3903 u16 tag, u16 len, 3904 const void *ptr, void *data) 3905 { 3906 struct ath12k_wmi_dma_buf_release_arg *arg = data; 3907 const struct ath12k_wmi_dma_buf_release_fixed_params *fixed; 3908 u32 pdev_id; 3909 int ret; 3910 3911 switch (tag) { 3912 case WMI_TAG_DMA_BUF_RELEASE: 3913 fixed = ptr; 3914 arg->fixed = *fixed; 3915 pdev_id = DP_HW2SW_MACID(le32_to_cpu(fixed->pdev_id)); 3916 arg->fixed.pdev_id = cpu_to_le32(pdev_id); 3917 break; 3918 case WMI_TAG_ARRAY_STRUCT: 3919 if (!arg->buf_entry_done) { 3920 arg->num_buf_entry = 0; 3921 arg->buf_entry = ptr; 3922 3923 ret = ath12k_wmi_tlv_iter(ab, ptr, len, 3924 ath12k_wmi_dma_buf_entry_parse, 3925 arg); 3926 if (ret) { 3927 ath12k_warn(ab, "failed to parse dma buf entry tlv %d\n", 3928 ret); 3929 return ret; 3930 } 3931 3932 arg->buf_entry_done = true; 3933 } else if (!arg->meta_data_done) { 3934 arg->num_meta = 0; 3935 arg->meta_data = ptr; 3936 3937 ret = ath12k_wmi_tlv_iter(ab, ptr, len, 3938 ath12k_wmi_dma_buf_meta_parse, 3939 arg); 3940 if (ret) { 3941 ath12k_warn(ab, "failed to parse dma buf meta tlv %d\n", 3942 ret); 3943 return ret; 3944 } 3945 3946 arg->meta_data_done = true; 3947 } 3948 break; 3949 default: 3950 break; 3951 } 3952 return 0; 3953 } 3954 3955 static void ath12k_wmi_pdev_dma_ring_buf_release_event(struct ath12k_base *ab, 3956 struct sk_buff *skb) 3957 { 3958 struct ath12k_wmi_dma_buf_release_arg arg = {}; 3959 struct ath12k_dbring_buf_release_event param; 3960 int ret; 3961 3962 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 3963 ath12k_wmi_dma_buf_parse, 3964 &arg); 3965 if (ret) { 3966 ath12k_warn(ab, "failed to parse dma buf release tlv %d\n", ret); 3967 return; 3968 } 3969 3970 param.fixed = arg.fixed; 3971 param.buf_entry = arg.buf_entry; 3972 param.num_buf_entry = arg.num_buf_entry; 3973 param.meta_data = arg.meta_data; 3974 param.num_meta = arg.num_meta; 3975 3976 ret = ath12k_dbring_buffer_release_event(ab, ¶m); 3977 if (ret) { 3978 ath12k_warn(ab, "failed to handle dma buf release event %d\n", ret); 3979 return; 3980 } 3981 } 3982 3983 static int ath12k_wmi_hw_mode_caps_parse(struct ath12k_base *soc, 3984 u16 tag, u16 len, 3985 const void *ptr, void *data) 3986 { 3987 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data; 3988 struct ath12k_wmi_hw_mode_cap_params *hw_mode_cap; 3989 u32 phy_map = 0; 3990 3991 if (tag != WMI_TAG_HW_MODE_CAPABILITIES) 3992 return -EPROTO; 3993 3994 if (svc_rdy_ext->n_hw_mode_caps >= svc_rdy_ext->arg.num_hw_modes) 3995 return -ENOBUFS; 3996 3997 hw_mode_cap = container_of(ptr, struct ath12k_wmi_hw_mode_cap_params, 3998 hw_mode_id); 3999 svc_rdy_ext->n_hw_mode_caps++; 4000 4001 phy_map = le32_to_cpu(hw_mode_cap->phy_id_map); 4002 svc_rdy_ext->tot_phy_id += fls(phy_map); 4003 4004 return 0; 4005 } 4006 4007 static int ath12k_wmi_hw_mode_caps(struct ath12k_base *soc, 4008 u16 len, const void *ptr, void *data) 4009 { 4010 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data; 4011 const struct ath12k_wmi_hw_mode_cap_params *hw_mode_caps; 4012 enum wmi_host_hw_mode_config_type mode, pref; 4013 u32 i; 4014 int ret; 4015 4016 svc_rdy_ext->n_hw_mode_caps = 0; 4017 svc_rdy_ext->hw_mode_caps = ptr; 4018 4019 ret = ath12k_wmi_tlv_iter(soc, ptr, len, 4020 ath12k_wmi_hw_mode_caps_parse, 4021 svc_rdy_ext); 4022 if (ret) { 4023 ath12k_warn(soc, "failed to parse tlv %d\n", ret); 4024 return ret; 4025 } 4026 4027 for (i = 0 ; i < svc_rdy_ext->n_hw_mode_caps; i++) { 4028 hw_mode_caps = &svc_rdy_ext->hw_mode_caps[i]; 4029 mode = le32_to_cpu(hw_mode_caps->hw_mode_id); 4030 4031 if (mode >= WMI_HOST_HW_MODE_MAX) 4032 continue; 4033 4034 pref = soc->wmi_ab.preferred_hw_mode; 4035 4036 if (ath12k_hw_mode_pri_map[mode] < ath12k_hw_mode_pri_map[pref]) { 4037 svc_rdy_ext->pref_hw_mode_caps = *hw_mode_caps; 4038 soc->wmi_ab.preferred_hw_mode = mode; 4039 } 4040 } 4041 4042 ath12k_dbg(soc, ATH12K_DBG_WMI, "preferred_hw_mode:%d\n", 4043 soc->wmi_ab.preferred_hw_mode); 4044 if (soc->wmi_ab.preferred_hw_mode == WMI_HOST_HW_MODE_MAX) 4045 return -EINVAL; 4046 4047 return 0; 4048 } 4049 4050 static int ath12k_wmi_mac_phy_caps_parse(struct ath12k_base *soc, 4051 u16 tag, u16 len, 4052 const void *ptr, void *data) 4053 { 4054 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data; 4055 4056 if (tag != WMI_TAG_MAC_PHY_CAPABILITIES) 4057 return -EPROTO; 4058 4059 if (svc_rdy_ext->n_mac_phy_caps >= svc_rdy_ext->tot_phy_id) 4060 return -ENOBUFS; 4061 4062 len = min_t(u16, len, sizeof(struct ath12k_wmi_mac_phy_caps_params)); 4063 if (!svc_rdy_ext->n_mac_phy_caps) { 4064 svc_rdy_ext->mac_phy_caps = kzalloc((svc_rdy_ext->tot_phy_id) * len, 4065 GFP_ATOMIC); 4066 if (!svc_rdy_ext->mac_phy_caps) 4067 return -ENOMEM; 4068 } 4069 4070 memcpy(svc_rdy_ext->mac_phy_caps + svc_rdy_ext->n_mac_phy_caps, ptr, len); 4071 svc_rdy_ext->n_mac_phy_caps++; 4072 return 0; 4073 } 4074 4075 static int ath12k_wmi_ext_hal_reg_caps_parse(struct ath12k_base *soc, 4076 u16 tag, u16 len, 4077 const void *ptr, void *data) 4078 { 4079 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data; 4080 4081 if (tag != WMI_TAG_HAL_REG_CAPABILITIES_EXT) 4082 return -EPROTO; 4083 4084 if (svc_rdy_ext->n_ext_hal_reg_caps >= svc_rdy_ext->arg.num_phy) 4085 return -ENOBUFS; 4086 4087 svc_rdy_ext->n_ext_hal_reg_caps++; 4088 return 0; 4089 } 4090 4091 static int ath12k_wmi_ext_hal_reg_caps(struct ath12k_base *soc, 4092 u16 len, const void *ptr, void *data) 4093 { 4094 struct ath12k_wmi_pdev *wmi_handle = &soc->wmi_ab.wmi[0]; 4095 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data; 4096 struct ath12k_wmi_hal_reg_capabilities_ext_arg reg_cap; 4097 int ret; 4098 u32 i; 4099 4100 svc_rdy_ext->n_ext_hal_reg_caps = 0; 4101 svc_rdy_ext->ext_hal_reg_caps = ptr; 4102 ret = ath12k_wmi_tlv_iter(soc, ptr, len, 4103 ath12k_wmi_ext_hal_reg_caps_parse, 4104 svc_rdy_ext); 4105 if (ret) { 4106 ath12k_warn(soc, "failed to parse tlv %d\n", ret); 4107 return ret; 4108 } 4109 4110 for (i = 0; i < svc_rdy_ext->arg.num_phy; i++) { 4111 ret = ath12k_pull_reg_cap_svc_rdy_ext(wmi_handle, 4112 svc_rdy_ext->soc_hal_reg_caps, 4113 svc_rdy_ext->ext_hal_reg_caps, i, 4114 ®_cap); 4115 if (ret) { 4116 ath12k_warn(soc, "failed to extract reg cap %d\n", i); 4117 return ret; 4118 } 4119 4120 if (reg_cap.phy_id >= MAX_RADIOS) { 4121 ath12k_warn(soc, "unexpected phy id %u\n", reg_cap.phy_id); 4122 return -EINVAL; 4123 } 4124 4125 soc->hal_reg_cap[reg_cap.phy_id] = reg_cap; 4126 } 4127 return 0; 4128 } 4129 4130 static int ath12k_wmi_ext_soc_hal_reg_caps_parse(struct ath12k_base *soc, 4131 u16 len, const void *ptr, 4132 void *data) 4133 { 4134 struct ath12k_wmi_pdev *wmi_handle = &soc->wmi_ab.wmi[0]; 4135 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data; 4136 u8 hw_mode_id = le32_to_cpu(svc_rdy_ext->pref_hw_mode_caps.hw_mode_id); 4137 u32 phy_id_map; 4138 int pdev_index = 0; 4139 int ret; 4140 4141 svc_rdy_ext->soc_hal_reg_caps = ptr; 4142 svc_rdy_ext->arg.num_phy = le32_to_cpu(svc_rdy_ext->soc_hal_reg_caps->num_phy); 4143 4144 soc->num_radios = 0; 4145 phy_id_map = le32_to_cpu(svc_rdy_ext->pref_hw_mode_caps.phy_id_map); 4146 soc->fw_pdev_count = 0; 4147 4148 while (phy_id_map && soc->num_radios < MAX_RADIOS) { 4149 ret = ath12k_pull_mac_phy_cap_svc_ready_ext(wmi_handle, 4150 svc_rdy_ext, 4151 hw_mode_id, soc->num_radios, 4152 &soc->pdevs[pdev_index]); 4153 if (ret) { 4154 ath12k_warn(soc, "failed to extract mac caps, idx :%d\n", 4155 soc->num_radios); 4156 return ret; 4157 } 4158 4159 soc->num_radios++; 4160 4161 /* For single_pdev_only targets, 4162 * save mac_phy capability in the same pdev 4163 */ 4164 if (soc->hw_params->single_pdev_only) 4165 pdev_index = 0; 4166 else 4167 pdev_index = soc->num_radios; 4168 4169 /* TODO: mac_phy_cap prints */ 4170 phy_id_map >>= 1; 4171 } 4172 4173 if (soc->hw_params->single_pdev_only) { 4174 soc->num_radios = 1; 4175 soc->pdevs[0].pdev_id = 0; 4176 } 4177 4178 return 0; 4179 } 4180 4181 static int ath12k_wmi_dma_ring_caps_parse(struct ath12k_base *soc, 4182 u16 tag, u16 len, 4183 const void *ptr, void *data) 4184 { 4185 struct ath12k_wmi_dma_ring_caps_parse *parse = data; 4186 4187 if (tag != WMI_TAG_DMA_RING_CAPABILITIES) 4188 return -EPROTO; 4189 4190 parse->n_dma_ring_caps++; 4191 return 0; 4192 } 4193 4194 static int ath12k_wmi_alloc_dbring_caps(struct ath12k_base *ab, 4195 u32 num_cap) 4196 { 4197 size_t sz; 4198 void *ptr; 4199 4200 sz = num_cap * sizeof(struct ath12k_dbring_cap); 4201 ptr = kzalloc(sz, GFP_ATOMIC); 4202 if (!ptr) 4203 return -ENOMEM; 4204 4205 ab->db_caps = ptr; 4206 ab->num_db_cap = num_cap; 4207 4208 return 0; 4209 } 4210 4211 static void ath12k_wmi_free_dbring_caps(struct ath12k_base *ab) 4212 { 4213 kfree(ab->db_caps); 4214 ab->db_caps = NULL; 4215 ab->num_db_cap = 0; 4216 } 4217 4218 static int ath12k_wmi_dma_ring_caps(struct ath12k_base *ab, 4219 u16 len, const void *ptr, void *data) 4220 { 4221 struct ath12k_wmi_dma_ring_caps_parse *dma_caps_parse = data; 4222 struct ath12k_wmi_dma_ring_caps_params *dma_caps; 4223 struct ath12k_dbring_cap *dir_buff_caps; 4224 int ret; 4225 u32 i; 4226 4227 dma_caps_parse->n_dma_ring_caps = 0; 4228 dma_caps = (struct ath12k_wmi_dma_ring_caps_params *)ptr; 4229 ret = ath12k_wmi_tlv_iter(ab, ptr, len, 4230 ath12k_wmi_dma_ring_caps_parse, 4231 dma_caps_parse); 4232 if (ret) { 4233 ath12k_warn(ab, "failed to parse dma ring caps tlv %d\n", ret); 4234 return ret; 4235 } 4236 4237 if (!dma_caps_parse->n_dma_ring_caps) 4238 return 0; 4239 4240 if (ab->num_db_cap) { 4241 ath12k_warn(ab, "Already processed, so ignoring dma ring caps\n"); 4242 return 0; 4243 } 4244 4245 ret = ath12k_wmi_alloc_dbring_caps(ab, dma_caps_parse->n_dma_ring_caps); 4246 if (ret) 4247 return ret; 4248 4249 dir_buff_caps = ab->db_caps; 4250 for (i = 0; i < dma_caps_parse->n_dma_ring_caps; i++) { 4251 if (le32_to_cpu(dma_caps[i].module_id) >= WMI_DIRECT_BUF_MAX) { 4252 ath12k_warn(ab, "Invalid module id %d\n", 4253 le32_to_cpu(dma_caps[i].module_id)); 4254 ret = -EINVAL; 4255 goto free_dir_buff; 4256 } 4257 4258 dir_buff_caps[i].id = le32_to_cpu(dma_caps[i].module_id); 4259 dir_buff_caps[i].pdev_id = 4260 DP_HW2SW_MACID(le32_to_cpu(dma_caps[i].pdev_id)); 4261 dir_buff_caps[i].min_elem = le32_to_cpu(dma_caps[i].min_elem); 4262 dir_buff_caps[i].min_buf_sz = le32_to_cpu(dma_caps[i].min_buf_sz); 4263 dir_buff_caps[i].min_buf_align = le32_to_cpu(dma_caps[i].min_buf_align); 4264 } 4265 4266 return 0; 4267 4268 free_dir_buff: 4269 ath12k_wmi_free_dbring_caps(ab); 4270 return ret; 4271 } 4272 4273 static int ath12k_wmi_svc_rdy_ext_parse(struct ath12k_base *ab, 4274 u16 tag, u16 len, 4275 const void *ptr, void *data) 4276 { 4277 struct ath12k_wmi_pdev *wmi_handle = &ab->wmi_ab.wmi[0]; 4278 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data; 4279 int ret; 4280 4281 switch (tag) { 4282 case WMI_TAG_SERVICE_READY_EXT_EVENT: 4283 ret = ath12k_pull_svc_ready_ext(wmi_handle, ptr, 4284 &svc_rdy_ext->arg); 4285 if (ret) { 4286 ath12k_warn(ab, "unable to extract ext params\n"); 4287 return ret; 4288 } 4289 break; 4290 4291 case WMI_TAG_SOC_MAC_PHY_HW_MODE_CAPS: 4292 svc_rdy_ext->hw_caps = ptr; 4293 svc_rdy_ext->arg.num_hw_modes = 4294 le32_to_cpu(svc_rdy_ext->hw_caps->num_hw_modes); 4295 break; 4296 4297 case WMI_TAG_SOC_HAL_REG_CAPABILITIES: 4298 ret = ath12k_wmi_ext_soc_hal_reg_caps_parse(ab, len, ptr, 4299 svc_rdy_ext); 4300 if (ret) 4301 return ret; 4302 break; 4303 4304 case WMI_TAG_ARRAY_STRUCT: 4305 if (!svc_rdy_ext->hw_mode_done) { 4306 ret = ath12k_wmi_hw_mode_caps(ab, len, ptr, svc_rdy_ext); 4307 if (ret) 4308 return ret; 4309 4310 svc_rdy_ext->hw_mode_done = true; 4311 } else if (!svc_rdy_ext->mac_phy_done) { 4312 svc_rdy_ext->n_mac_phy_caps = 0; 4313 ret = ath12k_wmi_tlv_iter(ab, ptr, len, 4314 ath12k_wmi_mac_phy_caps_parse, 4315 svc_rdy_ext); 4316 if (ret) { 4317 ath12k_warn(ab, "failed to parse tlv %d\n", ret); 4318 return ret; 4319 } 4320 4321 svc_rdy_ext->mac_phy_done = true; 4322 } else if (!svc_rdy_ext->ext_hal_reg_done) { 4323 ret = ath12k_wmi_ext_hal_reg_caps(ab, len, ptr, svc_rdy_ext); 4324 if (ret) 4325 return ret; 4326 4327 svc_rdy_ext->ext_hal_reg_done = true; 4328 } else if (!svc_rdy_ext->mac_phy_chainmask_combo_done) { 4329 svc_rdy_ext->mac_phy_chainmask_combo_done = true; 4330 } else if (!svc_rdy_ext->mac_phy_chainmask_cap_done) { 4331 svc_rdy_ext->mac_phy_chainmask_cap_done = true; 4332 } else if (!svc_rdy_ext->oem_dma_ring_cap_done) { 4333 svc_rdy_ext->oem_dma_ring_cap_done = true; 4334 } else if (!svc_rdy_ext->dma_ring_cap_done) { 4335 ret = ath12k_wmi_dma_ring_caps(ab, len, ptr, 4336 &svc_rdy_ext->dma_caps_parse); 4337 if (ret) 4338 return ret; 4339 4340 svc_rdy_ext->dma_ring_cap_done = true; 4341 } 4342 break; 4343 4344 default: 4345 break; 4346 } 4347 return 0; 4348 } 4349 4350 static int ath12k_service_ready_ext_event(struct ath12k_base *ab, 4351 struct sk_buff *skb) 4352 { 4353 struct ath12k_wmi_svc_rdy_ext_parse svc_rdy_ext = { }; 4354 int ret; 4355 4356 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 4357 ath12k_wmi_svc_rdy_ext_parse, 4358 &svc_rdy_ext); 4359 if (ret) { 4360 ath12k_warn(ab, "failed to parse tlv %d\n", ret); 4361 goto err; 4362 } 4363 4364 if (!test_bit(WMI_TLV_SERVICE_EXT2_MSG, ab->wmi_ab.svc_map)) 4365 complete(&ab->wmi_ab.service_ready); 4366 4367 kfree(svc_rdy_ext.mac_phy_caps); 4368 return 0; 4369 4370 err: 4371 ath12k_wmi_free_dbring_caps(ab); 4372 return ret; 4373 } 4374 4375 static int ath12k_pull_svc_ready_ext2(struct ath12k_wmi_pdev *wmi_handle, 4376 const void *ptr, 4377 struct ath12k_wmi_svc_rdy_ext2_arg *arg) 4378 { 4379 const struct wmi_service_ready_ext2_event *ev = ptr; 4380 4381 if (!ev) 4382 return -EINVAL; 4383 4384 arg->reg_db_version = le32_to_cpu(ev->reg_db_version); 4385 arg->hw_min_max_tx_power_2ghz = le32_to_cpu(ev->hw_min_max_tx_power_2ghz); 4386 arg->hw_min_max_tx_power_5ghz = le32_to_cpu(ev->hw_min_max_tx_power_5ghz); 4387 arg->chwidth_num_peer_caps = le32_to_cpu(ev->chwidth_num_peer_caps); 4388 arg->preamble_puncture_bw = le32_to_cpu(ev->preamble_puncture_bw); 4389 arg->max_user_per_ppdu_ofdma = le32_to_cpu(ev->max_user_per_ppdu_ofdma); 4390 arg->max_user_per_ppdu_mumimo = le32_to_cpu(ev->max_user_per_ppdu_mumimo); 4391 arg->target_cap_flags = le32_to_cpu(ev->target_cap_flags); 4392 return 0; 4393 } 4394 4395 static void ath12k_wmi_eht_caps_parse(struct ath12k_pdev *pdev, u32 band, 4396 const __le32 cap_mac_info[], 4397 const __le32 cap_phy_info[], 4398 const __le32 supp_mcs[], 4399 const struct ath12k_wmi_ppe_threshold_params *ppet, 4400 __le32 cap_info_internal) 4401 { 4402 struct ath12k_band_cap *cap_band = &pdev->cap.band[band]; 4403 u32 support_320mhz; 4404 u8 i; 4405 4406 if (band == NL80211_BAND_6GHZ) 4407 support_320mhz = cap_band->eht_cap_phy_info[0] & 4408 IEEE80211_EHT_PHY_CAP0_320MHZ_IN_6GHZ; 4409 4410 for (i = 0; i < WMI_MAX_EHTCAP_MAC_SIZE; i++) 4411 cap_band->eht_cap_mac_info[i] = le32_to_cpu(cap_mac_info[i]); 4412 4413 for (i = 0; i < WMI_MAX_EHTCAP_PHY_SIZE; i++) 4414 cap_band->eht_cap_phy_info[i] = le32_to_cpu(cap_phy_info[i]); 4415 4416 if (band == NL80211_BAND_6GHZ) 4417 cap_band->eht_cap_phy_info[0] |= support_320mhz; 4418 4419 cap_band->eht_mcs_20_only = le32_to_cpu(supp_mcs[0]); 4420 cap_band->eht_mcs_80 = le32_to_cpu(supp_mcs[1]); 4421 if (band != NL80211_BAND_2GHZ) { 4422 cap_band->eht_mcs_160 = le32_to_cpu(supp_mcs[2]); 4423 cap_band->eht_mcs_320 = le32_to_cpu(supp_mcs[3]); 4424 } 4425 4426 cap_band->eht_ppet.numss_m1 = le32_to_cpu(ppet->numss_m1); 4427 cap_band->eht_ppet.ru_bit_mask = le32_to_cpu(ppet->ru_info); 4428 for (i = 0; i < WMI_MAX_NUM_SS; i++) 4429 cap_band->eht_ppet.ppet16_ppet8_ru3_ru0[i] = 4430 le32_to_cpu(ppet->ppet16_ppet8_ru3_ru0[i]); 4431 4432 cap_band->eht_cap_info_internal = le32_to_cpu(cap_info_internal); 4433 } 4434 4435 static int 4436 ath12k_wmi_tlv_mac_phy_caps_ext_parse(struct ath12k_base *ab, 4437 const struct ath12k_wmi_caps_ext_params *caps, 4438 struct ath12k_pdev *pdev) 4439 { 4440 struct ath12k_band_cap *cap_band; 4441 u32 bands, support_320mhz; 4442 int i; 4443 4444 if (ab->hw_params->single_pdev_only) { 4445 if (caps->hw_mode_id == WMI_HOST_HW_MODE_SINGLE) { 4446 support_320mhz = le32_to_cpu(caps->eht_cap_phy_info_5ghz[0]) & 4447 IEEE80211_EHT_PHY_CAP0_320MHZ_IN_6GHZ; 4448 cap_band = &pdev->cap.band[NL80211_BAND_6GHZ]; 4449 cap_band->eht_cap_phy_info[0] |= support_320mhz; 4450 return 0; 4451 } 4452 4453 for (i = 0; i < ab->fw_pdev_count; i++) { 4454 struct ath12k_fw_pdev *fw_pdev = &ab->fw_pdev[i]; 4455 4456 if (fw_pdev->pdev_id == ath12k_wmi_caps_ext_get_pdev_id(caps) && 4457 fw_pdev->phy_id == le32_to_cpu(caps->phy_id)) { 4458 bands = fw_pdev->supported_bands; 4459 break; 4460 } 4461 } 4462 4463 if (i == ab->fw_pdev_count) 4464 return -EINVAL; 4465 } else { 4466 bands = pdev->cap.supported_bands; 4467 } 4468 4469 if (bands & WMI_HOST_WLAN_2G_CAP) { 4470 ath12k_wmi_eht_caps_parse(pdev, NL80211_BAND_2GHZ, 4471 caps->eht_cap_mac_info_2ghz, 4472 caps->eht_cap_phy_info_2ghz, 4473 caps->eht_supp_mcs_ext_2ghz, 4474 &caps->eht_ppet_2ghz, 4475 caps->eht_cap_info_internal); 4476 } 4477 4478 if (bands & WMI_HOST_WLAN_5G_CAP) { 4479 ath12k_wmi_eht_caps_parse(pdev, NL80211_BAND_5GHZ, 4480 caps->eht_cap_mac_info_5ghz, 4481 caps->eht_cap_phy_info_5ghz, 4482 caps->eht_supp_mcs_ext_5ghz, 4483 &caps->eht_ppet_5ghz, 4484 caps->eht_cap_info_internal); 4485 4486 ath12k_wmi_eht_caps_parse(pdev, NL80211_BAND_6GHZ, 4487 caps->eht_cap_mac_info_5ghz, 4488 caps->eht_cap_phy_info_5ghz, 4489 caps->eht_supp_mcs_ext_5ghz, 4490 &caps->eht_ppet_5ghz, 4491 caps->eht_cap_info_internal); 4492 } 4493 4494 return 0; 4495 } 4496 4497 static int ath12k_wmi_tlv_mac_phy_caps_ext(struct ath12k_base *ab, u16 tag, 4498 u16 len, const void *ptr, 4499 void *data) 4500 { 4501 const struct ath12k_wmi_caps_ext_params *caps = ptr; 4502 int i = 0, ret; 4503 4504 if (tag != WMI_TAG_MAC_PHY_CAPABILITIES_EXT) 4505 return -EPROTO; 4506 4507 if (ab->hw_params->single_pdev_only) { 4508 if (ab->wmi_ab.preferred_hw_mode != le32_to_cpu(caps->hw_mode_id) && 4509 caps->hw_mode_id != WMI_HOST_HW_MODE_SINGLE) 4510 return 0; 4511 } else { 4512 for (i = 0; i < ab->num_radios; i++) { 4513 if (ab->pdevs[i].pdev_id == 4514 ath12k_wmi_caps_ext_get_pdev_id(caps)) 4515 break; 4516 } 4517 4518 if (i == ab->num_radios) 4519 return -EINVAL; 4520 } 4521 4522 ret = ath12k_wmi_tlv_mac_phy_caps_ext_parse(ab, caps, &ab->pdevs[i]); 4523 if (ret) { 4524 ath12k_warn(ab, 4525 "failed to parse extended MAC PHY capabilities for pdev %d: %d\n", 4526 ret, ab->pdevs[i].pdev_id); 4527 return ret; 4528 } 4529 4530 return 0; 4531 } 4532 4533 static int ath12k_wmi_svc_rdy_ext2_parse(struct ath12k_base *ab, 4534 u16 tag, u16 len, 4535 const void *ptr, void *data) 4536 { 4537 struct ath12k_wmi_pdev *wmi_handle = &ab->wmi_ab.wmi[0]; 4538 struct ath12k_wmi_svc_rdy_ext2_parse *parse = data; 4539 int ret; 4540 4541 switch (tag) { 4542 case WMI_TAG_SERVICE_READY_EXT2_EVENT: 4543 ret = ath12k_pull_svc_ready_ext2(wmi_handle, ptr, 4544 &parse->arg); 4545 if (ret) { 4546 ath12k_warn(ab, 4547 "failed to extract wmi service ready ext2 parameters: %d\n", 4548 ret); 4549 return ret; 4550 } 4551 break; 4552 4553 case WMI_TAG_ARRAY_STRUCT: 4554 if (!parse->dma_ring_cap_done) { 4555 ret = ath12k_wmi_dma_ring_caps(ab, len, ptr, 4556 &parse->dma_caps_parse); 4557 if (ret) 4558 return ret; 4559 4560 parse->dma_ring_cap_done = true; 4561 } else if (!parse->spectral_bin_scaling_done) { 4562 /* TODO: This is a place-holder as WMI tag for 4563 * spectral scaling is before 4564 * WMI_TAG_MAC_PHY_CAPABILITIES_EXT 4565 */ 4566 parse->spectral_bin_scaling_done = true; 4567 } else if (!parse->mac_phy_caps_ext_done) { 4568 ret = ath12k_wmi_tlv_iter(ab, ptr, len, 4569 ath12k_wmi_tlv_mac_phy_caps_ext, 4570 parse); 4571 if (ret) { 4572 ath12k_warn(ab, "failed to parse extended MAC PHY capabilities WMI TLV: %d\n", 4573 ret); 4574 return ret; 4575 } 4576 4577 parse->mac_phy_caps_ext_done = true; 4578 } 4579 break; 4580 default: 4581 break; 4582 } 4583 4584 return 0; 4585 } 4586 4587 static int ath12k_service_ready_ext2_event(struct ath12k_base *ab, 4588 struct sk_buff *skb) 4589 { 4590 struct ath12k_wmi_svc_rdy_ext2_parse svc_rdy_ext2 = { }; 4591 int ret; 4592 4593 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 4594 ath12k_wmi_svc_rdy_ext2_parse, 4595 &svc_rdy_ext2); 4596 if (ret) { 4597 ath12k_warn(ab, "failed to parse ext2 event tlv %d\n", ret); 4598 goto err; 4599 } 4600 4601 complete(&ab->wmi_ab.service_ready); 4602 4603 return 0; 4604 4605 err: 4606 ath12k_wmi_free_dbring_caps(ab); 4607 return ret; 4608 } 4609 4610 static int ath12k_pull_vdev_start_resp_tlv(struct ath12k_base *ab, struct sk_buff *skb, 4611 struct wmi_vdev_start_resp_event *vdev_rsp) 4612 { 4613 const void **tb; 4614 const struct wmi_vdev_start_resp_event *ev; 4615 int ret; 4616 4617 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 4618 if (IS_ERR(tb)) { 4619 ret = PTR_ERR(tb); 4620 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 4621 return ret; 4622 } 4623 4624 ev = tb[WMI_TAG_VDEV_START_RESPONSE_EVENT]; 4625 if (!ev) { 4626 ath12k_warn(ab, "failed to fetch vdev start resp ev"); 4627 kfree(tb); 4628 return -EPROTO; 4629 } 4630 4631 *vdev_rsp = *ev; 4632 4633 kfree(tb); 4634 return 0; 4635 } 4636 4637 static struct ath12k_reg_rule 4638 *create_ext_reg_rules_from_wmi(u32 num_reg_rules, 4639 struct ath12k_wmi_reg_rule_ext_params *wmi_reg_rule) 4640 { 4641 struct ath12k_reg_rule *reg_rule_ptr; 4642 u32 count; 4643 4644 reg_rule_ptr = kzalloc((num_reg_rules * sizeof(*reg_rule_ptr)), 4645 GFP_ATOMIC); 4646 4647 if (!reg_rule_ptr) 4648 return NULL; 4649 4650 for (count = 0; count < num_reg_rules; count++) { 4651 reg_rule_ptr[count].start_freq = 4652 le32_get_bits(wmi_reg_rule[count].freq_info, 4653 REG_RULE_START_FREQ); 4654 reg_rule_ptr[count].end_freq = 4655 le32_get_bits(wmi_reg_rule[count].freq_info, 4656 REG_RULE_END_FREQ); 4657 reg_rule_ptr[count].max_bw = 4658 le32_get_bits(wmi_reg_rule[count].bw_pwr_info, 4659 REG_RULE_MAX_BW); 4660 reg_rule_ptr[count].reg_power = 4661 le32_get_bits(wmi_reg_rule[count].bw_pwr_info, 4662 REG_RULE_REG_PWR); 4663 reg_rule_ptr[count].ant_gain = 4664 le32_get_bits(wmi_reg_rule[count].bw_pwr_info, 4665 REG_RULE_ANT_GAIN); 4666 reg_rule_ptr[count].flags = 4667 le32_get_bits(wmi_reg_rule[count].flag_info, 4668 REG_RULE_FLAGS); 4669 reg_rule_ptr[count].psd_flag = 4670 le32_get_bits(wmi_reg_rule[count].psd_power_info, 4671 REG_RULE_PSD_INFO); 4672 reg_rule_ptr[count].psd_eirp = 4673 le32_get_bits(wmi_reg_rule[count].psd_power_info, 4674 REG_RULE_PSD_EIRP); 4675 } 4676 4677 return reg_rule_ptr; 4678 } 4679 4680 static int ath12k_pull_reg_chan_list_ext_update_ev(struct ath12k_base *ab, 4681 struct sk_buff *skb, 4682 struct ath12k_reg_info *reg_info) 4683 { 4684 const void **tb; 4685 const struct wmi_reg_chan_list_cc_ext_event *ev; 4686 struct ath12k_wmi_reg_rule_ext_params *ext_wmi_reg_rule; 4687 u32 num_2g_reg_rules, num_5g_reg_rules; 4688 u32 num_6g_reg_rules_ap[WMI_REG_CURRENT_MAX_AP_TYPE]; 4689 u32 num_6g_reg_rules_cl[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE]; 4690 u32 total_reg_rules = 0; 4691 int ret, i, j; 4692 4693 ath12k_dbg(ab, ATH12K_DBG_WMI, "processing regulatory ext channel list\n"); 4694 4695 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 4696 if (IS_ERR(tb)) { 4697 ret = PTR_ERR(tb); 4698 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 4699 return ret; 4700 } 4701 4702 ev = tb[WMI_TAG_REG_CHAN_LIST_CC_EXT_EVENT]; 4703 if (!ev) { 4704 ath12k_warn(ab, "failed to fetch reg chan list ext update ev\n"); 4705 kfree(tb); 4706 return -EPROTO; 4707 } 4708 4709 reg_info->num_2g_reg_rules = le32_to_cpu(ev->num_2g_reg_rules); 4710 reg_info->num_5g_reg_rules = le32_to_cpu(ev->num_5g_reg_rules); 4711 reg_info->num_6g_reg_rules_ap[WMI_REG_INDOOR_AP] = 4712 le32_to_cpu(ev->num_6g_reg_rules_ap_lpi); 4713 reg_info->num_6g_reg_rules_ap[WMI_REG_STD_POWER_AP] = 4714 le32_to_cpu(ev->num_6g_reg_rules_ap_sp); 4715 reg_info->num_6g_reg_rules_ap[WMI_REG_VLP_AP] = 4716 le32_to_cpu(ev->num_6g_reg_rules_ap_vlp); 4717 4718 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) { 4719 reg_info->num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i] = 4720 le32_to_cpu(ev->num_6g_reg_rules_cl_lpi[i]); 4721 reg_info->num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i] = 4722 le32_to_cpu(ev->num_6g_reg_rules_cl_sp[i]); 4723 reg_info->num_6g_reg_rules_cl[WMI_REG_VLP_AP][i] = 4724 le32_to_cpu(ev->num_6g_reg_rules_cl_vlp[i]); 4725 } 4726 4727 num_2g_reg_rules = reg_info->num_2g_reg_rules; 4728 total_reg_rules += num_2g_reg_rules; 4729 num_5g_reg_rules = reg_info->num_5g_reg_rules; 4730 total_reg_rules += num_5g_reg_rules; 4731 4732 if (num_2g_reg_rules > MAX_REG_RULES || num_5g_reg_rules > MAX_REG_RULES) { 4733 ath12k_warn(ab, "Num reg rules for 2G/5G exceeds max limit (num_2g_reg_rules: %d num_5g_reg_rules: %d max_rules: %d)\n", 4734 num_2g_reg_rules, num_5g_reg_rules, MAX_REG_RULES); 4735 kfree(tb); 4736 return -EINVAL; 4737 } 4738 4739 for (i = 0; i < WMI_REG_CURRENT_MAX_AP_TYPE; i++) { 4740 num_6g_reg_rules_ap[i] = reg_info->num_6g_reg_rules_ap[i]; 4741 4742 if (num_6g_reg_rules_ap[i] > MAX_6G_REG_RULES) { 4743 ath12k_warn(ab, "Num 6G reg rules for AP mode(%d) exceeds max limit (num_6g_reg_rules_ap: %d, max_rules: %d)\n", 4744 i, num_6g_reg_rules_ap[i], MAX_6G_REG_RULES); 4745 kfree(tb); 4746 return -EINVAL; 4747 } 4748 4749 total_reg_rules += num_6g_reg_rules_ap[i]; 4750 } 4751 4752 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) { 4753 num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i] = 4754 reg_info->num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i]; 4755 total_reg_rules += num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i]; 4756 4757 num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i] = 4758 reg_info->num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i]; 4759 total_reg_rules += num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i]; 4760 4761 num_6g_reg_rules_cl[WMI_REG_VLP_AP][i] = 4762 reg_info->num_6g_reg_rules_cl[WMI_REG_VLP_AP][i]; 4763 total_reg_rules += num_6g_reg_rules_cl[WMI_REG_VLP_AP][i]; 4764 4765 if (num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i] > MAX_6G_REG_RULES || 4766 num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i] > MAX_6G_REG_RULES || 4767 num_6g_reg_rules_cl[WMI_REG_VLP_AP][i] > MAX_6G_REG_RULES) { 4768 ath12k_warn(ab, "Num 6g client reg rules exceeds max limit, for client(type: %d)\n", 4769 i); 4770 kfree(tb); 4771 return -EINVAL; 4772 } 4773 } 4774 4775 if (!total_reg_rules) { 4776 ath12k_warn(ab, "No reg rules available\n"); 4777 kfree(tb); 4778 return -EINVAL; 4779 } 4780 4781 memcpy(reg_info->alpha2, &ev->alpha2, REG_ALPHA2_LEN); 4782 4783 /* FIXME: Currently FW includes 6G reg rule also in 5G rule 4784 * list for country US. 4785 * Having same 6G reg rule in 5G and 6G rules list causes 4786 * intersect check to be true, and same rules will be shown 4787 * multiple times in iw cmd. So added hack below to avoid 4788 * parsing 6G rule from 5G reg rule list, and this can be 4789 * removed later, after FW updates to remove 6G reg rule 4790 * from 5G rules list. 4791 */ 4792 if (memcmp(reg_info->alpha2, "US", 2) == 0) { 4793 reg_info->num_5g_reg_rules = REG_US_5G_NUM_REG_RULES; 4794 num_5g_reg_rules = reg_info->num_5g_reg_rules; 4795 } 4796 4797 reg_info->dfs_region = le32_to_cpu(ev->dfs_region); 4798 reg_info->phybitmap = le32_to_cpu(ev->phybitmap); 4799 reg_info->num_phy = le32_to_cpu(ev->num_phy); 4800 reg_info->phy_id = le32_to_cpu(ev->phy_id); 4801 reg_info->ctry_code = le32_to_cpu(ev->country_id); 4802 reg_info->reg_dmn_pair = le32_to_cpu(ev->domain_code); 4803 4804 switch (le32_to_cpu(ev->status_code)) { 4805 case WMI_REG_SET_CC_STATUS_PASS: 4806 reg_info->status_code = REG_SET_CC_STATUS_PASS; 4807 break; 4808 case WMI_REG_CURRENT_ALPHA2_NOT_FOUND: 4809 reg_info->status_code = REG_CURRENT_ALPHA2_NOT_FOUND; 4810 break; 4811 case WMI_REG_INIT_ALPHA2_NOT_FOUND: 4812 reg_info->status_code = REG_INIT_ALPHA2_NOT_FOUND; 4813 break; 4814 case WMI_REG_SET_CC_CHANGE_NOT_ALLOWED: 4815 reg_info->status_code = REG_SET_CC_CHANGE_NOT_ALLOWED; 4816 break; 4817 case WMI_REG_SET_CC_STATUS_NO_MEMORY: 4818 reg_info->status_code = REG_SET_CC_STATUS_NO_MEMORY; 4819 break; 4820 case WMI_REG_SET_CC_STATUS_FAIL: 4821 reg_info->status_code = REG_SET_CC_STATUS_FAIL; 4822 break; 4823 } 4824 4825 reg_info->is_ext_reg_event = true; 4826 4827 reg_info->min_bw_2g = le32_to_cpu(ev->min_bw_2g); 4828 reg_info->max_bw_2g = le32_to_cpu(ev->max_bw_2g); 4829 reg_info->min_bw_5g = le32_to_cpu(ev->min_bw_5g); 4830 reg_info->max_bw_5g = le32_to_cpu(ev->max_bw_5g); 4831 reg_info->min_bw_6g_ap[WMI_REG_INDOOR_AP] = le32_to_cpu(ev->min_bw_6g_ap_lpi); 4832 reg_info->max_bw_6g_ap[WMI_REG_INDOOR_AP] = le32_to_cpu(ev->max_bw_6g_ap_lpi); 4833 reg_info->min_bw_6g_ap[WMI_REG_STD_POWER_AP] = le32_to_cpu(ev->min_bw_6g_ap_sp); 4834 reg_info->max_bw_6g_ap[WMI_REG_STD_POWER_AP] = le32_to_cpu(ev->max_bw_6g_ap_sp); 4835 reg_info->min_bw_6g_ap[WMI_REG_VLP_AP] = le32_to_cpu(ev->min_bw_6g_ap_vlp); 4836 reg_info->max_bw_6g_ap[WMI_REG_VLP_AP] = le32_to_cpu(ev->max_bw_6g_ap_vlp); 4837 4838 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) { 4839 reg_info->min_bw_6g_client[WMI_REG_INDOOR_AP][i] = 4840 le32_to_cpu(ev->min_bw_6g_client_lpi[i]); 4841 reg_info->max_bw_6g_client[WMI_REG_INDOOR_AP][i] = 4842 le32_to_cpu(ev->max_bw_6g_client_lpi[i]); 4843 reg_info->min_bw_6g_client[WMI_REG_STD_POWER_AP][i] = 4844 le32_to_cpu(ev->min_bw_6g_client_sp[i]); 4845 reg_info->max_bw_6g_client[WMI_REG_STD_POWER_AP][i] = 4846 le32_to_cpu(ev->max_bw_6g_client_sp[i]); 4847 reg_info->min_bw_6g_client[WMI_REG_VLP_AP][i] = 4848 le32_to_cpu(ev->min_bw_6g_client_vlp[i]); 4849 reg_info->max_bw_6g_client[WMI_REG_VLP_AP][i] = 4850 le32_to_cpu(ev->max_bw_6g_client_vlp[i]); 4851 } 4852 4853 ath12k_dbg(ab, ATH12K_DBG_WMI, 4854 "%s:cc_ext %s dfs %d BW: min_2g %d max_2g %d min_5g %d max_5g %d phy_bitmap 0x%x", 4855 __func__, reg_info->alpha2, reg_info->dfs_region, 4856 reg_info->min_bw_2g, reg_info->max_bw_2g, 4857 reg_info->min_bw_5g, reg_info->max_bw_5g, 4858 reg_info->phybitmap); 4859 4860 ath12k_dbg(ab, ATH12K_DBG_WMI, 4861 "num_2g_reg_rules %d num_5g_reg_rules %d", 4862 num_2g_reg_rules, num_5g_reg_rules); 4863 4864 ath12k_dbg(ab, ATH12K_DBG_WMI, 4865 "num_6g_reg_rules_ap_lpi: %d num_6g_reg_rules_ap_sp: %d num_6g_reg_rules_ap_vlp: %d", 4866 num_6g_reg_rules_ap[WMI_REG_INDOOR_AP], 4867 num_6g_reg_rules_ap[WMI_REG_STD_POWER_AP], 4868 num_6g_reg_rules_ap[WMI_REG_VLP_AP]); 4869 4870 ath12k_dbg(ab, ATH12K_DBG_WMI, 4871 "6g Regular client: num_6g_reg_rules_lpi: %d num_6g_reg_rules_sp: %d num_6g_reg_rules_vlp: %d", 4872 num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][WMI_REG_DEFAULT_CLIENT], 4873 num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][WMI_REG_DEFAULT_CLIENT], 4874 num_6g_reg_rules_cl[WMI_REG_VLP_AP][WMI_REG_DEFAULT_CLIENT]); 4875 4876 ath12k_dbg(ab, ATH12K_DBG_WMI, 4877 "6g Subordinate client: num_6g_reg_rules_lpi: %d num_6g_reg_rules_sp: %d num_6g_reg_rules_vlp: %d", 4878 num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][WMI_REG_SUBORDINATE_CLIENT], 4879 num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][WMI_REG_SUBORDINATE_CLIENT], 4880 num_6g_reg_rules_cl[WMI_REG_VLP_AP][WMI_REG_SUBORDINATE_CLIENT]); 4881 4882 ext_wmi_reg_rule = 4883 (struct ath12k_wmi_reg_rule_ext_params *)((u8 *)ev 4884 + sizeof(*ev) 4885 + sizeof(struct wmi_tlv)); 4886 4887 if (num_2g_reg_rules) { 4888 reg_info->reg_rules_2g_ptr = 4889 create_ext_reg_rules_from_wmi(num_2g_reg_rules, 4890 ext_wmi_reg_rule); 4891 4892 if (!reg_info->reg_rules_2g_ptr) { 4893 kfree(tb); 4894 ath12k_warn(ab, "Unable to Allocate memory for 2g rules\n"); 4895 return -ENOMEM; 4896 } 4897 } 4898 4899 if (num_5g_reg_rules) { 4900 ext_wmi_reg_rule += num_2g_reg_rules; 4901 reg_info->reg_rules_5g_ptr = 4902 create_ext_reg_rules_from_wmi(num_5g_reg_rules, 4903 ext_wmi_reg_rule); 4904 4905 if (!reg_info->reg_rules_5g_ptr) { 4906 kfree(tb); 4907 ath12k_warn(ab, "Unable to Allocate memory for 5g rules\n"); 4908 return -ENOMEM; 4909 } 4910 } 4911 4912 ext_wmi_reg_rule += num_5g_reg_rules; 4913 4914 for (i = 0; i < WMI_REG_CURRENT_MAX_AP_TYPE; i++) { 4915 reg_info->reg_rules_6g_ap_ptr[i] = 4916 create_ext_reg_rules_from_wmi(num_6g_reg_rules_ap[i], 4917 ext_wmi_reg_rule); 4918 4919 if (!reg_info->reg_rules_6g_ap_ptr[i]) { 4920 kfree(tb); 4921 ath12k_warn(ab, "Unable to Allocate memory for 6g ap rules\n"); 4922 return -ENOMEM; 4923 } 4924 4925 ext_wmi_reg_rule += num_6g_reg_rules_ap[i]; 4926 } 4927 4928 for (j = 0; j < WMI_REG_CURRENT_MAX_AP_TYPE; j++) { 4929 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) { 4930 reg_info->reg_rules_6g_client_ptr[j][i] = 4931 create_ext_reg_rules_from_wmi(num_6g_reg_rules_cl[j][i], 4932 ext_wmi_reg_rule); 4933 4934 if (!reg_info->reg_rules_6g_client_ptr[j][i]) { 4935 kfree(tb); 4936 ath12k_warn(ab, "Unable to Allocate memory for 6g client rules\n"); 4937 return -ENOMEM; 4938 } 4939 4940 ext_wmi_reg_rule += num_6g_reg_rules_cl[j][i]; 4941 } 4942 } 4943 4944 reg_info->client_type = le32_to_cpu(ev->client_type); 4945 reg_info->rnr_tpe_usable = ev->rnr_tpe_usable; 4946 reg_info->unspecified_ap_usable = ev->unspecified_ap_usable; 4947 reg_info->domain_code_6g_ap[WMI_REG_INDOOR_AP] = 4948 le32_to_cpu(ev->domain_code_6g_ap_lpi); 4949 reg_info->domain_code_6g_ap[WMI_REG_STD_POWER_AP] = 4950 le32_to_cpu(ev->domain_code_6g_ap_sp); 4951 reg_info->domain_code_6g_ap[WMI_REG_VLP_AP] = 4952 le32_to_cpu(ev->domain_code_6g_ap_vlp); 4953 4954 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) { 4955 reg_info->domain_code_6g_client[WMI_REG_INDOOR_AP][i] = 4956 le32_to_cpu(ev->domain_code_6g_client_lpi[i]); 4957 reg_info->domain_code_6g_client[WMI_REG_STD_POWER_AP][i] = 4958 le32_to_cpu(ev->domain_code_6g_client_sp[i]); 4959 reg_info->domain_code_6g_client[WMI_REG_VLP_AP][i] = 4960 le32_to_cpu(ev->domain_code_6g_client_vlp[i]); 4961 } 4962 4963 reg_info->domain_code_6g_super_id = le32_to_cpu(ev->domain_code_6g_super_id); 4964 4965 ath12k_dbg(ab, ATH12K_DBG_WMI, "6g client_type: %d domain_code_6g_super_id: %d", 4966 reg_info->client_type, reg_info->domain_code_6g_super_id); 4967 4968 ath12k_dbg(ab, ATH12K_DBG_WMI, "processed regulatory ext channel list\n"); 4969 4970 kfree(tb); 4971 return 0; 4972 } 4973 4974 static int ath12k_pull_peer_del_resp_ev(struct ath12k_base *ab, struct sk_buff *skb, 4975 struct wmi_peer_delete_resp_event *peer_del_resp) 4976 { 4977 const void **tb; 4978 const struct wmi_peer_delete_resp_event *ev; 4979 int ret; 4980 4981 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 4982 if (IS_ERR(tb)) { 4983 ret = PTR_ERR(tb); 4984 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 4985 return ret; 4986 } 4987 4988 ev = tb[WMI_TAG_PEER_DELETE_RESP_EVENT]; 4989 if (!ev) { 4990 ath12k_warn(ab, "failed to fetch peer delete resp ev"); 4991 kfree(tb); 4992 return -EPROTO; 4993 } 4994 4995 memset(peer_del_resp, 0, sizeof(*peer_del_resp)); 4996 4997 peer_del_resp->vdev_id = ev->vdev_id; 4998 ether_addr_copy(peer_del_resp->peer_macaddr.addr, 4999 ev->peer_macaddr.addr); 5000 5001 kfree(tb); 5002 return 0; 5003 } 5004 5005 static int ath12k_pull_vdev_del_resp_ev(struct ath12k_base *ab, 5006 struct sk_buff *skb, 5007 u32 *vdev_id) 5008 { 5009 const void **tb; 5010 const struct wmi_vdev_delete_resp_event *ev; 5011 int ret; 5012 5013 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 5014 if (IS_ERR(tb)) { 5015 ret = PTR_ERR(tb); 5016 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5017 return ret; 5018 } 5019 5020 ev = tb[WMI_TAG_VDEV_DELETE_RESP_EVENT]; 5021 if (!ev) { 5022 ath12k_warn(ab, "failed to fetch vdev delete resp ev"); 5023 kfree(tb); 5024 return -EPROTO; 5025 } 5026 5027 *vdev_id = le32_to_cpu(ev->vdev_id); 5028 5029 kfree(tb); 5030 return 0; 5031 } 5032 5033 static int ath12k_pull_bcn_tx_status_ev(struct ath12k_base *ab, 5034 struct sk_buff *skb, 5035 u32 *vdev_id, u32 *tx_status) 5036 { 5037 const void **tb; 5038 const struct wmi_bcn_tx_status_event *ev; 5039 int ret; 5040 5041 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 5042 if (IS_ERR(tb)) { 5043 ret = PTR_ERR(tb); 5044 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5045 return ret; 5046 } 5047 5048 ev = tb[WMI_TAG_OFFLOAD_BCN_TX_STATUS_EVENT]; 5049 if (!ev) { 5050 ath12k_warn(ab, "failed to fetch bcn tx status ev"); 5051 kfree(tb); 5052 return -EPROTO; 5053 } 5054 5055 *vdev_id = le32_to_cpu(ev->vdev_id); 5056 *tx_status = le32_to_cpu(ev->tx_status); 5057 5058 kfree(tb); 5059 return 0; 5060 } 5061 5062 static int ath12k_pull_vdev_stopped_param_tlv(struct ath12k_base *ab, struct sk_buff *skb, 5063 u32 *vdev_id) 5064 { 5065 const void **tb; 5066 const struct wmi_vdev_stopped_event *ev; 5067 int ret; 5068 5069 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 5070 if (IS_ERR(tb)) { 5071 ret = PTR_ERR(tb); 5072 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5073 return ret; 5074 } 5075 5076 ev = tb[WMI_TAG_VDEV_STOPPED_EVENT]; 5077 if (!ev) { 5078 ath12k_warn(ab, "failed to fetch vdev stop ev"); 5079 kfree(tb); 5080 return -EPROTO; 5081 } 5082 5083 *vdev_id = le32_to_cpu(ev->vdev_id); 5084 5085 kfree(tb); 5086 return 0; 5087 } 5088 5089 static int ath12k_wmi_tlv_mgmt_rx_parse(struct ath12k_base *ab, 5090 u16 tag, u16 len, 5091 const void *ptr, void *data) 5092 { 5093 struct wmi_tlv_mgmt_rx_parse *parse = data; 5094 5095 switch (tag) { 5096 case WMI_TAG_MGMT_RX_HDR: 5097 parse->fixed = ptr; 5098 break; 5099 case WMI_TAG_ARRAY_BYTE: 5100 if (!parse->frame_buf_done) { 5101 parse->frame_buf = ptr; 5102 parse->frame_buf_done = true; 5103 } 5104 break; 5105 } 5106 return 0; 5107 } 5108 5109 static int ath12k_pull_mgmt_rx_params_tlv(struct ath12k_base *ab, 5110 struct sk_buff *skb, 5111 struct ath12k_wmi_mgmt_rx_arg *hdr) 5112 { 5113 struct wmi_tlv_mgmt_rx_parse parse = { }; 5114 const struct ath12k_wmi_mgmt_rx_params *ev; 5115 const u8 *frame; 5116 int i, ret; 5117 5118 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 5119 ath12k_wmi_tlv_mgmt_rx_parse, 5120 &parse); 5121 if (ret) { 5122 ath12k_warn(ab, "failed to parse mgmt rx tlv %d\n", ret); 5123 return ret; 5124 } 5125 5126 ev = parse.fixed; 5127 frame = parse.frame_buf; 5128 5129 if (!ev || !frame) { 5130 ath12k_warn(ab, "failed to fetch mgmt rx hdr"); 5131 return -EPROTO; 5132 } 5133 5134 hdr->pdev_id = le32_to_cpu(ev->pdev_id); 5135 hdr->chan_freq = le32_to_cpu(ev->chan_freq); 5136 hdr->channel = le32_to_cpu(ev->channel); 5137 hdr->snr = le32_to_cpu(ev->snr); 5138 hdr->rate = le32_to_cpu(ev->rate); 5139 hdr->phy_mode = le32_to_cpu(ev->phy_mode); 5140 hdr->buf_len = le32_to_cpu(ev->buf_len); 5141 hdr->status = le32_to_cpu(ev->status); 5142 hdr->flags = le32_to_cpu(ev->flags); 5143 hdr->rssi = a_sle32_to_cpu(ev->rssi); 5144 hdr->tsf_delta = le32_to_cpu(ev->tsf_delta); 5145 5146 for (i = 0; i < ATH_MAX_ANTENNA; i++) 5147 hdr->rssi_ctl[i] = le32_to_cpu(ev->rssi_ctl[i]); 5148 5149 if (skb->len < (frame - skb->data) + hdr->buf_len) { 5150 ath12k_warn(ab, "invalid length in mgmt rx hdr ev"); 5151 return -EPROTO; 5152 } 5153 5154 /* shift the sk_buff to point to `frame` */ 5155 skb_trim(skb, 0); 5156 skb_put(skb, frame - skb->data); 5157 skb_pull(skb, frame - skb->data); 5158 skb_put(skb, hdr->buf_len); 5159 5160 return 0; 5161 } 5162 5163 static int wmi_process_mgmt_tx_comp(struct ath12k *ar, u32 desc_id, 5164 u32 status) 5165 { 5166 struct sk_buff *msdu; 5167 struct ieee80211_tx_info *info; 5168 struct ath12k_skb_cb *skb_cb; 5169 int num_mgmt; 5170 5171 spin_lock_bh(&ar->txmgmt_idr_lock); 5172 msdu = idr_find(&ar->txmgmt_idr, desc_id); 5173 5174 if (!msdu) { 5175 ath12k_warn(ar->ab, "received mgmt tx compl for invalid msdu_id: %d\n", 5176 desc_id); 5177 spin_unlock_bh(&ar->txmgmt_idr_lock); 5178 return -ENOENT; 5179 } 5180 5181 idr_remove(&ar->txmgmt_idr, desc_id); 5182 spin_unlock_bh(&ar->txmgmt_idr_lock); 5183 5184 skb_cb = ATH12K_SKB_CB(msdu); 5185 dma_unmap_single(ar->ab->dev, skb_cb->paddr, msdu->len, DMA_TO_DEVICE); 5186 5187 info = IEEE80211_SKB_CB(msdu); 5188 if ((!(info->flags & IEEE80211_TX_CTL_NO_ACK)) && !status) 5189 info->flags |= IEEE80211_TX_STAT_ACK; 5190 5191 ieee80211_tx_status_irqsafe(ath12k_ar_to_hw(ar), msdu); 5192 5193 num_mgmt = atomic_dec_if_positive(&ar->num_pending_mgmt_tx); 5194 5195 /* WARN when we received this event without doing any mgmt tx */ 5196 if (num_mgmt < 0) 5197 WARN_ON_ONCE(1); 5198 5199 if (!num_mgmt) 5200 wake_up(&ar->txmgmt_empty_waitq); 5201 5202 return 0; 5203 } 5204 5205 static int ath12k_pull_mgmt_tx_compl_param_tlv(struct ath12k_base *ab, 5206 struct sk_buff *skb, 5207 struct wmi_mgmt_tx_compl_event *param) 5208 { 5209 const void **tb; 5210 const struct wmi_mgmt_tx_compl_event *ev; 5211 int ret; 5212 5213 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 5214 if (IS_ERR(tb)) { 5215 ret = PTR_ERR(tb); 5216 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5217 return ret; 5218 } 5219 5220 ev = tb[WMI_TAG_MGMT_TX_COMPL_EVENT]; 5221 if (!ev) { 5222 ath12k_warn(ab, "failed to fetch mgmt tx compl ev"); 5223 kfree(tb); 5224 return -EPROTO; 5225 } 5226 5227 param->pdev_id = ev->pdev_id; 5228 param->desc_id = ev->desc_id; 5229 param->status = ev->status; 5230 5231 kfree(tb); 5232 return 0; 5233 } 5234 5235 static void ath12k_wmi_event_scan_started(struct ath12k *ar) 5236 { 5237 lockdep_assert_held(&ar->data_lock); 5238 5239 switch (ar->scan.state) { 5240 case ATH12K_SCAN_IDLE: 5241 case ATH12K_SCAN_RUNNING: 5242 case ATH12K_SCAN_ABORTING: 5243 ath12k_warn(ar->ab, "received scan started event in an invalid scan state: %s (%d)\n", 5244 ath12k_scan_state_str(ar->scan.state), 5245 ar->scan.state); 5246 break; 5247 case ATH12K_SCAN_STARTING: 5248 ar->scan.state = ATH12K_SCAN_RUNNING; 5249 5250 if (ar->scan.is_roc) 5251 ieee80211_ready_on_channel(ath12k_ar_to_hw(ar)); 5252 5253 complete(&ar->scan.started); 5254 break; 5255 } 5256 } 5257 5258 static void ath12k_wmi_event_scan_start_failed(struct ath12k *ar) 5259 { 5260 lockdep_assert_held(&ar->data_lock); 5261 5262 switch (ar->scan.state) { 5263 case ATH12K_SCAN_IDLE: 5264 case ATH12K_SCAN_RUNNING: 5265 case ATH12K_SCAN_ABORTING: 5266 ath12k_warn(ar->ab, "received scan start failed event in an invalid scan state: %s (%d)\n", 5267 ath12k_scan_state_str(ar->scan.state), 5268 ar->scan.state); 5269 break; 5270 case ATH12K_SCAN_STARTING: 5271 complete(&ar->scan.started); 5272 __ath12k_mac_scan_finish(ar); 5273 break; 5274 } 5275 } 5276 5277 static void ath12k_wmi_event_scan_completed(struct ath12k *ar) 5278 { 5279 lockdep_assert_held(&ar->data_lock); 5280 5281 switch (ar->scan.state) { 5282 case ATH12K_SCAN_IDLE: 5283 case ATH12K_SCAN_STARTING: 5284 /* One suspected reason scan can be completed while starting is 5285 * if firmware fails to deliver all scan events to the host, 5286 * e.g. when transport pipe is full. This has been observed 5287 * with spectral scan phyerr events starving wmi transport 5288 * pipe. In such case the "scan completed" event should be (and 5289 * is) ignored by the host as it may be just firmware's scan 5290 * state machine recovering. 5291 */ 5292 ath12k_warn(ar->ab, "received scan completed event in an invalid scan state: %s (%d)\n", 5293 ath12k_scan_state_str(ar->scan.state), 5294 ar->scan.state); 5295 break; 5296 case ATH12K_SCAN_RUNNING: 5297 case ATH12K_SCAN_ABORTING: 5298 __ath12k_mac_scan_finish(ar); 5299 break; 5300 } 5301 } 5302 5303 static void ath12k_wmi_event_scan_bss_chan(struct ath12k *ar) 5304 { 5305 lockdep_assert_held(&ar->data_lock); 5306 5307 switch (ar->scan.state) { 5308 case ATH12K_SCAN_IDLE: 5309 case ATH12K_SCAN_STARTING: 5310 ath12k_warn(ar->ab, "received scan bss chan event in an invalid scan state: %s (%d)\n", 5311 ath12k_scan_state_str(ar->scan.state), 5312 ar->scan.state); 5313 break; 5314 case ATH12K_SCAN_RUNNING: 5315 case ATH12K_SCAN_ABORTING: 5316 ar->scan_channel = NULL; 5317 break; 5318 } 5319 } 5320 5321 static void ath12k_wmi_event_scan_foreign_chan(struct ath12k *ar, u32 freq) 5322 { 5323 struct ieee80211_hw *hw = ath12k_ar_to_hw(ar); 5324 5325 lockdep_assert_held(&ar->data_lock); 5326 5327 switch (ar->scan.state) { 5328 case ATH12K_SCAN_IDLE: 5329 case ATH12K_SCAN_STARTING: 5330 ath12k_warn(ar->ab, "received scan foreign chan event in an invalid scan state: %s (%d)\n", 5331 ath12k_scan_state_str(ar->scan.state), 5332 ar->scan.state); 5333 break; 5334 case ATH12K_SCAN_RUNNING: 5335 case ATH12K_SCAN_ABORTING: 5336 ar->scan_channel = ieee80211_get_channel(hw->wiphy, freq); 5337 5338 if (ar->scan.is_roc && ar->scan.roc_freq == freq) 5339 complete(&ar->scan.on_channel); 5340 5341 break; 5342 } 5343 } 5344 5345 static const char * 5346 ath12k_wmi_event_scan_type_str(enum wmi_scan_event_type type, 5347 enum wmi_scan_completion_reason reason) 5348 { 5349 switch (type) { 5350 case WMI_SCAN_EVENT_STARTED: 5351 return "started"; 5352 case WMI_SCAN_EVENT_COMPLETED: 5353 switch (reason) { 5354 case WMI_SCAN_REASON_COMPLETED: 5355 return "completed"; 5356 case WMI_SCAN_REASON_CANCELLED: 5357 return "completed [cancelled]"; 5358 case WMI_SCAN_REASON_PREEMPTED: 5359 return "completed [preempted]"; 5360 case WMI_SCAN_REASON_TIMEDOUT: 5361 return "completed [timedout]"; 5362 case WMI_SCAN_REASON_INTERNAL_FAILURE: 5363 return "completed [internal err]"; 5364 case WMI_SCAN_REASON_MAX: 5365 break; 5366 } 5367 return "completed [unknown]"; 5368 case WMI_SCAN_EVENT_BSS_CHANNEL: 5369 return "bss channel"; 5370 case WMI_SCAN_EVENT_FOREIGN_CHAN: 5371 return "foreign channel"; 5372 case WMI_SCAN_EVENT_DEQUEUED: 5373 return "dequeued"; 5374 case WMI_SCAN_EVENT_PREEMPTED: 5375 return "preempted"; 5376 case WMI_SCAN_EVENT_START_FAILED: 5377 return "start failed"; 5378 case WMI_SCAN_EVENT_RESTARTED: 5379 return "restarted"; 5380 case WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT: 5381 return "foreign channel exit"; 5382 default: 5383 return "unknown"; 5384 } 5385 } 5386 5387 static int ath12k_pull_scan_ev(struct ath12k_base *ab, struct sk_buff *skb, 5388 struct wmi_scan_event *scan_evt_param) 5389 { 5390 const void **tb; 5391 const struct wmi_scan_event *ev; 5392 int ret; 5393 5394 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 5395 if (IS_ERR(tb)) { 5396 ret = PTR_ERR(tb); 5397 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5398 return ret; 5399 } 5400 5401 ev = tb[WMI_TAG_SCAN_EVENT]; 5402 if (!ev) { 5403 ath12k_warn(ab, "failed to fetch scan ev"); 5404 kfree(tb); 5405 return -EPROTO; 5406 } 5407 5408 scan_evt_param->event_type = ev->event_type; 5409 scan_evt_param->reason = ev->reason; 5410 scan_evt_param->channel_freq = ev->channel_freq; 5411 scan_evt_param->scan_req_id = ev->scan_req_id; 5412 scan_evt_param->scan_id = ev->scan_id; 5413 scan_evt_param->vdev_id = ev->vdev_id; 5414 scan_evt_param->tsf_timestamp = ev->tsf_timestamp; 5415 5416 kfree(tb); 5417 return 0; 5418 } 5419 5420 static int ath12k_pull_peer_sta_kickout_ev(struct ath12k_base *ab, struct sk_buff *skb, 5421 struct wmi_peer_sta_kickout_arg *arg) 5422 { 5423 const void **tb; 5424 const struct wmi_peer_sta_kickout_event *ev; 5425 int ret; 5426 5427 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 5428 if (IS_ERR(tb)) { 5429 ret = PTR_ERR(tb); 5430 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5431 return ret; 5432 } 5433 5434 ev = tb[WMI_TAG_PEER_STA_KICKOUT_EVENT]; 5435 if (!ev) { 5436 ath12k_warn(ab, "failed to fetch peer sta kickout ev"); 5437 kfree(tb); 5438 return -EPROTO; 5439 } 5440 5441 arg->mac_addr = ev->peer_macaddr.addr; 5442 5443 kfree(tb); 5444 return 0; 5445 } 5446 5447 static int ath12k_pull_roam_ev(struct ath12k_base *ab, struct sk_buff *skb, 5448 struct wmi_roam_event *roam_ev) 5449 { 5450 const void **tb; 5451 const struct wmi_roam_event *ev; 5452 int ret; 5453 5454 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 5455 if (IS_ERR(tb)) { 5456 ret = PTR_ERR(tb); 5457 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5458 return ret; 5459 } 5460 5461 ev = tb[WMI_TAG_ROAM_EVENT]; 5462 if (!ev) { 5463 ath12k_warn(ab, "failed to fetch roam ev"); 5464 kfree(tb); 5465 return -EPROTO; 5466 } 5467 5468 roam_ev->vdev_id = ev->vdev_id; 5469 roam_ev->reason = ev->reason; 5470 roam_ev->rssi = ev->rssi; 5471 5472 kfree(tb); 5473 return 0; 5474 } 5475 5476 static int freq_to_idx(struct ath12k *ar, int freq) 5477 { 5478 struct ieee80211_supported_band *sband; 5479 struct ieee80211_hw *hw = ath12k_ar_to_hw(ar); 5480 int band, ch, idx = 0; 5481 5482 for (band = NL80211_BAND_2GHZ; band < NUM_NL80211_BANDS; band++) { 5483 if (!ar->mac.sbands[band].channels) 5484 continue; 5485 5486 sband = hw->wiphy->bands[band]; 5487 if (!sband) 5488 continue; 5489 5490 for (ch = 0; ch < sband->n_channels; ch++, idx++) 5491 if (sband->channels[ch].center_freq == freq) 5492 goto exit; 5493 } 5494 5495 exit: 5496 return idx; 5497 } 5498 5499 static int ath12k_pull_chan_info_ev(struct ath12k_base *ab, struct sk_buff *skb, 5500 struct wmi_chan_info_event *ch_info_ev) 5501 { 5502 const void **tb; 5503 const struct wmi_chan_info_event *ev; 5504 int ret; 5505 5506 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 5507 if (IS_ERR(tb)) { 5508 ret = PTR_ERR(tb); 5509 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5510 return ret; 5511 } 5512 5513 ev = tb[WMI_TAG_CHAN_INFO_EVENT]; 5514 if (!ev) { 5515 ath12k_warn(ab, "failed to fetch chan info ev"); 5516 kfree(tb); 5517 return -EPROTO; 5518 } 5519 5520 ch_info_ev->err_code = ev->err_code; 5521 ch_info_ev->freq = ev->freq; 5522 ch_info_ev->cmd_flags = ev->cmd_flags; 5523 ch_info_ev->noise_floor = ev->noise_floor; 5524 ch_info_ev->rx_clear_count = ev->rx_clear_count; 5525 ch_info_ev->cycle_count = ev->cycle_count; 5526 ch_info_ev->chan_tx_pwr_range = ev->chan_tx_pwr_range; 5527 ch_info_ev->chan_tx_pwr_tp = ev->chan_tx_pwr_tp; 5528 ch_info_ev->rx_frame_count = ev->rx_frame_count; 5529 ch_info_ev->tx_frame_cnt = ev->tx_frame_cnt; 5530 ch_info_ev->mac_clk_mhz = ev->mac_clk_mhz; 5531 ch_info_ev->vdev_id = ev->vdev_id; 5532 5533 kfree(tb); 5534 return 0; 5535 } 5536 5537 static int 5538 ath12k_pull_pdev_bss_chan_info_ev(struct ath12k_base *ab, struct sk_buff *skb, 5539 struct wmi_pdev_bss_chan_info_event *bss_ch_info_ev) 5540 { 5541 const void **tb; 5542 const struct wmi_pdev_bss_chan_info_event *ev; 5543 int ret; 5544 5545 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 5546 if (IS_ERR(tb)) { 5547 ret = PTR_ERR(tb); 5548 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5549 return ret; 5550 } 5551 5552 ev = tb[WMI_TAG_PDEV_BSS_CHAN_INFO_EVENT]; 5553 if (!ev) { 5554 ath12k_warn(ab, "failed to fetch pdev bss chan info ev"); 5555 kfree(tb); 5556 return -EPROTO; 5557 } 5558 5559 bss_ch_info_ev->pdev_id = ev->pdev_id; 5560 bss_ch_info_ev->freq = ev->freq; 5561 bss_ch_info_ev->noise_floor = ev->noise_floor; 5562 bss_ch_info_ev->rx_clear_count_low = ev->rx_clear_count_low; 5563 bss_ch_info_ev->rx_clear_count_high = ev->rx_clear_count_high; 5564 bss_ch_info_ev->cycle_count_low = ev->cycle_count_low; 5565 bss_ch_info_ev->cycle_count_high = ev->cycle_count_high; 5566 bss_ch_info_ev->tx_cycle_count_low = ev->tx_cycle_count_low; 5567 bss_ch_info_ev->tx_cycle_count_high = ev->tx_cycle_count_high; 5568 bss_ch_info_ev->rx_cycle_count_low = ev->rx_cycle_count_low; 5569 bss_ch_info_ev->rx_cycle_count_high = ev->rx_cycle_count_high; 5570 bss_ch_info_ev->rx_bss_cycle_count_low = ev->rx_bss_cycle_count_low; 5571 bss_ch_info_ev->rx_bss_cycle_count_high = ev->rx_bss_cycle_count_high; 5572 5573 kfree(tb); 5574 return 0; 5575 } 5576 5577 static int 5578 ath12k_pull_vdev_install_key_compl_ev(struct ath12k_base *ab, struct sk_buff *skb, 5579 struct wmi_vdev_install_key_complete_arg *arg) 5580 { 5581 const void **tb; 5582 const struct wmi_vdev_install_key_compl_event *ev; 5583 int ret; 5584 5585 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 5586 if (IS_ERR(tb)) { 5587 ret = PTR_ERR(tb); 5588 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5589 return ret; 5590 } 5591 5592 ev = tb[WMI_TAG_VDEV_INSTALL_KEY_COMPLETE_EVENT]; 5593 if (!ev) { 5594 ath12k_warn(ab, "failed to fetch vdev install key compl ev"); 5595 kfree(tb); 5596 return -EPROTO; 5597 } 5598 5599 arg->vdev_id = le32_to_cpu(ev->vdev_id); 5600 arg->macaddr = ev->peer_macaddr.addr; 5601 arg->key_idx = le32_to_cpu(ev->key_idx); 5602 arg->key_flags = le32_to_cpu(ev->key_flags); 5603 arg->status = le32_to_cpu(ev->status); 5604 5605 kfree(tb); 5606 return 0; 5607 } 5608 5609 static int ath12k_pull_peer_assoc_conf_ev(struct ath12k_base *ab, struct sk_buff *skb, 5610 struct wmi_peer_assoc_conf_arg *peer_assoc_conf) 5611 { 5612 const void **tb; 5613 const struct wmi_peer_assoc_conf_event *ev; 5614 int ret; 5615 5616 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 5617 if (IS_ERR(tb)) { 5618 ret = PTR_ERR(tb); 5619 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5620 return ret; 5621 } 5622 5623 ev = tb[WMI_TAG_PEER_ASSOC_CONF_EVENT]; 5624 if (!ev) { 5625 ath12k_warn(ab, "failed to fetch peer assoc conf ev"); 5626 kfree(tb); 5627 return -EPROTO; 5628 } 5629 5630 peer_assoc_conf->vdev_id = le32_to_cpu(ev->vdev_id); 5631 peer_assoc_conf->macaddr = ev->peer_macaddr.addr; 5632 5633 kfree(tb); 5634 return 0; 5635 } 5636 5637 static int 5638 ath12k_pull_pdev_temp_ev(struct ath12k_base *ab, struct sk_buff *skb, 5639 const struct wmi_pdev_temperature_event *ev) 5640 { 5641 const void **tb; 5642 int ret; 5643 5644 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 5645 if (IS_ERR(tb)) { 5646 ret = PTR_ERR(tb); 5647 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5648 return ret; 5649 } 5650 5651 ev = tb[WMI_TAG_PDEV_TEMPERATURE_EVENT]; 5652 if (!ev) { 5653 ath12k_warn(ab, "failed to fetch pdev temp ev"); 5654 kfree(tb); 5655 return -EPROTO; 5656 } 5657 5658 kfree(tb); 5659 return 0; 5660 } 5661 5662 static void ath12k_wmi_op_ep_tx_credits(struct ath12k_base *ab) 5663 { 5664 /* try to send pending beacons first. they take priority */ 5665 wake_up(&ab->wmi_ab.tx_credits_wq); 5666 } 5667 5668 static void ath12k_wmi_htc_tx_complete(struct ath12k_base *ab, 5669 struct sk_buff *skb) 5670 { 5671 dev_kfree_skb(skb); 5672 } 5673 5674 static bool ath12k_reg_is_world_alpha(char *alpha) 5675 { 5676 if (alpha[0] == '0' && alpha[1] == '0') 5677 return true; 5678 5679 if (alpha[0] == 'n' && alpha[1] == 'a') 5680 return true; 5681 5682 return false; 5683 } 5684 5685 static int ath12k_reg_chan_list_event(struct ath12k_base *ab, struct sk_buff *skb) 5686 { 5687 struct ath12k_reg_info *reg_info = NULL; 5688 struct ieee80211_regdomain *regd = NULL; 5689 bool intersect = false; 5690 int ret = 0, pdev_idx, i, j; 5691 struct ath12k *ar; 5692 5693 reg_info = kzalloc(sizeof(*reg_info), GFP_ATOMIC); 5694 if (!reg_info) { 5695 ret = -ENOMEM; 5696 goto fallback; 5697 } 5698 5699 ret = ath12k_pull_reg_chan_list_ext_update_ev(ab, skb, reg_info); 5700 5701 if (ret) { 5702 ath12k_warn(ab, "failed to extract regulatory info from received event\n"); 5703 goto fallback; 5704 } 5705 5706 if (reg_info->status_code != REG_SET_CC_STATUS_PASS) { 5707 /* In case of failure to set the requested ctry, 5708 * fw retains the current regd. We print a failure info 5709 * and return from here. 5710 */ 5711 ath12k_warn(ab, "Failed to set the requested Country regulatory setting\n"); 5712 goto mem_free; 5713 } 5714 5715 pdev_idx = reg_info->phy_id; 5716 5717 if (pdev_idx >= ab->num_radios) { 5718 /* Process the event for phy0 only if single_pdev_only 5719 * is true. If pdev_idx is valid but not 0, discard the 5720 * event. Otherwise, it goes to fallback. 5721 */ 5722 if (ab->hw_params->single_pdev_only && 5723 pdev_idx < ab->hw_params->num_rxdma_per_pdev) 5724 goto mem_free; 5725 else 5726 goto fallback; 5727 } 5728 5729 /* Avoid multiple overwrites to default regd, during core 5730 * stop-start after mac registration. 5731 */ 5732 if (ab->default_regd[pdev_idx] && !ab->new_regd[pdev_idx] && 5733 !memcmp(ab->default_regd[pdev_idx]->alpha2, 5734 reg_info->alpha2, 2)) 5735 goto mem_free; 5736 5737 /* Intersect new rules with default regd if a new country setting was 5738 * requested, i.e a default regd was already set during initialization 5739 * and the regd coming from this event has a valid country info. 5740 */ 5741 if (ab->default_regd[pdev_idx] && 5742 !ath12k_reg_is_world_alpha((char *) 5743 ab->default_regd[pdev_idx]->alpha2) && 5744 !ath12k_reg_is_world_alpha((char *)reg_info->alpha2)) 5745 intersect = true; 5746 5747 regd = ath12k_reg_build_regd(ab, reg_info, intersect); 5748 if (!regd) { 5749 ath12k_warn(ab, "failed to build regd from reg_info\n"); 5750 goto fallback; 5751 } 5752 5753 spin_lock(&ab->base_lock); 5754 if (test_bit(ATH12K_FLAG_REGISTERED, &ab->dev_flags)) { 5755 /* Once mac is registered, ar is valid and all CC events from 5756 * fw is considered to be received due to user requests 5757 * currently. 5758 * Free previously built regd before assigning the newly 5759 * generated regd to ar. NULL pointer handling will be 5760 * taken care by kfree itself. 5761 */ 5762 ar = ab->pdevs[pdev_idx].ar; 5763 kfree(ab->new_regd[pdev_idx]); 5764 ab->new_regd[pdev_idx] = regd; 5765 queue_work(ab->workqueue, &ar->regd_update_work); 5766 } else { 5767 /* Multiple events for the same *ar is not expected. But we 5768 * can still clear any previously stored default_regd if we 5769 * are receiving this event for the same radio by mistake. 5770 * NULL pointer handling will be taken care by kfree itself. 5771 */ 5772 kfree(ab->default_regd[pdev_idx]); 5773 /* This regd would be applied during mac registration */ 5774 ab->default_regd[pdev_idx] = regd; 5775 } 5776 ab->dfs_region = reg_info->dfs_region; 5777 spin_unlock(&ab->base_lock); 5778 5779 goto mem_free; 5780 5781 fallback: 5782 /* Fallback to older reg (by sending previous country setting 5783 * again if fw has succeeded and we failed to process here. 5784 * The Regdomain should be uniform across driver and fw. Since the 5785 * FW has processed the command and sent a success status, we expect 5786 * this function to succeed as well. If it doesn't, CTRY needs to be 5787 * reverted at the fw and the old SCAN_CHAN_LIST cmd needs to be sent. 5788 */ 5789 /* TODO: This is rare, but still should also be handled */ 5790 WARN_ON(1); 5791 mem_free: 5792 if (reg_info) { 5793 kfree(reg_info->reg_rules_2g_ptr); 5794 kfree(reg_info->reg_rules_5g_ptr); 5795 if (reg_info->is_ext_reg_event) { 5796 for (i = 0; i < WMI_REG_CURRENT_MAX_AP_TYPE; i++) 5797 kfree(reg_info->reg_rules_6g_ap_ptr[i]); 5798 5799 for (j = 0; j < WMI_REG_CURRENT_MAX_AP_TYPE; j++) 5800 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) 5801 kfree(reg_info->reg_rules_6g_client_ptr[j][i]); 5802 } 5803 kfree(reg_info); 5804 } 5805 return ret; 5806 } 5807 5808 static int ath12k_wmi_rdy_parse(struct ath12k_base *ab, u16 tag, u16 len, 5809 const void *ptr, void *data) 5810 { 5811 struct ath12k_wmi_rdy_parse *rdy_parse = data; 5812 struct wmi_ready_event fixed_param; 5813 struct ath12k_wmi_mac_addr_params *addr_list; 5814 struct ath12k_pdev *pdev; 5815 u32 num_mac_addr; 5816 int i; 5817 5818 switch (tag) { 5819 case WMI_TAG_READY_EVENT: 5820 memset(&fixed_param, 0, sizeof(fixed_param)); 5821 memcpy(&fixed_param, (struct wmi_ready_event *)ptr, 5822 min_t(u16, sizeof(fixed_param), len)); 5823 ab->wlan_init_status = le32_to_cpu(fixed_param.ready_event_min.status); 5824 rdy_parse->num_extra_mac_addr = 5825 le32_to_cpu(fixed_param.ready_event_min.num_extra_mac_addr); 5826 5827 ether_addr_copy(ab->mac_addr, 5828 fixed_param.ready_event_min.mac_addr.addr); 5829 ab->pktlog_defs_checksum = le32_to_cpu(fixed_param.pktlog_defs_checksum); 5830 ab->wmi_ready = true; 5831 break; 5832 case WMI_TAG_ARRAY_FIXED_STRUCT: 5833 addr_list = (struct ath12k_wmi_mac_addr_params *)ptr; 5834 num_mac_addr = rdy_parse->num_extra_mac_addr; 5835 5836 if (!(ab->num_radios > 1 && num_mac_addr >= ab->num_radios)) 5837 break; 5838 5839 for (i = 0; i < ab->num_radios; i++) { 5840 pdev = &ab->pdevs[i]; 5841 ether_addr_copy(pdev->mac_addr, addr_list[i].addr); 5842 } 5843 ab->pdevs_macaddr_valid = true; 5844 break; 5845 default: 5846 break; 5847 } 5848 5849 return 0; 5850 } 5851 5852 static int ath12k_ready_event(struct ath12k_base *ab, struct sk_buff *skb) 5853 { 5854 struct ath12k_wmi_rdy_parse rdy_parse = { }; 5855 int ret; 5856 5857 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 5858 ath12k_wmi_rdy_parse, &rdy_parse); 5859 if (ret) { 5860 ath12k_warn(ab, "failed to parse tlv %d\n", ret); 5861 return ret; 5862 } 5863 5864 complete(&ab->wmi_ab.unified_ready); 5865 return 0; 5866 } 5867 5868 static void ath12k_peer_delete_resp_event(struct ath12k_base *ab, struct sk_buff *skb) 5869 { 5870 struct wmi_peer_delete_resp_event peer_del_resp; 5871 struct ath12k *ar; 5872 5873 if (ath12k_pull_peer_del_resp_ev(ab, skb, &peer_del_resp) != 0) { 5874 ath12k_warn(ab, "failed to extract peer delete resp"); 5875 return; 5876 } 5877 5878 rcu_read_lock(); 5879 ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(peer_del_resp.vdev_id)); 5880 if (!ar) { 5881 ath12k_warn(ab, "invalid vdev id in peer delete resp ev %d", 5882 peer_del_resp.vdev_id); 5883 rcu_read_unlock(); 5884 return; 5885 } 5886 5887 complete(&ar->peer_delete_done); 5888 rcu_read_unlock(); 5889 ath12k_dbg(ab, ATH12K_DBG_WMI, "peer delete resp for vdev id %d addr %pM\n", 5890 peer_del_resp.vdev_id, peer_del_resp.peer_macaddr.addr); 5891 } 5892 5893 static void ath12k_vdev_delete_resp_event(struct ath12k_base *ab, 5894 struct sk_buff *skb) 5895 { 5896 struct ath12k *ar; 5897 u32 vdev_id = 0; 5898 5899 if (ath12k_pull_vdev_del_resp_ev(ab, skb, &vdev_id) != 0) { 5900 ath12k_warn(ab, "failed to extract vdev delete resp"); 5901 return; 5902 } 5903 5904 rcu_read_lock(); 5905 ar = ath12k_mac_get_ar_by_vdev_id(ab, vdev_id); 5906 if (!ar) { 5907 ath12k_warn(ab, "invalid vdev id in vdev delete resp ev %d", 5908 vdev_id); 5909 rcu_read_unlock(); 5910 return; 5911 } 5912 5913 complete(&ar->vdev_delete_done); 5914 5915 rcu_read_unlock(); 5916 5917 ath12k_dbg(ab, ATH12K_DBG_WMI, "vdev delete resp for vdev id %d\n", 5918 vdev_id); 5919 } 5920 5921 static const char *ath12k_wmi_vdev_resp_print(u32 vdev_resp_status) 5922 { 5923 switch (vdev_resp_status) { 5924 case WMI_VDEV_START_RESPONSE_INVALID_VDEVID: 5925 return "invalid vdev id"; 5926 case WMI_VDEV_START_RESPONSE_NOT_SUPPORTED: 5927 return "not supported"; 5928 case WMI_VDEV_START_RESPONSE_DFS_VIOLATION: 5929 return "dfs violation"; 5930 case WMI_VDEV_START_RESPONSE_INVALID_REGDOMAIN: 5931 return "invalid regdomain"; 5932 default: 5933 return "unknown"; 5934 } 5935 } 5936 5937 static void ath12k_vdev_start_resp_event(struct ath12k_base *ab, struct sk_buff *skb) 5938 { 5939 struct wmi_vdev_start_resp_event vdev_start_resp; 5940 struct ath12k *ar; 5941 u32 status; 5942 5943 if (ath12k_pull_vdev_start_resp_tlv(ab, skb, &vdev_start_resp) != 0) { 5944 ath12k_warn(ab, "failed to extract vdev start resp"); 5945 return; 5946 } 5947 5948 rcu_read_lock(); 5949 ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(vdev_start_resp.vdev_id)); 5950 if (!ar) { 5951 ath12k_warn(ab, "invalid vdev id in vdev start resp ev %d", 5952 vdev_start_resp.vdev_id); 5953 rcu_read_unlock(); 5954 return; 5955 } 5956 5957 ar->last_wmi_vdev_start_status = 0; 5958 5959 status = le32_to_cpu(vdev_start_resp.status); 5960 5961 if (WARN_ON_ONCE(status)) { 5962 ath12k_warn(ab, "vdev start resp error status %d (%s)\n", 5963 status, ath12k_wmi_vdev_resp_print(status)); 5964 ar->last_wmi_vdev_start_status = status; 5965 } 5966 5967 complete(&ar->vdev_setup_done); 5968 5969 rcu_read_unlock(); 5970 5971 ath12k_dbg(ab, ATH12K_DBG_WMI, "vdev start resp for vdev id %d", 5972 vdev_start_resp.vdev_id); 5973 } 5974 5975 static void ath12k_bcn_tx_status_event(struct ath12k_base *ab, struct sk_buff *skb) 5976 { 5977 u32 vdev_id, tx_status; 5978 5979 if (ath12k_pull_bcn_tx_status_ev(ab, skb, &vdev_id, &tx_status) != 0) { 5980 ath12k_warn(ab, "failed to extract bcn tx status"); 5981 return; 5982 } 5983 } 5984 5985 static void ath12k_vdev_stopped_event(struct ath12k_base *ab, struct sk_buff *skb) 5986 { 5987 struct ath12k *ar; 5988 u32 vdev_id = 0; 5989 5990 if (ath12k_pull_vdev_stopped_param_tlv(ab, skb, &vdev_id) != 0) { 5991 ath12k_warn(ab, "failed to extract vdev stopped event"); 5992 return; 5993 } 5994 5995 rcu_read_lock(); 5996 ar = ath12k_mac_get_ar_by_vdev_id(ab, vdev_id); 5997 if (!ar) { 5998 ath12k_warn(ab, "invalid vdev id in vdev stopped ev %d", 5999 vdev_id); 6000 rcu_read_unlock(); 6001 return; 6002 } 6003 6004 complete(&ar->vdev_setup_done); 6005 6006 rcu_read_unlock(); 6007 6008 ath12k_dbg(ab, ATH12K_DBG_WMI, "vdev stopped for vdev id %d", vdev_id); 6009 } 6010 6011 static void ath12k_mgmt_rx_event(struct ath12k_base *ab, struct sk_buff *skb) 6012 { 6013 struct ath12k_wmi_mgmt_rx_arg rx_ev = {0}; 6014 struct ath12k *ar; 6015 struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb); 6016 struct ieee80211_hdr *hdr; 6017 u16 fc; 6018 struct ieee80211_supported_band *sband; 6019 6020 if (ath12k_pull_mgmt_rx_params_tlv(ab, skb, &rx_ev) != 0) { 6021 ath12k_warn(ab, "failed to extract mgmt rx event"); 6022 dev_kfree_skb(skb); 6023 return; 6024 } 6025 6026 memset(status, 0, sizeof(*status)); 6027 6028 ath12k_dbg(ab, ATH12K_DBG_MGMT, "mgmt rx event status %08x\n", 6029 rx_ev.status); 6030 6031 rcu_read_lock(); 6032 ar = ath12k_mac_get_ar_by_pdev_id(ab, rx_ev.pdev_id); 6033 6034 if (!ar) { 6035 ath12k_warn(ab, "invalid pdev_id %d in mgmt_rx_event\n", 6036 rx_ev.pdev_id); 6037 dev_kfree_skb(skb); 6038 goto exit; 6039 } 6040 6041 if ((test_bit(ATH12K_CAC_RUNNING, &ar->dev_flags)) || 6042 (rx_ev.status & (WMI_RX_STATUS_ERR_DECRYPT | 6043 WMI_RX_STATUS_ERR_KEY_CACHE_MISS | 6044 WMI_RX_STATUS_ERR_CRC))) { 6045 dev_kfree_skb(skb); 6046 goto exit; 6047 } 6048 6049 if (rx_ev.status & WMI_RX_STATUS_ERR_MIC) 6050 status->flag |= RX_FLAG_MMIC_ERROR; 6051 6052 if (rx_ev.chan_freq >= ATH12K_MIN_6G_FREQ && 6053 rx_ev.chan_freq <= ATH12K_MAX_6G_FREQ) { 6054 status->band = NL80211_BAND_6GHZ; 6055 status->freq = rx_ev.chan_freq; 6056 } else if (rx_ev.channel >= 1 && rx_ev.channel <= 14) { 6057 status->band = NL80211_BAND_2GHZ; 6058 } else if (rx_ev.channel >= 36 && rx_ev.channel <= ATH12K_MAX_5G_CHAN) { 6059 status->band = NL80211_BAND_5GHZ; 6060 } else { 6061 /* Shouldn't happen unless list of advertised channels to 6062 * mac80211 has been changed. 6063 */ 6064 WARN_ON_ONCE(1); 6065 dev_kfree_skb(skb); 6066 goto exit; 6067 } 6068 6069 if (rx_ev.phy_mode == MODE_11B && 6070 (status->band == NL80211_BAND_5GHZ || status->band == NL80211_BAND_6GHZ)) 6071 ath12k_dbg(ab, ATH12K_DBG_WMI, 6072 "wmi mgmt rx 11b (CCK) on 5/6GHz, band = %d\n", status->band); 6073 6074 sband = &ar->mac.sbands[status->band]; 6075 6076 if (status->band != NL80211_BAND_6GHZ) 6077 status->freq = ieee80211_channel_to_frequency(rx_ev.channel, 6078 status->band); 6079 6080 status->signal = rx_ev.snr + ATH12K_DEFAULT_NOISE_FLOOR; 6081 status->rate_idx = ath12k_mac_bitrate_to_idx(sband, rx_ev.rate / 100); 6082 6083 hdr = (struct ieee80211_hdr *)skb->data; 6084 fc = le16_to_cpu(hdr->frame_control); 6085 6086 /* Firmware is guaranteed to report all essential management frames via 6087 * WMI while it can deliver some extra via HTT. Since there can be 6088 * duplicates split the reporting wrt monitor/sniffing. 6089 */ 6090 status->flag |= RX_FLAG_SKIP_MONITOR; 6091 6092 /* In case of PMF, FW delivers decrypted frames with Protected Bit set 6093 * including group privacy action frames. 6094 */ 6095 if (ieee80211_has_protected(hdr->frame_control)) { 6096 status->flag |= RX_FLAG_DECRYPTED; 6097 6098 if (!ieee80211_is_robust_mgmt_frame(skb)) { 6099 status->flag |= RX_FLAG_IV_STRIPPED | 6100 RX_FLAG_MMIC_STRIPPED; 6101 hdr->frame_control = __cpu_to_le16(fc & 6102 ~IEEE80211_FCTL_PROTECTED); 6103 } 6104 } 6105 6106 if (ieee80211_is_beacon(hdr->frame_control)) 6107 ath12k_mac_handle_beacon(ar, skb); 6108 6109 ath12k_dbg(ab, ATH12K_DBG_MGMT, 6110 "event mgmt rx skb %p len %d ftype %02x stype %02x\n", 6111 skb, skb->len, 6112 fc & IEEE80211_FCTL_FTYPE, fc & IEEE80211_FCTL_STYPE); 6113 6114 ath12k_dbg(ab, ATH12K_DBG_MGMT, 6115 "event mgmt rx freq %d band %d snr %d, rate_idx %d\n", 6116 status->freq, status->band, status->signal, 6117 status->rate_idx); 6118 6119 ieee80211_rx_ni(ath12k_ar_to_hw(ar), skb); 6120 6121 exit: 6122 rcu_read_unlock(); 6123 } 6124 6125 static void ath12k_mgmt_tx_compl_event(struct ath12k_base *ab, struct sk_buff *skb) 6126 { 6127 struct wmi_mgmt_tx_compl_event tx_compl_param = {0}; 6128 struct ath12k *ar; 6129 6130 if (ath12k_pull_mgmt_tx_compl_param_tlv(ab, skb, &tx_compl_param) != 0) { 6131 ath12k_warn(ab, "failed to extract mgmt tx compl event"); 6132 return; 6133 } 6134 6135 rcu_read_lock(); 6136 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(tx_compl_param.pdev_id)); 6137 if (!ar) { 6138 ath12k_warn(ab, "invalid pdev id %d in mgmt_tx_compl_event\n", 6139 tx_compl_param.pdev_id); 6140 goto exit; 6141 } 6142 6143 wmi_process_mgmt_tx_comp(ar, le32_to_cpu(tx_compl_param.desc_id), 6144 le32_to_cpu(tx_compl_param.status)); 6145 6146 ath12k_dbg(ab, ATH12K_DBG_MGMT, 6147 "mgmt tx compl ev pdev_id %d, desc_id %d, status %d", 6148 tx_compl_param.pdev_id, tx_compl_param.desc_id, 6149 tx_compl_param.status); 6150 6151 exit: 6152 rcu_read_unlock(); 6153 } 6154 6155 static struct ath12k *ath12k_get_ar_on_scan_state(struct ath12k_base *ab, 6156 u32 vdev_id, 6157 enum ath12k_scan_state state) 6158 { 6159 int i; 6160 struct ath12k_pdev *pdev; 6161 struct ath12k *ar; 6162 6163 for (i = 0; i < ab->num_radios; i++) { 6164 pdev = rcu_dereference(ab->pdevs_active[i]); 6165 if (pdev && pdev->ar) { 6166 ar = pdev->ar; 6167 6168 spin_lock_bh(&ar->data_lock); 6169 if (ar->scan.state == state && 6170 ar->scan.vdev_id == vdev_id) { 6171 spin_unlock_bh(&ar->data_lock); 6172 return ar; 6173 } 6174 spin_unlock_bh(&ar->data_lock); 6175 } 6176 } 6177 return NULL; 6178 } 6179 6180 static void ath12k_scan_event(struct ath12k_base *ab, struct sk_buff *skb) 6181 { 6182 struct ath12k *ar; 6183 struct wmi_scan_event scan_ev = {0}; 6184 6185 if (ath12k_pull_scan_ev(ab, skb, &scan_ev) != 0) { 6186 ath12k_warn(ab, "failed to extract scan event"); 6187 return; 6188 } 6189 6190 rcu_read_lock(); 6191 6192 /* In case the scan was cancelled, ex. during interface teardown, 6193 * the interface will not be found in active interfaces. 6194 * Rather, in such scenarios, iterate over the active pdev's to 6195 * search 'ar' if the corresponding 'ar' scan is ABORTING and the 6196 * aborting scan's vdev id matches this event info. 6197 */ 6198 if (le32_to_cpu(scan_ev.event_type) == WMI_SCAN_EVENT_COMPLETED && 6199 le32_to_cpu(scan_ev.reason) == WMI_SCAN_REASON_CANCELLED) { 6200 ar = ath12k_get_ar_on_scan_state(ab, le32_to_cpu(scan_ev.vdev_id), 6201 ATH12K_SCAN_ABORTING); 6202 if (!ar) 6203 ar = ath12k_get_ar_on_scan_state(ab, le32_to_cpu(scan_ev.vdev_id), 6204 ATH12K_SCAN_RUNNING); 6205 } else { 6206 ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(scan_ev.vdev_id)); 6207 } 6208 6209 if (!ar) { 6210 ath12k_warn(ab, "Received scan event for unknown vdev"); 6211 rcu_read_unlock(); 6212 return; 6213 } 6214 6215 spin_lock_bh(&ar->data_lock); 6216 6217 ath12k_dbg(ab, ATH12K_DBG_WMI, 6218 "scan event %s type %d reason %d freq %d req_id %d scan_id %d vdev_id %d state %s (%d)\n", 6219 ath12k_wmi_event_scan_type_str(le32_to_cpu(scan_ev.event_type), 6220 le32_to_cpu(scan_ev.reason)), 6221 le32_to_cpu(scan_ev.event_type), 6222 le32_to_cpu(scan_ev.reason), 6223 le32_to_cpu(scan_ev.channel_freq), 6224 le32_to_cpu(scan_ev.scan_req_id), 6225 le32_to_cpu(scan_ev.scan_id), 6226 le32_to_cpu(scan_ev.vdev_id), 6227 ath12k_scan_state_str(ar->scan.state), ar->scan.state); 6228 6229 switch (le32_to_cpu(scan_ev.event_type)) { 6230 case WMI_SCAN_EVENT_STARTED: 6231 ath12k_wmi_event_scan_started(ar); 6232 break; 6233 case WMI_SCAN_EVENT_COMPLETED: 6234 ath12k_wmi_event_scan_completed(ar); 6235 break; 6236 case WMI_SCAN_EVENT_BSS_CHANNEL: 6237 ath12k_wmi_event_scan_bss_chan(ar); 6238 break; 6239 case WMI_SCAN_EVENT_FOREIGN_CHAN: 6240 ath12k_wmi_event_scan_foreign_chan(ar, le32_to_cpu(scan_ev.channel_freq)); 6241 break; 6242 case WMI_SCAN_EVENT_START_FAILED: 6243 ath12k_warn(ab, "received scan start failure event\n"); 6244 ath12k_wmi_event_scan_start_failed(ar); 6245 break; 6246 case WMI_SCAN_EVENT_DEQUEUED: 6247 __ath12k_mac_scan_finish(ar); 6248 break; 6249 case WMI_SCAN_EVENT_PREEMPTED: 6250 case WMI_SCAN_EVENT_RESTARTED: 6251 case WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT: 6252 default: 6253 break; 6254 } 6255 6256 spin_unlock_bh(&ar->data_lock); 6257 6258 rcu_read_unlock(); 6259 } 6260 6261 static void ath12k_peer_sta_kickout_event(struct ath12k_base *ab, struct sk_buff *skb) 6262 { 6263 struct wmi_peer_sta_kickout_arg arg = {}; 6264 struct ieee80211_sta *sta; 6265 struct ath12k_peer *peer; 6266 struct ath12k *ar; 6267 6268 if (ath12k_pull_peer_sta_kickout_ev(ab, skb, &arg) != 0) { 6269 ath12k_warn(ab, "failed to extract peer sta kickout event"); 6270 return; 6271 } 6272 6273 rcu_read_lock(); 6274 6275 spin_lock_bh(&ab->base_lock); 6276 6277 peer = ath12k_peer_find_by_addr(ab, arg.mac_addr); 6278 6279 if (!peer) { 6280 ath12k_warn(ab, "peer not found %pM\n", 6281 arg.mac_addr); 6282 goto exit; 6283 } 6284 6285 ar = ath12k_mac_get_ar_by_vdev_id(ab, peer->vdev_id); 6286 if (!ar) { 6287 ath12k_warn(ab, "invalid vdev id in peer sta kickout ev %d", 6288 peer->vdev_id); 6289 goto exit; 6290 } 6291 6292 sta = ieee80211_find_sta_by_ifaddr(ath12k_ar_to_hw(ar), 6293 arg.mac_addr, NULL); 6294 if (!sta) { 6295 ath12k_warn(ab, "Spurious quick kickout for STA %pM\n", 6296 arg.mac_addr); 6297 goto exit; 6298 } 6299 6300 ath12k_dbg(ab, ATH12K_DBG_WMI, "peer sta kickout event %pM", 6301 arg.mac_addr); 6302 6303 ieee80211_report_low_ack(sta, 10); 6304 6305 exit: 6306 spin_unlock_bh(&ab->base_lock); 6307 rcu_read_unlock(); 6308 } 6309 6310 static void ath12k_roam_event(struct ath12k_base *ab, struct sk_buff *skb) 6311 { 6312 struct wmi_roam_event roam_ev = {}; 6313 struct ath12k *ar; 6314 u32 vdev_id; 6315 u8 roam_reason; 6316 6317 if (ath12k_pull_roam_ev(ab, skb, &roam_ev) != 0) { 6318 ath12k_warn(ab, "failed to extract roam event"); 6319 return; 6320 } 6321 6322 vdev_id = le32_to_cpu(roam_ev.vdev_id); 6323 roam_reason = u32_get_bits(le32_to_cpu(roam_ev.reason), 6324 WMI_ROAM_REASON_MASK); 6325 6326 ath12k_dbg(ab, ATH12K_DBG_WMI, 6327 "wmi roam event vdev %u reason %d rssi %d\n", 6328 vdev_id, roam_reason, roam_ev.rssi); 6329 6330 rcu_read_lock(); 6331 ar = ath12k_mac_get_ar_by_vdev_id(ab, vdev_id); 6332 if (!ar) { 6333 ath12k_warn(ab, "invalid vdev id in roam ev %d", vdev_id); 6334 rcu_read_unlock(); 6335 return; 6336 } 6337 6338 if (roam_reason >= WMI_ROAM_REASON_MAX) 6339 ath12k_warn(ab, "ignoring unknown roam event reason %d on vdev %i\n", 6340 roam_reason, vdev_id); 6341 6342 switch (roam_reason) { 6343 case WMI_ROAM_REASON_BEACON_MISS: 6344 ath12k_mac_handle_beacon_miss(ar, vdev_id); 6345 break; 6346 case WMI_ROAM_REASON_BETTER_AP: 6347 case WMI_ROAM_REASON_LOW_RSSI: 6348 case WMI_ROAM_REASON_SUITABLE_AP_FOUND: 6349 case WMI_ROAM_REASON_HO_FAILED: 6350 ath12k_warn(ab, "ignoring not implemented roam event reason %d on vdev %i\n", 6351 roam_reason, vdev_id); 6352 break; 6353 } 6354 6355 rcu_read_unlock(); 6356 } 6357 6358 static void ath12k_chan_info_event(struct ath12k_base *ab, struct sk_buff *skb) 6359 { 6360 struct wmi_chan_info_event ch_info_ev = {0}; 6361 struct ath12k *ar; 6362 struct survey_info *survey; 6363 int idx; 6364 /* HW channel counters frequency value in hertz */ 6365 u32 cc_freq_hz = ab->cc_freq_hz; 6366 6367 if (ath12k_pull_chan_info_ev(ab, skb, &ch_info_ev) != 0) { 6368 ath12k_warn(ab, "failed to extract chan info event"); 6369 return; 6370 } 6371 6372 ath12k_dbg(ab, ATH12K_DBG_WMI, 6373 "chan info vdev_id %d err_code %d freq %d cmd_flags %d noise_floor %d rx_clear_count %d cycle_count %d mac_clk_mhz %d\n", 6374 ch_info_ev.vdev_id, ch_info_ev.err_code, ch_info_ev.freq, 6375 ch_info_ev.cmd_flags, ch_info_ev.noise_floor, 6376 ch_info_ev.rx_clear_count, ch_info_ev.cycle_count, 6377 ch_info_ev.mac_clk_mhz); 6378 6379 if (le32_to_cpu(ch_info_ev.cmd_flags) == WMI_CHAN_INFO_END_RESP) { 6380 ath12k_dbg(ab, ATH12K_DBG_WMI, "chan info report completed\n"); 6381 return; 6382 } 6383 6384 rcu_read_lock(); 6385 ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(ch_info_ev.vdev_id)); 6386 if (!ar) { 6387 ath12k_warn(ab, "invalid vdev id in chan info ev %d", 6388 ch_info_ev.vdev_id); 6389 rcu_read_unlock(); 6390 return; 6391 } 6392 spin_lock_bh(&ar->data_lock); 6393 6394 switch (ar->scan.state) { 6395 case ATH12K_SCAN_IDLE: 6396 case ATH12K_SCAN_STARTING: 6397 ath12k_warn(ab, "received chan info event without a scan request, ignoring\n"); 6398 goto exit; 6399 case ATH12K_SCAN_RUNNING: 6400 case ATH12K_SCAN_ABORTING: 6401 break; 6402 } 6403 6404 idx = freq_to_idx(ar, le32_to_cpu(ch_info_ev.freq)); 6405 if (idx >= ARRAY_SIZE(ar->survey)) { 6406 ath12k_warn(ab, "chan info: invalid frequency %d (idx %d out of bounds)\n", 6407 ch_info_ev.freq, idx); 6408 goto exit; 6409 } 6410 6411 /* If FW provides MAC clock frequency in Mhz, overriding the initialized 6412 * HW channel counters frequency value 6413 */ 6414 if (ch_info_ev.mac_clk_mhz) 6415 cc_freq_hz = (le32_to_cpu(ch_info_ev.mac_clk_mhz) * 1000); 6416 6417 if (ch_info_ev.cmd_flags == WMI_CHAN_INFO_START_RESP) { 6418 survey = &ar->survey[idx]; 6419 memset(survey, 0, sizeof(*survey)); 6420 survey->noise = le32_to_cpu(ch_info_ev.noise_floor); 6421 survey->filled = SURVEY_INFO_NOISE_DBM | SURVEY_INFO_TIME | 6422 SURVEY_INFO_TIME_BUSY; 6423 survey->time = div_u64(le32_to_cpu(ch_info_ev.cycle_count), cc_freq_hz); 6424 survey->time_busy = div_u64(le32_to_cpu(ch_info_ev.rx_clear_count), 6425 cc_freq_hz); 6426 } 6427 exit: 6428 spin_unlock_bh(&ar->data_lock); 6429 rcu_read_unlock(); 6430 } 6431 6432 static void 6433 ath12k_pdev_bss_chan_info_event(struct ath12k_base *ab, struct sk_buff *skb) 6434 { 6435 struct wmi_pdev_bss_chan_info_event bss_ch_info_ev = {}; 6436 struct survey_info *survey; 6437 struct ath12k *ar; 6438 u32 cc_freq_hz = ab->cc_freq_hz; 6439 u64 busy, total, tx, rx, rx_bss; 6440 int idx; 6441 6442 if (ath12k_pull_pdev_bss_chan_info_ev(ab, skb, &bss_ch_info_ev) != 0) { 6443 ath12k_warn(ab, "failed to extract pdev bss chan info event"); 6444 return; 6445 } 6446 6447 busy = (u64)(le32_to_cpu(bss_ch_info_ev.rx_clear_count_high)) << 32 | 6448 le32_to_cpu(bss_ch_info_ev.rx_clear_count_low); 6449 6450 total = (u64)(le32_to_cpu(bss_ch_info_ev.cycle_count_high)) << 32 | 6451 le32_to_cpu(bss_ch_info_ev.cycle_count_low); 6452 6453 tx = (u64)(le32_to_cpu(bss_ch_info_ev.tx_cycle_count_high)) << 32 | 6454 le32_to_cpu(bss_ch_info_ev.tx_cycle_count_low); 6455 6456 rx = (u64)(le32_to_cpu(bss_ch_info_ev.rx_cycle_count_high)) << 32 | 6457 le32_to_cpu(bss_ch_info_ev.rx_cycle_count_low); 6458 6459 rx_bss = (u64)(le32_to_cpu(bss_ch_info_ev.rx_bss_cycle_count_high)) << 32 | 6460 le32_to_cpu(bss_ch_info_ev.rx_bss_cycle_count_low); 6461 6462 ath12k_dbg(ab, ATH12K_DBG_WMI, 6463 "pdev bss chan info:\n pdev_id: %d freq: %d noise: %d cycle: busy %llu total %llu tx %llu rx %llu rx_bss %llu\n", 6464 bss_ch_info_ev.pdev_id, bss_ch_info_ev.freq, 6465 bss_ch_info_ev.noise_floor, busy, total, 6466 tx, rx, rx_bss); 6467 6468 rcu_read_lock(); 6469 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(bss_ch_info_ev.pdev_id)); 6470 6471 if (!ar) { 6472 ath12k_warn(ab, "invalid pdev id %d in bss_chan_info event\n", 6473 bss_ch_info_ev.pdev_id); 6474 rcu_read_unlock(); 6475 return; 6476 } 6477 6478 spin_lock_bh(&ar->data_lock); 6479 idx = freq_to_idx(ar, le32_to_cpu(bss_ch_info_ev.freq)); 6480 if (idx >= ARRAY_SIZE(ar->survey)) { 6481 ath12k_warn(ab, "bss chan info: invalid frequency %d (idx %d out of bounds)\n", 6482 bss_ch_info_ev.freq, idx); 6483 goto exit; 6484 } 6485 6486 survey = &ar->survey[idx]; 6487 6488 survey->noise = le32_to_cpu(bss_ch_info_ev.noise_floor); 6489 survey->time = div_u64(total, cc_freq_hz); 6490 survey->time_busy = div_u64(busy, cc_freq_hz); 6491 survey->time_rx = div_u64(rx_bss, cc_freq_hz); 6492 survey->time_tx = div_u64(tx, cc_freq_hz); 6493 survey->filled |= (SURVEY_INFO_NOISE_DBM | 6494 SURVEY_INFO_TIME | 6495 SURVEY_INFO_TIME_BUSY | 6496 SURVEY_INFO_TIME_RX | 6497 SURVEY_INFO_TIME_TX); 6498 exit: 6499 spin_unlock_bh(&ar->data_lock); 6500 complete(&ar->bss_survey_done); 6501 6502 rcu_read_unlock(); 6503 } 6504 6505 static void ath12k_vdev_install_key_compl_event(struct ath12k_base *ab, 6506 struct sk_buff *skb) 6507 { 6508 struct wmi_vdev_install_key_complete_arg install_key_compl = {0}; 6509 struct ath12k *ar; 6510 6511 if (ath12k_pull_vdev_install_key_compl_ev(ab, skb, &install_key_compl) != 0) { 6512 ath12k_warn(ab, "failed to extract install key compl event"); 6513 return; 6514 } 6515 6516 ath12k_dbg(ab, ATH12K_DBG_WMI, 6517 "vdev install key ev idx %d flags %08x macaddr %pM status %d\n", 6518 install_key_compl.key_idx, install_key_compl.key_flags, 6519 install_key_compl.macaddr, install_key_compl.status); 6520 6521 rcu_read_lock(); 6522 ar = ath12k_mac_get_ar_by_vdev_id(ab, install_key_compl.vdev_id); 6523 if (!ar) { 6524 ath12k_warn(ab, "invalid vdev id in install key compl ev %d", 6525 install_key_compl.vdev_id); 6526 rcu_read_unlock(); 6527 return; 6528 } 6529 6530 ar->install_key_status = 0; 6531 6532 if (install_key_compl.status != WMI_VDEV_INSTALL_KEY_COMPL_STATUS_SUCCESS) { 6533 ath12k_warn(ab, "install key failed for %pM status %d\n", 6534 install_key_compl.macaddr, install_key_compl.status); 6535 ar->install_key_status = install_key_compl.status; 6536 } 6537 6538 complete(&ar->install_key_done); 6539 rcu_read_unlock(); 6540 } 6541 6542 static int ath12k_wmi_tlv_services_parser(struct ath12k_base *ab, 6543 u16 tag, u16 len, 6544 const void *ptr, 6545 void *data) 6546 { 6547 const struct wmi_service_available_event *ev; 6548 u32 *wmi_ext2_service_bitmap; 6549 int i, j; 6550 u16 expected_len; 6551 6552 expected_len = WMI_SERVICE_SEGMENT_BM_SIZE32 * sizeof(u32); 6553 if (len < expected_len) { 6554 ath12k_warn(ab, "invalid length %d for the WMI services available tag 0x%x\n", 6555 len, tag); 6556 return -EINVAL; 6557 } 6558 6559 switch (tag) { 6560 case WMI_TAG_SERVICE_AVAILABLE_EVENT: 6561 ev = (struct wmi_service_available_event *)ptr; 6562 for (i = 0, j = WMI_MAX_SERVICE; 6563 i < WMI_SERVICE_SEGMENT_BM_SIZE32 && j < WMI_MAX_EXT_SERVICE; 6564 i++) { 6565 do { 6566 if (le32_to_cpu(ev->wmi_service_segment_bitmap[i]) & 6567 BIT(j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32)) 6568 set_bit(j, ab->wmi_ab.svc_map); 6569 } while (++j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32); 6570 } 6571 6572 ath12k_dbg(ab, ATH12K_DBG_WMI, 6573 "wmi_ext_service_bitmap 0x%x 0x%x 0x%x 0x%x", 6574 ev->wmi_service_segment_bitmap[0], 6575 ev->wmi_service_segment_bitmap[1], 6576 ev->wmi_service_segment_bitmap[2], 6577 ev->wmi_service_segment_bitmap[3]); 6578 break; 6579 case WMI_TAG_ARRAY_UINT32: 6580 wmi_ext2_service_bitmap = (u32 *)ptr; 6581 for (i = 0, j = WMI_MAX_EXT_SERVICE; 6582 i < WMI_SERVICE_SEGMENT_BM_SIZE32 && j < WMI_MAX_EXT2_SERVICE; 6583 i++) { 6584 do { 6585 if (wmi_ext2_service_bitmap[i] & 6586 BIT(j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32)) 6587 set_bit(j, ab->wmi_ab.svc_map); 6588 } while (++j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32); 6589 } 6590 6591 ath12k_dbg(ab, ATH12K_DBG_WMI, 6592 "wmi_ext2_service_bitmap 0x%04x 0x%04x 0x%04x 0x%04x", 6593 wmi_ext2_service_bitmap[0], wmi_ext2_service_bitmap[1], 6594 wmi_ext2_service_bitmap[2], wmi_ext2_service_bitmap[3]); 6595 break; 6596 } 6597 return 0; 6598 } 6599 6600 static int ath12k_service_available_event(struct ath12k_base *ab, struct sk_buff *skb) 6601 { 6602 int ret; 6603 6604 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 6605 ath12k_wmi_tlv_services_parser, 6606 NULL); 6607 return ret; 6608 } 6609 6610 static void ath12k_peer_assoc_conf_event(struct ath12k_base *ab, struct sk_buff *skb) 6611 { 6612 struct wmi_peer_assoc_conf_arg peer_assoc_conf = {0}; 6613 struct ath12k *ar; 6614 6615 if (ath12k_pull_peer_assoc_conf_ev(ab, skb, &peer_assoc_conf) != 0) { 6616 ath12k_warn(ab, "failed to extract peer assoc conf event"); 6617 return; 6618 } 6619 6620 ath12k_dbg(ab, ATH12K_DBG_WMI, 6621 "peer assoc conf ev vdev id %d macaddr %pM\n", 6622 peer_assoc_conf.vdev_id, peer_assoc_conf.macaddr); 6623 6624 rcu_read_lock(); 6625 ar = ath12k_mac_get_ar_by_vdev_id(ab, peer_assoc_conf.vdev_id); 6626 6627 if (!ar) { 6628 ath12k_warn(ab, "invalid vdev id in peer assoc conf ev %d", 6629 peer_assoc_conf.vdev_id); 6630 rcu_read_unlock(); 6631 return; 6632 } 6633 6634 complete(&ar->peer_assoc_done); 6635 rcu_read_unlock(); 6636 } 6637 6638 static void ath12k_update_stats_event(struct ath12k_base *ab, struct sk_buff *skb) 6639 { 6640 } 6641 6642 /* PDEV_CTL_FAILSAFE_CHECK_EVENT is received from FW when the frequency scanned 6643 * is not part of BDF CTL(Conformance test limits) table entries. 6644 */ 6645 static void ath12k_pdev_ctl_failsafe_check_event(struct ath12k_base *ab, 6646 struct sk_buff *skb) 6647 { 6648 const void **tb; 6649 const struct wmi_pdev_ctl_failsafe_chk_event *ev; 6650 int ret; 6651 6652 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 6653 if (IS_ERR(tb)) { 6654 ret = PTR_ERR(tb); 6655 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 6656 return; 6657 } 6658 6659 ev = tb[WMI_TAG_PDEV_CTL_FAILSAFE_CHECK_EVENT]; 6660 if (!ev) { 6661 ath12k_warn(ab, "failed to fetch pdev ctl failsafe check ev"); 6662 kfree(tb); 6663 return; 6664 } 6665 6666 ath12k_dbg(ab, ATH12K_DBG_WMI, 6667 "pdev ctl failsafe check ev status %d\n", 6668 ev->ctl_failsafe_status); 6669 6670 /* If ctl_failsafe_status is set to 1 FW will max out the Transmit power 6671 * to 10 dBm else the CTL power entry in the BDF would be picked up. 6672 */ 6673 if (ev->ctl_failsafe_status != 0) 6674 ath12k_warn(ab, "pdev ctl failsafe failure status %d", 6675 ev->ctl_failsafe_status); 6676 6677 kfree(tb); 6678 } 6679 6680 static void 6681 ath12k_wmi_process_csa_switch_count_event(struct ath12k_base *ab, 6682 const struct ath12k_wmi_pdev_csa_event *ev, 6683 const u32 *vdev_ids) 6684 { 6685 int i; 6686 struct ath12k_vif *arvif; 6687 6688 /* Finish CSA once the switch count becomes NULL */ 6689 if (ev->current_switch_count) 6690 return; 6691 6692 rcu_read_lock(); 6693 for (i = 0; i < le32_to_cpu(ev->num_vdevs); i++) { 6694 arvif = ath12k_mac_get_arvif_by_vdev_id(ab, vdev_ids[i]); 6695 6696 if (!arvif) { 6697 ath12k_warn(ab, "Recvd csa status for unknown vdev %d", 6698 vdev_ids[i]); 6699 continue; 6700 } 6701 6702 if (arvif->is_up && arvif->vif->bss_conf.csa_active) 6703 ieee80211_csa_finish(arvif->vif, 0); 6704 } 6705 rcu_read_unlock(); 6706 } 6707 6708 static void 6709 ath12k_wmi_pdev_csa_switch_count_status_event(struct ath12k_base *ab, 6710 struct sk_buff *skb) 6711 { 6712 const void **tb; 6713 const struct ath12k_wmi_pdev_csa_event *ev; 6714 const u32 *vdev_ids; 6715 int ret; 6716 6717 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 6718 if (IS_ERR(tb)) { 6719 ret = PTR_ERR(tb); 6720 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 6721 return; 6722 } 6723 6724 ev = tb[WMI_TAG_PDEV_CSA_SWITCH_COUNT_STATUS_EVENT]; 6725 vdev_ids = tb[WMI_TAG_ARRAY_UINT32]; 6726 6727 if (!ev || !vdev_ids) { 6728 ath12k_warn(ab, "failed to fetch pdev csa switch count ev"); 6729 kfree(tb); 6730 return; 6731 } 6732 6733 ath12k_dbg(ab, ATH12K_DBG_WMI, 6734 "pdev csa switch count %d for pdev %d, num_vdevs %d", 6735 ev->current_switch_count, ev->pdev_id, 6736 ev->num_vdevs); 6737 6738 ath12k_wmi_process_csa_switch_count_event(ab, ev, vdev_ids); 6739 6740 kfree(tb); 6741 } 6742 6743 static void 6744 ath12k_wmi_pdev_dfs_radar_detected_event(struct ath12k_base *ab, struct sk_buff *skb) 6745 { 6746 const void **tb; 6747 const struct ath12k_wmi_pdev_radar_event *ev; 6748 struct ath12k *ar; 6749 int ret; 6750 6751 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 6752 if (IS_ERR(tb)) { 6753 ret = PTR_ERR(tb); 6754 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 6755 return; 6756 } 6757 6758 ev = tb[WMI_TAG_PDEV_DFS_RADAR_DETECTION_EVENT]; 6759 6760 if (!ev) { 6761 ath12k_warn(ab, "failed to fetch pdev dfs radar detected ev"); 6762 kfree(tb); 6763 return; 6764 } 6765 6766 ath12k_dbg(ab, ATH12K_DBG_WMI, 6767 "pdev dfs radar detected on pdev %d, detection mode %d, chan freq %d, chan_width %d, detector id %d, seg id %d, timestamp %d, chirp %d, freq offset %d, sidx %d", 6768 ev->pdev_id, ev->detection_mode, ev->chan_freq, ev->chan_width, 6769 ev->detector_id, ev->segment_id, ev->timestamp, ev->is_chirp, 6770 ev->freq_offset, ev->sidx); 6771 6772 rcu_read_lock(); 6773 6774 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(ev->pdev_id)); 6775 6776 if (!ar) { 6777 ath12k_warn(ab, "radar detected in invalid pdev %d\n", 6778 ev->pdev_id); 6779 goto exit; 6780 } 6781 6782 ath12k_dbg(ar->ab, ATH12K_DBG_REG, "DFS Radar Detected in pdev %d\n", 6783 ev->pdev_id); 6784 6785 if (ar->dfs_block_radar_events) 6786 ath12k_info(ab, "DFS Radar detected, but ignored as requested\n"); 6787 else 6788 ieee80211_radar_detected(ath12k_ar_to_hw(ar)); 6789 6790 exit: 6791 rcu_read_unlock(); 6792 6793 kfree(tb); 6794 } 6795 6796 static void 6797 ath12k_wmi_pdev_temperature_event(struct ath12k_base *ab, 6798 struct sk_buff *skb) 6799 { 6800 struct ath12k *ar; 6801 struct wmi_pdev_temperature_event ev = {0}; 6802 6803 if (ath12k_pull_pdev_temp_ev(ab, skb, &ev) != 0) { 6804 ath12k_warn(ab, "failed to extract pdev temperature event"); 6805 return; 6806 } 6807 6808 ath12k_dbg(ab, ATH12K_DBG_WMI, 6809 "pdev temperature ev temp %d pdev_id %d\n", ev.temp, ev.pdev_id); 6810 6811 rcu_read_lock(); 6812 6813 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(ev.pdev_id)); 6814 if (!ar) { 6815 ath12k_warn(ab, "invalid pdev id in pdev temperature ev %d", ev.pdev_id); 6816 goto exit; 6817 } 6818 6819 exit: 6820 rcu_read_unlock(); 6821 } 6822 6823 static void ath12k_fils_discovery_event(struct ath12k_base *ab, 6824 struct sk_buff *skb) 6825 { 6826 const void **tb; 6827 const struct wmi_fils_discovery_event *ev; 6828 int ret; 6829 6830 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 6831 if (IS_ERR(tb)) { 6832 ret = PTR_ERR(tb); 6833 ath12k_warn(ab, 6834 "failed to parse FILS discovery event tlv %d\n", 6835 ret); 6836 return; 6837 } 6838 6839 ev = tb[WMI_TAG_HOST_SWFDA_EVENT]; 6840 if (!ev) { 6841 ath12k_warn(ab, "failed to fetch FILS discovery event\n"); 6842 kfree(tb); 6843 return; 6844 } 6845 6846 ath12k_warn(ab, 6847 "FILS discovery frame expected from host for vdev_id: %u, transmission scheduled at %u, next TBTT: %u\n", 6848 ev->vdev_id, ev->fils_tt, ev->tbtt); 6849 6850 kfree(tb); 6851 } 6852 6853 static void ath12k_probe_resp_tx_status_event(struct ath12k_base *ab, 6854 struct sk_buff *skb) 6855 { 6856 const void **tb; 6857 const struct wmi_probe_resp_tx_status_event *ev; 6858 int ret; 6859 6860 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 6861 if (IS_ERR(tb)) { 6862 ret = PTR_ERR(tb); 6863 ath12k_warn(ab, 6864 "failed to parse probe response transmission status event tlv: %d\n", 6865 ret); 6866 return; 6867 } 6868 6869 ev = tb[WMI_TAG_OFFLOAD_PRB_RSP_TX_STATUS_EVENT]; 6870 if (!ev) { 6871 ath12k_warn(ab, 6872 "failed to fetch probe response transmission status event"); 6873 kfree(tb); 6874 return; 6875 } 6876 6877 if (ev->tx_status) 6878 ath12k_warn(ab, 6879 "Probe response transmission failed for vdev_id %u, status %u\n", 6880 ev->vdev_id, ev->tx_status); 6881 6882 kfree(tb); 6883 } 6884 6885 static int ath12k_wmi_p2p_noa_event(struct ath12k_base *ab, 6886 struct sk_buff *skb) 6887 { 6888 const void **tb; 6889 const struct wmi_p2p_noa_event *ev; 6890 const struct ath12k_wmi_p2p_noa_info *noa; 6891 struct ath12k *ar; 6892 int ret, vdev_id; 6893 6894 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 6895 if (IS_ERR(tb)) { 6896 ret = PTR_ERR(tb); 6897 ath12k_warn(ab, "failed to parse P2P NoA TLV: %d\n", ret); 6898 return ret; 6899 } 6900 6901 ev = tb[WMI_TAG_P2P_NOA_EVENT]; 6902 noa = tb[WMI_TAG_P2P_NOA_INFO]; 6903 6904 if (!ev || !noa) { 6905 ret = -EPROTO; 6906 goto out; 6907 } 6908 6909 vdev_id = __le32_to_cpu(ev->vdev_id); 6910 6911 ath12k_dbg(ab, ATH12K_DBG_WMI, 6912 "wmi tlv p2p noa vdev_id %i descriptors %u\n", 6913 vdev_id, le32_get_bits(noa->noa_attr, WMI_P2P_NOA_INFO_DESC_NUM)); 6914 6915 rcu_read_lock(); 6916 ar = ath12k_mac_get_ar_by_vdev_id(ab, vdev_id); 6917 if (!ar) { 6918 ath12k_warn(ab, "invalid vdev id %d in P2P NoA event\n", 6919 vdev_id); 6920 ret = -EINVAL; 6921 goto unlock; 6922 } 6923 6924 ath12k_p2p_noa_update_by_vdev_id(ar, vdev_id, noa); 6925 6926 ret = 0; 6927 6928 unlock: 6929 rcu_read_unlock(); 6930 out: 6931 kfree(tb); 6932 return ret; 6933 } 6934 6935 static void ath12k_rfkill_state_change_event(struct ath12k_base *ab, 6936 struct sk_buff *skb) 6937 { 6938 const struct wmi_rfkill_state_change_event *ev; 6939 const void **tb; 6940 int ret; 6941 6942 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 6943 if (IS_ERR(tb)) { 6944 ret = PTR_ERR(tb); 6945 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 6946 return; 6947 } 6948 6949 ev = tb[WMI_TAG_RFKILL_EVENT]; 6950 if (!ev) { 6951 kfree(tb); 6952 return; 6953 } 6954 6955 ath12k_dbg(ab, ATH12K_DBG_MAC, 6956 "wmi tlv rfkill state change gpio %d type %d radio_state %d\n", 6957 le32_to_cpu(ev->gpio_pin_num), 6958 le32_to_cpu(ev->int_type), 6959 le32_to_cpu(ev->radio_state)); 6960 6961 spin_lock_bh(&ab->base_lock); 6962 ab->rfkill_radio_on = (ev->radio_state == cpu_to_le32(WMI_RFKILL_RADIO_STATE_ON)); 6963 spin_unlock_bh(&ab->base_lock); 6964 6965 queue_work(ab->workqueue, &ab->rfkill_work); 6966 kfree(tb); 6967 } 6968 6969 static void 6970 ath12k_wmi_diag_event(struct ath12k_base *ab, struct sk_buff *skb) 6971 { 6972 trace_ath12k_wmi_diag(ab, skb->data, skb->len); 6973 } 6974 6975 static void ath12k_wmi_twt_enable_event(struct ath12k_base *ab, 6976 struct sk_buff *skb) 6977 { 6978 const void **tb; 6979 const struct wmi_twt_enable_event *ev; 6980 int ret; 6981 6982 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 6983 if (IS_ERR(tb)) { 6984 ret = PTR_ERR(tb); 6985 ath12k_warn(ab, "failed to parse wmi twt enable status event tlv: %d\n", 6986 ret); 6987 return; 6988 } 6989 6990 ev = tb[WMI_TAG_TWT_ENABLE_COMPLETE_EVENT]; 6991 if (!ev) { 6992 ath12k_warn(ab, "failed to fetch twt enable wmi event\n"); 6993 goto exit; 6994 } 6995 6996 ath12k_dbg(ab, ATH12K_DBG_MAC, "wmi twt enable event pdev id %u status %u\n", 6997 le32_to_cpu(ev->pdev_id), 6998 le32_to_cpu(ev->status)); 6999 7000 exit: 7001 kfree(tb); 7002 } 7003 7004 static void ath12k_wmi_twt_disable_event(struct ath12k_base *ab, 7005 struct sk_buff *skb) 7006 { 7007 const void **tb; 7008 const struct wmi_twt_disable_event *ev; 7009 int ret; 7010 7011 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 7012 if (IS_ERR(tb)) { 7013 ret = PTR_ERR(tb); 7014 ath12k_warn(ab, "failed to parse wmi twt disable status event tlv: %d\n", 7015 ret); 7016 return; 7017 } 7018 7019 ev = tb[WMI_TAG_TWT_DISABLE_COMPLETE_EVENT]; 7020 if (!ev) { 7021 ath12k_warn(ab, "failed to fetch twt disable wmi event\n"); 7022 goto exit; 7023 } 7024 7025 ath12k_dbg(ab, ATH12K_DBG_MAC, "wmi twt disable event pdev id %d status %u\n", 7026 le32_to_cpu(ev->pdev_id), 7027 le32_to_cpu(ev->status)); 7028 7029 exit: 7030 kfree(tb); 7031 } 7032 7033 static void ath12k_wmi_op_rx(struct ath12k_base *ab, struct sk_buff *skb) 7034 { 7035 struct wmi_cmd_hdr *cmd_hdr; 7036 enum wmi_tlv_event_id id; 7037 7038 cmd_hdr = (struct wmi_cmd_hdr *)skb->data; 7039 id = le32_get_bits(cmd_hdr->cmd_id, WMI_CMD_HDR_CMD_ID); 7040 7041 if (!skb_pull(skb, sizeof(struct wmi_cmd_hdr))) 7042 goto out; 7043 7044 switch (id) { 7045 /* Process all the WMI events here */ 7046 case WMI_SERVICE_READY_EVENTID: 7047 ath12k_service_ready_event(ab, skb); 7048 break; 7049 case WMI_SERVICE_READY_EXT_EVENTID: 7050 ath12k_service_ready_ext_event(ab, skb); 7051 break; 7052 case WMI_SERVICE_READY_EXT2_EVENTID: 7053 ath12k_service_ready_ext2_event(ab, skb); 7054 break; 7055 case WMI_REG_CHAN_LIST_CC_EXT_EVENTID: 7056 ath12k_reg_chan_list_event(ab, skb); 7057 break; 7058 case WMI_READY_EVENTID: 7059 ath12k_ready_event(ab, skb); 7060 break; 7061 case WMI_PEER_DELETE_RESP_EVENTID: 7062 ath12k_peer_delete_resp_event(ab, skb); 7063 break; 7064 case WMI_VDEV_START_RESP_EVENTID: 7065 ath12k_vdev_start_resp_event(ab, skb); 7066 break; 7067 case WMI_OFFLOAD_BCN_TX_STATUS_EVENTID: 7068 ath12k_bcn_tx_status_event(ab, skb); 7069 break; 7070 case WMI_VDEV_STOPPED_EVENTID: 7071 ath12k_vdev_stopped_event(ab, skb); 7072 break; 7073 case WMI_MGMT_RX_EVENTID: 7074 ath12k_mgmt_rx_event(ab, skb); 7075 /* mgmt_rx_event() owns the skb now! */ 7076 return; 7077 case WMI_MGMT_TX_COMPLETION_EVENTID: 7078 ath12k_mgmt_tx_compl_event(ab, skb); 7079 break; 7080 case WMI_SCAN_EVENTID: 7081 ath12k_scan_event(ab, skb); 7082 break; 7083 case WMI_PEER_STA_KICKOUT_EVENTID: 7084 ath12k_peer_sta_kickout_event(ab, skb); 7085 break; 7086 case WMI_ROAM_EVENTID: 7087 ath12k_roam_event(ab, skb); 7088 break; 7089 case WMI_CHAN_INFO_EVENTID: 7090 ath12k_chan_info_event(ab, skb); 7091 break; 7092 case WMI_PDEV_BSS_CHAN_INFO_EVENTID: 7093 ath12k_pdev_bss_chan_info_event(ab, skb); 7094 break; 7095 case WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID: 7096 ath12k_vdev_install_key_compl_event(ab, skb); 7097 break; 7098 case WMI_SERVICE_AVAILABLE_EVENTID: 7099 ath12k_service_available_event(ab, skb); 7100 break; 7101 case WMI_PEER_ASSOC_CONF_EVENTID: 7102 ath12k_peer_assoc_conf_event(ab, skb); 7103 break; 7104 case WMI_UPDATE_STATS_EVENTID: 7105 ath12k_update_stats_event(ab, skb); 7106 break; 7107 case WMI_PDEV_CTL_FAILSAFE_CHECK_EVENTID: 7108 ath12k_pdev_ctl_failsafe_check_event(ab, skb); 7109 break; 7110 case WMI_PDEV_CSA_SWITCH_COUNT_STATUS_EVENTID: 7111 ath12k_wmi_pdev_csa_switch_count_status_event(ab, skb); 7112 break; 7113 case WMI_PDEV_TEMPERATURE_EVENTID: 7114 ath12k_wmi_pdev_temperature_event(ab, skb); 7115 break; 7116 case WMI_PDEV_DMA_RING_BUF_RELEASE_EVENTID: 7117 ath12k_wmi_pdev_dma_ring_buf_release_event(ab, skb); 7118 break; 7119 case WMI_HOST_FILS_DISCOVERY_EVENTID: 7120 ath12k_fils_discovery_event(ab, skb); 7121 break; 7122 case WMI_OFFLOAD_PROB_RESP_TX_STATUS_EVENTID: 7123 ath12k_probe_resp_tx_status_event(ab, skb); 7124 break; 7125 case WMI_RFKILL_STATE_CHANGE_EVENTID: 7126 ath12k_rfkill_state_change_event(ab, skb); 7127 break; 7128 case WMI_TWT_ENABLE_EVENTID: 7129 ath12k_wmi_twt_enable_event(ab, skb); 7130 break; 7131 case WMI_TWT_DISABLE_EVENTID: 7132 ath12k_wmi_twt_disable_event(ab, skb); 7133 break; 7134 case WMI_P2P_NOA_EVENTID: 7135 ath12k_wmi_p2p_noa_event(ab, skb); 7136 break; 7137 /* add Unsupported events here */ 7138 case WMI_TBTTOFFSET_EXT_UPDATE_EVENTID: 7139 case WMI_PEER_OPER_MODE_CHANGE_EVENTID: 7140 case WMI_PDEV_DMA_RING_CFG_RSP_EVENTID: 7141 ath12k_dbg(ab, ATH12K_DBG_WMI, 7142 "ignoring unsupported event 0x%x\n", id); 7143 break; 7144 case WMI_PDEV_DFS_RADAR_DETECTION_EVENTID: 7145 ath12k_wmi_pdev_dfs_radar_detected_event(ab, skb); 7146 break; 7147 case WMI_VDEV_DELETE_RESP_EVENTID: 7148 ath12k_vdev_delete_resp_event(ab, skb); 7149 break; 7150 case WMI_DIAG_EVENTID: 7151 ath12k_wmi_diag_event(ab, skb); 7152 break; 7153 /* TODO: Add remaining events */ 7154 default: 7155 ath12k_dbg(ab, ATH12K_DBG_WMI, "Unknown eventid: 0x%x\n", id); 7156 break; 7157 } 7158 7159 out: 7160 dev_kfree_skb(skb); 7161 } 7162 7163 static int ath12k_connect_pdev_htc_service(struct ath12k_base *ab, 7164 u32 pdev_idx) 7165 { 7166 int status; 7167 u32 svc_id[] = { ATH12K_HTC_SVC_ID_WMI_CONTROL, 7168 ATH12K_HTC_SVC_ID_WMI_CONTROL_MAC1, 7169 ATH12K_HTC_SVC_ID_WMI_CONTROL_MAC2 }; 7170 struct ath12k_htc_svc_conn_req conn_req = {}; 7171 struct ath12k_htc_svc_conn_resp conn_resp = {}; 7172 7173 /* these fields are the same for all service endpoints */ 7174 conn_req.ep_ops.ep_tx_complete = ath12k_wmi_htc_tx_complete; 7175 conn_req.ep_ops.ep_rx_complete = ath12k_wmi_op_rx; 7176 conn_req.ep_ops.ep_tx_credits = ath12k_wmi_op_ep_tx_credits; 7177 7178 /* connect to control service */ 7179 conn_req.service_id = svc_id[pdev_idx]; 7180 7181 status = ath12k_htc_connect_service(&ab->htc, &conn_req, &conn_resp); 7182 if (status) { 7183 ath12k_warn(ab, "failed to connect to WMI CONTROL service status: %d\n", 7184 status); 7185 return status; 7186 } 7187 7188 ab->wmi_ab.wmi_endpoint_id[pdev_idx] = conn_resp.eid; 7189 ab->wmi_ab.wmi[pdev_idx].eid = conn_resp.eid; 7190 ab->wmi_ab.max_msg_len[pdev_idx] = conn_resp.max_msg_len; 7191 7192 return 0; 7193 } 7194 7195 static int 7196 ath12k_wmi_send_unit_test_cmd(struct ath12k *ar, 7197 struct wmi_unit_test_cmd ut_cmd, 7198 u32 *test_args) 7199 { 7200 struct ath12k_wmi_pdev *wmi = ar->wmi; 7201 struct wmi_unit_test_cmd *cmd; 7202 struct sk_buff *skb; 7203 struct wmi_tlv *tlv; 7204 void *ptr; 7205 u32 *ut_cmd_args; 7206 int buf_len, arg_len; 7207 int ret; 7208 int i; 7209 7210 arg_len = sizeof(u32) * le32_to_cpu(ut_cmd.num_args); 7211 buf_len = sizeof(ut_cmd) + arg_len + TLV_HDR_SIZE; 7212 7213 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, buf_len); 7214 if (!skb) 7215 return -ENOMEM; 7216 7217 cmd = (struct wmi_unit_test_cmd *)skb->data; 7218 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_UNIT_TEST_CMD, 7219 sizeof(ut_cmd)); 7220 7221 cmd->vdev_id = ut_cmd.vdev_id; 7222 cmd->module_id = ut_cmd.module_id; 7223 cmd->num_args = ut_cmd.num_args; 7224 cmd->diag_token = ut_cmd.diag_token; 7225 7226 ptr = skb->data + sizeof(ut_cmd); 7227 7228 tlv = ptr; 7229 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, arg_len); 7230 7231 ptr += TLV_HDR_SIZE; 7232 7233 ut_cmd_args = ptr; 7234 for (i = 0; i < le32_to_cpu(ut_cmd.num_args); i++) 7235 ut_cmd_args[i] = test_args[i]; 7236 7237 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 7238 "WMI unit test : module %d vdev %d n_args %d token %d\n", 7239 cmd->module_id, cmd->vdev_id, cmd->num_args, 7240 cmd->diag_token); 7241 7242 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_UNIT_TEST_CMDID); 7243 7244 if (ret) { 7245 ath12k_warn(ar->ab, "failed to send WMI_UNIT_TEST CMD :%d\n", 7246 ret); 7247 dev_kfree_skb(skb); 7248 } 7249 7250 return ret; 7251 } 7252 7253 int ath12k_wmi_simulate_radar(struct ath12k *ar) 7254 { 7255 struct ath12k_vif *arvif; 7256 u32 dfs_args[DFS_MAX_TEST_ARGS]; 7257 struct wmi_unit_test_cmd wmi_ut; 7258 bool arvif_found = false; 7259 7260 list_for_each_entry(arvif, &ar->arvifs, list) { 7261 if (arvif->is_started && arvif->vdev_type == WMI_VDEV_TYPE_AP) { 7262 arvif_found = true; 7263 break; 7264 } 7265 } 7266 7267 if (!arvif_found) 7268 return -EINVAL; 7269 7270 dfs_args[DFS_TEST_CMDID] = 0; 7271 dfs_args[DFS_TEST_PDEV_ID] = ar->pdev->pdev_id; 7272 /* Currently we could pass segment_id(b0 - b1), chirp(b2) 7273 * freq offset (b3 - b10) to unit test. For simulation 7274 * purpose this can be set to 0 which is valid. 7275 */ 7276 dfs_args[DFS_TEST_RADAR_PARAM] = 0; 7277 7278 wmi_ut.vdev_id = cpu_to_le32(arvif->vdev_id); 7279 wmi_ut.module_id = cpu_to_le32(DFS_UNIT_TEST_MODULE); 7280 wmi_ut.num_args = cpu_to_le32(DFS_MAX_TEST_ARGS); 7281 wmi_ut.diag_token = cpu_to_le32(DFS_UNIT_TEST_TOKEN); 7282 7283 ath12k_dbg(ar->ab, ATH12K_DBG_REG, "Triggering Radar Simulation\n"); 7284 7285 return ath12k_wmi_send_unit_test_cmd(ar, wmi_ut, dfs_args); 7286 } 7287 7288 int ath12k_wmi_connect(struct ath12k_base *ab) 7289 { 7290 u32 i; 7291 u8 wmi_ep_count; 7292 7293 wmi_ep_count = ab->htc.wmi_ep_count; 7294 if (wmi_ep_count > ab->hw_params->max_radios) 7295 return -1; 7296 7297 for (i = 0; i < wmi_ep_count; i++) 7298 ath12k_connect_pdev_htc_service(ab, i); 7299 7300 return 0; 7301 } 7302 7303 static void ath12k_wmi_pdev_detach(struct ath12k_base *ab, u8 pdev_id) 7304 { 7305 if (WARN_ON(pdev_id >= MAX_RADIOS)) 7306 return; 7307 7308 /* TODO: Deinit any pdev specific wmi resource */ 7309 } 7310 7311 int ath12k_wmi_pdev_attach(struct ath12k_base *ab, 7312 u8 pdev_id) 7313 { 7314 struct ath12k_wmi_pdev *wmi_handle; 7315 7316 if (pdev_id >= ab->hw_params->max_radios) 7317 return -EINVAL; 7318 7319 wmi_handle = &ab->wmi_ab.wmi[pdev_id]; 7320 7321 wmi_handle->wmi_ab = &ab->wmi_ab; 7322 7323 ab->wmi_ab.ab = ab; 7324 /* TODO: Init remaining resource specific to pdev */ 7325 7326 return 0; 7327 } 7328 7329 int ath12k_wmi_attach(struct ath12k_base *ab) 7330 { 7331 int ret; 7332 7333 ret = ath12k_wmi_pdev_attach(ab, 0); 7334 if (ret) 7335 return ret; 7336 7337 ab->wmi_ab.ab = ab; 7338 ab->wmi_ab.preferred_hw_mode = WMI_HOST_HW_MODE_MAX; 7339 7340 /* It's overwritten when service_ext_ready is handled */ 7341 if (ab->hw_params->single_pdev_only) 7342 ab->wmi_ab.preferred_hw_mode = WMI_HOST_HW_MODE_SINGLE; 7343 7344 /* TODO: Init remaining wmi soc resources required */ 7345 init_completion(&ab->wmi_ab.service_ready); 7346 init_completion(&ab->wmi_ab.unified_ready); 7347 7348 return 0; 7349 } 7350 7351 void ath12k_wmi_detach(struct ath12k_base *ab) 7352 { 7353 int i; 7354 7355 /* TODO: Deinit wmi resource specific to SOC as required */ 7356 7357 for (i = 0; i < ab->htc.wmi_ep_count; i++) 7358 ath12k_wmi_pdev_detach(ab, i); 7359 7360 ath12k_wmi_free_dbring_caps(ab); 7361 } 7362