1 // SPDX-License-Identifier: BSD-3-Clause-Clear 2 /* 3 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved. 4 * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved. 5 */ 6 #include <linux/skbuff.h> 7 #include <linux/ctype.h> 8 #include <net/mac80211.h> 9 #include <net/cfg80211.h> 10 #include <linux/completion.h> 11 #include <linux/if_ether.h> 12 #include <linux/types.h> 13 #include <linux/pci.h> 14 #include <linux/uuid.h> 15 #include <linux/time.h> 16 #include <linux/of.h> 17 #include "core.h" 18 #include "debug.h" 19 #include "mac.h" 20 #include "hw.h" 21 #include "peer.h" 22 #include "p2p.h" 23 24 struct ath12k_wmi_svc_ready_parse { 25 bool wmi_svc_bitmap_done; 26 }; 27 28 struct ath12k_wmi_dma_ring_caps_parse { 29 struct ath12k_wmi_dma_ring_caps_params *dma_ring_caps; 30 u32 n_dma_ring_caps; 31 }; 32 33 struct ath12k_wmi_service_ext_arg { 34 u32 default_conc_scan_config_bits; 35 u32 default_fw_config_bits; 36 struct ath12k_wmi_ppe_threshold_arg ppet; 37 u32 he_cap_info; 38 u32 mpdu_density; 39 u32 max_bssid_rx_filters; 40 u32 num_hw_modes; 41 u32 num_phy; 42 }; 43 44 struct ath12k_wmi_svc_rdy_ext_parse { 45 struct ath12k_wmi_service_ext_arg arg; 46 const struct ath12k_wmi_soc_mac_phy_hw_mode_caps_params *hw_caps; 47 const struct ath12k_wmi_hw_mode_cap_params *hw_mode_caps; 48 u32 n_hw_mode_caps; 49 u32 tot_phy_id; 50 struct ath12k_wmi_hw_mode_cap_params pref_hw_mode_caps; 51 struct ath12k_wmi_mac_phy_caps_params *mac_phy_caps; 52 u32 n_mac_phy_caps; 53 const struct ath12k_wmi_soc_hal_reg_caps_params *soc_hal_reg_caps; 54 const struct ath12k_wmi_hal_reg_caps_ext_params *ext_hal_reg_caps; 55 u32 n_ext_hal_reg_caps; 56 struct ath12k_wmi_dma_ring_caps_parse dma_caps_parse; 57 bool hw_mode_done; 58 bool mac_phy_done; 59 bool ext_hal_reg_done; 60 bool mac_phy_chainmask_combo_done; 61 bool mac_phy_chainmask_cap_done; 62 bool oem_dma_ring_cap_done; 63 bool dma_ring_cap_done; 64 }; 65 66 struct ath12k_wmi_svc_rdy_ext2_arg { 67 u32 reg_db_version; 68 u32 hw_min_max_tx_power_2ghz; 69 u32 hw_min_max_tx_power_5ghz; 70 u32 chwidth_num_peer_caps; 71 u32 preamble_puncture_bw; 72 u32 max_user_per_ppdu_ofdma; 73 u32 max_user_per_ppdu_mumimo; 74 u32 target_cap_flags; 75 u32 eht_cap_mac_info[WMI_MAX_EHTCAP_MAC_SIZE]; 76 u32 max_num_linkview_peers; 77 u32 max_num_msduq_supported_per_tid; 78 u32 default_num_msduq_supported_per_tid; 79 }; 80 81 struct ath12k_wmi_svc_rdy_ext2_parse { 82 struct ath12k_wmi_svc_rdy_ext2_arg arg; 83 struct ath12k_wmi_dma_ring_caps_parse dma_caps_parse; 84 bool dma_ring_cap_done; 85 bool spectral_bin_scaling_done; 86 bool mac_phy_caps_ext_done; 87 }; 88 89 struct ath12k_wmi_rdy_parse { 90 u32 num_extra_mac_addr; 91 }; 92 93 struct ath12k_wmi_dma_buf_release_arg { 94 struct ath12k_wmi_dma_buf_release_fixed_params fixed; 95 const struct ath12k_wmi_dma_buf_release_entry_params *buf_entry; 96 const struct ath12k_wmi_dma_buf_release_meta_data_params *meta_data; 97 u32 num_buf_entry; 98 u32 num_meta; 99 bool buf_entry_done; 100 bool meta_data_done; 101 }; 102 103 struct ath12k_wmi_tlv_policy { 104 size_t min_len; 105 }; 106 107 struct wmi_tlv_mgmt_rx_parse { 108 const struct ath12k_wmi_mgmt_rx_params *fixed; 109 const u8 *frame_buf; 110 bool frame_buf_done; 111 }; 112 113 static const struct ath12k_wmi_tlv_policy ath12k_wmi_tlv_policies[] = { 114 [WMI_TAG_ARRAY_BYTE] = { .min_len = 0 }, 115 [WMI_TAG_ARRAY_UINT32] = { .min_len = 0 }, 116 [WMI_TAG_SERVICE_READY_EVENT] = { 117 .min_len = sizeof(struct wmi_service_ready_event) }, 118 [WMI_TAG_SERVICE_READY_EXT_EVENT] = { 119 .min_len = sizeof(struct wmi_service_ready_ext_event) }, 120 [WMI_TAG_SOC_MAC_PHY_HW_MODE_CAPS] = { 121 .min_len = sizeof(struct ath12k_wmi_soc_mac_phy_hw_mode_caps_params) }, 122 [WMI_TAG_SOC_HAL_REG_CAPABILITIES] = { 123 .min_len = sizeof(struct ath12k_wmi_soc_hal_reg_caps_params) }, 124 [WMI_TAG_VDEV_START_RESPONSE_EVENT] = { 125 .min_len = sizeof(struct wmi_vdev_start_resp_event) }, 126 [WMI_TAG_PEER_DELETE_RESP_EVENT] = { 127 .min_len = sizeof(struct wmi_peer_delete_resp_event) }, 128 [WMI_TAG_OFFLOAD_BCN_TX_STATUS_EVENT] = { 129 .min_len = sizeof(struct wmi_bcn_tx_status_event) }, 130 [WMI_TAG_VDEV_STOPPED_EVENT] = { 131 .min_len = sizeof(struct wmi_vdev_stopped_event) }, 132 [WMI_TAG_REG_CHAN_LIST_CC_EXT_EVENT] = { 133 .min_len = sizeof(struct wmi_reg_chan_list_cc_ext_event) }, 134 [WMI_TAG_MGMT_RX_HDR] = { 135 .min_len = sizeof(struct ath12k_wmi_mgmt_rx_params) }, 136 [WMI_TAG_MGMT_TX_COMPL_EVENT] = { 137 .min_len = sizeof(struct wmi_mgmt_tx_compl_event) }, 138 [WMI_TAG_SCAN_EVENT] = { 139 .min_len = sizeof(struct wmi_scan_event) }, 140 [WMI_TAG_PEER_STA_KICKOUT_EVENT] = { 141 .min_len = sizeof(struct wmi_peer_sta_kickout_event) }, 142 [WMI_TAG_ROAM_EVENT] = { 143 .min_len = sizeof(struct wmi_roam_event) }, 144 [WMI_TAG_CHAN_INFO_EVENT] = { 145 .min_len = sizeof(struct wmi_chan_info_event) }, 146 [WMI_TAG_PDEV_BSS_CHAN_INFO_EVENT] = { 147 .min_len = sizeof(struct wmi_pdev_bss_chan_info_event) }, 148 [WMI_TAG_VDEV_INSTALL_KEY_COMPLETE_EVENT] = { 149 .min_len = sizeof(struct wmi_vdev_install_key_compl_event) }, 150 [WMI_TAG_READY_EVENT] = { 151 .min_len = sizeof(struct ath12k_wmi_ready_event_min_params) }, 152 [WMI_TAG_SERVICE_AVAILABLE_EVENT] = { 153 .min_len = sizeof(struct wmi_service_available_event) }, 154 [WMI_TAG_PEER_ASSOC_CONF_EVENT] = { 155 .min_len = sizeof(struct wmi_peer_assoc_conf_event) }, 156 [WMI_TAG_RFKILL_EVENT] = { 157 .min_len = sizeof(struct wmi_rfkill_state_change_event) }, 158 [WMI_TAG_PDEV_CTL_FAILSAFE_CHECK_EVENT] = { 159 .min_len = sizeof(struct wmi_pdev_ctl_failsafe_chk_event) }, 160 [WMI_TAG_HOST_SWFDA_EVENT] = { 161 .min_len = sizeof(struct wmi_fils_discovery_event) }, 162 [WMI_TAG_OFFLOAD_PRB_RSP_TX_STATUS_EVENT] = { 163 .min_len = sizeof(struct wmi_probe_resp_tx_status_event) }, 164 [WMI_TAG_VDEV_DELETE_RESP_EVENT] = { 165 .min_len = sizeof(struct wmi_vdev_delete_resp_event) }, 166 [WMI_TAG_TWT_ENABLE_COMPLETE_EVENT] = { 167 .min_len = sizeof(struct wmi_twt_enable_event) }, 168 [WMI_TAG_TWT_DISABLE_COMPLETE_EVENT] = { 169 .min_len = sizeof(struct wmi_twt_disable_event) }, 170 [WMI_TAG_P2P_NOA_INFO] = { 171 .min_len = sizeof(struct ath12k_wmi_p2p_noa_info) }, 172 [WMI_TAG_P2P_NOA_EVENT] = { 173 .min_len = sizeof(struct wmi_p2p_noa_event) }, 174 }; 175 176 static __le32 ath12k_wmi_tlv_hdr(u32 cmd, u32 len) 177 { 178 return le32_encode_bits(cmd, WMI_TLV_TAG) | 179 le32_encode_bits(len, WMI_TLV_LEN); 180 } 181 182 static __le32 ath12k_wmi_tlv_cmd_hdr(u32 cmd, u32 len) 183 { 184 return ath12k_wmi_tlv_hdr(cmd, len - TLV_HDR_SIZE); 185 } 186 187 void ath12k_wmi_init_qcn9274(struct ath12k_base *ab, 188 struct ath12k_wmi_resource_config_arg *config) 189 { 190 config->num_vdevs = ab->num_radios * TARGET_NUM_VDEVS; 191 config->num_peers = ab->num_radios * 192 ath12k_core_get_max_peers_per_radio(ab); 193 config->num_tids = ath12k_core_get_max_num_tids(ab); 194 config->num_offload_peers = TARGET_NUM_OFFLD_PEERS; 195 config->num_offload_reorder_buffs = TARGET_NUM_OFFLD_REORDER_BUFFS; 196 config->num_peer_keys = TARGET_NUM_PEER_KEYS; 197 config->ast_skid_limit = TARGET_AST_SKID_LIMIT; 198 config->tx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1; 199 config->rx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1; 200 config->rx_timeout_pri[0] = TARGET_RX_TIMEOUT_LO_PRI; 201 config->rx_timeout_pri[1] = TARGET_RX_TIMEOUT_LO_PRI; 202 config->rx_timeout_pri[2] = TARGET_RX_TIMEOUT_LO_PRI; 203 config->rx_timeout_pri[3] = TARGET_RX_TIMEOUT_HI_PRI; 204 205 if (test_bit(ATH12K_FLAG_RAW_MODE, &ab->dev_flags)) 206 config->rx_decap_mode = TARGET_DECAP_MODE_RAW; 207 else 208 config->rx_decap_mode = TARGET_DECAP_MODE_NATIVE_WIFI; 209 210 config->scan_max_pending_req = TARGET_SCAN_MAX_PENDING_REQS; 211 config->bmiss_offload_max_vdev = TARGET_BMISS_OFFLOAD_MAX_VDEV; 212 config->roam_offload_max_vdev = TARGET_ROAM_OFFLOAD_MAX_VDEV; 213 config->roam_offload_max_ap_profiles = TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES; 214 config->num_mcast_groups = TARGET_NUM_MCAST_GROUPS; 215 config->num_mcast_table_elems = TARGET_NUM_MCAST_TABLE_ELEMS; 216 config->mcast2ucast_mode = TARGET_MCAST2UCAST_MODE; 217 config->tx_dbg_log_size = TARGET_TX_DBG_LOG_SIZE; 218 config->num_wds_entries = TARGET_NUM_WDS_ENTRIES; 219 config->dma_burst_size = TARGET_DMA_BURST_SIZE; 220 config->rx_skip_defrag_timeout_dup_detection_check = 221 TARGET_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK; 222 config->vow_config = TARGET_VOW_CONFIG; 223 config->gtk_offload_max_vdev = TARGET_GTK_OFFLOAD_MAX_VDEV; 224 config->num_msdu_desc = TARGET_NUM_MSDU_DESC; 225 config->beacon_tx_offload_max_vdev = ab->num_radios * TARGET_MAX_BCN_OFFLD; 226 config->rx_batchmode = TARGET_RX_BATCHMODE; 227 /* Indicates host supports peer map v3 and unmap v2 support */ 228 config->peer_map_unmap_version = 0x32; 229 config->twt_ap_pdev_count = ab->num_radios; 230 config->twt_ap_sta_count = 1000; 231 config->ema_max_vap_cnt = ab->num_radios; 232 config->ema_max_profile_period = TARGET_EMA_MAX_PROFILE_PERIOD; 233 config->beacon_tx_offload_max_vdev += config->ema_max_vap_cnt; 234 235 if (test_bit(WMI_TLV_SERVICE_PEER_METADATA_V1A_V1B_SUPPORT, ab->wmi_ab.svc_map)) 236 config->peer_metadata_ver = ATH12K_PEER_METADATA_V1B; 237 } 238 239 void ath12k_wmi_init_wcn7850(struct ath12k_base *ab, 240 struct ath12k_wmi_resource_config_arg *config) 241 { 242 config->num_vdevs = 4; 243 config->num_peers = 16; 244 config->num_tids = 32; 245 246 config->num_offload_peers = 3; 247 config->num_offload_reorder_buffs = 3; 248 config->num_peer_keys = TARGET_NUM_PEER_KEYS; 249 config->ast_skid_limit = TARGET_AST_SKID_LIMIT; 250 config->tx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1; 251 config->rx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1; 252 config->rx_timeout_pri[0] = TARGET_RX_TIMEOUT_LO_PRI; 253 config->rx_timeout_pri[1] = TARGET_RX_TIMEOUT_LO_PRI; 254 config->rx_timeout_pri[2] = TARGET_RX_TIMEOUT_LO_PRI; 255 config->rx_timeout_pri[3] = TARGET_RX_TIMEOUT_HI_PRI; 256 config->rx_decap_mode = TARGET_DECAP_MODE_NATIVE_WIFI; 257 config->scan_max_pending_req = TARGET_SCAN_MAX_PENDING_REQS; 258 config->bmiss_offload_max_vdev = TARGET_BMISS_OFFLOAD_MAX_VDEV; 259 config->roam_offload_max_vdev = TARGET_ROAM_OFFLOAD_MAX_VDEV; 260 config->roam_offload_max_ap_profiles = TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES; 261 config->num_mcast_groups = 0; 262 config->num_mcast_table_elems = 0; 263 config->mcast2ucast_mode = 0; 264 config->tx_dbg_log_size = TARGET_TX_DBG_LOG_SIZE; 265 config->num_wds_entries = 0; 266 config->dma_burst_size = 0; 267 config->rx_skip_defrag_timeout_dup_detection_check = 0; 268 config->vow_config = TARGET_VOW_CONFIG; 269 config->gtk_offload_max_vdev = 2; 270 config->num_msdu_desc = 0x400; 271 config->beacon_tx_offload_max_vdev = 2; 272 config->rx_batchmode = TARGET_RX_BATCHMODE; 273 274 config->peer_map_unmap_version = 0x1; 275 config->use_pdev_id = 1; 276 config->max_frag_entries = 0xa; 277 config->num_tdls_vdevs = 0x1; 278 config->num_tdls_conn_table_entries = 8; 279 config->beacon_tx_offload_max_vdev = 0x2; 280 config->num_multicast_filter_entries = 0x20; 281 config->num_wow_filters = 0x16; 282 config->num_keep_alive_pattern = 0; 283 } 284 285 #define PRIMAP(_hw_mode_) \ 286 [_hw_mode_] = _hw_mode_##_PRI 287 288 static const int ath12k_hw_mode_pri_map[] = { 289 PRIMAP(WMI_HOST_HW_MODE_SINGLE), 290 PRIMAP(WMI_HOST_HW_MODE_DBS), 291 PRIMAP(WMI_HOST_HW_MODE_SBS_PASSIVE), 292 PRIMAP(WMI_HOST_HW_MODE_SBS), 293 PRIMAP(WMI_HOST_HW_MODE_DBS_SBS), 294 PRIMAP(WMI_HOST_HW_MODE_DBS_OR_SBS), 295 /* keep last */ 296 PRIMAP(WMI_HOST_HW_MODE_MAX), 297 }; 298 299 static int 300 ath12k_wmi_tlv_iter(struct ath12k_base *ab, const void *ptr, size_t len, 301 int (*iter)(struct ath12k_base *ab, u16 tag, u16 len, 302 const void *ptr, void *data), 303 void *data) 304 { 305 const void *begin = ptr; 306 const struct wmi_tlv *tlv; 307 u16 tlv_tag, tlv_len; 308 int ret; 309 310 while (len > 0) { 311 if (len < sizeof(*tlv)) { 312 ath12k_err(ab, "wmi tlv parse failure at byte %zd (%zu bytes left, %zu expected)\n", 313 ptr - begin, len, sizeof(*tlv)); 314 return -EINVAL; 315 } 316 317 tlv = ptr; 318 tlv_tag = le32_get_bits(tlv->header, WMI_TLV_TAG); 319 tlv_len = le32_get_bits(tlv->header, WMI_TLV_LEN); 320 ptr += sizeof(*tlv); 321 len -= sizeof(*tlv); 322 323 if (tlv_len > len) { 324 ath12k_err(ab, "wmi tlv parse failure of tag %u at byte %zd (%zu bytes left, %u expected)\n", 325 tlv_tag, ptr - begin, len, tlv_len); 326 return -EINVAL; 327 } 328 329 if (tlv_tag < ARRAY_SIZE(ath12k_wmi_tlv_policies) && 330 ath12k_wmi_tlv_policies[tlv_tag].min_len && 331 ath12k_wmi_tlv_policies[tlv_tag].min_len > tlv_len) { 332 ath12k_err(ab, "wmi tlv parse failure of tag %u at byte %zd (%u bytes is less than min length %zu)\n", 333 tlv_tag, ptr - begin, tlv_len, 334 ath12k_wmi_tlv_policies[tlv_tag].min_len); 335 return -EINVAL; 336 } 337 338 ret = iter(ab, tlv_tag, tlv_len, ptr, data); 339 if (ret) 340 return ret; 341 342 ptr += tlv_len; 343 len -= tlv_len; 344 } 345 346 return 0; 347 } 348 349 static int ath12k_wmi_tlv_iter_parse(struct ath12k_base *ab, u16 tag, u16 len, 350 const void *ptr, void *data) 351 { 352 const void **tb = data; 353 354 if (tag < WMI_TAG_MAX) 355 tb[tag] = ptr; 356 357 return 0; 358 } 359 360 static int ath12k_wmi_tlv_parse(struct ath12k_base *ar, const void **tb, 361 const void *ptr, size_t len) 362 { 363 return ath12k_wmi_tlv_iter(ar, ptr, len, ath12k_wmi_tlv_iter_parse, 364 (void *)tb); 365 } 366 367 static const void ** 368 ath12k_wmi_tlv_parse_alloc(struct ath12k_base *ab, 369 struct sk_buff *skb, gfp_t gfp) 370 { 371 const void **tb; 372 int ret; 373 374 tb = kcalloc(WMI_TAG_MAX, sizeof(*tb), gfp); 375 if (!tb) 376 return ERR_PTR(-ENOMEM); 377 378 ret = ath12k_wmi_tlv_parse(ab, tb, skb->data, skb->len); 379 if (ret) { 380 kfree(tb); 381 return ERR_PTR(ret); 382 } 383 384 return tb; 385 } 386 387 static int ath12k_wmi_cmd_send_nowait(struct ath12k_wmi_pdev *wmi, struct sk_buff *skb, 388 u32 cmd_id) 389 { 390 struct ath12k_skb_cb *skb_cb = ATH12K_SKB_CB(skb); 391 struct ath12k_base *ab = wmi->wmi_ab->ab; 392 struct wmi_cmd_hdr *cmd_hdr; 393 int ret; 394 395 if (!skb_push(skb, sizeof(struct wmi_cmd_hdr))) 396 return -ENOMEM; 397 398 cmd_hdr = (struct wmi_cmd_hdr *)skb->data; 399 cmd_hdr->cmd_id = le32_encode_bits(cmd_id, WMI_CMD_HDR_CMD_ID); 400 401 memset(skb_cb, 0, sizeof(*skb_cb)); 402 ret = ath12k_htc_send(&ab->htc, wmi->eid, skb); 403 404 if (ret) 405 goto err_pull; 406 407 return 0; 408 409 err_pull: 410 skb_pull(skb, sizeof(struct wmi_cmd_hdr)); 411 return ret; 412 } 413 414 int ath12k_wmi_cmd_send(struct ath12k_wmi_pdev *wmi, struct sk_buff *skb, 415 u32 cmd_id) 416 { 417 struct ath12k_wmi_base *wmi_ab = wmi->wmi_ab; 418 int ret = -EOPNOTSUPP; 419 420 might_sleep(); 421 422 wait_event_timeout(wmi_ab->tx_credits_wq, ({ 423 ret = ath12k_wmi_cmd_send_nowait(wmi, skb, cmd_id); 424 425 if (ret && test_bit(ATH12K_FLAG_CRASH_FLUSH, &wmi_ab->ab->dev_flags)) 426 ret = -ESHUTDOWN; 427 428 (ret != -EAGAIN); 429 }), WMI_SEND_TIMEOUT_HZ); 430 431 if (ret == -EAGAIN) 432 ath12k_warn(wmi_ab->ab, "wmi command %d timeout\n", cmd_id); 433 434 return ret; 435 } 436 437 static int ath12k_pull_svc_ready_ext(struct ath12k_wmi_pdev *wmi_handle, 438 const void *ptr, 439 struct ath12k_wmi_service_ext_arg *arg) 440 { 441 const struct wmi_service_ready_ext_event *ev = ptr; 442 int i; 443 444 if (!ev) 445 return -EINVAL; 446 447 /* Move this to host based bitmap */ 448 arg->default_conc_scan_config_bits = 449 le32_to_cpu(ev->default_conc_scan_config_bits); 450 arg->default_fw_config_bits = le32_to_cpu(ev->default_fw_config_bits); 451 arg->he_cap_info = le32_to_cpu(ev->he_cap_info); 452 arg->mpdu_density = le32_to_cpu(ev->mpdu_density); 453 arg->max_bssid_rx_filters = le32_to_cpu(ev->max_bssid_rx_filters); 454 arg->ppet.numss_m1 = le32_to_cpu(ev->ppet.numss_m1); 455 arg->ppet.ru_bit_mask = le32_to_cpu(ev->ppet.ru_info); 456 457 for (i = 0; i < WMI_MAX_NUM_SS; i++) 458 arg->ppet.ppet16_ppet8_ru3_ru0[i] = 459 le32_to_cpu(ev->ppet.ppet16_ppet8_ru3_ru0[i]); 460 461 return 0; 462 } 463 464 static int 465 ath12k_pull_mac_phy_cap_svc_ready_ext(struct ath12k_wmi_pdev *wmi_handle, 466 struct ath12k_wmi_svc_rdy_ext_parse *svc, 467 u8 hw_mode_id, u8 phy_id, 468 struct ath12k_pdev *pdev) 469 { 470 const struct ath12k_wmi_mac_phy_caps_params *mac_caps; 471 const struct ath12k_wmi_soc_mac_phy_hw_mode_caps_params *hw_caps = svc->hw_caps; 472 const struct ath12k_wmi_hw_mode_cap_params *wmi_hw_mode_caps = svc->hw_mode_caps; 473 const struct ath12k_wmi_mac_phy_caps_params *wmi_mac_phy_caps = svc->mac_phy_caps; 474 struct ath12k_base *ab = wmi_handle->wmi_ab->ab; 475 struct ath12k_band_cap *cap_band; 476 struct ath12k_pdev_cap *pdev_cap = &pdev->cap; 477 struct ath12k_fw_pdev *fw_pdev; 478 u32 phy_map; 479 u32 hw_idx, phy_idx = 0; 480 int i; 481 482 if (!hw_caps || !wmi_hw_mode_caps || !svc->soc_hal_reg_caps) 483 return -EINVAL; 484 485 for (hw_idx = 0; hw_idx < le32_to_cpu(hw_caps->num_hw_modes); hw_idx++) { 486 if (hw_mode_id == le32_to_cpu(wmi_hw_mode_caps[hw_idx].hw_mode_id)) 487 break; 488 489 phy_map = le32_to_cpu(wmi_hw_mode_caps[hw_idx].phy_id_map); 490 phy_idx = fls(phy_map); 491 } 492 493 if (hw_idx == le32_to_cpu(hw_caps->num_hw_modes)) 494 return -EINVAL; 495 496 phy_idx += phy_id; 497 if (phy_id >= le32_to_cpu(svc->soc_hal_reg_caps->num_phy)) 498 return -EINVAL; 499 500 mac_caps = wmi_mac_phy_caps + phy_idx; 501 502 pdev->pdev_id = ath12k_wmi_mac_phy_get_pdev_id(mac_caps); 503 pdev->hw_link_id = ath12k_wmi_mac_phy_get_hw_link_id(mac_caps); 504 pdev_cap->supported_bands |= le32_to_cpu(mac_caps->supported_bands); 505 pdev_cap->ampdu_density = le32_to_cpu(mac_caps->ampdu_density); 506 507 fw_pdev = &ab->fw_pdev[ab->fw_pdev_count]; 508 fw_pdev->supported_bands = le32_to_cpu(mac_caps->supported_bands); 509 fw_pdev->pdev_id = ath12k_wmi_mac_phy_get_pdev_id(mac_caps); 510 fw_pdev->phy_id = le32_to_cpu(mac_caps->phy_id); 511 ab->fw_pdev_count++; 512 513 /* Take non-zero tx/rx chainmask. If tx/rx chainmask differs from 514 * band to band for a single radio, need to see how this should be 515 * handled. 516 */ 517 if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_2G_CAP) { 518 pdev_cap->tx_chain_mask = le32_to_cpu(mac_caps->tx_chain_mask_2g); 519 pdev_cap->rx_chain_mask = le32_to_cpu(mac_caps->rx_chain_mask_2g); 520 } else if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_5G_CAP) { 521 pdev_cap->vht_cap = le32_to_cpu(mac_caps->vht_cap_info_5g); 522 pdev_cap->vht_mcs = le32_to_cpu(mac_caps->vht_supp_mcs_5g); 523 pdev_cap->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_5g); 524 pdev_cap->tx_chain_mask = le32_to_cpu(mac_caps->tx_chain_mask_5g); 525 pdev_cap->rx_chain_mask = le32_to_cpu(mac_caps->rx_chain_mask_5g); 526 } else { 527 return -EINVAL; 528 } 529 530 /* tx/rx chainmask reported from fw depends on the actual hw chains used, 531 * For example, for 4x4 capable macphys, first 4 chains can be used for first 532 * mac and the remaining 4 chains can be used for the second mac or vice-versa. 533 * In this case, tx/rx chainmask 0xf will be advertised for first mac and 0xf0 534 * will be advertised for second mac or vice-versa. Compute the shift value 535 * for tx/rx chainmask which will be used to advertise supported ht/vht rates to 536 * mac80211. 537 */ 538 pdev_cap->tx_chain_mask_shift = 539 find_first_bit((unsigned long *)&pdev_cap->tx_chain_mask, 32); 540 pdev_cap->rx_chain_mask_shift = 541 find_first_bit((unsigned long *)&pdev_cap->rx_chain_mask, 32); 542 543 if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_2G_CAP) { 544 cap_band = &pdev_cap->band[NL80211_BAND_2GHZ]; 545 cap_band->phy_id = le32_to_cpu(mac_caps->phy_id); 546 cap_band->max_bw_supported = le32_to_cpu(mac_caps->max_bw_supported_2g); 547 cap_band->ht_cap_info = le32_to_cpu(mac_caps->ht_cap_info_2g); 548 cap_band->he_cap_info[0] = le32_to_cpu(mac_caps->he_cap_info_2g); 549 cap_band->he_cap_info[1] = le32_to_cpu(mac_caps->he_cap_info_2g_ext); 550 cap_band->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_2g); 551 for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++) 552 cap_band->he_cap_phy_info[i] = 553 le32_to_cpu(mac_caps->he_cap_phy_info_2g[i]); 554 555 cap_band->he_ppet.numss_m1 = le32_to_cpu(mac_caps->he_ppet2g.numss_m1); 556 cap_band->he_ppet.ru_bit_mask = le32_to_cpu(mac_caps->he_ppet2g.ru_info); 557 558 for (i = 0; i < WMI_MAX_NUM_SS; i++) 559 cap_band->he_ppet.ppet16_ppet8_ru3_ru0[i] = 560 le32_to_cpu(mac_caps->he_ppet2g.ppet16_ppet8_ru3_ru0[i]); 561 } 562 563 if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_5G_CAP) { 564 cap_band = &pdev_cap->band[NL80211_BAND_5GHZ]; 565 cap_band->phy_id = le32_to_cpu(mac_caps->phy_id); 566 cap_band->max_bw_supported = 567 le32_to_cpu(mac_caps->max_bw_supported_5g); 568 cap_band->ht_cap_info = le32_to_cpu(mac_caps->ht_cap_info_5g); 569 cap_band->he_cap_info[0] = le32_to_cpu(mac_caps->he_cap_info_5g); 570 cap_band->he_cap_info[1] = le32_to_cpu(mac_caps->he_cap_info_5g_ext); 571 cap_band->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_5g); 572 for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++) 573 cap_band->he_cap_phy_info[i] = 574 le32_to_cpu(mac_caps->he_cap_phy_info_5g[i]); 575 576 cap_band->he_ppet.numss_m1 = le32_to_cpu(mac_caps->he_ppet5g.numss_m1); 577 cap_band->he_ppet.ru_bit_mask = le32_to_cpu(mac_caps->he_ppet5g.ru_info); 578 579 for (i = 0; i < WMI_MAX_NUM_SS; i++) 580 cap_band->he_ppet.ppet16_ppet8_ru3_ru0[i] = 581 le32_to_cpu(mac_caps->he_ppet5g.ppet16_ppet8_ru3_ru0[i]); 582 583 cap_band = &pdev_cap->band[NL80211_BAND_6GHZ]; 584 cap_band->max_bw_supported = 585 le32_to_cpu(mac_caps->max_bw_supported_5g); 586 cap_band->ht_cap_info = le32_to_cpu(mac_caps->ht_cap_info_5g); 587 cap_band->he_cap_info[0] = le32_to_cpu(mac_caps->he_cap_info_5g); 588 cap_band->he_cap_info[1] = le32_to_cpu(mac_caps->he_cap_info_5g_ext); 589 cap_band->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_5g); 590 for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++) 591 cap_band->he_cap_phy_info[i] = 592 le32_to_cpu(mac_caps->he_cap_phy_info_5g[i]); 593 594 cap_band->he_ppet.numss_m1 = le32_to_cpu(mac_caps->he_ppet5g.numss_m1); 595 cap_band->he_ppet.ru_bit_mask = le32_to_cpu(mac_caps->he_ppet5g.ru_info); 596 597 for (i = 0; i < WMI_MAX_NUM_SS; i++) 598 cap_band->he_ppet.ppet16_ppet8_ru3_ru0[i] = 599 le32_to_cpu(mac_caps->he_ppet5g.ppet16_ppet8_ru3_ru0[i]); 600 } 601 602 return 0; 603 } 604 605 static int 606 ath12k_pull_reg_cap_svc_rdy_ext(struct ath12k_wmi_pdev *wmi_handle, 607 const struct ath12k_wmi_soc_hal_reg_caps_params *reg_caps, 608 const struct ath12k_wmi_hal_reg_caps_ext_params *ext_caps, 609 u8 phy_idx, 610 struct ath12k_wmi_hal_reg_capabilities_ext_arg *param) 611 { 612 const struct ath12k_wmi_hal_reg_caps_ext_params *ext_reg_cap; 613 614 if (!reg_caps || !ext_caps) 615 return -EINVAL; 616 617 if (phy_idx >= le32_to_cpu(reg_caps->num_phy)) 618 return -EINVAL; 619 620 ext_reg_cap = &ext_caps[phy_idx]; 621 622 param->phy_id = le32_to_cpu(ext_reg_cap->phy_id); 623 param->eeprom_reg_domain = le32_to_cpu(ext_reg_cap->eeprom_reg_domain); 624 param->eeprom_reg_domain_ext = 625 le32_to_cpu(ext_reg_cap->eeprom_reg_domain_ext); 626 param->regcap1 = le32_to_cpu(ext_reg_cap->regcap1); 627 param->regcap2 = le32_to_cpu(ext_reg_cap->regcap2); 628 /* check if param->wireless_mode is needed */ 629 param->low_2ghz_chan = le32_to_cpu(ext_reg_cap->low_2ghz_chan); 630 param->high_2ghz_chan = le32_to_cpu(ext_reg_cap->high_2ghz_chan); 631 param->low_5ghz_chan = le32_to_cpu(ext_reg_cap->low_5ghz_chan); 632 param->high_5ghz_chan = le32_to_cpu(ext_reg_cap->high_5ghz_chan); 633 634 return 0; 635 } 636 637 static int ath12k_pull_service_ready_tlv(struct ath12k_base *ab, 638 const void *evt_buf, 639 struct ath12k_wmi_target_cap_arg *cap) 640 { 641 const struct wmi_service_ready_event *ev = evt_buf; 642 643 if (!ev) { 644 ath12k_err(ab, "%s: failed by NULL param\n", 645 __func__); 646 return -EINVAL; 647 } 648 649 cap->phy_capability = le32_to_cpu(ev->phy_capability); 650 cap->max_frag_entry = le32_to_cpu(ev->max_frag_entry); 651 cap->num_rf_chains = le32_to_cpu(ev->num_rf_chains); 652 cap->ht_cap_info = le32_to_cpu(ev->ht_cap_info); 653 cap->vht_cap_info = le32_to_cpu(ev->vht_cap_info); 654 cap->vht_supp_mcs = le32_to_cpu(ev->vht_supp_mcs); 655 cap->hw_min_tx_power = le32_to_cpu(ev->hw_min_tx_power); 656 cap->hw_max_tx_power = le32_to_cpu(ev->hw_max_tx_power); 657 cap->sys_cap_info = le32_to_cpu(ev->sys_cap_info); 658 cap->min_pkt_size_enable = le32_to_cpu(ev->min_pkt_size_enable); 659 cap->max_bcn_ie_size = le32_to_cpu(ev->max_bcn_ie_size); 660 cap->max_num_scan_channels = le32_to_cpu(ev->max_num_scan_channels); 661 cap->max_supported_macs = le32_to_cpu(ev->max_supported_macs); 662 cap->wmi_fw_sub_feat_caps = le32_to_cpu(ev->wmi_fw_sub_feat_caps); 663 cap->txrx_chainmask = le32_to_cpu(ev->txrx_chainmask); 664 cap->default_dbs_hw_mode_index = le32_to_cpu(ev->default_dbs_hw_mode_index); 665 cap->num_msdu_desc = le32_to_cpu(ev->num_msdu_desc); 666 667 return 0; 668 } 669 670 /* Save the wmi_service_bitmap into a linear bitmap. The wmi_services in 671 * wmi_service ready event are advertised in b0-b3 (LSB 4-bits) of each 672 * 4-byte word. 673 */ 674 static void ath12k_wmi_service_bitmap_copy(struct ath12k_wmi_pdev *wmi, 675 const u32 *wmi_svc_bm) 676 { 677 int i, j; 678 679 for (i = 0, j = 0; i < WMI_SERVICE_BM_SIZE && j < WMI_MAX_SERVICE; i++) { 680 do { 681 if (wmi_svc_bm[i] & BIT(j % WMI_SERVICE_BITS_IN_SIZE32)) 682 set_bit(j, wmi->wmi_ab->svc_map); 683 } while (++j % WMI_SERVICE_BITS_IN_SIZE32); 684 } 685 } 686 687 static int ath12k_wmi_svc_rdy_parse(struct ath12k_base *ab, u16 tag, u16 len, 688 const void *ptr, void *data) 689 { 690 struct ath12k_wmi_svc_ready_parse *svc_ready = data; 691 struct ath12k_wmi_pdev *wmi_handle = &ab->wmi_ab.wmi[0]; 692 u16 expect_len; 693 694 switch (tag) { 695 case WMI_TAG_SERVICE_READY_EVENT: 696 if (ath12k_pull_service_ready_tlv(ab, ptr, &ab->target_caps)) 697 return -EINVAL; 698 break; 699 700 case WMI_TAG_ARRAY_UINT32: 701 if (!svc_ready->wmi_svc_bitmap_done) { 702 expect_len = WMI_SERVICE_BM_SIZE * sizeof(u32); 703 if (len < expect_len) { 704 ath12k_warn(ab, "invalid len %d for the tag 0x%x\n", 705 len, tag); 706 return -EINVAL; 707 } 708 709 ath12k_wmi_service_bitmap_copy(wmi_handle, ptr); 710 711 svc_ready->wmi_svc_bitmap_done = true; 712 } 713 break; 714 default: 715 break; 716 } 717 718 return 0; 719 } 720 721 static int ath12k_service_ready_event(struct ath12k_base *ab, struct sk_buff *skb) 722 { 723 struct ath12k_wmi_svc_ready_parse svc_ready = { }; 724 int ret; 725 726 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 727 ath12k_wmi_svc_rdy_parse, 728 &svc_ready); 729 if (ret) { 730 ath12k_warn(ab, "failed to parse tlv %d\n", ret); 731 return ret; 732 } 733 734 return 0; 735 } 736 737 static u32 ath12k_wmi_mgmt_get_freq(struct ath12k *ar, 738 struct ieee80211_tx_info *info) 739 { 740 struct ath12k_base *ab = ar->ab; 741 u32 freq = 0; 742 743 if (ab->hw_params->single_pdev_only && 744 ar->scan.is_roc && 745 (info->flags & IEEE80211_TX_CTL_TX_OFFCHAN)) 746 freq = ar->scan.roc_freq; 747 748 return freq; 749 } 750 751 struct sk_buff *ath12k_wmi_alloc_skb(struct ath12k_wmi_base *wmi_ab, u32 len) 752 { 753 struct sk_buff *skb; 754 struct ath12k_base *ab = wmi_ab->ab; 755 u32 round_len = roundup(len, 4); 756 757 skb = ath12k_htc_alloc_skb(ab, WMI_SKB_HEADROOM + round_len); 758 if (!skb) 759 return NULL; 760 761 skb_reserve(skb, WMI_SKB_HEADROOM); 762 if (!IS_ALIGNED((unsigned long)skb->data, 4)) 763 ath12k_warn(ab, "unaligned WMI skb data\n"); 764 765 skb_put(skb, round_len); 766 memset(skb->data, 0, round_len); 767 768 return skb; 769 } 770 771 int ath12k_wmi_mgmt_send(struct ath12k *ar, u32 vdev_id, u32 buf_id, 772 struct sk_buff *frame) 773 { 774 struct ath12k_wmi_pdev *wmi = ar->wmi; 775 struct wmi_mgmt_send_cmd *cmd; 776 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(frame); 777 struct wmi_tlv *frame_tlv; 778 struct sk_buff *skb; 779 u32 buf_len; 780 int ret, len; 781 782 buf_len = min_t(int, frame->len, WMI_MGMT_SEND_DOWNLD_LEN); 783 784 len = sizeof(*cmd) + sizeof(*frame_tlv) + roundup(buf_len, 4); 785 786 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 787 if (!skb) 788 return -ENOMEM; 789 790 cmd = (struct wmi_mgmt_send_cmd *)skb->data; 791 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MGMT_TX_SEND_CMD, 792 sizeof(*cmd)); 793 cmd->vdev_id = cpu_to_le32(vdev_id); 794 cmd->desc_id = cpu_to_le32(buf_id); 795 cmd->chanfreq = cpu_to_le32(ath12k_wmi_mgmt_get_freq(ar, info)); 796 cmd->paddr_lo = cpu_to_le32(lower_32_bits(ATH12K_SKB_CB(frame)->paddr)); 797 cmd->paddr_hi = cpu_to_le32(upper_32_bits(ATH12K_SKB_CB(frame)->paddr)); 798 cmd->frame_len = cpu_to_le32(frame->len); 799 cmd->buf_len = cpu_to_le32(buf_len); 800 cmd->tx_params_valid = 0; 801 802 frame_tlv = (struct wmi_tlv *)(skb->data + sizeof(*cmd)); 803 frame_tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, buf_len); 804 805 memcpy(frame_tlv->value, frame->data, buf_len); 806 807 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_MGMT_TX_SEND_CMDID); 808 if (ret) { 809 ath12k_warn(ar->ab, 810 "failed to submit WMI_MGMT_TX_SEND_CMDID cmd\n"); 811 dev_kfree_skb(skb); 812 } 813 814 return ret; 815 } 816 817 int ath12k_wmi_vdev_create(struct ath12k *ar, u8 *macaddr, 818 struct ath12k_wmi_vdev_create_arg *args) 819 { 820 struct ath12k_wmi_pdev *wmi = ar->wmi; 821 struct wmi_vdev_create_cmd *cmd; 822 struct sk_buff *skb; 823 struct ath12k_wmi_vdev_txrx_streams_params *txrx_streams; 824 struct wmi_tlv *tlv; 825 int ret, len; 826 void *ptr; 827 828 /* It can be optimized my sending tx/rx chain configuration 829 * only for supported bands instead of always sending it for 830 * both the bands. 831 */ 832 len = sizeof(*cmd) + TLV_HDR_SIZE + 833 (WMI_NUM_SUPPORTED_BAND_MAX * sizeof(*txrx_streams)); 834 835 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 836 if (!skb) 837 return -ENOMEM; 838 839 cmd = (struct wmi_vdev_create_cmd *)skb->data; 840 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_CREATE_CMD, 841 sizeof(*cmd)); 842 843 cmd->vdev_id = cpu_to_le32(args->if_id); 844 cmd->vdev_type = cpu_to_le32(args->type); 845 cmd->vdev_subtype = cpu_to_le32(args->subtype); 846 cmd->num_cfg_txrx_streams = cpu_to_le32(WMI_NUM_SUPPORTED_BAND_MAX); 847 cmd->pdev_id = cpu_to_le32(args->pdev_id); 848 cmd->mbssid_flags = cpu_to_le32(args->mbssid_flags); 849 cmd->mbssid_tx_vdev_id = cpu_to_le32(args->mbssid_tx_vdev_id); 850 cmd->vdev_stats_id = cpu_to_le32(args->if_stats_id); 851 ether_addr_copy(cmd->vdev_macaddr.addr, macaddr); 852 853 if (args->if_stats_id != ATH12K_INVAL_VDEV_STATS_ID) 854 cmd->vdev_stats_id_valid = cpu_to_le32(BIT(0)); 855 856 ptr = skb->data + sizeof(*cmd); 857 len = WMI_NUM_SUPPORTED_BAND_MAX * sizeof(*txrx_streams); 858 859 tlv = ptr; 860 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len); 861 862 ptr += TLV_HDR_SIZE; 863 txrx_streams = ptr; 864 len = sizeof(*txrx_streams); 865 txrx_streams->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_TXRX_STREAMS, 866 len); 867 txrx_streams->band = cpu_to_le32(WMI_TPC_CHAINMASK_CONFIG_BAND_2G); 868 txrx_streams->supported_tx_streams = 869 cpu_to_le32(args->chains[NL80211_BAND_2GHZ].tx); 870 txrx_streams->supported_rx_streams = 871 cpu_to_le32(args->chains[NL80211_BAND_2GHZ].rx); 872 873 txrx_streams++; 874 txrx_streams->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_TXRX_STREAMS, 875 len); 876 txrx_streams->band = cpu_to_le32(WMI_TPC_CHAINMASK_CONFIG_BAND_5G); 877 txrx_streams->supported_tx_streams = 878 cpu_to_le32(args->chains[NL80211_BAND_5GHZ].tx); 879 txrx_streams->supported_rx_streams = 880 cpu_to_le32(args->chains[NL80211_BAND_5GHZ].rx); 881 882 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 883 "WMI vdev create: id %d type %d subtype %d macaddr %pM pdevid %d\n", 884 args->if_id, args->type, args->subtype, 885 macaddr, args->pdev_id); 886 887 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_CREATE_CMDID); 888 if (ret) { 889 ath12k_warn(ar->ab, 890 "failed to submit WMI_VDEV_CREATE_CMDID\n"); 891 dev_kfree_skb(skb); 892 } 893 894 return ret; 895 } 896 897 int ath12k_wmi_vdev_delete(struct ath12k *ar, u8 vdev_id) 898 { 899 struct ath12k_wmi_pdev *wmi = ar->wmi; 900 struct wmi_vdev_delete_cmd *cmd; 901 struct sk_buff *skb; 902 int ret; 903 904 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 905 if (!skb) 906 return -ENOMEM; 907 908 cmd = (struct wmi_vdev_delete_cmd *)skb->data; 909 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_DELETE_CMD, 910 sizeof(*cmd)); 911 cmd->vdev_id = cpu_to_le32(vdev_id); 912 913 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "WMI vdev delete id %d\n", vdev_id); 914 915 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_DELETE_CMDID); 916 if (ret) { 917 ath12k_warn(ar->ab, "failed to submit WMI_VDEV_DELETE_CMDID\n"); 918 dev_kfree_skb(skb); 919 } 920 921 return ret; 922 } 923 924 int ath12k_wmi_vdev_stop(struct ath12k *ar, u8 vdev_id) 925 { 926 struct ath12k_wmi_pdev *wmi = ar->wmi; 927 struct wmi_vdev_stop_cmd *cmd; 928 struct sk_buff *skb; 929 int ret; 930 931 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 932 if (!skb) 933 return -ENOMEM; 934 935 cmd = (struct wmi_vdev_stop_cmd *)skb->data; 936 937 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_STOP_CMD, 938 sizeof(*cmd)); 939 cmd->vdev_id = cpu_to_le32(vdev_id); 940 941 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "WMI vdev stop id 0x%x\n", vdev_id); 942 943 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_STOP_CMDID); 944 if (ret) { 945 ath12k_warn(ar->ab, "failed to submit WMI_VDEV_STOP cmd\n"); 946 dev_kfree_skb(skb); 947 } 948 949 return ret; 950 } 951 952 int ath12k_wmi_vdev_down(struct ath12k *ar, u8 vdev_id) 953 { 954 struct ath12k_wmi_pdev *wmi = ar->wmi; 955 struct wmi_vdev_down_cmd *cmd; 956 struct sk_buff *skb; 957 int ret; 958 959 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 960 if (!skb) 961 return -ENOMEM; 962 963 cmd = (struct wmi_vdev_down_cmd *)skb->data; 964 965 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_DOWN_CMD, 966 sizeof(*cmd)); 967 cmd->vdev_id = cpu_to_le32(vdev_id); 968 969 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "WMI vdev down id 0x%x\n", vdev_id); 970 971 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_DOWN_CMDID); 972 if (ret) { 973 ath12k_warn(ar->ab, "failed to submit WMI_VDEV_DOWN cmd\n"); 974 dev_kfree_skb(skb); 975 } 976 977 return ret; 978 } 979 980 static void ath12k_wmi_put_wmi_channel(struct ath12k_wmi_channel_params *chan, 981 struct wmi_vdev_start_req_arg *arg) 982 { 983 memset(chan, 0, sizeof(*chan)); 984 985 chan->mhz = cpu_to_le32(arg->freq); 986 chan->band_center_freq1 = cpu_to_le32(arg->band_center_freq1); 987 if (arg->mode == MODE_11AC_VHT80_80) 988 chan->band_center_freq2 = cpu_to_le32(arg->band_center_freq2); 989 else 990 chan->band_center_freq2 = 0; 991 992 chan->info |= le32_encode_bits(arg->mode, WMI_CHAN_INFO_MODE); 993 if (arg->passive) 994 chan->info |= cpu_to_le32(WMI_CHAN_INFO_PASSIVE); 995 if (arg->allow_ibss) 996 chan->info |= cpu_to_le32(WMI_CHAN_INFO_ADHOC_ALLOWED); 997 if (arg->allow_ht) 998 chan->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HT); 999 if (arg->allow_vht) 1000 chan->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_VHT); 1001 if (arg->allow_he) 1002 chan->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HE); 1003 if (arg->ht40plus) 1004 chan->info |= cpu_to_le32(WMI_CHAN_INFO_HT40_PLUS); 1005 if (arg->chan_radar) 1006 chan->info |= cpu_to_le32(WMI_CHAN_INFO_DFS); 1007 if (arg->freq2_radar) 1008 chan->info |= cpu_to_le32(WMI_CHAN_INFO_DFS_FREQ2); 1009 1010 chan->reg_info_1 = le32_encode_bits(arg->max_power, 1011 WMI_CHAN_REG_INFO1_MAX_PWR) | 1012 le32_encode_bits(arg->max_reg_power, 1013 WMI_CHAN_REG_INFO1_MAX_REG_PWR); 1014 1015 chan->reg_info_2 = le32_encode_bits(arg->max_antenna_gain, 1016 WMI_CHAN_REG_INFO2_ANT_MAX) | 1017 le32_encode_bits(arg->max_power, WMI_CHAN_REG_INFO2_MAX_TX_PWR); 1018 } 1019 1020 int ath12k_wmi_vdev_start(struct ath12k *ar, struct wmi_vdev_start_req_arg *arg, 1021 bool restart) 1022 { 1023 struct ath12k_wmi_pdev *wmi = ar->wmi; 1024 struct wmi_vdev_start_request_cmd *cmd; 1025 struct sk_buff *skb; 1026 struct ath12k_wmi_channel_params *chan; 1027 struct wmi_tlv *tlv; 1028 void *ptr; 1029 int ret, len; 1030 1031 if (WARN_ON(arg->ssid_len > sizeof(cmd->ssid.ssid))) 1032 return -EINVAL; 1033 1034 len = sizeof(*cmd) + sizeof(*chan) + TLV_HDR_SIZE; 1035 1036 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 1037 if (!skb) 1038 return -ENOMEM; 1039 1040 cmd = (struct wmi_vdev_start_request_cmd *)skb->data; 1041 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_START_REQUEST_CMD, 1042 sizeof(*cmd)); 1043 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 1044 cmd->beacon_interval = cpu_to_le32(arg->bcn_intval); 1045 cmd->bcn_tx_rate = cpu_to_le32(arg->bcn_tx_rate); 1046 cmd->dtim_period = cpu_to_le32(arg->dtim_period); 1047 cmd->num_noa_descriptors = cpu_to_le32(arg->num_noa_descriptors); 1048 cmd->preferred_rx_streams = cpu_to_le32(arg->pref_rx_streams); 1049 cmd->preferred_tx_streams = cpu_to_le32(arg->pref_tx_streams); 1050 cmd->cac_duration_ms = cpu_to_le32(arg->cac_duration_ms); 1051 cmd->regdomain = cpu_to_le32(arg->regdomain); 1052 cmd->he_ops = cpu_to_le32(arg->he_ops); 1053 cmd->punct_bitmap = cpu_to_le32(arg->punct_bitmap); 1054 cmd->mbssid_flags = cpu_to_le32(arg->mbssid_flags); 1055 cmd->mbssid_tx_vdev_id = cpu_to_le32(arg->mbssid_tx_vdev_id); 1056 1057 if (!restart) { 1058 if (arg->ssid) { 1059 cmd->ssid.ssid_len = cpu_to_le32(arg->ssid_len); 1060 memcpy(cmd->ssid.ssid, arg->ssid, arg->ssid_len); 1061 } 1062 if (arg->hidden_ssid) 1063 cmd->flags |= cpu_to_le32(WMI_VDEV_START_HIDDEN_SSID); 1064 if (arg->pmf_enabled) 1065 cmd->flags |= cpu_to_le32(WMI_VDEV_START_PMF_ENABLED); 1066 } 1067 1068 cmd->flags |= cpu_to_le32(WMI_VDEV_START_LDPC_RX_ENABLED); 1069 1070 ptr = skb->data + sizeof(*cmd); 1071 chan = ptr; 1072 1073 ath12k_wmi_put_wmi_channel(chan, arg); 1074 1075 chan->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_CHANNEL, 1076 sizeof(*chan)); 1077 ptr += sizeof(*chan); 1078 1079 tlv = ptr; 1080 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 0); 1081 1082 /* Note: This is a nested TLV containing: 1083 * [wmi_tlv][ath12k_wmi_p2p_noa_descriptor][wmi_tlv].. 1084 */ 1085 1086 ptr += sizeof(*tlv); 1087 1088 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "vdev %s id 0x%x freq 0x%x mode 0x%x\n", 1089 restart ? "restart" : "start", arg->vdev_id, 1090 arg->freq, arg->mode); 1091 1092 if (restart) 1093 ret = ath12k_wmi_cmd_send(wmi, skb, 1094 WMI_VDEV_RESTART_REQUEST_CMDID); 1095 else 1096 ret = ath12k_wmi_cmd_send(wmi, skb, 1097 WMI_VDEV_START_REQUEST_CMDID); 1098 if (ret) { 1099 ath12k_warn(ar->ab, "failed to submit vdev_%s cmd\n", 1100 restart ? "restart" : "start"); 1101 dev_kfree_skb(skb); 1102 } 1103 1104 return ret; 1105 } 1106 1107 int ath12k_wmi_vdev_up(struct ath12k *ar, struct ath12k_wmi_vdev_up_params *params) 1108 { 1109 struct ath12k_wmi_pdev *wmi = ar->wmi; 1110 struct wmi_vdev_up_cmd *cmd; 1111 struct sk_buff *skb; 1112 int ret; 1113 1114 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1115 if (!skb) 1116 return -ENOMEM; 1117 1118 cmd = (struct wmi_vdev_up_cmd *)skb->data; 1119 1120 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_UP_CMD, 1121 sizeof(*cmd)); 1122 cmd->vdev_id = cpu_to_le32(params->vdev_id); 1123 cmd->vdev_assoc_id = cpu_to_le32(params->aid); 1124 1125 ether_addr_copy(cmd->vdev_bssid.addr, params->bssid); 1126 1127 if (params->tx_bssid) { 1128 ether_addr_copy(cmd->tx_vdev_bssid.addr, params->tx_bssid); 1129 cmd->nontx_profile_idx = cpu_to_le32(params->nontx_profile_idx); 1130 cmd->nontx_profile_cnt = cpu_to_le32(params->nontx_profile_cnt); 1131 } 1132 1133 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1134 "WMI mgmt vdev up id 0x%x assoc id %d bssid %pM\n", 1135 params->vdev_id, params->aid, params->bssid); 1136 1137 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_UP_CMDID); 1138 if (ret) { 1139 ath12k_warn(ar->ab, "failed to submit WMI_VDEV_UP cmd\n"); 1140 dev_kfree_skb(skb); 1141 } 1142 1143 return ret; 1144 } 1145 1146 int ath12k_wmi_send_peer_create_cmd(struct ath12k *ar, 1147 struct ath12k_wmi_peer_create_arg *arg) 1148 { 1149 struct ath12k_wmi_pdev *wmi = ar->wmi; 1150 struct wmi_peer_create_cmd *cmd; 1151 struct sk_buff *skb; 1152 int ret; 1153 1154 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1155 if (!skb) 1156 return -ENOMEM; 1157 1158 cmd = (struct wmi_peer_create_cmd *)skb->data; 1159 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_CREATE_CMD, 1160 sizeof(*cmd)); 1161 1162 ether_addr_copy(cmd->peer_macaddr.addr, arg->peer_addr); 1163 cmd->peer_type = cpu_to_le32(arg->peer_type); 1164 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 1165 1166 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1167 "WMI peer create vdev_id %d peer_addr %pM\n", 1168 arg->vdev_id, arg->peer_addr); 1169 1170 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_CREATE_CMDID); 1171 if (ret) { 1172 ath12k_warn(ar->ab, "failed to submit WMI_PEER_CREATE cmd\n"); 1173 dev_kfree_skb(skb); 1174 } 1175 1176 return ret; 1177 } 1178 1179 int ath12k_wmi_send_peer_delete_cmd(struct ath12k *ar, 1180 const u8 *peer_addr, u8 vdev_id) 1181 { 1182 struct ath12k_wmi_pdev *wmi = ar->wmi; 1183 struct wmi_peer_delete_cmd *cmd; 1184 struct sk_buff *skb; 1185 int ret; 1186 1187 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1188 if (!skb) 1189 return -ENOMEM; 1190 1191 cmd = (struct wmi_peer_delete_cmd *)skb->data; 1192 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_DELETE_CMD, 1193 sizeof(*cmd)); 1194 1195 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr); 1196 cmd->vdev_id = cpu_to_le32(vdev_id); 1197 1198 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1199 "WMI peer delete vdev_id %d peer_addr %pM\n", 1200 vdev_id, peer_addr); 1201 1202 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_DELETE_CMDID); 1203 if (ret) { 1204 ath12k_warn(ar->ab, "failed to send WMI_PEER_DELETE cmd\n"); 1205 dev_kfree_skb(skb); 1206 } 1207 1208 return ret; 1209 } 1210 1211 int ath12k_wmi_send_pdev_set_regdomain(struct ath12k *ar, 1212 struct ath12k_wmi_pdev_set_regdomain_arg *arg) 1213 { 1214 struct ath12k_wmi_pdev *wmi = ar->wmi; 1215 struct wmi_pdev_set_regdomain_cmd *cmd; 1216 struct sk_buff *skb; 1217 int ret; 1218 1219 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1220 if (!skb) 1221 return -ENOMEM; 1222 1223 cmd = (struct wmi_pdev_set_regdomain_cmd *)skb->data; 1224 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_REGDOMAIN_CMD, 1225 sizeof(*cmd)); 1226 1227 cmd->reg_domain = cpu_to_le32(arg->current_rd_in_use); 1228 cmd->reg_domain_2g = cpu_to_le32(arg->current_rd_2g); 1229 cmd->reg_domain_5g = cpu_to_le32(arg->current_rd_5g); 1230 cmd->conformance_test_limit_2g = cpu_to_le32(arg->ctl_2g); 1231 cmd->conformance_test_limit_5g = cpu_to_le32(arg->ctl_5g); 1232 cmd->dfs_domain = cpu_to_le32(arg->dfs_domain); 1233 cmd->pdev_id = cpu_to_le32(arg->pdev_id); 1234 1235 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1236 "WMI pdev regd rd %d rd2g %d rd5g %d domain %d pdev id %d\n", 1237 arg->current_rd_in_use, arg->current_rd_2g, 1238 arg->current_rd_5g, arg->dfs_domain, arg->pdev_id); 1239 1240 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_SET_REGDOMAIN_CMDID); 1241 if (ret) { 1242 ath12k_warn(ar->ab, 1243 "failed to send WMI_PDEV_SET_REGDOMAIN cmd\n"); 1244 dev_kfree_skb(skb); 1245 } 1246 1247 return ret; 1248 } 1249 1250 int ath12k_wmi_set_peer_param(struct ath12k *ar, const u8 *peer_addr, 1251 u32 vdev_id, u32 param_id, u32 param_val) 1252 { 1253 struct ath12k_wmi_pdev *wmi = ar->wmi; 1254 struct wmi_peer_set_param_cmd *cmd; 1255 struct sk_buff *skb; 1256 int ret; 1257 1258 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1259 if (!skb) 1260 return -ENOMEM; 1261 1262 cmd = (struct wmi_peer_set_param_cmd *)skb->data; 1263 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_SET_PARAM_CMD, 1264 sizeof(*cmd)); 1265 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr); 1266 cmd->vdev_id = cpu_to_le32(vdev_id); 1267 cmd->param_id = cpu_to_le32(param_id); 1268 cmd->param_value = cpu_to_le32(param_val); 1269 1270 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1271 "WMI vdev %d peer 0x%pM set param %d value %d\n", 1272 vdev_id, peer_addr, param_id, param_val); 1273 1274 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_SET_PARAM_CMDID); 1275 if (ret) { 1276 ath12k_warn(ar->ab, "failed to send WMI_PEER_SET_PARAM cmd\n"); 1277 dev_kfree_skb(skb); 1278 } 1279 1280 return ret; 1281 } 1282 1283 int ath12k_wmi_send_peer_flush_tids_cmd(struct ath12k *ar, 1284 u8 peer_addr[ETH_ALEN], 1285 u32 peer_tid_bitmap, 1286 u8 vdev_id) 1287 { 1288 struct ath12k_wmi_pdev *wmi = ar->wmi; 1289 struct wmi_peer_flush_tids_cmd *cmd; 1290 struct sk_buff *skb; 1291 int ret; 1292 1293 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1294 if (!skb) 1295 return -ENOMEM; 1296 1297 cmd = (struct wmi_peer_flush_tids_cmd *)skb->data; 1298 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_FLUSH_TIDS_CMD, 1299 sizeof(*cmd)); 1300 1301 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr); 1302 cmd->peer_tid_bitmap = cpu_to_le32(peer_tid_bitmap); 1303 cmd->vdev_id = cpu_to_le32(vdev_id); 1304 1305 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1306 "WMI peer flush vdev_id %d peer_addr %pM tids %08x\n", 1307 vdev_id, peer_addr, peer_tid_bitmap); 1308 1309 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_FLUSH_TIDS_CMDID); 1310 if (ret) { 1311 ath12k_warn(ar->ab, 1312 "failed to send WMI_PEER_FLUSH_TIDS cmd\n"); 1313 dev_kfree_skb(skb); 1314 } 1315 1316 return ret; 1317 } 1318 1319 int ath12k_wmi_peer_rx_reorder_queue_setup(struct ath12k *ar, 1320 int vdev_id, const u8 *addr, 1321 dma_addr_t paddr, u8 tid, 1322 u8 ba_window_size_valid, 1323 u32 ba_window_size) 1324 { 1325 struct wmi_peer_reorder_queue_setup_cmd *cmd; 1326 struct sk_buff *skb; 1327 int ret; 1328 1329 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd)); 1330 if (!skb) 1331 return -ENOMEM; 1332 1333 cmd = (struct wmi_peer_reorder_queue_setup_cmd *)skb->data; 1334 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_REORDER_QUEUE_SETUP_CMD, 1335 sizeof(*cmd)); 1336 1337 ether_addr_copy(cmd->peer_macaddr.addr, addr); 1338 cmd->vdev_id = cpu_to_le32(vdev_id); 1339 cmd->tid = cpu_to_le32(tid); 1340 cmd->queue_ptr_lo = cpu_to_le32(lower_32_bits(paddr)); 1341 cmd->queue_ptr_hi = cpu_to_le32(upper_32_bits(paddr)); 1342 cmd->queue_no = cpu_to_le32(tid); 1343 cmd->ba_window_size_valid = cpu_to_le32(ba_window_size_valid); 1344 cmd->ba_window_size = cpu_to_le32(ba_window_size); 1345 1346 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1347 "wmi rx reorder queue setup addr %pM vdev_id %d tid %d\n", 1348 addr, vdev_id, tid); 1349 1350 ret = ath12k_wmi_cmd_send(ar->wmi, skb, 1351 WMI_PEER_REORDER_QUEUE_SETUP_CMDID); 1352 if (ret) { 1353 ath12k_warn(ar->ab, 1354 "failed to send WMI_PEER_REORDER_QUEUE_SETUP\n"); 1355 dev_kfree_skb(skb); 1356 } 1357 1358 return ret; 1359 } 1360 1361 int 1362 ath12k_wmi_rx_reord_queue_remove(struct ath12k *ar, 1363 struct ath12k_wmi_rx_reorder_queue_remove_arg *arg) 1364 { 1365 struct ath12k_wmi_pdev *wmi = ar->wmi; 1366 struct wmi_peer_reorder_queue_remove_cmd *cmd; 1367 struct sk_buff *skb; 1368 int ret; 1369 1370 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1371 if (!skb) 1372 return -ENOMEM; 1373 1374 cmd = (struct wmi_peer_reorder_queue_remove_cmd *)skb->data; 1375 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_REORDER_QUEUE_REMOVE_CMD, 1376 sizeof(*cmd)); 1377 1378 ether_addr_copy(cmd->peer_macaddr.addr, arg->peer_macaddr); 1379 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 1380 cmd->tid_mask = cpu_to_le32(arg->peer_tid_bitmap); 1381 1382 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1383 "%s: peer_macaddr %pM vdev_id %d, tid_map %d", __func__, 1384 arg->peer_macaddr, arg->vdev_id, arg->peer_tid_bitmap); 1385 1386 ret = ath12k_wmi_cmd_send(wmi, skb, 1387 WMI_PEER_REORDER_QUEUE_REMOVE_CMDID); 1388 if (ret) { 1389 ath12k_warn(ar->ab, 1390 "failed to send WMI_PEER_REORDER_QUEUE_REMOVE_CMDID"); 1391 dev_kfree_skb(skb); 1392 } 1393 1394 return ret; 1395 } 1396 1397 int ath12k_wmi_pdev_set_param(struct ath12k *ar, u32 param_id, 1398 u32 param_value, u8 pdev_id) 1399 { 1400 struct ath12k_wmi_pdev *wmi = ar->wmi; 1401 struct wmi_pdev_set_param_cmd *cmd; 1402 struct sk_buff *skb; 1403 int ret; 1404 1405 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1406 if (!skb) 1407 return -ENOMEM; 1408 1409 cmd = (struct wmi_pdev_set_param_cmd *)skb->data; 1410 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_PARAM_CMD, 1411 sizeof(*cmd)); 1412 cmd->pdev_id = cpu_to_le32(pdev_id); 1413 cmd->param_id = cpu_to_le32(param_id); 1414 cmd->param_value = cpu_to_le32(param_value); 1415 1416 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1417 "WMI pdev set param %d pdev id %d value %d\n", 1418 param_id, pdev_id, param_value); 1419 1420 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_SET_PARAM_CMDID); 1421 if (ret) { 1422 ath12k_warn(ar->ab, "failed to send WMI_PDEV_SET_PARAM cmd\n"); 1423 dev_kfree_skb(skb); 1424 } 1425 1426 return ret; 1427 } 1428 1429 int ath12k_wmi_pdev_set_ps_mode(struct ath12k *ar, int vdev_id, u32 enable) 1430 { 1431 struct ath12k_wmi_pdev *wmi = ar->wmi; 1432 struct wmi_pdev_set_ps_mode_cmd *cmd; 1433 struct sk_buff *skb; 1434 int ret; 1435 1436 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1437 if (!skb) 1438 return -ENOMEM; 1439 1440 cmd = (struct wmi_pdev_set_ps_mode_cmd *)skb->data; 1441 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STA_POWERSAVE_MODE_CMD, 1442 sizeof(*cmd)); 1443 cmd->vdev_id = cpu_to_le32(vdev_id); 1444 cmd->sta_ps_mode = cpu_to_le32(enable); 1445 1446 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1447 "WMI vdev set psmode %d vdev id %d\n", 1448 enable, vdev_id); 1449 1450 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_STA_POWERSAVE_MODE_CMDID); 1451 if (ret) { 1452 ath12k_warn(ar->ab, "failed to send WMI_PDEV_SET_PARAM cmd\n"); 1453 dev_kfree_skb(skb); 1454 } 1455 1456 return ret; 1457 } 1458 1459 int ath12k_wmi_pdev_suspend(struct ath12k *ar, u32 suspend_opt, 1460 u32 pdev_id) 1461 { 1462 struct ath12k_wmi_pdev *wmi = ar->wmi; 1463 struct wmi_pdev_suspend_cmd *cmd; 1464 struct sk_buff *skb; 1465 int ret; 1466 1467 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1468 if (!skb) 1469 return -ENOMEM; 1470 1471 cmd = (struct wmi_pdev_suspend_cmd *)skb->data; 1472 1473 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SUSPEND_CMD, 1474 sizeof(*cmd)); 1475 1476 cmd->suspend_opt = cpu_to_le32(suspend_opt); 1477 cmd->pdev_id = cpu_to_le32(pdev_id); 1478 1479 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1480 "WMI pdev suspend pdev_id %d\n", pdev_id); 1481 1482 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_SUSPEND_CMDID); 1483 if (ret) { 1484 ath12k_warn(ar->ab, "failed to send WMI_PDEV_SUSPEND cmd\n"); 1485 dev_kfree_skb(skb); 1486 } 1487 1488 return ret; 1489 } 1490 1491 int ath12k_wmi_pdev_resume(struct ath12k *ar, u32 pdev_id) 1492 { 1493 struct ath12k_wmi_pdev *wmi = ar->wmi; 1494 struct wmi_pdev_resume_cmd *cmd; 1495 struct sk_buff *skb; 1496 int ret; 1497 1498 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1499 if (!skb) 1500 return -ENOMEM; 1501 1502 cmd = (struct wmi_pdev_resume_cmd *)skb->data; 1503 1504 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_RESUME_CMD, 1505 sizeof(*cmd)); 1506 cmd->pdev_id = cpu_to_le32(pdev_id); 1507 1508 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1509 "WMI pdev resume pdev id %d\n", pdev_id); 1510 1511 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_RESUME_CMDID); 1512 if (ret) { 1513 ath12k_warn(ar->ab, "failed to send WMI_PDEV_RESUME cmd\n"); 1514 dev_kfree_skb(skb); 1515 } 1516 1517 return ret; 1518 } 1519 1520 /* TODO FW Support for the cmd is not available yet. 1521 * Can be tested once the command and corresponding 1522 * event is implemented in FW 1523 */ 1524 int ath12k_wmi_pdev_bss_chan_info_request(struct ath12k *ar, 1525 enum wmi_bss_chan_info_req_type type) 1526 { 1527 struct ath12k_wmi_pdev *wmi = ar->wmi; 1528 struct wmi_pdev_bss_chan_info_req_cmd *cmd; 1529 struct sk_buff *skb; 1530 int ret; 1531 1532 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1533 if (!skb) 1534 return -ENOMEM; 1535 1536 cmd = (struct wmi_pdev_bss_chan_info_req_cmd *)skb->data; 1537 1538 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_BSS_CHAN_INFO_REQUEST, 1539 sizeof(*cmd)); 1540 cmd->req_type = cpu_to_le32(type); 1541 1542 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1543 "WMI bss chan info req type %d\n", type); 1544 1545 ret = ath12k_wmi_cmd_send(wmi, skb, 1546 WMI_PDEV_BSS_CHAN_INFO_REQUEST_CMDID); 1547 if (ret) { 1548 ath12k_warn(ar->ab, 1549 "failed to send WMI_PDEV_BSS_CHAN_INFO_REQUEST cmd\n"); 1550 dev_kfree_skb(skb); 1551 } 1552 1553 return ret; 1554 } 1555 1556 int ath12k_wmi_send_set_ap_ps_param_cmd(struct ath12k *ar, u8 *peer_addr, 1557 struct ath12k_wmi_ap_ps_arg *arg) 1558 { 1559 struct ath12k_wmi_pdev *wmi = ar->wmi; 1560 struct wmi_ap_ps_peer_cmd *cmd; 1561 struct sk_buff *skb; 1562 int ret; 1563 1564 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1565 if (!skb) 1566 return -ENOMEM; 1567 1568 cmd = (struct wmi_ap_ps_peer_cmd *)skb->data; 1569 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_AP_PS_PEER_CMD, 1570 sizeof(*cmd)); 1571 1572 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 1573 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr); 1574 cmd->param = cpu_to_le32(arg->param); 1575 cmd->value = cpu_to_le32(arg->value); 1576 1577 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1578 "WMI set ap ps vdev id %d peer %pM param %d value %d\n", 1579 arg->vdev_id, peer_addr, arg->param, arg->value); 1580 1581 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_AP_PS_PEER_PARAM_CMDID); 1582 if (ret) { 1583 ath12k_warn(ar->ab, 1584 "failed to send WMI_AP_PS_PEER_PARAM_CMDID\n"); 1585 dev_kfree_skb(skb); 1586 } 1587 1588 return ret; 1589 } 1590 1591 int ath12k_wmi_set_sta_ps_param(struct ath12k *ar, u32 vdev_id, 1592 u32 param, u32 param_value) 1593 { 1594 struct ath12k_wmi_pdev *wmi = ar->wmi; 1595 struct wmi_sta_powersave_param_cmd *cmd; 1596 struct sk_buff *skb; 1597 int ret; 1598 1599 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1600 if (!skb) 1601 return -ENOMEM; 1602 1603 cmd = (struct wmi_sta_powersave_param_cmd *)skb->data; 1604 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STA_POWERSAVE_PARAM_CMD, 1605 sizeof(*cmd)); 1606 1607 cmd->vdev_id = cpu_to_le32(vdev_id); 1608 cmd->param = cpu_to_le32(param); 1609 cmd->value = cpu_to_le32(param_value); 1610 1611 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1612 "WMI set sta ps vdev_id %d param %d value %d\n", 1613 vdev_id, param, param_value); 1614 1615 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_STA_POWERSAVE_PARAM_CMDID); 1616 if (ret) { 1617 ath12k_warn(ar->ab, "failed to send WMI_STA_POWERSAVE_PARAM_CMDID"); 1618 dev_kfree_skb(skb); 1619 } 1620 1621 return ret; 1622 } 1623 1624 int ath12k_wmi_force_fw_hang_cmd(struct ath12k *ar, u32 type, u32 delay_time_ms) 1625 { 1626 struct ath12k_wmi_pdev *wmi = ar->wmi; 1627 struct wmi_force_fw_hang_cmd *cmd; 1628 struct sk_buff *skb; 1629 int ret, len; 1630 1631 len = sizeof(*cmd); 1632 1633 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 1634 if (!skb) 1635 return -ENOMEM; 1636 1637 cmd = (struct wmi_force_fw_hang_cmd *)skb->data; 1638 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_FORCE_FW_HANG_CMD, 1639 len); 1640 1641 cmd->type = cpu_to_le32(type); 1642 cmd->delay_time_ms = cpu_to_le32(delay_time_ms); 1643 1644 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_FORCE_FW_HANG_CMDID); 1645 1646 if (ret) { 1647 ath12k_warn(ar->ab, "Failed to send WMI_FORCE_FW_HANG_CMDID"); 1648 dev_kfree_skb(skb); 1649 } 1650 return ret; 1651 } 1652 1653 int ath12k_wmi_vdev_set_param_cmd(struct ath12k *ar, u32 vdev_id, 1654 u32 param_id, u32 param_value) 1655 { 1656 struct ath12k_wmi_pdev *wmi = ar->wmi; 1657 struct wmi_vdev_set_param_cmd *cmd; 1658 struct sk_buff *skb; 1659 int ret; 1660 1661 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1662 if (!skb) 1663 return -ENOMEM; 1664 1665 cmd = (struct wmi_vdev_set_param_cmd *)skb->data; 1666 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SET_PARAM_CMD, 1667 sizeof(*cmd)); 1668 1669 cmd->vdev_id = cpu_to_le32(vdev_id); 1670 cmd->param_id = cpu_to_le32(param_id); 1671 cmd->param_value = cpu_to_le32(param_value); 1672 1673 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1674 "WMI vdev id 0x%x set param %d value %d\n", 1675 vdev_id, param_id, param_value); 1676 1677 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_SET_PARAM_CMDID); 1678 if (ret) { 1679 ath12k_warn(ar->ab, 1680 "failed to send WMI_VDEV_SET_PARAM_CMDID\n"); 1681 dev_kfree_skb(skb); 1682 } 1683 1684 return ret; 1685 } 1686 1687 int ath12k_wmi_send_pdev_temperature_cmd(struct ath12k *ar) 1688 { 1689 struct ath12k_wmi_pdev *wmi = ar->wmi; 1690 struct wmi_get_pdev_temperature_cmd *cmd; 1691 struct sk_buff *skb; 1692 int ret; 1693 1694 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1695 if (!skb) 1696 return -ENOMEM; 1697 1698 cmd = (struct wmi_get_pdev_temperature_cmd *)skb->data; 1699 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_GET_TEMPERATURE_CMD, 1700 sizeof(*cmd)); 1701 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id); 1702 1703 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1704 "WMI pdev get temperature for pdev_id %d\n", ar->pdev->pdev_id); 1705 1706 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_GET_TEMPERATURE_CMDID); 1707 if (ret) { 1708 ath12k_warn(ar->ab, "failed to send WMI_PDEV_GET_TEMPERATURE cmd\n"); 1709 dev_kfree_skb(skb); 1710 } 1711 1712 return ret; 1713 } 1714 1715 int ath12k_wmi_send_bcn_offload_control_cmd(struct ath12k *ar, 1716 u32 vdev_id, u32 bcn_ctrl_op) 1717 { 1718 struct ath12k_wmi_pdev *wmi = ar->wmi; 1719 struct wmi_bcn_offload_ctrl_cmd *cmd; 1720 struct sk_buff *skb; 1721 int ret; 1722 1723 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1724 if (!skb) 1725 return -ENOMEM; 1726 1727 cmd = (struct wmi_bcn_offload_ctrl_cmd *)skb->data; 1728 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_OFFLOAD_CTRL_CMD, 1729 sizeof(*cmd)); 1730 1731 cmd->vdev_id = cpu_to_le32(vdev_id); 1732 cmd->bcn_ctrl_op = cpu_to_le32(bcn_ctrl_op); 1733 1734 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1735 "WMI bcn ctrl offload vdev id %d ctrl_op %d\n", 1736 vdev_id, bcn_ctrl_op); 1737 1738 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_BCN_OFFLOAD_CTRL_CMDID); 1739 if (ret) { 1740 ath12k_warn(ar->ab, 1741 "failed to send WMI_BCN_OFFLOAD_CTRL_CMDID\n"); 1742 dev_kfree_skb(skb); 1743 } 1744 1745 return ret; 1746 } 1747 1748 int ath12k_wmi_p2p_go_bcn_ie(struct ath12k *ar, u32 vdev_id, 1749 const u8 *p2p_ie) 1750 { 1751 struct ath12k_wmi_pdev *wmi = ar->wmi; 1752 struct wmi_p2p_go_set_beacon_ie_cmd *cmd; 1753 size_t p2p_ie_len, aligned_len; 1754 struct wmi_tlv *tlv; 1755 struct sk_buff *skb; 1756 void *ptr; 1757 int ret, len; 1758 1759 p2p_ie_len = p2p_ie[1] + 2; 1760 aligned_len = roundup(p2p_ie_len, sizeof(u32)); 1761 1762 len = sizeof(*cmd) + TLV_HDR_SIZE + aligned_len; 1763 1764 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 1765 if (!skb) 1766 return -ENOMEM; 1767 1768 ptr = skb->data; 1769 cmd = ptr; 1770 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_P2P_GO_SET_BEACON_IE, 1771 sizeof(*cmd)); 1772 cmd->vdev_id = cpu_to_le32(vdev_id); 1773 cmd->ie_buf_len = cpu_to_le32(p2p_ie_len); 1774 1775 ptr += sizeof(*cmd); 1776 tlv = ptr; 1777 tlv->header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ARRAY_BYTE, 1778 aligned_len); 1779 memcpy(tlv->value, p2p_ie, p2p_ie_len); 1780 1781 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_P2P_GO_SET_BEACON_IE); 1782 if (ret) { 1783 ath12k_warn(ar->ab, "failed to send WMI_P2P_GO_SET_BEACON_IE\n"); 1784 dev_kfree_skb(skb); 1785 } 1786 1787 return ret; 1788 } 1789 1790 int ath12k_wmi_bcn_tmpl(struct ath12k *ar, u32 vdev_id, 1791 struct ieee80211_mutable_offsets *offs, 1792 struct sk_buff *bcn, 1793 struct ath12k_wmi_bcn_tmpl_ema_arg *ema_args) 1794 { 1795 struct ath12k_wmi_pdev *wmi = ar->wmi; 1796 struct wmi_bcn_tmpl_cmd *cmd; 1797 struct ath12k_wmi_bcn_prb_info_params *bcn_prb_info; 1798 struct wmi_tlv *tlv; 1799 struct sk_buff *skb; 1800 u32 ema_params = 0; 1801 void *ptr; 1802 int ret, len; 1803 size_t aligned_len = roundup(bcn->len, 4); 1804 1805 len = sizeof(*cmd) + sizeof(*bcn_prb_info) + TLV_HDR_SIZE + aligned_len; 1806 1807 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 1808 if (!skb) 1809 return -ENOMEM; 1810 1811 cmd = (struct wmi_bcn_tmpl_cmd *)skb->data; 1812 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_TMPL_CMD, 1813 sizeof(*cmd)); 1814 cmd->vdev_id = cpu_to_le32(vdev_id); 1815 cmd->tim_ie_offset = cpu_to_le32(offs->tim_offset); 1816 cmd->csa_switch_count_offset = cpu_to_le32(offs->cntdwn_counter_offs[0]); 1817 cmd->ext_csa_switch_count_offset = cpu_to_le32(offs->cntdwn_counter_offs[1]); 1818 cmd->buf_len = cpu_to_le32(bcn->len); 1819 cmd->mbssid_ie_offset = cpu_to_le32(offs->mbssid_off); 1820 if (ema_args) { 1821 u32p_replace_bits(&ema_params, ema_args->bcn_cnt, WMI_EMA_BEACON_CNT); 1822 u32p_replace_bits(&ema_params, ema_args->bcn_index, WMI_EMA_BEACON_IDX); 1823 if (ema_args->bcn_index == 0) 1824 u32p_replace_bits(&ema_params, 1, WMI_EMA_BEACON_FIRST); 1825 if (ema_args->bcn_index + 1 == ema_args->bcn_cnt) 1826 u32p_replace_bits(&ema_params, 1, WMI_EMA_BEACON_LAST); 1827 cmd->ema_params = cpu_to_le32(ema_params); 1828 } 1829 1830 ptr = skb->data + sizeof(*cmd); 1831 1832 bcn_prb_info = ptr; 1833 len = sizeof(*bcn_prb_info); 1834 bcn_prb_info->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_PRB_INFO, 1835 len); 1836 bcn_prb_info->caps = 0; 1837 bcn_prb_info->erp = 0; 1838 1839 ptr += sizeof(*bcn_prb_info); 1840 1841 tlv = ptr; 1842 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, aligned_len); 1843 memcpy(tlv->value, bcn->data, bcn->len); 1844 1845 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_BCN_TMPL_CMDID); 1846 if (ret) { 1847 ath12k_warn(ar->ab, "failed to send WMI_BCN_TMPL_CMDID\n"); 1848 dev_kfree_skb(skb); 1849 } 1850 1851 return ret; 1852 } 1853 1854 int ath12k_wmi_vdev_install_key(struct ath12k *ar, 1855 struct wmi_vdev_install_key_arg *arg) 1856 { 1857 struct ath12k_wmi_pdev *wmi = ar->wmi; 1858 struct wmi_vdev_install_key_cmd *cmd; 1859 struct wmi_tlv *tlv; 1860 struct sk_buff *skb; 1861 int ret, len, key_len_aligned; 1862 1863 /* WMI_TAG_ARRAY_BYTE needs to be aligned with 4, the actual key 1864 * length is specified in cmd->key_len. 1865 */ 1866 key_len_aligned = roundup(arg->key_len, 4); 1867 1868 len = sizeof(*cmd) + TLV_HDR_SIZE + key_len_aligned; 1869 1870 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 1871 if (!skb) 1872 return -ENOMEM; 1873 1874 cmd = (struct wmi_vdev_install_key_cmd *)skb->data; 1875 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_INSTALL_KEY_CMD, 1876 sizeof(*cmd)); 1877 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 1878 ether_addr_copy(cmd->peer_macaddr.addr, arg->macaddr); 1879 cmd->key_idx = cpu_to_le32(arg->key_idx); 1880 cmd->key_flags = cpu_to_le32(arg->key_flags); 1881 cmd->key_cipher = cpu_to_le32(arg->key_cipher); 1882 cmd->key_len = cpu_to_le32(arg->key_len); 1883 cmd->key_txmic_len = cpu_to_le32(arg->key_txmic_len); 1884 cmd->key_rxmic_len = cpu_to_le32(arg->key_rxmic_len); 1885 1886 if (arg->key_rsc_counter) 1887 cmd->key_rsc_counter = cpu_to_le64(arg->key_rsc_counter); 1888 1889 tlv = (struct wmi_tlv *)(skb->data + sizeof(*cmd)); 1890 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, key_len_aligned); 1891 memcpy(tlv->value, arg->key_data, arg->key_len); 1892 1893 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1894 "WMI vdev install key idx %d cipher %d len %d\n", 1895 arg->key_idx, arg->key_cipher, arg->key_len); 1896 1897 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_INSTALL_KEY_CMDID); 1898 if (ret) { 1899 ath12k_warn(ar->ab, 1900 "failed to send WMI_VDEV_INSTALL_KEY cmd\n"); 1901 dev_kfree_skb(skb); 1902 } 1903 1904 return ret; 1905 } 1906 1907 static void ath12k_wmi_copy_peer_flags(struct wmi_peer_assoc_complete_cmd *cmd, 1908 struct ath12k_wmi_peer_assoc_arg *arg, 1909 bool hw_crypto_disabled) 1910 { 1911 cmd->peer_flags = 0; 1912 cmd->peer_flags_ext = 0; 1913 1914 if (arg->is_wme_set) { 1915 if (arg->qos_flag) 1916 cmd->peer_flags |= cpu_to_le32(WMI_PEER_QOS); 1917 if (arg->apsd_flag) 1918 cmd->peer_flags |= cpu_to_le32(WMI_PEER_APSD); 1919 if (arg->ht_flag) 1920 cmd->peer_flags |= cpu_to_le32(WMI_PEER_HT); 1921 if (arg->bw_40) 1922 cmd->peer_flags |= cpu_to_le32(WMI_PEER_40MHZ); 1923 if (arg->bw_80) 1924 cmd->peer_flags |= cpu_to_le32(WMI_PEER_80MHZ); 1925 if (arg->bw_160) 1926 cmd->peer_flags |= cpu_to_le32(WMI_PEER_160MHZ); 1927 if (arg->bw_320) 1928 cmd->peer_flags_ext |= cpu_to_le32(WMI_PEER_EXT_320MHZ); 1929 1930 /* Typically if STBC is enabled for VHT it should be enabled 1931 * for HT as well 1932 **/ 1933 if (arg->stbc_flag) 1934 cmd->peer_flags |= cpu_to_le32(WMI_PEER_STBC); 1935 1936 /* Typically if LDPC is enabled for VHT it should be enabled 1937 * for HT as well 1938 **/ 1939 if (arg->ldpc_flag) 1940 cmd->peer_flags |= cpu_to_le32(WMI_PEER_LDPC); 1941 1942 if (arg->static_mimops_flag) 1943 cmd->peer_flags |= cpu_to_le32(WMI_PEER_STATIC_MIMOPS); 1944 if (arg->dynamic_mimops_flag) 1945 cmd->peer_flags |= cpu_to_le32(WMI_PEER_DYN_MIMOPS); 1946 if (arg->spatial_mux_flag) 1947 cmd->peer_flags |= cpu_to_le32(WMI_PEER_SPATIAL_MUX); 1948 if (arg->vht_flag) 1949 cmd->peer_flags |= cpu_to_le32(WMI_PEER_VHT); 1950 if (arg->he_flag) 1951 cmd->peer_flags |= cpu_to_le32(WMI_PEER_HE); 1952 if (arg->twt_requester) 1953 cmd->peer_flags |= cpu_to_le32(WMI_PEER_TWT_REQ); 1954 if (arg->twt_responder) 1955 cmd->peer_flags |= cpu_to_le32(WMI_PEER_TWT_RESP); 1956 if (arg->eht_flag) 1957 cmd->peer_flags_ext |= cpu_to_le32(WMI_PEER_EXT_EHT); 1958 } 1959 1960 /* Suppress authorization for all AUTH modes that need 4-way handshake 1961 * (during re-association). 1962 * Authorization will be done for these modes on key installation. 1963 */ 1964 if (arg->auth_flag) 1965 cmd->peer_flags |= cpu_to_le32(WMI_PEER_AUTH); 1966 if (arg->need_ptk_4_way) { 1967 cmd->peer_flags |= cpu_to_le32(WMI_PEER_NEED_PTK_4_WAY); 1968 if (!hw_crypto_disabled) 1969 cmd->peer_flags &= cpu_to_le32(~WMI_PEER_AUTH); 1970 } 1971 if (arg->need_gtk_2_way) 1972 cmd->peer_flags |= cpu_to_le32(WMI_PEER_NEED_GTK_2_WAY); 1973 /* safe mode bypass the 4-way handshake */ 1974 if (arg->safe_mode_enabled) 1975 cmd->peer_flags &= cpu_to_le32(~(WMI_PEER_NEED_PTK_4_WAY | 1976 WMI_PEER_NEED_GTK_2_WAY)); 1977 1978 if (arg->is_pmf_enabled) 1979 cmd->peer_flags |= cpu_to_le32(WMI_PEER_PMF); 1980 1981 /* Disable AMSDU for station transmit, if user configures it */ 1982 /* Disable AMSDU for AP transmit to 11n Stations, if user configures 1983 * it 1984 * if (arg->amsdu_disable) Add after FW support 1985 **/ 1986 1987 /* Target asserts if node is marked HT and all MCS is set to 0. 1988 * Mark the node as non-HT if all the mcs rates are disabled through 1989 * iwpriv 1990 **/ 1991 if (arg->peer_ht_rates.num_rates == 0) 1992 cmd->peer_flags &= cpu_to_le32(~WMI_PEER_HT); 1993 } 1994 1995 int ath12k_wmi_send_peer_assoc_cmd(struct ath12k *ar, 1996 struct ath12k_wmi_peer_assoc_arg *arg) 1997 { 1998 struct ath12k_wmi_pdev *wmi = ar->wmi; 1999 struct wmi_peer_assoc_complete_cmd *cmd; 2000 struct ath12k_wmi_vht_rate_set_params *mcs; 2001 struct ath12k_wmi_he_rate_set_params *he_mcs; 2002 struct ath12k_wmi_eht_rate_set_params *eht_mcs; 2003 struct sk_buff *skb; 2004 struct wmi_tlv *tlv; 2005 void *ptr; 2006 u32 peer_legacy_rates_align; 2007 u32 peer_ht_rates_align; 2008 int i, ret, len; 2009 2010 peer_legacy_rates_align = roundup(arg->peer_legacy_rates.num_rates, 2011 sizeof(u32)); 2012 peer_ht_rates_align = roundup(arg->peer_ht_rates.num_rates, 2013 sizeof(u32)); 2014 2015 len = sizeof(*cmd) + 2016 TLV_HDR_SIZE + (peer_legacy_rates_align * sizeof(u8)) + 2017 TLV_HDR_SIZE + (peer_ht_rates_align * sizeof(u8)) + 2018 sizeof(*mcs) + TLV_HDR_SIZE + 2019 (sizeof(*he_mcs) * arg->peer_he_mcs_count) + 2020 TLV_HDR_SIZE + (sizeof(*eht_mcs) * arg->peer_eht_mcs_count) + 2021 TLV_HDR_SIZE + TLV_HDR_SIZE; 2022 2023 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 2024 if (!skb) 2025 return -ENOMEM; 2026 2027 ptr = skb->data; 2028 2029 cmd = ptr; 2030 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_ASSOC_COMPLETE_CMD, 2031 sizeof(*cmd)); 2032 2033 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 2034 2035 cmd->peer_new_assoc = cpu_to_le32(arg->peer_new_assoc); 2036 cmd->peer_associd = cpu_to_le32(arg->peer_associd); 2037 cmd->punct_bitmap = cpu_to_le32(arg->punct_bitmap); 2038 2039 ath12k_wmi_copy_peer_flags(cmd, arg, 2040 test_bit(ATH12K_FLAG_HW_CRYPTO_DISABLED, 2041 &ar->ab->dev_flags)); 2042 2043 ether_addr_copy(cmd->peer_macaddr.addr, arg->peer_mac); 2044 2045 cmd->peer_rate_caps = cpu_to_le32(arg->peer_rate_caps); 2046 cmd->peer_caps = cpu_to_le32(arg->peer_caps); 2047 cmd->peer_listen_intval = cpu_to_le32(arg->peer_listen_intval); 2048 cmd->peer_ht_caps = cpu_to_le32(arg->peer_ht_caps); 2049 cmd->peer_max_mpdu = cpu_to_le32(arg->peer_max_mpdu); 2050 cmd->peer_mpdu_density = cpu_to_le32(arg->peer_mpdu_density); 2051 cmd->peer_vht_caps = cpu_to_le32(arg->peer_vht_caps); 2052 cmd->peer_phymode = cpu_to_le32(arg->peer_phymode); 2053 2054 /* Update 11ax capabilities */ 2055 cmd->peer_he_cap_info = cpu_to_le32(arg->peer_he_cap_macinfo[0]); 2056 cmd->peer_he_cap_info_ext = cpu_to_le32(arg->peer_he_cap_macinfo[1]); 2057 cmd->peer_he_cap_info_internal = cpu_to_le32(arg->peer_he_cap_macinfo_internal); 2058 cmd->peer_he_caps_6ghz = cpu_to_le32(arg->peer_he_caps_6ghz); 2059 cmd->peer_he_ops = cpu_to_le32(arg->peer_he_ops); 2060 for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++) 2061 cmd->peer_he_cap_phy[i] = 2062 cpu_to_le32(arg->peer_he_cap_phyinfo[i]); 2063 cmd->peer_ppet.numss_m1 = cpu_to_le32(arg->peer_ppet.numss_m1); 2064 cmd->peer_ppet.ru_info = cpu_to_le32(arg->peer_ppet.ru_bit_mask); 2065 for (i = 0; i < WMI_MAX_NUM_SS; i++) 2066 cmd->peer_ppet.ppet16_ppet8_ru3_ru0[i] = 2067 cpu_to_le32(arg->peer_ppet.ppet16_ppet8_ru3_ru0[i]); 2068 2069 /* Update 11be capabilities */ 2070 memcpy_and_pad(cmd->peer_eht_cap_mac, sizeof(cmd->peer_eht_cap_mac), 2071 arg->peer_eht_cap_mac, sizeof(arg->peer_eht_cap_mac), 2072 0); 2073 memcpy_and_pad(cmd->peer_eht_cap_phy, sizeof(cmd->peer_eht_cap_phy), 2074 arg->peer_eht_cap_phy, sizeof(arg->peer_eht_cap_phy), 2075 0); 2076 memcpy_and_pad(&cmd->peer_eht_ppet, sizeof(cmd->peer_eht_ppet), 2077 &arg->peer_eht_ppet, sizeof(arg->peer_eht_ppet), 0); 2078 2079 /* Update peer legacy rate information */ 2080 ptr += sizeof(*cmd); 2081 2082 tlv = ptr; 2083 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, peer_legacy_rates_align); 2084 2085 ptr += TLV_HDR_SIZE; 2086 2087 cmd->num_peer_legacy_rates = cpu_to_le32(arg->peer_legacy_rates.num_rates); 2088 memcpy(ptr, arg->peer_legacy_rates.rates, 2089 arg->peer_legacy_rates.num_rates); 2090 2091 /* Update peer HT rate information */ 2092 ptr += peer_legacy_rates_align; 2093 2094 tlv = ptr; 2095 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, peer_ht_rates_align); 2096 ptr += TLV_HDR_SIZE; 2097 cmd->num_peer_ht_rates = cpu_to_le32(arg->peer_ht_rates.num_rates); 2098 memcpy(ptr, arg->peer_ht_rates.rates, 2099 arg->peer_ht_rates.num_rates); 2100 2101 /* VHT Rates */ 2102 ptr += peer_ht_rates_align; 2103 2104 mcs = ptr; 2105 2106 mcs->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VHT_RATE_SET, 2107 sizeof(*mcs)); 2108 2109 cmd->peer_nss = cpu_to_le32(arg->peer_nss); 2110 2111 /* Update bandwidth-NSS mapping */ 2112 cmd->peer_bw_rxnss_override = 0; 2113 cmd->peer_bw_rxnss_override |= cpu_to_le32(arg->peer_bw_rxnss_override); 2114 2115 if (arg->vht_capable) { 2116 mcs->rx_max_rate = cpu_to_le32(arg->rx_max_rate); 2117 mcs->rx_mcs_set = cpu_to_le32(arg->rx_mcs_set); 2118 mcs->tx_max_rate = cpu_to_le32(arg->tx_max_rate); 2119 mcs->tx_mcs_set = cpu_to_le32(arg->tx_mcs_set); 2120 } 2121 2122 /* HE Rates */ 2123 cmd->peer_he_mcs = cpu_to_le32(arg->peer_he_mcs_count); 2124 cmd->min_data_rate = cpu_to_le32(arg->min_data_rate); 2125 2126 ptr += sizeof(*mcs); 2127 2128 len = arg->peer_he_mcs_count * sizeof(*he_mcs); 2129 2130 tlv = ptr; 2131 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len); 2132 ptr += TLV_HDR_SIZE; 2133 2134 /* Loop through the HE rate set */ 2135 for (i = 0; i < arg->peer_he_mcs_count; i++) { 2136 he_mcs = ptr; 2137 he_mcs->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_HE_RATE_SET, 2138 sizeof(*he_mcs)); 2139 2140 he_mcs->rx_mcs_set = cpu_to_le32(arg->peer_he_rx_mcs_set[i]); 2141 he_mcs->tx_mcs_set = cpu_to_le32(arg->peer_he_tx_mcs_set[i]); 2142 ptr += sizeof(*he_mcs); 2143 } 2144 2145 /* MLO header tag with 0 length */ 2146 len = 0; 2147 tlv = ptr; 2148 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len); 2149 ptr += TLV_HDR_SIZE; 2150 2151 /* Loop through the EHT rate set */ 2152 len = arg->peer_eht_mcs_count * sizeof(*eht_mcs); 2153 tlv = ptr; 2154 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len); 2155 ptr += TLV_HDR_SIZE; 2156 2157 for (i = 0; i < arg->peer_eht_mcs_count; i++) { 2158 eht_mcs = ptr; 2159 eht_mcs->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_HE_RATE_SET, 2160 sizeof(*eht_mcs)); 2161 2162 eht_mcs->rx_mcs_set = cpu_to_le32(arg->peer_eht_rx_mcs_set[i]); 2163 eht_mcs->tx_mcs_set = cpu_to_le32(arg->peer_eht_tx_mcs_set[i]); 2164 ptr += sizeof(*eht_mcs); 2165 } 2166 2167 /* ML partner links tag with 0 length */ 2168 len = 0; 2169 tlv = ptr; 2170 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len); 2171 ptr += TLV_HDR_SIZE; 2172 2173 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2174 "wmi peer assoc vdev id %d assoc id %d peer mac %pM peer_flags %x rate_caps %x peer_caps %x listen_intval %d ht_caps %x max_mpdu %d nss %d phymode %d peer_mpdu_density %d vht_caps %x he cap_info %x he ops %x he cap_info_ext %x he phy %x %x %x peer_bw_rxnss_override %x peer_flags_ext %x eht mac_cap %x %x eht phy_cap %x %x %x\n", 2175 cmd->vdev_id, cmd->peer_associd, arg->peer_mac, 2176 cmd->peer_flags, cmd->peer_rate_caps, cmd->peer_caps, 2177 cmd->peer_listen_intval, cmd->peer_ht_caps, 2178 cmd->peer_max_mpdu, cmd->peer_nss, cmd->peer_phymode, 2179 cmd->peer_mpdu_density, 2180 cmd->peer_vht_caps, cmd->peer_he_cap_info, 2181 cmd->peer_he_ops, cmd->peer_he_cap_info_ext, 2182 cmd->peer_he_cap_phy[0], cmd->peer_he_cap_phy[1], 2183 cmd->peer_he_cap_phy[2], 2184 cmd->peer_bw_rxnss_override, cmd->peer_flags_ext, 2185 cmd->peer_eht_cap_mac[0], cmd->peer_eht_cap_mac[1], 2186 cmd->peer_eht_cap_phy[0], cmd->peer_eht_cap_phy[1], 2187 cmd->peer_eht_cap_phy[2]); 2188 2189 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_ASSOC_CMDID); 2190 if (ret) { 2191 ath12k_warn(ar->ab, 2192 "failed to send WMI_PEER_ASSOC_CMDID\n"); 2193 dev_kfree_skb(skb); 2194 } 2195 2196 return ret; 2197 } 2198 2199 void ath12k_wmi_start_scan_init(struct ath12k *ar, 2200 struct ath12k_wmi_scan_req_arg *arg) 2201 { 2202 /* setup commonly used values */ 2203 arg->scan_req_id = 1; 2204 arg->scan_priority = WMI_SCAN_PRIORITY_LOW; 2205 arg->dwell_time_active = 50; 2206 arg->dwell_time_active_2g = 0; 2207 arg->dwell_time_passive = 150; 2208 arg->dwell_time_active_6g = 40; 2209 arg->dwell_time_passive_6g = 30; 2210 arg->min_rest_time = 50; 2211 arg->max_rest_time = 500; 2212 arg->repeat_probe_time = 0; 2213 arg->probe_spacing_time = 0; 2214 arg->idle_time = 0; 2215 arg->max_scan_time = 20000; 2216 arg->probe_delay = 5; 2217 arg->notify_scan_events = WMI_SCAN_EVENT_STARTED | 2218 WMI_SCAN_EVENT_COMPLETED | 2219 WMI_SCAN_EVENT_BSS_CHANNEL | 2220 WMI_SCAN_EVENT_FOREIGN_CHAN | 2221 WMI_SCAN_EVENT_DEQUEUED; 2222 arg->scan_f_chan_stat_evnt = 1; 2223 arg->num_bssid = 1; 2224 2225 /* fill bssid_list[0] with 0xff, otherwise bssid and RA will be 2226 * ZEROs in probe request 2227 */ 2228 eth_broadcast_addr(arg->bssid_list[0].addr); 2229 } 2230 2231 static void ath12k_wmi_copy_scan_event_cntrl_flags(struct wmi_start_scan_cmd *cmd, 2232 struct ath12k_wmi_scan_req_arg *arg) 2233 { 2234 /* Scan events subscription */ 2235 if (arg->scan_ev_started) 2236 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_STARTED); 2237 if (arg->scan_ev_completed) 2238 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_COMPLETED); 2239 if (arg->scan_ev_bss_chan) 2240 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_BSS_CHANNEL); 2241 if (arg->scan_ev_foreign_chan) 2242 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_FOREIGN_CHAN); 2243 if (arg->scan_ev_dequeued) 2244 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_DEQUEUED); 2245 if (arg->scan_ev_preempted) 2246 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_PREEMPTED); 2247 if (arg->scan_ev_start_failed) 2248 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_START_FAILED); 2249 if (arg->scan_ev_restarted) 2250 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_RESTARTED); 2251 if (arg->scan_ev_foreign_chn_exit) 2252 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT); 2253 if (arg->scan_ev_suspended) 2254 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_SUSPENDED); 2255 if (arg->scan_ev_resumed) 2256 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_RESUMED); 2257 2258 /** Set scan control flags */ 2259 cmd->scan_ctrl_flags = 0; 2260 if (arg->scan_f_passive) 2261 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_PASSIVE); 2262 if (arg->scan_f_strict_passive_pch) 2263 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_STRICT_PASSIVE_ON_PCHN); 2264 if (arg->scan_f_promisc_mode) 2265 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FILTER_PROMISCUOS); 2266 if (arg->scan_f_capture_phy_err) 2267 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_CAPTURE_PHY_ERROR); 2268 if (arg->scan_f_half_rate) 2269 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_HALF_RATE_SUPPORT); 2270 if (arg->scan_f_quarter_rate) 2271 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_QUARTER_RATE_SUPPORT); 2272 if (arg->scan_f_cck_rates) 2273 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_CCK_RATES); 2274 if (arg->scan_f_ofdm_rates) 2275 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_OFDM_RATES); 2276 if (arg->scan_f_chan_stat_evnt) 2277 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_CHAN_STAT_EVENT); 2278 if (arg->scan_f_filter_prb_req) 2279 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FILTER_PROBE_REQ); 2280 if (arg->scan_f_bcast_probe) 2281 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_BCAST_PROBE_REQ); 2282 if (arg->scan_f_offchan_mgmt_tx) 2283 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_OFFCHAN_MGMT_TX); 2284 if (arg->scan_f_offchan_data_tx) 2285 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_OFFCHAN_DATA_TX); 2286 if (arg->scan_f_force_active_dfs_chn) 2287 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_FORCE_ACTIVE_ON_DFS); 2288 if (arg->scan_f_add_tpc_ie_in_probe) 2289 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_TPC_IE_IN_PROBE_REQ); 2290 if (arg->scan_f_add_ds_ie_in_probe) 2291 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_DS_IE_IN_PROBE_REQ); 2292 if (arg->scan_f_add_spoofed_mac_in_probe) 2293 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_SPOOF_MAC_IN_PROBE_REQ); 2294 if (arg->scan_f_add_rand_seq_in_probe) 2295 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_RANDOM_SEQ_NO_IN_PROBE_REQ); 2296 if (arg->scan_f_en_ie_whitelist_in_probe) 2297 cmd->scan_ctrl_flags |= 2298 cpu_to_le32(WMI_SCAN_ENABLE_IE_WHTELIST_IN_PROBE_REQ); 2299 2300 cmd->scan_ctrl_flags |= le32_encode_bits(arg->adaptive_dwell_time_mode, 2301 WMI_SCAN_DWELL_MODE_MASK); 2302 } 2303 2304 int ath12k_wmi_send_scan_start_cmd(struct ath12k *ar, 2305 struct ath12k_wmi_scan_req_arg *arg) 2306 { 2307 struct ath12k_wmi_pdev *wmi = ar->wmi; 2308 struct wmi_start_scan_cmd *cmd; 2309 struct ath12k_wmi_ssid_params *ssid = NULL; 2310 struct ath12k_wmi_mac_addr_params *bssid; 2311 struct sk_buff *skb; 2312 struct wmi_tlv *tlv; 2313 void *ptr; 2314 int i, ret, len; 2315 u32 *tmp_ptr, extraie_len_with_pad = 0; 2316 struct ath12k_wmi_hint_short_ssid_arg *s_ssid = NULL; 2317 struct ath12k_wmi_hint_bssid_arg *hint_bssid = NULL; 2318 2319 len = sizeof(*cmd); 2320 2321 len += TLV_HDR_SIZE; 2322 if (arg->num_chan) 2323 len += arg->num_chan * sizeof(u32); 2324 2325 len += TLV_HDR_SIZE; 2326 if (arg->num_ssids) 2327 len += arg->num_ssids * sizeof(*ssid); 2328 2329 len += TLV_HDR_SIZE; 2330 if (arg->num_bssid) 2331 len += sizeof(*bssid) * arg->num_bssid; 2332 2333 if (arg->num_hint_bssid) 2334 len += TLV_HDR_SIZE + 2335 arg->num_hint_bssid * sizeof(*hint_bssid); 2336 2337 if (arg->num_hint_s_ssid) 2338 len += TLV_HDR_SIZE + 2339 arg->num_hint_s_ssid * sizeof(*s_ssid); 2340 2341 len += TLV_HDR_SIZE; 2342 if (arg->extraie.len) 2343 extraie_len_with_pad = 2344 roundup(arg->extraie.len, sizeof(u32)); 2345 if (extraie_len_with_pad <= (wmi->wmi_ab->max_msg_len[ar->pdev_idx] - len)) { 2346 len += extraie_len_with_pad; 2347 } else { 2348 ath12k_warn(ar->ab, "discard large size %d bytes extraie for scan start\n", 2349 arg->extraie.len); 2350 extraie_len_with_pad = 0; 2351 } 2352 2353 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 2354 if (!skb) 2355 return -ENOMEM; 2356 2357 ptr = skb->data; 2358 2359 cmd = ptr; 2360 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_START_SCAN_CMD, 2361 sizeof(*cmd)); 2362 2363 cmd->scan_id = cpu_to_le32(arg->scan_id); 2364 cmd->scan_req_id = cpu_to_le32(arg->scan_req_id); 2365 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 2366 cmd->scan_priority = cpu_to_le32(arg->scan_priority); 2367 cmd->notify_scan_events = cpu_to_le32(arg->notify_scan_events); 2368 2369 ath12k_wmi_copy_scan_event_cntrl_flags(cmd, arg); 2370 2371 cmd->dwell_time_active = cpu_to_le32(arg->dwell_time_active); 2372 cmd->dwell_time_active_2g = cpu_to_le32(arg->dwell_time_active_2g); 2373 cmd->dwell_time_passive = cpu_to_le32(arg->dwell_time_passive); 2374 cmd->dwell_time_active_6g = cpu_to_le32(arg->dwell_time_active_6g); 2375 cmd->dwell_time_passive_6g = cpu_to_le32(arg->dwell_time_passive_6g); 2376 cmd->min_rest_time = cpu_to_le32(arg->min_rest_time); 2377 cmd->max_rest_time = cpu_to_le32(arg->max_rest_time); 2378 cmd->repeat_probe_time = cpu_to_le32(arg->repeat_probe_time); 2379 cmd->probe_spacing_time = cpu_to_le32(arg->probe_spacing_time); 2380 cmd->idle_time = cpu_to_le32(arg->idle_time); 2381 cmd->max_scan_time = cpu_to_le32(arg->max_scan_time); 2382 cmd->probe_delay = cpu_to_le32(arg->probe_delay); 2383 cmd->burst_duration = cpu_to_le32(arg->burst_duration); 2384 cmd->num_chan = cpu_to_le32(arg->num_chan); 2385 cmd->num_bssid = cpu_to_le32(arg->num_bssid); 2386 cmd->num_ssids = cpu_to_le32(arg->num_ssids); 2387 cmd->ie_len = cpu_to_le32(arg->extraie.len); 2388 cmd->n_probes = cpu_to_le32(arg->n_probes); 2389 2390 ptr += sizeof(*cmd); 2391 2392 len = arg->num_chan * sizeof(u32); 2393 2394 tlv = ptr; 2395 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, len); 2396 ptr += TLV_HDR_SIZE; 2397 tmp_ptr = (u32 *)ptr; 2398 2399 memcpy(tmp_ptr, arg->chan_list, arg->num_chan * 4); 2400 2401 ptr += len; 2402 2403 len = arg->num_ssids * sizeof(*ssid); 2404 tlv = ptr; 2405 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len); 2406 2407 ptr += TLV_HDR_SIZE; 2408 2409 if (arg->num_ssids) { 2410 ssid = ptr; 2411 for (i = 0; i < arg->num_ssids; ++i) { 2412 ssid->ssid_len = cpu_to_le32(arg->ssid[i].ssid_len); 2413 memcpy(ssid->ssid, arg->ssid[i].ssid, 2414 arg->ssid[i].ssid_len); 2415 ssid++; 2416 } 2417 } 2418 2419 ptr += (arg->num_ssids * sizeof(*ssid)); 2420 len = arg->num_bssid * sizeof(*bssid); 2421 tlv = ptr; 2422 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len); 2423 2424 ptr += TLV_HDR_SIZE; 2425 bssid = ptr; 2426 2427 if (arg->num_bssid) { 2428 for (i = 0; i < arg->num_bssid; ++i) { 2429 ether_addr_copy(bssid->addr, 2430 arg->bssid_list[i].addr); 2431 bssid++; 2432 } 2433 } 2434 2435 ptr += arg->num_bssid * sizeof(*bssid); 2436 2437 len = extraie_len_with_pad; 2438 tlv = ptr; 2439 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, len); 2440 ptr += TLV_HDR_SIZE; 2441 2442 if (extraie_len_with_pad) 2443 memcpy(ptr, arg->extraie.ptr, 2444 arg->extraie.len); 2445 2446 ptr += extraie_len_with_pad; 2447 2448 if (arg->num_hint_s_ssid) { 2449 len = arg->num_hint_s_ssid * sizeof(*s_ssid); 2450 tlv = ptr; 2451 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len); 2452 ptr += TLV_HDR_SIZE; 2453 s_ssid = ptr; 2454 for (i = 0; i < arg->num_hint_s_ssid; ++i) { 2455 s_ssid->freq_flags = arg->hint_s_ssid[i].freq_flags; 2456 s_ssid->short_ssid = arg->hint_s_ssid[i].short_ssid; 2457 s_ssid++; 2458 } 2459 ptr += len; 2460 } 2461 2462 if (arg->num_hint_bssid) { 2463 len = arg->num_hint_bssid * sizeof(struct ath12k_wmi_hint_bssid_arg); 2464 tlv = ptr; 2465 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len); 2466 ptr += TLV_HDR_SIZE; 2467 hint_bssid = ptr; 2468 for (i = 0; i < arg->num_hint_bssid; ++i) { 2469 hint_bssid->freq_flags = 2470 arg->hint_bssid[i].freq_flags; 2471 ether_addr_copy(&arg->hint_bssid[i].bssid.addr[0], 2472 &hint_bssid->bssid.addr[0]); 2473 hint_bssid++; 2474 } 2475 } 2476 2477 ret = ath12k_wmi_cmd_send(wmi, skb, 2478 WMI_START_SCAN_CMDID); 2479 if (ret) { 2480 ath12k_warn(ar->ab, "failed to send WMI_START_SCAN_CMDID\n"); 2481 dev_kfree_skb(skb); 2482 } 2483 2484 return ret; 2485 } 2486 2487 int ath12k_wmi_send_scan_stop_cmd(struct ath12k *ar, 2488 struct ath12k_wmi_scan_cancel_arg *arg) 2489 { 2490 struct ath12k_wmi_pdev *wmi = ar->wmi; 2491 struct wmi_stop_scan_cmd *cmd; 2492 struct sk_buff *skb; 2493 int ret; 2494 2495 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 2496 if (!skb) 2497 return -ENOMEM; 2498 2499 cmd = (struct wmi_stop_scan_cmd *)skb->data; 2500 2501 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STOP_SCAN_CMD, 2502 sizeof(*cmd)); 2503 2504 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 2505 cmd->requestor = cpu_to_le32(arg->requester); 2506 cmd->scan_id = cpu_to_le32(arg->scan_id); 2507 cmd->pdev_id = cpu_to_le32(arg->pdev_id); 2508 /* stop the scan with the corresponding scan_id */ 2509 if (arg->req_type == WLAN_SCAN_CANCEL_PDEV_ALL) { 2510 /* Cancelling all scans */ 2511 cmd->req_type = cpu_to_le32(WMI_SCAN_STOP_ALL); 2512 } else if (arg->req_type == WLAN_SCAN_CANCEL_VDEV_ALL) { 2513 /* Cancelling VAP scans */ 2514 cmd->req_type = cpu_to_le32(WMI_SCAN_STOP_VAP_ALL); 2515 } else if (arg->req_type == WLAN_SCAN_CANCEL_SINGLE) { 2516 /* Cancelling specific scan */ 2517 cmd->req_type = WMI_SCAN_STOP_ONE; 2518 } else { 2519 ath12k_warn(ar->ab, "invalid scan cancel req_type %d", 2520 arg->req_type); 2521 dev_kfree_skb(skb); 2522 return -EINVAL; 2523 } 2524 2525 ret = ath12k_wmi_cmd_send(wmi, skb, 2526 WMI_STOP_SCAN_CMDID); 2527 if (ret) { 2528 ath12k_warn(ar->ab, "failed to send WMI_STOP_SCAN_CMDID\n"); 2529 dev_kfree_skb(skb); 2530 } 2531 2532 return ret; 2533 } 2534 2535 int ath12k_wmi_send_scan_chan_list_cmd(struct ath12k *ar, 2536 struct ath12k_wmi_scan_chan_list_arg *arg) 2537 { 2538 struct ath12k_wmi_pdev *wmi = ar->wmi; 2539 struct wmi_scan_chan_list_cmd *cmd; 2540 struct sk_buff *skb; 2541 struct ath12k_wmi_channel_params *chan_info; 2542 struct ath12k_wmi_channel_arg *channel_arg; 2543 struct wmi_tlv *tlv; 2544 void *ptr; 2545 int i, ret, len; 2546 u16 num_send_chans, num_sends = 0, max_chan_limit = 0; 2547 __le32 *reg1, *reg2; 2548 2549 channel_arg = &arg->channel[0]; 2550 while (arg->nallchans) { 2551 len = sizeof(*cmd) + TLV_HDR_SIZE; 2552 max_chan_limit = (wmi->wmi_ab->max_msg_len[ar->pdev_idx] - len) / 2553 sizeof(*chan_info); 2554 2555 num_send_chans = min(arg->nallchans, max_chan_limit); 2556 2557 arg->nallchans -= num_send_chans; 2558 len += sizeof(*chan_info) * num_send_chans; 2559 2560 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 2561 if (!skb) 2562 return -ENOMEM; 2563 2564 cmd = (struct wmi_scan_chan_list_cmd *)skb->data; 2565 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_SCAN_CHAN_LIST_CMD, 2566 sizeof(*cmd)); 2567 cmd->pdev_id = cpu_to_le32(arg->pdev_id); 2568 cmd->num_scan_chans = cpu_to_le32(num_send_chans); 2569 if (num_sends) 2570 cmd->flags |= cpu_to_le32(WMI_APPEND_TO_EXISTING_CHAN_LIST_FLAG); 2571 2572 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2573 "WMI no.of chan = %d len = %d pdev_id = %d num_sends = %d\n", 2574 num_send_chans, len, cmd->pdev_id, num_sends); 2575 2576 ptr = skb->data + sizeof(*cmd); 2577 2578 len = sizeof(*chan_info) * num_send_chans; 2579 tlv = ptr; 2580 tlv->header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ARRAY_STRUCT, 2581 len); 2582 ptr += TLV_HDR_SIZE; 2583 2584 for (i = 0; i < num_send_chans; ++i) { 2585 chan_info = ptr; 2586 memset(chan_info, 0, sizeof(*chan_info)); 2587 len = sizeof(*chan_info); 2588 chan_info->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_CHANNEL, 2589 len); 2590 2591 reg1 = &chan_info->reg_info_1; 2592 reg2 = &chan_info->reg_info_2; 2593 chan_info->mhz = cpu_to_le32(channel_arg->mhz); 2594 chan_info->band_center_freq1 = cpu_to_le32(channel_arg->cfreq1); 2595 chan_info->band_center_freq2 = cpu_to_le32(channel_arg->cfreq2); 2596 2597 if (channel_arg->is_chan_passive) 2598 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_PASSIVE); 2599 if (channel_arg->allow_he) 2600 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HE); 2601 else if (channel_arg->allow_vht) 2602 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_VHT); 2603 else if (channel_arg->allow_ht) 2604 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HT); 2605 if (channel_arg->half_rate) 2606 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_HALF_RATE); 2607 if (channel_arg->quarter_rate) 2608 chan_info->info |= 2609 cpu_to_le32(WMI_CHAN_INFO_QUARTER_RATE); 2610 2611 if (channel_arg->psc_channel) 2612 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_PSC); 2613 2614 if (channel_arg->dfs_set) 2615 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_DFS); 2616 2617 chan_info->info |= le32_encode_bits(channel_arg->phy_mode, 2618 WMI_CHAN_INFO_MODE); 2619 *reg1 |= le32_encode_bits(channel_arg->minpower, 2620 WMI_CHAN_REG_INFO1_MIN_PWR); 2621 *reg1 |= le32_encode_bits(channel_arg->maxpower, 2622 WMI_CHAN_REG_INFO1_MAX_PWR); 2623 *reg1 |= le32_encode_bits(channel_arg->maxregpower, 2624 WMI_CHAN_REG_INFO1_MAX_REG_PWR); 2625 *reg1 |= le32_encode_bits(channel_arg->reg_class_id, 2626 WMI_CHAN_REG_INFO1_REG_CLS); 2627 *reg2 |= le32_encode_bits(channel_arg->antennamax, 2628 WMI_CHAN_REG_INFO2_ANT_MAX); 2629 2630 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2631 "WMI chan scan list chan[%d] = %u, chan_info->info %8x\n", 2632 i, chan_info->mhz, chan_info->info); 2633 2634 ptr += sizeof(*chan_info); 2635 2636 channel_arg++; 2637 } 2638 2639 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_SCAN_CHAN_LIST_CMDID); 2640 if (ret) { 2641 ath12k_warn(ar->ab, "failed to send WMI_SCAN_CHAN_LIST cmd\n"); 2642 dev_kfree_skb(skb); 2643 return ret; 2644 } 2645 2646 num_sends++; 2647 } 2648 2649 return 0; 2650 } 2651 2652 int ath12k_wmi_send_wmm_update_cmd(struct ath12k *ar, u32 vdev_id, 2653 struct wmi_wmm_params_all_arg *param) 2654 { 2655 struct ath12k_wmi_pdev *wmi = ar->wmi; 2656 struct wmi_vdev_set_wmm_params_cmd *cmd; 2657 struct wmi_wmm_params *wmm_param; 2658 struct wmi_wmm_params_arg *wmi_wmm_arg; 2659 struct sk_buff *skb; 2660 int ret, ac; 2661 2662 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 2663 if (!skb) 2664 return -ENOMEM; 2665 2666 cmd = (struct wmi_vdev_set_wmm_params_cmd *)skb->data; 2667 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SET_WMM_PARAMS_CMD, 2668 sizeof(*cmd)); 2669 2670 cmd->vdev_id = cpu_to_le32(vdev_id); 2671 cmd->wmm_param_type = 0; 2672 2673 for (ac = 0; ac < WME_NUM_AC; ac++) { 2674 switch (ac) { 2675 case WME_AC_BE: 2676 wmi_wmm_arg = ¶m->ac_be; 2677 break; 2678 case WME_AC_BK: 2679 wmi_wmm_arg = ¶m->ac_bk; 2680 break; 2681 case WME_AC_VI: 2682 wmi_wmm_arg = ¶m->ac_vi; 2683 break; 2684 case WME_AC_VO: 2685 wmi_wmm_arg = ¶m->ac_vo; 2686 break; 2687 } 2688 2689 wmm_param = (struct wmi_wmm_params *)&cmd->wmm_params[ac]; 2690 wmm_param->tlv_header = 2691 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SET_WMM_PARAMS_CMD, 2692 sizeof(*wmm_param)); 2693 2694 wmm_param->aifs = cpu_to_le32(wmi_wmm_arg->aifs); 2695 wmm_param->cwmin = cpu_to_le32(wmi_wmm_arg->cwmin); 2696 wmm_param->cwmax = cpu_to_le32(wmi_wmm_arg->cwmax); 2697 wmm_param->txoplimit = cpu_to_le32(wmi_wmm_arg->txop); 2698 wmm_param->acm = cpu_to_le32(wmi_wmm_arg->acm); 2699 wmm_param->no_ack = cpu_to_le32(wmi_wmm_arg->no_ack); 2700 2701 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2702 "wmi wmm set ac %d aifs %d cwmin %d cwmax %d txop %d acm %d no_ack %d\n", 2703 ac, wmm_param->aifs, wmm_param->cwmin, 2704 wmm_param->cwmax, wmm_param->txoplimit, 2705 wmm_param->acm, wmm_param->no_ack); 2706 } 2707 ret = ath12k_wmi_cmd_send(wmi, skb, 2708 WMI_VDEV_SET_WMM_PARAMS_CMDID); 2709 if (ret) { 2710 ath12k_warn(ar->ab, 2711 "failed to send WMI_VDEV_SET_WMM_PARAMS_CMDID"); 2712 dev_kfree_skb(skb); 2713 } 2714 2715 return ret; 2716 } 2717 2718 int ath12k_wmi_send_dfs_phyerr_offload_enable_cmd(struct ath12k *ar, 2719 u32 pdev_id) 2720 { 2721 struct ath12k_wmi_pdev *wmi = ar->wmi; 2722 struct wmi_dfs_phyerr_offload_cmd *cmd; 2723 struct sk_buff *skb; 2724 int ret; 2725 2726 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 2727 if (!skb) 2728 return -ENOMEM; 2729 2730 cmd = (struct wmi_dfs_phyerr_offload_cmd *)skb->data; 2731 cmd->tlv_header = 2732 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMD, 2733 sizeof(*cmd)); 2734 2735 cmd->pdev_id = cpu_to_le32(pdev_id); 2736 2737 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2738 "WMI dfs phy err offload enable pdev id %d\n", pdev_id); 2739 2740 ret = ath12k_wmi_cmd_send(wmi, skb, 2741 WMI_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMDID); 2742 if (ret) { 2743 ath12k_warn(ar->ab, 2744 "failed to send WMI_PDEV_DFS_PHYERR_OFFLOAD_ENABLE cmd\n"); 2745 dev_kfree_skb(skb); 2746 } 2747 2748 return ret; 2749 } 2750 2751 int ath12k_wmi_set_bios_cmd(struct ath12k_base *ab, u32 param_id, 2752 const u8 *buf, size_t buf_len) 2753 { 2754 struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab; 2755 struct wmi_pdev_set_bios_interface_cmd *cmd; 2756 struct wmi_tlv *tlv; 2757 struct sk_buff *skb; 2758 u8 *ptr; 2759 u32 len, len_aligned; 2760 int ret; 2761 2762 len_aligned = roundup(buf_len, sizeof(u32)); 2763 len = sizeof(*cmd) + TLV_HDR_SIZE + len_aligned; 2764 2765 skb = ath12k_wmi_alloc_skb(wmi_ab, len); 2766 if (!skb) 2767 return -ENOMEM; 2768 2769 cmd = (struct wmi_pdev_set_bios_interface_cmd *)skb->data; 2770 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_BIOS_INTERFACE_CMD, 2771 sizeof(*cmd)); 2772 cmd->pdev_id = cpu_to_le32(WMI_PDEV_ID_SOC); 2773 cmd->param_type_id = cpu_to_le32(param_id); 2774 cmd->length = cpu_to_le32(buf_len); 2775 2776 ptr = skb->data + sizeof(*cmd); 2777 tlv = (struct wmi_tlv *)ptr; 2778 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, len_aligned); 2779 ptr += TLV_HDR_SIZE; 2780 memcpy(ptr, buf, buf_len); 2781 2782 ret = ath12k_wmi_cmd_send(&wmi_ab->wmi[0], 2783 skb, 2784 WMI_PDEV_SET_BIOS_INTERFACE_CMDID); 2785 if (ret) { 2786 ath12k_warn(ab, 2787 "failed to send WMI_PDEV_SET_BIOS_INTERFACE_CMDID parameter id %d: %d\n", 2788 param_id, ret); 2789 dev_kfree_skb(skb); 2790 } 2791 2792 return 0; 2793 } 2794 2795 int ath12k_wmi_set_bios_sar_cmd(struct ath12k_base *ab, const u8 *psar_table) 2796 { 2797 struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab; 2798 struct wmi_pdev_set_bios_sar_table_cmd *cmd; 2799 struct wmi_tlv *tlv; 2800 struct sk_buff *skb; 2801 int ret; 2802 u8 *buf_ptr; 2803 u32 len, sar_table_len_aligned, sar_dbs_backoff_len_aligned; 2804 const u8 *psar_value = psar_table + ATH12K_ACPI_POWER_LIMIT_DATA_OFFSET; 2805 const u8 *pdbs_value = psar_table + ATH12K_ACPI_DBS_BACKOFF_DATA_OFFSET; 2806 2807 sar_table_len_aligned = roundup(ATH12K_ACPI_BIOS_SAR_TABLE_LEN, sizeof(u32)); 2808 sar_dbs_backoff_len_aligned = roundup(ATH12K_ACPI_BIOS_SAR_DBS_BACKOFF_LEN, 2809 sizeof(u32)); 2810 len = sizeof(*cmd) + TLV_HDR_SIZE + sar_table_len_aligned + 2811 TLV_HDR_SIZE + sar_dbs_backoff_len_aligned; 2812 2813 skb = ath12k_wmi_alloc_skb(wmi_ab, len); 2814 if (!skb) 2815 return -ENOMEM; 2816 2817 cmd = (struct wmi_pdev_set_bios_sar_table_cmd *)skb->data; 2818 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_BIOS_SAR_TABLE_CMD, 2819 sizeof(*cmd)); 2820 cmd->pdev_id = cpu_to_le32(WMI_PDEV_ID_SOC); 2821 cmd->sar_len = cpu_to_le32(ATH12K_ACPI_BIOS_SAR_TABLE_LEN); 2822 cmd->dbs_backoff_len = cpu_to_le32(ATH12K_ACPI_BIOS_SAR_DBS_BACKOFF_LEN); 2823 2824 buf_ptr = skb->data + sizeof(*cmd); 2825 tlv = (struct wmi_tlv *)buf_ptr; 2826 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, 2827 sar_table_len_aligned); 2828 buf_ptr += TLV_HDR_SIZE; 2829 memcpy(buf_ptr, psar_value, ATH12K_ACPI_BIOS_SAR_TABLE_LEN); 2830 2831 buf_ptr += sar_table_len_aligned; 2832 tlv = (struct wmi_tlv *)buf_ptr; 2833 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, 2834 sar_dbs_backoff_len_aligned); 2835 buf_ptr += TLV_HDR_SIZE; 2836 memcpy(buf_ptr, pdbs_value, ATH12K_ACPI_BIOS_SAR_DBS_BACKOFF_LEN); 2837 2838 ret = ath12k_wmi_cmd_send(&wmi_ab->wmi[0], 2839 skb, 2840 WMI_PDEV_SET_BIOS_SAR_TABLE_CMDID); 2841 if (ret) { 2842 ath12k_warn(ab, 2843 "failed to send WMI_PDEV_SET_BIOS_INTERFACE_CMDID %d\n", 2844 ret); 2845 dev_kfree_skb(skb); 2846 } 2847 2848 return ret; 2849 } 2850 2851 int ath12k_wmi_set_bios_geo_cmd(struct ath12k_base *ab, const u8 *pgeo_table) 2852 { 2853 struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab; 2854 struct wmi_pdev_set_bios_geo_table_cmd *cmd; 2855 struct wmi_tlv *tlv; 2856 struct sk_buff *skb; 2857 int ret; 2858 u8 *buf_ptr; 2859 u32 len, sar_geo_len_aligned; 2860 const u8 *pgeo_value = pgeo_table + ATH12K_ACPI_GEO_OFFSET_DATA_OFFSET; 2861 2862 sar_geo_len_aligned = roundup(ATH12K_ACPI_BIOS_SAR_GEO_OFFSET_LEN, sizeof(u32)); 2863 len = sizeof(*cmd) + TLV_HDR_SIZE + sar_geo_len_aligned; 2864 2865 skb = ath12k_wmi_alloc_skb(wmi_ab, len); 2866 if (!skb) 2867 return -ENOMEM; 2868 2869 cmd = (struct wmi_pdev_set_bios_geo_table_cmd *)skb->data; 2870 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_BIOS_GEO_TABLE_CMD, 2871 sizeof(*cmd)); 2872 cmd->pdev_id = cpu_to_le32(WMI_PDEV_ID_SOC); 2873 cmd->geo_len = cpu_to_le32(ATH12K_ACPI_BIOS_SAR_GEO_OFFSET_LEN); 2874 2875 buf_ptr = skb->data + sizeof(*cmd); 2876 tlv = (struct wmi_tlv *)buf_ptr; 2877 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, sar_geo_len_aligned); 2878 buf_ptr += TLV_HDR_SIZE; 2879 memcpy(buf_ptr, pgeo_value, ATH12K_ACPI_BIOS_SAR_GEO_OFFSET_LEN); 2880 2881 ret = ath12k_wmi_cmd_send(&wmi_ab->wmi[0], 2882 skb, 2883 WMI_PDEV_SET_BIOS_GEO_TABLE_CMDID); 2884 if (ret) { 2885 ath12k_warn(ab, 2886 "failed to send WMI_PDEV_SET_BIOS_GEO_TABLE_CMDID %d\n", 2887 ret); 2888 dev_kfree_skb(skb); 2889 } 2890 2891 return ret; 2892 } 2893 2894 int ath12k_wmi_delba_send(struct ath12k *ar, u32 vdev_id, const u8 *mac, 2895 u32 tid, u32 initiator, u32 reason) 2896 { 2897 struct ath12k_wmi_pdev *wmi = ar->wmi; 2898 struct wmi_delba_send_cmd *cmd; 2899 struct sk_buff *skb; 2900 int ret; 2901 2902 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 2903 if (!skb) 2904 return -ENOMEM; 2905 2906 cmd = (struct wmi_delba_send_cmd *)skb->data; 2907 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_DELBA_SEND_CMD, 2908 sizeof(*cmd)); 2909 cmd->vdev_id = cpu_to_le32(vdev_id); 2910 ether_addr_copy(cmd->peer_macaddr.addr, mac); 2911 cmd->tid = cpu_to_le32(tid); 2912 cmd->initiator = cpu_to_le32(initiator); 2913 cmd->reasoncode = cpu_to_le32(reason); 2914 2915 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2916 "wmi delba send vdev_id 0x%X mac_addr %pM tid %u initiator %u reason %u\n", 2917 vdev_id, mac, tid, initiator, reason); 2918 2919 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_DELBA_SEND_CMDID); 2920 2921 if (ret) { 2922 ath12k_warn(ar->ab, 2923 "failed to send WMI_DELBA_SEND_CMDID cmd\n"); 2924 dev_kfree_skb(skb); 2925 } 2926 2927 return ret; 2928 } 2929 2930 int ath12k_wmi_addba_set_resp(struct ath12k *ar, u32 vdev_id, const u8 *mac, 2931 u32 tid, u32 status) 2932 { 2933 struct ath12k_wmi_pdev *wmi = ar->wmi; 2934 struct wmi_addba_setresponse_cmd *cmd; 2935 struct sk_buff *skb; 2936 int ret; 2937 2938 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 2939 if (!skb) 2940 return -ENOMEM; 2941 2942 cmd = (struct wmi_addba_setresponse_cmd *)skb->data; 2943 cmd->tlv_header = 2944 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ADDBA_SETRESPONSE_CMD, 2945 sizeof(*cmd)); 2946 cmd->vdev_id = cpu_to_le32(vdev_id); 2947 ether_addr_copy(cmd->peer_macaddr.addr, mac); 2948 cmd->tid = cpu_to_le32(tid); 2949 cmd->statuscode = cpu_to_le32(status); 2950 2951 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2952 "wmi addba set resp vdev_id 0x%X mac_addr %pM tid %u status %u\n", 2953 vdev_id, mac, tid, status); 2954 2955 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_ADDBA_SET_RESP_CMDID); 2956 2957 if (ret) { 2958 ath12k_warn(ar->ab, 2959 "failed to send WMI_ADDBA_SET_RESP_CMDID cmd\n"); 2960 dev_kfree_skb(skb); 2961 } 2962 2963 return ret; 2964 } 2965 2966 int ath12k_wmi_addba_send(struct ath12k *ar, u32 vdev_id, const u8 *mac, 2967 u32 tid, u32 buf_size) 2968 { 2969 struct ath12k_wmi_pdev *wmi = ar->wmi; 2970 struct wmi_addba_send_cmd *cmd; 2971 struct sk_buff *skb; 2972 int ret; 2973 2974 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 2975 if (!skb) 2976 return -ENOMEM; 2977 2978 cmd = (struct wmi_addba_send_cmd *)skb->data; 2979 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ADDBA_SEND_CMD, 2980 sizeof(*cmd)); 2981 cmd->vdev_id = cpu_to_le32(vdev_id); 2982 ether_addr_copy(cmd->peer_macaddr.addr, mac); 2983 cmd->tid = cpu_to_le32(tid); 2984 cmd->buffersize = cpu_to_le32(buf_size); 2985 2986 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2987 "wmi addba send vdev_id 0x%X mac_addr %pM tid %u bufsize %u\n", 2988 vdev_id, mac, tid, buf_size); 2989 2990 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_ADDBA_SEND_CMDID); 2991 2992 if (ret) { 2993 ath12k_warn(ar->ab, 2994 "failed to send WMI_ADDBA_SEND_CMDID cmd\n"); 2995 dev_kfree_skb(skb); 2996 } 2997 2998 return ret; 2999 } 3000 3001 int ath12k_wmi_addba_clear_resp(struct ath12k *ar, u32 vdev_id, const u8 *mac) 3002 { 3003 struct ath12k_wmi_pdev *wmi = ar->wmi; 3004 struct wmi_addba_clear_resp_cmd *cmd; 3005 struct sk_buff *skb; 3006 int ret; 3007 3008 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 3009 if (!skb) 3010 return -ENOMEM; 3011 3012 cmd = (struct wmi_addba_clear_resp_cmd *)skb->data; 3013 cmd->tlv_header = 3014 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ADDBA_CLEAR_RESP_CMD, 3015 sizeof(*cmd)); 3016 cmd->vdev_id = cpu_to_le32(vdev_id); 3017 ether_addr_copy(cmd->peer_macaddr.addr, mac); 3018 3019 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3020 "wmi addba clear resp vdev_id 0x%X mac_addr %pM\n", 3021 vdev_id, mac); 3022 3023 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_ADDBA_CLEAR_RESP_CMDID); 3024 3025 if (ret) { 3026 ath12k_warn(ar->ab, 3027 "failed to send WMI_ADDBA_CLEAR_RESP_CMDID cmd\n"); 3028 dev_kfree_skb(skb); 3029 } 3030 3031 return ret; 3032 } 3033 3034 int ath12k_wmi_send_init_country_cmd(struct ath12k *ar, 3035 struct ath12k_wmi_init_country_arg *arg) 3036 { 3037 struct ath12k_wmi_pdev *wmi = ar->wmi; 3038 struct wmi_init_country_cmd *cmd; 3039 struct sk_buff *skb; 3040 int ret; 3041 3042 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 3043 if (!skb) 3044 return -ENOMEM; 3045 3046 cmd = (struct wmi_init_country_cmd *)skb->data; 3047 cmd->tlv_header = 3048 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_SET_INIT_COUNTRY_CMD, 3049 sizeof(*cmd)); 3050 3051 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id); 3052 3053 switch (arg->flags) { 3054 case ALPHA_IS_SET: 3055 cmd->init_cc_type = WMI_COUNTRY_INFO_TYPE_ALPHA; 3056 memcpy(&cmd->cc_info.alpha2, arg->cc_info.alpha2, 3); 3057 break; 3058 case CC_IS_SET: 3059 cmd->init_cc_type = cpu_to_le32(WMI_COUNTRY_INFO_TYPE_COUNTRY_CODE); 3060 cmd->cc_info.country_code = 3061 cpu_to_le32(arg->cc_info.country_code); 3062 break; 3063 case REGDMN_IS_SET: 3064 cmd->init_cc_type = cpu_to_le32(WMI_COUNTRY_INFO_TYPE_REGDOMAIN); 3065 cmd->cc_info.regdom_id = cpu_to_le32(arg->cc_info.regdom_id); 3066 break; 3067 default: 3068 ret = -EINVAL; 3069 goto out; 3070 } 3071 3072 ret = ath12k_wmi_cmd_send(wmi, skb, 3073 WMI_SET_INIT_COUNTRY_CMDID); 3074 3075 out: 3076 if (ret) { 3077 ath12k_warn(ar->ab, 3078 "failed to send WMI_SET_INIT_COUNTRY CMD :%d\n", 3079 ret); 3080 dev_kfree_skb(skb); 3081 } 3082 3083 return ret; 3084 } 3085 3086 int 3087 ath12k_wmi_send_twt_enable_cmd(struct ath12k *ar, u32 pdev_id) 3088 { 3089 struct ath12k_wmi_pdev *wmi = ar->wmi; 3090 struct ath12k_base *ab = wmi->wmi_ab->ab; 3091 struct wmi_twt_enable_params_cmd *cmd; 3092 struct sk_buff *skb; 3093 int ret, len; 3094 3095 len = sizeof(*cmd); 3096 3097 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 3098 if (!skb) 3099 return -ENOMEM; 3100 3101 cmd = (struct wmi_twt_enable_params_cmd *)skb->data; 3102 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_TWT_ENABLE_CMD, 3103 len); 3104 cmd->pdev_id = cpu_to_le32(pdev_id); 3105 cmd->sta_cong_timer_ms = cpu_to_le32(ATH12K_TWT_DEF_STA_CONG_TIMER_MS); 3106 cmd->default_slot_size = cpu_to_le32(ATH12K_TWT_DEF_DEFAULT_SLOT_SIZE); 3107 cmd->congestion_thresh_setup = 3108 cpu_to_le32(ATH12K_TWT_DEF_CONGESTION_THRESH_SETUP); 3109 cmd->congestion_thresh_teardown = 3110 cpu_to_le32(ATH12K_TWT_DEF_CONGESTION_THRESH_TEARDOWN); 3111 cmd->congestion_thresh_critical = 3112 cpu_to_le32(ATH12K_TWT_DEF_CONGESTION_THRESH_CRITICAL); 3113 cmd->interference_thresh_teardown = 3114 cpu_to_le32(ATH12K_TWT_DEF_INTERFERENCE_THRESH_TEARDOWN); 3115 cmd->interference_thresh_setup = 3116 cpu_to_le32(ATH12K_TWT_DEF_INTERFERENCE_THRESH_SETUP); 3117 cmd->min_no_sta_setup = cpu_to_le32(ATH12K_TWT_DEF_MIN_NO_STA_SETUP); 3118 cmd->min_no_sta_teardown = cpu_to_le32(ATH12K_TWT_DEF_MIN_NO_STA_TEARDOWN); 3119 cmd->no_of_bcast_mcast_slots = 3120 cpu_to_le32(ATH12K_TWT_DEF_NO_OF_BCAST_MCAST_SLOTS); 3121 cmd->min_no_twt_slots = cpu_to_le32(ATH12K_TWT_DEF_MIN_NO_TWT_SLOTS); 3122 cmd->max_no_sta_twt = cpu_to_le32(ATH12K_TWT_DEF_MAX_NO_STA_TWT); 3123 cmd->mode_check_interval = cpu_to_le32(ATH12K_TWT_DEF_MODE_CHECK_INTERVAL); 3124 cmd->add_sta_slot_interval = cpu_to_le32(ATH12K_TWT_DEF_ADD_STA_SLOT_INTERVAL); 3125 cmd->remove_sta_slot_interval = 3126 cpu_to_le32(ATH12K_TWT_DEF_REMOVE_STA_SLOT_INTERVAL); 3127 /* TODO add MBSSID support */ 3128 cmd->mbss_support = 0; 3129 3130 ret = ath12k_wmi_cmd_send(wmi, skb, 3131 WMI_TWT_ENABLE_CMDID); 3132 if (ret) { 3133 ath12k_warn(ab, "Failed to send WMI_TWT_ENABLE_CMDID"); 3134 dev_kfree_skb(skb); 3135 } 3136 return ret; 3137 } 3138 3139 int 3140 ath12k_wmi_send_twt_disable_cmd(struct ath12k *ar, u32 pdev_id) 3141 { 3142 struct ath12k_wmi_pdev *wmi = ar->wmi; 3143 struct ath12k_base *ab = wmi->wmi_ab->ab; 3144 struct wmi_twt_disable_params_cmd *cmd; 3145 struct sk_buff *skb; 3146 int ret, len; 3147 3148 len = sizeof(*cmd); 3149 3150 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 3151 if (!skb) 3152 return -ENOMEM; 3153 3154 cmd = (struct wmi_twt_disable_params_cmd *)skb->data; 3155 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_TWT_DISABLE_CMD, 3156 len); 3157 cmd->pdev_id = cpu_to_le32(pdev_id); 3158 3159 ret = ath12k_wmi_cmd_send(wmi, skb, 3160 WMI_TWT_DISABLE_CMDID); 3161 if (ret) { 3162 ath12k_warn(ab, "Failed to send WMI_TWT_DISABLE_CMDID"); 3163 dev_kfree_skb(skb); 3164 } 3165 return ret; 3166 } 3167 3168 int 3169 ath12k_wmi_send_obss_spr_cmd(struct ath12k *ar, u32 vdev_id, 3170 struct ieee80211_he_obss_pd *he_obss_pd) 3171 { 3172 struct ath12k_wmi_pdev *wmi = ar->wmi; 3173 struct ath12k_base *ab = wmi->wmi_ab->ab; 3174 struct wmi_obss_spatial_reuse_params_cmd *cmd; 3175 struct sk_buff *skb; 3176 int ret, len; 3177 3178 len = sizeof(*cmd); 3179 3180 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 3181 if (!skb) 3182 return -ENOMEM; 3183 3184 cmd = (struct wmi_obss_spatial_reuse_params_cmd *)skb->data; 3185 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_OBSS_SPATIAL_REUSE_SET_CMD, 3186 len); 3187 cmd->vdev_id = cpu_to_le32(vdev_id); 3188 cmd->enable = cpu_to_le32(he_obss_pd->enable); 3189 cmd->obss_min = a_cpu_to_sle32(he_obss_pd->min_offset); 3190 cmd->obss_max = a_cpu_to_sle32(he_obss_pd->max_offset); 3191 3192 ret = ath12k_wmi_cmd_send(wmi, skb, 3193 WMI_PDEV_OBSS_PD_SPATIAL_REUSE_CMDID); 3194 if (ret) { 3195 ath12k_warn(ab, 3196 "Failed to send WMI_PDEV_OBSS_PD_SPATIAL_REUSE_CMDID"); 3197 dev_kfree_skb(skb); 3198 } 3199 return ret; 3200 } 3201 3202 int ath12k_wmi_obss_color_cfg_cmd(struct ath12k *ar, u32 vdev_id, 3203 u8 bss_color, u32 period, 3204 bool enable) 3205 { 3206 struct ath12k_wmi_pdev *wmi = ar->wmi; 3207 struct ath12k_base *ab = wmi->wmi_ab->ab; 3208 struct wmi_obss_color_collision_cfg_params_cmd *cmd; 3209 struct sk_buff *skb; 3210 int ret, len; 3211 3212 len = sizeof(*cmd); 3213 3214 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 3215 if (!skb) 3216 return -ENOMEM; 3217 3218 cmd = (struct wmi_obss_color_collision_cfg_params_cmd *)skb->data; 3219 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_OBSS_COLOR_COLLISION_DET_CONFIG, 3220 len); 3221 cmd->vdev_id = cpu_to_le32(vdev_id); 3222 cmd->evt_type = enable ? cpu_to_le32(ATH12K_OBSS_COLOR_COLLISION_DETECTION) : 3223 cpu_to_le32(ATH12K_OBSS_COLOR_COLLISION_DETECTION_DISABLE); 3224 cmd->current_bss_color = cpu_to_le32(bss_color); 3225 cmd->detection_period_ms = cpu_to_le32(period); 3226 cmd->scan_period_ms = cpu_to_le32(ATH12K_BSS_COLOR_COLLISION_SCAN_PERIOD_MS); 3227 cmd->free_slot_expiry_time_ms = 0; 3228 cmd->flags = 0; 3229 3230 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3231 "wmi_send_obss_color_collision_cfg id %d type %d bss_color %d detect_period %d scan_period %d\n", 3232 cmd->vdev_id, cmd->evt_type, cmd->current_bss_color, 3233 cmd->detection_period_ms, cmd->scan_period_ms); 3234 3235 ret = ath12k_wmi_cmd_send(wmi, skb, 3236 WMI_OBSS_COLOR_COLLISION_DET_CONFIG_CMDID); 3237 if (ret) { 3238 ath12k_warn(ab, "Failed to send WMI_OBSS_COLOR_COLLISION_DET_CONFIG_CMDID"); 3239 dev_kfree_skb(skb); 3240 } 3241 return ret; 3242 } 3243 3244 int ath12k_wmi_send_bss_color_change_enable_cmd(struct ath12k *ar, u32 vdev_id, 3245 bool enable) 3246 { 3247 struct ath12k_wmi_pdev *wmi = ar->wmi; 3248 struct ath12k_base *ab = wmi->wmi_ab->ab; 3249 struct wmi_bss_color_change_enable_params_cmd *cmd; 3250 struct sk_buff *skb; 3251 int ret, len; 3252 3253 len = sizeof(*cmd); 3254 3255 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 3256 if (!skb) 3257 return -ENOMEM; 3258 3259 cmd = (struct wmi_bss_color_change_enable_params_cmd *)skb->data; 3260 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BSS_COLOR_CHANGE_ENABLE, 3261 len); 3262 cmd->vdev_id = cpu_to_le32(vdev_id); 3263 cmd->enable = enable ? cpu_to_le32(1) : 0; 3264 3265 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3266 "wmi_send_bss_color_change_enable id %d enable %d\n", 3267 cmd->vdev_id, cmd->enable); 3268 3269 ret = ath12k_wmi_cmd_send(wmi, skb, 3270 WMI_BSS_COLOR_CHANGE_ENABLE_CMDID); 3271 if (ret) { 3272 ath12k_warn(ab, "Failed to send WMI_BSS_COLOR_CHANGE_ENABLE_CMDID"); 3273 dev_kfree_skb(skb); 3274 } 3275 return ret; 3276 } 3277 3278 int ath12k_wmi_fils_discovery_tmpl(struct ath12k *ar, u32 vdev_id, 3279 struct sk_buff *tmpl) 3280 { 3281 struct wmi_tlv *tlv; 3282 struct sk_buff *skb; 3283 void *ptr; 3284 int ret, len; 3285 size_t aligned_len; 3286 struct wmi_fils_discovery_tmpl_cmd *cmd; 3287 3288 aligned_len = roundup(tmpl->len, 4); 3289 len = sizeof(*cmd) + TLV_HDR_SIZE + aligned_len; 3290 3291 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3292 "WMI vdev %i set FILS discovery template\n", vdev_id); 3293 3294 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 3295 if (!skb) 3296 return -ENOMEM; 3297 3298 cmd = (struct wmi_fils_discovery_tmpl_cmd *)skb->data; 3299 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_FILS_DISCOVERY_TMPL_CMD, 3300 sizeof(*cmd)); 3301 cmd->vdev_id = cpu_to_le32(vdev_id); 3302 cmd->buf_len = cpu_to_le32(tmpl->len); 3303 ptr = skb->data + sizeof(*cmd); 3304 3305 tlv = ptr; 3306 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, aligned_len); 3307 memcpy(tlv->value, tmpl->data, tmpl->len); 3308 3309 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_FILS_DISCOVERY_TMPL_CMDID); 3310 if (ret) { 3311 ath12k_warn(ar->ab, 3312 "WMI vdev %i failed to send FILS discovery template command\n", 3313 vdev_id); 3314 dev_kfree_skb(skb); 3315 } 3316 return ret; 3317 } 3318 3319 int ath12k_wmi_probe_resp_tmpl(struct ath12k *ar, u32 vdev_id, 3320 struct sk_buff *tmpl) 3321 { 3322 struct wmi_probe_tmpl_cmd *cmd; 3323 struct ath12k_wmi_bcn_prb_info_params *probe_info; 3324 struct wmi_tlv *tlv; 3325 struct sk_buff *skb; 3326 void *ptr; 3327 int ret, len; 3328 size_t aligned_len = roundup(tmpl->len, 4); 3329 3330 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3331 "WMI vdev %i set probe response template\n", vdev_id); 3332 3333 len = sizeof(*cmd) + sizeof(*probe_info) + TLV_HDR_SIZE + aligned_len; 3334 3335 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 3336 if (!skb) 3337 return -ENOMEM; 3338 3339 cmd = (struct wmi_probe_tmpl_cmd *)skb->data; 3340 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PRB_TMPL_CMD, 3341 sizeof(*cmd)); 3342 cmd->vdev_id = cpu_to_le32(vdev_id); 3343 cmd->buf_len = cpu_to_le32(tmpl->len); 3344 3345 ptr = skb->data + sizeof(*cmd); 3346 3347 probe_info = ptr; 3348 len = sizeof(*probe_info); 3349 probe_info->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_PRB_INFO, 3350 len); 3351 probe_info->caps = 0; 3352 probe_info->erp = 0; 3353 3354 ptr += sizeof(*probe_info); 3355 3356 tlv = ptr; 3357 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, aligned_len); 3358 memcpy(tlv->value, tmpl->data, tmpl->len); 3359 3360 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_PRB_TMPL_CMDID); 3361 if (ret) { 3362 ath12k_warn(ar->ab, 3363 "WMI vdev %i failed to send probe response template command\n", 3364 vdev_id); 3365 dev_kfree_skb(skb); 3366 } 3367 return ret; 3368 } 3369 3370 int ath12k_wmi_fils_discovery(struct ath12k *ar, u32 vdev_id, u32 interval, 3371 bool unsol_bcast_probe_resp_enabled) 3372 { 3373 struct sk_buff *skb; 3374 int ret, len; 3375 struct wmi_fils_discovery_cmd *cmd; 3376 3377 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3378 "WMI vdev %i set %s interval to %u TU\n", 3379 vdev_id, unsol_bcast_probe_resp_enabled ? 3380 "unsolicited broadcast probe response" : "FILS discovery", 3381 interval); 3382 3383 len = sizeof(*cmd); 3384 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 3385 if (!skb) 3386 return -ENOMEM; 3387 3388 cmd = (struct wmi_fils_discovery_cmd *)skb->data; 3389 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ENABLE_FILS_CMD, 3390 len); 3391 cmd->vdev_id = cpu_to_le32(vdev_id); 3392 cmd->interval = cpu_to_le32(interval); 3393 cmd->config = cpu_to_le32(unsol_bcast_probe_resp_enabled); 3394 3395 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_ENABLE_FILS_CMDID); 3396 if (ret) { 3397 ath12k_warn(ar->ab, 3398 "WMI vdev %i failed to send FILS discovery enable/disable command\n", 3399 vdev_id); 3400 dev_kfree_skb(skb); 3401 } 3402 return ret; 3403 } 3404 3405 static void 3406 ath12k_fill_band_to_mac_param(struct ath12k_base *soc, 3407 struct ath12k_wmi_pdev_band_arg *arg) 3408 { 3409 u8 i; 3410 struct ath12k_wmi_hal_reg_capabilities_ext_arg *hal_reg_cap; 3411 struct ath12k_pdev *pdev; 3412 3413 for (i = 0; i < soc->num_radios; i++) { 3414 pdev = &soc->pdevs[i]; 3415 hal_reg_cap = &soc->hal_reg_cap[i]; 3416 arg[i].pdev_id = pdev->pdev_id; 3417 3418 switch (pdev->cap.supported_bands) { 3419 case WMI_HOST_WLAN_2G_5G_CAP: 3420 arg[i].start_freq = hal_reg_cap->low_2ghz_chan; 3421 arg[i].end_freq = hal_reg_cap->high_5ghz_chan; 3422 break; 3423 case WMI_HOST_WLAN_2G_CAP: 3424 arg[i].start_freq = hal_reg_cap->low_2ghz_chan; 3425 arg[i].end_freq = hal_reg_cap->high_2ghz_chan; 3426 break; 3427 case WMI_HOST_WLAN_5G_CAP: 3428 arg[i].start_freq = hal_reg_cap->low_5ghz_chan; 3429 arg[i].end_freq = hal_reg_cap->high_5ghz_chan; 3430 break; 3431 default: 3432 break; 3433 } 3434 } 3435 } 3436 3437 static void 3438 ath12k_wmi_copy_resource_config(struct ath12k_wmi_resource_config_params *wmi_cfg, 3439 struct ath12k_wmi_resource_config_arg *tg_cfg) 3440 { 3441 wmi_cfg->num_vdevs = cpu_to_le32(tg_cfg->num_vdevs); 3442 wmi_cfg->num_peers = cpu_to_le32(tg_cfg->num_peers); 3443 wmi_cfg->num_offload_peers = cpu_to_le32(tg_cfg->num_offload_peers); 3444 wmi_cfg->num_offload_reorder_buffs = 3445 cpu_to_le32(tg_cfg->num_offload_reorder_buffs); 3446 wmi_cfg->num_peer_keys = cpu_to_le32(tg_cfg->num_peer_keys); 3447 wmi_cfg->num_tids = cpu_to_le32(tg_cfg->num_tids); 3448 wmi_cfg->ast_skid_limit = cpu_to_le32(tg_cfg->ast_skid_limit); 3449 wmi_cfg->tx_chain_mask = cpu_to_le32(tg_cfg->tx_chain_mask); 3450 wmi_cfg->rx_chain_mask = cpu_to_le32(tg_cfg->rx_chain_mask); 3451 wmi_cfg->rx_timeout_pri[0] = cpu_to_le32(tg_cfg->rx_timeout_pri[0]); 3452 wmi_cfg->rx_timeout_pri[1] = cpu_to_le32(tg_cfg->rx_timeout_pri[1]); 3453 wmi_cfg->rx_timeout_pri[2] = cpu_to_le32(tg_cfg->rx_timeout_pri[2]); 3454 wmi_cfg->rx_timeout_pri[3] = cpu_to_le32(tg_cfg->rx_timeout_pri[3]); 3455 wmi_cfg->rx_decap_mode = cpu_to_le32(tg_cfg->rx_decap_mode); 3456 wmi_cfg->scan_max_pending_req = cpu_to_le32(tg_cfg->scan_max_pending_req); 3457 wmi_cfg->bmiss_offload_max_vdev = cpu_to_le32(tg_cfg->bmiss_offload_max_vdev); 3458 wmi_cfg->roam_offload_max_vdev = cpu_to_le32(tg_cfg->roam_offload_max_vdev); 3459 wmi_cfg->roam_offload_max_ap_profiles = 3460 cpu_to_le32(tg_cfg->roam_offload_max_ap_profiles); 3461 wmi_cfg->num_mcast_groups = cpu_to_le32(tg_cfg->num_mcast_groups); 3462 wmi_cfg->num_mcast_table_elems = cpu_to_le32(tg_cfg->num_mcast_table_elems); 3463 wmi_cfg->mcast2ucast_mode = cpu_to_le32(tg_cfg->mcast2ucast_mode); 3464 wmi_cfg->tx_dbg_log_size = cpu_to_le32(tg_cfg->tx_dbg_log_size); 3465 wmi_cfg->num_wds_entries = cpu_to_le32(tg_cfg->num_wds_entries); 3466 wmi_cfg->dma_burst_size = cpu_to_le32(tg_cfg->dma_burst_size); 3467 wmi_cfg->mac_aggr_delim = cpu_to_le32(tg_cfg->mac_aggr_delim); 3468 wmi_cfg->rx_skip_defrag_timeout_dup_detection_check = 3469 cpu_to_le32(tg_cfg->rx_skip_defrag_timeout_dup_detection_check); 3470 wmi_cfg->vow_config = cpu_to_le32(tg_cfg->vow_config); 3471 wmi_cfg->gtk_offload_max_vdev = cpu_to_le32(tg_cfg->gtk_offload_max_vdev); 3472 wmi_cfg->num_msdu_desc = cpu_to_le32(tg_cfg->num_msdu_desc); 3473 wmi_cfg->max_frag_entries = cpu_to_le32(tg_cfg->max_frag_entries); 3474 wmi_cfg->num_tdls_vdevs = cpu_to_le32(tg_cfg->num_tdls_vdevs); 3475 wmi_cfg->num_tdls_conn_table_entries = 3476 cpu_to_le32(tg_cfg->num_tdls_conn_table_entries); 3477 wmi_cfg->beacon_tx_offload_max_vdev = 3478 cpu_to_le32(tg_cfg->beacon_tx_offload_max_vdev); 3479 wmi_cfg->num_multicast_filter_entries = 3480 cpu_to_le32(tg_cfg->num_multicast_filter_entries); 3481 wmi_cfg->num_wow_filters = cpu_to_le32(tg_cfg->num_wow_filters); 3482 wmi_cfg->num_keep_alive_pattern = cpu_to_le32(tg_cfg->num_keep_alive_pattern); 3483 wmi_cfg->keep_alive_pattern_size = cpu_to_le32(tg_cfg->keep_alive_pattern_size); 3484 wmi_cfg->max_tdls_concurrent_sleep_sta = 3485 cpu_to_le32(tg_cfg->max_tdls_concurrent_sleep_sta); 3486 wmi_cfg->max_tdls_concurrent_buffer_sta = 3487 cpu_to_le32(tg_cfg->max_tdls_concurrent_buffer_sta); 3488 wmi_cfg->wmi_send_separate = cpu_to_le32(tg_cfg->wmi_send_separate); 3489 wmi_cfg->num_ocb_vdevs = cpu_to_le32(tg_cfg->num_ocb_vdevs); 3490 wmi_cfg->num_ocb_channels = cpu_to_le32(tg_cfg->num_ocb_channels); 3491 wmi_cfg->num_ocb_schedules = cpu_to_le32(tg_cfg->num_ocb_schedules); 3492 wmi_cfg->bpf_instruction_size = cpu_to_le32(tg_cfg->bpf_instruction_size); 3493 wmi_cfg->max_bssid_rx_filters = cpu_to_le32(tg_cfg->max_bssid_rx_filters); 3494 wmi_cfg->use_pdev_id = cpu_to_le32(tg_cfg->use_pdev_id); 3495 wmi_cfg->flag1 = cpu_to_le32(tg_cfg->atf_config | 3496 WMI_RSRC_CFG_FLAG1_BSS_CHANNEL_INFO_64); 3497 wmi_cfg->peer_map_unmap_version = cpu_to_le32(tg_cfg->peer_map_unmap_version); 3498 wmi_cfg->sched_params = cpu_to_le32(tg_cfg->sched_params); 3499 wmi_cfg->twt_ap_pdev_count = cpu_to_le32(tg_cfg->twt_ap_pdev_count); 3500 wmi_cfg->twt_ap_sta_count = cpu_to_le32(tg_cfg->twt_ap_sta_count); 3501 wmi_cfg->flags2 = le32_encode_bits(tg_cfg->peer_metadata_ver, 3502 WMI_RSRC_CFG_FLAGS2_RX_PEER_METADATA_VERSION); 3503 wmi_cfg->host_service_flags = cpu_to_le32(tg_cfg->is_reg_cc_ext_event_supported << 3504 WMI_RSRC_CFG_HOST_SVC_FLAG_REG_CC_EXT_SUPPORT_BIT); 3505 wmi_cfg->ema_max_vap_cnt = cpu_to_le32(tg_cfg->ema_max_vap_cnt); 3506 wmi_cfg->ema_max_profile_period = cpu_to_le32(tg_cfg->ema_max_profile_period); 3507 wmi_cfg->flags2 |= cpu_to_le32(WMI_RSRC_CFG_FLAGS2_CALC_NEXT_DTIM_COUNT_SET); 3508 } 3509 3510 static int ath12k_init_cmd_send(struct ath12k_wmi_pdev *wmi, 3511 struct ath12k_wmi_init_cmd_arg *arg) 3512 { 3513 struct ath12k_base *ab = wmi->wmi_ab->ab; 3514 struct sk_buff *skb; 3515 struct wmi_init_cmd *cmd; 3516 struct ath12k_wmi_resource_config_params *cfg; 3517 struct ath12k_wmi_pdev_set_hw_mode_cmd *hw_mode; 3518 struct ath12k_wmi_pdev_band_to_mac_params *band_to_mac; 3519 struct ath12k_wmi_host_mem_chunk_params *host_mem_chunks; 3520 struct wmi_tlv *tlv; 3521 size_t ret, len; 3522 void *ptr; 3523 u32 hw_mode_len = 0; 3524 u16 idx; 3525 3526 if (arg->hw_mode_id != WMI_HOST_HW_MODE_MAX) 3527 hw_mode_len = sizeof(*hw_mode) + TLV_HDR_SIZE + 3528 (arg->num_band_to_mac * sizeof(*band_to_mac)); 3529 3530 len = sizeof(*cmd) + TLV_HDR_SIZE + sizeof(*cfg) + hw_mode_len + 3531 (arg->num_mem_chunks ? (sizeof(*host_mem_chunks) * WMI_MAX_MEM_REQS) : 0); 3532 3533 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 3534 if (!skb) 3535 return -ENOMEM; 3536 3537 cmd = (struct wmi_init_cmd *)skb->data; 3538 3539 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_INIT_CMD, 3540 sizeof(*cmd)); 3541 3542 ptr = skb->data + sizeof(*cmd); 3543 cfg = ptr; 3544 3545 ath12k_wmi_copy_resource_config(cfg, &arg->res_cfg); 3546 3547 cfg->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_RESOURCE_CONFIG, 3548 sizeof(*cfg)); 3549 3550 ptr += sizeof(*cfg); 3551 host_mem_chunks = ptr + TLV_HDR_SIZE; 3552 len = sizeof(struct ath12k_wmi_host_mem_chunk_params); 3553 3554 for (idx = 0; idx < arg->num_mem_chunks; ++idx) { 3555 host_mem_chunks[idx].tlv_header = 3556 ath12k_wmi_tlv_hdr(WMI_TAG_WLAN_HOST_MEMORY_CHUNK, 3557 len); 3558 3559 host_mem_chunks[idx].ptr = cpu_to_le32(arg->mem_chunks[idx].paddr); 3560 host_mem_chunks[idx].size = cpu_to_le32(arg->mem_chunks[idx].len); 3561 host_mem_chunks[idx].req_id = cpu_to_le32(arg->mem_chunks[idx].req_id); 3562 3563 ath12k_dbg(ab, ATH12K_DBG_WMI, 3564 "WMI host mem chunk req_id %d paddr 0x%llx len %d\n", 3565 arg->mem_chunks[idx].req_id, 3566 (u64)arg->mem_chunks[idx].paddr, 3567 arg->mem_chunks[idx].len); 3568 } 3569 cmd->num_host_mem_chunks = cpu_to_le32(arg->num_mem_chunks); 3570 len = sizeof(struct ath12k_wmi_host_mem_chunk_params) * arg->num_mem_chunks; 3571 3572 /* num_mem_chunks is zero */ 3573 tlv = ptr; 3574 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len); 3575 ptr += TLV_HDR_SIZE + len; 3576 3577 if (arg->hw_mode_id != WMI_HOST_HW_MODE_MAX) { 3578 hw_mode = (struct ath12k_wmi_pdev_set_hw_mode_cmd *)ptr; 3579 hw_mode->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_HW_MODE_CMD, 3580 sizeof(*hw_mode)); 3581 3582 hw_mode->hw_mode_index = cpu_to_le32(arg->hw_mode_id); 3583 hw_mode->num_band_to_mac = cpu_to_le32(arg->num_band_to_mac); 3584 3585 ptr += sizeof(*hw_mode); 3586 3587 len = arg->num_band_to_mac * sizeof(*band_to_mac); 3588 tlv = ptr; 3589 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len); 3590 3591 ptr += TLV_HDR_SIZE; 3592 len = sizeof(*band_to_mac); 3593 3594 for (idx = 0; idx < arg->num_band_to_mac; idx++) { 3595 band_to_mac = (void *)ptr; 3596 3597 band_to_mac->tlv_header = 3598 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_BAND_TO_MAC, 3599 len); 3600 band_to_mac->pdev_id = cpu_to_le32(arg->band_to_mac[idx].pdev_id); 3601 band_to_mac->start_freq = 3602 cpu_to_le32(arg->band_to_mac[idx].start_freq); 3603 band_to_mac->end_freq = 3604 cpu_to_le32(arg->band_to_mac[idx].end_freq); 3605 ptr += sizeof(*band_to_mac); 3606 } 3607 } 3608 3609 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_INIT_CMDID); 3610 if (ret) { 3611 ath12k_warn(ab, "failed to send WMI_INIT_CMDID\n"); 3612 dev_kfree_skb(skb); 3613 } 3614 3615 return ret; 3616 } 3617 3618 int ath12k_wmi_pdev_lro_cfg(struct ath12k *ar, 3619 int pdev_id) 3620 { 3621 struct ath12k_wmi_pdev_lro_config_cmd *cmd; 3622 struct sk_buff *skb; 3623 int ret; 3624 3625 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd)); 3626 if (!skb) 3627 return -ENOMEM; 3628 3629 cmd = (struct ath12k_wmi_pdev_lro_config_cmd *)skb->data; 3630 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_LRO_INFO_CMD, 3631 sizeof(*cmd)); 3632 3633 get_random_bytes(cmd->th_4, sizeof(cmd->th_4)); 3634 get_random_bytes(cmd->th_6, sizeof(cmd->th_6)); 3635 3636 cmd->pdev_id = cpu_to_le32(pdev_id); 3637 3638 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3639 "WMI lro cfg cmd pdev_id 0x%x\n", pdev_id); 3640 3641 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_LRO_CONFIG_CMDID); 3642 if (ret) { 3643 ath12k_warn(ar->ab, 3644 "failed to send lro cfg req wmi cmd\n"); 3645 goto err; 3646 } 3647 3648 return 0; 3649 err: 3650 dev_kfree_skb(skb); 3651 return ret; 3652 } 3653 3654 int ath12k_wmi_wait_for_service_ready(struct ath12k_base *ab) 3655 { 3656 unsigned long time_left; 3657 3658 time_left = wait_for_completion_timeout(&ab->wmi_ab.service_ready, 3659 WMI_SERVICE_READY_TIMEOUT_HZ); 3660 if (!time_left) 3661 return -ETIMEDOUT; 3662 3663 return 0; 3664 } 3665 3666 int ath12k_wmi_wait_for_unified_ready(struct ath12k_base *ab) 3667 { 3668 unsigned long time_left; 3669 3670 time_left = wait_for_completion_timeout(&ab->wmi_ab.unified_ready, 3671 WMI_SERVICE_READY_TIMEOUT_HZ); 3672 if (!time_left) 3673 return -ETIMEDOUT; 3674 3675 return 0; 3676 } 3677 3678 int ath12k_wmi_set_hw_mode(struct ath12k_base *ab, 3679 enum wmi_host_hw_mode_config_type mode) 3680 { 3681 struct ath12k_wmi_pdev_set_hw_mode_cmd *cmd; 3682 struct sk_buff *skb; 3683 struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab; 3684 int len; 3685 int ret; 3686 3687 len = sizeof(*cmd); 3688 3689 skb = ath12k_wmi_alloc_skb(wmi_ab, len); 3690 if (!skb) 3691 return -ENOMEM; 3692 3693 cmd = (struct ath12k_wmi_pdev_set_hw_mode_cmd *)skb->data; 3694 3695 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_HW_MODE_CMD, 3696 sizeof(*cmd)); 3697 3698 cmd->pdev_id = WMI_PDEV_ID_SOC; 3699 cmd->hw_mode_index = cpu_to_le32(mode); 3700 3701 ret = ath12k_wmi_cmd_send(&wmi_ab->wmi[0], skb, WMI_PDEV_SET_HW_MODE_CMDID); 3702 if (ret) { 3703 ath12k_warn(ab, "failed to send WMI_PDEV_SET_HW_MODE_CMDID\n"); 3704 dev_kfree_skb(skb); 3705 } 3706 3707 return ret; 3708 } 3709 3710 int ath12k_wmi_cmd_init(struct ath12k_base *ab) 3711 { 3712 struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab; 3713 struct ath12k_wmi_init_cmd_arg arg = {}; 3714 3715 if (test_bit(WMI_TLV_SERVICE_REG_CC_EXT_EVENT_SUPPORT, 3716 ab->wmi_ab.svc_map)) 3717 arg.res_cfg.is_reg_cc_ext_event_supported = true; 3718 3719 ab->hw_params->wmi_init(ab, &arg.res_cfg); 3720 ab->wow.wmi_conf_rx_decap_mode = arg.res_cfg.rx_decap_mode; 3721 3722 arg.num_mem_chunks = wmi_ab->num_mem_chunks; 3723 arg.hw_mode_id = wmi_ab->preferred_hw_mode; 3724 arg.mem_chunks = wmi_ab->mem_chunks; 3725 3726 if (ab->hw_params->single_pdev_only) 3727 arg.hw_mode_id = WMI_HOST_HW_MODE_MAX; 3728 3729 arg.num_band_to_mac = ab->num_radios; 3730 ath12k_fill_band_to_mac_param(ab, arg.band_to_mac); 3731 3732 ab->dp.peer_metadata_ver = arg.res_cfg.peer_metadata_ver; 3733 3734 return ath12k_init_cmd_send(&wmi_ab->wmi[0], &arg); 3735 } 3736 3737 int ath12k_wmi_vdev_spectral_conf(struct ath12k *ar, 3738 struct ath12k_wmi_vdev_spectral_conf_arg *arg) 3739 { 3740 struct ath12k_wmi_vdev_spectral_conf_cmd *cmd; 3741 struct sk_buff *skb; 3742 int ret; 3743 3744 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd)); 3745 if (!skb) 3746 return -ENOMEM; 3747 3748 cmd = (struct ath12k_wmi_vdev_spectral_conf_cmd *)skb->data; 3749 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SPECTRAL_CONFIGURE_CMD, 3750 sizeof(*cmd)); 3751 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 3752 cmd->scan_count = cpu_to_le32(arg->scan_count); 3753 cmd->scan_period = cpu_to_le32(arg->scan_period); 3754 cmd->scan_priority = cpu_to_le32(arg->scan_priority); 3755 cmd->scan_fft_size = cpu_to_le32(arg->scan_fft_size); 3756 cmd->scan_gc_ena = cpu_to_le32(arg->scan_gc_ena); 3757 cmd->scan_restart_ena = cpu_to_le32(arg->scan_restart_ena); 3758 cmd->scan_noise_floor_ref = cpu_to_le32(arg->scan_noise_floor_ref); 3759 cmd->scan_init_delay = cpu_to_le32(arg->scan_init_delay); 3760 cmd->scan_nb_tone_thr = cpu_to_le32(arg->scan_nb_tone_thr); 3761 cmd->scan_str_bin_thr = cpu_to_le32(arg->scan_str_bin_thr); 3762 cmd->scan_wb_rpt_mode = cpu_to_le32(arg->scan_wb_rpt_mode); 3763 cmd->scan_rssi_rpt_mode = cpu_to_le32(arg->scan_rssi_rpt_mode); 3764 cmd->scan_rssi_thr = cpu_to_le32(arg->scan_rssi_thr); 3765 cmd->scan_pwr_format = cpu_to_le32(arg->scan_pwr_format); 3766 cmd->scan_rpt_mode = cpu_to_le32(arg->scan_rpt_mode); 3767 cmd->scan_bin_scale = cpu_to_le32(arg->scan_bin_scale); 3768 cmd->scan_dbm_adj = cpu_to_le32(arg->scan_dbm_adj); 3769 cmd->scan_chn_mask = cpu_to_le32(arg->scan_chn_mask); 3770 3771 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3772 "WMI spectral scan config cmd vdev_id 0x%x\n", 3773 arg->vdev_id); 3774 3775 ret = ath12k_wmi_cmd_send(ar->wmi, skb, 3776 WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID); 3777 if (ret) { 3778 ath12k_warn(ar->ab, 3779 "failed to send spectral scan config wmi cmd\n"); 3780 goto err; 3781 } 3782 3783 return 0; 3784 err: 3785 dev_kfree_skb(skb); 3786 return ret; 3787 } 3788 3789 int ath12k_wmi_vdev_spectral_enable(struct ath12k *ar, u32 vdev_id, 3790 u32 trigger, u32 enable) 3791 { 3792 struct ath12k_wmi_vdev_spectral_enable_cmd *cmd; 3793 struct sk_buff *skb; 3794 int ret; 3795 3796 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd)); 3797 if (!skb) 3798 return -ENOMEM; 3799 3800 cmd = (struct ath12k_wmi_vdev_spectral_enable_cmd *)skb->data; 3801 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SPECTRAL_ENABLE_CMD, 3802 sizeof(*cmd)); 3803 3804 cmd->vdev_id = cpu_to_le32(vdev_id); 3805 cmd->trigger_cmd = cpu_to_le32(trigger); 3806 cmd->enable_cmd = cpu_to_le32(enable); 3807 3808 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3809 "WMI spectral enable cmd vdev id 0x%x\n", 3810 vdev_id); 3811 3812 ret = ath12k_wmi_cmd_send(ar->wmi, skb, 3813 WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID); 3814 if (ret) { 3815 ath12k_warn(ar->ab, 3816 "failed to send spectral enable wmi cmd\n"); 3817 goto err; 3818 } 3819 3820 return 0; 3821 err: 3822 dev_kfree_skb(skb); 3823 return ret; 3824 } 3825 3826 int ath12k_wmi_pdev_dma_ring_cfg(struct ath12k *ar, 3827 struct ath12k_wmi_pdev_dma_ring_cfg_arg *arg) 3828 { 3829 struct ath12k_wmi_pdev_dma_ring_cfg_req_cmd *cmd; 3830 struct sk_buff *skb; 3831 int ret; 3832 3833 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd)); 3834 if (!skb) 3835 return -ENOMEM; 3836 3837 cmd = (struct ath12k_wmi_pdev_dma_ring_cfg_req_cmd *)skb->data; 3838 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_DMA_RING_CFG_REQ, 3839 sizeof(*cmd)); 3840 3841 cmd->pdev_id = cpu_to_le32(arg->pdev_id); 3842 cmd->module_id = cpu_to_le32(arg->module_id); 3843 cmd->base_paddr_lo = cpu_to_le32(arg->base_paddr_lo); 3844 cmd->base_paddr_hi = cpu_to_le32(arg->base_paddr_hi); 3845 cmd->head_idx_paddr_lo = cpu_to_le32(arg->head_idx_paddr_lo); 3846 cmd->head_idx_paddr_hi = cpu_to_le32(arg->head_idx_paddr_hi); 3847 cmd->tail_idx_paddr_lo = cpu_to_le32(arg->tail_idx_paddr_lo); 3848 cmd->tail_idx_paddr_hi = cpu_to_le32(arg->tail_idx_paddr_hi); 3849 cmd->num_elems = cpu_to_le32(arg->num_elems); 3850 cmd->buf_size = cpu_to_le32(arg->buf_size); 3851 cmd->num_resp_per_event = cpu_to_le32(arg->num_resp_per_event); 3852 cmd->event_timeout_ms = cpu_to_le32(arg->event_timeout_ms); 3853 3854 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3855 "WMI DMA ring cfg req cmd pdev_id 0x%x\n", 3856 arg->pdev_id); 3857 3858 ret = ath12k_wmi_cmd_send(ar->wmi, skb, 3859 WMI_PDEV_DMA_RING_CFG_REQ_CMDID); 3860 if (ret) { 3861 ath12k_warn(ar->ab, 3862 "failed to send dma ring cfg req wmi cmd\n"); 3863 goto err; 3864 } 3865 3866 return 0; 3867 err: 3868 dev_kfree_skb(skb); 3869 return ret; 3870 } 3871 3872 static int ath12k_wmi_dma_buf_entry_parse(struct ath12k_base *soc, 3873 u16 tag, u16 len, 3874 const void *ptr, void *data) 3875 { 3876 struct ath12k_wmi_dma_buf_release_arg *arg = data; 3877 3878 if (tag != WMI_TAG_DMA_BUF_RELEASE_ENTRY) 3879 return -EPROTO; 3880 3881 if (arg->num_buf_entry >= le32_to_cpu(arg->fixed.num_buf_release_entry)) 3882 return -ENOBUFS; 3883 3884 arg->num_buf_entry++; 3885 return 0; 3886 } 3887 3888 static int ath12k_wmi_dma_buf_meta_parse(struct ath12k_base *soc, 3889 u16 tag, u16 len, 3890 const void *ptr, void *data) 3891 { 3892 struct ath12k_wmi_dma_buf_release_arg *arg = data; 3893 3894 if (tag != WMI_TAG_DMA_BUF_RELEASE_SPECTRAL_META_DATA) 3895 return -EPROTO; 3896 3897 if (arg->num_meta >= le32_to_cpu(arg->fixed.num_meta_data_entry)) 3898 return -ENOBUFS; 3899 3900 arg->num_meta++; 3901 3902 return 0; 3903 } 3904 3905 static int ath12k_wmi_dma_buf_parse(struct ath12k_base *ab, 3906 u16 tag, u16 len, 3907 const void *ptr, void *data) 3908 { 3909 struct ath12k_wmi_dma_buf_release_arg *arg = data; 3910 const struct ath12k_wmi_dma_buf_release_fixed_params *fixed; 3911 u32 pdev_id; 3912 int ret; 3913 3914 switch (tag) { 3915 case WMI_TAG_DMA_BUF_RELEASE: 3916 fixed = ptr; 3917 arg->fixed = *fixed; 3918 pdev_id = DP_HW2SW_MACID(le32_to_cpu(fixed->pdev_id)); 3919 arg->fixed.pdev_id = cpu_to_le32(pdev_id); 3920 break; 3921 case WMI_TAG_ARRAY_STRUCT: 3922 if (!arg->buf_entry_done) { 3923 arg->num_buf_entry = 0; 3924 arg->buf_entry = ptr; 3925 3926 ret = ath12k_wmi_tlv_iter(ab, ptr, len, 3927 ath12k_wmi_dma_buf_entry_parse, 3928 arg); 3929 if (ret) { 3930 ath12k_warn(ab, "failed to parse dma buf entry tlv %d\n", 3931 ret); 3932 return ret; 3933 } 3934 3935 arg->buf_entry_done = true; 3936 } else if (!arg->meta_data_done) { 3937 arg->num_meta = 0; 3938 arg->meta_data = ptr; 3939 3940 ret = ath12k_wmi_tlv_iter(ab, ptr, len, 3941 ath12k_wmi_dma_buf_meta_parse, 3942 arg); 3943 if (ret) { 3944 ath12k_warn(ab, "failed to parse dma buf meta tlv %d\n", 3945 ret); 3946 return ret; 3947 } 3948 3949 arg->meta_data_done = true; 3950 } 3951 break; 3952 default: 3953 break; 3954 } 3955 return 0; 3956 } 3957 3958 static void ath12k_wmi_pdev_dma_ring_buf_release_event(struct ath12k_base *ab, 3959 struct sk_buff *skb) 3960 { 3961 struct ath12k_wmi_dma_buf_release_arg arg = {}; 3962 struct ath12k_dbring_buf_release_event param; 3963 int ret; 3964 3965 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 3966 ath12k_wmi_dma_buf_parse, 3967 &arg); 3968 if (ret) { 3969 ath12k_warn(ab, "failed to parse dma buf release tlv %d\n", ret); 3970 return; 3971 } 3972 3973 param.fixed = arg.fixed; 3974 param.buf_entry = arg.buf_entry; 3975 param.num_buf_entry = arg.num_buf_entry; 3976 param.meta_data = arg.meta_data; 3977 param.num_meta = arg.num_meta; 3978 3979 ret = ath12k_dbring_buffer_release_event(ab, ¶m); 3980 if (ret) { 3981 ath12k_warn(ab, "failed to handle dma buf release event %d\n", ret); 3982 return; 3983 } 3984 } 3985 3986 static int ath12k_wmi_hw_mode_caps_parse(struct ath12k_base *soc, 3987 u16 tag, u16 len, 3988 const void *ptr, void *data) 3989 { 3990 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data; 3991 struct ath12k_wmi_hw_mode_cap_params *hw_mode_cap; 3992 u32 phy_map = 0; 3993 3994 if (tag != WMI_TAG_HW_MODE_CAPABILITIES) 3995 return -EPROTO; 3996 3997 if (svc_rdy_ext->n_hw_mode_caps >= svc_rdy_ext->arg.num_hw_modes) 3998 return -ENOBUFS; 3999 4000 hw_mode_cap = container_of(ptr, struct ath12k_wmi_hw_mode_cap_params, 4001 hw_mode_id); 4002 svc_rdy_ext->n_hw_mode_caps++; 4003 4004 phy_map = le32_to_cpu(hw_mode_cap->phy_id_map); 4005 svc_rdy_ext->tot_phy_id += fls(phy_map); 4006 4007 return 0; 4008 } 4009 4010 static int ath12k_wmi_hw_mode_caps(struct ath12k_base *soc, 4011 u16 len, const void *ptr, void *data) 4012 { 4013 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data; 4014 const struct ath12k_wmi_hw_mode_cap_params *hw_mode_caps; 4015 enum wmi_host_hw_mode_config_type mode, pref; 4016 u32 i; 4017 int ret; 4018 4019 svc_rdy_ext->n_hw_mode_caps = 0; 4020 svc_rdy_ext->hw_mode_caps = ptr; 4021 4022 ret = ath12k_wmi_tlv_iter(soc, ptr, len, 4023 ath12k_wmi_hw_mode_caps_parse, 4024 svc_rdy_ext); 4025 if (ret) { 4026 ath12k_warn(soc, "failed to parse tlv %d\n", ret); 4027 return ret; 4028 } 4029 4030 for (i = 0 ; i < svc_rdy_ext->n_hw_mode_caps; i++) { 4031 hw_mode_caps = &svc_rdy_ext->hw_mode_caps[i]; 4032 mode = le32_to_cpu(hw_mode_caps->hw_mode_id); 4033 4034 if (mode >= WMI_HOST_HW_MODE_MAX) 4035 continue; 4036 4037 pref = soc->wmi_ab.preferred_hw_mode; 4038 4039 if (ath12k_hw_mode_pri_map[mode] < ath12k_hw_mode_pri_map[pref]) { 4040 svc_rdy_ext->pref_hw_mode_caps = *hw_mode_caps; 4041 soc->wmi_ab.preferred_hw_mode = mode; 4042 } 4043 } 4044 4045 ath12k_dbg(soc, ATH12K_DBG_WMI, "preferred_hw_mode:%d\n", 4046 soc->wmi_ab.preferred_hw_mode); 4047 if (soc->wmi_ab.preferred_hw_mode == WMI_HOST_HW_MODE_MAX) 4048 return -EINVAL; 4049 4050 return 0; 4051 } 4052 4053 static int ath12k_wmi_mac_phy_caps_parse(struct ath12k_base *soc, 4054 u16 tag, u16 len, 4055 const void *ptr, void *data) 4056 { 4057 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data; 4058 4059 if (tag != WMI_TAG_MAC_PHY_CAPABILITIES) 4060 return -EPROTO; 4061 4062 if (svc_rdy_ext->n_mac_phy_caps >= svc_rdy_ext->tot_phy_id) 4063 return -ENOBUFS; 4064 4065 len = min_t(u16, len, sizeof(struct ath12k_wmi_mac_phy_caps_params)); 4066 if (!svc_rdy_ext->n_mac_phy_caps) { 4067 svc_rdy_ext->mac_phy_caps = kzalloc((svc_rdy_ext->tot_phy_id) * len, 4068 GFP_ATOMIC); 4069 if (!svc_rdy_ext->mac_phy_caps) 4070 return -ENOMEM; 4071 } 4072 4073 memcpy(svc_rdy_ext->mac_phy_caps + svc_rdy_ext->n_mac_phy_caps, ptr, len); 4074 svc_rdy_ext->n_mac_phy_caps++; 4075 return 0; 4076 } 4077 4078 static int ath12k_wmi_ext_hal_reg_caps_parse(struct ath12k_base *soc, 4079 u16 tag, u16 len, 4080 const void *ptr, void *data) 4081 { 4082 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data; 4083 4084 if (tag != WMI_TAG_HAL_REG_CAPABILITIES_EXT) 4085 return -EPROTO; 4086 4087 if (svc_rdy_ext->n_ext_hal_reg_caps >= svc_rdy_ext->arg.num_phy) 4088 return -ENOBUFS; 4089 4090 svc_rdy_ext->n_ext_hal_reg_caps++; 4091 return 0; 4092 } 4093 4094 static int ath12k_wmi_ext_hal_reg_caps(struct ath12k_base *soc, 4095 u16 len, const void *ptr, void *data) 4096 { 4097 struct ath12k_wmi_pdev *wmi_handle = &soc->wmi_ab.wmi[0]; 4098 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data; 4099 struct ath12k_wmi_hal_reg_capabilities_ext_arg reg_cap; 4100 int ret; 4101 u32 i; 4102 4103 svc_rdy_ext->n_ext_hal_reg_caps = 0; 4104 svc_rdy_ext->ext_hal_reg_caps = ptr; 4105 ret = ath12k_wmi_tlv_iter(soc, ptr, len, 4106 ath12k_wmi_ext_hal_reg_caps_parse, 4107 svc_rdy_ext); 4108 if (ret) { 4109 ath12k_warn(soc, "failed to parse tlv %d\n", ret); 4110 return ret; 4111 } 4112 4113 for (i = 0; i < svc_rdy_ext->arg.num_phy; i++) { 4114 ret = ath12k_pull_reg_cap_svc_rdy_ext(wmi_handle, 4115 svc_rdy_ext->soc_hal_reg_caps, 4116 svc_rdy_ext->ext_hal_reg_caps, i, 4117 ®_cap); 4118 if (ret) { 4119 ath12k_warn(soc, "failed to extract reg cap %d\n", i); 4120 return ret; 4121 } 4122 4123 if (reg_cap.phy_id >= MAX_RADIOS) { 4124 ath12k_warn(soc, "unexpected phy id %u\n", reg_cap.phy_id); 4125 return -EINVAL; 4126 } 4127 4128 soc->hal_reg_cap[reg_cap.phy_id] = reg_cap; 4129 } 4130 return 0; 4131 } 4132 4133 static int ath12k_wmi_ext_soc_hal_reg_caps_parse(struct ath12k_base *soc, 4134 u16 len, const void *ptr, 4135 void *data) 4136 { 4137 struct ath12k_wmi_pdev *wmi_handle = &soc->wmi_ab.wmi[0]; 4138 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data; 4139 u8 hw_mode_id = le32_to_cpu(svc_rdy_ext->pref_hw_mode_caps.hw_mode_id); 4140 u32 phy_id_map; 4141 int pdev_index = 0; 4142 int ret; 4143 4144 svc_rdy_ext->soc_hal_reg_caps = ptr; 4145 svc_rdy_ext->arg.num_phy = le32_to_cpu(svc_rdy_ext->soc_hal_reg_caps->num_phy); 4146 4147 soc->num_radios = 0; 4148 phy_id_map = le32_to_cpu(svc_rdy_ext->pref_hw_mode_caps.phy_id_map); 4149 soc->fw_pdev_count = 0; 4150 4151 while (phy_id_map && soc->num_radios < MAX_RADIOS) { 4152 ret = ath12k_pull_mac_phy_cap_svc_ready_ext(wmi_handle, 4153 svc_rdy_ext, 4154 hw_mode_id, soc->num_radios, 4155 &soc->pdevs[pdev_index]); 4156 if (ret) { 4157 ath12k_warn(soc, "failed to extract mac caps, idx :%d\n", 4158 soc->num_radios); 4159 return ret; 4160 } 4161 4162 soc->num_radios++; 4163 4164 /* For single_pdev_only targets, 4165 * save mac_phy capability in the same pdev 4166 */ 4167 if (soc->hw_params->single_pdev_only) 4168 pdev_index = 0; 4169 else 4170 pdev_index = soc->num_radios; 4171 4172 /* TODO: mac_phy_cap prints */ 4173 phy_id_map >>= 1; 4174 } 4175 4176 if (soc->hw_params->single_pdev_only) { 4177 soc->num_radios = 1; 4178 soc->pdevs[0].pdev_id = 0; 4179 } 4180 4181 return 0; 4182 } 4183 4184 static int ath12k_wmi_dma_ring_caps_parse(struct ath12k_base *soc, 4185 u16 tag, u16 len, 4186 const void *ptr, void *data) 4187 { 4188 struct ath12k_wmi_dma_ring_caps_parse *parse = data; 4189 4190 if (tag != WMI_TAG_DMA_RING_CAPABILITIES) 4191 return -EPROTO; 4192 4193 parse->n_dma_ring_caps++; 4194 return 0; 4195 } 4196 4197 static int ath12k_wmi_alloc_dbring_caps(struct ath12k_base *ab, 4198 u32 num_cap) 4199 { 4200 size_t sz; 4201 void *ptr; 4202 4203 sz = num_cap * sizeof(struct ath12k_dbring_cap); 4204 ptr = kzalloc(sz, GFP_ATOMIC); 4205 if (!ptr) 4206 return -ENOMEM; 4207 4208 ab->db_caps = ptr; 4209 ab->num_db_cap = num_cap; 4210 4211 return 0; 4212 } 4213 4214 static void ath12k_wmi_free_dbring_caps(struct ath12k_base *ab) 4215 { 4216 kfree(ab->db_caps); 4217 ab->db_caps = NULL; 4218 ab->num_db_cap = 0; 4219 } 4220 4221 static int ath12k_wmi_dma_ring_caps(struct ath12k_base *ab, 4222 u16 len, const void *ptr, void *data) 4223 { 4224 struct ath12k_wmi_dma_ring_caps_parse *dma_caps_parse = data; 4225 struct ath12k_wmi_dma_ring_caps_params *dma_caps; 4226 struct ath12k_dbring_cap *dir_buff_caps; 4227 int ret; 4228 u32 i; 4229 4230 dma_caps_parse->n_dma_ring_caps = 0; 4231 dma_caps = (struct ath12k_wmi_dma_ring_caps_params *)ptr; 4232 ret = ath12k_wmi_tlv_iter(ab, ptr, len, 4233 ath12k_wmi_dma_ring_caps_parse, 4234 dma_caps_parse); 4235 if (ret) { 4236 ath12k_warn(ab, "failed to parse dma ring caps tlv %d\n", ret); 4237 return ret; 4238 } 4239 4240 if (!dma_caps_parse->n_dma_ring_caps) 4241 return 0; 4242 4243 if (ab->num_db_cap) { 4244 ath12k_warn(ab, "Already processed, so ignoring dma ring caps\n"); 4245 return 0; 4246 } 4247 4248 ret = ath12k_wmi_alloc_dbring_caps(ab, dma_caps_parse->n_dma_ring_caps); 4249 if (ret) 4250 return ret; 4251 4252 dir_buff_caps = ab->db_caps; 4253 for (i = 0; i < dma_caps_parse->n_dma_ring_caps; i++) { 4254 if (le32_to_cpu(dma_caps[i].module_id) >= WMI_DIRECT_BUF_MAX) { 4255 ath12k_warn(ab, "Invalid module id %d\n", 4256 le32_to_cpu(dma_caps[i].module_id)); 4257 ret = -EINVAL; 4258 goto free_dir_buff; 4259 } 4260 4261 dir_buff_caps[i].id = le32_to_cpu(dma_caps[i].module_id); 4262 dir_buff_caps[i].pdev_id = 4263 DP_HW2SW_MACID(le32_to_cpu(dma_caps[i].pdev_id)); 4264 dir_buff_caps[i].min_elem = le32_to_cpu(dma_caps[i].min_elem); 4265 dir_buff_caps[i].min_buf_sz = le32_to_cpu(dma_caps[i].min_buf_sz); 4266 dir_buff_caps[i].min_buf_align = le32_to_cpu(dma_caps[i].min_buf_align); 4267 } 4268 4269 return 0; 4270 4271 free_dir_buff: 4272 ath12k_wmi_free_dbring_caps(ab); 4273 return ret; 4274 } 4275 4276 static int ath12k_wmi_svc_rdy_ext_parse(struct ath12k_base *ab, 4277 u16 tag, u16 len, 4278 const void *ptr, void *data) 4279 { 4280 struct ath12k_wmi_pdev *wmi_handle = &ab->wmi_ab.wmi[0]; 4281 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data; 4282 int ret; 4283 4284 switch (tag) { 4285 case WMI_TAG_SERVICE_READY_EXT_EVENT: 4286 ret = ath12k_pull_svc_ready_ext(wmi_handle, ptr, 4287 &svc_rdy_ext->arg); 4288 if (ret) { 4289 ath12k_warn(ab, "unable to extract ext params\n"); 4290 return ret; 4291 } 4292 break; 4293 4294 case WMI_TAG_SOC_MAC_PHY_HW_MODE_CAPS: 4295 svc_rdy_ext->hw_caps = ptr; 4296 svc_rdy_ext->arg.num_hw_modes = 4297 le32_to_cpu(svc_rdy_ext->hw_caps->num_hw_modes); 4298 break; 4299 4300 case WMI_TAG_SOC_HAL_REG_CAPABILITIES: 4301 ret = ath12k_wmi_ext_soc_hal_reg_caps_parse(ab, len, ptr, 4302 svc_rdy_ext); 4303 if (ret) 4304 return ret; 4305 break; 4306 4307 case WMI_TAG_ARRAY_STRUCT: 4308 if (!svc_rdy_ext->hw_mode_done) { 4309 ret = ath12k_wmi_hw_mode_caps(ab, len, ptr, svc_rdy_ext); 4310 if (ret) 4311 return ret; 4312 4313 svc_rdy_ext->hw_mode_done = true; 4314 } else if (!svc_rdy_ext->mac_phy_done) { 4315 svc_rdy_ext->n_mac_phy_caps = 0; 4316 ret = ath12k_wmi_tlv_iter(ab, ptr, len, 4317 ath12k_wmi_mac_phy_caps_parse, 4318 svc_rdy_ext); 4319 if (ret) { 4320 ath12k_warn(ab, "failed to parse tlv %d\n", ret); 4321 return ret; 4322 } 4323 4324 svc_rdy_ext->mac_phy_done = true; 4325 } else if (!svc_rdy_ext->ext_hal_reg_done) { 4326 ret = ath12k_wmi_ext_hal_reg_caps(ab, len, ptr, svc_rdy_ext); 4327 if (ret) 4328 return ret; 4329 4330 svc_rdy_ext->ext_hal_reg_done = true; 4331 } else if (!svc_rdy_ext->mac_phy_chainmask_combo_done) { 4332 svc_rdy_ext->mac_phy_chainmask_combo_done = true; 4333 } else if (!svc_rdy_ext->mac_phy_chainmask_cap_done) { 4334 svc_rdy_ext->mac_phy_chainmask_cap_done = true; 4335 } else if (!svc_rdy_ext->oem_dma_ring_cap_done) { 4336 svc_rdy_ext->oem_dma_ring_cap_done = true; 4337 } else if (!svc_rdy_ext->dma_ring_cap_done) { 4338 ret = ath12k_wmi_dma_ring_caps(ab, len, ptr, 4339 &svc_rdy_ext->dma_caps_parse); 4340 if (ret) 4341 return ret; 4342 4343 svc_rdy_ext->dma_ring_cap_done = true; 4344 } 4345 break; 4346 4347 default: 4348 break; 4349 } 4350 return 0; 4351 } 4352 4353 static int ath12k_service_ready_ext_event(struct ath12k_base *ab, 4354 struct sk_buff *skb) 4355 { 4356 struct ath12k_wmi_svc_rdy_ext_parse svc_rdy_ext = { }; 4357 int ret; 4358 4359 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 4360 ath12k_wmi_svc_rdy_ext_parse, 4361 &svc_rdy_ext); 4362 if (ret) { 4363 ath12k_warn(ab, "failed to parse tlv %d\n", ret); 4364 goto err; 4365 } 4366 4367 if (!test_bit(WMI_TLV_SERVICE_EXT2_MSG, ab->wmi_ab.svc_map)) 4368 complete(&ab->wmi_ab.service_ready); 4369 4370 kfree(svc_rdy_ext.mac_phy_caps); 4371 return 0; 4372 4373 err: 4374 ath12k_wmi_free_dbring_caps(ab); 4375 return ret; 4376 } 4377 4378 static int ath12k_pull_svc_ready_ext2(struct ath12k_wmi_pdev *wmi_handle, 4379 const void *ptr, 4380 struct ath12k_wmi_svc_rdy_ext2_arg *arg) 4381 { 4382 const struct wmi_service_ready_ext2_event *ev = ptr; 4383 4384 if (!ev) 4385 return -EINVAL; 4386 4387 arg->reg_db_version = le32_to_cpu(ev->reg_db_version); 4388 arg->hw_min_max_tx_power_2ghz = le32_to_cpu(ev->hw_min_max_tx_power_2ghz); 4389 arg->hw_min_max_tx_power_5ghz = le32_to_cpu(ev->hw_min_max_tx_power_5ghz); 4390 arg->chwidth_num_peer_caps = le32_to_cpu(ev->chwidth_num_peer_caps); 4391 arg->preamble_puncture_bw = le32_to_cpu(ev->preamble_puncture_bw); 4392 arg->max_user_per_ppdu_ofdma = le32_to_cpu(ev->max_user_per_ppdu_ofdma); 4393 arg->max_user_per_ppdu_mumimo = le32_to_cpu(ev->max_user_per_ppdu_mumimo); 4394 arg->target_cap_flags = le32_to_cpu(ev->target_cap_flags); 4395 return 0; 4396 } 4397 4398 static void ath12k_wmi_eht_caps_parse(struct ath12k_pdev *pdev, u32 band, 4399 const __le32 cap_mac_info[], 4400 const __le32 cap_phy_info[], 4401 const __le32 supp_mcs[], 4402 const struct ath12k_wmi_ppe_threshold_params *ppet, 4403 __le32 cap_info_internal) 4404 { 4405 struct ath12k_band_cap *cap_band = &pdev->cap.band[band]; 4406 u32 support_320mhz; 4407 u8 i; 4408 4409 if (band == NL80211_BAND_6GHZ) 4410 support_320mhz = cap_band->eht_cap_phy_info[0] & 4411 IEEE80211_EHT_PHY_CAP0_320MHZ_IN_6GHZ; 4412 4413 for (i = 0; i < WMI_MAX_EHTCAP_MAC_SIZE; i++) 4414 cap_band->eht_cap_mac_info[i] = le32_to_cpu(cap_mac_info[i]); 4415 4416 for (i = 0; i < WMI_MAX_EHTCAP_PHY_SIZE; i++) 4417 cap_band->eht_cap_phy_info[i] = le32_to_cpu(cap_phy_info[i]); 4418 4419 if (band == NL80211_BAND_6GHZ) 4420 cap_band->eht_cap_phy_info[0] |= support_320mhz; 4421 4422 cap_band->eht_mcs_20_only = le32_to_cpu(supp_mcs[0]); 4423 cap_band->eht_mcs_80 = le32_to_cpu(supp_mcs[1]); 4424 if (band != NL80211_BAND_2GHZ) { 4425 cap_band->eht_mcs_160 = le32_to_cpu(supp_mcs[2]); 4426 cap_band->eht_mcs_320 = le32_to_cpu(supp_mcs[3]); 4427 } 4428 4429 cap_band->eht_ppet.numss_m1 = le32_to_cpu(ppet->numss_m1); 4430 cap_band->eht_ppet.ru_bit_mask = le32_to_cpu(ppet->ru_info); 4431 for (i = 0; i < WMI_MAX_NUM_SS; i++) 4432 cap_band->eht_ppet.ppet16_ppet8_ru3_ru0[i] = 4433 le32_to_cpu(ppet->ppet16_ppet8_ru3_ru0[i]); 4434 4435 cap_band->eht_cap_info_internal = le32_to_cpu(cap_info_internal); 4436 } 4437 4438 static int 4439 ath12k_wmi_tlv_mac_phy_caps_ext_parse(struct ath12k_base *ab, 4440 const struct ath12k_wmi_caps_ext_params *caps, 4441 struct ath12k_pdev *pdev) 4442 { 4443 struct ath12k_band_cap *cap_band; 4444 u32 bands, support_320mhz; 4445 int i; 4446 4447 if (ab->hw_params->single_pdev_only) { 4448 if (caps->hw_mode_id == WMI_HOST_HW_MODE_SINGLE) { 4449 support_320mhz = le32_to_cpu(caps->eht_cap_phy_info_5ghz[0]) & 4450 IEEE80211_EHT_PHY_CAP0_320MHZ_IN_6GHZ; 4451 cap_band = &pdev->cap.band[NL80211_BAND_6GHZ]; 4452 cap_band->eht_cap_phy_info[0] |= support_320mhz; 4453 return 0; 4454 } 4455 4456 for (i = 0; i < ab->fw_pdev_count; i++) { 4457 struct ath12k_fw_pdev *fw_pdev = &ab->fw_pdev[i]; 4458 4459 if (fw_pdev->pdev_id == ath12k_wmi_caps_ext_get_pdev_id(caps) && 4460 fw_pdev->phy_id == le32_to_cpu(caps->phy_id)) { 4461 bands = fw_pdev->supported_bands; 4462 break; 4463 } 4464 } 4465 4466 if (i == ab->fw_pdev_count) 4467 return -EINVAL; 4468 } else { 4469 bands = pdev->cap.supported_bands; 4470 } 4471 4472 if (bands & WMI_HOST_WLAN_2G_CAP) { 4473 ath12k_wmi_eht_caps_parse(pdev, NL80211_BAND_2GHZ, 4474 caps->eht_cap_mac_info_2ghz, 4475 caps->eht_cap_phy_info_2ghz, 4476 caps->eht_supp_mcs_ext_2ghz, 4477 &caps->eht_ppet_2ghz, 4478 caps->eht_cap_info_internal); 4479 } 4480 4481 if (bands & WMI_HOST_WLAN_5G_CAP) { 4482 ath12k_wmi_eht_caps_parse(pdev, NL80211_BAND_5GHZ, 4483 caps->eht_cap_mac_info_5ghz, 4484 caps->eht_cap_phy_info_5ghz, 4485 caps->eht_supp_mcs_ext_5ghz, 4486 &caps->eht_ppet_5ghz, 4487 caps->eht_cap_info_internal); 4488 4489 ath12k_wmi_eht_caps_parse(pdev, NL80211_BAND_6GHZ, 4490 caps->eht_cap_mac_info_5ghz, 4491 caps->eht_cap_phy_info_5ghz, 4492 caps->eht_supp_mcs_ext_5ghz, 4493 &caps->eht_ppet_5ghz, 4494 caps->eht_cap_info_internal); 4495 } 4496 4497 return 0; 4498 } 4499 4500 static int ath12k_wmi_tlv_mac_phy_caps_ext(struct ath12k_base *ab, u16 tag, 4501 u16 len, const void *ptr, 4502 void *data) 4503 { 4504 const struct ath12k_wmi_caps_ext_params *caps = ptr; 4505 int i = 0, ret; 4506 4507 if (tag != WMI_TAG_MAC_PHY_CAPABILITIES_EXT) 4508 return -EPROTO; 4509 4510 if (ab->hw_params->single_pdev_only) { 4511 if (ab->wmi_ab.preferred_hw_mode != le32_to_cpu(caps->hw_mode_id) && 4512 caps->hw_mode_id != WMI_HOST_HW_MODE_SINGLE) 4513 return 0; 4514 } else { 4515 for (i = 0; i < ab->num_radios; i++) { 4516 if (ab->pdevs[i].pdev_id == 4517 ath12k_wmi_caps_ext_get_pdev_id(caps)) 4518 break; 4519 } 4520 4521 if (i == ab->num_radios) 4522 return -EINVAL; 4523 } 4524 4525 ret = ath12k_wmi_tlv_mac_phy_caps_ext_parse(ab, caps, &ab->pdevs[i]); 4526 if (ret) { 4527 ath12k_warn(ab, 4528 "failed to parse extended MAC PHY capabilities for pdev %d: %d\n", 4529 ret, ab->pdevs[i].pdev_id); 4530 return ret; 4531 } 4532 4533 return 0; 4534 } 4535 4536 static int ath12k_wmi_svc_rdy_ext2_parse(struct ath12k_base *ab, 4537 u16 tag, u16 len, 4538 const void *ptr, void *data) 4539 { 4540 struct ath12k_wmi_pdev *wmi_handle = &ab->wmi_ab.wmi[0]; 4541 struct ath12k_wmi_svc_rdy_ext2_parse *parse = data; 4542 int ret; 4543 4544 switch (tag) { 4545 case WMI_TAG_SERVICE_READY_EXT2_EVENT: 4546 ret = ath12k_pull_svc_ready_ext2(wmi_handle, ptr, 4547 &parse->arg); 4548 if (ret) { 4549 ath12k_warn(ab, 4550 "failed to extract wmi service ready ext2 parameters: %d\n", 4551 ret); 4552 return ret; 4553 } 4554 break; 4555 4556 case WMI_TAG_ARRAY_STRUCT: 4557 if (!parse->dma_ring_cap_done) { 4558 ret = ath12k_wmi_dma_ring_caps(ab, len, ptr, 4559 &parse->dma_caps_parse); 4560 if (ret) 4561 return ret; 4562 4563 parse->dma_ring_cap_done = true; 4564 } else if (!parse->spectral_bin_scaling_done) { 4565 /* TODO: This is a place-holder as WMI tag for 4566 * spectral scaling is before 4567 * WMI_TAG_MAC_PHY_CAPABILITIES_EXT 4568 */ 4569 parse->spectral_bin_scaling_done = true; 4570 } else if (!parse->mac_phy_caps_ext_done) { 4571 ret = ath12k_wmi_tlv_iter(ab, ptr, len, 4572 ath12k_wmi_tlv_mac_phy_caps_ext, 4573 parse); 4574 if (ret) { 4575 ath12k_warn(ab, "failed to parse extended MAC PHY capabilities WMI TLV: %d\n", 4576 ret); 4577 return ret; 4578 } 4579 4580 parse->mac_phy_caps_ext_done = true; 4581 } 4582 break; 4583 default: 4584 break; 4585 } 4586 4587 return 0; 4588 } 4589 4590 static int ath12k_service_ready_ext2_event(struct ath12k_base *ab, 4591 struct sk_buff *skb) 4592 { 4593 struct ath12k_wmi_svc_rdy_ext2_parse svc_rdy_ext2 = { }; 4594 int ret; 4595 4596 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 4597 ath12k_wmi_svc_rdy_ext2_parse, 4598 &svc_rdy_ext2); 4599 if (ret) { 4600 ath12k_warn(ab, "failed to parse ext2 event tlv %d\n", ret); 4601 goto err; 4602 } 4603 4604 complete(&ab->wmi_ab.service_ready); 4605 4606 return 0; 4607 4608 err: 4609 ath12k_wmi_free_dbring_caps(ab); 4610 return ret; 4611 } 4612 4613 static int ath12k_pull_vdev_start_resp_tlv(struct ath12k_base *ab, struct sk_buff *skb, 4614 struct wmi_vdev_start_resp_event *vdev_rsp) 4615 { 4616 const void **tb; 4617 const struct wmi_vdev_start_resp_event *ev; 4618 int ret; 4619 4620 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 4621 if (IS_ERR(tb)) { 4622 ret = PTR_ERR(tb); 4623 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 4624 return ret; 4625 } 4626 4627 ev = tb[WMI_TAG_VDEV_START_RESPONSE_EVENT]; 4628 if (!ev) { 4629 ath12k_warn(ab, "failed to fetch vdev start resp ev"); 4630 kfree(tb); 4631 return -EPROTO; 4632 } 4633 4634 *vdev_rsp = *ev; 4635 4636 kfree(tb); 4637 return 0; 4638 } 4639 4640 static struct ath12k_reg_rule 4641 *create_ext_reg_rules_from_wmi(u32 num_reg_rules, 4642 struct ath12k_wmi_reg_rule_ext_params *wmi_reg_rule) 4643 { 4644 struct ath12k_reg_rule *reg_rule_ptr; 4645 u32 count; 4646 4647 reg_rule_ptr = kzalloc((num_reg_rules * sizeof(*reg_rule_ptr)), 4648 GFP_ATOMIC); 4649 4650 if (!reg_rule_ptr) 4651 return NULL; 4652 4653 for (count = 0; count < num_reg_rules; count++) { 4654 reg_rule_ptr[count].start_freq = 4655 le32_get_bits(wmi_reg_rule[count].freq_info, 4656 REG_RULE_START_FREQ); 4657 reg_rule_ptr[count].end_freq = 4658 le32_get_bits(wmi_reg_rule[count].freq_info, 4659 REG_RULE_END_FREQ); 4660 reg_rule_ptr[count].max_bw = 4661 le32_get_bits(wmi_reg_rule[count].bw_pwr_info, 4662 REG_RULE_MAX_BW); 4663 reg_rule_ptr[count].reg_power = 4664 le32_get_bits(wmi_reg_rule[count].bw_pwr_info, 4665 REG_RULE_REG_PWR); 4666 reg_rule_ptr[count].ant_gain = 4667 le32_get_bits(wmi_reg_rule[count].bw_pwr_info, 4668 REG_RULE_ANT_GAIN); 4669 reg_rule_ptr[count].flags = 4670 le32_get_bits(wmi_reg_rule[count].flag_info, 4671 REG_RULE_FLAGS); 4672 reg_rule_ptr[count].psd_flag = 4673 le32_get_bits(wmi_reg_rule[count].psd_power_info, 4674 REG_RULE_PSD_INFO); 4675 reg_rule_ptr[count].psd_eirp = 4676 le32_get_bits(wmi_reg_rule[count].psd_power_info, 4677 REG_RULE_PSD_EIRP); 4678 } 4679 4680 return reg_rule_ptr; 4681 } 4682 4683 static int ath12k_pull_reg_chan_list_ext_update_ev(struct ath12k_base *ab, 4684 struct sk_buff *skb, 4685 struct ath12k_reg_info *reg_info) 4686 { 4687 const void **tb; 4688 const struct wmi_reg_chan_list_cc_ext_event *ev; 4689 struct ath12k_wmi_reg_rule_ext_params *ext_wmi_reg_rule; 4690 u32 num_2g_reg_rules, num_5g_reg_rules; 4691 u32 num_6g_reg_rules_ap[WMI_REG_CURRENT_MAX_AP_TYPE]; 4692 u32 num_6g_reg_rules_cl[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE]; 4693 u32 total_reg_rules = 0; 4694 int ret, i, j; 4695 4696 ath12k_dbg(ab, ATH12K_DBG_WMI, "processing regulatory ext channel list\n"); 4697 4698 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 4699 if (IS_ERR(tb)) { 4700 ret = PTR_ERR(tb); 4701 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 4702 return ret; 4703 } 4704 4705 ev = tb[WMI_TAG_REG_CHAN_LIST_CC_EXT_EVENT]; 4706 if (!ev) { 4707 ath12k_warn(ab, "failed to fetch reg chan list ext update ev\n"); 4708 kfree(tb); 4709 return -EPROTO; 4710 } 4711 4712 reg_info->num_2g_reg_rules = le32_to_cpu(ev->num_2g_reg_rules); 4713 reg_info->num_5g_reg_rules = le32_to_cpu(ev->num_5g_reg_rules); 4714 reg_info->num_6g_reg_rules_ap[WMI_REG_INDOOR_AP] = 4715 le32_to_cpu(ev->num_6g_reg_rules_ap_lpi); 4716 reg_info->num_6g_reg_rules_ap[WMI_REG_STD_POWER_AP] = 4717 le32_to_cpu(ev->num_6g_reg_rules_ap_sp); 4718 reg_info->num_6g_reg_rules_ap[WMI_REG_VLP_AP] = 4719 le32_to_cpu(ev->num_6g_reg_rules_ap_vlp); 4720 4721 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) { 4722 reg_info->num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i] = 4723 le32_to_cpu(ev->num_6g_reg_rules_cl_lpi[i]); 4724 reg_info->num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i] = 4725 le32_to_cpu(ev->num_6g_reg_rules_cl_sp[i]); 4726 reg_info->num_6g_reg_rules_cl[WMI_REG_VLP_AP][i] = 4727 le32_to_cpu(ev->num_6g_reg_rules_cl_vlp[i]); 4728 } 4729 4730 num_2g_reg_rules = reg_info->num_2g_reg_rules; 4731 total_reg_rules += num_2g_reg_rules; 4732 num_5g_reg_rules = reg_info->num_5g_reg_rules; 4733 total_reg_rules += num_5g_reg_rules; 4734 4735 if (num_2g_reg_rules > MAX_REG_RULES || num_5g_reg_rules > MAX_REG_RULES) { 4736 ath12k_warn(ab, "Num reg rules for 2G/5G exceeds max limit (num_2g_reg_rules: %d num_5g_reg_rules: %d max_rules: %d)\n", 4737 num_2g_reg_rules, num_5g_reg_rules, MAX_REG_RULES); 4738 kfree(tb); 4739 return -EINVAL; 4740 } 4741 4742 for (i = 0; i < WMI_REG_CURRENT_MAX_AP_TYPE; i++) { 4743 num_6g_reg_rules_ap[i] = reg_info->num_6g_reg_rules_ap[i]; 4744 4745 if (num_6g_reg_rules_ap[i] > MAX_6G_REG_RULES) { 4746 ath12k_warn(ab, "Num 6G reg rules for AP mode(%d) exceeds max limit (num_6g_reg_rules_ap: %d, max_rules: %d)\n", 4747 i, num_6g_reg_rules_ap[i], MAX_6G_REG_RULES); 4748 kfree(tb); 4749 return -EINVAL; 4750 } 4751 4752 total_reg_rules += num_6g_reg_rules_ap[i]; 4753 } 4754 4755 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) { 4756 num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i] = 4757 reg_info->num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i]; 4758 total_reg_rules += num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i]; 4759 4760 num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i] = 4761 reg_info->num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i]; 4762 total_reg_rules += num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i]; 4763 4764 num_6g_reg_rules_cl[WMI_REG_VLP_AP][i] = 4765 reg_info->num_6g_reg_rules_cl[WMI_REG_VLP_AP][i]; 4766 total_reg_rules += num_6g_reg_rules_cl[WMI_REG_VLP_AP][i]; 4767 4768 if (num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i] > MAX_6G_REG_RULES || 4769 num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i] > MAX_6G_REG_RULES || 4770 num_6g_reg_rules_cl[WMI_REG_VLP_AP][i] > MAX_6G_REG_RULES) { 4771 ath12k_warn(ab, "Num 6g client reg rules exceeds max limit, for client(type: %d)\n", 4772 i); 4773 kfree(tb); 4774 return -EINVAL; 4775 } 4776 } 4777 4778 if (!total_reg_rules) { 4779 ath12k_warn(ab, "No reg rules available\n"); 4780 kfree(tb); 4781 return -EINVAL; 4782 } 4783 4784 memcpy(reg_info->alpha2, &ev->alpha2, REG_ALPHA2_LEN); 4785 4786 /* FIXME: Currently FW includes 6G reg rule also in 5G rule 4787 * list for country US. 4788 * Having same 6G reg rule in 5G and 6G rules list causes 4789 * intersect check to be true, and same rules will be shown 4790 * multiple times in iw cmd. So added hack below to avoid 4791 * parsing 6G rule from 5G reg rule list, and this can be 4792 * removed later, after FW updates to remove 6G reg rule 4793 * from 5G rules list. 4794 */ 4795 if (memcmp(reg_info->alpha2, "US", 2) == 0) { 4796 reg_info->num_5g_reg_rules = REG_US_5G_NUM_REG_RULES; 4797 num_5g_reg_rules = reg_info->num_5g_reg_rules; 4798 } 4799 4800 reg_info->dfs_region = le32_to_cpu(ev->dfs_region); 4801 reg_info->phybitmap = le32_to_cpu(ev->phybitmap); 4802 reg_info->num_phy = le32_to_cpu(ev->num_phy); 4803 reg_info->phy_id = le32_to_cpu(ev->phy_id); 4804 reg_info->ctry_code = le32_to_cpu(ev->country_id); 4805 reg_info->reg_dmn_pair = le32_to_cpu(ev->domain_code); 4806 4807 switch (le32_to_cpu(ev->status_code)) { 4808 case WMI_REG_SET_CC_STATUS_PASS: 4809 reg_info->status_code = REG_SET_CC_STATUS_PASS; 4810 break; 4811 case WMI_REG_CURRENT_ALPHA2_NOT_FOUND: 4812 reg_info->status_code = REG_CURRENT_ALPHA2_NOT_FOUND; 4813 break; 4814 case WMI_REG_INIT_ALPHA2_NOT_FOUND: 4815 reg_info->status_code = REG_INIT_ALPHA2_NOT_FOUND; 4816 break; 4817 case WMI_REG_SET_CC_CHANGE_NOT_ALLOWED: 4818 reg_info->status_code = REG_SET_CC_CHANGE_NOT_ALLOWED; 4819 break; 4820 case WMI_REG_SET_CC_STATUS_NO_MEMORY: 4821 reg_info->status_code = REG_SET_CC_STATUS_NO_MEMORY; 4822 break; 4823 case WMI_REG_SET_CC_STATUS_FAIL: 4824 reg_info->status_code = REG_SET_CC_STATUS_FAIL; 4825 break; 4826 } 4827 4828 reg_info->is_ext_reg_event = true; 4829 4830 reg_info->min_bw_2g = le32_to_cpu(ev->min_bw_2g); 4831 reg_info->max_bw_2g = le32_to_cpu(ev->max_bw_2g); 4832 reg_info->min_bw_5g = le32_to_cpu(ev->min_bw_5g); 4833 reg_info->max_bw_5g = le32_to_cpu(ev->max_bw_5g); 4834 reg_info->min_bw_6g_ap[WMI_REG_INDOOR_AP] = le32_to_cpu(ev->min_bw_6g_ap_lpi); 4835 reg_info->max_bw_6g_ap[WMI_REG_INDOOR_AP] = le32_to_cpu(ev->max_bw_6g_ap_lpi); 4836 reg_info->min_bw_6g_ap[WMI_REG_STD_POWER_AP] = le32_to_cpu(ev->min_bw_6g_ap_sp); 4837 reg_info->max_bw_6g_ap[WMI_REG_STD_POWER_AP] = le32_to_cpu(ev->max_bw_6g_ap_sp); 4838 reg_info->min_bw_6g_ap[WMI_REG_VLP_AP] = le32_to_cpu(ev->min_bw_6g_ap_vlp); 4839 reg_info->max_bw_6g_ap[WMI_REG_VLP_AP] = le32_to_cpu(ev->max_bw_6g_ap_vlp); 4840 4841 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) { 4842 reg_info->min_bw_6g_client[WMI_REG_INDOOR_AP][i] = 4843 le32_to_cpu(ev->min_bw_6g_client_lpi[i]); 4844 reg_info->max_bw_6g_client[WMI_REG_INDOOR_AP][i] = 4845 le32_to_cpu(ev->max_bw_6g_client_lpi[i]); 4846 reg_info->min_bw_6g_client[WMI_REG_STD_POWER_AP][i] = 4847 le32_to_cpu(ev->min_bw_6g_client_sp[i]); 4848 reg_info->max_bw_6g_client[WMI_REG_STD_POWER_AP][i] = 4849 le32_to_cpu(ev->max_bw_6g_client_sp[i]); 4850 reg_info->min_bw_6g_client[WMI_REG_VLP_AP][i] = 4851 le32_to_cpu(ev->min_bw_6g_client_vlp[i]); 4852 reg_info->max_bw_6g_client[WMI_REG_VLP_AP][i] = 4853 le32_to_cpu(ev->max_bw_6g_client_vlp[i]); 4854 } 4855 4856 ath12k_dbg(ab, ATH12K_DBG_WMI, 4857 "%s:cc_ext %s dfs %d BW: min_2g %d max_2g %d min_5g %d max_5g %d phy_bitmap 0x%x", 4858 __func__, reg_info->alpha2, reg_info->dfs_region, 4859 reg_info->min_bw_2g, reg_info->max_bw_2g, 4860 reg_info->min_bw_5g, reg_info->max_bw_5g, 4861 reg_info->phybitmap); 4862 4863 ath12k_dbg(ab, ATH12K_DBG_WMI, 4864 "num_2g_reg_rules %d num_5g_reg_rules %d", 4865 num_2g_reg_rules, num_5g_reg_rules); 4866 4867 ath12k_dbg(ab, ATH12K_DBG_WMI, 4868 "num_6g_reg_rules_ap_lpi: %d num_6g_reg_rules_ap_sp: %d num_6g_reg_rules_ap_vlp: %d", 4869 num_6g_reg_rules_ap[WMI_REG_INDOOR_AP], 4870 num_6g_reg_rules_ap[WMI_REG_STD_POWER_AP], 4871 num_6g_reg_rules_ap[WMI_REG_VLP_AP]); 4872 4873 ath12k_dbg(ab, ATH12K_DBG_WMI, 4874 "6g Regular client: num_6g_reg_rules_lpi: %d num_6g_reg_rules_sp: %d num_6g_reg_rules_vlp: %d", 4875 num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][WMI_REG_DEFAULT_CLIENT], 4876 num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][WMI_REG_DEFAULT_CLIENT], 4877 num_6g_reg_rules_cl[WMI_REG_VLP_AP][WMI_REG_DEFAULT_CLIENT]); 4878 4879 ath12k_dbg(ab, ATH12K_DBG_WMI, 4880 "6g Subordinate client: num_6g_reg_rules_lpi: %d num_6g_reg_rules_sp: %d num_6g_reg_rules_vlp: %d", 4881 num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][WMI_REG_SUBORDINATE_CLIENT], 4882 num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][WMI_REG_SUBORDINATE_CLIENT], 4883 num_6g_reg_rules_cl[WMI_REG_VLP_AP][WMI_REG_SUBORDINATE_CLIENT]); 4884 4885 ext_wmi_reg_rule = 4886 (struct ath12k_wmi_reg_rule_ext_params *)((u8 *)ev 4887 + sizeof(*ev) 4888 + sizeof(struct wmi_tlv)); 4889 4890 if (num_2g_reg_rules) { 4891 reg_info->reg_rules_2g_ptr = 4892 create_ext_reg_rules_from_wmi(num_2g_reg_rules, 4893 ext_wmi_reg_rule); 4894 4895 if (!reg_info->reg_rules_2g_ptr) { 4896 kfree(tb); 4897 ath12k_warn(ab, "Unable to Allocate memory for 2g rules\n"); 4898 return -ENOMEM; 4899 } 4900 } 4901 4902 if (num_5g_reg_rules) { 4903 ext_wmi_reg_rule += num_2g_reg_rules; 4904 reg_info->reg_rules_5g_ptr = 4905 create_ext_reg_rules_from_wmi(num_5g_reg_rules, 4906 ext_wmi_reg_rule); 4907 4908 if (!reg_info->reg_rules_5g_ptr) { 4909 kfree(tb); 4910 ath12k_warn(ab, "Unable to Allocate memory for 5g rules\n"); 4911 return -ENOMEM; 4912 } 4913 } 4914 4915 ext_wmi_reg_rule += num_5g_reg_rules; 4916 4917 for (i = 0; i < WMI_REG_CURRENT_MAX_AP_TYPE; i++) { 4918 reg_info->reg_rules_6g_ap_ptr[i] = 4919 create_ext_reg_rules_from_wmi(num_6g_reg_rules_ap[i], 4920 ext_wmi_reg_rule); 4921 4922 if (!reg_info->reg_rules_6g_ap_ptr[i]) { 4923 kfree(tb); 4924 ath12k_warn(ab, "Unable to Allocate memory for 6g ap rules\n"); 4925 return -ENOMEM; 4926 } 4927 4928 ext_wmi_reg_rule += num_6g_reg_rules_ap[i]; 4929 } 4930 4931 for (j = 0; j < WMI_REG_CURRENT_MAX_AP_TYPE; j++) { 4932 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) { 4933 reg_info->reg_rules_6g_client_ptr[j][i] = 4934 create_ext_reg_rules_from_wmi(num_6g_reg_rules_cl[j][i], 4935 ext_wmi_reg_rule); 4936 4937 if (!reg_info->reg_rules_6g_client_ptr[j][i]) { 4938 kfree(tb); 4939 ath12k_warn(ab, "Unable to Allocate memory for 6g client rules\n"); 4940 return -ENOMEM; 4941 } 4942 4943 ext_wmi_reg_rule += num_6g_reg_rules_cl[j][i]; 4944 } 4945 } 4946 4947 reg_info->client_type = le32_to_cpu(ev->client_type); 4948 reg_info->rnr_tpe_usable = ev->rnr_tpe_usable; 4949 reg_info->unspecified_ap_usable = ev->unspecified_ap_usable; 4950 reg_info->domain_code_6g_ap[WMI_REG_INDOOR_AP] = 4951 le32_to_cpu(ev->domain_code_6g_ap_lpi); 4952 reg_info->domain_code_6g_ap[WMI_REG_STD_POWER_AP] = 4953 le32_to_cpu(ev->domain_code_6g_ap_sp); 4954 reg_info->domain_code_6g_ap[WMI_REG_VLP_AP] = 4955 le32_to_cpu(ev->domain_code_6g_ap_vlp); 4956 4957 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) { 4958 reg_info->domain_code_6g_client[WMI_REG_INDOOR_AP][i] = 4959 le32_to_cpu(ev->domain_code_6g_client_lpi[i]); 4960 reg_info->domain_code_6g_client[WMI_REG_STD_POWER_AP][i] = 4961 le32_to_cpu(ev->domain_code_6g_client_sp[i]); 4962 reg_info->domain_code_6g_client[WMI_REG_VLP_AP][i] = 4963 le32_to_cpu(ev->domain_code_6g_client_vlp[i]); 4964 } 4965 4966 reg_info->domain_code_6g_super_id = le32_to_cpu(ev->domain_code_6g_super_id); 4967 4968 ath12k_dbg(ab, ATH12K_DBG_WMI, "6g client_type: %d domain_code_6g_super_id: %d", 4969 reg_info->client_type, reg_info->domain_code_6g_super_id); 4970 4971 ath12k_dbg(ab, ATH12K_DBG_WMI, "processed regulatory ext channel list\n"); 4972 4973 kfree(tb); 4974 return 0; 4975 } 4976 4977 static int ath12k_pull_peer_del_resp_ev(struct ath12k_base *ab, struct sk_buff *skb, 4978 struct wmi_peer_delete_resp_event *peer_del_resp) 4979 { 4980 const void **tb; 4981 const struct wmi_peer_delete_resp_event *ev; 4982 int ret; 4983 4984 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 4985 if (IS_ERR(tb)) { 4986 ret = PTR_ERR(tb); 4987 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 4988 return ret; 4989 } 4990 4991 ev = tb[WMI_TAG_PEER_DELETE_RESP_EVENT]; 4992 if (!ev) { 4993 ath12k_warn(ab, "failed to fetch peer delete resp ev"); 4994 kfree(tb); 4995 return -EPROTO; 4996 } 4997 4998 memset(peer_del_resp, 0, sizeof(*peer_del_resp)); 4999 5000 peer_del_resp->vdev_id = ev->vdev_id; 5001 ether_addr_copy(peer_del_resp->peer_macaddr.addr, 5002 ev->peer_macaddr.addr); 5003 5004 kfree(tb); 5005 return 0; 5006 } 5007 5008 static int ath12k_pull_vdev_del_resp_ev(struct ath12k_base *ab, 5009 struct sk_buff *skb, 5010 u32 *vdev_id) 5011 { 5012 const void **tb; 5013 const struct wmi_vdev_delete_resp_event *ev; 5014 int ret; 5015 5016 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 5017 if (IS_ERR(tb)) { 5018 ret = PTR_ERR(tb); 5019 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5020 return ret; 5021 } 5022 5023 ev = tb[WMI_TAG_VDEV_DELETE_RESP_EVENT]; 5024 if (!ev) { 5025 ath12k_warn(ab, "failed to fetch vdev delete resp ev"); 5026 kfree(tb); 5027 return -EPROTO; 5028 } 5029 5030 *vdev_id = le32_to_cpu(ev->vdev_id); 5031 5032 kfree(tb); 5033 return 0; 5034 } 5035 5036 static int ath12k_pull_bcn_tx_status_ev(struct ath12k_base *ab, 5037 struct sk_buff *skb, 5038 u32 *vdev_id, u32 *tx_status) 5039 { 5040 const void **tb; 5041 const struct wmi_bcn_tx_status_event *ev; 5042 int ret; 5043 5044 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 5045 if (IS_ERR(tb)) { 5046 ret = PTR_ERR(tb); 5047 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5048 return ret; 5049 } 5050 5051 ev = tb[WMI_TAG_OFFLOAD_BCN_TX_STATUS_EVENT]; 5052 if (!ev) { 5053 ath12k_warn(ab, "failed to fetch bcn tx status ev"); 5054 kfree(tb); 5055 return -EPROTO; 5056 } 5057 5058 *vdev_id = le32_to_cpu(ev->vdev_id); 5059 *tx_status = le32_to_cpu(ev->tx_status); 5060 5061 kfree(tb); 5062 return 0; 5063 } 5064 5065 static int ath12k_pull_vdev_stopped_param_tlv(struct ath12k_base *ab, struct sk_buff *skb, 5066 u32 *vdev_id) 5067 { 5068 const void **tb; 5069 const struct wmi_vdev_stopped_event *ev; 5070 int ret; 5071 5072 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 5073 if (IS_ERR(tb)) { 5074 ret = PTR_ERR(tb); 5075 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5076 return ret; 5077 } 5078 5079 ev = tb[WMI_TAG_VDEV_STOPPED_EVENT]; 5080 if (!ev) { 5081 ath12k_warn(ab, "failed to fetch vdev stop ev"); 5082 kfree(tb); 5083 return -EPROTO; 5084 } 5085 5086 *vdev_id = le32_to_cpu(ev->vdev_id); 5087 5088 kfree(tb); 5089 return 0; 5090 } 5091 5092 static int ath12k_wmi_tlv_mgmt_rx_parse(struct ath12k_base *ab, 5093 u16 tag, u16 len, 5094 const void *ptr, void *data) 5095 { 5096 struct wmi_tlv_mgmt_rx_parse *parse = data; 5097 5098 switch (tag) { 5099 case WMI_TAG_MGMT_RX_HDR: 5100 parse->fixed = ptr; 5101 break; 5102 case WMI_TAG_ARRAY_BYTE: 5103 if (!parse->frame_buf_done) { 5104 parse->frame_buf = ptr; 5105 parse->frame_buf_done = true; 5106 } 5107 break; 5108 } 5109 return 0; 5110 } 5111 5112 static int ath12k_pull_mgmt_rx_params_tlv(struct ath12k_base *ab, 5113 struct sk_buff *skb, 5114 struct ath12k_wmi_mgmt_rx_arg *hdr) 5115 { 5116 struct wmi_tlv_mgmt_rx_parse parse = { }; 5117 const struct ath12k_wmi_mgmt_rx_params *ev; 5118 const u8 *frame; 5119 int i, ret; 5120 5121 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 5122 ath12k_wmi_tlv_mgmt_rx_parse, 5123 &parse); 5124 if (ret) { 5125 ath12k_warn(ab, "failed to parse mgmt rx tlv %d\n", ret); 5126 return ret; 5127 } 5128 5129 ev = parse.fixed; 5130 frame = parse.frame_buf; 5131 5132 if (!ev || !frame) { 5133 ath12k_warn(ab, "failed to fetch mgmt rx hdr"); 5134 return -EPROTO; 5135 } 5136 5137 hdr->pdev_id = le32_to_cpu(ev->pdev_id); 5138 hdr->chan_freq = le32_to_cpu(ev->chan_freq); 5139 hdr->channel = le32_to_cpu(ev->channel); 5140 hdr->snr = le32_to_cpu(ev->snr); 5141 hdr->rate = le32_to_cpu(ev->rate); 5142 hdr->phy_mode = le32_to_cpu(ev->phy_mode); 5143 hdr->buf_len = le32_to_cpu(ev->buf_len); 5144 hdr->status = le32_to_cpu(ev->status); 5145 hdr->flags = le32_to_cpu(ev->flags); 5146 hdr->rssi = a_sle32_to_cpu(ev->rssi); 5147 hdr->tsf_delta = le32_to_cpu(ev->tsf_delta); 5148 5149 for (i = 0; i < ATH_MAX_ANTENNA; i++) 5150 hdr->rssi_ctl[i] = le32_to_cpu(ev->rssi_ctl[i]); 5151 5152 if (skb->len < (frame - skb->data) + hdr->buf_len) { 5153 ath12k_warn(ab, "invalid length in mgmt rx hdr ev"); 5154 return -EPROTO; 5155 } 5156 5157 /* shift the sk_buff to point to `frame` */ 5158 skb_trim(skb, 0); 5159 skb_put(skb, frame - skb->data); 5160 skb_pull(skb, frame - skb->data); 5161 skb_put(skb, hdr->buf_len); 5162 5163 return 0; 5164 } 5165 5166 static int wmi_process_mgmt_tx_comp(struct ath12k *ar, u32 desc_id, 5167 u32 status) 5168 { 5169 struct sk_buff *msdu; 5170 struct ieee80211_tx_info *info; 5171 struct ath12k_skb_cb *skb_cb; 5172 int num_mgmt; 5173 5174 spin_lock_bh(&ar->txmgmt_idr_lock); 5175 msdu = idr_find(&ar->txmgmt_idr, desc_id); 5176 5177 if (!msdu) { 5178 ath12k_warn(ar->ab, "received mgmt tx compl for invalid msdu_id: %d\n", 5179 desc_id); 5180 spin_unlock_bh(&ar->txmgmt_idr_lock); 5181 return -ENOENT; 5182 } 5183 5184 idr_remove(&ar->txmgmt_idr, desc_id); 5185 spin_unlock_bh(&ar->txmgmt_idr_lock); 5186 5187 skb_cb = ATH12K_SKB_CB(msdu); 5188 dma_unmap_single(ar->ab->dev, skb_cb->paddr, msdu->len, DMA_TO_DEVICE); 5189 5190 info = IEEE80211_SKB_CB(msdu); 5191 if ((!(info->flags & IEEE80211_TX_CTL_NO_ACK)) && !status) 5192 info->flags |= IEEE80211_TX_STAT_ACK; 5193 5194 ieee80211_tx_status_irqsafe(ath12k_ar_to_hw(ar), msdu); 5195 5196 num_mgmt = atomic_dec_if_positive(&ar->num_pending_mgmt_tx); 5197 5198 /* WARN when we received this event without doing any mgmt tx */ 5199 if (num_mgmt < 0) 5200 WARN_ON_ONCE(1); 5201 5202 if (!num_mgmt) 5203 wake_up(&ar->txmgmt_empty_waitq); 5204 5205 return 0; 5206 } 5207 5208 static int ath12k_pull_mgmt_tx_compl_param_tlv(struct ath12k_base *ab, 5209 struct sk_buff *skb, 5210 struct wmi_mgmt_tx_compl_event *param) 5211 { 5212 const void **tb; 5213 const struct wmi_mgmt_tx_compl_event *ev; 5214 int ret; 5215 5216 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 5217 if (IS_ERR(tb)) { 5218 ret = PTR_ERR(tb); 5219 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5220 return ret; 5221 } 5222 5223 ev = tb[WMI_TAG_MGMT_TX_COMPL_EVENT]; 5224 if (!ev) { 5225 ath12k_warn(ab, "failed to fetch mgmt tx compl ev"); 5226 kfree(tb); 5227 return -EPROTO; 5228 } 5229 5230 param->pdev_id = ev->pdev_id; 5231 param->desc_id = ev->desc_id; 5232 param->status = ev->status; 5233 5234 kfree(tb); 5235 return 0; 5236 } 5237 5238 static void ath12k_wmi_event_scan_started(struct ath12k *ar) 5239 { 5240 lockdep_assert_held(&ar->data_lock); 5241 5242 switch (ar->scan.state) { 5243 case ATH12K_SCAN_IDLE: 5244 case ATH12K_SCAN_RUNNING: 5245 case ATH12K_SCAN_ABORTING: 5246 ath12k_warn(ar->ab, "received scan started event in an invalid scan state: %s (%d)\n", 5247 ath12k_scan_state_str(ar->scan.state), 5248 ar->scan.state); 5249 break; 5250 case ATH12K_SCAN_STARTING: 5251 ar->scan.state = ATH12K_SCAN_RUNNING; 5252 5253 if (ar->scan.is_roc) 5254 ieee80211_ready_on_channel(ath12k_ar_to_hw(ar)); 5255 5256 complete(&ar->scan.started); 5257 break; 5258 } 5259 } 5260 5261 static void ath12k_wmi_event_scan_start_failed(struct ath12k *ar) 5262 { 5263 lockdep_assert_held(&ar->data_lock); 5264 5265 switch (ar->scan.state) { 5266 case ATH12K_SCAN_IDLE: 5267 case ATH12K_SCAN_RUNNING: 5268 case ATH12K_SCAN_ABORTING: 5269 ath12k_warn(ar->ab, "received scan start failed event in an invalid scan state: %s (%d)\n", 5270 ath12k_scan_state_str(ar->scan.state), 5271 ar->scan.state); 5272 break; 5273 case ATH12K_SCAN_STARTING: 5274 complete(&ar->scan.started); 5275 __ath12k_mac_scan_finish(ar); 5276 break; 5277 } 5278 } 5279 5280 static void ath12k_wmi_event_scan_completed(struct ath12k *ar) 5281 { 5282 lockdep_assert_held(&ar->data_lock); 5283 5284 switch (ar->scan.state) { 5285 case ATH12K_SCAN_IDLE: 5286 case ATH12K_SCAN_STARTING: 5287 /* One suspected reason scan can be completed while starting is 5288 * if firmware fails to deliver all scan events to the host, 5289 * e.g. when transport pipe is full. This has been observed 5290 * with spectral scan phyerr events starving wmi transport 5291 * pipe. In such case the "scan completed" event should be (and 5292 * is) ignored by the host as it may be just firmware's scan 5293 * state machine recovering. 5294 */ 5295 ath12k_warn(ar->ab, "received scan completed event in an invalid scan state: %s (%d)\n", 5296 ath12k_scan_state_str(ar->scan.state), 5297 ar->scan.state); 5298 break; 5299 case ATH12K_SCAN_RUNNING: 5300 case ATH12K_SCAN_ABORTING: 5301 __ath12k_mac_scan_finish(ar); 5302 break; 5303 } 5304 } 5305 5306 static void ath12k_wmi_event_scan_bss_chan(struct ath12k *ar) 5307 { 5308 lockdep_assert_held(&ar->data_lock); 5309 5310 switch (ar->scan.state) { 5311 case ATH12K_SCAN_IDLE: 5312 case ATH12K_SCAN_STARTING: 5313 ath12k_warn(ar->ab, "received scan bss chan event in an invalid scan state: %s (%d)\n", 5314 ath12k_scan_state_str(ar->scan.state), 5315 ar->scan.state); 5316 break; 5317 case ATH12K_SCAN_RUNNING: 5318 case ATH12K_SCAN_ABORTING: 5319 ar->scan_channel = NULL; 5320 break; 5321 } 5322 } 5323 5324 static void ath12k_wmi_event_scan_foreign_chan(struct ath12k *ar, u32 freq) 5325 { 5326 struct ieee80211_hw *hw = ath12k_ar_to_hw(ar); 5327 5328 lockdep_assert_held(&ar->data_lock); 5329 5330 switch (ar->scan.state) { 5331 case ATH12K_SCAN_IDLE: 5332 case ATH12K_SCAN_STARTING: 5333 ath12k_warn(ar->ab, "received scan foreign chan event in an invalid scan state: %s (%d)\n", 5334 ath12k_scan_state_str(ar->scan.state), 5335 ar->scan.state); 5336 break; 5337 case ATH12K_SCAN_RUNNING: 5338 case ATH12K_SCAN_ABORTING: 5339 ar->scan_channel = ieee80211_get_channel(hw->wiphy, freq); 5340 5341 if (ar->scan.is_roc && ar->scan.roc_freq == freq) 5342 complete(&ar->scan.on_channel); 5343 5344 break; 5345 } 5346 } 5347 5348 static const char * 5349 ath12k_wmi_event_scan_type_str(enum wmi_scan_event_type type, 5350 enum wmi_scan_completion_reason reason) 5351 { 5352 switch (type) { 5353 case WMI_SCAN_EVENT_STARTED: 5354 return "started"; 5355 case WMI_SCAN_EVENT_COMPLETED: 5356 switch (reason) { 5357 case WMI_SCAN_REASON_COMPLETED: 5358 return "completed"; 5359 case WMI_SCAN_REASON_CANCELLED: 5360 return "completed [cancelled]"; 5361 case WMI_SCAN_REASON_PREEMPTED: 5362 return "completed [preempted]"; 5363 case WMI_SCAN_REASON_TIMEDOUT: 5364 return "completed [timedout]"; 5365 case WMI_SCAN_REASON_INTERNAL_FAILURE: 5366 return "completed [internal err]"; 5367 case WMI_SCAN_REASON_MAX: 5368 break; 5369 } 5370 return "completed [unknown]"; 5371 case WMI_SCAN_EVENT_BSS_CHANNEL: 5372 return "bss channel"; 5373 case WMI_SCAN_EVENT_FOREIGN_CHAN: 5374 return "foreign channel"; 5375 case WMI_SCAN_EVENT_DEQUEUED: 5376 return "dequeued"; 5377 case WMI_SCAN_EVENT_PREEMPTED: 5378 return "preempted"; 5379 case WMI_SCAN_EVENT_START_FAILED: 5380 return "start failed"; 5381 case WMI_SCAN_EVENT_RESTARTED: 5382 return "restarted"; 5383 case WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT: 5384 return "foreign channel exit"; 5385 default: 5386 return "unknown"; 5387 } 5388 } 5389 5390 static int ath12k_pull_scan_ev(struct ath12k_base *ab, struct sk_buff *skb, 5391 struct wmi_scan_event *scan_evt_param) 5392 { 5393 const void **tb; 5394 const struct wmi_scan_event *ev; 5395 int ret; 5396 5397 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 5398 if (IS_ERR(tb)) { 5399 ret = PTR_ERR(tb); 5400 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5401 return ret; 5402 } 5403 5404 ev = tb[WMI_TAG_SCAN_EVENT]; 5405 if (!ev) { 5406 ath12k_warn(ab, "failed to fetch scan ev"); 5407 kfree(tb); 5408 return -EPROTO; 5409 } 5410 5411 scan_evt_param->event_type = ev->event_type; 5412 scan_evt_param->reason = ev->reason; 5413 scan_evt_param->channel_freq = ev->channel_freq; 5414 scan_evt_param->scan_req_id = ev->scan_req_id; 5415 scan_evt_param->scan_id = ev->scan_id; 5416 scan_evt_param->vdev_id = ev->vdev_id; 5417 scan_evt_param->tsf_timestamp = ev->tsf_timestamp; 5418 5419 kfree(tb); 5420 return 0; 5421 } 5422 5423 static int ath12k_pull_peer_sta_kickout_ev(struct ath12k_base *ab, struct sk_buff *skb, 5424 struct wmi_peer_sta_kickout_arg *arg) 5425 { 5426 const void **tb; 5427 const struct wmi_peer_sta_kickout_event *ev; 5428 int ret; 5429 5430 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 5431 if (IS_ERR(tb)) { 5432 ret = PTR_ERR(tb); 5433 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5434 return ret; 5435 } 5436 5437 ev = tb[WMI_TAG_PEER_STA_KICKOUT_EVENT]; 5438 if (!ev) { 5439 ath12k_warn(ab, "failed to fetch peer sta kickout ev"); 5440 kfree(tb); 5441 return -EPROTO; 5442 } 5443 5444 arg->mac_addr = ev->peer_macaddr.addr; 5445 5446 kfree(tb); 5447 return 0; 5448 } 5449 5450 static int ath12k_pull_roam_ev(struct ath12k_base *ab, struct sk_buff *skb, 5451 struct wmi_roam_event *roam_ev) 5452 { 5453 const void **tb; 5454 const struct wmi_roam_event *ev; 5455 int ret; 5456 5457 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 5458 if (IS_ERR(tb)) { 5459 ret = PTR_ERR(tb); 5460 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5461 return ret; 5462 } 5463 5464 ev = tb[WMI_TAG_ROAM_EVENT]; 5465 if (!ev) { 5466 ath12k_warn(ab, "failed to fetch roam ev"); 5467 kfree(tb); 5468 return -EPROTO; 5469 } 5470 5471 roam_ev->vdev_id = ev->vdev_id; 5472 roam_ev->reason = ev->reason; 5473 roam_ev->rssi = ev->rssi; 5474 5475 kfree(tb); 5476 return 0; 5477 } 5478 5479 static int freq_to_idx(struct ath12k *ar, int freq) 5480 { 5481 struct ieee80211_supported_band *sband; 5482 struct ieee80211_hw *hw = ath12k_ar_to_hw(ar); 5483 int band, ch, idx = 0; 5484 5485 for (band = NL80211_BAND_2GHZ; band < NUM_NL80211_BANDS; band++) { 5486 if (!ar->mac.sbands[band].channels) 5487 continue; 5488 5489 sband = hw->wiphy->bands[band]; 5490 if (!sband) 5491 continue; 5492 5493 for (ch = 0; ch < sband->n_channels; ch++, idx++) 5494 if (sband->channels[ch].center_freq == freq) 5495 goto exit; 5496 } 5497 5498 exit: 5499 return idx; 5500 } 5501 5502 static int ath12k_pull_chan_info_ev(struct ath12k_base *ab, struct sk_buff *skb, 5503 struct wmi_chan_info_event *ch_info_ev) 5504 { 5505 const void **tb; 5506 const struct wmi_chan_info_event *ev; 5507 int ret; 5508 5509 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 5510 if (IS_ERR(tb)) { 5511 ret = PTR_ERR(tb); 5512 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5513 return ret; 5514 } 5515 5516 ev = tb[WMI_TAG_CHAN_INFO_EVENT]; 5517 if (!ev) { 5518 ath12k_warn(ab, "failed to fetch chan info ev"); 5519 kfree(tb); 5520 return -EPROTO; 5521 } 5522 5523 ch_info_ev->err_code = ev->err_code; 5524 ch_info_ev->freq = ev->freq; 5525 ch_info_ev->cmd_flags = ev->cmd_flags; 5526 ch_info_ev->noise_floor = ev->noise_floor; 5527 ch_info_ev->rx_clear_count = ev->rx_clear_count; 5528 ch_info_ev->cycle_count = ev->cycle_count; 5529 ch_info_ev->chan_tx_pwr_range = ev->chan_tx_pwr_range; 5530 ch_info_ev->chan_tx_pwr_tp = ev->chan_tx_pwr_tp; 5531 ch_info_ev->rx_frame_count = ev->rx_frame_count; 5532 ch_info_ev->tx_frame_cnt = ev->tx_frame_cnt; 5533 ch_info_ev->mac_clk_mhz = ev->mac_clk_mhz; 5534 ch_info_ev->vdev_id = ev->vdev_id; 5535 5536 kfree(tb); 5537 return 0; 5538 } 5539 5540 static int 5541 ath12k_pull_pdev_bss_chan_info_ev(struct ath12k_base *ab, struct sk_buff *skb, 5542 struct wmi_pdev_bss_chan_info_event *bss_ch_info_ev) 5543 { 5544 const void **tb; 5545 const struct wmi_pdev_bss_chan_info_event *ev; 5546 int ret; 5547 5548 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 5549 if (IS_ERR(tb)) { 5550 ret = PTR_ERR(tb); 5551 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5552 return ret; 5553 } 5554 5555 ev = tb[WMI_TAG_PDEV_BSS_CHAN_INFO_EVENT]; 5556 if (!ev) { 5557 ath12k_warn(ab, "failed to fetch pdev bss chan info ev"); 5558 kfree(tb); 5559 return -EPROTO; 5560 } 5561 5562 bss_ch_info_ev->pdev_id = ev->pdev_id; 5563 bss_ch_info_ev->freq = ev->freq; 5564 bss_ch_info_ev->noise_floor = ev->noise_floor; 5565 bss_ch_info_ev->rx_clear_count_low = ev->rx_clear_count_low; 5566 bss_ch_info_ev->rx_clear_count_high = ev->rx_clear_count_high; 5567 bss_ch_info_ev->cycle_count_low = ev->cycle_count_low; 5568 bss_ch_info_ev->cycle_count_high = ev->cycle_count_high; 5569 bss_ch_info_ev->tx_cycle_count_low = ev->tx_cycle_count_low; 5570 bss_ch_info_ev->tx_cycle_count_high = ev->tx_cycle_count_high; 5571 bss_ch_info_ev->rx_cycle_count_low = ev->rx_cycle_count_low; 5572 bss_ch_info_ev->rx_cycle_count_high = ev->rx_cycle_count_high; 5573 bss_ch_info_ev->rx_bss_cycle_count_low = ev->rx_bss_cycle_count_low; 5574 bss_ch_info_ev->rx_bss_cycle_count_high = ev->rx_bss_cycle_count_high; 5575 5576 kfree(tb); 5577 return 0; 5578 } 5579 5580 static int 5581 ath12k_pull_vdev_install_key_compl_ev(struct ath12k_base *ab, struct sk_buff *skb, 5582 struct wmi_vdev_install_key_complete_arg *arg) 5583 { 5584 const void **tb; 5585 const struct wmi_vdev_install_key_compl_event *ev; 5586 int ret; 5587 5588 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 5589 if (IS_ERR(tb)) { 5590 ret = PTR_ERR(tb); 5591 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5592 return ret; 5593 } 5594 5595 ev = tb[WMI_TAG_VDEV_INSTALL_KEY_COMPLETE_EVENT]; 5596 if (!ev) { 5597 ath12k_warn(ab, "failed to fetch vdev install key compl ev"); 5598 kfree(tb); 5599 return -EPROTO; 5600 } 5601 5602 arg->vdev_id = le32_to_cpu(ev->vdev_id); 5603 arg->macaddr = ev->peer_macaddr.addr; 5604 arg->key_idx = le32_to_cpu(ev->key_idx); 5605 arg->key_flags = le32_to_cpu(ev->key_flags); 5606 arg->status = le32_to_cpu(ev->status); 5607 5608 kfree(tb); 5609 return 0; 5610 } 5611 5612 static int ath12k_pull_peer_assoc_conf_ev(struct ath12k_base *ab, struct sk_buff *skb, 5613 struct wmi_peer_assoc_conf_arg *peer_assoc_conf) 5614 { 5615 const void **tb; 5616 const struct wmi_peer_assoc_conf_event *ev; 5617 int ret; 5618 5619 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 5620 if (IS_ERR(tb)) { 5621 ret = PTR_ERR(tb); 5622 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5623 return ret; 5624 } 5625 5626 ev = tb[WMI_TAG_PEER_ASSOC_CONF_EVENT]; 5627 if (!ev) { 5628 ath12k_warn(ab, "failed to fetch peer assoc conf ev"); 5629 kfree(tb); 5630 return -EPROTO; 5631 } 5632 5633 peer_assoc_conf->vdev_id = le32_to_cpu(ev->vdev_id); 5634 peer_assoc_conf->macaddr = ev->peer_macaddr.addr; 5635 5636 kfree(tb); 5637 return 0; 5638 } 5639 5640 static int 5641 ath12k_pull_pdev_temp_ev(struct ath12k_base *ab, struct sk_buff *skb, 5642 const struct wmi_pdev_temperature_event *ev) 5643 { 5644 const void **tb; 5645 int ret; 5646 5647 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 5648 if (IS_ERR(tb)) { 5649 ret = PTR_ERR(tb); 5650 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5651 return ret; 5652 } 5653 5654 ev = tb[WMI_TAG_PDEV_TEMPERATURE_EVENT]; 5655 if (!ev) { 5656 ath12k_warn(ab, "failed to fetch pdev temp ev"); 5657 kfree(tb); 5658 return -EPROTO; 5659 } 5660 5661 kfree(tb); 5662 return 0; 5663 } 5664 5665 static void ath12k_wmi_op_ep_tx_credits(struct ath12k_base *ab) 5666 { 5667 /* try to send pending beacons first. they take priority */ 5668 wake_up(&ab->wmi_ab.tx_credits_wq); 5669 } 5670 5671 static void ath12k_wmi_htc_tx_complete(struct ath12k_base *ab, 5672 struct sk_buff *skb) 5673 { 5674 dev_kfree_skb(skb); 5675 } 5676 5677 static bool ath12k_reg_is_world_alpha(char *alpha) 5678 { 5679 if (alpha[0] == '0' && alpha[1] == '0') 5680 return true; 5681 5682 if (alpha[0] == 'n' && alpha[1] == 'a') 5683 return true; 5684 5685 return false; 5686 } 5687 5688 static int ath12k_reg_chan_list_event(struct ath12k_base *ab, struct sk_buff *skb) 5689 { 5690 struct ath12k_reg_info *reg_info = NULL; 5691 struct ieee80211_regdomain *regd = NULL; 5692 bool intersect = false; 5693 int ret = 0, pdev_idx, i, j; 5694 struct ath12k *ar; 5695 5696 reg_info = kzalloc(sizeof(*reg_info), GFP_ATOMIC); 5697 if (!reg_info) { 5698 ret = -ENOMEM; 5699 goto fallback; 5700 } 5701 5702 ret = ath12k_pull_reg_chan_list_ext_update_ev(ab, skb, reg_info); 5703 5704 if (ret) { 5705 ath12k_warn(ab, "failed to extract regulatory info from received event\n"); 5706 goto fallback; 5707 } 5708 5709 if (reg_info->status_code != REG_SET_CC_STATUS_PASS) { 5710 /* In case of failure to set the requested ctry, 5711 * fw retains the current regd. We print a failure info 5712 * and return from here. 5713 */ 5714 ath12k_warn(ab, "Failed to set the requested Country regulatory setting\n"); 5715 goto mem_free; 5716 } 5717 5718 pdev_idx = reg_info->phy_id; 5719 5720 if (pdev_idx >= ab->num_radios) { 5721 /* Process the event for phy0 only if single_pdev_only 5722 * is true. If pdev_idx is valid but not 0, discard the 5723 * event. Otherwise, it goes to fallback. 5724 */ 5725 if (ab->hw_params->single_pdev_only && 5726 pdev_idx < ab->hw_params->num_rxdma_per_pdev) 5727 goto mem_free; 5728 else 5729 goto fallback; 5730 } 5731 5732 /* Avoid multiple overwrites to default regd, during core 5733 * stop-start after mac registration. 5734 */ 5735 if (ab->default_regd[pdev_idx] && !ab->new_regd[pdev_idx] && 5736 !memcmp(ab->default_regd[pdev_idx]->alpha2, 5737 reg_info->alpha2, 2)) 5738 goto mem_free; 5739 5740 /* Intersect new rules with default regd if a new country setting was 5741 * requested, i.e a default regd was already set during initialization 5742 * and the regd coming from this event has a valid country info. 5743 */ 5744 if (ab->default_regd[pdev_idx] && 5745 !ath12k_reg_is_world_alpha((char *) 5746 ab->default_regd[pdev_idx]->alpha2) && 5747 !ath12k_reg_is_world_alpha((char *)reg_info->alpha2)) 5748 intersect = true; 5749 5750 regd = ath12k_reg_build_regd(ab, reg_info, intersect); 5751 if (!regd) { 5752 ath12k_warn(ab, "failed to build regd from reg_info\n"); 5753 goto fallback; 5754 } 5755 5756 spin_lock(&ab->base_lock); 5757 if (test_bit(ATH12K_FLAG_REGISTERED, &ab->dev_flags)) { 5758 /* Once mac is registered, ar is valid and all CC events from 5759 * fw is considered to be received due to user requests 5760 * currently. 5761 * Free previously built regd before assigning the newly 5762 * generated regd to ar. NULL pointer handling will be 5763 * taken care by kfree itself. 5764 */ 5765 ar = ab->pdevs[pdev_idx].ar; 5766 kfree(ab->new_regd[pdev_idx]); 5767 ab->new_regd[pdev_idx] = regd; 5768 queue_work(ab->workqueue, &ar->regd_update_work); 5769 } else { 5770 /* Multiple events for the same *ar is not expected. But we 5771 * can still clear any previously stored default_regd if we 5772 * are receiving this event for the same radio by mistake. 5773 * NULL pointer handling will be taken care by kfree itself. 5774 */ 5775 kfree(ab->default_regd[pdev_idx]); 5776 /* This regd would be applied during mac registration */ 5777 ab->default_regd[pdev_idx] = regd; 5778 } 5779 ab->dfs_region = reg_info->dfs_region; 5780 spin_unlock(&ab->base_lock); 5781 5782 goto mem_free; 5783 5784 fallback: 5785 /* Fallback to older reg (by sending previous country setting 5786 * again if fw has succeeded and we failed to process here. 5787 * The Regdomain should be uniform across driver and fw. Since the 5788 * FW has processed the command and sent a success status, we expect 5789 * this function to succeed as well. If it doesn't, CTRY needs to be 5790 * reverted at the fw and the old SCAN_CHAN_LIST cmd needs to be sent. 5791 */ 5792 /* TODO: This is rare, but still should also be handled */ 5793 WARN_ON(1); 5794 mem_free: 5795 if (reg_info) { 5796 kfree(reg_info->reg_rules_2g_ptr); 5797 kfree(reg_info->reg_rules_5g_ptr); 5798 if (reg_info->is_ext_reg_event) { 5799 for (i = 0; i < WMI_REG_CURRENT_MAX_AP_TYPE; i++) 5800 kfree(reg_info->reg_rules_6g_ap_ptr[i]); 5801 5802 for (j = 0; j < WMI_REG_CURRENT_MAX_AP_TYPE; j++) 5803 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) 5804 kfree(reg_info->reg_rules_6g_client_ptr[j][i]); 5805 } 5806 kfree(reg_info); 5807 } 5808 return ret; 5809 } 5810 5811 static int ath12k_wmi_rdy_parse(struct ath12k_base *ab, u16 tag, u16 len, 5812 const void *ptr, void *data) 5813 { 5814 struct ath12k_wmi_rdy_parse *rdy_parse = data; 5815 struct wmi_ready_event fixed_param; 5816 struct ath12k_wmi_mac_addr_params *addr_list; 5817 struct ath12k_pdev *pdev; 5818 u32 num_mac_addr; 5819 int i; 5820 5821 switch (tag) { 5822 case WMI_TAG_READY_EVENT: 5823 memset(&fixed_param, 0, sizeof(fixed_param)); 5824 memcpy(&fixed_param, (struct wmi_ready_event *)ptr, 5825 min_t(u16, sizeof(fixed_param), len)); 5826 ab->wlan_init_status = le32_to_cpu(fixed_param.ready_event_min.status); 5827 rdy_parse->num_extra_mac_addr = 5828 le32_to_cpu(fixed_param.ready_event_min.num_extra_mac_addr); 5829 5830 ether_addr_copy(ab->mac_addr, 5831 fixed_param.ready_event_min.mac_addr.addr); 5832 ab->pktlog_defs_checksum = le32_to_cpu(fixed_param.pktlog_defs_checksum); 5833 ab->wmi_ready = true; 5834 break; 5835 case WMI_TAG_ARRAY_FIXED_STRUCT: 5836 addr_list = (struct ath12k_wmi_mac_addr_params *)ptr; 5837 num_mac_addr = rdy_parse->num_extra_mac_addr; 5838 5839 if (!(ab->num_radios > 1 && num_mac_addr >= ab->num_radios)) 5840 break; 5841 5842 for (i = 0; i < ab->num_radios; i++) { 5843 pdev = &ab->pdevs[i]; 5844 ether_addr_copy(pdev->mac_addr, addr_list[i].addr); 5845 } 5846 ab->pdevs_macaddr_valid = true; 5847 break; 5848 default: 5849 break; 5850 } 5851 5852 return 0; 5853 } 5854 5855 static int ath12k_ready_event(struct ath12k_base *ab, struct sk_buff *skb) 5856 { 5857 struct ath12k_wmi_rdy_parse rdy_parse = { }; 5858 int ret; 5859 5860 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 5861 ath12k_wmi_rdy_parse, &rdy_parse); 5862 if (ret) { 5863 ath12k_warn(ab, "failed to parse tlv %d\n", ret); 5864 return ret; 5865 } 5866 5867 complete(&ab->wmi_ab.unified_ready); 5868 return 0; 5869 } 5870 5871 static void ath12k_peer_delete_resp_event(struct ath12k_base *ab, struct sk_buff *skb) 5872 { 5873 struct wmi_peer_delete_resp_event peer_del_resp; 5874 struct ath12k *ar; 5875 5876 if (ath12k_pull_peer_del_resp_ev(ab, skb, &peer_del_resp) != 0) { 5877 ath12k_warn(ab, "failed to extract peer delete resp"); 5878 return; 5879 } 5880 5881 rcu_read_lock(); 5882 ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(peer_del_resp.vdev_id)); 5883 if (!ar) { 5884 ath12k_warn(ab, "invalid vdev id in peer delete resp ev %d", 5885 peer_del_resp.vdev_id); 5886 rcu_read_unlock(); 5887 return; 5888 } 5889 5890 complete(&ar->peer_delete_done); 5891 rcu_read_unlock(); 5892 ath12k_dbg(ab, ATH12K_DBG_WMI, "peer delete resp for vdev id %d addr %pM\n", 5893 peer_del_resp.vdev_id, peer_del_resp.peer_macaddr.addr); 5894 } 5895 5896 static void ath12k_vdev_delete_resp_event(struct ath12k_base *ab, 5897 struct sk_buff *skb) 5898 { 5899 struct ath12k *ar; 5900 u32 vdev_id = 0; 5901 5902 if (ath12k_pull_vdev_del_resp_ev(ab, skb, &vdev_id) != 0) { 5903 ath12k_warn(ab, "failed to extract vdev delete resp"); 5904 return; 5905 } 5906 5907 rcu_read_lock(); 5908 ar = ath12k_mac_get_ar_by_vdev_id(ab, vdev_id); 5909 if (!ar) { 5910 ath12k_warn(ab, "invalid vdev id in vdev delete resp ev %d", 5911 vdev_id); 5912 rcu_read_unlock(); 5913 return; 5914 } 5915 5916 complete(&ar->vdev_delete_done); 5917 5918 rcu_read_unlock(); 5919 5920 ath12k_dbg(ab, ATH12K_DBG_WMI, "vdev delete resp for vdev id %d\n", 5921 vdev_id); 5922 } 5923 5924 static const char *ath12k_wmi_vdev_resp_print(u32 vdev_resp_status) 5925 { 5926 switch (vdev_resp_status) { 5927 case WMI_VDEV_START_RESPONSE_INVALID_VDEVID: 5928 return "invalid vdev id"; 5929 case WMI_VDEV_START_RESPONSE_NOT_SUPPORTED: 5930 return "not supported"; 5931 case WMI_VDEV_START_RESPONSE_DFS_VIOLATION: 5932 return "dfs violation"; 5933 case WMI_VDEV_START_RESPONSE_INVALID_REGDOMAIN: 5934 return "invalid regdomain"; 5935 default: 5936 return "unknown"; 5937 } 5938 } 5939 5940 static void ath12k_vdev_start_resp_event(struct ath12k_base *ab, struct sk_buff *skb) 5941 { 5942 struct wmi_vdev_start_resp_event vdev_start_resp; 5943 struct ath12k *ar; 5944 u32 status; 5945 5946 if (ath12k_pull_vdev_start_resp_tlv(ab, skb, &vdev_start_resp) != 0) { 5947 ath12k_warn(ab, "failed to extract vdev start resp"); 5948 return; 5949 } 5950 5951 rcu_read_lock(); 5952 ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(vdev_start_resp.vdev_id)); 5953 if (!ar) { 5954 ath12k_warn(ab, "invalid vdev id in vdev start resp ev %d", 5955 vdev_start_resp.vdev_id); 5956 rcu_read_unlock(); 5957 return; 5958 } 5959 5960 ar->last_wmi_vdev_start_status = 0; 5961 5962 status = le32_to_cpu(vdev_start_resp.status); 5963 5964 if (WARN_ON_ONCE(status)) { 5965 ath12k_warn(ab, "vdev start resp error status %d (%s)\n", 5966 status, ath12k_wmi_vdev_resp_print(status)); 5967 ar->last_wmi_vdev_start_status = status; 5968 } 5969 5970 complete(&ar->vdev_setup_done); 5971 5972 rcu_read_unlock(); 5973 5974 ath12k_dbg(ab, ATH12K_DBG_WMI, "vdev start resp for vdev id %d", 5975 vdev_start_resp.vdev_id); 5976 } 5977 5978 static void ath12k_bcn_tx_status_event(struct ath12k_base *ab, struct sk_buff *skb) 5979 { 5980 u32 vdev_id, tx_status; 5981 5982 if (ath12k_pull_bcn_tx_status_ev(ab, skb, &vdev_id, &tx_status) != 0) { 5983 ath12k_warn(ab, "failed to extract bcn tx status"); 5984 return; 5985 } 5986 } 5987 5988 static void ath12k_vdev_stopped_event(struct ath12k_base *ab, struct sk_buff *skb) 5989 { 5990 struct ath12k *ar; 5991 u32 vdev_id = 0; 5992 5993 if (ath12k_pull_vdev_stopped_param_tlv(ab, skb, &vdev_id) != 0) { 5994 ath12k_warn(ab, "failed to extract vdev stopped event"); 5995 return; 5996 } 5997 5998 rcu_read_lock(); 5999 ar = ath12k_mac_get_ar_by_vdev_id(ab, vdev_id); 6000 if (!ar) { 6001 ath12k_warn(ab, "invalid vdev id in vdev stopped ev %d", 6002 vdev_id); 6003 rcu_read_unlock(); 6004 return; 6005 } 6006 6007 complete(&ar->vdev_setup_done); 6008 6009 rcu_read_unlock(); 6010 6011 ath12k_dbg(ab, ATH12K_DBG_WMI, "vdev stopped for vdev id %d", vdev_id); 6012 } 6013 6014 static void ath12k_mgmt_rx_event(struct ath12k_base *ab, struct sk_buff *skb) 6015 { 6016 struct ath12k_wmi_mgmt_rx_arg rx_ev = {0}; 6017 struct ath12k *ar; 6018 struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb); 6019 struct ieee80211_hdr *hdr; 6020 u16 fc; 6021 struct ieee80211_supported_band *sband; 6022 6023 if (ath12k_pull_mgmt_rx_params_tlv(ab, skb, &rx_ev) != 0) { 6024 ath12k_warn(ab, "failed to extract mgmt rx event"); 6025 dev_kfree_skb(skb); 6026 return; 6027 } 6028 6029 memset(status, 0, sizeof(*status)); 6030 6031 ath12k_dbg(ab, ATH12K_DBG_MGMT, "mgmt rx event status %08x\n", 6032 rx_ev.status); 6033 6034 rcu_read_lock(); 6035 ar = ath12k_mac_get_ar_by_pdev_id(ab, rx_ev.pdev_id); 6036 6037 if (!ar) { 6038 ath12k_warn(ab, "invalid pdev_id %d in mgmt_rx_event\n", 6039 rx_ev.pdev_id); 6040 dev_kfree_skb(skb); 6041 goto exit; 6042 } 6043 6044 if ((test_bit(ATH12K_CAC_RUNNING, &ar->dev_flags)) || 6045 (rx_ev.status & (WMI_RX_STATUS_ERR_DECRYPT | 6046 WMI_RX_STATUS_ERR_KEY_CACHE_MISS | 6047 WMI_RX_STATUS_ERR_CRC))) { 6048 dev_kfree_skb(skb); 6049 goto exit; 6050 } 6051 6052 if (rx_ev.status & WMI_RX_STATUS_ERR_MIC) 6053 status->flag |= RX_FLAG_MMIC_ERROR; 6054 6055 if (rx_ev.chan_freq >= ATH12K_MIN_6G_FREQ && 6056 rx_ev.chan_freq <= ATH12K_MAX_6G_FREQ) { 6057 status->band = NL80211_BAND_6GHZ; 6058 status->freq = rx_ev.chan_freq; 6059 } else if (rx_ev.channel >= 1 && rx_ev.channel <= 14) { 6060 status->band = NL80211_BAND_2GHZ; 6061 } else if (rx_ev.channel >= 36 && rx_ev.channel <= ATH12K_MAX_5G_CHAN) { 6062 status->band = NL80211_BAND_5GHZ; 6063 } else { 6064 /* Shouldn't happen unless list of advertised channels to 6065 * mac80211 has been changed. 6066 */ 6067 WARN_ON_ONCE(1); 6068 dev_kfree_skb(skb); 6069 goto exit; 6070 } 6071 6072 if (rx_ev.phy_mode == MODE_11B && 6073 (status->band == NL80211_BAND_5GHZ || status->band == NL80211_BAND_6GHZ)) 6074 ath12k_dbg(ab, ATH12K_DBG_WMI, 6075 "wmi mgmt rx 11b (CCK) on 5/6GHz, band = %d\n", status->band); 6076 6077 sband = &ar->mac.sbands[status->band]; 6078 6079 if (status->band != NL80211_BAND_6GHZ) 6080 status->freq = ieee80211_channel_to_frequency(rx_ev.channel, 6081 status->band); 6082 6083 status->signal = rx_ev.snr + ATH12K_DEFAULT_NOISE_FLOOR; 6084 status->rate_idx = ath12k_mac_bitrate_to_idx(sband, rx_ev.rate / 100); 6085 6086 hdr = (struct ieee80211_hdr *)skb->data; 6087 fc = le16_to_cpu(hdr->frame_control); 6088 6089 /* Firmware is guaranteed to report all essential management frames via 6090 * WMI while it can deliver some extra via HTT. Since there can be 6091 * duplicates split the reporting wrt monitor/sniffing. 6092 */ 6093 status->flag |= RX_FLAG_SKIP_MONITOR; 6094 6095 /* In case of PMF, FW delivers decrypted frames with Protected Bit set 6096 * including group privacy action frames. 6097 */ 6098 if (ieee80211_has_protected(hdr->frame_control)) { 6099 status->flag |= RX_FLAG_DECRYPTED; 6100 6101 if (!ieee80211_is_robust_mgmt_frame(skb)) { 6102 status->flag |= RX_FLAG_IV_STRIPPED | 6103 RX_FLAG_MMIC_STRIPPED; 6104 hdr->frame_control = __cpu_to_le16(fc & 6105 ~IEEE80211_FCTL_PROTECTED); 6106 } 6107 } 6108 6109 if (ieee80211_is_beacon(hdr->frame_control)) 6110 ath12k_mac_handle_beacon(ar, skb); 6111 6112 ath12k_dbg(ab, ATH12K_DBG_MGMT, 6113 "event mgmt rx skb %p len %d ftype %02x stype %02x\n", 6114 skb, skb->len, 6115 fc & IEEE80211_FCTL_FTYPE, fc & IEEE80211_FCTL_STYPE); 6116 6117 ath12k_dbg(ab, ATH12K_DBG_MGMT, 6118 "event mgmt rx freq %d band %d snr %d, rate_idx %d\n", 6119 status->freq, status->band, status->signal, 6120 status->rate_idx); 6121 6122 ieee80211_rx_ni(ath12k_ar_to_hw(ar), skb); 6123 6124 exit: 6125 rcu_read_unlock(); 6126 } 6127 6128 static void ath12k_mgmt_tx_compl_event(struct ath12k_base *ab, struct sk_buff *skb) 6129 { 6130 struct wmi_mgmt_tx_compl_event tx_compl_param = {0}; 6131 struct ath12k *ar; 6132 6133 if (ath12k_pull_mgmt_tx_compl_param_tlv(ab, skb, &tx_compl_param) != 0) { 6134 ath12k_warn(ab, "failed to extract mgmt tx compl event"); 6135 return; 6136 } 6137 6138 rcu_read_lock(); 6139 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(tx_compl_param.pdev_id)); 6140 if (!ar) { 6141 ath12k_warn(ab, "invalid pdev id %d in mgmt_tx_compl_event\n", 6142 tx_compl_param.pdev_id); 6143 goto exit; 6144 } 6145 6146 wmi_process_mgmt_tx_comp(ar, le32_to_cpu(tx_compl_param.desc_id), 6147 le32_to_cpu(tx_compl_param.status)); 6148 6149 ath12k_dbg(ab, ATH12K_DBG_MGMT, 6150 "mgmt tx compl ev pdev_id %d, desc_id %d, status %d", 6151 tx_compl_param.pdev_id, tx_compl_param.desc_id, 6152 tx_compl_param.status); 6153 6154 exit: 6155 rcu_read_unlock(); 6156 } 6157 6158 static struct ath12k *ath12k_get_ar_on_scan_state(struct ath12k_base *ab, 6159 u32 vdev_id, 6160 enum ath12k_scan_state state) 6161 { 6162 int i; 6163 struct ath12k_pdev *pdev; 6164 struct ath12k *ar; 6165 6166 for (i = 0; i < ab->num_radios; i++) { 6167 pdev = rcu_dereference(ab->pdevs_active[i]); 6168 if (pdev && pdev->ar) { 6169 ar = pdev->ar; 6170 6171 spin_lock_bh(&ar->data_lock); 6172 if (ar->scan.state == state && 6173 ar->scan.vdev_id == vdev_id) { 6174 spin_unlock_bh(&ar->data_lock); 6175 return ar; 6176 } 6177 spin_unlock_bh(&ar->data_lock); 6178 } 6179 } 6180 return NULL; 6181 } 6182 6183 static void ath12k_scan_event(struct ath12k_base *ab, struct sk_buff *skb) 6184 { 6185 struct ath12k *ar; 6186 struct wmi_scan_event scan_ev = {0}; 6187 6188 if (ath12k_pull_scan_ev(ab, skb, &scan_ev) != 0) { 6189 ath12k_warn(ab, "failed to extract scan event"); 6190 return; 6191 } 6192 6193 rcu_read_lock(); 6194 6195 /* In case the scan was cancelled, ex. during interface teardown, 6196 * the interface will not be found in active interfaces. 6197 * Rather, in such scenarios, iterate over the active pdev's to 6198 * search 'ar' if the corresponding 'ar' scan is ABORTING and the 6199 * aborting scan's vdev id matches this event info. 6200 */ 6201 if (le32_to_cpu(scan_ev.event_type) == WMI_SCAN_EVENT_COMPLETED && 6202 le32_to_cpu(scan_ev.reason) == WMI_SCAN_REASON_CANCELLED) { 6203 ar = ath12k_get_ar_on_scan_state(ab, le32_to_cpu(scan_ev.vdev_id), 6204 ATH12K_SCAN_ABORTING); 6205 if (!ar) 6206 ar = ath12k_get_ar_on_scan_state(ab, le32_to_cpu(scan_ev.vdev_id), 6207 ATH12K_SCAN_RUNNING); 6208 } else { 6209 ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(scan_ev.vdev_id)); 6210 } 6211 6212 if (!ar) { 6213 ath12k_warn(ab, "Received scan event for unknown vdev"); 6214 rcu_read_unlock(); 6215 return; 6216 } 6217 6218 spin_lock_bh(&ar->data_lock); 6219 6220 ath12k_dbg(ab, ATH12K_DBG_WMI, 6221 "scan event %s type %d reason %d freq %d req_id %d scan_id %d vdev_id %d state %s (%d)\n", 6222 ath12k_wmi_event_scan_type_str(le32_to_cpu(scan_ev.event_type), 6223 le32_to_cpu(scan_ev.reason)), 6224 le32_to_cpu(scan_ev.event_type), 6225 le32_to_cpu(scan_ev.reason), 6226 le32_to_cpu(scan_ev.channel_freq), 6227 le32_to_cpu(scan_ev.scan_req_id), 6228 le32_to_cpu(scan_ev.scan_id), 6229 le32_to_cpu(scan_ev.vdev_id), 6230 ath12k_scan_state_str(ar->scan.state), ar->scan.state); 6231 6232 switch (le32_to_cpu(scan_ev.event_type)) { 6233 case WMI_SCAN_EVENT_STARTED: 6234 ath12k_wmi_event_scan_started(ar); 6235 break; 6236 case WMI_SCAN_EVENT_COMPLETED: 6237 ath12k_wmi_event_scan_completed(ar); 6238 break; 6239 case WMI_SCAN_EVENT_BSS_CHANNEL: 6240 ath12k_wmi_event_scan_bss_chan(ar); 6241 break; 6242 case WMI_SCAN_EVENT_FOREIGN_CHAN: 6243 ath12k_wmi_event_scan_foreign_chan(ar, le32_to_cpu(scan_ev.channel_freq)); 6244 break; 6245 case WMI_SCAN_EVENT_START_FAILED: 6246 ath12k_warn(ab, "received scan start failure event\n"); 6247 ath12k_wmi_event_scan_start_failed(ar); 6248 break; 6249 case WMI_SCAN_EVENT_DEQUEUED: 6250 __ath12k_mac_scan_finish(ar); 6251 break; 6252 case WMI_SCAN_EVENT_PREEMPTED: 6253 case WMI_SCAN_EVENT_RESTARTED: 6254 case WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT: 6255 default: 6256 break; 6257 } 6258 6259 spin_unlock_bh(&ar->data_lock); 6260 6261 rcu_read_unlock(); 6262 } 6263 6264 static void ath12k_peer_sta_kickout_event(struct ath12k_base *ab, struct sk_buff *skb) 6265 { 6266 struct wmi_peer_sta_kickout_arg arg = {}; 6267 struct ieee80211_sta *sta; 6268 struct ath12k_peer *peer; 6269 struct ath12k *ar; 6270 6271 if (ath12k_pull_peer_sta_kickout_ev(ab, skb, &arg) != 0) { 6272 ath12k_warn(ab, "failed to extract peer sta kickout event"); 6273 return; 6274 } 6275 6276 rcu_read_lock(); 6277 6278 spin_lock_bh(&ab->base_lock); 6279 6280 peer = ath12k_peer_find_by_addr(ab, arg.mac_addr); 6281 6282 if (!peer) { 6283 ath12k_warn(ab, "peer not found %pM\n", 6284 arg.mac_addr); 6285 goto exit; 6286 } 6287 6288 ar = ath12k_mac_get_ar_by_vdev_id(ab, peer->vdev_id); 6289 if (!ar) { 6290 ath12k_warn(ab, "invalid vdev id in peer sta kickout ev %d", 6291 peer->vdev_id); 6292 goto exit; 6293 } 6294 6295 sta = ieee80211_find_sta_by_ifaddr(ath12k_ar_to_hw(ar), 6296 arg.mac_addr, NULL); 6297 if (!sta) { 6298 ath12k_warn(ab, "Spurious quick kickout for STA %pM\n", 6299 arg.mac_addr); 6300 goto exit; 6301 } 6302 6303 ath12k_dbg(ab, ATH12K_DBG_WMI, "peer sta kickout event %pM", 6304 arg.mac_addr); 6305 6306 ieee80211_report_low_ack(sta, 10); 6307 6308 exit: 6309 spin_unlock_bh(&ab->base_lock); 6310 rcu_read_unlock(); 6311 } 6312 6313 static void ath12k_roam_event(struct ath12k_base *ab, struct sk_buff *skb) 6314 { 6315 struct wmi_roam_event roam_ev = {}; 6316 struct ath12k *ar; 6317 u32 vdev_id; 6318 u8 roam_reason; 6319 6320 if (ath12k_pull_roam_ev(ab, skb, &roam_ev) != 0) { 6321 ath12k_warn(ab, "failed to extract roam event"); 6322 return; 6323 } 6324 6325 vdev_id = le32_to_cpu(roam_ev.vdev_id); 6326 roam_reason = u32_get_bits(le32_to_cpu(roam_ev.reason), 6327 WMI_ROAM_REASON_MASK); 6328 6329 ath12k_dbg(ab, ATH12K_DBG_WMI, 6330 "wmi roam event vdev %u reason %d rssi %d\n", 6331 vdev_id, roam_reason, roam_ev.rssi); 6332 6333 rcu_read_lock(); 6334 ar = ath12k_mac_get_ar_by_vdev_id(ab, vdev_id); 6335 if (!ar) { 6336 ath12k_warn(ab, "invalid vdev id in roam ev %d", vdev_id); 6337 rcu_read_unlock(); 6338 return; 6339 } 6340 6341 if (roam_reason >= WMI_ROAM_REASON_MAX) 6342 ath12k_warn(ab, "ignoring unknown roam event reason %d on vdev %i\n", 6343 roam_reason, vdev_id); 6344 6345 switch (roam_reason) { 6346 case WMI_ROAM_REASON_BEACON_MISS: 6347 ath12k_mac_handle_beacon_miss(ar, vdev_id); 6348 break; 6349 case WMI_ROAM_REASON_BETTER_AP: 6350 case WMI_ROAM_REASON_LOW_RSSI: 6351 case WMI_ROAM_REASON_SUITABLE_AP_FOUND: 6352 case WMI_ROAM_REASON_HO_FAILED: 6353 ath12k_warn(ab, "ignoring not implemented roam event reason %d on vdev %i\n", 6354 roam_reason, vdev_id); 6355 break; 6356 } 6357 6358 rcu_read_unlock(); 6359 } 6360 6361 static void ath12k_chan_info_event(struct ath12k_base *ab, struct sk_buff *skb) 6362 { 6363 struct wmi_chan_info_event ch_info_ev = {0}; 6364 struct ath12k *ar; 6365 struct survey_info *survey; 6366 int idx; 6367 /* HW channel counters frequency value in hertz */ 6368 u32 cc_freq_hz = ab->cc_freq_hz; 6369 6370 if (ath12k_pull_chan_info_ev(ab, skb, &ch_info_ev) != 0) { 6371 ath12k_warn(ab, "failed to extract chan info event"); 6372 return; 6373 } 6374 6375 ath12k_dbg(ab, ATH12K_DBG_WMI, 6376 "chan info vdev_id %d err_code %d freq %d cmd_flags %d noise_floor %d rx_clear_count %d cycle_count %d mac_clk_mhz %d\n", 6377 ch_info_ev.vdev_id, ch_info_ev.err_code, ch_info_ev.freq, 6378 ch_info_ev.cmd_flags, ch_info_ev.noise_floor, 6379 ch_info_ev.rx_clear_count, ch_info_ev.cycle_count, 6380 ch_info_ev.mac_clk_mhz); 6381 6382 if (le32_to_cpu(ch_info_ev.cmd_flags) == WMI_CHAN_INFO_END_RESP) { 6383 ath12k_dbg(ab, ATH12K_DBG_WMI, "chan info report completed\n"); 6384 return; 6385 } 6386 6387 rcu_read_lock(); 6388 ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(ch_info_ev.vdev_id)); 6389 if (!ar) { 6390 ath12k_warn(ab, "invalid vdev id in chan info ev %d", 6391 ch_info_ev.vdev_id); 6392 rcu_read_unlock(); 6393 return; 6394 } 6395 spin_lock_bh(&ar->data_lock); 6396 6397 switch (ar->scan.state) { 6398 case ATH12K_SCAN_IDLE: 6399 case ATH12K_SCAN_STARTING: 6400 ath12k_warn(ab, "received chan info event without a scan request, ignoring\n"); 6401 goto exit; 6402 case ATH12K_SCAN_RUNNING: 6403 case ATH12K_SCAN_ABORTING: 6404 break; 6405 } 6406 6407 idx = freq_to_idx(ar, le32_to_cpu(ch_info_ev.freq)); 6408 if (idx >= ARRAY_SIZE(ar->survey)) { 6409 ath12k_warn(ab, "chan info: invalid frequency %d (idx %d out of bounds)\n", 6410 ch_info_ev.freq, idx); 6411 goto exit; 6412 } 6413 6414 /* If FW provides MAC clock frequency in Mhz, overriding the initialized 6415 * HW channel counters frequency value 6416 */ 6417 if (ch_info_ev.mac_clk_mhz) 6418 cc_freq_hz = (le32_to_cpu(ch_info_ev.mac_clk_mhz) * 1000); 6419 6420 if (ch_info_ev.cmd_flags == WMI_CHAN_INFO_START_RESP) { 6421 survey = &ar->survey[idx]; 6422 memset(survey, 0, sizeof(*survey)); 6423 survey->noise = le32_to_cpu(ch_info_ev.noise_floor); 6424 survey->filled = SURVEY_INFO_NOISE_DBM | SURVEY_INFO_TIME | 6425 SURVEY_INFO_TIME_BUSY; 6426 survey->time = div_u64(le32_to_cpu(ch_info_ev.cycle_count), cc_freq_hz); 6427 survey->time_busy = div_u64(le32_to_cpu(ch_info_ev.rx_clear_count), 6428 cc_freq_hz); 6429 } 6430 exit: 6431 spin_unlock_bh(&ar->data_lock); 6432 rcu_read_unlock(); 6433 } 6434 6435 static void 6436 ath12k_pdev_bss_chan_info_event(struct ath12k_base *ab, struct sk_buff *skb) 6437 { 6438 struct wmi_pdev_bss_chan_info_event bss_ch_info_ev = {}; 6439 struct survey_info *survey; 6440 struct ath12k *ar; 6441 u32 cc_freq_hz = ab->cc_freq_hz; 6442 u64 busy, total, tx, rx, rx_bss; 6443 int idx; 6444 6445 if (ath12k_pull_pdev_bss_chan_info_ev(ab, skb, &bss_ch_info_ev) != 0) { 6446 ath12k_warn(ab, "failed to extract pdev bss chan info event"); 6447 return; 6448 } 6449 6450 busy = (u64)(le32_to_cpu(bss_ch_info_ev.rx_clear_count_high)) << 32 | 6451 le32_to_cpu(bss_ch_info_ev.rx_clear_count_low); 6452 6453 total = (u64)(le32_to_cpu(bss_ch_info_ev.cycle_count_high)) << 32 | 6454 le32_to_cpu(bss_ch_info_ev.cycle_count_low); 6455 6456 tx = (u64)(le32_to_cpu(bss_ch_info_ev.tx_cycle_count_high)) << 32 | 6457 le32_to_cpu(bss_ch_info_ev.tx_cycle_count_low); 6458 6459 rx = (u64)(le32_to_cpu(bss_ch_info_ev.rx_cycle_count_high)) << 32 | 6460 le32_to_cpu(bss_ch_info_ev.rx_cycle_count_low); 6461 6462 rx_bss = (u64)(le32_to_cpu(bss_ch_info_ev.rx_bss_cycle_count_high)) << 32 | 6463 le32_to_cpu(bss_ch_info_ev.rx_bss_cycle_count_low); 6464 6465 ath12k_dbg(ab, ATH12K_DBG_WMI, 6466 "pdev bss chan info:\n pdev_id: %d freq: %d noise: %d cycle: busy %llu total %llu tx %llu rx %llu rx_bss %llu\n", 6467 bss_ch_info_ev.pdev_id, bss_ch_info_ev.freq, 6468 bss_ch_info_ev.noise_floor, busy, total, 6469 tx, rx, rx_bss); 6470 6471 rcu_read_lock(); 6472 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(bss_ch_info_ev.pdev_id)); 6473 6474 if (!ar) { 6475 ath12k_warn(ab, "invalid pdev id %d in bss_chan_info event\n", 6476 bss_ch_info_ev.pdev_id); 6477 rcu_read_unlock(); 6478 return; 6479 } 6480 6481 spin_lock_bh(&ar->data_lock); 6482 idx = freq_to_idx(ar, le32_to_cpu(bss_ch_info_ev.freq)); 6483 if (idx >= ARRAY_SIZE(ar->survey)) { 6484 ath12k_warn(ab, "bss chan info: invalid frequency %d (idx %d out of bounds)\n", 6485 bss_ch_info_ev.freq, idx); 6486 goto exit; 6487 } 6488 6489 survey = &ar->survey[idx]; 6490 6491 survey->noise = le32_to_cpu(bss_ch_info_ev.noise_floor); 6492 survey->time = div_u64(total, cc_freq_hz); 6493 survey->time_busy = div_u64(busy, cc_freq_hz); 6494 survey->time_rx = div_u64(rx_bss, cc_freq_hz); 6495 survey->time_tx = div_u64(tx, cc_freq_hz); 6496 survey->filled |= (SURVEY_INFO_NOISE_DBM | 6497 SURVEY_INFO_TIME | 6498 SURVEY_INFO_TIME_BUSY | 6499 SURVEY_INFO_TIME_RX | 6500 SURVEY_INFO_TIME_TX); 6501 exit: 6502 spin_unlock_bh(&ar->data_lock); 6503 complete(&ar->bss_survey_done); 6504 6505 rcu_read_unlock(); 6506 } 6507 6508 static void ath12k_vdev_install_key_compl_event(struct ath12k_base *ab, 6509 struct sk_buff *skb) 6510 { 6511 struct wmi_vdev_install_key_complete_arg install_key_compl = {0}; 6512 struct ath12k *ar; 6513 6514 if (ath12k_pull_vdev_install_key_compl_ev(ab, skb, &install_key_compl) != 0) { 6515 ath12k_warn(ab, "failed to extract install key compl event"); 6516 return; 6517 } 6518 6519 ath12k_dbg(ab, ATH12K_DBG_WMI, 6520 "vdev install key ev idx %d flags %08x macaddr %pM status %d\n", 6521 install_key_compl.key_idx, install_key_compl.key_flags, 6522 install_key_compl.macaddr, install_key_compl.status); 6523 6524 rcu_read_lock(); 6525 ar = ath12k_mac_get_ar_by_vdev_id(ab, install_key_compl.vdev_id); 6526 if (!ar) { 6527 ath12k_warn(ab, "invalid vdev id in install key compl ev %d", 6528 install_key_compl.vdev_id); 6529 rcu_read_unlock(); 6530 return; 6531 } 6532 6533 ar->install_key_status = 0; 6534 6535 if (install_key_compl.status != WMI_VDEV_INSTALL_KEY_COMPL_STATUS_SUCCESS) { 6536 ath12k_warn(ab, "install key failed for %pM status %d\n", 6537 install_key_compl.macaddr, install_key_compl.status); 6538 ar->install_key_status = install_key_compl.status; 6539 } 6540 6541 complete(&ar->install_key_done); 6542 rcu_read_unlock(); 6543 } 6544 6545 static int ath12k_wmi_tlv_services_parser(struct ath12k_base *ab, 6546 u16 tag, u16 len, 6547 const void *ptr, 6548 void *data) 6549 { 6550 const struct wmi_service_available_event *ev; 6551 u32 *wmi_ext2_service_bitmap; 6552 int i, j; 6553 u16 expected_len; 6554 6555 expected_len = WMI_SERVICE_SEGMENT_BM_SIZE32 * sizeof(u32); 6556 if (len < expected_len) { 6557 ath12k_warn(ab, "invalid length %d for the WMI services available tag 0x%x\n", 6558 len, tag); 6559 return -EINVAL; 6560 } 6561 6562 switch (tag) { 6563 case WMI_TAG_SERVICE_AVAILABLE_EVENT: 6564 ev = (struct wmi_service_available_event *)ptr; 6565 for (i = 0, j = WMI_MAX_SERVICE; 6566 i < WMI_SERVICE_SEGMENT_BM_SIZE32 && j < WMI_MAX_EXT_SERVICE; 6567 i++) { 6568 do { 6569 if (le32_to_cpu(ev->wmi_service_segment_bitmap[i]) & 6570 BIT(j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32)) 6571 set_bit(j, ab->wmi_ab.svc_map); 6572 } while (++j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32); 6573 } 6574 6575 ath12k_dbg(ab, ATH12K_DBG_WMI, 6576 "wmi_ext_service_bitmap 0x%x 0x%x 0x%x 0x%x", 6577 ev->wmi_service_segment_bitmap[0], 6578 ev->wmi_service_segment_bitmap[1], 6579 ev->wmi_service_segment_bitmap[2], 6580 ev->wmi_service_segment_bitmap[3]); 6581 break; 6582 case WMI_TAG_ARRAY_UINT32: 6583 wmi_ext2_service_bitmap = (u32 *)ptr; 6584 for (i = 0, j = WMI_MAX_EXT_SERVICE; 6585 i < WMI_SERVICE_SEGMENT_BM_SIZE32 && j < WMI_MAX_EXT2_SERVICE; 6586 i++) { 6587 do { 6588 if (wmi_ext2_service_bitmap[i] & 6589 BIT(j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32)) 6590 set_bit(j, ab->wmi_ab.svc_map); 6591 } while (++j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32); 6592 } 6593 6594 ath12k_dbg(ab, ATH12K_DBG_WMI, 6595 "wmi_ext2_service_bitmap 0x%04x 0x%04x 0x%04x 0x%04x", 6596 wmi_ext2_service_bitmap[0], wmi_ext2_service_bitmap[1], 6597 wmi_ext2_service_bitmap[2], wmi_ext2_service_bitmap[3]); 6598 break; 6599 } 6600 return 0; 6601 } 6602 6603 static int ath12k_service_available_event(struct ath12k_base *ab, struct sk_buff *skb) 6604 { 6605 int ret; 6606 6607 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 6608 ath12k_wmi_tlv_services_parser, 6609 NULL); 6610 return ret; 6611 } 6612 6613 static void ath12k_peer_assoc_conf_event(struct ath12k_base *ab, struct sk_buff *skb) 6614 { 6615 struct wmi_peer_assoc_conf_arg peer_assoc_conf = {0}; 6616 struct ath12k *ar; 6617 6618 if (ath12k_pull_peer_assoc_conf_ev(ab, skb, &peer_assoc_conf) != 0) { 6619 ath12k_warn(ab, "failed to extract peer assoc conf event"); 6620 return; 6621 } 6622 6623 ath12k_dbg(ab, ATH12K_DBG_WMI, 6624 "peer assoc conf ev vdev id %d macaddr %pM\n", 6625 peer_assoc_conf.vdev_id, peer_assoc_conf.macaddr); 6626 6627 rcu_read_lock(); 6628 ar = ath12k_mac_get_ar_by_vdev_id(ab, peer_assoc_conf.vdev_id); 6629 6630 if (!ar) { 6631 ath12k_warn(ab, "invalid vdev id in peer assoc conf ev %d", 6632 peer_assoc_conf.vdev_id); 6633 rcu_read_unlock(); 6634 return; 6635 } 6636 6637 complete(&ar->peer_assoc_done); 6638 rcu_read_unlock(); 6639 } 6640 6641 static void ath12k_update_stats_event(struct ath12k_base *ab, struct sk_buff *skb) 6642 { 6643 } 6644 6645 /* PDEV_CTL_FAILSAFE_CHECK_EVENT is received from FW when the frequency scanned 6646 * is not part of BDF CTL(Conformance test limits) table entries. 6647 */ 6648 static void ath12k_pdev_ctl_failsafe_check_event(struct ath12k_base *ab, 6649 struct sk_buff *skb) 6650 { 6651 const void **tb; 6652 const struct wmi_pdev_ctl_failsafe_chk_event *ev; 6653 int ret; 6654 6655 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 6656 if (IS_ERR(tb)) { 6657 ret = PTR_ERR(tb); 6658 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 6659 return; 6660 } 6661 6662 ev = tb[WMI_TAG_PDEV_CTL_FAILSAFE_CHECK_EVENT]; 6663 if (!ev) { 6664 ath12k_warn(ab, "failed to fetch pdev ctl failsafe check ev"); 6665 kfree(tb); 6666 return; 6667 } 6668 6669 ath12k_dbg(ab, ATH12K_DBG_WMI, 6670 "pdev ctl failsafe check ev status %d\n", 6671 ev->ctl_failsafe_status); 6672 6673 /* If ctl_failsafe_status is set to 1 FW will max out the Transmit power 6674 * to 10 dBm else the CTL power entry in the BDF would be picked up. 6675 */ 6676 if (ev->ctl_failsafe_status != 0) 6677 ath12k_warn(ab, "pdev ctl failsafe failure status %d", 6678 ev->ctl_failsafe_status); 6679 6680 kfree(tb); 6681 } 6682 6683 static void 6684 ath12k_wmi_process_csa_switch_count_event(struct ath12k_base *ab, 6685 const struct ath12k_wmi_pdev_csa_event *ev, 6686 const u32 *vdev_ids) 6687 { 6688 int i; 6689 struct ath12k_vif *arvif; 6690 6691 /* Finish CSA once the switch count becomes NULL */ 6692 if (ev->current_switch_count) 6693 return; 6694 6695 rcu_read_lock(); 6696 for (i = 0; i < le32_to_cpu(ev->num_vdevs); i++) { 6697 arvif = ath12k_mac_get_arvif_by_vdev_id(ab, vdev_ids[i]); 6698 6699 if (!arvif) { 6700 ath12k_warn(ab, "Recvd csa status for unknown vdev %d", 6701 vdev_ids[i]); 6702 continue; 6703 } 6704 6705 if (arvif->is_up && arvif->vif->bss_conf.csa_active) 6706 ieee80211_csa_finish(arvif->vif, 0); 6707 } 6708 rcu_read_unlock(); 6709 } 6710 6711 static void 6712 ath12k_wmi_pdev_csa_switch_count_status_event(struct ath12k_base *ab, 6713 struct sk_buff *skb) 6714 { 6715 const void **tb; 6716 const struct ath12k_wmi_pdev_csa_event *ev; 6717 const u32 *vdev_ids; 6718 int ret; 6719 6720 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 6721 if (IS_ERR(tb)) { 6722 ret = PTR_ERR(tb); 6723 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 6724 return; 6725 } 6726 6727 ev = tb[WMI_TAG_PDEV_CSA_SWITCH_COUNT_STATUS_EVENT]; 6728 vdev_ids = tb[WMI_TAG_ARRAY_UINT32]; 6729 6730 if (!ev || !vdev_ids) { 6731 ath12k_warn(ab, "failed to fetch pdev csa switch count ev"); 6732 kfree(tb); 6733 return; 6734 } 6735 6736 ath12k_dbg(ab, ATH12K_DBG_WMI, 6737 "pdev csa switch count %d for pdev %d, num_vdevs %d", 6738 ev->current_switch_count, ev->pdev_id, 6739 ev->num_vdevs); 6740 6741 ath12k_wmi_process_csa_switch_count_event(ab, ev, vdev_ids); 6742 6743 kfree(tb); 6744 } 6745 6746 static void 6747 ath12k_wmi_pdev_dfs_radar_detected_event(struct ath12k_base *ab, struct sk_buff *skb) 6748 { 6749 const void **tb; 6750 const struct ath12k_wmi_pdev_radar_event *ev; 6751 struct ath12k *ar; 6752 int ret; 6753 6754 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 6755 if (IS_ERR(tb)) { 6756 ret = PTR_ERR(tb); 6757 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 6758 return; 6759 } 6760 6761 ev = tb[WMI_TAG_PDEV_DFS_RADAR_DETECTION_EVENT]; 6762 6763 if (!ev) { 6764 ath12k_warn(ab, "failed to fetch pdev dfs radar detected ev"); 6765 kfree(tb); 6766 return; 6767 } 6768 6769 ath12k_dbg(ab, ATH12K_DBG_WMI, 6770 "pdev dfs radar detected on pdev %d, detection mode %d, chan freq %d, chan_width %d, detector id %d, seg id %d, timestamp %d, chirp %d, freq offset %d, sidx %d", 6771 ev->pdev_id, ev->detection_mode, ev->chan_freq, ev->chan_width, 6772 ev->detector_id, ev->segment_id, ev->timestamp, ev->is_chirp, 6773 ev->freq_offset, ev->sidx); 6774 6775 rcu_read_lock(); 6776 6777 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(ev->pdev_id)); 6778 6779 if (!ar) { 6780 ath12k_warn(ab, "radar detected in invalid pdev %d\n", 6781 ev->pdev_id); 6782 goto exit; 6783 } 6784 6785 ath12k_dbg(ar->ab, ATH12K_DBG_REG, "DFS Radar Detected in pdev %d\n", 6786 ev->pdev_id); 6787 6788 if (ar->dfs_block_radar_events) 6789 ath12k_info(ab, "DFS Radar detected, but ignored as requested\n"); 6790 else 6791 ieee80211_radar_detected(ath12k_ar_to_hw(ar)); 6792 6793 exit: 6794 rcu_read_unlock(); 6795 6796 kfree(tb); 6797 } 6798 6799 static void 6800 ath12k_wmi_pdev_temperature_event(struct ath12k_base *ab, 6801 struct sk_buff *skb) 6802 { 6803 struct ath12k *ar; 6804 struct wmi_pdev_temperature_event ev = {0}; 6805 6806 if (ath12k_pull_pdev_temp_ev(ab, skb, &ev) != 0) { 6807 ath12k_warn(ab, "failed to extract pdev temperature event"); 6808 return; 6809 } 6810 6811 ath12k_dbg(ab, ATH12K_DBG_WMI, 6812 "pdev temperature ev temp %d pdev_id %d\n", ev.temp, ev.pdev_id); 6813 6814 rcu_read_lock(); 6815 6816 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(ev.pdev_id)); 6817 if (!ar) { 6818 ath12k_warn(ab, "invalid pdev id in pdev temperature ev %d", ev.pdev_id); 6819 goto exit; 6820 } 6821 6822 exit: 6823 rcu_read_unlock(); 6824 } 6825 6826 static void ath12k_fils_discovery_event(struct ath12k_base *ab, 6827 struct sk_buff *skb) 6828 { 6829 const void **tb; 6830 const struct wmi_fils_discovery_event *ev; 6831 int ret; 6832 6833 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 6834 if (IS_ERR(tb)) { 6835 ret = PTR_ERR(tb); 6836 ath12k_warn(ab, 6837 "failed to parse FILS discovery event tlv %d\n", 6838 ret); 6839 return; 6840 } 6841 6842 ev = tb[WMI_TAG_HOST_SWFDA_EVENT]; 6843 if (!ev) { 6844 ath12k_warn(ab, "failed to fetch FILS discovery event\n"); 6845 kfree(tb); 6846 return; 6847 } 6848 6849 ath12k_warn(ab, 6850 "FILS discovery frame expected from host for vdev_id: %u, transmission scheduled at %u, next TBTT: %u\n", 6851 ev->vdev_id, ev->fils_tt, ev->tbtt); 6852 6853 kfree(tb); 6854 } 6855 6856 static void ath12k_probe_resp_tx_status_event(struct ath12k_base *ab, 6857 struct sk_buff *skb) 6858 { 6859 const void **tb; 6860 const struct wmi_probe_resp_tx_status_event *ev; 6861 int ret; 6862 6863 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 6864 if (IS_ERR(tb)) { 6865 ret = PTR_ERR(tb); 6866 ath12k_warn(ab, 6867 "failed to parse probe response transmission status event tlv: %d\n", 6868 ret); 6869 return; 6870 } 6871 6872 ev = tb[WMI_TAG_OFFLOAD_PRB_RSP_TX_STATUS_EVENT]; 6873 if (!ev) { 6874 ath12k_warn(ab, 6875 "failed to fetch probe response transmission status event"); 6876 kfree(tb); 6877 return; 6878 } 6879 6880 if (ev->tx_status) 6881 ath12k_warn(ab, 6882 "Probe response transmission failed for vdev_id %u, status %u\n", 6883 ev->vdev_id, ev->tx_status); 6884 6885 kfree(tb); 6886 } 6887 6888 static int ath12k_wmi_p2p_noa_event(struct ath12k_base *ab, 6889 struct sk_buff *skb) 6890 { 6891 const void **tb; 6892 const struct wmi_p2p_noa_event *ev; 6893 const struct ath12k_wmi_p2p_noa_info *noa; 6894 struct ath12k *ar; 6895 int ret, vdev_id; 6896 6897 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 6898 if (IS_ERR(tb)) { 6899 ret = PTR_ERR(tb); 6900 ath12k_warn(ab, "failed to parse P2P NoA TLV: %d\n", ret); 6901 return ret; 6902 } 6903 6904 ev = tb[WMI_TAG_P2P_NOA_EVENT]; 6905 noa = tb[WMI_TAG_P2P_NOA_INFO]; 6906 6907 if (!ev || !noa) { 6908 ret = -EPROTO; 6909 goto out; 6910 } 6911 6912 vdev_id = __le32_to_cpu(ev->vdev_id); 6913 6914 ath12k_dbg(ab, ATH12K_DBG_WMI, 6915 "wmi tlv p2p noa vdev_id %i descriptors %u\n", 6916 vdev_id, le32_get_bits(noa->noa_attr, WMI_P2P_NOA_INFO_DESC_NUM)); 6917 6918 rcu_read_lock(); 6919 ar = ath12k_mac_get_ar_by_vdev_id(ab, vdev_id); 6920 if (!ar) { 6921 ath12k_warn(ab, "invalid vdev id %d in P2P NoA event\n", 6922 vdev_id); 6923 ret = -EINVAL; 6924 goto unlock; 6925 } 6926 6927 ath12k_p2p_noa_update_by_vdev_id(ar, vdev_id, noa); 6928 6929 ret = 0; 6930 6931 unlock: 6932 rcu_read_unlock(); 6933 out: 6934 kfree(tb); 6935 return ret; 6936 } 6937 6938 static void ath12k_rfkill_state_change_event(struct ath12k_base *ab, 6939 struct sk_buff *skb) 6940 { 6941 const struct wmi_rfkill_state_change_event *ev; 6942 const void **tb; 6943 int ret; 6944 6945 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 6946 if (IS_ERR(tb)) { 6947 ret = PTR_ERR(tb); 6948 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 6949 return; 6950 } 6951 6952 ev = tb[WMI_TAG_RFKILL_EVENT]; 6953 if (!ev) { 6954 kfree(tb); 6955 return; 6956 } 6957 6958 ath12k_dbg(ab, ATH12K_DBG_MAC, 6959 "wmi tlv rfkill state change gpio %d type %d radio_state %d\n", 6960 le32_to_cpu(ev->gpio_pin_num), 6961 le32_to_cpu(ev->int_type), 6962 le32_to_cpu(ev->radio_state)); 6963 6964 spin_lock_bh(&ab->base_lock); 6965 ab->rfkill_radio_on = (ev->radio_state == cpu_to_le32(WMI_RFKILL_RADIO_STATE_ON)); 6966 spin_unlock_bh(&ab->base_lock); 6967 6968 queue_work(ab->workqueue, &ab->rfkill_work); 6969 kfree(tb); 6970 } 6971 6972 static void 6973 ath12k_wmi_diag_event(struct ath12k_base *ab, struct sk_buff *skb) 6974 { 6975 trace_ath12k_wmi_diag(ab, skb->data, skb->len); 6976 } 6977 6978 static void ath12k_wmi_twt_enable_event(struct ath12k_base *ab, 6979 struct sk_buff *skb) 6980 { 6981 const void **tb; 6982 const struct wmi_twt_enable_event *ev; 6983 int ret; 6984 6985 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 6986 if (IS_ERR(tb)) { 6987 ret = PTR_ERR(tb); 6988 ath12k_warn(ab, "failed to parse wmi twt enable status event tlv: %d\n", 6989 ret); 6990 return; 6991 } 6992 6993 ev = tb[WMI_TAG_TWT_ENABLE_COMPLETE_EVENT]; 6994 if (!ev) { 6995 ath12k_warn(ab, "failed to fetch twt enable wmi event\n"); 6996 goto exit; 6997 } 6998 6999 ath12k_dbg(ab, ATH12K_DBG_MAC, "wmi twt enable event pdev id %u status %u\n", 7000 le32_to_cpu(ev->pdev_id), 7001 le32_to_cpu(ev->status)); 7002 7003 exit: 7004 kfree(tb); 7005 } 7006 7007 static void ath12k_wmi_twt_disable_event(struct ath12k_base *ab, 7008 struct sk_buff *skb) 7009 { 7010 const void **tb; 7011 const struct wmi_twt_disable_event *ev; 7012 int ret; 7013 7014 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 7015 if (IS_ERR(tb)) { 7016 ret = PTR_ERR(tb); 7017 ath12k_warn(ab, "failed to parse wmi twt disable status event tlv: %d\n", 7018 ret); 7019 return; 7020 } 7021 7022 ev = tb[WMI_TAG_TWT_DISABLE_COMPLETE_EVENT]; 7023 if (!ev) { 7024 ath12k_warn(ab, "failed to fetch twt disable wmi event\n"); 7025 goto exit; 7026 } 7027 7028 ath12k_dbg(ab, ATH12K_DBG_MAC, "wmi twt disable event pdev id %d status %u\n", 7029 le32_to_cpu(ev->pdev_id), 7030 le32_to_cpu(ev->status)); 7031 7032 exit: 7033 kfree(tb); 7034 } 7035 7036 static int ath12k_wmi_wow_wakeup_host_parse(struct ath12k_base *ab, 7037 u16 tag, u16 len, 7038 const void *ptr, void *data) 7039 { 7040 const struct wmi_wow_ev_pg_fault_param *pf_param; 7041 const struct wmi_wow_ev_param *param; 7042 struct wmi_wow_ev_arg *arg = data; 7043 int pf_len; 7044 7045 switch (tag) { 7046 case WMI_TAG_WOW_EVENT_INFO: 7047 param = ptr; 7048 arg->wake_reason = le32_to_cpu(param->wake_reason); 7049 ath12k_dbg(ab, ATH12K_DBG_WMI, "wow wakeup host reason %d %s\n", 7050 arg->wake_reason, wow_reason(arg->wake_reason)); 7051 break; 7052 7053 case WMI_TAG_ARRAY_BYTE: 7054 if (arg && arg->wake_reason == WOW_REASON_PAGE_FAULT) { 7055 pf_param = ptr; 7056 pf_len = le32_to_cpu(pf_param->len); 7057 if (pf_len > len - sizeof(pf_len) || 7058 pf_len < 0) { 7059 ath12k_warn(ab, "invalid wo reason page fault buffer len %d\n", 7060 pf_len); 7061 return -EINVAL; 7062 } 7063 ath12k_dbg(ab, ATH12K_DBG_WMI, "wow_reason_page_fault len %d\n", 7064 pf_len); 7065 ath12k_dbg_dump(ab, ATH12K_DBG_WMI, 7066 "wow_reason_page_fault packet present", 7067 "wow_pg_fault ", 7068 pf_param->data, 7069 pf_len); 7070 } 7071 break; 7072 default: 7073 break; 7074 } 7075 7076 return 0; 7077 } 7078 7079 static void ath12k_wmi_event_wow_wakeup_host(struct ath12k_base *ab, struct sk_buff *skb) 7080 { 7081 struct wmi_wow_ev_arg arg = { }; 7082 int ret; 7083 7084 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 7085 ath12k_wmi_wow_wakeup_host_parse, 7086 &arg); 7087 if (ret) { 7088 ath12k_warn(ab, "failed to parse wmi wow wakeup host event tlv: %d\n", 7089 ret); 7090 return; 7091 } 7092 7093 complete(&ab->wow.wakeup_completed); 7094 } 7095 7096 static void ath12k_wmi_gtk_offload_status_event(struct ath12k_base *ab, 7097 struct sk_buff *skb) 7098 { 7099 const struct wmi_gtk_offload_status_event *ev; 7100 struct ath12k_vif *arvif; 7101 __be64 replay_ctr_be; 7102 u64 replay_ctr; 7103 const void **tb; 7104 int ret; 7105 7106 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 7107 if (IS_ERR(tb)) { 7108 ret = PTR_ERR(tb); 7109 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 7110 return; 7111 } 7112 7113 ev = tb[WMI_TAG_GTK_OFFLOAD_STATUS_EVENT]; 7114 if (!ev) { 7115 ath12k_warn(ab, "failed to fetch gtk offload status ev"); 7116 kfree(tb); 7117 return; 7118 } 7119 7120 rcu_read_lock(); 7121 arvif = ath12k_mac_get_arvif_by_vdev_id(ab, le32_to_cpu(ev->vdev_id)); 7122 if (!arvif) { 7123 rcu_read_unlock(); 7124 ath12k_warn(ab, "failed to get arvif for vdev_id:%d\n", 7125 le32_to_cpu(ev->vdev_id)); 7126 kfree(tb); 7127 return; 7128 } 7129 7130 replay_ctr = le64_to_cpu(ev->replay_ctr); 7131 arvif->rekey_data.replay_ctr = replay_ctr; 7132 ath12k_dbg(ab, ATH12K_DBG_WMI, "wmi gtk offload event refresh_cnt %d replay_ctr %llu\n", 7133 le32_to_cpu(ev->refresh_cnt), replay_ctr); 7134 7135 /* supplicant expects big-endian replay counter */ 7136 replay_ctr_be = cpu_to_be64(replay_ctr); 7137 7138 ieee80211_gtk_rekey_notify(arvif->vif, arvif->bssid, 7139 (void *)&replay_ctr_be, GFP_ATOMIC); 7140 7141 rcu_read_unlock(); 7142 7143 kfree(tb); 7144 } 7145 7146 static void ath12k_wmi_op_rx(struct ath12k_base *ab, struct sk_buff *skb) 7147 { 7148 struct wmi_cmd_hdr *cmd_hdr; 7149 enum wmi_tlv_event_id id; 7150 7151 cmd_hdr = (struct wmi_cmd_hdr *)skb->data; 7152 id = le32_get_bits(cmd_hdr->cmd_id, WMI_CMD_HDR_CMD_ID); 7153 7154 if (!skb_pull(skb, sizeof(struct wmi_cmd_hdr))) 7155 goto out; 7156 7157 switch (id) { 7158 /* Process all the WMI events here */ 7159 case WMI_SERVICE_READY_EVENTID: 7160 ath12k_service_ready_event(ab, skb); 7161 break; 7162 case WMI_SERVICE_READY_EXT_EVENTID: 7163 ath12k_service_ready_ext_event(ab, skb); 7164 break; 7165 case WMI_SERVICE_READY_EXT2_EVENTID: 7166 ath12k_service_ready_ext2_event(ab, skb); 7167 break; 7168 case WMI_REG_CHAN_LIST_CC_EXT_EVENTID: 7169 ath12k_reg_chan_list_event(ab, skb); 7170 break; 7171 case WMI_READY_EVENTID: 7172 ath12k_ready_event(ab, skb); 7173 break; 7174 case WMI_PEER_DELETE_RESP_EVENTID: 7175 ath12k_peer_delete_resp_event(ab, skb); 7176 break; 7177 case WMI_VDEV_START_RESP_EVENTID: 7178 ath12k_vdev_start_resp_event(ab, skb); 7179 break; 7180 case WMI_OFFLOAD_BCN_TX_STATUS_EVENTID: 7181 ath12k_bcn_tx_status_event(ab, skb); 7182 break; 7183 case WMI_VDEV_STOPPED_EVENTID: 7184 ath12k_vdev_stopped_event(ab, skb); 7185 break; 7186 case WMI_MGMT_RX_EVENTID: 7187 ath12k_mgmt_rx_event(ab, skb); 7188 /* mgmt_rx_event() owns the skb now! */ 7189 return; 7190 case WMI_MGMT_TX_COMPLETION_EVENTID: 7191 ath12k_mgmt_tx_compl_event(ab, skb); 7192 break; 7193 case WMI_SCAN_EVENTID: 7194 ath12k_scan_event(ab, skb); 7195 break; 7196 case WMI_PEER_STA_KICKOUT_EVENTID: 7197 ath12k_peer_sta_kickout_event(ab, skb); 7198 break; 7199 case WMI_ROAM_EVENTID: 7200 ath12k_roam_event(ab, skb); 7201 break; 7202 case WMI_CHAN_INFO_EVENTID: 7203 ath12k_chan_info_event(ab, skb); 7204 break; 7205 case WMI_PDEV_BSS_CHAN_INFO_EVENTID: 7206 ath12k_pdev_bss_chan_info_event(ab, skb); 7207 break; 7208 case WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID: 7209 ath12k_vdev_install_key_compl_event(ab, skb); 7210 break; 7211 case WMI_SERVICE_AVAILABLE_EVENTID: 7212 ath12k_service_available_event(ab, skb); 7213 break; 7214 case WMI_PEER_ASSOC_CONF_EVENTID: 7215 ath12k_peer_assoc_conf_event(ab, skb); 7216 break; 7217 case WMI_UPDATE_STATS_EVENTID: 7218 ath12k_update_stats_event(ab, skb); 7219 break; 7220 case WMI_PDEV_CTL_FAILSAFE_CHECK_EVENTID: 7221 ath12k_pdev_ctl_failsafe_check_event(ab, skb); 7222 break; 7223 case WMI_PDEV_CSA_SWITCH_COUNT_STATUS_EVENTID: 7224 ath12k_wmi_pdev_csa_switch_count_status_event(ab, skb); 7225 break; 7226 case WMI_PDEV_TEMPERATURE_EVENTID: 7227 ath12k_wmi_pdev_temperature_event(ab, skb); 7228 break; 7229 case WMI_PDEV_DMA_RING_BUF_RELEASE_EVENTID: 7230 ath12k_wmi_pdev_dma_ring_buf_release_event(ab, skb); 7231 break; 7232 case WMI_HOST_FILS_DISCOVERY_EVENTID: 7233 ath12k_fils_discovery_event(ab, skb); 7234 break; 7235 case WMI_OFFLOAD_PROB_RESP_TX_STATUS_EVENTID: 7236 ath12k_probe_resp_tx_status_event(ab, skb); 7237 break; 7238 case WMI_RFKILL_STATE_CHANGE_EVENTID: 7239 ath12k_rfkill_state_change_event(ab, skb); 7240 break; 7241 case WMI_TWT_ENABLE_EVENTID: 7242 ath12k_wmi_twt_enable_event(ab, skb); 7243 break; 7244 case WMI_TWT_DISABLE_EVENTID: 7245 ath12k_wmi_twt_disable_event(ab, skb); 7246 break; 7247 case WMI_P2P_NOA_EVENTID: 7248 ath12k_wmi_p2p_noa_event(ab, skb); 7249 break; 7250 /* add Unsupported events here */ 7251 case WMI_TBTTOFFSET_EXT_UPDATE_EVENTID: 7252 case WMI_PEER_OPER_MODE_CHANGE_EVENTID: 7253 case WMI_PDEV_DMA_RING_CFG_RSP_EVENTID: 7254 ath12k_dbg(ab, ATH12K_DBG_WMI, 7255 "ignoring unsupported event 0x%x\n", id); 7256 break; 7257 case WMI_PDEV_DFS_RADAR_DETECTION_EVENTID: 7258 ath12k_wmi_pdev_dfs_radar_detected_event(ab, skb); 7259 break; 7260 case WMI_VDEV_DELETE_RESP_EVENTID: 7261 ath12k_vdev_delete_resp_event(ab, skb); 7262 break; 7263 case WMI_DIAG_EVENTID: 7264 ath12k_wmi_diag_event(ab, skb); 7265 break; 7266 case WMI_WOW_WAKEUP_HOST_EVENTID: 7267 ath12k_wmi_event_wow_wakeup_host(ab, skb); 7268 break; 7269 case WMI_GTK_OFFLOAD_STATUS_EVENTID: 7270 ath12k_wmi_gtk_offload_status_event(ab, skb); 7271 break; 7272 /* TODO: Add remaining events */ 7273 default: 7274 ath12k_dbg(ab, ATH12K_DBG_WMI, "Unknown eventid: 0x%x\n", id); 7275 break; 7276 } 7277 7278 out: 7279 dev_kfree_skb(skb); 7280 } 7281 7282 static int ath12k_connect_pdev_htc_service(struct ath12k_base *ab, 7283 u32 pdev_idx) 7284 { 7285 int status; 7286 u32 svc_id[] = { ATH12K_HTC_SVC_ID_WMI_CONTROL, 7287 ATH12K_HTC_SVC_ID_WMI_CONTROL_MAC1, 7288 ATH12K_HTC_SVC_ID_WMI_CONTROL_MAC2 }; 7289 struct ath12k_htc_svc_conn_req conn_req = {}; 7290 struct ath12k_htc_svc_conn_resp conn_resp = {}; 7291 7292 /* these fields are the same for all service endpoints */ 7293 conn_req.ep_ops.ep_tx_complete = ath12k_wmi_htc_tx_complete; 7294 conn_req.ep_ops.ep_rx_complete = ath12k_wmi_op_rx; 7295 conn_req.ep_ops.ep_tx_credits = ath12k_wmi_op_ep_tx_credits; 7296 7297 /* connect to control service */ 7298 conn_req.service_id = svc_id[pdev_idx]; 7299 7300 status = ath12k_htc_connect_service(&ab->htc, &conn_req, &conn_resp); 7301 if (status) { 7302 ath12k_warn(ab, "failed to connect to WMI CONTROL service status: %d\n", 7303 status); 7304 return status; 7305 } 7306 7307 ab->wmi_ab.wmi_endpoint_id[pdev_idx] = conn_resp.eid; 7308 ab->wmi_ab.wmi[pdev_idx].eid = conn_resp.eid; 7309 ab->wmi_ab.max_msg_len[pdev_idx] = conn_resp.max_msg_len; 7310 7311 return 0; 7312 } 7313 7314 static int 7315 ath12k_wmi_send_unit_test_cmd(struct ath12k *ar, 7316 struct wmi_unit_test_cmd ut_cmd, 7317 u32 *test_args) 7318 { 7319 struct ath12k_wmi_pdev *wmi = ar->wmi; 7320 struct wmi_unit_test_cmd *cmd; 7321 struct sk_buff *skb; 7322 struct wmi_tlv *tlv; 7323 void *ptr; 7324 u32 *ut_cmd_args; 7325 int buf_len, arg_len; 7326 int ret; 7327 int i; 7328 7329 arg_len = sizeof(u32) * le32_to_cpu(ut_cmd.num_args); 7330 buf_len = sizeof(ut_cmd) + arg_len + TLV_HDR_SIZE; 7331 7332 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, buf_len); 7333 if (!skb) 7334 return -ENOMEM; 7335 7336 cmd = (struct wmi_unit_test_cmd *)skb->data; 7337 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_UNIT_TEST_CMD, 7338 sizeof(ut_cmd)); 7339 7340 cmd->vdev_id = ut_cmd.vdev_id; 7341 cmd->module_id = ut_cmd.module_id; 7342 cmd->num_args = ut_cmd.num_args; 7343 cmd->diag_token = ut_cmd.diag_token; 7344 7345 ptr = skb->data + sizeof(ut_cmd); 7346 7347 tlv = ptr; 7348 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, arg_len); 7349 7350 ptr += TLV_HDR_SIZE; 7351 7352 ut_cmd_args = ptr; 7353 for (i = 0; i < le32_to_cpu(ut_cmd.num_args); i++) 7354 ut_cmd_args[i] = test_args[i]; 7355 7356 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 7357 "WMI unit test : module %d vdev %d n_args %d token %d\n", 7358 cmd->module_id, cmd->vdev_id, cmd->num_args, 7359 cmd->diag_token); 7360 7361 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_UNIT_TEST_CMDID); 7362 7363 if (ret) { 7364 ath12k_warn(ar->ab, "failed to send WMI_UNIT_TEST CMD :%d\n", 7365 ret); 7366 dev_kfree_skb(skb); 7367 } 7368 7369 return ret; 7370 } 7371 7372 int ath12k_wmi_simulate_radar(struct ath12k *ar) 7373 { 7374 struct ath12k_vif *arvif; 7375 u32 dfs_args[DFS_MAX_TEST_ARGS]; 7376 struct wmi_unit_test_cmd wmi_ut; 7377 bool arvif_found = false; 7378 7379 list_for_each_entry(arvif, &ar->arvifs, list) { 7380 if (arvif->is_started && arvif->vdev_type == WMI_VDEV_TYPE_AP) { 7381 arvif_found = true; 7382 break; 7383 } 7384 } 7385 7386 if (!arvif_found) 7387 return -EINVAL; 7388 7389 dfs_args[DFS_TEST_CMDID] = 0; 7390 dfs_args[DFS_TEST_PDEV_ID] = ar->pdev->pdev_id; 7391 /* Currently we could pass segment_id(b0 - b1), chirp(b2) 7392 * freq offset (b3 - b10) to unit test. For simulation 7393 * purpose this can be set to 0 which is valid. 7394 */ 7395 dfs_args[DFS_TEST_RADAR_PARAM] = 0; 7396 7397 wmi_ut.vdev_id = cpu_to_le32(arvif->vdev_id); 7398 wmi_ut.module_id = cpu_to_le32(DFS_UNIT_TEST_MODULE); 7399 wmi_ut.num_args = cpu_to_le32(DFS_MAX_TEST_ARGS); 7400 wmi_ut.diag_token = cpu_to_le32(DFS_UNIT_TEST_TOKEN); 7401 7402 ath12k_dbg(ar->ab, ATH12K_DBG_REG, "Triggering Radar Simulation\n"); 7403 7404 return ath12k_wmi_send_unit_test_cmd(ar, wmi_ut, dfs_args); 7405 } 7406 7407 int ath12k_wmi_connect(struct ath12k_base *ab) 7408 { 7409 u32 i; 7410 u8 wmi_ep_count; 7411 7412 wmi_ep_count = ab->htc.wmi_ep_count; 7413 if (wmi_ep_count > ab->hw_params->max_radios) 7414 return -1; 7415 7416 for (i = 0; i < wmi_ep_count; i++) 7417 ath12k_connect_pdev_htc_service(ab, i); 7418 7419 return 0; 7420 } 7421 7422 static void ath12k_wmi_pdev_detach(struct ath12k_base *ab, u8 pdev_id) 7423 { 7424 if (WARN_ON(pdev_id >= MAX_RADIOS)) 7425 return; 7426 7427 /* TODO: Deinit any pdev specific wmi resource */ 7428 } 7429 7430 int ath12k_wmi_pdev_attach(struct ath12k_base *ab, 7431 u8 pdev_id) 7432 { 7433 struct ath12k_wmi_pdev *wmi_handle; 7434 7435 if (pdev_id >= ab->hw_params->max_radios) 7436 return -EINVAL; 7437 7438 wmi_handle = &ab->wmi_ab.wmi[pdev_id]; 7439 7440 wmi_handle->wmi_ab = &ab->wmi_ab; 7441 7442 ab->wmi_ab.ab = ab; 7443 /* TODO: Init remaining resource specific to pdev */ 7444 7445 return 0; 7446 } 7447 7448 int ath12k_wmi_attach(struct ath12k_base *ab) 7449 { 7450 int ret; 7451 7452 ret = ath12k_wmi_pdev_attach(ab, 0); 7453 if (ret) 7454 return ret; 7455 7456 ab->wmi_ab.ab = ab; 7457 ab->wmi_ab.preferred_hw_mode = WMI_HOST_HW_MODE_MAX; 7458 7459 /* It's overwritten when service_ext_ready is handled */ 7460 if (ab->hw_params->single_pdev_only) 7461 ab->wmi_ab.preferred_hw_mode = WMI_HOST_HW_MODE_SINGLE; 7462 7463 /* TODO: Init remaining wmi soc resources required */ 7464 init_completion(&ab->wmi_ab.service_ready); 7465 init_completion(&ab->wmi_ab.unified_ready); 7466 7467 return 0; 7468 } 7469 7470 void ath12k_wmi_detach(struct ath12k_base *ab) 7471 { 7472 int i; 7473 7474 /* TODO: Deinit wmi resource specific to SOC as required */ 7475 7476 for (i = 0; i < ab->htc.wmi_ep_count; i++) 7477 ath12k_wmi_pdev_detach(ab, i); 7478 7479 ath12k_wmi_free_dbring_caps(ab); 7480 } 7481 7482 int ath12k_wmi_hw_data_filter_cmd(struct ath12k *ar, struct wmi_hw_data_filter_arg *arg) 7483 { 7484 struct wmi_hw_data_filter_cmd *cmd; 7485 struct sk_buff *skb; 7486 int len; 7487 7488 len = sizeof(*cmd); 7489 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 7490 7491 if (!skb) 7492 return -ENOMEM; 7493 7494 cmd = (struct wmi_hw_data_filter_cmd *)skb->data; 7495 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_HW_DATA_FILTER_CMD, 7496 sizeof(*cmd)); 7497 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 7498 cmd->enable = cpu_to_le32(arg->enable ? 1 : 0); 7499 7500 /* Set all modes in case of disable */ 7501 if (arg->enable) 7502 cmd->hw_filter_bitmap = cpu_to_le32(arg->hw_filter_bitmap); 7503 else 7504 cmd->hw_filter_bitmap = cpu_to_le32((u32)~0U); 7505 7506 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 7507 "wmi hw data filter enable %d filter_bitmap 0x%x\n", 7508 arg->enable, arg->hw_filter_bitmap); 7509 7510 return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_HW_DATA_FILTER_CMDID); 7511 } 7512 7513 int ath12k_wmi_wow_host_wakeup_ind(struct ath12k *ar) 7514 { 7515 struct wmi_wow_host_wakeup_cmd *cmd; 7516 struct sk_buff *skb; 7517 size_t len; 7518 7519 len = sizeof(*cmd); 7520 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 7521 if (!skb) 7522 return -ENOMEM; 7523 7524 cmd = (struct wmi_wow_host_wakeup_cmd *)skb->data; 7525 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_HOSTWAKEUP_FROM_SLEEP_CMD, 7526 sizeof(*cmd)); 7527 7528 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv wow host wakeup ind\n"); 7529 7530 return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID); 7531 } 7532 7533 int ath12k_wmi_wow_enable(struct ath12k *ar) 7534 { 7535 struct wmi_wow_enable_cmd *cmd; 7536 struct sk_buff *skb; 7537 int len; 7538 7539 len = sizeof(*cmd); 7540 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 7541 if (!skb) 7542 return -ENOMEM; 7543 7544 cmd = (struct wmi_wow_enable_cmd *)skb->data; 7545 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_ENABLE_CMD, 7546 sizeof(*cmd)); 7547 7548 cmd->enable = cpu_to_le32(1); 7549 cmd->pause_iface_config = cpu_to_le32(WOW_IFACE_PAUSE_ENABLED); 7550 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv wow enable\n"); 7551 7552 return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_WOW_ENABLE_CMDID); 7553 } 7554 7555 int ath12k_wmi_wow_add_wakeup_event(struct ath12k *ar, u32 vdev_id, 7556 enum wmi_wow_wakeup_event event, 7557 u32 enable) 7558 { 7559 struct wmi_wow_add_del_event_cmd *cmd; 7560 struct sk_buff *skb; 7561 size_t len; 7562 7563 len = sizeof(*cmd); 7564 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 7565 if (!skb) 7566 return -ENOMEM; 7567 7568 cmd = (struct wmi_wow_add_del_event_cmd *)skb->data; 7569 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_ADD_DEL_EVT_CMD, 7570 sizeof(*cmd)); 7571 cmd->vdev_id = cpu_to_le32(vdev_id); 7572 cmd->is_add = cpu_to_le32(enable); 7573 cmd->event_bitmap = cpu_to_le32((1 << event)); 7574 7575 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv wow add wakeup event %s enable %d vdev_id %d\n", 7576 wow_wakeup_event(event), enable, vdev_id); 7577 7578 return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID); 7579 } 7580 7581 int ath12k_wmi_wow_add_pattern(struct ath12k *ar, u32 vdev_id, u32 pattern_id, 7582 const u8 *pattern, const u8 *mask, 7583 int pattern_len, int pattern_offset) 7584 { 7585 struct wmi_wow_add_pattern_cmd *cmd; 7586 struct wmi_wow_bitmap_pattern_params *bitmap; 7587 struct wmi_tlv *tlv; 7588 struct sk_buff *skb; 7589 void *ptr; 7590 size_t len; 7591 7592 len = sizeof(*cmd) + 7593 sizeof(*tlv) + /* array struct */ 7594 sizeof(*bitmap) + /* bitmap */ 7595 sizeof(*tlv) + /* empty ipv4 sync */ 7596 sizeof(*tlv) + /* empty ipv6 sync */ 7597 sizeof(*tlv) + /* empty magic */ 7598 sizeof(*tlv) + /* empty info timeout */ 7599 sizeof(*tlv) + sizeof(u32); /* ratelimit interval */ 7600 7601 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 7602 if (!skb) 7603 return -ENOMEM; 7604 7605 /* cmd */ 7606 ptr = skb->data; 7607 cmd = ptr; 7608 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_ADD_PATTERN_CMD, 7609 sizeof(*cmd)); 7610 cmd->vdev_id = cpu_to_le32(vdev_id); 7611 cmd->pattern_id = cpu_to_le32(pattern_id); 7612 cmd->pattern_type = cpu_to_le32(WOW_BITMAP_PATTERN); 7613 7614 ptr += sizeof(*cmd); 7615 7616 /* bitmap */ 7617 tlv = ptr; 7618 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, sizeof(*bitmap)); 7619 7620 ptr += sizeof(*tlv); 7621 7622 bitmap = ptr; 7623 bitmap->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_BITMAP_PATTERN_T, 7624 sizeof(*bitmap)); 7625 memcpy(bitmap->patternbuf, pattern, pattern_len); 7626 memcpy(bitmap->bitmaskbuf, mask, pattern_len); 7627 bitmap->pattern_offset = cpu_to_le32(pattern_offset); 7628 bitmap->pattern_len = cpu_to_le32(pattern_len); 7629 bitmap->bitmask_len = cpu_to_le32(pattern_len); 7630 bitmap->pattern_id = cpu_to_le32(pattern_id); 7631 7632 ptr += sizeof(*bitmap); 7633 7634 /* ipv4 sync */ 7635 tlv = ptr; 7636 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 0); 7637 7638 ptr += sizeof(*tlv); 7639 7640 /* ipv6 sync */ 7641 tlv = ptr; 7642 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 0); 7643 7644 ptr += sizeof(*tlv); 7645 7646 /* magic */ 7647 tlv = ptr; 7648 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 0); 7649 7650 ptr += sizeof(*tlv); 7651 7652 /* pattern info timeout */ 7653 tlv = ptr; 7654 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, 0); 7655 7656 ptr += sizeof(*tlv); 7657 7658 /* ratelimit interval */ 7659 tlv = ptr; 7660 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, sizeof(u32)); 7661 7662 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv wow add pattern vdev_id %d pattern_id %d pattern_offset %d pattern_len %d\n", 7663 vdev_id, pattern_id, pattern_offset, pattern_len); 7664 7665 ath12k_dbg_dump(ar->ab, ATH12K_DBG_WMI, NULL, "wow pattern: ", 7666 bitmap->patternbuf, pattern_len); 7667 ath12k_dbg_dump(ar->ab, ATH12K_DBG_WMI, NULL, "wow bitmask: ", 7668 bitmap->bitmaskbuf, pattern_len); 7669 7670 return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_WOW_ADD_WAKE_PATTERN_CMDID); 7671 } 7672 7673 int ath12k_wmi_wow_del_pattern(struct ath12k *ar, u32 vdev_id, u32 pattern_id) 7674 { 7675 struct wmi_wow_del_pattern_cmd *cmd; 7676 struct sk_buff *skb; 7677 size_t len; 7678 7679 len = sizeof(*cmd); 7680 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 7681 if (!skb) 7682 return -ENOMEM; 7683 7684 cmd = (struct wmi_wow_del_pattern_cmd *)skb->data; 7685 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_DEL_PATTERN_CMD, 7686 sizeof(*cmd)); 7687 cmd->vdev_id = cpu_to_le32(vdev_id); 7688 cmd->pattern_id = cpu_to_le32(pattern_id); 7689 cmd->pattern_type = cpu_to_le32(WOW_BITMAP_PATTERN); 7690 7691 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv wow del pattern vdev_id %d pattern_id %d\n", 7692 vdev_id, pattern_id); 7693 7694 return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_WOW_DEL_WAKE_PATTERN_CMDID); 7695 } 7696 7697 static struct sk_buff * 7698 ath12k_wmi_op_gen_config_pno_start(struct ath12k *ar, u32 vdev_id, 7699 struct wmi_pno_scan_req_arg *pno) 7700 { 7701 struct nlo_configured_params *nlo_list; 7702 size_t len, nlo_list_len, channel_list_len; 7703 struct wmi_wow_nlo_config_cmd *cmd; 7704 __le32 *channel_list; 7705 struct wmi_tlv *tlv; 7706 struct sk_buff *skb; 7707 void *ptr; 7708 u32 i; 7709 7710 len = sizeof(*cmd) + 7711 sizeof(*tlv) + 7712 /* TLV place holder for array of structures 7713 * nlo_configured_params(nlo_list) 7714 */ 7715 sizeof(*tlv); 7716 /* TLV place holder for array of uint32 channel_list */ 7717 7718 channel_list_len = sizeof(u32) * pno->a_networks[0].channel_count; 7719 len += channel_list_len; 7720 7721 nlo_list_len = sizeof(*nlo_list) * pno->uc_networks_count; 7722 len += nlo_list_len; 7723 7724 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 7725 if (!skb) 7726 return ERR_PTR(-ENOMEM); 7727 7728 ptr = skb->data; 7729 cmd = ptr; 7730 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_NLO_CONFIG_CMD, sizeof(*cmd)); 7731 7732 cmd->vdev_id = cpu_to_le32(pno->vdev_id); 7733 cmd->flags = cpu_to_le32(WMI_NLO_CONFIG_START | WMI_NLO_CONFIG_SSID_HIDE_EN); 7734 7735 /* current FW does not support min-max range for dwell time */ 7736 cmd->active_dwell_time = cpu_to_le32(pno->active_max_time); 7737 cmd->passive_dwell_time = cpu_to_le32(pno->passive_max_time); 7738 7739 if (pno->do_passive_scan) 7740 cmd->flags |= cpu_to_le32(WMI_NLO_CONFIG_SCAN_PASSIVE); 7741 7742 cmd->fast_scan_period = cpu_to_le32(pno->fast_scan_period); 7743 cmd->slow_scan_period = cpu_to_le32(pno->slow_scan_period); 7744 cmd->fast_scan_max_cycles = cpu_to_le32(pno->fast_scan_max_cycles); 7745 cmd->delay_start_time = cpu_to_le32(pno->delay_start_time); 7746 7747 if (pno->enable_pno_scan_randomization) { 7748 cmd->flags |= cpu_to_le32(WMI_NLO_CONFIG_SPOOFED_MAC_IN_PROBE_REQ | 7749 WMI_NLO_CONFIG_RANDOM_SEQ_NO_IN_PROBE_REQ); 7750 ether_addr_copy(cmd->mac_addr.addr, pno->mac_addr); 7751 ether_addr_copy(cmd->mac_mask.addr, pno->mac_addr_mask); 7752 } 7753 7754 ptr += sizeof(*cmd); 7755 7756 /* nlo_configured_params(nlo_list) */ 7757 cmd->no_of_ssids = cpu_to_le32(pno->uc_networks_count); 7758 tlv = ptr; 7759 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, nlo_list_len); 7760 7761 ptr += sizeof(*tlv); 7762 nlo_list = ptr; 7763 for (i = 0; i < pno->uc_networks_count; i++) { 7764 tlv = (struct wmi_tlv *)(&nlo_list[i].tlv_header); 7765 tlv->header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ARRAY_BYTE, 7766 sizeof(*nlo_list)); 7767 7768 nlo_list[i].ssid.valid = cpu_to_le32(1); 7769 nlo_list[i].ssid.ssid.ssid_len = 7770 cpu_to_le32(pno->a_networks[i].ssid.ssid_len); 7771 memcpy(nlo_list[i].ssid.ssid.ssid, 7772 pno->a_networks[i].ssid.ssid, 7773 le32_to_cpu(nlo_list[i].ssid.ssid.ssid_len)); 7774 7775 if (pno->a_networks[i].rssi_threshold && 7776 pno->a_networks[i].rssi_threshold > -300) { 7777 nlo_list[i].rssi_cond.valid = cpu_to_le32(1); 7778 nlo_list[i].rssi_cond.rssi = 7779 cpu_to_le32(pno->a_networks[i].rssi_threshold); 7780 } 7781 7782 nlo_list[i].bcast_nw_type.valid = cpu_to_le32(1); 7783 nlo_list[i].bcast_nw_type.bcast_nw_type = 7784 cpu_to_le32(pno->a_networks[i].bcast_nw_type); 7785 } 7786 7787 ptr += nlo_list_len; 7788 cmd->num_of_channels = cpu_to_le32(pno->a_networks[0].channel_count); 7789 tlv = ptr; 7790 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, channel_list_len); 7791 ptr += sizeof(*tlv); 7792 channel_list = ptr; 7793 7794 for (i = 0; i < pno->a_networks[0].channel_count; i++) 7795 channel_list[i] = cpu_to_le32(pno->a_networks[0].channels[i]); 7796 7797 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv start pno config vdev_id %d\n", 7798 vdev_id); 7799 7800 return skb; 7801 } 7802 7803 static struct sk_buff *ath12k_wmi_op_gen_config_pno_stop(struct ath12k *ar, 7804 u32 vdev_id) 7805 { 7806 struct wmi_wow_nlo_config_cmd *cmd; 7807 struct sk_buff *skb; 7808 size_t len; 7809 7810 len = sizeof(*cmd); 7811 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 7812 if (!skb) 7813 return ERR_PTR(-ENOMEM); 7814 7815 cmd = (struct wmi_wow_nlo_config_cmd *)skb->data; 7816 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_NLO_CONFIG_CMD, len); 7817 7818 cmd->vdev_id = cpu_to_le32(vdev_id); 7819 cmd->flags = cpu_to_le32(WMI_NLO_CONFIG_STOP); 7820 7821 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 7822 "wmi tlv stop pno config vdev_id %d\n", vdev_id); 7823 return skb; 7824 } 7825 7826 int ath12k_wmi_wow_config_pno(struct ath12k *ar, u32 vdev_id, 7827 struct wmi_pno_scan_req_arg *pno_scan) 7828 { 7829 struct sk_buff *skb; 7830 7831 if (pno_scan->enable) 7832 skb = ath12k_wmi_op_gen_config_pno_start(ar, vdev_id, pno_scan); 7833 else 7834 skb = ath12k_wmi_op_gen_config_pno_stop(ar, vdev_id); 7835 7836 if (IS_ERR_OR_NULL(skb)) 7837 return -ENOMEM; 7838 7839 return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID); 7840 } 7841 7842 static void ath12k_wmi_fill_ns_offload(struct ath12k *ar, 7843 struct wmi_arp_ns_offload_arg *offload, 7844 void **ptr, 7845 bool enable, 7846 bool ext) 7847 { 7848 struct wmi_ns_offload_params *ns; 7849 struct wmi_tlv *tlv; 7850 void *buf_ptr = *ptr; 7851 u32 ns_cnt, ns_ext_tuples; 7852 int i, max_offloads; 7853 7854 ns_cnt = offload->ipv6_count; 7855 7856 tlv = buf_ptr; 7857 7858 if (ext) { 7859 ns_ext_tuples = offload->ipv6_count - WMI_MAX_NS_OFFLOADS; 7860 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 7861 ns_ext_tuples * sizeof(*ns)); 7862 i = WMI_MAX_NS_OFFLOADS; 7863 max_offloads = offload->ipv6_count; 7864 } else { 7865 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 7866 WMI_MAX_NS_OFFLOADS * sizeof(*ns)); 7867 i = 0; 7868 max_offloads = WMI_MAX_NS_OFFLOADS; 7869 } 7870 7871 buf_ptr += sizeof(*tlv); 7872 7873 for (; i < max_offloads; i++) { 7874 ns = buf_ptr; 7875 ns->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_NS_OFFLOAD_TUPLE, 7876 sizeof(*ns)); 7877 7878 if (enable) { 7879 if (i < ns_cnt) 7880 ns->flags |= cpu_to_le32(WMI_NSOL_FLAGS_VALID); 7881 7882 memcpy(ns->target_ipaddr[0], offload->ipv6_addr[i], 16); 7883 memcpy(ns->solicitation_ipaddr, offload->self_ipv6_addr[i], 16); 7884 7885 if (offload->ipv6_type[i]) 7886 ns->flags |= cpu_to_le32(WMI_NSOL_FLAGS_IS_IPV6_ANYCAST); 7887 7888 memcpy(ns->target_mac.addr, offload->mac_addr, ETH_ALEN); 7889 7890 if (!is_zero_ether_addr(ns->target_mac.addr)) 7891 ns->flags |= cpu_to_le32(WMI_NSOL_FLAGS_MAC_VALID); 7892 7893 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 7894 "wmi index %d ns_solicited %pI6 target %pI6", 7895 i, ns->solicitation_ipaddr, 7896 ns->target_ipaddr[0]); 7897 } 7898 7899 buf_ptr += sizeof(*ns); 7900 } 7901 7902 *ptr = buf_ptr; 7903 } 7904 7905 static void ath12k_wmi_fill_arp_offload(struct ath12k *ar, 7906 struct wmi_arp_ns_offload_arg *offload, 7907 void **ptr, 7908 bool enable) 7909 { 7910 struct wmi_arp_offload_params *arp; 7911 struct wmi_tlv *tlv; 7912 void *buf_ptr = *ptr; 7913 int i; 7914 7915 /* fill arp tuple */ 7916 tlv = buf_ptr; 7917 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 7918 WMI_MAX_ARP_OFFLOADS * sizeof(*arp)); 7919 buf_ptr += sizeof(*tlv); 7920 7921 for (i = 0; i < WMI_MAX_ARP_OFFLOADS; i++) { 7922 arp = buf_ptr; 7923 arp->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ARP_OFFLOAD_TUPLE, 7924 sizeof(*arp)); 7925 7926 if (enable && i < offload->ipv4_count) { 7927 /* Copy the target ip addr and flags */ 7928 arp->flags = cpu_to_le32(WMI_ARPOL_FLAGS_VALID); 7929 memcpy(arp->target_ipaddr, offload->ipv4_addr[i], 4); 7930 7931 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi arp offload address %pI4", 7932 arp->target_ipaddr); 7933 } 7934 7935 buf_ptr += sizeof(*arp); 7936 } 7937 7938 *ptr = buf_ptr; 7939 } 7940 7941 int ath12k_wmi_arp_ns_offload(struct ath12k *ar, 7942 struct ath12k_vif *arvif, 7943 struct wmi_arp_ns_offload_arg *offload, 7944 bool enable) 7945 { 7946 struct wmi_set_arp_ns_offload_cmd *cmd; 7947 struct wmi_tlv *tlv; 7948 struct sk_buff *skb; 7949 void *buf_ptr; 7950 size_t len; 7951 u8 ns_cnt, ns_ext_tuples = 0; 7952 7953 ns_cnt = offload->ipv6_count; 7954 7955 len = sizeof(*cmd) + 7956 sizeof(*tlv) + 7957 WMI_MAX_NS_OFFLOADS * sizeof(struct wmi_ns_offload_params) + 7958 sizeof(*tlv) + 7959 WMI_MAX_ARP_OFFLOADS * sizeof(struct wmi_arp_offload_params); 7960 7961 if (ns_cnt > WMI_MAX_NS_OFFLOADS) { 7962 ns_ext_tuples = ns_cnt - WMI_MAX_NS_OFFLOADS; 7963 len += sizeof(*tlv) + 7964 ns_ext_tuples * sizeof(struct wmi_ns_offload_params); 7965 } 7966 7967 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 7968 if (!skb) 7969 return -ENOMEM; 7970 7971 buf_ptr = skb->data; 7972 cmd = buf_ptr; 7973 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_SET_ARP_NS_OFFLOAD_CMD, 7974 sizeof(*cmd)); 7975 cmd->flags = cpu_to_le32(0); 7976 cmd->vdev_id = cpu_to_le32(arvif->vdev_id); 7977 cmd->num_ns_ext_tuples = cpu_to_le32(ns_ext_tuples); 7978 7979 buf_ptr += sizeof(*cmd); 7980 7981 ath12k_wmi_fill_ns_offload(ar, offload, &buf_ptr, enable, 0); 7982 ath12k_wmi_fill_arp_offload(ar, offload, &buf_ptr, enable); 7983 7984 if (ns_ext_tuples) 7985 ath12k_wmi_fill_ns_offload(ar, offload, &buf_ptr, enable, 1); 7986 7987 return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_SET_ARP_NS_OFFLOAD_CMDID); 7988 } 7989 7990 int ath12k_wmi_gtk_rekey_offload(struct ath12k *ar, 7991 struct ath12k_vif *arvif, bool enable) 7992 { 7993 struct ath12k_rekey_data *rekey_data = &arvif->rekey_data; 7994 struct wmi_gtk_rekey_offload_cmd *cmd; 7995 struct sk_buff *skb; 7996 __le64 replay_ctr; 7997 int len; 7998 7999 len = sizeof(*cmd); 8000 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 8001 if (!skb) 8002 return -ENOMEM; 8003 8004 cmd = (struct wmi_gtk_rekey_offload_cmd *)skb->data; 8005 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_GTK_OFFLOAD_CMD, sizeof(*cmd)); 8006 cmd->vdev_id = cpu_to_le32(arvif->vdev_id); 8007 8008 if (enable) { 8009 cmd->flags = cpu_to_le32(GTK_OFFLOAD_ENABLE_OPCODE); 8010 8011 /* the length in rekey_data and cmd is equal */ 8012 memcpy(cmd->kck, rekey_data->kck, sizeof(cmd->kck)); 8013 memcpy(cmd->kek, rekey_data->kek, sizeof(cmd->kek)); 8014 8015 replay_ctr = cpu_to_le64(rekey_data->replay_ctr); 8016 memcpy(cmd->replay_ctr, &replay_ctr, 8017 sizeof(replay_ctr)); 8018 } else { 8019 cmd->flags = cpu_to_le32(GTK_OFFLOAD_DISABLE_OPCODE); 8020 } 8021 8022 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "offload gtk rekey vdev: %d %d\n", 8023 arvif->vdev_id, enable); 8024 return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_GTK_OFFLOAD_CMDID); 8025 } 8026 8027 int ath12k_wmi_gtk_rekey_getinfo(struct ath12k *ar, 8028 struct ath12k_vif *arvif) 8029 { 8030 struct wmi_gtk_rekey_offload_cmd *cmd; 8031 struct sk_buff *skb; 8032 int len; 8033 8034 len = sizeof(*cmd); 8035 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 8036 if (!skb) 8037 return -ENOMEM; 8038 8039 cmd = (struct wmi_gtk_rekey_offload_cmd *)skb->data; 8040 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_GTK_OFFLOAD_CMD, sizeof(*cmd)); 8041 cmd->vdev_id = cpu_to_le32(arvif->vdev_id); 8042 cmd->flags = cpu_to_le32(GTK_OFFLOAD_REQUEST_STATUS_OPCODE); 8043 8044 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "get gtk rekey vdev_id: %d\n", 8045 arvif->vdev_id); 8046 return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_GTK_OFFLOAD_CMDID); 8047 } 8048 8049 int ath12k_wmi_sta_keepalive(struct ath12k *ar, 8050 const struct wmi_sta_keepalive_arg *arg) 8051 { 8052 struct wmi_sta_keepalive_arp_resp_params *arp; 8053 struct ath12k_wmi_pdev *wmi = ar->wmi; 8054 struct wmi_sta_keepalive_cmd *cmd; 8055 struct sk_buff *skb; 8056 size_t len; 8057 8058 len = sizeof(*cmd) + sizeof(*arp); 8059 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 8060 if (!skb) 8061 return -ENOMEM; 8062 8063 cmd = (struct wmi_sta_keepalive_cmd *)skb->data; 8064 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STA_KEEPALIVE_CMD, sizeof(*cmd)); 8065 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 8066 cmd->enabled = cpu_to_le32(arg->enabled); 8067 cmd->interval = cpu_to_le32(arg->interval); 8068 cmd->method = cpu_to_le32(arg->method); 8069 8070 arp = (struct wmi_sta_keepalive_arp_resp_params *)(cmd + 1); 8071 arp->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STA_KEEPALVE_ARP_RESPONSE, 8072 sizeof(*arp)); 8073 if (arg->method == WMI_STA_KEEPALIVE_METHOD_UNSOLICITED_ARP_RESPONSE || 8074 arg->method == WMI_STA_KEEPALIVE_METHOD_GRATUITOUS_ARP_REQUEST) { 8075 arp->src_ip4_addr = cpu_to_le32(arg->src_ip4_addr); 8076 arp->dest_ip4_addr = cpu_to_le32(arg->dest_ip4_addr); 8077 ether_addr_copy(arp->dest_mac_addr.addr, arg->dest_mac_addr); 8078 } 8079 8080 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 8081 "wmi sta keepalive vdev %d enabled %d method %d interval %d\n", 8082 arg->vdev_id, arg->enabled, arg->method, arg->interval); 8083 8084 return ath12k_wmi_cmd_send(wmi, skb, WMI_STA_KEEPALIVE_CMDID); 8085 } 8086