1 // SPDX-License-Identifier: BSD-3-Clause-Clear 2 /* 3 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved. 4 * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved. 5 */ 6 #include <linux/skbuff.h> 7 #include <linux/ctype.h> 8 #include <net/mac80211.h> 9 #include <net/cfg80211.h> 10 #include <linux/completion.h> 11 #include <linux/if_ether.h> 12 #include <linux/types.h> 13 #include <linux/pci.h> 14 #include <linux/uuid.h> 15 #include <linux/time.h> 16 #include <linux/of.h> 17 #include "core.h" 18 #include "debug.h" 19 #include "mac.h" 20 #include "hw.h" 21 #include "peer.h" 22 #include "p2p.h" 23 24 struct ath12k_wmi_svc_ready_parse { 25 bool wmi_svc_bitmap_done; 26 }; 27 28 struct ath12k_wmi_dma_ring_caps_parse { 29 struct ath12k_wmi_dma_ring_caps_params *dma_ring_caps; 30 u32 n_dma_ring_caps; 31 }; 32 33 struct ath12k_wmi_service_ext_arg { 34 u32 default_conc_scan_config_bits; 35 u32 default_fw_config_bits; 36 struct ath12k_wmi_ppe_threshold_arg ppet; 37 u32 he_cap_info; 38 u32 mpdu_density; 39 u32 max_bssid_rx_filters; 40 u32 num_hw_modes; 41 u32 num_phy; 42 }; 43 44 struct ath12k_wmi_svc_rdy_ext_parse { 45 struct ath12k_wmi_service_ext_arg arg; 46 const struct ath12k_wmi_soc_mac_phy_hw_mode_caps_params *hw_caps; 47 const struct ath12k_wmi_hw_mode_cap_params *hw_mode_caps; 48 u32 n_hw_mode_caps; 49 u32 tot_phy_id; 50 struct ath12k_wmi_hw_mode_cap_params pref_hw_mode_caps; 51 struct ath12k_wmi_mac_phy_caps_params *mac_phy_caps; 52 u32 n_mac_phy_caps; 53 const struct ath12k_wmi_soc_hal_reg_caps_params *soc_hal_reg_caps; 54 const struct ath12k_wmi_hal_reg_caps_ext_params *ext_hal_reg_caps; 55 u32 n_ext_hal_reg_caps; 56 struct ath12k_wmi_dma_ring_caps_parse dma_caps_parse; 57 bool hw_mode_done; 58 bool mac_phy_done; 59 bool ext_hal_reg_done; 60 bool mac_phy_chainmask_combo_done; 61 bool mac_phy_chainmask_cap_done; 62 bool oem_dma_ring_cap_done; 63 bool dma_ring_cap_done; 64 }; 65 66 struct ath12k_wmi_svc_rdy_ext2_arg { 67 u32 reg_db_version; 68 u32 hw_min_max_tx_power_2ghz; 69 u32 hw_min_max_tx_power_5ghz; 70 u32 chwidth_num_peer_caps; 71 u32 preamble_puncture_bw; 72 u32 max_user_per_ppdu_ofdma; 73 u32 max_user_per_ppdu_mumimo; 74 u32 target_cap_flags; 75 u32 eht_cap_mac_info[WMI_MAX_EHTCAP_MAC_SIZE]; 76 u32 max_num_linkview_peers; 77 u32 max_num_msduq_supported_per_tid; 78 u32 default_num_msduq_supported_per_tid; 79 }; 80 81 struct ath12k_wmi_svc_rdy_ext2_parse { 82 struct ath12k_wmi_svc_rdy_ext2_arg arg; 83 struct ath12k_wmi_dma_ring_caps_parse dma_caps_parse; 84 bool dma_ring_cap_done; 85 bool spectral_bin_scaling_done; 86 bool mac_phy_caps_ext_done; 87 }; 88 89 struct ath12k_wmi_rdy_parse { 90 u32 num_extra_mac_addr; 91 }; 92 93 struct ath12k_wmi_dma_buf_release_arg { 94 struct ath12k_wmi_dma_buf_release_fixed_params fixed; 95 const struct ath12k_wmi_dma_buf_release_entry_params *buf_entry; 96 const struct ath12k_wmi_dma_buf_release_meta_data_params *meta_data; 97 u32 num_buf_entry; 98 u32 num_meta; 99 bool buf_entry_done; 100 bool meta_data_done; 101 }; 102 103 struct ath12k_wmi_tlv_policy { 104 size_t min_len; 105 }; 106 107 struct wmi_tlv_mgmt_rx_parse { 108 const struct ath12k_wmi_mgmt_rx_params *fixed; 109 const u8 *frame_buf; 110 bool frame_buf_done; 111 }; 112 113 static const struct ath12k_wmi_tlv_policy ath12k_wmi_tlv_policies[] = { 114 [WMI_TAG_ARRAY_BYTE] = { .min_len = 0 }, 115 [WMI_TAG_ARRAY_UINT32] = { .min_len = 0 }, 116 [WMI_TAG_SERVICE_READY_EVENT] = { 117 .min_len = sizeof(struct wmi_service_ready_event) }, 118 [WMI_TAG_SERVICE_READY_EXT_EVENT] = { 119 .min_len = sizeof(struct wmi_service_ready_ext_event) }, 120 [WMI_TAG_SOC_MAC_PHY_HW_MODE_CAPS] = { 121 .min_len = sizeof(struct ath12k_wmi_soc_mac_phy_hw_mode_caps_params) }, 122 [WMI_TAG_SOC_HAL_REG_CAPABILITIES] = { 123 .min_len = sizeof(struct ath12k_wmi_soc_hal_reg_caps_params) }, 124 [WMI_TAG_VDEV_START_RESPONSE_EVENT] = { 125 .min_len = sizeof(struct wmi_vdev_start_resp_event) }, 126 [WMI_TAG_PEER_DELETE_RESP_EVENT] = { 127 .min_len = sizeof(struct wmi_peer_delete_resp_event) }, 128 [WMI_TAG_OFFLOAD_BCN_TX_STATUS_EVENT] = { 129 .min_len = sizeof(struct wmi_bcn_tx_status_event) }, 130 [WMI_TAG_VDEV_STOPPED_EVENT] = { 131 .min_len = sizeof(struct wmi_vdev_stopped_event) }, 132 [WMI_TAG_REG_CHAN_LIST_CC_EXT_EVENT] = { 133 .min_len = sizeof(struct wmi_reg_chan_list_cc_ext_event) }, 134 [WMI_TAG_MGMT_RX_HDR] = { 135 .min_len = sizeof(struct ath12k_wmi_mgmt_rx_params) }, 136 [WMI_TAG_MGMT_TX_COMPL_EVENT] = { 137 .min_len = sizeof(struct wmi_mgmt_tx_compl_event) }, 138 [WMI_TAG_SCAN_EVENT] = { 139 .min_len = sizeof(struct wmi_scan_event) }, 140 [WMI_TAG_PEER_STA_KICKOUT_EVENT] = { 141 .min_len = sizeof(struct wmi_peer_sta_kickout_event) }, 142 [WMI_TAG_ROAM_EVENT] = { 143 .min_len = sizeof(struct wmi_roam_event) }, 144 [WMI_TAG_CHAN_INFO_EVENT] = { 145 .min_len = sizeof(struct wmi_chan_info_event) }, 146 [WMI_TAG_PDEV_BSS_CHAN_INFO_EVENT] = { 147 .min_len = sizeof(struct wmi_pdev_bss_chan_info_event) }, 148 [WMI_TAG_VDEV_INSTALL_KEY_COMPLETE_EVENT] = { 149 .min_len = sizeof(struct wmi_vdev_install_key_compl_event) }, 150 [WMI_TAG_READY_EVENT] = { 151 .min_len = sizeof(struct ath12k_wmi_ready_event_min_params) }, 152 [WMI_TAG_SERVICE_AVAILABLE_EVENT] = { 153 .min_len = sizeof(struct wmi_service_available_event) }, 154 [WMI_TAG_PEER_ASSOC_CONF_EVENT] = { 155 .min_len = sizeof(struct wmi_peer_assoc_conf_event) }, 156 [WMI_TAG_RFKILL_EVENT] = { 157 .min_len = sizeof(struct wmi_rfkill_state_change_event) }, 158 [WMI_TAG_PDEV_CTL_FAILSAFE_CHECK_EVENT] = { 159 .min_len = sizeof(struct wmi_pdev_ctl_failsafe_chk_event) }, 160 [WMI_TAG_HOST_SWFDA_EVENT] = { 161 .min_len = sizeof(struct wmi_fils_discovery_event) }, 162 [WMI_TAG_OFFLOAD_PRB_RSP_TX_STATUS_EVENT] = { 163 .min_len = sizeof(struct wmi_probe_resp_tx_status_event) }, 164 [WMI_TAG_VDEV_DELETE_RESP_EVENT] = { 165 .min_len = sizeof(struct wmi_vdev_delete_resp_event) }, 166 [WMI_TAG_TWT_ENABLE_COMPLETE_EVENT] = { 167 .min_len = sizeof(struct wmi_twt_enable_event) }, 168 [WMI_TAG_TWT_DISABLE_COMPLETE_EVENT] = { 169 .min_len = sizeof(struct wmi_twt_disable_event) }, 170 [WMI_TAG_P2P_NOA_INFO] = { 171 .min_len = sizeof(struct ath12k_wmi_p2p_noa_info) }, 172 [WMI_TAG_P2P_NOA_EVENT] = { 173 .min_len = sizeof(struct wmi_p2p_noa_event) }, 174 }; 175 176 static __le32 ath12k_wmi_tlv_hdr(u32 cmd, u32 len) 177 { 178 return le32_encode_bits(cmd, WMI_TLV_TAG) | 179 le32_encode_bits(len, WMI_TLV_LEN); 180 } 181 182 static __le32 ath12k_wmi_tlv_cmd_hdr(u32 cmd, u32 len) 183 { 184 return ath12k_wmi_tlv_hdr(cmd, len - TLV_HDR_SIZE); 185 } 186 187 void ath12k_wmi_init_qcn9274(struct ath12k_base *ab, 188 struct ath12k_wmi_resource_config_arg *config) 189 { 190 config->num_vdevs = ab->num_radios * TARGET_NUM_VDEVS; 191 config->num_peers = ab->num_radios * 192 ath12k_core_get_max_peers_per_radio(ab); 193 config->num_tids = ath12k_core_get_max_num_tids(ab); 194 config->num_offload_peers = TARGET_NUM_OFFLD_PEERS; 195 config->num_offload_reorder_buffs = TARGET_NUM_OFFLD_REORDER_BUFFS; 196 config->num_peer_keys = TARGET_NUM_PEER_KEYS; 197 config->ast_skid_limit = TARGET_AST_SKID_LIMIT; 198 config->tx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1; 199 config->rx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1; 200 config->rx_timeout_pri[0] = TARGET_RX_TIMEOUT_LO_PRI; 201 config->rx_timeout_pri[1] = TARGET_RX_TIMEOUT_LO_PRI; 202 config->rx_timeout_pri[2] = TARGET_RX_TIMEOUT_LO_PRI; 203 config->rx_timeout_pri[3] = TARGET_RX_TIMEOUT_HI_PRI; 204 205 if (test_bit(ATH12K_FLAG_RAW_MODE, &ab->dev_flags)) 206 config->rx_decap_mode = TARGET_DECAP_MODE_RAW; 207 else 208 config->rx_decap_mode = TARGET_DECAP_MODE_NATIVE_WIFI; 209 210 config->scan_max_pending_req = TARGET_SCAN_MAX_PENDING_REQS; 211 config->bmiss_offload_max_vdev = TARGET_BMISS_OFFLOAD_MAX_VDEV; 212 config->roam_offload_max_vdev = TARGET_ROAM_OFFLOAD_MAX_VDEV; 213 config->roam_offload_max_ap_profiles = TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES; 214 config->num_mcast_groups = TARGET_NUM_MCAST_GROUPS; 215 config->num_mcast_table_elems = TARGET_NUM_MCAST_TABLE_ELEMS; 216 config->mcast2ucast_mode = TARGET_MCAST2UCAST_MODE; 217 config->tx_dbg_log_size = TARGET_TX_DBG_LOG_SIZE; 218 config->num_wds_entries = TARGET_NUM_WDS_ENTRIES; 219 config->dma_burst_size = TARGET_DMA_BURST_SIZE; 220 config->rx_skip_defrag_timeout_dup_detection_check = 221 TARGET_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK; 222 config->vow_config = TARGET_VOW_CONFIG; 223 config->gtk_offload_max_vdev = TARGET_GTK_OFFLOAD_MAX_VDEV; 224 config->num_msdu_desc = TARGET_NUM_MSDU_DESC; 225 config->beacon_tx_offload_max_vdev = ab->num_radios * TARGET_MAX_BCN_OFFLD; 226 config->rx_batchmode = TARGET_RX_BATCHMODE; 227 /* Indicates host supports peer map v3 and unmap v2 support */ 228 config->peer_map_unmap_version = 0x32; 229 config->twt_ap_pdev_count = ab->num_radios; 230 config->twt_ap_sta_count = 1000; 231 232 if (test_bit(WMI_TLV_SERVICE_PEER_METADATA_V1A_V1B_SUPPORT, ab->wmi_ab.svc_map)) 233 config->dp_peer_meta_data_ver = TARGET_RX_PEER_METADATA_VER_V1B; 234 } 235 236 void ath12k_wmi_init_wcn7850(struct ath12k_base *ab, 237 struct ath12k_wmi_resource_config_arg *config) 238 { 239 config->num_vdevs = 4; 240 config->num_peers = 16; 241 config->num_tids = 32; 242 243 config->num_offload_peers = 3; 244 config->num_offload_reorder_buffs = 3; 245 config->num_peer_keys = TARGET_NUM_PEER_KEYS; 246 config->ast_skid_limit = TARGET_AST_SKID_LIMIT; 247 config->tx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1; 248 config->rx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1; 249 config->rx_timeout_pri[0] = TARGET_RX_TIMEOUT_LO_PRI; 250 config->rx_timeout_pri[1] = TARGET_RX_TIMEOUT_LO_PRI; 251 config->rx_timeout_pri[2] = TARGET_RX_TIMEOUT_LO_PRI; 252 config->rx_timeout_pri[3] = TARGET_RX_TIMEOUT_HI_PRI; 253 config->rx_decap_mode = TARGET_DECAP_MODE_NATIVE_WIFI; 254 config->scan_max_pending_req = TARGET_SCAN_MAX_PENDING_REQS; 255 config->bmiss_offload_max_vdev = TARGET_BMISS_OFFLOAD_MAX_VDEV; 256 config->roam_offload_max_vdev = TARGET_ROAM_OFFLOAD_MAX_VDEV; 257 config->roam_offload_max_ap_profiles = TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES; 258 config->num_mcast_groups = 0; 259 config->num_mcast_table_elems = 0; 260 config->mcast2ucast_mode = 0; 261 config->tx_dbg_log_size = TARGET_TX_DBG_LOG_SIZE; 262 config->num_wds_entries = 0; 263 config->dma_burst_size = 0; 264 config->rx_skip_defrag_timeout_dup_detection_check = 0; 265 config->vow_config = TARGET_VOW_CONFIG; 266 config->gtk_offload_max_vdev = 2; 267 config->num_msdu_desc = 0x400; 268 config->beacon_tx_offload_max_vdev = 2; 269 config->rx_batchmode = TARGET_RX_BATCHMODE; 270 271 config->peer_map_unmap_version = 0x1; 272 config->use_pdev_id = 1; 273 config->max_frag_entries = 0xa; 274 config->num_tdls_vdevs = 0x1; 275 config->num_tdls_conn_table_entries = 8; 276 config->beacon_tx_offload_max_vdev = 0x2; 277 config->num_multicast_filter_entries = 0x20; 278 config->num_wow_filters = 0x16; 279 config->num_keep_alive_pattern = 0; 280 } 281 282 #define PRIMAP(_hw_mode_) \ 283 [_hw_mode_] = _hw_mode_##_PRI 284 285 static const int ath12k_hw_mode_pri_map[] = { 286 PRIMAP(WMI_HOST_HW_MODE_SINGLE), 287 PRIMAP(WMI_HOST_HW_MODE_DBS), 288 PRIMAP(WMI_HOST_HW_MODE_SBS_PASSIVE), 289 PRIMAP(WMI_HOST_HW_MODE_SBS), 290 PRIMAP(WMI_HOST_HW_MODE_DBS_SBS), 291 PRIMAP(WMI_HOST_HW_MODE_DBS_OR_SBS), 292 /* keep last */ 293 PRIMAP(WMI_HOST_HW_MODE_MAX), 294 }; 295 296 static int 297 ath12k_wmi_tlv_iter(struct ath12k_base *ab, const void *ptr, size_t len, 298 int (*iter)(struct ath12k_base *ab, u16 tag, u16 len, 299 const void *ptr, void *data), 300 void *data) 301 { 302 const void *begin = ptr; 303 const struct wmi_tlv *tlv; 304 u16 tlv_tag, tlv_len; 305 int ret; 306 307 while (len > 0) { 308 if (len < sizeof(*tlv)) { 309 ath12k_err(ab, "wmi tlv parse failure at byte %zd (%zu bytes left, %zu expected)\n", 310 ptr - begin, len, sizeof(*tlv)); 311 return -EINVAL; 312 } 313 314 tlv = ptr; 315 tlv_tag = le32_get_bits(tlv->header, WMI_TLV_TAG); 316 tlv_len = le32_get_bits(tlv->header, WMI_TLV_LEN); 317 ptr += sizeof(*tlv); 318 len -= sizeof(*tlv); 319 320 if (tlv_len > len) { 321 ath12k_err(ab, "wmi tlv parse failure of tag %u at byte %zd (%zu bytes left, %u expected)\n", 322 tlv_tag, ptr - begin, len, tlv_len); 323 return -EINVAL; 324 } 325 326 if (tlv_tag < ARRAY_SIZE(ath12k_wmi_tlv_policies) && 327 ath12k_wmi_tlv_policies[tlv_tag].min_len && 328 ath12k_wmi_tlv_policies[tlv_tag].min_len > tlv_len) { 329 ath12k_err(ab, "wmi tlv parse failure of tag %u at byte %zd (%u bytes is less than min length %zu)\n", 330 tlv_tag, ptr - begin, tlv_len, 331 ath12k_wmi_tlv_policies[tlv_tag].min_len); 332 return -EINVAL; 333 } 334 335 ret = iter(ab, tlv_tag, tlv_len, ptr, data); 336 if (ret) 337 return ret; 338 339 ptr += tlv_len; 340 len -= tlv_len; 341 } 342 343 return 0; 344 } 345 346 static int ath12k_wmi_tlv_iter_parse(struct ath12k_base *ab, u16 tag, u16 len, 347 const void *ptr, void *data) 348 { 349 const void **tb = data; 350 351 if (tag < WMI_TAG_MAX) 352 tb[tag] = ptr; 353 354 return 0; 355 } 356 357 static int ath12k_wmi_tlv_parse(struct ath12k_base *ar, const void **tb, 358 const void *ptr, size_t len) 359 { 360 return ath12k_wmi_tlv_iter(ar, ptr, len, ath12k_wmi_tlv_iter_parse, 361 (void *)tb); 362 } 363 364 static const void ** 365 ath12k_wmi_tlv_parse_alloc(struct ath12k_base *ab, 366 struct sk_buff *skb, gfp_t gfp) 367 { 368 const void **tb; 369 int ret; 370 371 tb = kcalloc(WMI_TAG_MAX, sizeof(*tb), gfp); 372 if (!tb) 373 return ERR_PTR(-ENOMEM); 374 375 ret = ath12k_wmi_tlv_parse(ab, tb, skb->data, skb->len); 376 if (ret) { 377 kfree(tb); 378 return ERR_PTR(ret); 379 } 380 381 return tb; 382 } 383 384 static int ath12k_wmi_cmd_send_nowait(struct ath12k_wmi_pdev *wmi, struct sk_buff *skb, 385 u32 cmd_id) 386 { 387 struct ath12k_skb_cb *skb_cb = ATH12K_SKB_CB(skb); 388 struct ath12k_base *ab = wmi->wmi_ab->ab; 389 struct wmi_cmd_hdr *cmd_hdr; 390 int ret; 391 392 if (!skb_push(skb, sizeof(struct wmi_cmd_hdr))) 393 return -ENOMEM; 394 395 cmd_hdr = (struct wmi_cmd_hdr *)skb->data; 396 cmd_hdr->cmd_id = le32_encode_bits(cmd_id, WMI_CMD_HDR_CMD_ID); 397 398 memset(skb_cb, 0, sizeof(*skb_cb)); 399 ret = ath12k_htc_send(&ab->htc, wmi->eid, skb); 400 401 if (ret) 402 goto err_pull; 403 404 return 0; 405 406 err_pull: 407 skb_pull(skb, sizeof(struct wmi_cmd_hdr)); 408 return ret; 409 } 410 411 int ath12k_wmi_cmd_send(struct ath12k_wmi_pdev *wmi, struct sk_buff *skb, 412 u32 cmd_id) 413 { 414 struct ath12k_wmi_base *wmi_ab = wmi->wmi_ab; 415 int ret = -EOPNOTSUPP; 416 417 might_sleep(); 418 419 wait_event_timeout(wmi_ab->tx_credits_wq, ({ 420 ret = ath12k_wmi_cmd_send_nowait(wmi, skb, cmd_id); 421 422 if (ret && test_bit(ATH12K_FLAG_CRASH_FLUSH, &wmi_ab->ab->dev_flags)) 423 ret = -ESHUTDOWN; 424 425 (ret != -EAGAIN); 426 }), WMI_SEND_TIMEOUT_HZ); 427 428 if (ret == -EAGAIN) 429 ath12k_warn(wmi_ab->ab, "wmi command %d timeout\n", cmd_id); 430 431 return ret; 432 } 433 434 static int ath12k_pull_svc_ready_ext(struct ath12k_wmi_pdev *wmi_handle, 435 const void *ptr, 436 struct ath12k_wmi_service_ext_arg *arg) 437 { 438 const struct wmi_service_ready_ext_event *ev = ptr; 439 int i; 440 441 if (!ev) 442 return -EINVAL; 443 444 /* Move this to host based bitmap */ 445 arg->default_conc_scan_config_bits = 446 le32_to_cpu(ev->default_conc_scan_config_bits); 447 arg->default_fw_config_bits = le32_to_cpu(ev->default_fw_config_bits); 448 arg->he_cap_info = le32_to_cpu(ev->he_cap_info); 449 arg->mpdu_density = le32_to_cpu(ev->mpdu_density); 450 arg->max_bssid_rx_filters = le32_to_cpu(ev->max_bssid_rx_filters); 451 arg->ppet.numss_m1 = le32_to_cpu(ev->ppet.numss_m1); 452 arg->ppet.ru_bit_mask = le32_to_cpu(ev->ppet.ru_info); 453 454 for (i = 0; i < WMI_MAX_NUM_SS; i++) 455 arg->ppet.ppet16_ppet8_ru3_ru0[i] = 456 le32_to_cpu(ev->ppet.ppet16_ppet8_ru3_ru0[i]); 457 458 return 0; 459 } 460 461 static int 462 ath12k_pull_mac_phy_cap_svc_ready_ext(struct ath12k_wmi_pdev *wmi_handle, 463 struct ath12k_wmi_svc_rdy_ext_parse *svc, 464 u8 hw_mode_id, u8 phy_id, 465 struct ath12k_pdev *pdev) 466 { 467 const struct ath12k_wmi_mac_phy_caps_params *mac_caps; 468 const struct ath12k_wmi_soc_mac_phy_hw_mode_caps_params *hw_caps = svc->hw_caps; 469 const struct ath12k_wmi_hw_mode_cap_params *wmi_hw_mode_caps = svc->hw_mode_caps; 470 const struct ath12k_wmi_mac_phy_caps_params *wmi_mac_phy_caps = svc->mac_phy_caps; 471 struct ath12k_base *ab = wmi_handle->wmi_ab->ab; 472 struct ath12k_band_cap *cap_band; 473 struct ath12k_pdev_cap *pdev_cap = &pdev->cap; 474 struct ath12k_fw_pdev *fw_pdev; 475 u32 phy_map; 476 u32 hw_idx, phy_idx = 0; 477 int i; 478 479 if (!hw_caps || !wmi_hw_mode_caps || !svc->soc_hal_reg_caps) 480 return -EINVAL; 481 482 for (hw_idx = 0; hw_idx < le32_to_cpu(hw_caps->num_hw_modes); hw_idx++) { 483 if (hw_mode_id == le32_to_cpu(wmi_hw_mode_caps[hw_idx].hw_mode_id)) 484 break; 485 486 phy_map = le32_to_cpu(wmi_hw_mode_caps[hw_idx].phy_id_map); 487 phy_idx = fls(phy_map); 488 } 489 490 if (hw_idx == le32_to_cpu(hw_caps->num_hw_modes)) 491 return -EINVAL; 492 493 phy_idx += phy_id; 494 if (phy_id >= le32_to_cpu(svc->soc_hal_reg_caps->num_phy)) 495 return -EINVAL; 496 497 mac_caps = wmi_mac_phy_caps + phy_idx; 498 499 pdev->pdev_id = ath12k_wmi_mac_phy_get_pdev_id(mac_caps); 500 pdev_cap->supported_bands |= le32_to_cpu(mac_caps->supported_bands); 501 pdev_cap->ampdu_density = le32_to_cpu(mac_caps->ampdu_density); 502 503 fw_pdev = &ab->fw_pdev[ab->fw_pdev_count]; 504 fw_pdev->supported_bands = le32_to_cpu(mac_caps->supported_bands); 505 fw_pdev->pdev_id = ath12k_wmi_mac_phy_get_pdev_id(mac_caps); 506 fw_pdev->phy_id = le32_to_cpu(mac_caps->phy_id); 507 ab->fw_pdev_count++; 508 509 /* Take non-zero tx/rx chainmask. If tx/rx chainmask differs from 510 * band to band for a single radio, need to see how this should be 511 * handled. 512 */ 513 if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_2G_CAP) { 514 pdev_cap->tx_chain_mask = le32_to_cpu(mac_caps->tx_chain_mask_2g); 515 pdev_cap->rx_chain_mask = le32_to_cpu(mac_caps->rx_chain_mask_2g); 516 } else if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_5G_CAP) { 517 pdev_cap->vht_cap = le32_to_cpu(mac_caps->vht_cap_info_5g); 518 pdev_cap->vht_mcs = le32_to_cpu(mac_caps->vht_supp_mcs_5g); 519 pdev_cap->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_5g); 520 pdev_cap->tx_chain_mask = le32_to_cpu(mac_caps->tx_chain_mask_5g); 521 pdev_cap->rx_chain_mask = le32_to_cpu(mac_caps->rx_chain_mask_5g); 522 } else { 523 return -EINVAL; 524 } 525 526 /* tx/rx chainmask reported from fw depends on the actual hw chains used, 527 * For example, for 4x4 capable macphys, first 4 chains can be used for first 528 * mac and the remaining 4 chains can be used for the second mac or vice-versa. 529 * In this case, tx/rx chainmask 0xf will be advertised for first mac and 0xf0 530 * will be advertised for second mac or vice-versa. Compute the shift value 531 * for tx/rx chainmask which will be used to advertise supported ht/vht rates to 532 * mac80211. 533 */ 534 pdev_cap->tx_chain_mask_shift = 535 find_first_bit((unsigned long *)&pdev_cap->tx_chain_mask, 32); 536 pdev_cap->rx_chain_mask_shift = 537 find_first_bit((unsigned long *)&pdev_cap->rx_chain_mask, 32); 538 539 if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_2G_CAP) { 540 cap_band = &pdev_cap->band[NL80211_BAND_2GHZ]; 541 cap_band->phy_id = le32_to_cpu(mac_caps->phy_id); 542 cap_band->max_bw_supported = le32_to_cpu(mac_caps->max_bw_supported_2g); 543 cap_band->ht_cap_info = le32_to_cpu(mac_caps->ht_cap_info_2g); 544 cap_band->he_cap_info[0] = le32_to_cpu(mac_caps->he_cap_info_2g); 545 cap_band->he_cap_info[1] = le32_to_cpu(mac_caps->he_cap_info_2g_ext); 546 cap_band->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_2g); 547 for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++) 548 cap_band->he_cap_phy_info[i] = 549 le32_to_cpu(mac_caps->he_cap_phy_info_2g[i]); 550 551 cap_band->he_ppet.numss_m1 = le32_to_cpu(mac_caps->he_ppet2g.numss_m1); 552 cap_band->he_ppet.ru_bit_mask = le32_to_cpu(mac_caps->he_ppet2g.ru_info); 553 554 for (i = 0; i < WMI_MAX_NUM_SS; i++) 555 cap_band->he_ppet.ppet16_ppet8_ru3_ru0[i] = 556 le32_to_cpu(mac_caps->he_ppet2g.ppet16_ppet8_ru3_ru0[i]); 557 } 558 559 if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_5G_CAP) { 560 cap_band = &pdev_cap->band[NL80211_BAND_5GHZ]; 561 cap_band->phy_id = le32_to_cpu(mac_caps->phy_id); 562 cap_band->max_bw_supported = 563 le32_to_cpu(mac_caps->max_bw_supported_5g); 564 cap_band->ht_cap_info = le32_to_cpu(mac_caps->ht_cap_info_5g); 565 cap_band->he_cap_info[0] = le32_to_cpu(mac_caps->he_cap_info_5g); 566 cap_band->he_cap_info[1] = le32_to_cpu(mac_caps->he_cap_info_5g_ext); 567 cap_band->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_5g); 568 for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++) 569 cap_band->he_cap_phy_info[i] = 570 le32_to_cpu(mac_caps->he_cap_phy_info_5g[i]); 571 572 cap_band->he_ppet.numss_m1 = le32_to_cpu(mac_caps->he_ppet5g.numss_m1); 573 cap_band->he_ppet.ru_bit_mask = le32_to_cpu(mac_caps->he_ppet5g.ru_info); 574 575 for (i = 0; i < WMI_MAX_NUM_SS; i++) 576 cap_band->he_ppet.ppet16_ppet8_ru3_ru0[i] = 577 le32_to_cpu(mac_caps->he_ppet5g.ppet16_ppet8_ru3_ru0[i]); 578 579 cap_band = &pdev_cap->band[NL80211_BAND_6GHZ]; 580 cap_band->max_bw_supported = 581 le32_to_cpu(mac_caps->max_bw_supported_5g); 582 cap_band->ht_cap_info = le32_to_cpu(mac_caps->ht_cap_info_5g); 583 cap_band->he_cap_info[0] = le32_to_cpu(mac_caps->he_cap_info_5g); 584 cap_band->he_cap_info[1] = le32_to_cpu(mac_caps->he_cap_info_5g_ext); 585 cap_band->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_5g); 586 for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++) 587 cap_band->he_cap_phy_info[i] = 588 le32_to_cpu(mac_caps->he_cap_phy_info_5g[i]); 589 590 cap_band->he_ppet.numss_m1 = le32_to_cpu(mac_caps->he_ppet5g.numss_m1); 591 cap_band->he_ppet.ru_bit_mask = le32_to_cpu(mac_caps->he_ppet5g.ru_info); 592 593 for (i = 0; i < WMI_MAX_NUM_SS; i++) 594 cap_band->he_ppet.ppet16_ppet8_ru3_ru0[i] = 595 le32_to_cpu(mac_caps->he_ppet5g.ppet16_ppet8_ru3_ru0[i]); 596 } 597 598 return 0; 599 } 600 601 static int 602 ath12k_pull_reg_cap_svc_rdy_ext(struct ath12k_wmi_pdev *wmi_handle, 603 const struct ath12k_wmi_soc_hal_reg_caps_params *reg_caps, 604 const struct ath12k_wmi_hal_reg_caps_ext_params *ext_caps, 605 u8 phy_idx, 606 struct ath12k_wmi_hal_reg_capabilities_ext_arg *param) 607 { 608 const struct ath12k_wmi_hal_reg_caps_ext_params *ext_reg_cap; 609 610 if (!reg_caps || !ext_caps) 611 return -EINVAL; 612 613 if (phy_idx >= le32_to_cpu(reg_caps->num_phy)) 614 return -EINVAL; 615 616 ext_reg_cap = &ext_caps[phy_idx]; 617 618 param->phy_id = le32_to_cpu(ext_reg_cap->phy_id); 619 param->eeprom_reg_domain = le32_to_cpu(ext_reg_cap->eeprom_reg_domain); 620 param->eeprom_reg_domain_ext = 621 le32_to_cpu(ext_reg_cap->eeprom_reg_domain_ext); 622 param->regcap1 = le32_to_cpu(ext_reg_cap->regcap1); 623 param->regcap2 = le32_to_cpu(ext_reg_cap->regcap2); 624 /* check if param->wireless_mode is needed */ 625 param->low_2ghz_chan = le32_to_cpu(ext_reg_cap->low_2ghz_chan); 626 param->high_2ghz_chan = le32_to_cpu(ext_reg_cap->high_2ghz_chan); 627 param->low_5ghz_chan = le32_to_cpu(ext_reg_cap->low_5ghz_chan); 628 param->high_5ghz_chan = le32_to_cpu(ext_reg_cap->high_5ghz_chan); 629 630 return 0; 631 } 632 633 static int ath12k_pull_service_ready_tlv(struct ath12k_base *ab, 634 const void *evt_buf, 635 struct ath12k_wmi_target_cap_arg *cap) 636 { 637 const struct wmi_service_ready_event *ev = evt_buf; 638 639 if (!ev) { 640 ath12k_err(ab, "%s: failed by NULL param\n", 641 __func__); 642 return -EINVAL; 643 } 644 645 cap->phy_capability = le32_to_cpu(ev->phy_capability); 646 cap->max_frag_entry = le32_to_cpu(ev->max_frag_entry); 647 cap->num_rf_chains = le32_to_cpu(ev->num_rf_chains); 648 cap->ht_cap_info = le32_to_cpu(ev->ht_cap_info); 649 cap->vht_cap_info = le32_to_cpu(ev->vht_cap_info); 650 cap->vht_supp_mcs = le32_to_cpu(ev->vht_supp_mcs); 651 cap->hw_min_tx_power = le32_to_cpu(ev->hw_min_tx_power); 652 cap->hw_max_tx_power = le32_to_cpu(ev->hw_max_tx_power); 653 cap->sys_cap_info = le32_to_cpu(ev->sys_cap_info); 654 cap->min_pkt_size_enable = le32_to_cpu(ev->min_pkt_size_enable); 655 cap->max_bcn_ie_size = le32_to_cpu(ev->max_bcn_ie_size); 656 cap->max_num_scan_channels = le32_to_cpu(ev->max_num_scan_channels); 657 cap->max_supported_macs = le32_to_cpu(ev->max_supported_macs); 658 cap->wmi_fw_sub_feat_caps = le32_to_cpu(ev->wmi_fw_sub_feat_caps); 659 cap->txrx_chainmask = le32_to_cpu(ev->txrx_chainmask); 660 cap->default_dbs_hw_mode_index = le32_to_cpu(ev->default_dbs_hw_mode_index); 661 cap->num_msdu_desc = le32_to_cpu(ev->num_msdu_desc); 662 663 return 0; 664 } 665 666 /* Save the wmi_service_bitmap into a linear bitmap. The wmi_services in 667 * wmi_service ready event are advertised in b0-b3 (LSB 4-bits) of each 668 * 4-byte word. 669 */ 670 static void ath12k_wmi_service_bitmap_copy(struct ath12k_wmi_pdev *wmi, 671 const u32 *wmi_svc_bm) 672 { 673 int i, j; 674 675 for (i = 0, j = 0; i < WMI_SERVICE_BM_SIZE && j < WMI_MAX_SERVICE; i++) { 676 do { 677 if (wmi_svc_bm[i] & BIT(j % WMI_SERVICE_BITS_IN_SIZE32)) 678 set_bit(j, wmi->wmi_ab->svc_map); 679 } while (++j % WMI_SERVICE_BITS_IN_SIZE32); 680 } 681 } 682 683 static int ath12k_wmi_svc_rdy_parse(struct ath12k_base *ab, u16 tag, u16 len, 684 const void *ptr, void *data) 685 { 686 struct ath12k_wmi_svc_ready_parse *svc_ready = data; 687 struct ath12k_wmi_pdev *wmi_handle = &ab->wmi_ab.wmi[0]; 688 u16 expect_len; 689 690 switch (tag) { 691 case WMI_TAG_SERVICE_READY_EVENT: 692 if (ath12k_pull_service_ready_tlv(ab, ptr, &ab->target_caps)) 693 return -EINVAL; 694 break; 695 696 case WMI_TAG_ARRAY_UINT32: 697 if (!svc_ready->wmi_svc_bitmap_done) { 698 expect_len = WMI_SERVICE_BM_SIZE * sizeof(u32); 699 if (len < expect_len) { 700 ath12k_warn(ab, "invalid len %d for the tag 0x%x\n", 701 len, tag); 702 return -EINVAL; 703 } 704 705 ath12k_wmi_service_bitmap_copy(wmi_handle, ptr); 706 707 svc_ready->wmi_svc_bitmap_done = true; 708 } 709 break; 710 default: 711 break; 712 } 713 714 return 0; 715 } 716 717 static int ath12k_service_ready_event(struct ath12k_base *ab, struct sk_buff *skb) 718 { 719 struct ath12k_wmi_svc_ready_parse svc_ready = { }; 720 int ret; 721 722 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 723 ath12k_wmi_svc_rdy_parse, 724 &svc_ready); 725 if (ret) { 726 ath12k_warn(ab, "failed to parse tlv %d\n", ret); 727 return ret; 728 } 729 730 return 0; 731 } 732 733 static u32 ath12k_wmi_mgmt_get_freq(struct ath12k *ar, 734 struct ieee80211_tx_info *info) 735 { 736 struct ath12k_base *ab = ar->ab; 737 u32 freq = 0; 738 739 if (ab->hw_params->single_pdev_only && 740 ar->scan.is_roc && 741 (info->flags & IEEE80211_TX_CTL_TX_OFFCHAN)) 742 freq = ar->scan.roc_freq; 743 744 return freq; 745 } 746 747 struct sk_buff *ath12k_wmi_alloc_skb(struct ath12k_wmi_base *wmi_ab, u32 len) 748 { 749 struct sk_buff *skb; 750 struct ath12k_base *ab = wmi_ab->ab; 751 u32 round_len = roundup(len, 4); 752 753 skb = ath12k_htc_alloc_skb(ab, WMI_SKB_HEADROOM + round_len); 754 if (!skb) 755 return NULL; 756 757 skb_reserve(skb, WMI_SKB_HEADROOM); 758 if (!IS_ALIGNED((unsigned long)skb->data, 4)) 759 ath12k_warn(ab, "unaligned WMI skb data\n"); 760 761 skb_put(skb, round_len); 762 memset(skb->data, 0, round_len); 763 764 return skb; 765 } 766 767 int ath12k_wmi_mgmt_send(struct ath12k *ar, u32 vdev_id, u32 buf_id, 768 struct sk_buff *frame) 769 { 770 struct ath12k_wmi_pdev *wmi = ar->wmi; 771 struct wmi_mgmt_send_cmd *cmd; 772 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(frame); 773 struct wmi_tlv *frame_tlv; 774 struct sk_buff *skb; 775 u32 buf_len; 776 int ret, len; 777 778 buf_len = min_t(int, frame->len, WMI_MGMT_SEND_DOWNLD_LEN); 779 780 len = sizeof(*cmd) + sizeof(*frame_tlv) + roundup(buf_len, 4); 781 782 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 783 if (!skb) 784 return -ENOMEM; 785 786 cmd = (struct wmi_mgmt_send_cmd *)skb->data; 787 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MGMT_TX_SEND_CMD, 788 sizeof(*cmd)); 789 cmd->vdev_id = cpu_to_le32(vdev_id); 790 cmd->desc_id = cpu_to_le32(buf_id); 791 cmd->chanfreq = cpu_to_le32(ath12k_wmi_mgmt_get_freq(ar, info)); 792 cmd->paddr_lo = cpu_to_le32(lower_32_bits(ATH12K_SKB_CB(frame)->paddr)); 793 cmd->paddr_hi = cpu_to_le32(upper_32_bits(ATH12K_SKB_CB(frame)->paddr)); 794 cmd->frame_len = cpu_to_le32(frame->len); 795 cmd->buf_len = cpu_to_le32(buf_len); 796 cmd->tx_params_valid = 0; 797 798 frame_tlv = (struct wmi_tlv *)(skb->data + sizeof(*cmd)); 799 frame_tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, buf_len); 800 801 memcpy(frame_tlv->value, frame->data, buf_len); 802 803 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_MGMT_TX_SEND_CMDID); 804 if (ret) { 805 ath12k_warn(ar->ab, 806 "failed to submit WMI_MGMT_TX_SEND_CMDID cmd\n"); 807 dev_kfree_skb(skb); 808 } 809 810 return ret; 811 } 812 813 int ath12k_wmi_vdev_create(struct ath12k *ar, u8 *macaddr, 814 struct ath12k_wmi_vdev_create_arg *args) 815 { 816 struct ath12k_wmi_pdev *wmi = ar->wmi; 817 struct wmi_vdev_create_cmd *cmd; 818 struct sk_buff *skb; 819 struct ath12k_wmi_vdev_txrx_streams_params *txrx_streams; 820 struct wmi_tlv *tlv; 821 int ret, len; 822 void *ptr; 823 824 /* It can be optimized my sending tx/rx chain configuration 825 * only for supported bands instead of always sending it for 826 * both the bands. 827 */ 828 len = sizeof(*cmd) + TLV_HDR_SIZE + 829 (WMI_NUM_SUPPORTED_BAND_MAX * sizeof(*txrx_streams)); 830 831 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 832 if (!skb) 833 return -ENOMEM; 834 835 cmd = (struct wmi_vdev_create_cmd *)skb->data; 836 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_CREATE_CMD, 837 sizeof(*cmd)); 838 839 cmd->vdev_id = cpu_to_le32(args->if_id); 840 cmd->vdev_type = cpu_to_le32(args->type); 841 cmd->vdev_subtype = cpu_to_le32(args->subtype); 842 cmd->num_cfg_txrx_streams = cpu_to_le32(WMI_NUM_SUPPORTED_BAND_MAX); 843 cmd->pdev_id = cpu_to_le32(args->pdev_id); 844 cmd->vdev_stats_id = cpu_to_le32(args->if_stats_id); 845 ether_addr_copy(cmd->vdev_macaddr.addr, macaddr); 846 847 if (args->if_stats_id != ATH12K_INVAL_VDEV_STATS_ID) 848 cmd->vdev_stats_id_valid = cpu_to_le32(BIT(0)); 849 850 ptr = skb->data + sizeof(*cmd); 851 len = WMI_NUM_SUPPORTED_BAND_MAX * sizeof(*txrx_streams); 852 853 tlv = ptr; 854 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len); 855 856 ptr += TLV_HDR_SIZE; 857 txrx_streams = ptr; 858 len = sizeof(*txrx_streams); 859 txrx_streams->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_TXRX_STREAMS, 860 len); 861 txrx_streams->band = cpu_to_le32(WMI_TPC_CHAINMASK_CONFIG_BAND_2G); 862 txrx_streams->supported_tx_streams = 863 cpu_to_le32(args->chains[NL80211_BAND_2GHZ].tx); 864 txrx_streams->supported_rx_streams = 865 cpu_to_le32(args->chains[NL80211_BAND_2GHZ].rx); 866 867 txrx_streams++; 868 txrx_streams->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_TXRX_STREAMS, 869 len); 870 txrx_streams->band = cpu_to_le32(WMI_TPC_CHAINMASK_CONFIG_BAND_5G); 871 txrx_streams->supported_tx_streams = 872 cpu_to_le32(args->chains[NL80211_BAND_5GHZ].tx); 873 txrx_streams->supported_rx_streams = 874 cpu_to_le32(args->chains[NL80211_BAND_5GHZ].rx); 875 876 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 877 "WMI vdev create: id %d type %d subtype %d macaddr %pM pdevid %d\n", 878 args->if_id, args->type, args->subtype, 879 macaddr, args->pdev_id); 880 881 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_CREATE_CMDID); 882 if (ret) { 883 ath12k_warn(ar->ab, 884 "failed to submit WMI_VDEV_CREATE_CMDID\n"); 885 dev_kfree_skb(skb); 886 } 887 888 return ret; 889 } 890 891 int ath12k_wmi_vdev_delete(struct ath12k *ar, u8 vdev_id) 892 { 893 struct ath12k_wmi_pdev *wmi = ar->wmi; 894 struct wmi_vdev_delete_cmd *cmd; 895 struct sk_buff *skb; 896 int ret; 897 898 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 899 if (!skb) 900 return -ENOMEM; 901 902 cmd = (struct wmi_vdev_delete_cmd *)skb->data; 903 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_DELETE_CMD, 904 sizeof(*cmd)); 905 cmd->vdev_id = cpu_to_le32(vdev_id); 906 907 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "WMI vdev delete id %d\n", vdev_id); 908 909 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_DELETE_CMDID); 910 if (ret) { 911 ath12k_warn(ar->ab, "failed to submit WMI_VDEV_DELETE_CMDID\n"); 912 dev_kfree_skb(skb); 913 } 914 915 return ret; 916 } 917 918 int ath12k_wmi_vdev_stop(struct ath12k *ar, u8 vdev_id) 919 { 920 struct ath12k_wmi_pdev *wmi = ar->wmi; 921 struct wmi_vdev_stop_cmd *cmd; 922 struct sk_buff *skb; 923 int ret; 924 925 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 926 if (!skb) 927 return -ENOMEM; 928 929 cmd = (struct wmi_vdev_stop_cmd *)skb->data; 930 931 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_STOP_CMD, 932 sizeof(*cmd)); 933 cmd->vdev_id = cpu_to_le32(vdev_id); 934 935 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "WMI vdev stop id 0x%x\n", vdev_id); 936 937 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_STOP_CMDID); 938 if (ret) { 939 ath12k_warn(ar->ab, "failed to submit WMI_VDEV_STOP cmd\n"); 940 dev_kfree_skb(skb); 941 } 942 943 return ret; 944 } 945 946 int ath12k_wmi_vdev_down(struct ath12k *ar, u8 vdev_id) 947 { 948 struct ath12k_wmi_pdev *wmi = ar->wmi; 949 struct wmi_vdev_down_cmd *cmd; 950 struct sk_buff *skb; 951 int ret; 952 953 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 954 if (!skb) 955 return -ENOMEM; 956 957 cmd = (struct wmi_vdev_down_cmd *)skb->data; 958 959 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_DOWN_CMD, 960 sizeof(*cmd)); 961 cmd->vdev_id = cpu_to_le32(vdev_id); 962 963 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "WMI vdev down id 0x%x\n", vdev_id); 964 965 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_DOWN_CMDID); 966 if (ret) { 967 ath12k_warn(ar->ab, "failed to submit WMI_VDEV_DOWN cmd\n"); 968 dev_kfree_skb(skb); 969 } 970 971 return ret; 972 } 973 974 static void ath12k_wmi_put_wmi_channel(struct ath12k_wmi_channel_params *chan, 975 struct wmi_vdev_start_req_arg *arg) 976 { 977 memset(chan, 0, sizeof(*chan)); 978 979 chan->mhz = cpu_to_le32(arg->freq); 980 chan->band_center_freq1 = cpu_to_le32(arg->band_center_freq1); 981 if (arg->mode == MODE_11AC_VHT80_80) 982 chan->band_center_freq2 = cpu_to_le32(arg->band_center_freq2); 983 else 984 chan->band_center_freq2 = 0; 985 986 chan->info |= le32_encode_bits(arg->mode, WMI_CHAN_INFO_MODE); 987 if (arg->passive) 988 chan->info |= cpu_to_le32(WMI_CHAN_INFO_PASSIVE); 989 if (arg->allow_ibss) 990 chan->info |= cpu_to_le32(WMI_CHAN_INFO_ADHOC_ALLOWED); 991 if (arg->allow_ht) 992 chan->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HT); 993 if (arg->allow_vht) 994 chan->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_VHT); 995 if (arg->allow_he) 996 chan->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HE); 997 if (arg->ht40plus) 998 chan->info |= cpu_to_le32(WMI_CHAN_INFO_HT40_PLUS); 999 if (arg->chan_radar) 1000 chan->info |= cpu_to_le32(WMI_CHAN_INFO_DFS); 1001 if (arg->freq2_radar) 1002 chan->info |= cpu_to_le32(WMI_CHAN_INFO_DFS_FREQ2); 1003 1004 chan->reg_info_1 = le32_encode_bits(arg->max_power, 1005 WMI_CHAN_REG_INFO1_MAX_PWR) | 1006 le32_encode_bits(arg->max_reg_power, 1007 WMI_CHAN_REG_INFO1_MAX_REG_PWR); 1008 1009 chan->reg_info_2 = le32_encode_bits(arg->max_antenna_gain, 1010 WMI_CHAN_REG_INFO2_ANT_MAX) | 1011 le32_encode_bits(arg->max_power, WMI_CHAN_REG_INFO2_MAX_TX_PWR); 1012 } 1013 1014 int ath12k_wmi_vdev_start(struct ath12k *ar, struct wmi_vdev_start_req_arg *arg, 1015 bool restart) 1016 { 1017 struct ath12k_wmi_pdev *wmi = ar->wmi; 1018 struct wmi_vdev_start_request_cmd *cmd; 1019 struct sk_buff *skb; 1020 struct ath12k_wmi_channel_params *chan; 1021 struct wmi_tlv *tlv; 1022 void *ptr; 1023 int ret, len; 1024 1025 if (WARN_ON(arg->ssid_len > sizeof(cmd->ssid.ssid))) 1026 return -EINVAL; 1027 1028 len = sizeof(*cmd) + sizeof(*chan) + TLV_HDR_SIZE; 1029 1030 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 1031 if (!skb) 1032 return -ENOMEM; 1033 1034 cmd = (struct wmi_vdev_start_request_cmd *)skb->data; 1035 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_START_REQUEST_CMD, 1036 sizeof(*cmd)); 1037 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 1038 cmd->beacon_interval = cpu_to_le32(arg->bcn_intval); 1039 cmd->bcn_tx_rate = cpu_to_le32(arg->bcn_tx_rate); 1040 cmd->dtim_period = cpu_to_le32(arg->dtim_period); 1041 cmd->num_noa_descriptors = cpu_to_le32(arg->num_noa_descriptors); 1042 cmd->preferred_rx_streams = cpu_to_le32(arg->pref_rx_streams); 1043 cmd->preferred_tx_streams = cpu_to_le32(arg->pref_tx_streams); 1044 cmd->cac_duration_ms = cpu_to_le32(arg->cac_duration_ms); 1045 cmd->regdomain = cpu_to_le32(arg->regdomain); 1046 cmd->he_ops = cpu_to_le32(arg->he_ops); 1047 cmd->punct_bitmap = cpu_to_le32(arg->punct_bitmap); 1048 cmd->mbssid_flags = cpu_to_le32(arg->mbssid_flags); 1049 1050 if (!restart) { 1051 if (arg->ssid) { 1052 cmd->ssid.ssid_len = cpu_to_le32(arg->ssid_len); 1053 memcpy(cmd->ssid.ssid, arg->ssid, arg->ssid_len); 1054 } 1055 if (arg->hidden_ssid) 1056 cmd->flags |= cpu_to_le32(WMI_VDEV_START_HIDDEN_SSID); 1057 if (arg->pmf_enabled) 1058 cmd->flags |= cpu_to_le32(WMI_VDEV_START_PMF_ENABLED); 1059 } 1060 1061 cmd->flags |= cpu_to_le32(WMI_VDEV_START_LDPC_RX_ENABLED); 1062 1063 ptr = skb->data + sizeof(*cmd); 1064 chan = ptr; 1065 1066 ath12k_wmi_put_wmi_channel(chan, arg); 1067 1068 chan->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_CHANNEL, 1069 sizeof(*chan)); 1070 ptr += sizeof(*chan); 1071 1072 tlv = ptr; 1073 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 0); 1074 1075 /* Note: This is a nested TLV containing: 1076 * [wmi_tlv][ath12k_wmi_p2p_noa_descriptor][wmi_tlv].. 1077 */ 1078 1079 ptr += sizeof(*tlv); 1080 1081 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "vdev %s id 0x%x freq 0x%x mode 0x%x\n", 1082 restart ? "restart" : "start", arg->vdev_id, 1083 arg->freq, arg->mode); 1084 1085 if (restart) 1086 ret = ath12k_wmi_cmd_send(wmi, skb, 1087 WMI_VDEV_RESTART_REQUEST_CMDID); 1088 else 1089 ret = ath12k_wmi_cmd_send(wmi, skb, 1090 WMI_VDEV_START_REQUEST_CMDID); 1091 if (ret) { 1092 ath12k_warn(ar->ab, "failed to submit vdev_%s cmd\n", 1093 restart ? "restart" : "start"); 1094 dev_kfree_skb(skb); 1095 } 1096 1097 return ret; 1098 } 1099 1100 int ath12k_wmi_vdev_up(struct ath12k *ar, u32 vdev_id, u32 aid, const u8 *bssid) 1101 { 1102 struct ath12k_wmi_pdev *wmi = ar->wmi; 1103 struct wmi_vdev_up_cmd *cmd; 1104 struct sk_buff *skb; 1105 int ret; 1106 1107 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1108 if (!skb) 1109 return -ENOMEM; 1110 1111 cmd = (struct wmi_vdev_up_cmd *)skb->data; 1112 1113 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_UP_CMD, 1114 sizeof(*cmd)); 1115 cmd->vdev_id = cpu_to_le32(vdev_id); 1116 cmd->vdev_assoc_id = cpu_to_le32(aid); 1117 1118 ether_addr_copy(cmd->vdev_bssid.addr, bssid); 1119 1120 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1121 "WMI mgmt vdev up id 0x%x assoc id %d bssid %pM\n", 1122 vdev_id, aid, bssid); 1123 1124 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_UP_CMDID); 1125 if (ret) { 1126 ath12k_warn(ar->ab, "failed to submit WMI_VDEV_UP cmd\n"); 1127 dev_kfree_skb(skb); 1128 } 1129 1130 return ret; 1131 } 1132 1133 int ath12k_wmi_send_peer_create_cmd(struct ath12k *ar, 1134 struct ath12k_wmi_peer_create_arg *arg) 1135 { 1136 struct ath12k_wmi_pdev *wmi = ar->wmi; 1137 struct wmi_peer_create_cmd *cmd; 1138 struct sk_buff *skb; 1139 int ret; 1140 1141 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1142 if (!skb) 1143 return -ENOMEM; 1144 1145 cmd = (struct wmi_peer_create_cmd *)skb->data; 1146 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_CREATE_CMD, 1147 sizeof(*cmd)); 1148 1149 ether_addr_copy(cmd->peer_macaddr.addr, arg->peer_addr); 1150 cmd->peer_type = cpu_to_le32(arg->peer_type); 1151 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 1152 1153 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1154 "WMI peer create vdev_id %d peer_addr %pM\n", 1155 arg->vdev_id, arg->peer_addr); 1156 1157 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_CREATE_CMDID); 1158 if (ret) { 1159 ath12k_warn(ar->ab, "failed to submit WMI_PEER_CREATE cmd\n"); 1160 dev_kfree_skb(skb); 1161 } 1162 1163 return ret; 1164 } 1165 1166 int ath12k_wmi_send_peer_delete_cmd(struct ath12k *ar, 1167 const u8 *peer_addr, u8 vdev_id) 1168 { 1169 struct ath12k_wmi_pdev *wmi = ar->wmi; 1170 struct wmi_peer_delete_cmd *cmd; 1171 struct sk_buff *skb; 1172 int ret; 1173 1174 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1175 if (!skb) 1176 return -ENOMEM; 1177 1178 cmd = (struct wmi_peer_delete_cmd *)skb->data; 1179 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_DELETE_CMD, 1180 sizeof(*cmd)); 1181 1182 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr); 1183 cmd->vdev_id = cpu_to_le32(vdev_id); 1184 1185 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1186 "WMI peer delete vdev_id %d peer_addr %pM\n", 1187 vdev_id, peer_addr); 1188 1189 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_DELETE_CMDID); 1190 if (ret) { 1191 ath12k_warn(ar->ab, "failed to send WMI_PEER_DELETE cmd\n"); 1192 dev_kfree_skb(skb); 1193 } 1194 1195 return ret; 1196 } 1197 1198 int ath12k_wmi_send_pdev_set_regdomain(struct ath12k *ar, 1199 struct ath12k_wmi_pdev_set_regdomain_arg *arg) 1200 { 1201 struct ath12k_wmi_pdev *wmi = ar->wmi; 1202 struct wmi_pdev_set_regdomain_cmd *cmd; 1203 struct sk_buff *skb; 1204 int ret; 1205 1206 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1207 if (!skb) 1208 return -ENOMEM; 1209 1210 cmd = (struct wmi_pdev_set_regdomain_cmd *)skb->data; 1211 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_REGDOMAIN_CMD, 1212 sizeof(*cmd)); 1213 1214 cmd->reg_domain = cpu_to_le32(arg->current_rd_in_use); 1215 cmd->reg_domain_2g = cpu_to_le32(arg->current_rd_2g); 1216 cmd->reg_domain_5g = cpu_to_le32(arg->current_rd_5g); 1217 cmd->conformance_test_limit_2g = cpu_to_le32(arg->ctl_2g); 1218 cmd->conformance_test_limit_5g = cpu_to_le32(arg->ctl_5g); 1219 cmd->dfs_domain = cpu_to_le32(arg->dfs_domain); 1220 cmd->pdev_id = cpu_to_le32(arg->pdev_id); 1221 1222 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1223 "WMI pdev regd rd %d rd2g %d rd5g %d domain %d pdev id %d\n", 1224 arg->current_rd_in_use, arg->current_rd_2g, 1225 arg->current_rd_5g, arg->dfs_domain, arg->pdev_id); 1226 1227 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_SET_REGDOMAIN_CMDID); 1228 if (ret) { 1229 ath12k_warn(ar->ab, 1230 "failed to send WMI_PDEV_SET_REGDOMAIN cmd\n"); 1231 dev_kfree_skb(skb); 1232 } 1233 1234 return ret; 1235 } 1236 1237 int ath12k_wmi_set_peer_param(struct ath12k *ar, const u8 *peer_addr, 1238 u32 vdev_id, u32 param_id, u32 param_val) 1239 { 1240 struct ath12k_wmi_pdev *wmi = ar->wmi; 1241 struct wmi_peer_set_param_cmd *cmd; 1242 struct sk_buff *skb; 1243 int ret; 1244 1245 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1246 if (!skb) 1247 return -ENOMEM; 1248 1249 cmd = (struct wmi_peer_set_param_cmd *)skb->data; 1250 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_SET_PARAM_CMD, 1251 sizeof(*cmd)); 1252 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr); 1253 cmd->vdev_id = cpu_to_le32(vdev_id); 1254 cmd->param_id = cpu_to_le32(param_id); 1255 cmd->param_value = cpu_to_le32(param_val); 1256 1257 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1258 "WMI vdev %d peer 0x%pM set param %d value %d\n", 1259 vdev_id, peer_addr, param_id, param_val); 1260 1261 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_SET_PARAM_CMDID); 1262 if (ret) { 1263 ath12k_warn(ar->ab, "failed to send WMI_PEER_SET_PARAM cmd\n"); 1264 dev_kfree_skb(skb); 1265 } 1266 1267 return ret; 1268 } 1269 1270 int ath12k_wmi_send_peer_flush_tids_cmd(struct ath12k *ar, 1271 u8 peer_addr[ETH_ALEN], 1272 u32 peer_tid_bitmap, 1273 u8 vdev_id) 1274 { 1275 struct ath12k_wmi_pdev *wmi = ar->wmi; 1276 struct wmi_peer_flush_tids_cmd *cmd; 1277 struct sk_buff *skb; 1278 int ret; 1279 1280 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1281 if (!skb) 1282 return -ENOMEM; 1283 1284 cmd = (struct wmi_peer_flush_tids_cmd *)skb->data; 1285 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_FLUSH_TIDS_CMD, 1286 sizeof(*cmd)); 1287 1288 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr); 1289 cmd->peer_tid_bitmap = cpu_to_le32(peer_tid_bitmap); 1290 cmd->vdev_id = cpu_to_le32(vdev_id); 1291 1292 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1293 "WMI peer flush vdev_id %d peer_addr %pM tids %08x\n", 1294 vdev_id, peer_addr, peer_tid_bitmap); 1295 1296 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_FLUSH_TIDS_CMDID); 1297 if (ret) { 1298 ath12k_warn(ar->ab, 1299 "failed to send WMI_PEER_FLUSH_TIDS cmd\n"); 1300 dev_kfree_skb(skb); 1301 } 1302 1303 return ret; 1304 } 1305 1306 int ath12k_wmi_peer_rx_reorder_queue_setup(struct ath12k *ar, 1307 int vdev_id, const u8 *addr, 1308 dma_addr_t paddr, u8 tid, 1309 u8 ba_window_size_valid, 1310 u32 ba_window_size) 1311 { 1312 struct wmi_peer_reorder_queue_setup_cmd *cmd; 1313 struct sk_buff *skb; 1314 int ret; 1315 1316 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd)); 1317 if (!skb) 1318 return -ENOMEM; 1319 1320 cmd = (struct wmi_peer_reorder_queue_setup_cmd *)skb->data; 1321 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_REORDER_QUEUE_SETUP_CMD, 1322 sizeof(*cmd)); 1323 1324 ether_addr_copy(cmd->peer_macaddr.addr, addr); 1325 cmd->vdev_id = cpu_to_le32(vdev_id); 1326 cmd->tid = cpu_to_le32(tid); 1327 cmd->queue_ptr_lo = cpu_to_le32(lower_32_bits(paddr)); 1328 cmd->queue_ptr_hi = cpu_to_le32(upper_32_bits(paddr)); 1329 cmd->queue_no = cpu_to_le32(tid); 1330 cmd->ba_window_size_valid = cpu_to_le32(ba_window_size_valid); 1331 cmd->ba_window_size = cpu_to_le32(ba_window_size); 1332 1333 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1334 "wmi rx reorder queue setup addr %pM vdev_id %d tid %d\n", 1335 addr, vdev_id, tid); 1336 1337 ret = ath12k_wmi_cmd_send(ar->wmi, skb, 1338 WMI_PEER_REORDER_QUEUE_SETUP_CMDID); 1339 if (ret) { 1340 ath12k_warn(ar->ab, 1341 "failed to send WMI_PEER_REORDER_QUEUE_SETUP\n"); 1342 dev_kfree_skb(skb); 1343 } 1344 1345 return ret; 1346 } 1347 1348 int 1349 ath12k_wmi_rx_reord_queue_remove(struct ath12k *ar, 1350 struct ath12k_wmi_rx_reorder_queue_remove_arg *arg) 1351 { 1352 struct ath12k_wmi_pdev *wmi = ar->wmi; 1353 struct wmi_peer_reorder_queue_remove_cmd *cmd; 1354 struct sk_buff *skb; 1355 int ret; 1356 1357 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1358 if (!skb) 1359 return -ENOMEM; 1360 1361 cmd = (struct wmi_peer_reorder_queue_remove_cmd *)skb->data; 1362 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_REORDER_QUEUE_REMOVE_CMD, 1363 sizeof(*cmd)); 1364 1365 ether_addr_copy(cmd->peer_macaddr.addr, arg->peer_macaddr); 1366 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 1367 cmd->tid_mask = cpu_to_le32(arg->peer_tid_bitmap); 1368 1369 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1370 "%s: peer_macaddr %pM vdev_id %d, tid_map %d", __func__, 1371 arg->peer_macaddr, arg->vdev_id, arg->peer_tid_bitmap); 1372 1373 ret = ath12k_wmi_cmd_send(wmi, skb, 1374 WMI_PEER_REORDER_QUEUE_REMOVE_CMDID); 1375 if (ret) { 1376 ath12k_warn(ar->ab, 1377 "failed to send WMI_PEER_REORDER_QUEUE_REMOVE_CMDID"); 1378 dev_kfree_skb(skb); 1379 } 1380 1381 return ret; 1382 } 1383 1384 int ath12k_wmi_pdev_set_param(struct ath12k *ar, u32 param_id, 1385 u32 param_value, u8 pdev_id) 1386 { 1387 struct ath12k_wmi_pdev *wmi = ar->wmi; 1388 struct wmi_pdev_set_param_cmd *cmd; 1389 struct sk_buff *skb; 1390 int ret; 1391 1392 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1393 if (!skb) 1394 return -ENOMEM; 1395 1396 cmd = (struct wmi_pdev_set_param_cmd *)skb->data; 1397 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_PARAM_CMD, 1398 sizeof(*cmd)); 1399 cmd->pdev_id = cpu_to_le32(pdev_id); 1400 cmd->param_id = cpu_to_le32(param_id); 1401 cmd->param_value = cpu_to_le32(param_value); 1402 1403 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1404 "WMI pdev set param %d pdev id %d value %d\n", 1405 param_id, pdev_id, param_value); 1406 1407 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_SET_PARAM_CMDID); 1408 if (ret) { 1409 ath12k_warn(ar->ab, "failed to send WMI_PDEV_SET_PARAM cmd\n"); 1410 dev_kfree_skb(skb); 1411 } 1412 1413 return ret; 1414 } 1415 1416 int ath12k_wmi_pdev_set_ps_mode(struct ath12k *ar, int vdev_id, u32 enable) 1417 { 1418 struct ath12k_wmi_pdev *wmi = ar->wmi; 1419 struct wmi_pdev_set_ps_mode_cmd *cmd; 1420 struct sk_buff *skb; 1421 int ret; 1422 1423 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1424 if (!skb) 1425 return -ENOMEM; 1426 1427 cmd = (struct wmi_pdev_set_ps_mode_cmd *)skb->data; 1428 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STA_POWERSAVE_MODE_CMD, 1429 sizeof(*cmd)); 1430 cmd->vdev_id = cpu_to_le32(vdev_id); 1431 cmd->sta_ps_mode = cpu_to_le32(enable); 1432 1433 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1434 "WMI vdev set psmode %d vdev id %d\n", 1435 enable, vdev_id); 1436 1437 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_STA_POWERSAVE_MODE_CMDID); 1438 if (ret) { 1439 ath12k_warn(ar->ab, "failed to send WMI_PDEV_SET_PARAM cmd\n"); 1440 dev_kfree_skb(skb); 1441 } 1442 1443 return ret; 1444 } 1445 1446 int ath12k_wmi_pdev_suspend(struct ath12k *ar, u32 suspend_opt, 1447 u32 pdev_id) 1448 { 1449 struct ath12k_wmi_pdev *wmi = ar->wmi; 1450 struct wmi_pdev_suspend_cmd *cmd; 1451 struct sk_buff *skb; 1452 int ret; 1453 1454 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1455 if (!skb) 1456 return -ENOMEM; 1457 1458 cmd = (struct wmi_pdev_suspend_cmd *)skb->data; 1459 1460 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SUSPEND_CMD, 1461 sizeof(*cmd)); 1462 1463 cmd->suspend_opt = cpu_to_le32(suspend_opt); 1464 cmd->pdev_id = cpu_to_le32(pdev_id); 1465 1466 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1467 "WMI pdev suspend pdev_id %d\n", pdev_id); 1468 1469 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_SUSPEND_CMDID); 1470 if (ret) { 1471 ath12k_warn(ar->ab, "failed to send WMI_PDEV_SUSPEND cmd\n"); 1472 dev_kfree_skb(skb); 1473 } 1474 1475 return ret; 1476 } 1477 1478 int ath12k_wmi_pdev_resume(struct ath12k *ar, u32 pdev_id) 1479 { 1480 struct ath12k_wmi_pdev *wmi = ar->wmi; 1481 struct wmi_pdev_resume_cmd *cmd; 1482 struct sk_buff *skb; 1483 int ret; 1484 1485 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1486 if (!skb) 1487 return -ENOMEM; 1488 1489 cmd = (struct wmi_pdev_resume_cmd *)skb->data; 1490 1491 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_RESUME_CMD, 1492 sizeof(*cmd)); 1493 cmd->pdev_id = cpu_to_le32(pdev_id); 1494 1495 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1496 "WMI pdev resume pdev id %d\n", pdev_id); 1497 1498 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_RESUME_CMDID); 1499 if (ret) { 1500 ath12k_warn(ar->ab, "failed to send WMI_PDEV_RESUME cmd\n"); 1501 dev_kfree_skb(skb); 1502 } 1503 1504 return ret; 1505 } 1506 1507 /* TODO FW Support for the cmd is not available yet. 1508 * Can be tested once the command and corresponding 1509 * event is implemented in FW 1510 */ 1511 int ath12k_wmi_pdev_bss_chan_info_request(struct ath12k *ar, 1512 enum wmi_bss_chan_info_req_type type) 1513 { 1514 struct ath12k_wmi_pdev *wmi = ar->wmi; 1515 struct wmi_pdev_bss_chan_info_req_cmd *cmd; 1516 struct sk_buff *skb; 1517 int ret; 1518 1519 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1520 if (!skb) 1521 return -ENOMEM; 1522 1523 cmd = (struct wmi_pdev_bss_chan_info_req_cmd *)skb->data; 1524 1525 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_BSS_CHAN_INFO_REQUEST, 1526 sizeof(*cmd)); 1527 cmd->req_type = cpu_to_le32(type); 1528 1529 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1530 "WMI bss chan info req type %d\n", type); 1531 1532 ret = ath12k_wmi_cmd_send(wmi, skb, 1533 WMI_PDEV_BSS_CHAN_INFO_REQUEST_CMDID); 1534 if (ret) { 1535 ath12k_warn(ar->ab, 1536 "failed to send WMI_PDEV_BSS_CHAN_INFO_REQUEST cmd\n"); 1537 dev_kfree_skb(skb); 1538 } 1539 1540 return ret; 1541 } 1542 1543 int ath12k_wmi_send_set_ap_ps_param_cmd(struct ath12k *ar, u8 *peer_addr, 1544 struct ath12k_wmi_ap_ps_arg *arg) 1545 { 1546 struct ath12k_wmi_pdev *wmi = ar->wmi; 1547 struct wmi_ap_ps_peer_cmd *cmd; 1548 struct sk_buff *skb; 1549 int ret; 1550 1551 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1552 if (!skb) 1553 return -ENOMEM; 1554 1555 cmd = (struct wmi_ap_ps_peer_cmd *)skb->data; 1556 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_AP_PS_PEER_CMD, 1557 sizeof(*cmd)); 1558 1559 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 1560 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr); 1561 cmd->param = cpu_to_le32(arg->param); 1562 cmd->value = cpu_to_le32(arg->value); 1563 1564 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1565 "WMI set ap ps vdev id %d peer %pM param %d value %d\n", 1566 arg->vdev_id, peer_addr, arg->param, arg->value); 1567 1568 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_AP_PS_PEER_PARAM_CMDID); 1569 if (ret) { 1570 ath12k_warn(ar->ab, 1571 "failed to send WMI_AP_PS_PEER_PARAM_CMDID\n"); 1572 dev_kfree_skb(skb); 1573 } 1574 1575 return ret; 1576 } 1577 1578 int ath12k_wmi_set_sta_ps_param(struct ath12k *ar, u32 vdev_id, 1579 u32 param, u32 param_value) 1580 { 1581 struct ath12k_wmi_pdev *wmi = ar->wmi; 1582 struct wmi_sta_powersave_param_cmd *cmd; 1583 struct sk_buff *skb; 1584 int ret; 1585 1586 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1587 if (!skb) 1588 return -ENOMEM; 1589 1590 cmd = (struct wmi_sta_powersave_param_cmd *)skb->data; 1591 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STA_POWERSAVE_PARAM_CMD, 1592 sizeof(*cmd)); 1593 1594 cmd->vdev_id = cpu_to_le32(vdev_id); 1595 cmd->param = cpu_to_le32(param); 1596 cmd->value = cpu_to_le32(param_value); 1597 1598 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1599 "WMI set sta ps vdev_id %d param %d value %d\n", 1600 vdev_id, param, param_value); 1601 1602 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_STA_POWERSAVE_PARAM_CMDID); 1603 if (ret) { 1604 ath12k_warn(ar->ab, "failed to send WMI_STA_POWERSAVE_PARAM_CMDID"); 1605 dev_kfree_skb(skb); 1606 } 1607 1608 return ret; 1609 } 1610 1611 int ath12k_wmi_force_fw_hang_cmd(struct ath12k *ar, u32 type, u32 delay_time_ms) 1612 { 1613 struct ath12k_wmi_pdev *wmi = ar->wmi; 1614 struct wmi_force_fw_hang_cmd *cmd; 1615 struct sk_buff *skb; 1616 int ret, len; 1617 1618 len = sizeof(*cmd); 1619 1620 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 1621 if (!skb) 1622 return -ENOMEM; 1623 1624 cmd = (struct wmi_force_fw_hang_cmd *)skb->data; 1625 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_FORCE_FW_HANG_CMD, 1626 len); 1627 1628 cmd->type = cpu_to_le32(type); 1629 cmd->delay_time_ms = cpu_to_le32(delay_time_ms); 1630 1631 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_FORCE_FW_HANG_CMDID); 1632 1633 if (ret) { 1634 ath12k_warn(ar->ab, "Failed to send WMI_FORCE_FW_HANG_CMDID"); 1635 dev_kfree_skb(skb); 1636 } 1637 return ret; 1638 } 1639 1640 int ath12k_wmi_vdev_set_param_cmd(struct ath12k *ar, u32 vdev_id, 1641 u32 param_id, u32 param_value) 1642 { 1643 struct ath12k_wmi_pdev *wmi = ar->wmi; 1644 struct wmi_vdev_set_param_cmd *cmd; 1645 struct sk_buff *skb; 1646 int ret; 1647 1648 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1649 if (!skb) 1650 return -ENOMEM; 1651 1652 cmd = (struct wmi_vdev_set_param_cmd *)skb->data; 1653 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SET_PARAM_CMD, 1654 sizeof(*cmd)); 1655 1656 cmd->vdev_id = cpu_to_le32(vdev_id); 1657 cmd->param_id = cpu_to_le32(param_id); 1658 cmd->param_value = cpu_to_le32(param_value); 1659 1660 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1661 "WMI vdev id 0x%x set param %d value %d\n", 1662 vdev_id, param_id, param_value); 1663 1664 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_SET_PARAM_CMDID); 1665 if (ret) { 1666 ath12k_warn(ar->ab, 1667 "failed to send WMI_VDEV_SET_PARAM_CMDID\n"); 1668 dev_kfree_skb(skb); 1669 } 1670 1671 return ret; 1672 } 1673 1674 int ath12k_wmi_send_pdev_temperature_cmd(struct ath12k *ar) 1675 { 1676 struct ath12k_wmi_pdev *wmi = ar->wmi; 1677 struct wmi_get_pdev_temperature_cmd *cmd; 1678 struct sk_buff *skb; 1679 int ret; 1680 1681 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1682 if (!skb) 1683 return -ENOMEM; 1684 1685 cmd = (struct wmi_get_pdev_temperature_cmd *)skb->data; 1686 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_GET_TEMPERATURE_CMD, 1687 sizeof(*cmd)); 1688 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id); 1689 1690 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1691 "WMI pdev get temperature for pdev_id %d\n", ar->pdev->pdev_id); 1692 1693 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_GET_TEMPERATURE_CMDID); 1694 if (ret) { 1695 ath12k_warn(ar->ab, "failed to send WMI_PDEV_GET_TEMPERATURE cmd\n"); 1696 dev_kfree_skb(skb); 1697 } 1698 1699 return ret; 1700 } 1701 1702 int ath12k_wmi_send_bcn_offload_control_cmd(struct ath12k *ar, 1703 u32 vdev_id, u32 bcn_ctrl_op) 1704 { 1705 struct ath12k_wmi_pdev *wmi = ar->wmi; 1706 struct wmi_bcn_offload_ctrl_cmd *cmd; 1707 struct sk_buff *skb; 1708 int ret; 1709 1710 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1711 if (!skb) 1712 return -ENOMEM; 1713 1714 cmd = (struct wmi_bcn_offload_ctrl_cmd *)skb->data; 1715 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_OFFLOAD_CTRL_CMD, 1716 sizeof(*cmd)); 1717 1718 cmd->vdev_id = cpu_to_le32(vdev_id); 1719 cmd->bcn_ctrl_op = cpu_to_le32(bcn_ctrl_op); 1720 1721 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1722 "WMI bcn ctrl offload vdev id %d ctrl_op %d\n", 1723 vdev_id, bcn_ctrl_op); 1724 1725 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_BCN_OFFLOAD_CTRL_CMDID); 1726 if (ret) { 1727 ath12k_warn(ar->ab, 1728 "failed to send WMI_BCN_OFFLOAD_CTRL_CMDID\n"); 1729 dev_kfree_skb(skb); 1730 } 1731 1732 return ret; 1733 } 1734 1735 int ath12k_wmi_p2p_go_bcn_ie(struct ath12k *ar, u32 vdev_id, 1736 const u8 *p2p_ie) 1737 { 1738 struct ath12k_wmi_pdev *wmi = ar->wmi; 1739 struct wmi_p2p_go_set_beacon_ie_cmd *cmd; 1740 size_t p2p_ie_len, aligned_len; 1741 struct wmi_tlv *tlv; 1742 struct sk_buff *skb; 1743 void *ptr; 1744 int ret, len; 1745 1746 p2p_ie_len = p2p_ie[1] + 2; 1747 aligned_len = roundup(p2p_ie_len, sizeof(u32)); 1748 1749 len = sizeof(*cmd) + TLV_HDR_SIZE + aligned_len; 1750 1751 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 1752 if (!skb) 1753 return -ENOMEM; 1754 1755 ptr = skb->data; 1756 cmd = ptr; 1757 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_P2P_GO_SET_BEACON_IE, 1758 sizeof(*cmd)); 1759 cmd->vdev_id = cpu_to_le32(vdev_id); 1760 cmd->ie_buf_len = cpu_to_le32(p2p_ie_len); 1761 1762 ptr += sizeof(*cmd); 1763 tlv = ptr; 1764 tlv->header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ARRAY_BYTE, 1765 aligned_len); 1766 memcpy(tlv->value, p2p_ie, p2p_ie_len); 1767 1768 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_P2P_GO_SET_BEACON_IE); 1769 if (ret) { 1770 ath12k_warn(ar->ab, "failed to send WMI_P2P_GO_SET_BEACON_IE\n"); 1771 dev_kfree_skb(skb); 1772 } 1773 1774 return ret; 1775 } 1776 1777 int ath12k_wmi_bcn_tmpl(struct ath12k *ar, u32 vdev_id, 1778 struct ieee80211_mutable_offsets *offs, 1779 struct sk_buff *bcn) 1780 { 1781 struct ath12k_wmi_pdev *wmi = ar->wmi; 1782 struct wmi_bcn_tmpl_cmd *cmd; 1783 struct ath12k_wmi_bcn_prb_info_params *bcn_prb_info; 1784 struct wmi_tlv *tlv; 1785 struct sk_buff *skb; 1786 void *ptr; 1787 int ret, len; 1788 size_t aligned_len = roundup(bcn->len, 4); 1789 1790 len = sizeof(*cmd) + sizeof(*bcn_prb_info) + TLV_HDR_SIZE + aligned_len; 1791 1792 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 1793 if (!skb) 1794 return -ENOMEM; 1795 1796 cmd = (struct wmi_bcn_tmpl_cmd *)skb->data; 1797 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_TMPL_CMD, 1798 sizeof(*cmd)); 1799 cmd->vdev_id = cpu_to_le32(vdev_id); 1800 cmd->tim_ie_offset = cpu_to_le32(offs->tim_offset); 1801 cmd->csa_switch_count_offset = cpu_to_le32(offs->cntdwn_counter_offs[0]); 1802 cmd->ext_csa_switch_count_offset = cpu_to_le32(offs->cntdwn_counter_offs[1]); 1803 cmd->buf_len = cpu_to_le32(bcn->len); 1804 1805 ptr = skb->data + sizeof(*cmd); 1806 1807 bcn_prb_info = ptr; 1808 len = sizeof(*bcn_prb_info); 1809 bcn_prb_info->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_PRB_INFO, 1810 len); 1811 bcn_prb_info->caps = 0; 1812 bcn_prb_info->erp = 0; 1813 1814 ptr += sizeof(*bcn_prb_info); 1815 1816 tlv = ptr; 1817 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, aligned_len); 1818 memcpy(tlv->value, bcn->data, bcn->len); 1819 1820 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_BCN_TMPL_CMDID); 1821 if (ret) { 1822 ath12k_warn(ar->ab, "failed to send WMI_BCN_TMPL_CMDID\n"); 1823 dev_kfree_skb(skb); 1824 } 1825 1826 return ret; 1827 } 1828 1829 int ath12k_wmi_vdev_install_key(struct ath12k *ar, 1830 struct wmi_vdev_install_key_arg *arg) 1831 { 1832 struct ath12k_wmi_pdev *wmi = ar->wmi; 1833 struct wmi_vdev_install_key_cmd *cmd; 1834 struct wmi_tlv *tlv; 1835 struct sk_buff *skb; 1836 int ret, len, key_len_aligned; 1837 1838 /* WMI_TAG_ARRAY_BYTE needs to be aligned with 4, the actual key 1839 * length is specified in cmd->key_len. 1840 */ 1841 key_len_aligned = roundup(arg->key_len, 4); 1842 1843 len = sizeof(*cmd) + TLV_HDR_SIZE + key_len_aligned; 1844 1845 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 1846 if (!skb) 1847 return -ENOMEM; 1848 1849 cmd = (struct wmi_vdev_install_key_cmd *)skb->data; 1850 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_INSTALL_KEY_CMD, 1851 sizeof(*cmd)); 1852 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 1853 ether_addr_copy(cmd->peer_macaddr.addr, arg->macaddr); 1854 cmd->key_idx = cpu_to_le32(arg->key_idx); 1855 cmd->key_flags = cpu_to_le32(arg->key_flags); 1856 cmd->key_cipher = cpu_to_le32(arg->key_cipher); 1857 cmd->key_len = cpu_to_le32(arg->key_len); 1858 cmd->key_txmic_len = cpu_to_le32(arg->key_txmic_len); 1859 cmd->key_rxmic_len = cpu_to_le32(arg->key_rxmic_len); 1860 1861 if (arg->key_rsc_counter) 1862 cmd->key_rsc_counter = cpu_to_le64(arg->key_rsc_counter); 1863 1864 tlv = (struct wmi_tlv *)(skb->data + sizeof(*cmd)); 1865 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, key_len_aligned); 1866 memcpy(tlv->value, arg->key_data, arg->key_len); 1867 1868 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1869 "WMI vdev install key idx %d cipher %d len %d\n", 1870 arg->key_idx, arg->key_cipher, arg->key_len); 1871 1872 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_INSTALL_KEY_CMDID); 1873 if (ret) { 1874 ath12k_warn(ar->ab, 1875 "failed to send WMI_VDEV_INSTALL_KEY cmd\n"); 1876 dev_kfree_skb(skb); 1877 } 1878 1879 return ret; 1880 } 1881 1882 static void ath12k_wmi_copy_peer_flags(struct wmi_peer_assoc_complete_cmd *cmd, 1883 struct ath12k_wmi_peer_assoc_arg *arg, 1884 bool hw_crypto_disabled) 1885 { 1886 cmd->peer_flags = 0; 1887 cmd->peer_flags_ext = 0; 1888 1889 if (arg->is_wme_set) { 1890 if (arg->qos_flag) 1891 cmd->peer_flags |= cpu_to_le32(WMI_PEER_QOS); 1892 if (arg->apsd_flag) 1893 cmd->peer_flags |= cpu_to_le32(WMI_PEER_APSD); 1894 if (arg->ht_flag) 1895 cmd->peer_flags |= cpu_to_le32(WMI_PEER_HT); 1896 if (arg->bw_40) 1897 cmd->peer_flags |= cpu_to_le32(WMI_PEER_40MHZ); 1898 if (arg->bw_80) 1899 cmd->peer_flags |= cpu_to_le32(WMI_PEER_80MHZ); 1900 if (arg->bw_160) 1901 cmd->peer_flags |= cpu_to_le32(WMI_PEER_160MHZ); 1902 if (arg->bw_320) 1903 cmd->peer_flags_ext |= cpu_to_le32(WMI_PEER_EXT_320MHZ); 1904 1905 /* Typically if STBC is enabled for VHT it should be enabled 1906 * for HT as well 1907 **/ 1908 if (arg->stbc_flag) 1909 cmd->peer_flags |= cpu_to_le32(WMI_PEER_STBC); 1910 1911 /* Typically if LDPC is enabled for VHT it should be enabled 1912 * for HT as well 1913 **/ 1914 if (arg->ldpc_flag) 1915 cmd->peer_flags |= cpu_to_le32(WMI_PEER_LDPC); 1916 1917 if (arg->static_mimops_flag) 1918 cmd->peer_flags |= cpu_to_le32(WMI_PEER_STATIC_MIMOPS); 1919 if (arg->dynamic_mimops_flag) 1920 cmd->peer_flags |= cpu_to_le32(WMI_PEER_DYN_MIMOPS); 1921 if (arg->spatial_mux_flag) 1922 cmd->peer_flags |= cpu_to_le32(WMI_PEER_SPATIAL_MUX); 1923 if (arg->vht_flag) 1924 cmd->peer_flags |= cpu_to_le32(WMI_PEER_VHT); 1925 if (arg->he_flag) 1926 cmd->peer_flags |= cpu_to_le32(WMI_PEER_HE); 1927 if (arg->twt_requester) 1928 cmd->peer_flags |= cpu_to_le32(WMI_PEER_TWT_REQ); 1929 if (arg->twt_responder) 1930 cmd->peer_flags |= cpu_to_le32(WMI_PEER_TWT_RESP); 1931 if (arg->eht_flag) 1932 cmd->peer_flags_ext |= cpu_to_le32(WMI_PEER_EXT_EHT); 1933 } 1934 1935 /* Suppress authorization for all AUTH modes that need 4-way handshake 1936 * (during re-association). 1937 * Authorization will be done for these modes on key installation. 1938 */ 1939 if (arg->auth_flag) 1940 cmd->peer_flags |= cpu_to_le32(WMI_PEER_AUTH); 1941 if (arg->need_ptk_4_way) { 1942 cmd->peer_flags |= cpu_to_le32(WMI_PEER_NEED_PTK_4_WAY); 1943 if (!hw_crypto_disabled) 1944 cmd->peer_flags &= cpu_to_le32(~WMI_PEER_AUTH); 1945 } 1946 if (arg->need_gtk_2_way) 1947 cmd->peer_flags |= cpu_to_le32(WMI_PEER_NEED_GTK_2_WAY); 1948 /* safe mode bypass the 4-way handshake */ 1949 if (arg->safe_mode_enabled) 1950 cmd->peer_flags &= cpu_to_le32(~(WMI_PEER_NEED_PTK_4_WAY | 1951 WMI_PEER_NEED_GTK_2_WAY)); 1952 1953 if (arg->is_pmf_enabled) 1954 cmd->peer_flags |= cpu_to_le32(WMI_PEER_PMF); 1955 1956 /* Disable AMSDU for station transmit, if user configures it */ 1957 /* Disable AMSDU for AP transmit to 11n Stations, if user configures 1958 * it 1959 * if (arg->amsdu_disable) Add after FW support 1960 **/ 1961 1962 /* Target asserts if node is marked HT and all MCS is set to 0. 1963 * Mark the node as non-HT if all the mcs rates are disabled through 1964 * iwpriv 1965 **/ 1966 if (arg->peer_ht_rates.num_rates == 0) 1967 cmd->peer_flags &= cpu_to_le32(~WMI_PEER_HT); 1968 } 1969 1970 int ath12k_wmi_send_peer_assoc_cmd(struct ath12k *ar, 1971 struct ath12k_wmi_peer_assoc_arg *arg) 1972 { 1973 struct ath12k_wmi_pdev *wmi = ar->wmi; 1974 struct wmi_peer_assoc_complete_cmd *cmd; 1975 struct ath12k_wmi_vht_rate_set_params *mcs; 1976 struct ath12k_wmi_he_rate_set_params *he_mcs; 1977 struct ath12k_wmi_eht_rate_set_params *eht_mcs; 1978 struct sk_buff *skb; 1979 struct wmi_tlv *tlv; 1980 void *ptr; 1981 u32 peer_legacy_rates_align; 1982 u32 peer_ht_rates_align; 1983 int i, ret, len; 1984 1985 peer_legacy_rates_align = roundup(arg->peer_legacy_rates.num_rates, 1986 sizeof(u32)); 1987 peer_ht_rates_align = roundup(arg->peer_ht_rates.num_rates, 1988 sizeof(u32)); 1989 1990 len = sizeof(*cmd) + 1991 TLV_HDR_SIZE + (peer_legacy_rates_align * sizeof(u8)) + 1992 TLV_HDR_SIZE + (peer_ht_rates_align * sizeof(u8)) + 1993 sizeof(*mcs) + TLV_HDR_SIZE + 1994 (sizeof(*he_mcs) * arg->peer_he_mcs_count) + 1995 TLV_HDR_SIZE + (sizeof(*eht_mcs) * arg->peer_eht_mcs_count) + 1996 TLV_HDR_SIZE + TLV_HDR_SIZE; 1997 1998 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 1999 if (!skb) 2000 return -ENOMEM; 2001 2002 ptr = skb->data; 2003 2004 cmd = ptr; 2005 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_ASSOC_COMPLETE_CMD, 2006 sizeof(*cmd)); 2007 2008 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 2009 2010 cmd->peer_new_assoc = cpu_to_le32(arg->peer_new_assoc); 2011 cmd->peer_associd = cpu_to_le32(arg->peer_associd); 2012 cmd->punct_bitmap = cpu_to_le32(arg->punct_bitmap); 2013 2014 ath12k_wmi_copy_peer_flags(cmd, arg, 2015 test_bit(ATH12K_FLAG_HW_CRYPTO_DISABLED, 2016 &ar->ab->dev_flags)); 2017 2018 ether_addr_copy(cmd->peer_macaddr.addr, arg->peer_mac); 2019 2020 cmd->peer_rate_caps = cpu_to_le32(arg->peer_rate_caps); 2021 cmd->peer_caps = cpu_to_le32(arg->peer_caps); 2022 cmd->peer_listen_intval = cpu_to_le32(arg->peer_listen_intval); 2023 cmd->peer_ht_caps = cpu_to_le32(arg->peer_ht_caps); 2024 cmd->peer_max_mpdu = cpu_to_le32(arg->peer_max_mpdu); 2025 cmd->peer_mpdu_density = cpu_to_le32(arg->peer_mpdu_density); 2026 cmd->peer_vht_caps = cpu_to_le32(arg->peer_vht_caps); 2027 cmd->peer_phymode = cpu_to_le32(arg->peer_phymode); 2028 2029 /* Update 11ax capabilities */ 2030 cmd->peer_he_cap_info = cpu_to_le32(arg->peer_he_cap_macinfo[0]); 2031 cmd->peer_he_cap_info_ext = cpu_to_le32(arg->peer_he_cap_macinfo[1]); 2032 cmd->peer_he_cap_info_internal = cpu_to_le32(arg->peer_he_cap_macinfo_internal); 2033 cmd->peer_he_caps_6ghz = cpu_to_le32(arg->peer_he_caps_6ghz); 2034 cmd->peer_he_ops = cpu_to_le32(arg->peer_he_ops); 2035 for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++) 2036 cmd->peer_he_cap_phy[i] = 2037 cpu_to_le32(arg->peer_he_cap_phyinfo[i]); 2038 cmd->peer_ppet.numss_m1 = cpu_to_le32(arg->peer_ppet.numss_m1); 2039 cmd->peer_ppet.ru_info = cpu_to_le32(arg->peer_ppet.ru_bit_mask); 2040 for (i = 0; i < WMI_MAX_NUM_SS; i++) 2041 cmd->peer_ppet.ppet16_ppet8_ru3_ru0[i] = 2042 cpu_to_le32(arg->peer_ppet.ppet16_ppet8_ru3_ru0[i]); 2043 2044 /* Update 11be capabilities */ 2045 memcpy_and_pad(cmd->peer_eht_cap_mac, sizeof(cmd->peer_eht_cap_mac), 2046 arg->peer_eht_cap_mac, sizeof(arg->peer_eht_cap_mac), 2047 0); 2048 memcpy_and_pad(cmd->peer_eht_cap_phy, sizeof(cmd->peer_eht_cap_phy), 2049 arg->peer_eht_cap_phy, sizeof(arg->peer_eht_cap_phy), 2050 0); 2051 memcpy_and_pad(&cmd->peer_eht_ppet, sizeof(cmd->peer_eht_ppet), 2052 &arg->peer_eht_ppet, sizeof(arg->peer_eht_ppet), 0); 2053 2054 /* Update peer legacy rate information */ 2055 ptr += sizeof(*cmd); 2056 2057 tlv = ptr; 2058 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, peer_legacy_rates_align); 2059 2060 ptr += TLV_HDR_SIZE; 2061 2062 cmd->num_peer_legacy_rates = cpu_to_le32(arg->peer_legacy_rates.num_rates); 2063 memcpy(ptr, arg->peer_legacy_rates.rates, 2064 arg->peer_legacy_rates.num_rates); 2065 2066 /* Update peer HT rate information */ 2067 ptr += peer_legacy_rates_align; 2068 2069 tlv = ptr; 2070 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, peer_ht_rates_align); 2071 ptr += TLV_HDR_SIZE; 2072 cmd->num_peer_ht_rates = cpu_to_le32(arg->peer_ht_rates.num_rates); 2073 memcpy(ptr, arg->peer_ht_rates.rates, 2074 arg->peer_ht_rates.num_rates); 2075 2076 /* VHT Rates */ 2077 ptr += peer_ht_rates_align; 2078 2079 mcs = ptr; 2080 2081 mcs->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VHT_RATE_SET, 2082 sizeof(*mcs)); 2083 2084 cmd->peer_nss = cpu_to_le32(arg->peer_nss); 2085 2086 /* Update bandwidth-NSS mapping */ 2087 cmd->peer_bw_rxnss_override = 0; 2088 cmd->peer_bw_rxnss_override |= cpu_to_le32(arg->peer_bw_rxnss_override); 2089 2090 if (arg->vht_capable) { 2091 mcs->rx_max_rate = cpu_to_le32(arg->rx_max_rate); 2092 mcs->rx_mcs_set = cpu_to_le32(arg->rx_mcs_set); 2093 mcs->tx_max_rate = cpu_to_le32(arg->tx_max_rate); 2094 mcs->tx_mcs_set = cpu_to_le32(arg->tx_mcs_set); 2095 } 2096 2097 /* HE Rates */ 2098 cmd->peer_he_mcs = cpu_to_le32(arg->peer_he_mcs_count); 2099 cmd->min_data_rate = cpu_to_le32(arg->min_data_rate); 2100 2101 ptr += sizeof(*mcs); 2102 2103 len = arg->peer_he_mcs_count * sizeof(*he_mcs); 2104 2105 tlv = ptr; 2106 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len); 2107 ptr += TLV_HDR_SIZE; 2108 2109 /* Loop through the HE rate set */ 2110 for (i = 0; i < arg->peer_he_mcs_count; i++) { 2111 he_mcs = ptr; 2112 he_mcs->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_HE_RATE_SET, 2113 sizeof(*he_mcs)); 2114 2115 he_mcs->rx_mcs_set = cpu_to_le32(arg->peer_he_rx_mcs_set[i]); 2116 he_mcs->tx_mcs_set = cpu_to_le32(arg->peer_he_tx_mcs_set[i]); 2117 ptr += sizeof(*he_mcs); 2118 } 2119 2120 /* MLO header tag with 0 length */ 2121 len = 0; 2122 tlv = ptr; 2123 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len); 2124 ptr += TLV_HDR_SIZE; 2125 2126 /* Loop through the EHT rate set */ 2127 len = arg->peer_eht_mcs_count * sizeof(*eht_mcs); 2128 tlv = ptr; 2129 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len); 2130 ptr += TLV_HDR_SIZE; 2131 2132 for (i = 0; i < arg->peer_eht_mcs_count; i++) { 2133 eht_mcs = ptr; 2134 eht_mcs->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_HE_RATE_SET, 2135 sizeof(*eht_mcs)); 2136 2137 eht_mcs->rx_mcs_set = cpu_to_le32(arg->peer_eht_rx_mcs_set[i]); 2138 eht_mcs->tx_mcs_set = cpu_to_le32(arg->peer_eht_tx_mcs_set[i]); 2139 ptr += sizeof(*eht_mcs); 2140 } 2141 2142 /* ML partner links tag with 0 length */ 2143 len = 0; 2144 tlv = ptr; 2145 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len); 2146 ptr += TLV_HDR_SIZE; 2147 2148 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2149 "wmi peer assoc vdev id %d assoc id %d peer mac %pM peer_flags %x rate_caps %x peer_caps %x listen_intval %d ht_caps %x max_mpdu %d nss %d phymode %d peer_mpdu_density %d vht_caps %x he cap_info %x he ops %x he cap_info_ext %x he phy %x %x %x peer_bw_rxnss_override %x peer_flags_ext %x eht mac_cap %x %x eht phy_cap %x %x %x\n", 2150 cmd->vdev_id, cmd->peer_associd, arg->peer_mac, 2151 cmd->peer_flags, cmd->peer_rate_caps, cmd->peer_caps, 2152 cmd->peer_listen_intval, cmd->peer_ht_caps, 2153 cmd->peer_max_mpdu, cmd->peer_nss, cmd->peer_phymode, 2154 cmd->peer_mpdu_density, 2155 cmd->peer_vht_caps, cmd->peer_he_cap_info, 2156 cmd->peer_he_ops, cmd->peer_he_cap_info_ext, 2157 cmd->peer_he_cap_phy[0], cmd->peer_he_cap_phy[1], 2158 cmd->peer_he_cap_phy[2], 2159 cmd->peer_bw_rxnss_override, cmd->peer_flags_ext, 2160 cmd->peer_eht_cap_mac[0], cmd->peer_eht_cap_mac[1], 2161 cmd->peer_eht_cap_phy[0], cmd->peer_eht_cap_phy[1], 2162 cmd->peer_eht_cap_phy[2]); 2163 2164 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_ASSOC_CMDID); 2165 if (ret) { 2166 ath12k_warn(ar->ab, 2167 "failed to send WMI_PEER_ASSOC_CMDID\n"); 2168 dev_kfree_skb(skb); 2169 } 2170 2171 return ret; 2172 } 2173 2174 void ath12k_wmi_start_scan_init(struct ath12k *ar, 2175 struct ath12k_wmi_scan_req_arg *arg) 2176 { 2177 /* setup commonly used values */ 2178 arg->scan_req_id = 1; 2179 arg->scan_priority = WMI_SCAN_PRIORITY_LOW; 2180 arg->dwell_time_active = 50; 2181 arg->dwell_time_active_2g = 0; 2182 arg->dwell_time_passive = 150; 2183 arg->dwell_time_active_6g = 40; 2184 arg->dwell_time_passive_6g = 30; 2185 arg->min_rest_time = 50; 2186 arg->max_rest_time = 500; 2187 arg->repeat_probe_time = 0; 2188 arg->probe_spacing_time = 0; 2189 arg->idle_time = 0; 2190 arg->max_scan_time = 20000; 2191 arg->probe_delay = 5; 2192 arg->notify_scan_events = WMI_SCAN_EVENT_STARTED | 2193 WMI_SCAN_EVENT_COMPLETED | 2194 WMI_SCAN_EVENT_BSS_CHANNEL | 2195 WMI_SCAN_EVENT_FOREIGN_CHAN | 2196 WMI_SCAN_EVENT_DEQUEUED; 2197 arg->scan_f_chan_stat_evnt = 1; 2198 arg->num_bssid = 1; 2199 2200 /* fill bssid_list[0] with 0xff, otherwise bssid and RA will be 2201 * ZEROs in probe request 2202 */ 2203 eth_broadcast_addr(arg->bssid_list[0].addr); 2204 } 2205 2206 static void ath12k_wmi_copy_scan_event_cntrl_flags(struct wmi_start_scan_cmd *cmd, 2207 struct ath12k_wmi_scan_req_arg *arg) 2208 { 2209 /* Scan events subscription */ 2210 if (arg->scan_ev_started) 2211 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_STARTED); 2212 if (arg->scan_ev_completed) 2213 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_COMPLETED); 2214 if (arg->scan_ev_bss_chan) 2215 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_BSS_CHANNEL); 2216 if (arg->scan_ev_foreign_chan) 2217 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_FOREIGN_CHAN); 2218 if (arg->scan_ev_dequeued) 2219 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_DEQUEUED); 2220 if (arg->scan_ev_preempted) 2221 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_PREEMPTED); 2222 if (arg->scan_ev_start_failed) 2223 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_START_FAILED); 2224 if (arg->scan_ev_restarted) 2225 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_RESTARTED); 2226 if (arg->scan_ev_foreign_chn_exit) 2227 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT); 2228 if (arg->scan_ev_suspended) 2229 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_SUSPENDED); 2230 if (arg->scan_ev_resumed) 2231 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_RESUMED); 2232 2233 /** Set scan control flags */ 2234 cmd->scan_ctrl_flags = 0; 2235 if (arg->scan_f_passive) 2236 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_PASSIVE); 2237 if (arg->scan_f_strict_passive_pch) 2238 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_STRICT_PASSIVE_ON_PCHN); 2239 if (arg->scan_f_promisc_mode) 2240 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FILTER_PROMISCUOS); 2241 if (arg->scan_f_capture_phy_err) 2242 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_CAPTURE_PHY_ERROR); 2243 if (arg->scan_f_half_rate) 2244 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_HALF_RATE_SUPPORT); 2245 if (arg->scan_f_quarter_rate) 2246 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_QUARTER_RATE_SUPPORT); 2247 if (arg->scan_f_cck_rates) 2248 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_CCK_RATES); 2249 if (arg->scan_f_ofdm_rates) 2250 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_OFDM_RATES); 2251 if (arg->scan_f_chan_stat_evnt) 2252 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_CHAN_STAT_EVENT); 2253 if (arg->scan_f_filter_prb_req) 2254 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FILTER_PROBE_REQ); 2255 if (arg->scan_f_bcast_probe) 2256 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_BCAST_PROBE_REQ); 2257 if (arg->scan_f_offchan_mgmt_tx) 2258 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_OFFCHAN_MGMT_TX); 2259 if (arg->scan_f_offchan_data_tx) 2260 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_OFFCHAN_DATA_TX); 2261 if (arg->scan_f_force_active_dfs_chn) 2262 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_FORCE_ACTIVE_ON_DFS); 2263 if (arg->scan_f_add_tpc_ie_in_probe) 2264 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_TPC_IE_IN_PROBE_REQ); 2265 if (arg->scan_f_add_ds_ie_in_probe) 2266 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_DS_IE_IN_PROBE_REQ); 2267 if (arg->scan_f_add_spoofed_mac_in_probe) 2268 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_SPOOF_MAC_IN_PROBE_REQ); 2269 if (arg->scan_f_add_rand_seq_in_probe) 2270 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_RANDOM_SEQ_NO_IN_PROBE_REQ); 2271 if (arg->scan_f_en_ie_whitelist_in_probe) 2272 cmd->scan_ctrl_flags |= 2273 cpu_to_le32(WMI_SCAN_ENABLE_IE_WHTELIST_IN_PROBE_REQ); 2274 2275 cmd->scan_ctrl_flags |= le32_encode_bits(arg->adaptive_dwell_time_mode, 2276 WMI_SCAN_DWELL_MODE_MASK); 2277 } 2278 2279 int ath12k_wmi_send_scan_start_cmd(struct ath12k *ar, 2280 struct ath12k_wmi_scan_req_arg *arg) 2281 { 2282 struct ath12k_wmi_pdev *wmi = ar->wmi; 2283 struct wmi_start_scan_cmd *cmd; 2284 struct ath12k_wmi_ssid_params *ssid = NULL; 2285 struct ath12k_wmi_mac_addr_params *bssid; 2286 struct sk_buff *skb; 2287 struct wmi_tlv *tlv; 2288 void *ptr; 2289 int i, ret, len; 2290 u32 *tmp_ptr, extraie_len_with_pad = 0; 2291 struct ath12k_wmi_hint_short_ssid_arg *s_ssid = NULL; 2292 struct ath12k_wmi_hint_bssid_arg *hint_bssid = NULL; 2293 2294 len = sizeof(*cmd); 2295 2296 len += TLV_HDR_SIZE; 2297 if (arg->num_chan) 2298 len += arg->num_chan * sizeof(u32); 2299 2300 len += TLV_HDR_SIZE; 2301 if (arg->num_ssids) 2302 len += arg->num_ssids * sizeof(*ssid); 2303 2304 len += TLV_HDR_SIZE; 2305 if (arg->num_bssid) 2306 len += sizeof(*bssid) * arg->num_bssid; 2307 2308 if (arg->num_hint_bssid) 2309 len += TLV_HDR_SIZE + 2310 arg->num_hint_bssid * sizeof(*hint_bssid); 2311 2312 if (arg->num_hint_s_ssid) 2313 len += TLV_HDR_SIZE + 2314 arg->num_hint_s_ssid * sizeof(*s_ssid); 2315 2316 len += TLV_HDR_SIZE; 2317 if (arg->extraie.len) 2318 extraie_len_with_pad = 2319 roundup(arg->extraie.len, sizeof(u32)); 2320 if (extraie_len_with_pad <= (wmi->wmi_ab->max_msg_len[ar->pdev_idx] - len)) { 2321 len += extraie_len_with_pad; 2322 } else { 2323 ath12k_warn(ar->ab, "discard large size %d bytes extraie for scan start\n", 2324 arg->extraie.len); 2325 extraie_len_with_pad = 0; 2326 } 2327 2328 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 2329 if (!skb) 2330 return -ENOMEM; 2331 2332 ptr = skb->data; 2333 2334 cmd = ptr; 2335 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_START_SCAN_CMD, 2336 sizeof(*cmd)); 2337 2338 cmd->scan_id = cpu_to_le32(arg->scan_id); 2339 cmd->scan_req_id = cpu_to_le32(arg->scan_req_id); 2340 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 2341 cmd->scan_priority = cpu_to_le32(arg->scan_priority); 2342 cmd->notify_scan_events = cpu_to_le32(arg->notify_scan_events); 2343 2344 ath12k_wmi_copy_scan_event_cntrl_flags(cmd, arg); 2345 2346 cmd->dwell_time_active = cpu_to_le32(arg->dwell_time_active); 2347 cmd->dwell_time_active_2g = cpu_to_le32(arg->dwell_time_active_2g); 2348 cmd->dwell_time_passive = cpu_to_le32(arg->dwell_time_passive); 2349 cmd->dwell_time_active_6g = cpu_to_le32(arg->dwell_time_active_6g); 2350 cmd->dwell_time_passive_6g = cpu_to_le32(arg->dwell_time_passive_6g); 2351 cmd->min_rest_time = cpu_to_le32(arg->min_rest_time); 2352 cmd->max_rest_time = cpu_to_le32(arg->max_rest_time); 2353 cmd->repeat_probe_time = cpu_to_le32(arg->repeat_probe_time); 2354 cmd->probe_spacing_time = cpu_to_le32(arg->probe_spacing_time); 2355 cmd->idle_time = cpu_to_le32(arg->idle_time); 2356 cmd->max_scan_time = cpu_to_le32(arg->max_scan_time); 2357 cmd->probe_delay = cpu_to_le32(arg->probe_delay); 2358 cmd->burst_duration = cpu_to_le32(arg->burst_duration); 2359 cmd->num_chan = cpu_to_le32(arg->num_chan); 2360 cmd->num_bssid = cpu_to_le32(arg->num_bssid); 2361 cmd->num_ssids = cpu_to_le32(arg->num_ssids); 2362 cmd->ie_len = cpu_to_le32(arg->extraie.len); 2363 cmd->n_probes = cpu_to_le32(arg->n_probes); 2364 2365 ptr += sizeof(*cmd); 2366 2367 len = arg->num_chan * sizeof(u32); 2368 2369 tlv = ptr; 2370 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, len); 2371 ptr += TLV_HDR_SIZE; 2372 tmp_ptr = (u32 *)ptr; 2373 2374 memcpy(tmp_ptr, arg->chan_list, arg->num_chan * 4); 2375 2376 ptr += len; 2377 2378 len = arg->num_ssids * sizeof(*ssid); 2379 tlv = ptr; 2380 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len); 2381 2382 ptr += TLV_HDR_SIZE; 2383 2384 if (arg->num_ssids) { 2385 ssid = ptr; 2386 for (i = 0; i < arg->num_ssids; ++i) { 2387 ssid->ssid_len = cpu_to_le32(arg->ssid[i].ssid_len); 2388 memcpy(ssid->ssid, arg->ssid[i].ssid, 2389 arg->ssid[i].ssid_len); 2390 ssid++; 2391 } 2392 } 2393 2394 ptr += (arg->num_ssids * sizeof(*ssid)); 2395 len = arg->num_bssid * sizeof(*bssid); 2396 tlv = ptr; 2397 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len); 2398 2399 ptr += TLV_HDR_SIZE; 2400 bssid = ptr; 2401 2402 if (arg->num_bssid) { 2403 for (i = 0; i < arg->num_bssid; ++i) { 2404 ether_addr_copy(bssid->addr, 2405 arg->bssid_list[i].addr); 2406 bssid++; 2407 } 2408 } 2409 2410 ptr += arg->num_bssid * sizeof(*bssid); 2411 2412 len = extraie_len_with_pad; 2413 tlv = ptr; 2414 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, len); 2415 ptr += TLV_HDR_SIZE; 2416 2417 if (extraie_len_with_pad) 2418 memcpy(ptr, arg->extraie.ptr, 2419 arg->extraie.len); 2420 2421 ptr += extraie_len_with_pad; 2422 2423 if (arg->num_hint_s_ssid) { 2424 len = arg->num_hint_s_ssid * sizeof(*s_ssid); 2425 tlv = ptr; 2426 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len); 2427 ptr += TLV_HDR_SIZE; 2428 s_ssid = ptr; 2429 for (i = 0; i < arg->num_hint_s_ssid; ++i) { 2430 s_ssid->freq_flags = arg->hint_s_ssid[i].freq_flags; 2431 s_ssid->short_ssid = arg->hint_s_ssid[i].short_ssid; 2432 s_ssid++; 2433 } 2434 ptr += len; 2435 } 2436 2437 if (arg->num_hint_bssid) { 2438 len = arg->num_hint_bssid * sizeof(struct ath12k_wmi_hint_bssid_arg); 2439 tlv = ptr; 2440 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len); 2441 ptr += TLV_HDR_SIZE; 2442 hint_bssid = ptr; 2443 for (i = 0; i < arg->num_hint_bssid; ++i) { 2444 hint_bssid->freq_flags = 2445 arg->hint_bssid[i].freq_flags; 2446 ether_addr_copy(&arg->hint_bssid[i].bssid.addr[0], 2447 &hint_bssid->bssid.addr[0]); 2448 hint_bssid++; 2449 } 2450 } 2451 2452 ret = ath12k_wmi_cmd_send(wmi, skb, 2453 WMI_START_SCAN_CMDID); 2454 if (ret) { 2455 ath12k_warn(ar->ab, "failed to send WMI_START_SCAN_CMDID\n"); 2456 dev_kfree_skb(skb); 2457 } 2458 2459 return ret; 2460 } 2461 2462 int ath12k_wmi_send_scan_stop_cmd(struct ath12k *ar, 2463 struct ath12k_wmi_scan_cancel_arg *arg) 2464 { 2465 struct ath12k_wmi_pdev *wmi = ar->wmi; 2466 struct wmi_stop_scan_cmd *cmd; 2467 struct sk_buff *skb; 2468 int ret; 2469 2470 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 2471 if (!skb) 2472 return -ENOMEM; 2473 2474 cmd = (struct wmi_stop_scan_cmd *)skb->data; 2475 2476 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STOP_SCAN_CMD, 2477 sizeof(*cmd)); 2478 2479 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 2480 cmd->requestor = cpu_to_le32(arg->requester); 2481 cmd->scan_id = cpu_to_le32(arg->scan_id); 2482 cmd->pdev_id = cpu_to_le32(arg->pdev_id); 2483 /* stop the scan with the corresponding scan_id */ 2484 if (arg->req_type == WLAN_SCAN_CANCEL_PDEV_ALL) { 2485 /* Cancelling all scans */ 2486 cmd->req_type = cpu_to_le32(WMI_SCAN_STOP_ALL); 2487 } else if (arg->req_type == WLAN_SCAN_CANCEL_VDEV_ALL) { 2488 /* Cancelling VAP scans */ 2489 cmd->req_type = cpu_to_le32(WMI_SCAN_STOP_VAP_ALL); 2490 } else if (arg->req_type == WLAN_SCAN_CANCEL_SINGLE) { 2491 /* Cancelling specific scan */ 2492 cmd->req_type = WMI_SCAN_STOP_ONE; 2493 } else { 2494 ath12k_warn(ar->ab, "invalid scan cancel req_type %d", 2495 arg->req_type); 2496 dev_kfree_skb(skb); 2497 return -EINVAL; 2498 } 2499 2500 ret = ath12k_wmi_cmd_send(wmi, skb, 2501 WMI_STOP_SCAN_CMDID); 2502 if (ret) { 2503 ath12k_warn(ar->ab, "failed to send WMI_STOP_SCAN_CMDID\n"); 2504 dev_kfree_skb(skb); 2505 } 2506 2507 return ret; 2508 } 2509 2510 int ath12k_wmi_send_scan_chan_list_cmd(struct ath12k *ar, 2511 struct ath12k_wmi_scan_chan_list_arg *arg) 2512 { 2513 struct ath12k_wmi_pdev *wmi = ar->wmi; 2514 struct wmi_scan_chan_list_cmd *cmd; 2515 struct sk_buff *skb; 2516 struct ath12k_wmi_channel_params *chan_info; 2517 struct ath12k_wmi_channel_arg *channel_arg; 2518 struct wmi_tlv *tlv; 2519 void *ptr; 2520 int i, ret, len; 2521 u16 num_send_chans, num_sends = 0, max_chan_limit = 0; 2522 __le32 *reg1, *reg2; 2523 2524 channel_arg = &arg->channel[0]; 2525 while (arg->nallchans) { 2526 len = sizeof(*cmd) + TLV_HDR_SIZE; 2527 max_chan_limit = (wmi->wmi_ab->max_msg_len[ar->pdev_idx] - len) / 2528 sizeof(*chan_info); 2529 2530 num_send_chans = min(arg->nallchans, max_chan_limit); 2531 2532 arg->nallchans -= num_send_chans; 2533 len += sizeof(*chan_info) * num_send_chans; 2534 2535 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 2536 if (!skb) 2537 return -ENOMEM; 2538 2539 cmd = (struct wmi_scan_chan_list_cmd *)skb->data; 2540 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_SCAN_CHAN_LIST_CMD, 2541 sizeof(*cmd)); 2542 cmd->pdev_id = cpu_to_le32(arg->pdev_id); 2543 cmd->num_scan_chans = cpu_to_le32(num_send_chans); 2544 if (num_sends) 2545 cmd->flags |= cpu_to_le32(WMI_APPEND_TO_EXISTING_CHAN_LIST_FLAG); 2546 2547 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2548 "WMI no.of chan = %d len = %d pdev_id = %d num_sends = %d\n", 2549 num_send_chans, len, cmd->pdev_id, num_sends); 2550 2551 ptr = skb->data + sizeof(*cmd); 2552 2553 len = sizeof(*chan_info) * num_send_chans; 2554 tlv = ptr; 2555 tlv->header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ARRAY_STRUCT, 2556 len); 2557 ptr += TLV_HDR_SIZE; 2558 2559 for (i = 0; i < num_send_chans; ++i) { 2560 chan_info = ptr; 2561 memset(chan_info, 0, sizeof(*chan_info)); 2562 len = sizeof(*chan_info); 2563 chan_info->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_CHANNEL, 2564 len); 2565 2566 reg1 = &chan_info->reg_info_1; 2567 reg2 = &chan_info->reg_info_2; 2568 chan_info->mhz = cpu_to_le32(channel_arg->mhz); 2569 chan_info->band_center_freq1 = cpu_to_le32(channel_arg->cfreq1); 2570 chan_info->band_center_freq2 = cpu_to_le32(channel_arg->cfreq2); 2571 2572 if (channel_arg->is_chan_passive) 2573 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_PASSIVE); 2574 if (channel_arg->allow_he) 2575 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HE); 2576 else if (channel_arg->allow_vht) 2577 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_VHT); 2578 else if (channel_arg->allow_ht) 2579 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HT); 2580 if (channel_arg->half_rate) 2581 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_HALF_RATE); 2582 if (channel_arg->quarter_rate) 2583 chan_info->info |= 2584 cpu_to_le32(WMI_CHAN_INFO_QUARTER_RATE); 2585 2586 if (channel_arg->psc_channel) 2587 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_PSC); 2588 2589 if (channel_arg->dfs_set) 2590 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_DFS); 2591 2592 chan_info->info |= le32_encode_bits(channel_arg->phy_mode, 2593 WMI_CHAN_INFO_MODE); 2594 *reg1 |= le32_encode_bits(channel_arg->minpower, 2595 WMI_CHAN_REG_INFO1_MIN_PWR); 2596 *reg1 |= le32_encode_bits(channel_arg->maxpower, 2597 WMI_CHAN_REG_INFO1_MAX_PWR); 2598 *reg1 |= le32_encode_bits(channel_arg->maxregpower, 2599 WMI_CHAN_REG_INFO1_MAX_REG_PWR); 2600 *reg1 |= le32_encode_bits(channel_arg->reg_class_id, 2601 WMI_CHAN_REG_INFO1_REG_CLS); 2602 *reg2 |= le32_encode_bits(channel_arg->antennamax, 2603 WMI_CHAN_REG_INFO2_ANT_MAX); 2604 2605 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2606 "WMI chan scan list chan[%d] = %u, chan_info->info %8x\n", 2607 i, chan_info->mhz, chan_info->info); 2608 2609 ptr += sizeof(*chan_info); 2610 2611 channel_arg++; 2612 } 2613 2614 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_SCAN_CHAN_LIST_CMDID); 2615 if (ret) { 2616 ath12k_warn(ar->ab, "failed to send WMI_SCAN_CHAN_LIST cmd\n"); 2617 dev_kfree_skb(skb); 2618 return ret; 2619 } 2620 2621 num_sends++; 2622 } 2623 2624 return 0; 2625 } 2626 2627 int ath12k_wmi_send_wmm_update_cmd(struct ath12k *ar, u32 vdev_id, 2628 struct wmi_wmm_params_all_arg *param) 2629 { 2630 struct ath12k_wmi_pdev *wmi = ar->wmi; 2631 struct wmi_vdev_set_wmm_params_cmd *cmd; 2632 struct wmi_wmm_params *wmm_param; 2633 struct wmi_wmm_params_arg *wmi_wmm_arg; 2634 struct sk_buff *skb; 2635 int ret, ac; 2636 2637 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 2638 if (!skb) 2639 return -ENOMEM; 2640 2641 cmd = (struct wmi_vdev_set_wmm_params_cmd *)skb->data; 2642 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SET_WMM_PARAMS_CMD, 2643 sizeof(*cmd)); 2644 2645 cmd->vdev_id = cpu_to_le32(vdev_id); 2646 cmd->wmm_param_type = 0; 2647 2648 for (ac = 0; ac < WME_NUM_AC; ac++) { 2649 switch (ac) { 2650 case WME_AC_BE: 2651 wmi_wmm_arg = ¶m->ac_be; 2652 break; 2653 case WME_AC_BK: 2654 wmi_wmm_arg = ¶m->ac_bk; 2655 break; 2656 case WME_AC_VI: 2657 wmi_wmm_arg = ¶m->ac_vi; 2658 break; 2659 case WME_AC_VO: 2660 wmi_wmm_arg = ¶m->ac_vo; 2661 break; 2662 } 2663 2664 wmm_param = (struct wmi_wmm_params *)&cmd->wmm_params[ac]; 2665 wmm_param->tlv_header = 2666 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SET_WMM_PARAMS_CMD, 2667 sizeof(*wmm_param)); 2668 2669 wmm_param->aifs = cpu_to_le32(wmi_wmm_arg->aifs); 2670 wmm_param->cwmin = cpu_to_le32(wmi_wmm_arg->cwmin); 2671 wmm_param->cwmax = cpu_to_le32(wmi_wmm_arg->cwmax); 2672 wmm_param->txoplimit = cpu_to_le32(wmi_wmm_arg->txop); 2673 wmm_param->acm = cpu_to_le32(wmi_wmm_arg->acm); 2674 wmm_param->no_ack = cpu_to_le32(wmi_wmm_arg->no_ack); 2675 2676 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2677 "wmi wmm set ac %d aifs %d cwmin %d cwmax %d txop %d acm %d no_ack %d\n", 2678 ac, wmm_param->aifs, wmm_param->cwmin, 2679 wmm_param->cwmax, wmm_param->txoplimit, 2680 wmm_param->acm, wmm_param->no_ack); 2681 } 2682 ret = ath12k_wmi_cmd_send(wmi, skb, 2683 WMI_VDEV_SET_WMM_PARAMS_CMDID); 2684 if (ret) { 2685 ath12k_warn(ar->ab, 2686 "failed to send WMI_VDEV_SET_WMM_PARAMS_CMDID"); 2687 dev_kfree_skb(skb); 2688 } 2689 2690 return ret; 2691 } 2692 2693 int ath12k_wmi_send_dfs_phyerr_offload_enable_cmd(struct ath12k *ar, 2694 u32 pdev_id) 2695 { 2696 struct ath12k_wmi_pdev *wmi = ar->wmi; 2697 struct wmi_dfs_phyerr_offload_cmd *cmd; 2698 struct sk_buff *skb; 2699 int ret; 2700 2701 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 2702 if (!skb) 2703 return -ENOMEM; 2704 2705 cmd = (struct wmi_dfs_phyerr_offload_cmd *)skb->data; 2706 cmd->tlv_header = 2707 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMD, 2708 sizeof(*cmd)); 2709 2710 cmd->pdev_id = cpu_to_le32(pdev_id); 2711 2712 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2713 "WMI dfs phy err offload enable pdev id %d\n", pdev_id); 2714 2715 ret = ath12k_wmi_cmd_send(wmi, skb, 2716 WMI_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMDID); 2717 if (ret) { 2718 ath12k_warn(ar->ab, 2719 "failed to send WMI_PDEV_DFS_PHYERR_OFFLOAD_ENABLE cmd\n"); 2720 dev_kfree_skb(skb); 2721 } 2722 2723 return ret; 2724 } 2725 2726 int ath12k_wmi_set_bios_cmd(struct ath12k_base *ab, u32 param_id, 2727 const u8 *buf, size_t buf_len) 2728 { 2729 struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab; 2730 struct wmi_pdev_set_bios_interface_cmd *cmd; 2731 struct wmi_tlv *tlv; 2732 struct sk_buff *skb; 2733 u8 *ptr; 2734 u32 len, len_aligned; 2735 int ret; 2736 2737 len_aligned = roundup(buf_len, sizeof(u32)); 2738 len = sizeof(*cmd) + TLV_HDR_SIZE + len_aligned; 2739 2740 skb = ath12k_wmi_alloc_skb(wmi_ab, len); 2741 if (!skb) 2742 return -ENOMEM; 2743 2744 cmd = (struct wmi_pdev_set_bios_interface_cmd *)skb->data; 2745 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_BIOS_INTERFACE_CMD, 2746 sizeof(*cmd)); 2747 cmd->pdev_id = cpu_to_le32(WMI_PDEV_ID_SOC); 2748 cmd->param_type_id = cpu_to_le32(param_id); 2749 cmd->length = cpu_to_le32(buf_len); 2750 2751 ptr = skb->data + sizeof(*cmd); 2752 tlv = (struct wmi_tlv *)ptr; 2753 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, len_aligned); 2754 ptr += TLV_HDR_SIZE; 2755 memcpy(ptr, buf, buf_len); 2756 2757 ret = ath12k_wmi_cmd_send(&wmi_ab->wmi[0], 2758 skb, 2759 WMI_PDEV_SET_BIOS_INTERFACE_CMDID); 2760 if (ret) { 2761 ath12k_warn(ab, 2762 "failed to send WMI_PDEV_SET_BIOS_INTERFACE_CMDID parameter id %d: %d\n", 2763 param_id, ret); 2764 dev_kfree_skb(skb); 2765 } 2766 2767 return 0; 2768 } 2769 2770 int ath12k_wmi_set_bios_sar_cmd(struct ath12k_base *ab, const u8 *psar_table) 2771 { 2772 struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab; 2773 struct wmi_pdev_set_bios_sar_table_cmd *cmd; 2774 struct wmi_tlv *tlv; 2775 struct sk_buff *skb; 2776 int ret; 2777 u8 *buf_ptr; 2778 u32 len, sar_table_len_aligned, sar_dbs_backoff_len_aligned; 2779 const u8 *psar_value = psar_table + ATH12K_ACPI_POWER_LIMIT_DATA_OFFSET; 2780 const u8 *pdbs_value = psar_table + ATH12K_ACPI_DBS_BACKOFF_DATA_OFFSET; 2781 2782 sar_table_len_aligned = roundup(ATH12K_ACPI_BIOS_SAR_TABLE_LEN, sizeof(u32)); 2783 sar_dbs_backoff_len_aligned = roundup(ATH12K_ACPI_BIOS_SAR_DBS_BACKOFF_LEN, 2784 sizeof(u32)); 2785 len = sizeof(*cmd) + TLV_HDR_SIZE + sar_table_len_aligned + 2786 TLV_HDR_SIZE + sar_dbs_backoff_len_aligned; 2787 2788 skb = ath12k_wmi_alloc_skb(wmi_ab, len); 2789 if (!skb) 2790 return -ENOMEM; 2791 2792 cmd = (struct wmi_pdev_set_bios_sar_table_cmd *)skb->data; 2793 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_BIOS_SAR_TABLE_CMD, 2794 sizeof(*cmd)); 2795 cmd->pdev_id = cpu_to_le32(WMI_PDEV_ID_SOC); 2796 cmd->sar_len = cpu_to_le32(ATH12K_ACPI_BIOS_SAR_TABLE_LEN); 2797 cmd->dbs_backoff_len = cpu_to_le32(ATH12K_ACPI_BIOS_SAR_DBS_BACKOFF_LEN); 2798 2799 buf_ptr = skb->data + sizeof(*cmd); 2800 tlv = (struct wmi_tlv *)buf_ptr; 2801 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, 2802 sar_table_len_aligned); 2803 buf_ptr += TLV_HDR_SIZE; 2804 memcpy(buf_ptr, psar_value, ATH12K_ACPI_BIOS_SAR_TABLE_LEN); 2805 2806 buf_ptr += sar_table_len_aligned; 2807 tlv = (struct wmi_tlv *)buf_ptr; 2808 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, 2809 sar_dbs_backoff_len_aligned); 2810 buf_ptr += TLV_HDR_SIZE; 2811 memcpy(buf_ptr, pdbs_value, ATH12K_ACPI_BIOS_SAR_DBS_BACKOFF_LEN); 2812 2813 ret = ath12k_wmi_cmd_send(&wmi_ab->wmi[0], 2814 skb, 2815 WMI_PDEV_SET_BIOS_SAR_TABLE_CMDID); 2816 if (ret) { 2817 ath12k_warn(ab, 2818 "failed to send WMI_PDEV_SET_BIOS_INTERFACE_CMDID %d\n", 2819 ret); 2820 dev_kfree_skb(skb); 2821 } 2822 2823 return ret; 2824 } 2825 2826 int ath12k_wmi_set_bios_geo_cmd(struct ath12k_base *ab, const u8 *pgeo_table) 2827 { 2828 struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab; 2829 struct wmi_pdev_set_bios_geo_table_cmd *cmd; 2830 struct wmi_tlv *tlv; 2831 struct sk_buff *skb; 2832 int ret; 2833 u8 *buf_ptr; 2834 u32 len, sar_geo_len_aligned; 2835 const u8 *pgeo_value = pgeo_table + ATH12K_ACPI_GEO_OFFSET_DATA_OFFSET; 2836 2837 sar_geo_len_aligned = roundup(ATH12K_ACPI_BIOS_SAR_GEO_OFFSET_LEN, sizeof(u32)); 2838 len = sizeof(*cmd) + TLV_HDR_SIZE + sar_geo_len_aligned; 2839 2840 skb = ath12k_wmi_alloc_skb(wmi_ab, len); 2841 if (!skb) 2842 return -ENOMEM; 2843 2844 cmd = (struct wmi_pdev_set_bios_geo_table_cmd *)skb->data; 2845 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_BIOS_GEO_TABLE_CMD, 2846 sizeof(*cmd)); 2847 cmd->pdev_id = cpu_to_le32(WMI_PDEV_ID_SOC); 2848 cmd->geo_len = cpu_to_le32(ATH12K_ACPI_BIOS_SAR_GEO_OFFSET_LEN); 2849 2850 buf_ptr = skb->data + sizeof(*cmd); 2851 tlv = (struct wmi_tlv *)buf_ptr; 2852 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, sar_geo_len_aligned); 2853 buf_ptr += TLV_HDR_SIZE; 2854 memcpy(buf_ptr, pgeo_value, ATH12K_ACPI_BIOS_SAR_GEO_OFFSET_LEN); 2855 2856 ret = ath12k_wmi_cmd_send(&wmi_ab->wmi[0], 2857 skb, 2858 WMI_PDEV_SET_BIOS_GEO_TABLE_CMDID); 2859 if (ret) { 2860 ath12k_warn(ab, 2861 "failed to send WMI_PDEV_SET_BIOS_GEO_TABLE_CMDID %d\n", 2862 ret); 2863 dev_kfree_skb(skb); 2864 } 2865 2866 return ret; 2867 } 2868 2869 int ath12k_wmi_delba_send(struct ath12k *ar, u32 vdev_id, const u8 *mac, 2870 u32 tid, u32 initiator, u32 reason) 2871 { 2872 struct ath12k_wmi_pdev *wmi = ar->wmi; 2873 struct wmi_delba_send_cmd *cmd; 2874 struct sk_buff *skb; 2875 int ret; 2876 2877 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 2878 if (!skb) 2879 return -ENOMEM; 2880 2881 cmd = (struct wmi_delba_send_cmd *)skb->data; 2882 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_DELBA_SEND_CMD, 2883 sizeof(*cmd)); 2884 cmd->vdev_id = cpu_to_le32(vdev_id); 2885 ether_addr_copy(cmd->peer_macaddr.addr, mac); 2886 cmd->tid = cpu_to_le32(tid); 2887 cmd->initiator = cpu_to_le32(initiator); 2888 cmd->reasoncode = cpu_to_le32(reason); 2889 2890 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2891 "wmi delba send vdev_id 0x%X mac_addr %pM tid %u initiator %u reason %u\n", 2892 vdev_id, mac, tid, initiator, reason); 2893 2894 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_DELBA_SEND_CMDID); 2895 2896 if (ret) { 2897 ath12k_warn(ar->ab, 2898 "failed to send WMI_DELBA_SEND_CMDID cmd\n"); 2899 dev_kfree_skb(skb); 2900 } 2901 2902 return ret; 2903 } 2904 2905 int ath12k_wmi_addba_set_resp(struct ath12k *ar, u32 vdev_id, const u8 *mac, 2906 u32 tid, u32 status) 2907 { 2908 struct ath12k_wmi_pdev *wmi = ar->wmi; 2909 struct wmi_addba_setresponse_cmd *cmd; 2910 struct sk_buff *skb; 2911 int ret; 2912 2913 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 2914 if (!skb) 2915 return -ENOMEM; 2916 2917 cmd = (struct wmi_addba_setresponse_cmd *)skb->data; 2918 cmd->tlv_header = 2919 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ADDBA_SETRESPONSE_CMD, 2920 sizeof(*cmd)); 2921 cmd->vdev_id = cpu_to_le32(vdev_id); 2922 ether_addr_copy(cmd->peer_macaddr.addr, mac); 2923 cmd->tid = cpu_to_le32(tid); 2924 cmd->statuscode = cpu_to_le32(status); 2925 2926 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2927 "wmi addba set resp vdev_id 0x%X mac_addr %pM tid %u status %u\n", 2928 vdev_id, mac, tid, status); 2929 2930 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_ADDBA_SET_RESP_CMDID); 2931 2932 if (ret) { 2933 ath12k_warn(ar->ab, 2934 "failed to send WMI_ADDBA_SET_RESP_CMDID cmd\n"); 2935 dev_kfree_skb(skb); 2936 } 2937 2938 return ret; 2939 } 2940 2941 int ath12k_wmi_addba_send(struct ath12k *ar, u32 vdev_id, const u8 *mac, 2942 u32 tid, u32 buf_size) 2943 { 2944 struct ath12k_wmi_pdev *wmi = ar->wmi; 2945 struct wmi_addba_send_cmd *cmd; 2946 struct sk_buff *skb; 2947 int ret; 2948 2949 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 2950 if (!skb) 2951 return -ENOMEM; 2952 2953 cmd = (struct wmi_addba_send_cmd *)skb->data; 2954 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ADDBA_SEND_CMD, 2955 sizeof(*cmd)); 2956 cmd->vdev_id = cpu_to_le32(vdev_id); 2957 ether_addr_copy(cmd->peer_macaddr.addr, mac); 2958 cmd->tid = cpu_to_le32(tid); 2959 cmd->buffersize = cpu_to_le32(buf_size); 2960 2961 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2962 "wmi addba send vdev_id 0x%X mac_addr %pM tid %u bufsize %u\n", 2963 vdev_id, mac, tid, buf_size); 2964 2965 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_ADDBA_SEND_CMDID); 2966 2967 if (ret) { 2968 ath12k_warn(ar->ab, 2969 "failed to send WMI_ADDBA_SEND_CMDID cmd\n"); 2970 dev_kfree_skb(skb); 2971 } 2972 2973 return ret; 2974 } 2975 2976 int ath12k_wmi_addba_clear_resp(struct ath12k *ar, u32 vdev_id, const u8 *mac) 2977 { 2978 struct ath12k_wmi_pdev *wmi = ar->wmi; 2979 struct wmi_addba_clear_resp_cmd *cmd; 2980 struct sk_buff *skb; 2981 int ret; 2982 2983 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 2984 if (!skb) 2985 return -ENOMEM; 2986 2987 cmd = (struct wmi_addba_clear_resp_cmd *)skb->data; 2988 cmd->tlv_header = 2989 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ADDBA_CLEAR_RESP_CMD, 2990 sizeof(*cmd)); 2991 cmd->vdev_id = cpu_to_le32(vdev_id); 2992 ether_addr_copy(cmd->peer_macaddr.addr, mac); 2993 2994 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2995 "wmi addba clear resp vdev_id 0x%X mac_addr %pM\n", 2996 vdev_id, mac); 2997 2998 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_ADDBA_CLEAR_RESP_CMDID); 2999 3000 if (ret) { 3001 ath12k_warn(ar->ab, 3002 "failed to send WMI_ADDBA_CLEAR_RESP_CMDID cmd\n"); 3003 dev_kfree_skb(skb); 3004 } 3005 3006 return ret; 3007 } 3008 3009 int ath12k_wmi_send_init_country_cmd(struct ath12k *ar, 3010 struct ath12k_wmi_init_country_arg *arg) 3011 { 3012 struct ath12k_wmi_pdev *wmi = ar->wmi; 3013 struct wmi_init_country_cmd *cmd; 3014 struct sk_buff *skb; 3015 int ret; 3016 3017 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 3018 if (!skb) 3019 return -ENOMEM; 3020 3021 cmd = (struct wmi_init_country_cmd *)skb->data; 3022 cmd->tlv_header = 3023 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_SET_INIT_COUNTRY_CMD, 3024 sizeof(*cmd)); 3025 3026 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id); 3027 3028 switch (arg->flags) { 3029 case ALPHA_IS_SET: 3030 cmd->init_cc_type = WMI_COUNTRY_INFO_TYPE_ALPHA; 3031 memcpy(&cmd->cc_info.alpha2, arg->cc_info.alpha2, 3); 3032 break; 3033 case CC_IS_SET: 3034 cmd->init_cc_type = cpu_to_le32(WMI_COUNTRY_INFO_TYPE_COUNTRY_CODE); 3035 cmd->cc_info.country_code = 3036 cpu_to_le32(arg->cc_info.country_code); 3037 break; 3038 case REGDMN_IS_SET: 3039 cmd->init_cc_type = cpu_to_le32(WMI_COUNTRY_INFO_TYPE_REGDOMAIN); 3040 cmd->cc_info.regdom_id = cpu_to_le32(arg->cc_info.regdom_id); 3041 break; 3042 default: 3043 ret = -EINVAL; 3044 goto out; 3045 } 3046 3047 ret = ath12k_wmi_cmd_send(wmi, skb, 3048 WMI_SET_INIT_COUNTRY_CMDID); 3049 3050 out: 3051 if (ret) { 3052 ath12k_warn(ar->ab, 3053 "failed to send WMI_SET_INIT_COUNTRY CMD :%d\n", 3054 ret); 3055 dev_kfree_skb(skb); 3056 } 3057 3058 return ret; 3059 } 3060 3061 int 3062 ath12k_wmi_send_twt_enable_cmd(struct ath12k *ar, u32 pdev_id) 3063 { 3064 struct ath12k_wmi_pdev *wmi = ar->wmi; 3065 struct ath12k_base *ab = wmi->wmi_ab->ab; 3066 struct wmi_twt_enable_params_cmd *cmd; 3067 struct sk_buff *skb; 3068 int ret, len; 3069 3070 len = sizeof(*cmd); 3071 3072 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 3073 if (!skb) 3074 return -ENOMEM; 3075 3076 cmd = (struct wmi_twt_enable_params_cmd *)skb->data; 3077 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_TWT_ENABLE_CMD, 3078 len); 3079 cmd->pdev_id = cpu_to_le32(pdev_id); 3080 cmd->sta_cong_timer_ms = cpu_to_le32(ATH12K_TWT_DEF_STA_CONG_TIMER_MS); 3081 cmd->default_slot_size = cpu_to_le32(ATH12K_TWT_DEF_DEFAULT_SLOT_SIZE); 3082 cmd->congestion_thresh_setup = 3083 cpu_to_le32(ATH12K_TWT_DEF_CONGESTION_THRESH_SETUP); 3084 cmd->congestion_thresh_teardown = 3085 cpu_to_le32(ATH12K_TWT_DEF_CONGESTION_THRESH_TEARDOWN); 3086 cmd->congestion_thresh_critical = 3087 cpu_to_le32(ATH12K_TWT_DEF_CONGESTION_THRESH_CRITICAL); 3088 cmd->interference_thresh_teardown = 3089 cpu_to_le32(ATH12K_TWT_DEF_INTERFERENCE_THRESH_TEARDOWN); 3090 cmd->interference_thresh_setup = 3091 cpu_to_le32(ATH12K_TWT_DEF_INTERFERENCE_THRESH_SETUP); 3092 cmd->min_no_sta_setup = cpu_to_le32(ATH12K_TWT_DEF_MIN_NO_STA_SETUP); 3093 cmd->min_no_sta_teardown = cpu_to_le32(ATH12K_TWT_DEF_MIN_NO_STA_TEARDOWN); 3094 cmd->no_of_bcast_mcast_slots = 3095 cpu_to_le32(ATH12K_TWT_DEF_NO_OF_BCAST_MCAST_SLOTS); 3096 cmd->min_no_twt_slots = cpu_to_le32(ATH12K_TWT_DEF_MIN_NO_TWT_SLOTS); 3097 cmd->max_no_sta_twt = cpu_to_le32(ATH12K_TWT_DEF_MAX_NO_STA_TWT); 3098 cmd->mode_check_interval = cpu_to_le32(ATH12K_TWT_DEF_MODE_CHECK_INTERVAL); 3099 cmd->add_sta_slot_interval = cpu_to_le32(ATH12K_TWT_DEF_ADD_STA_SLOT_INTERVAL); 3100 cmd->remove_sta_slot_interval = 3101 cpu_to_le32(ATH12K_TWT_DEF_REMOVE_STA_SLOT_INTERVAL); 3102 /* TODO add MBSSID support */ 3103 cmd->mbss_support = 0; 3104 3105 ret = ath12k_wmi_cmd_send(wmi, skb, 3106 WMI_TWT_ENABLE_CMDID); 3107 if (ret) { 3108 ath12k_warn(ab, "Failed to send WMI_TWT_ENABLE_CMDID"); 3109 dev_kfree_skb(skb); 3110 } 3111 return ret; 3112 } 3113 3114 int 3115 ath12k_wmi_send_twt_disable_cmd(struct ath12k *ar, u32 pdev_id) 3116 { 3117 struct ath12k_wmi_pdev *wmi = ar->wmi; 3118 struct ath12k_base *ab = wmi->wmi_ab->ab; 3119 struct wmi_twt_disable_params_cmd *cmd; 3120 struct sk_buff *skb; 3121 int ret, len; 3122 3123 len = sizeof(*cmd); 3124 3125 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 3126 if (!skb) 3127 return -ENOMEM; 3128 3129 cmd = (struct wmi_twt_disable_params_cmd *)skb->data; 3130 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_TWT_DISABLE_CMD, 3131 len); 3132 cmd->pdev_id = cpu_to_le32(pdev_id); 3133 3134 ret = ath12k_wmi_cmd_send(wmi, skb, 3135 WMI_TWT_DISABLE_CMDID); 3136 if (ret) { 3137 ath12k_warn(ab, "Failed to send WMI_TWT_DISABLE_CMDID"); 3138 dev_kfree_skb(skb); 3139 } 3140 return ret; 3141 } 3142 3143 int 3144 ath12k_wmi_send_obss_spr_cmd(struct ath12k *ar, u32 vdev_id, 3145 struct ieee80211_he_obss_pd *he_obss_pd) 3146 { 3147 struct ath12k_wmi_pdev *wmi = ar->wmi; 3148 struct ath12k_base *ab = wmi->wmi_ab->ab; 3149 struct wmi_obss_spatial_reuse_params_cmd *cmd; 3150 struct sk_buff *skb; 3151 int ret, len; 3152 3153 len = sizeof(*cmd); 3154 3155 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 3156 if (!skb) 3157 return -ENOMEM; 3158 3159 cmd = (struct wmi_obss_spatial_reuse_params_cmd *)skb->data; 3160 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_OBSS_SPATIAL_REUSE_SET_CMD, 3161 len); 3162 cmd->vdev_id = cpu_to_le32(vdev_id); 3163 cmd->enable = cpu_to_le32(he_obss_pd->enable); 3164 cmd->obss_min = a_cpu_to_sle32(he_obss_pd->min_offset); 3165 cmd->obss_max = a_cpu_to_sle32(he_obss_pd->max_offset); 3166 3167 ret = ath12k_wmi_cmd_send(wmi, skb, 3168 WMI_PDEV_OBSS_PD_SPATIAL_REUSE_CMDID); 3169 if (ret) { 3170 ath12k_warn(ab, 3171 "Failed to send WMI_PDEV_OBSS_PD_SPATIAL_REUSE_CMDID"); 3172 dev_kfree_skb(skb); 3173 } 3174 return ret; 3175 } 3176 3177 int ath12k_wmi_obss_color_cfg_cmd(struct ath12k *ar, u32 vdev_id, 3178 u8 bss_color, u32 period, 3179 bool enable) 3180 { 3181 struct ath12k_wmi_pdev *wmi = ar->wmi; 3182 struct ath12k_base *ab = wmi->wmi_ab->ab; 3183 struct wmi_obss_color_collision_cfg_params_cmd *cmd; 3184 struct sk_buff *skb; 3185 int ret, len; 3186 3187 len = sizeof(*cmd); 3188 3189 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 3190 if (!skb) 3191 return -ENOMEM; 3192 3193 cmd = (struct wmi_obss_color_collision_cfg_params_cmd *)skb->data; 3194 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_OBSS_COLOR_COLLISION_DET_CONFIG, 3195 len); 3196 cmd->vdev_id = cpu_to_le32(vdev_id); 3197 cmd->evt_type = enable ? cpu_to_le32(ATH12K_OBSS_COLOR_COLLISION_DETECTION) : 3198 cpu_to_le32(ATH12K_OBSS_COLOR_COLLISION_DETECTION_DISABLE); 3199 cmd->current_bss_color = cpu_to_le32(bss_color); 3200 cmd->detection_period_ms = cpu_to_le32(period); 3201 cmd->scan_period_ms = cpu_to_le32(ATH12K_BSS_COLOR_COLLISION_SCAN_PERIOD_MS); 3202 cmd->free_slot_expiry_time_ms = 0; 3203 cmd->flags = 0; 3204 3205 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3206 "wmi_send_obss_color_collision_cfg id %d type %d bss_color %d detect_period %d scan_period %d\n", 3207 cmd->vdev_id, cmd->evt_type, cmd->current_bss_color, 3208 cmd->detection_period_ms, cmd->scan_period_ms); 3209 3210 ret = ath12k_wmi_cmd_send(wmi, skb, 3211 WMI_OBSS_COLOR_COLLISION_DET_CONFIG_CMDID); 3212 if (ret) { 3213 ath12k_warn(ab, "Failed to send WMI_OBSS_COLOR_COLLISION_DET_CONFIG_CMDID"); 3214 dev_kfree_skb(skb); 3215 } 3216 return ret; 3217 } 3218 3219 int ath12k_wmi_send_bss_color_change_enable_cmd(struct ath12k *ar, u32 vdev_id, 3220 bool enable) 3221 { 3222 struct ath12k_wmi_pdev *wmi = ar->wmi; 3223 struct ath12k_base *ab = wmi->wmi_ab->ab; 3224 struct wmi_bss_color_change_enable_params_cmd *cmd; 3225 struct sk_buff *skb; 3226 int ret, len; 3227 3228 len = sizeof(*cmd); 3229 3230 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 3231 if (!skb) 3232 return -ENOMEM; 3233 3234 cmd = (struct wmi_bss_color_change_enable_params_cmd *)skb->data; 3235 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BSS_COLOR_CHANGE_ENABLE, 3236 len); 3237 cmd->vdev_id = cpu_to_le32(vdev_id); 3238 cmd->enable = enable ? cpu_to_le32(1) : 0; 3239 3240 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3241 "wmi_send_bss_color_change_enable id %d enable %d\n", 3242 cmd->vdev_id, cmd->enable); 3243 3244 ret = ath12k_wmi_cmd_send(wmi, skb, 3245 WMI_BSS_COLOR_CHANGE_ENABLE_CMDID); 3246 if (ret) { 3247 ath12k_warn(ab, "Failed to send WMI_BSS_COLOR_CHANGE_ENABLE_CMDID"); 3248 dev_kfree_skb(skb); 3249 } 3250 return ret; 3251 } 3252 3253 int ath12k_wmi_fils_discovery_tmpl(struct ath12k *ar, u32 vdev_id, 3254 struct sk_buff *tmpl) 3255 { 3256 struct wmi_tlv *tlv; 3257 struct sk_buff *skb; 3258 void *ptr; 3259 int ret, len; 3260 size_t aligned_len; 3261 struct wmi_fils_discovery_tmpl_cmd *cmd; 3262 3263 aligned_len = roundup(tmpl->len, 4); 3264 len = sizeof(*cmd) + TLV_HDR_SIZE + aligned_len; 3265 3266 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3267 "WMI vdev %i set FILS discovery template\n", vdev_id); 3268 3269 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 3270 if (!skb) 3271 return -ENOMEM; 3272 3273 cmd = (struct wmi_fils_discovery_tmpl_cmd *)skb->data; 3274 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_FILS_DISCOVERY_TMPL_CMD, 3275 sizeof(*cmd)); 3276 cmd->vdev_id = cpu_to_le32(vdev_id); 3277 cmd->buf_len = cpu_to_le32(tmpl->len); 3278 ptr = skb->data + sizeof(*cmd); 3279 3280 tlv = ptr; 3281 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, aligned_len); 3282 memcpy(tlv->value, tmpl->data, tmpl->len); 3283 3284 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_FILS_DISCOVERY_TMPL_CMDID); 3285 if (ret) { 3286 ath12k_warn(ar->ab, 3287 "WMI vdev %i failed to send FILS discovery template command\n", 3288 vdev_id); 3289 dev_kfree_skb(skb); 3290 } 3291 return ret; 3292 } 3293 3294 int ath12k_wmi_probe_resp_tmpl(struct ath12k *ar, u32 vdev_id, 3295 struct sk_buff *tmpl) 3296 { 3297 struct wmi_probe_tmpl_cmd *cmd; 3298 struct ath12k_wmi_bcn_prb_info_params *probe_info; 3299 struct wmi_tlv *tlv; 3300 struct sk_buff *skb; 3301 void *ptr; 3302 int ret, len; 3303 size_t aligned_len = roundup(tmpl->len, 4); 3304 3305 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3306 "WMI vdev %i set probe response template\n", vdev_id); 3307 3308 len = sizeof(*cmd) + sizeof(*probe_info) + TLV_HDR_SIZE + aligned_len; 3309 3310 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 3311 if (!skb) 3312 return -ENOMEM; 3313 3314 cmd = (struct wmi_probe_tmpl_cmd *)skb->data; 3315 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PRB_TMPL_CMD, 3316 sizeof(*cmd)); 3317 cmd->vdev_id = cpu_to_le32(vdev_id); 3318 cmd->buf_len = cpu_to_le32(tmpl->len); 3319 3320 ptr = skb->data + sizeof(*cmd); 3321 3322 probe_info = ptr; 3323 len = sizeof(*probe_info); 3324 probe_info->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_PRB_INFO, 3325 len); 3326 probe_info->caps = 0; 3327 probe_info->erp = 0; 3328 3329 ptr += sizeof(*probe_info); 3330 3331 tlv = ptr; 3332 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, aligned_len); 3333 memcpy(tlv->value, tmpl->data, tmpl->len); 3334 3335 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_PRB_TMPL_CMDID); 3336 if (ret) { 3337 ath12k_warn(ar->ab, 3338 "WMI vdev %i failed to send probe response template command\n", 3339 vdev_id); 3340 dev_kfree_skb(skb); 3341 } 3342 return ret; 3343 } 3344 3345 int ath12k_wmi_fils_discovery(struct ath12k *ar, u32 vdev_id, u32 interval, 3346 bool unsol_bcast_probe_resp_enabled) 3347 { 3348 struct sk_buff *skb; 3349 int ret, len; 3350 struct wmi_fils_discovery_cmd *cmd; 3351 3352 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3353 "WMI vdev %i set %s interval to %u TU\n", 3354 vdev_id, unsol_bcast_probe_resp_enabled ? 3355 "unsolicited broadcast probe response" : "FILS discovery", 3356 interval); 3357 3358 len = sizeof(*cmd); 3359 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 3360 if (!skb) 3361 return -ENOMEM; 3362 3363 cmd = (struct wmi_fils_discovery_cmd *)skb->data; 3364 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ENABLE_FILS_CMD, 3365 len); 3366 cmd->vdev_id = cpu_to_le32(vdev_id); 3367 cmd->interval = cpu_to_le32(interval); 3368 cmd->config = cpu_to_le32(unsol_bcast_probe_resp_enabled); 3369 3370 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_ENABLE_FILS_CMDID); 3371 if (ret) { 3372 ath12k_warn(ar->ab, 3373 "WMI vdev %i failed to send FILS discovery enable/disable command\n", 3374 vdev_id); 3375 dev_kfree_skb(skb); 3376 } 3377 return ret; 3378 } 3379 3380 static void 3381 ath12k_fill_band_to_mac_param(struct ath12k_base *soc, 3382 struct ath12k_wmi_pdev_band_arg *arg) 3383 { 3384 u8 i; 3385 struct ath12k_wmi_hal_reg_capabilities_ext_arg *hal_reg_cap; 3386 struct ath12k_pdev *pdev; 3387 3388 for (i = 0; i < soc->num_radios; i++) { 3389 pdev = &soc->pdevs[i]; 3390 hal_reg_cap = &soc->hal_reg_cap[i]; 3391 arg[i].pdev_id = pdev->pdev_id; 3392 3393 switch (pdev->cap.supported_bands) { 3394 case WMI_HOST_WLAN_2G_5G_CAP: 3395 arg[i].start_freq = hal_reg_cap->low_2ghz_chan; 3396 arg[i].end_freq = hal_reg_cap->high_5ghz_chan; 3397 break; 3398 case WMI_HOST_WLAN_2G_CAP: 3399 arg[i].start_freq = hal_reg_cap->low_2ghz_chan; 3400 arg[i].end_freq = hal_reg_cap->high_2ghz_chan; 3401 break; 3402 case WMI_HOST_WLAN_5G_CAP: 3403 arg[i].start_freq = hal_reg_cap->low_5ghz_chan; 3404 arg[i].end_freq = hal_reg_cap->high_5ghz_chan; 3405 break; 3406 default: 3407 break; 3408 } 3409 } 3410 } 3411 3412 static void 3413 ath12k_wmi_copy_resource_config(struct ath12k_wmi_resource_config_params *wmi_cfg, 3414 struct ath12k_wmi_resource_config_arg *tg_cfg) 3415 { 3416 wmi_cfg->num_vdevs = cpu_to_le32(tg_cfg->num_vdevs); 3417 wmi_cfg->num_peers = cpu_to_le32(tg_cfg->num_peers); 3418 wmi_cfg->num_offload_peers = cpu_to_le32(tg_cfg->num_offload_peers); 3419 wmi_cfg->num_offload_reorder_buffs = 3420 cpu_to_le32(tg_cfg->num_offload_reorder_buffs); 3421 wmi_cfg->num_peer_keys = cpu_to_le32(tg_cfg->num_peer_keys); 3422 wmi_cfg->num_tids = cpu_to_le32(tg_cfg->num_tids); 3423 wmi_cfg->ast_skid_limit = cpu_to_le32(tg_cfg->ast_skid_limit); 3424 wmi_cfg->tx_chain_mask = cpu_to_le32(tg_cfg->tx_chain_mask); 3425 wmi_cfg->rx_chain_mask = cpu_to_le32(tg_cfg->rx_chain_mask); 3426 wmi_cfg->rx_timeout_pri[0] = cpu_to_le32(tg_cfg->rx_timeout_pri[0]); 3427 wmi_cfg->rx_timeout_pri[1] = cpu_to_le32(tg_cfg->rx_timeout_pri[1]); 3428 wmi_cfg->rx_timeout_pri[2] = cpu_to_le32(tg_cfg->rx_timeout_pri[2]); 3429 wmi_cfg->rx_timeout_pri[3] = cpu_to_le32(tg_cfg->rx_timeout_pri[3]); 3430 wmi_cfg->rx_decap_mode = cpu_to_le32(tg_cfg->rx_decap_mode); 3431 wmi_cfg->scan_max_pending_req = cpu_to_le32(tg_cfg->scan_max_pending_req); 3432 wmi_cfg->bmiss_offload_max_vdev = cpu_to_le32(tg_cfg->bmiss_offload_max_vdev); 3433 wmi_cfg->roam_offload_max_vdev = cpu_to_le32(tg_cfg->roam_offload_max_vdev); 3434 wmi_cfg->roam_offload_max_ap_profiles = 3435 cpu_to_le32(tg_cfg->roam_offload_max_ap_profiles); 3436 wmi_cfg->num_mcast_groups = cpu_to_le32(tg_cfg->num_mcast_groups); 3437 wmi_cfg->num_mcast_table_elems = cpu_to_le32(tg_cfg->num_mcast_table_elems); 3438 wmi_cfg->mcast2ucast_mode = cpu_to_le32(tg_cfg->mcast2ucast_mode); 3439 wmi_cfg->tx_dbg_log_size = cpu_to_le32(tg_cfg->tx_dbg_log_size); 3440 wmi_cfg->num_wds_entries = cpu_to_le32(tg_cfg->num_wds_entries); 3441 wmi_cfg->dma_burst_size = cpu_to_le32(tg_cfg->dma_burst_size); 3442 wmi_cfg->mac_aggr_delim = cpu_to_le32(tg_cfg->mac_aggr_delim); 3443 wmi_cfg->rx_skip_defrag_timeout_dup_detection_check = 3444 cpu_to_le32(tg_cfg->rx_skip_defrag_timeout_dup_detection_check); 3445 wmi_cfg->vow_config = cpu_to_le32(tg_cfg->vow_config); 3446 wmi_cfg->gtk_offload_max_vdev = cpu_to_le32(tg_cfg->gtk_offload_max_vdev); 3447 wmi_cfg->num_msdu_desc = cpu_to_le32(tg_cfg->num_msdu_desc); 3448 wmi_cfg->max_frag_entries = cpu_to_le32(tg_cfg->max_frag_entries); 3449 wmi_cfg->num_tdls_vdevs = cpu_to_le32(tg_cfg->num_tdls_vdevs); 3450 wmi_cfg->num_tdls_conn_table_entries = 3451 cpu_to_le32(tg_cfg->num_tdls_conn_table_entries); 3452 wmi_cfg->beacon_tx_offload_max_vdev = 3453 cpu_to_le32(tg_cfg->beacon_tx_offload_max_vdev); 3454 wmi_cfg->num_multicast_filter_entries = 3455 cpu_to_le32(tg_cfg->num_multicast_filter_entries); 3456 wmi_cfg->num_wow_filters = cpu_to_le32(tg_cfg->num_wow_filters); 3457 wmi_cfg->num_keep_alive_pattern = cpu_to_le32(tg_cfg->num_keep_alive_pattern); 3458 wmi_cfg->keep_alive_pattern_size = cpu_to_le32(tg_cfg->keep_alive_pattern_size); 3459 wmi_cfg->max_tdls_concurrent_sleep_sta = 3460 cpu_to_le32(tg_cfg->max_tdls_concurrent_sleep_sta); 3461 wmi_cfg->max_tdls_concurrent_buffer_sta = 3462 cpu_to_le32(tg_cfg->max_tdls_concurrent_buffer_sta); 3463 wmi_cfg->wmi_send_separate = cpu_to_le32(tg_cfg->wmi_send_separate); 3464 wmi_cfg->num_ocb_vdevs = cpu_to_le32(tg_cfg->num_ocb_vdevs); 3465 wmi_cfg->num_ocb_channels = cpu_to_le32(tg_cfg->num_ocb_channels); 3466 wmi_cfg->num_ocb_schedules = cpu_to_le32(tg_cfg->num_ocb_schedules); 3467 wmi_cfg->bpf_instruction_size = cpu_to_le32(tg_cfg->bpf_instruction_size); 3468 wmi_cfg->max_bssid_rx_filters = cpu_to_le32(tg_cfg->max_bssid_rx_filters); 3469 wmi_cfg->use_pdev_id = cpu_to_le32(tg_cfg->use_pdev_id); 3470 wmi_cfg->flag1 = cpu_to_le32(tg_cfg->atf_config | 3471 WMI_RSRC_CFG_FLAG1_BSS_CHANNEL_INFO_64); 3472 wmi_cfg->peer_map_unmap_version = cpu_to_le32(tg_cfg->peer_map_unmap_version); 3473 wmi_cfg->sched_params = cpu_to_le32(tg_cfg->sched_params); 3474 wmi_cfg->twt_ap_pdev_count = cpu_to_le32(tg_cfg->twt_ap_pdev_count); 3475 wmi_cfg->twt_ap_sta_count = cpu_to_le32(tg_cfg->twt_ap_sta_count); 3476 wmi_cfg->flags2 = le32_encode_bits(tg_cfg->dp_peer_meta_data_ver, 3477 WMI_RSRC_CFG_FLAGS2_RX_PEER_METADATA_VERSION); 3478 3479 wmi_cfg->host_service_flags = cpu_to_le32(tg_cfg->is_reg_cc_ext_event_supported << 3480 WMI_RSRC_CFG_HOST_SVC_FLAG_REG_CC_EXT_SUPPORT_BIT); 3481 } 3482 3483 static int ath12k_init_cmd_send(struct ath12k_wmi_pdev *wmi, 3484 struct ath12k_wmi_init_cmd_arg *arg) 3485 { 3486 struct ath12k_base *ab = wmi->wmi_ab->ab; 3487 struct sk_buff *skb; 3488 struct wmi_init_cmd *cmd; 3489 struct ath12k_wmi_resource_config_params *cfg; 3490 struct ath12k_wmi_pdev_set_hw_mode_cmd *hw_mode; 3491 struct ath12k_wmi_pdev_band_to_mac_params *band_to_mac; 3492 struct ath12k_wmi_host_mem_chunk_params *host_mem_chunks; 3493 struct wmi_tlv *tlv; 3494 size_t ret, len; 3495 void *ptr; 3496 u32 hw_mode_len = 0; 3497 u16 idx; 3498 3499 if (arg->hw_mode_id != WMI_HOST_HW_MODE_MAX) 3500 hw_mode_len = sizeof(*hw_mode) + TLV_HDR_SIZE + 3501 (arg->num_band_to_mac * sizeof(*band_to_mac)); 3502 3503 len = sizeof(*cmd) + TLV_HDR_SIZE + sizeof(*cfg) + hw_mode_len + 3504 (arg->num_mem_chunks ? (sizeof(*host_mem_chunks) * WMI_MAX_MEM_REQS) : 0); 3505 3506 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 3507 if (!skb) 3508 return -ENOMEM; 3509 3510 cmd = (struct wmi_init_cmd *)skb->data; 3511 3512 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_INIT_CMD, 3513 sizeof(*cmd)); 3514 3515 ptr = skb->data + sizeof(*cmd); 3516 cfg = ptr; 3517 3518 ath12k_wmi_copy_resource_config(cfg, &arg->res_cfg); 3519 3520 cfg->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_RESOURCE_CONFIG, 3521 sizeof(*cfg)); 3522 3523 ptr += sizeof(*cfg); 3524 host_mem_chunks = ptr + TLV_HDR_SIZE; 3525 len = sizeof(struct ath12k_wmi_host_mem_chunk_params); 3526 3527 for (idx = 0; idx < arg->num_mem_chunks; ++idx) { 3528 host_mem_chunks[idx].tlv_header = 3529 ath12k_wmi_tlv_hdr(WMI_TAG_WLAN_HOST_MEMORY_CHUNK, 3530 len); 3531 3532 host_mem_chunks[idx].ptr = cpu_to_le32(arg->mem_chunks[idx].paddr); 3533 host_mem_chunks[idx].size = cpu_to_le32(arg->mem_chunks[idx].len); 3534 host_mem_chunks[idx].req_id = cpu_to_le32(arg->mem_chunks[idx].req_id); 3535 3536 ath12k_dbg(ab, ATH12K_DBG_WMI, 3537 "WMI host mem chunk req_id %d paddr 0x%llx len %d\n", 3538 arg->mem_chunks[idx].req_id, 3539 (u64)arg->mem_chunks[idx].paddr, 3540 arg->mem_chunks[idx].len); 3541 } 3542 cmd->num_host_mem_chunks = cpu_to_le32(arg->num_mem_chunks); 3543 len = sizeof(struct ath12k_wmi_host_mem_chunk_params) * arg->num_mem_chunks; 3544 3545 /* num_mem_chunks is zero */ 3546 tlv = ptr; 3547 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len); 3548 ptr += TLV_HDR_SIZE + len; 3549 3550 if (arg->hw_mode_id != WMI_HOST_HW_MODE_MAX) { 3551 hw_mode = (struct ath12k_wmi_pdev_set_hw_mode_cmd *)ptr; 3552 hw_mode->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_HW_MODE_CMD, 3553 sizeof(*hw_mode)); 3554 3555 hw_mode->hw_mode_index = cpu_to_le32(arg->hw_mode_id); 3556 hw_mode->num_band_to_mac = cpu_to_le32(arg->num_band_to_mac); 3557 3558 ptr += sizeof(*hw_mode); 3559 3560 len = arg->num_band_to_mac * sizeof(*band_to_mac); 3561 tlv = ptr; 3562 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len); 3563 3564 ptr += TLV_HDR_SIZE; 3565 len = sizeof(*band_to_mac); 3566 3567 for (idx = 0; idx < arg->num_band_to_mac; idx++) { 3568 band_to_mac = (void *)ptr; 3569 3570 band_to_mac->tlv_header = 3571 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_BAND_TO_MAC, 3572 len); 3573 band_to_mac->pdev_id = cpu_to_le32(arg->band_to_mac[idx].pdev_id); 3574 band_to_mac->start_freq = 3575 cpu_to_le32(arg->band_to_mac[idx].start_freq); 3576 band_to_mac->end_freq = 3577 cpu_to_le32(arg->band_to_mac[idx].end_freq); 3578 ptr += sizeof(*band_to_mac); 3579 } 3580 } 3581 3582 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_INIT_CMDID); 3583 if (ret) { 3584 ath12k_warn(ab, "failed to send WMI_INIT_CMDID\n"); 3585 dev_kfree_skb(skb); 3586 } 3587 3588 return ret; 3589 } 3590 3591 int ath12k_wmi_pdev_lro_cfg(struct ath12k *ar, 3592 int pdev_id) 3593 { 3594 struct ath12k_wmi_pdev_lro_config_cmd *cmd; 3595 struct sk_buff *skb; 3596 int ret; 3597 3598 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd)); 3599 if (!skb) 3600 return -ENOMEM; 3601 3602 cmd = (struct ath12k_wmi_pdev_lro_config_cmd *)skb->data; 3603 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_LRO_INFO_CMD, 3604 sizeof(*cmd)); 3605 3606 get_random_bytes(cmd->th_4, sizeof(cmd->th_4)); 3607 get_random_bytes(cmd->th_6, sizeof(cmd->th_6)); 3608 3609 cmd->pdev_id = cpu_to_le32(pdev_id); 3610 3611 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3612 "WMI lro cfg cmd pdev_id 0x%x\n", pdev_id); 3613 3614 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_LRO_CONFIG_CMDID); 3615 if (ret) { 3616 ath12k_warn(ar->ab, 3617 "failed to send lro cfg req wmi cmd\n"); 3618 goto err; 3619 } 3620 3621 return 0; 3622 err: 3623 dev_kfree_skb(skb); 3624 return ret; 3625 } 3626 3627 int ath12k_wmi_wait_for_service_ready(struct ath12k_base *ab) 3628 { 3629 unsigned long time_left; 3630 3631 time_left = wait_for_completion_timeout(&ab->wmi_ab.service_ready, 3632 WMI_SERVICE_READY_TIMEOUT_HZ); 3633 if (!time_left) 3634 return -ETIMEDOUT; 3635 3636 return 0; 3637 } 3638 3639 int ath12k_wmi_wait_for_unified_ready(struct ath12k_base *ab) 3640 { 3641 unsigned long time_left; 3642 3643 time_left = wait_for_completion_timeout(&ab->wmi_ab.unified_ready, 3644 WMI_SERVICE_READY_TIMEOUT_HZ); 3645 if (!time_left) 3646 return -ETIMEDOUT; 3647 3648 return 0; 3649 } 3650 3651 int ath12k_wmi_set_hw_mode(struct ath12k_base *ab, 3652 enum wmi_host_hw_mode_config_type mode) 3653 { 3654 struct ath12k_wmi_pdev_set_hw_mode_cmd *cmd; 3655 struct sk_buff *skb; 3656 struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab; 3657 int len; 3658 int ret; 3659 3660 len = sizeof(*cmd); 3661 3662 skb = ath12k_wmi_alloc_skb(wmi_ab, len); 3663 if (!skb) 3664 return -ENOMEM; 3665 3666 cmd = (struct ath12k_wmi_pdev_set_hw_mode_cmd *)skb->data; 3667 3668 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_HW_MODE_CMD, 3669 sizeof(*cmd)); 3670 3671 cmd->pdev_id = WMI_PDEV_ID_SOC; 3672 cmd->hw_mode_index = cpu_to_le32(mode); 3673 3674 ret = ath12k_wmi_cmd_send(&wmi_ab->wmi[0], skb, WMI_PDEV_SET_HW_MODE_CMDID); 3675 if (ret) { 3676 ath12k_warn(ab, "failed to send WMI_PDEV_SET_HW_MODE_CMDID\n"); 3677 dev_kfree_skb(skb); 3678 } 3679 3680 return ret; 3681 } 3682 3683 int ath12k_wmi_cmd_init(struct ath12k_base *ab) 3684 { 3685 struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab; 3686 struct ath12k_wmi_init_cmd_arg arg = {}; 3687 3688 if (test_bit(WMI_TLV_SERVICE_REG_CC_EXT_EVENT_SUPPORT, 3689 ab->wmi_ab.svc_map)) 3690 arg.res_cfg.is_reg_cc_ext_event_supported = true; 3691 3692 ab->hw_params->wmi_init(ab, &arg.res_cfg); 3693 3694 arg.num_mem_chunks = wmi_ab->num_mem_chunks; 3695 arg.hw_mode_id = wmi_ab->preferred_hw_mode; 3696 arg.mem_chunks = wmi_ab->mem_chunks; 3697 3698 if (ab->hw_params->single_pdev_only) 3699 arg.hw_mode_id = WMI_HOST_HW_MODE_MAX; 3700 3701 arg.num_band_to_mac = ab->num_radios; 3702 ath12k_fill_band_to_mac_param(ab, arg.band_to_mac); 3703 3704 return ath12k_init_cmd_send(&wmi_ab->wmi[0], &arg); 3705 } 3706 3707 int ath12k_wmi_vdev_spectral_conf(struct ath12k *ar, 3708 struct ath12k_wmi_vdev_spectral_conf_arg *arg) 3709 { 3710 struct ath12k_wmi_vdev_spectral_conf_cmd *cmd; 3711 struct sk_buff *skb; 3712 int ret; 3713 3714 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd)); 3715 if (!skb) 3716 return -ENOMEM; 3717 3718 cmd = (struct ath12k_wmi_vdev_spectral_conf_cmd *)skb->data; 3719 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SPECTRAL_CONFIGURE_CMD, 3720 sizeof(*cmd)); 3721 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 3722 cmd->scan_count = cpu_to_le32(arg->scan_count); 3723 cmd->scan_period = cpu_to_le32(arg->scan_period); 3724 cmd->scan_priority = cpu_to_le32(arg->scan_priority); 3725 cmd->scan_fft_size = cpu_to_le32(arg->scan_fft_size); 3726 cmd->scan_gc_ena = cpu_to_le32(arg->scan_gc_ena); 3727 cmd->scan_restart_ena = cpu_to_le32(arg->scan_restart_ena); 3728 cmd->scan_noise_floor_ref = cpu_to_le32(arg->scan_noise_floor_ref); 3729 cmd->scan_init_delay = cpu_to_le32(arg->scan_init_delay); 3730 cmd->scan_nb_tone_thr = cpu_to_le32(arg->scan_nb_tone_thr); 3731 cmd->scan_str_bin_thr = cpu_to_le32(arg->scan_str_bin_thr); 3732 cmd->scan_wb_rpt_mode = cpu_to_le32(arg->scan_wb_rpt_mode); 3733 cmd->scan_rssi_rpt_mode = cpu_to_le32(arg->scan_rssi_rpt_mode); 3734 cmd->scan_rssi_thr = cpu_to_le32(arg->scan_rssi_thr); 3735 cmd->scan_pwr_format = cpu_to_le32(arg->scan_pwr_format); 3736 cmd->scan_rpt_mode = cpu_to_le32(arg->scan_rpt_mode); 3737 cmd->scan_bin_scale = cpu_to_le32(arg->scan_bin_scale); 3738 cmd->scan_dbm_adj = cpu_to_le32(arg->scan_dbm_adj); 3739 cmd->scan_chn_mask = cpu_to_le32(arg->scan_chn_mask); 3740 3741 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3742 "WMI spectral scan config cmd vdev_id 0x%x\n", 3743 arg->vdev_id); 3744 3745 ret = ath12k_wmi_cmd_send(ar->wmi, skb, 3746 WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID); 3747 if (ret) { 3748 ath12k_warn(ar->ab, 3749 "failed to send spectral scan config wmi cmd\n"); 3750 goto err; 3751 } 3752 3753 return 0; 3754 err: 3755 dev_kfree_skb(skb); 3756 return ret; 3757 } 3758 3759 int ath12k_wmi_vdev_spectral_enable(struct ath12k *ar, u32 vdev_id, 3760 u32 trigger, u32 enable) 3761 { 3762 struct ath12k_wmi_vdev_spectral_enable_cmd *cmd; 3763 struct sk_buff *skb; 3764 int ret; 3765 3766 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd)); 3767 if (!skb) 3768 return -ENOMEM; 3769 3770 cmd = (struct ath12k_wmi_vdev_spectral_enable_cmd *)skb->data; 3771 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SPECTRAL_ENABLE_CMD, 3772 sizeof(*cmd)); 3773 3774 cmd->vdev_id = cpu_to_le32(vdev_id); 3775 cmd->trigger_cmd = cpu_to_le32(trigger); 3776 cmd->enable_cmd = cpu_to_le32(enable); 3777 3778 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3779 "WMI spectral enable cmd vdev id 0x%x\n", 3780 vdev_id); 3781 3782 ret = ath12k_wmi_cmd_send(ar->wmi, skb, 3783 WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID); 3784 if (ret) { 3785 ath12k_warn(ar->ab, 3786 "failed to send spectral enable wmi cmd\n"); 3787 goto err; 3788 } 3789 3790 return 0; 3791 err: 3792 dev_kfree_skb(skb); 3793 return ret; 3794 } 3795 3796 int ath12k_wmi_pdev_dma_ring_cfg(struct ath12k *ar, 3797 struct ath12k_wmi_pdev_dma_ring_cfg_arg *arg) 3798 { 3799 struct ath12k_wmi_pdev_dma_ring_cfg_req_cmd *cmd; 3800 struct sk_buff *skb; 3801 int ret; 3802 3803 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd)); 3804 if (!skb) 3805 return -ENOMEM; 3806 3807 cmd = (struct ath12k_wmi_pdev_dma_ring_cfg_req_cmd *)skb->data; 3808 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_DMA_RING_CFG_REQ, 3809 sizeof(*cmd)); 3810 3811 cmd->pdev_id = cpu_to_le32(DP_SW2HW_MACID(arg->pdev_id)); 3812 cmd->module_id = cpu_to_le32(arg->module_id); 3813 cmd->base_paddr_lo = cpu_to_le32(arg->base_paddr_lo); 3814 cmd->base_paddr_hi = cpu_to_le32(arg->base_paddr_hi); 3815 cmd->head_idx_paddr_lo = cpu_to_le32(arg->head_idx_paddr_lo); 3816 cmd->head_idx_paddr_hi = cpu_to_le32(arg->head_idx_paddr_hi); 3817 cmd->tail_idx_paddr_lo = cpu_to_le32(arg->tail_idx_paddr_lo); 3818 cmd->tail_idx_paddr_hi = cpu_to_le32(arg->tail_idx_paddr_hi); 3819 cmd->num_elems = cpu_to_le32(arg->num_elems); 3820 cmd->buf_size = cpu_to_le32(arg->buf_size); 3821 cmd->num_resp_per_event = cpu_to_le32(arg->num_resp_per_event); 3822 cmd->event_timeout_ms = cpu_to_le32(arg->event_timeout_ms); 3823 3824 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3825 "WMI DMA ring cfg req cmd pdev_id 0x%x\n", 3826 arg->pdev_id); 3827 3828 ret = ath12k_wmi_cmd_send(ar->wmi, skb, 3829 WMI_PDEV_DMA_RING_CFG_REQ_CMDID); 3830 if (ret) { 3831 ath12k_warn(ar->ab, 3832 "failed to send dma ring cfg req wmi cmd\n"); 3833 goto err; 3834 } 3835 3836 return 0; 3837 err: 3838 dev_kfree_skb(skb); 3839 return ret; 3840 } 3841 3842 static int ath12k_wmi_dma_buf_entry_parse(struct ath12k_base *soc, 3843 u16 tag, u16 len, 3844 const void *ptr, void *data) 3845 { 3846 struct ath12k_wmi_dma_buf_release_arg *arg = data; 3847 3848 if (tag != WMI_TAG_DMA_BUF_RELEASE_ENTRY) 3849 return -EPROTO; 3850 3851 if (arg->num_buf_entry >= le32_to_cpu(arg->fixed.num_buf_release_entry)) 3852 return -ENOBUFS; 3853 3854 arg->num_buf_entry++; 3855 return 0; 3856 } 3857 3858 static int ath12k_wmi_dma_buf_meta_parse(struct ath12k_base *soc, 3859 u16 tag, u16 len, 3860 const void *ptr, void *data) 3861 { 3862 struct ath12k_wmi_dma_buf_release_arg *arg = data; 3863 3864 if (tag != WMI_TAG_DMA_BUF_RELEASE_SPECTRAL_META_DATA) 3865 return -EPROTO; 3866 3867 if (arg->num_meta >= le32_to_cpu(arg->fixed.num_meta_data_entry)) 3868 return -ENOBUFS; 3869 3870 arg->num_meta++; 3871 3872 return 0; 3873 } 3874 3875 static int ath12k_wmi_dma_buf_parse(struct ath12k_base *ab, 3876 u16 tag, u16 len, 3877 const void *ptr, void *data) 3878 { 3879 struct ath12k_wmi_dma_buf_release_arg *arg = data; 3880 const struct ath12k_wmi_dma_buf_release_fixed_params *fixed; 3881 u32 pdev_id; 3882 int ret; 3883 3884 switch (tag) { 3885 case WMI_TAG_DMA_BUF_RELEASE: 3886 fixed = ptr; 3887 arg->fixed = *fixed; 3888 pdev_id = DP_HW2SW_MACID(le32_to_cpu(fixed->pdev_id)); 3889 arg->fixed.pdev_id = cpu_to_le32(pdev_id); 3890 break; 3891 case WMI_TAG_ARRAY_STRUCT: 3892 if (!arg->buf_entry_done) { 3893 arg->num_buf_entry = 0; 3894 arg->buf_entry = ptr; 3895 3896 ret = ath12k_wmi_tlv_iter(ab, ptr, len, 3897 ath12k_wmi_dma_buf_entry_parse, 3898 arg); 3899 if (ret) { 3900 ath12k_warn(ab, "failed to parse dma buf entry tlv %d\n", 3901 ret); 3902 return ret; 3903 } 3904 3905 arg->buf_entry_done = true; 3906 } else if (!arg->meta_data_done) { 3907 arg->num_meta = 0; 3908 arg->meta_data = ptr; 3909 3910 ret = ath12k_wmi_tlv_iter(ab, ptr, len, 3911 ath12k_wmi_dma_buf_meta_parse, 3912 arg); 3913 if (ret) { 3914 ath12k_warn(ab, "failed to parse dma buf meta tlv %d\n", 3915 ret); 3916 return ret; 3917 } 3918 3919 arg->meta_data_done = true; 3920 } 3921 break; 3922 default: 3923 break; 3924 } 3925 return 0; 3926 } 3927 3928 static void ath12k_wmi_pdev_dma_ring_buf_release_event(struct ath12k_base *ab, 3929 struct sk_buff *skb) 3930 { 3931 struct ath12k_wmi_dma_buf_release_arg arg = {}; 3932 struct ath12k_dbring_buf_release_event param; 3933 int ret; 3934 3935 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 3936 ath12k_wmi_dma_buf_parse, 3937 &arg); 3938 if (ret) { 3939 ath12k_warn(ab, "failed to parse dma buf release tlv %d\n", ret); 3940 return; 3941 } 3942 3943 param.fixed = arg.fixed; 3944 param.buf_entry = arg.buf_entry; 3945 param.num_buf_entry = arg.num_buf_entry; 3946 param.meta_data = arg.meta_data; 3947 param.num_meta = arg.num_meta; 3948 3949 ret = ath12k_dbring_buffer_release_event(ab, ¶m); 3950 if (ret) { 3951 ath12k_warn(ab, "failed to handle dma buf release event %d\n", ret); 3952 return; 3953 } 3954 } 3955 3956 static int ath12k_wmi_hw_mode_caps_parse(struct ath12k_base *soc, 3957 u16 tag, u16 len, 3958 const void *ptr, void *data) 3959 { 3960 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data; 3961 struct ath12k_wmi_hw_mode_cap_params *hw_mode_cap; 3962 u32 phy_map = 0; 3963 3964 if (tag != WMI_TAG_HW_MODE_CAPABILITIES) 3965 return -EPROTO; 3966 3967 if (svc_rdy_ext->n_hw_mode_caps >= svc_rdy_ext->arg.num_hw_modes) 3968 return -ENOBUFS; 3969 3970 hw_mode_cap = container_of(ptr, struct ath12k_wmi_hw_mode_cap_params, 3971 hw_mode_id); 3972 svc_rdy_ext->n_hw_mode_caps++; 3973 3974 phy_map = le32_to_cpu(hw_mode_cap->phy_id_map); 3975 svc_rdy_ext->tot_phy_id += fls(phy_map); 3976 3977 return 0; 3978 } 3979 3980 static int ath12k_wmi_hw_mode_caps(struct ath12k_base *soc, 3981 u16 len, const void *ptr, void *data) 3982 { 3983 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data; 3984 const struct ath12k_wmi_hw_mode_cap_params *hw_mode_caps; 3985 enum wmi_host_hw_mode_config_type mode, pref; 3986 u32 i; 3987 int ret; 3988 3989 svc_rdy_ext->n_hw_mode_caps = 0; 3990 svc_rdy_ext->hw_mode_caps = ptr; 3991 3992 ret = ath12k_wmi_tlv_iter(soc, ptr, len, 3993 ath12k_wmi_hw_mode_caps_parse, 3994 svc_rdy_ext); 3995 if (ret) { 3996 ath12k_warn(soc, "failed to parse tlv %d\n", ret); 3997 return ret; 3998 } 3999 4000 for (i = 0 ; i < svc_rdy_ext->n_hw_mode_caps; i++) { 4001 hw_mode_caps = &svc_rdy_ext->hw_mode_caps[i]; 4002 mode = le32_to_cpu(hw_mode_caps->hw_mode_id); 4003 4004 if (mode >= WMI_HOST_HW_MODE_MAX) 4005 continue; 4006 4007 pref = soc->wmi_ab.preferred_hw_mode; 4008 4009 if (ath12k_hw_mode_pri_map[mode] < ath12k_hw_mode_pri_map[pref]) { 4010 svc_rdy_ext->pref_hw_mode_caps = *hw_mode_caps; 4011 soc->wmi_ab.preferred_hw_mode = mode; 4012 } 4013 } 4014 4015 ath12k_dbg(soc, ATH12K_DBG_WMI, "preferred_hw_mode:%d\n", 4016 soc->wmi_ab.preferred_hw_mode); 4017 if (soc->wmi_ab.preferred_hw_mode == WMI_HOST_HW_MODE_MAX) 4018 return -EINVAL; 4019 4020 return 0; 4021 } 4022 4023 static int ath12k_wmi_mac_phy_caps_parse(struct ath12k_base *soc, 4024 u16 tag, u16 len, 4025 const void *ptr, void *data) 4026 { 4027 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data; 4028 4029 if (tag != WMI_TAG_MAC_PHY_CAPABILITIES) 4030 return -EPROTO; 4031 4032 if (svc_rdy_ext->n_mac_phy_caps >= svc_rdy_ext->tot_phy_id) 4033 return -ENOBUFS; 4034 4035 len = min_t(u16, len, sizeof(struct ath12k_wmi_mac_phy_caps_params)); 4036 if (!svc_rdy_ext->n_mac_phy_caps) { 4037 svc_rdy_ext->mac_phy_caps = kzalloc((svc_rdy_ext->tot_phy_id) * len, 4038 GFP_ATOMIC); 4039 if (!svc_rdy_ext->mac_phy_caps) 4040 return -ENOMEM; 4041 } 4042 4043 memcpy(svc_rdy_ext->mac_phy_caps + svc_rdy_ext->n_mac_phy_caps, ptr, len); 4044 svc_rdy_ext->n_mac_phy_caps++; 4045 return 0; 4046 } 4047 4048 static int ath12k_wmi_ext_hal_reg_caps_parse(struct ath12k_base *soc, 4049 u16 tag, u16 len, 4050 const void *ptr, void *data) 4051 { 4052 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data; 4053 4054 if (tag != WMI_TAG_HAL_REG_CAPABILITIES_EXT) 4055 return -EPROTO; 4056 4057 if (svc_rdy_ext->n_ext_hal_reg_caps >= svc_rdy_ext->arg.num_phy) 4058 return -ENOBUFS; 4059 4060 svc_rdy_ext->n_ext_hal_reg_caps++; 4061 return 0; 4062 } 4063 4064 static int ath12k_wmi_ext_hal_reg_caps(struct ath12k_base *soc, 4065 u16 len, const void *ptr, void *data) 4066 { 4067 struct ath12k_wmi_pdev *wmi_handle = &soc->wmi_ab.wmi[0]; 4068 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data; 4069 struct ath12k_wmi_hal_reg_capabilities_ext_arg reg_cap; 4070 int ret; 4071 u32 i; 4072 4073 svc_rdy_ext->n_ext_hal_reg_caps = 0; 4074 svc_rdy_ext->ext_hal_reg_caps = ptr; 4075 ret = ath12k_wmi_tlv_iter(soc, ptr, len, 4076 ath12k_wmi_ext_hal_reg_caps_parse, 4077 svc_rdy_ext); 4078 if (ret) { 4079 ath12k_warn(soc, "failed to parse tlv %d\n", ret); 4080 return ret; 4081 } 4082 4083 for (i = 0; i < svc_rdy_ext->arg.num_phy; i++) { 4084 ret = ath12k_pull_reg_cap_svc_rdy_ext(wmi_handle, 4085 svc_rdy_ext->soc_hal_reg_caps, 4086 svc_rdy_ext->ext_hal_reg_caps, i, 4087 ®_cap); 4088 if (ret) { 4089 ath12k_warn(soc, "failed to extract reg cap %d\n", i); 4090 return ret; 4091 } 4092 4093 if (reg_cap.phy_id >= MAX_RADIOS) { 4094 ath12k_warn(soc, "unexpected phy id %u\n", reg_cap.phy_id); 4095 return -EINVAL; 4096 } 4097 4098 soc->hal_reg_cap[reg_cap.phy_id] = reg_cap; 4099 } 4100 return 0; 4101 } 4102 4103 static int ath12k_wmi_ext_soc_hal_reg_caps_parse(struct ath12k_base *soc, 4104 u16 len, const void *ptr, 4105 void *data) 4106 { 4107 struct ath12k_wmi_pdev *wmi_handle = &soc->wmi_ab.wmi[0]; 4108 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data; 4109 u8 hw_mode_id = le32_to_cpu(svc_rdy_ext->pref_hw_mode_caps.hw_mode_id); 4110 u32 phy_id_map; 4111 int pdev_index = 0; 4112 int ret; 4113 4114 svc_rdy_ext->soc_hal_reg_caps = ptr; 4115 svc_rdy_ext->arg.num_phy = le32_to_cpu(svc_rdy_ext->soc_hal_reg_caps->num_phy); 4116 4117 soc->num_radios = 0; 4118 phy_id_map = le32_to_cpu(svc_rdy_ext->pref_hw_mode_caps.phy_id_map); 4119 soc->fw_pdev_count = 0; 4120 4121 while (phy_id_map && soc->num_radios < MAX_RADIOS) { 4122 ret = ath12k_pull_mac_phy_cap_svc_ready_ext(wmi_handle, 4123 svc_rdy_ext, 4124 hw_mode_id, soc->num_radios, 4125 &soc->pdevs[pdev_index]); 4126 if (ret) { 4127 ath12k_warn(soc, "failed to extract mac caps, idx :%d\n", 4128 soc->num_radios); 4129 return ret; 4130 } 4131 4132 soc->num_radios++; 4133 4134 /* For single_pdev_only targets, 4135 * save mac_phy capability in the same pdev 4136 */ 4137 if (soc->hw_params->single_pdev_only) 4138 pdev_index = 0; 4139 else 4140 pdev_index = soc->num_radios; 4141 4142 /* TODO: mac_phy_cap prints */ 4143 phy_id_map >>= 1; 4144 } 4145 4146 if (soc->hw_params->single_pdev_only) { 4147 soc->num_radios = 1; 4148 soc->pdevs[0].pdev_id = 0; 4149 } 4150 4151 return 0; 4152 } 4153 4154 static int ath12k_wmi_dma_ring_caps_parse(struct ath12k_base *soc, 4155 u16 tag, u16 len, 4156 const void *ptr, void *data) 4157 { 4158 struct ath12k_wmi_dma_ring_caps_parse *parse = data; 4159 4160 if (tag != WMI_TAG_DMA_RING_CAPABILITIES) 4161 return -EPROTO; 4162 4163 parse->n_dma_ring_caps++; 4164 return 0; 4165 } 4166 4167 static int ath12k_wmi_alloc_dbring_caps(struct ath12k_base *ab, 4168 u32 num_cap) 4169 { 4170 size_t sz; 4171 void *ptr; 4172 4173 sz = num_cap * sizeof(struct ath12k_dbring_cap); 4174 ptr = kzalloc(sz, GFP_ATOMIC); 4175 if (!ptr) 4176 return -ENOMEM; 4177 4178 ab->db_caps = ptr; 4179 ab->num_db_cap = num_cap; 4180 4181 return 0; 4182 } 4183 4184 static void ath12k_wmi_free_dbring_caps(struct ath12k_base *ab) 4185 { 4186 kfree(ab->db_caps); 4187 ab->db_caps = NULL; 4188 ab->num_db_cap = 0; 4189 } 4190 4191 static int ath12k_wmi_dma_ring_caps(struct ath12k_base *ab, 4192 u16 len, const void *ptr, void *data) 4193 { 4194 struct ath12k_wmi_dma_ring_caps_parse *dma_caps_parse = data; 4195 struct ath12k_wmi_dma_ring_caps_params *dma_caps; 4196 struct ath12k_dbring_cap *dir_buff_caps; 4197 int ret; 4198 u32 i; 4199 4200 dma_caps_parse->n_dma_ring_caps = 0; 4201 dma_caps = (struct ath12k_wmi_dma_ring_caps_params *)ptr; 4202 ret = ath12k_wmi_tlv_iter(ab, ptr, len, 4203 ath12k_wmi_dma_ring_caps_parse, 4204 dma_caps_parse); 4205 if (ret) { 4206 ath12k_warn(ab, "failed to parse dma ring caps tlv %d\n", ret); 4207 return ret; 4208 } 4209 4210 if (!dma_caps_parse->n_dma_ring_caps) 4211 return 0; 4212 4213 if (ab->num_db_cap) { 4214 ath12k_warn(ab, "Already processed, so ignoring dma ring caps\n"); 4215 return 0; 4216 } 4217 4218 ret = ath12k_wmi_alloc_dbring_caps(ab, dma_caps_parse->n_dma_ring_caps); 4219 if (ret) 4220 return ret; 4221 4222 dir_buff_caps = ab->db_caps; 4223 for (i = 0; i < dma_caps_parse->n_dma_ring_caps; i++) { 4224 if (le32_to_cpu(dma_caps[i].module_id) >= WMI_DIRECT_BUF_MAX) { 4225 ath12k_warn(ab, "Invalid module id %d\n", 4226 le32_to_cpu(dma_caps[i].module_id)); 4227 ret = -EINVAL; 4228 goto free_dir_buff; 4229 } 4230 4231 dir_buff_caps[i].id = le32_to_cpu(dma_caps[i].module_id); 4232 dir_buff_caps[i].pdev_id = 4233 DP_HW2SW_MACID(le32_to_cpu(dma_caps[i].pdev_id)); 4234 dir_buff_caps[i].min_elem = le32_to_cpu(dma_caps[i].min_elem); 4235 dir_buff_caps[i].min_buf_sz = le32_to_cpu(dma_caps[i].min_buf_sz); 4236 dir_buff_caps[i].min_buf_align = le32_to_cpu(dma_caps[i].min_buf_align); 4237 } 4238 4239 return 0; 4240 4241 free_dir_buff: 4242 ath12k_wmi_free_dbring_caps(ab); 4243 return ret; 4244 } 4245 4246 static int ath12k_wmi_svc_rdy_ext_parse(struct ath12k_base *ab, 4247 u16 tag, u16 len, 4248 const void *ptr, void *data) 4249 { 4250 struct ath12k_wmi_pdev *wmi_handle = &ab->wmi_ab.wmi[0]; 4251 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data; 4252 int ret; 4253 4254 switch (tag) { 4255 case WMI_TAG_SERVICE_READY_EXT_EVENT: 4256 ret = ath12k_pull_svc_ready_ext(wmi_handle, ptr, 4257 &svc_rdy_ext->arg); 4258 if (ret) { 4259 ath12k_warn(ab, "unable to extract ext params\n"); 4260 return ret; 4261 } 4262 break; 4263 4264 case WMI_TAG_SOC_MAC_PHY_HW_MODE_CAPS: 4265 svc_rdy_ext->hw_caps = ptr; 4266 svc_rdy_ext->arg.num_hw_modes = 4267 le32_to_cpu(svc_rdy_ext->hw_caps->num_hw_modes); 4268 break; 4269 4270 case WMI_TAG_SOC_HAL_REG_CAPABILITIES: 4271 ret = ath12k_wmi_ext_soc_hal_reg_caps_parse(ab, len, ptr, 4272 svc_rdy_ext); 4273 if (ret) 4274 return ret; 4275 break; 4276 4277 case WMI_TAG_ARRAY_STRUCT: 4278 if (!svc_rdy_ext->hw_mode_done) { 4279 ret = ath12k_wmi_hw_mode_caps(ab, len, ptr, svc_rdy_ext); 4280 if (ret) 4281 return ret; 4282 4283 svc_rdy_ext->hw_mode_done = true; 4284 } else if (!svc_rdy_ext->mac_phy_done) { 4285 svc_rdy_ext->n_mac_phy_caps = 0; 4286 ret = ath12k_wmi_tlv_iter(ab, ptr, len, 4287 ath12k_wmi_mac_phy_caps_parse, 4288 svc_rdy_ext); 4289 if (ret) { 4290 ath12k_warn(ab, "failed to parse tlv %d\n", ret); 4291 return ret; 4292 } 4293 4294 svc_rdy_ext->mac_phy_done = true; 4295 } else if (!svc_rdy_ext->ext_hal_reg_done) { 4296 ret = ath12k_wmi_ext_hal_reg_caps(ab, len, ptr, svc_rdy_ext); 4297 if (ret) 4298 return ret; 4299 4300 svc_rdy_ext->ext_hal_reg_done = true; 4301 } else if (!svc_rdy_ext->mac_phy_chainmask_combo_done) { 4302 svc_rdy_ext->mac_phy_chainmask_combo_done = true; 4303 } else if (!svc_rdy_ext->mac_phy_chainmask_cap_done) { 4304 svc_rdy_ext->mac_phy_chainmask_cap_done = true; 4305 } else if (!svc_rdy_ext->oem_dma_ring_cap_done) { 4306 svc_rdy_ext->oem_dma_ring_cap_done = true; 4307 } else if (!svc_rdy_ext->dma_ring_cap_done) { 4308 ret = ath12k_wmi_dma_ring_caps(ab, len, ptr, 4309 &svc_rdy_ext->dma_caps_parse); 4310 if (ret) 4311 return ret; 4312 4313 svc_rdy_ext->dma_ring_cap_done = true; 4314 } 4315 break; 4316 4317 default: 4318 break; 4319 } 4320 return 0; 4321 } 4322 4323 static int ath12k_service_ready_ext_event(struct ath12k_base *ab, 4324 struct sk_buff *skb) 4325 { 4326 struct ath12k_wmi_svc_rdy_ext_parse svc_rdy_ext = { }; 4327 int ret; 4328 4329 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 4330 ath12k_wmi_svc_rdy_ext_parse, 4331 &svc_rdy_ext); 4332 if (ret) { 4333 ath12k_warn(ab, "failed to parse tlv %d\n", ret); 4334 goto err; 4335 } 4336 4337 if (!test_bit(WMI_TLV_SERVICE_EXT2_MSG, ab->wmi_ab.svc_map)) 4338 complete(&ab->wmi_ab.service_ready); 4339 4340 kfree(svc_rdy_ext.mac_phy_caps); 4341 return 0; 4342 4343 err: 4344 ath12k_wmi_free_dbring_caps(ab); 4345 return ret; 4346 } 4347 4348 static int ath12k_pull_svc_ready_ext2(struct ath12k_wmi_pdev *wmi_handle, 4349 const void *ptr, 4350 struct ath12k_wmi_svc_rdy_ext2_arg *arg) 4351 { 4352 const struct wmi_service_ready_ext2_event *ev = ptr; 4353 4354 if (!ev) 4355 return -EINVAL; 4356 4357 arg->reg_db_version = le32_to_cpu(ev->reg_db_version); 4358 arg->hw_min_max_tx_power_2ghz = le32_to_cpu(ev->hw_min_max_tx_power_2ghz); 4359 arg->hw_min_max_tx_power_5ghz = le32_to_cpu(ev->hw_min_max_tx_power_5ghz); 4360 arg->chwidth_num_peer_caps = le32_to_cpu(ev->chwidth_num_peer_caps); 4361 arg->preamble_puncture_bw = le32_to_cpu(ev->preamble_puncture_bw); 4362 arg->max_user_per_ppdu_ofdma = le32_to_cpu(ev->max_user_per_ppdu_ofdma); 4363 arg->max_user_per_ppdu_mumimo = le32_to_cpu(ev->max_user_per_ppdu_mumimo); 4364 arg->target_cap_flags = le32_to_cpu(ev->target_cap_flags); 4365 return 0; 4366 } 4367 4368 static void ath12k_wmi_eht_caps_parse(struct ath12k_pdev *pdev, u32 band, 4369 const __le32 cap_mac_info[], 4370 const __le32 cap_phy_info[], 4371 const __le32 supp_mcs[], 4372 const struct ath12k_wmi_ppe_threshold_params *ppet, 4373 __le32 cap_info_internal) 4374 { 4375 struct ath12k_band_cap *cap_band = &pdev->cap.band[band]; 4376 u32 support_320mhz; 4377 u8 i; 4378 4379 if (band == NL80211_BAND_6GHZ) 4380 support_320mhz = cap_band->eht_cap_phy_info[0] & 4381 IEEE80211_EHT_PHY_CAP0_320MHZ_IN_6GHZ; 4382 4383 for (i = 0; i < WMI_MAX_EHTCAP_MAC_SIZE; i++) 4384 cap_band->eht_cap_mac_info[i] = le32_to_cpu(cap_mac_info[i]); 4385 4386 for (i = 0; i < WMI_MAX_EHTCAP_PHY_SIZE; i++) 4387 cap_band->eht_cap_phy_info[i] = le32_to_cpu(cap_phy_info[i]); 4388 4389 if (band == NL80211_BAND_6GHZ) 4390 cap_band->eht_cap_phy_info[0] |= support_320mhz; 4391 4392 cap_band->eht_mcs_20_only = le32_to_cpu(supp_mcs[0]); 4393 cap_band->eht_mcs_80 = le32_to_cpu(supp_mcs[1]); 4394 if (band != NL80211_BAND_2GHZ) { 4395 cap_band->eht_mcs_160 = le32_to_cpu(supp_mcs[2]); 4396 cap_band->eht_mcs_320 = le32_to_cpu(supp_mcs[3]); 4397 } 4398 4399 cap_band->eht_ppet.numss_m1 = le32_to_cpu(ppet->numss_m1); 4400 cap_band->eht_ppet.ru_bit_mask = le32_to_cpu(ppet->ru_info); 4401 for (i = 0; i < WMI_MAX_NUM_SS; i++) 4402 cap_band->eht_ppet.ppet16_ppet8_ru3_ru0[i] = 4403 le32_to_cpu(ppet->ppet16_ppet8_ru3_ru0[i]); 4404 4405 cap_band->eht_cap_info_internal = le32_to_cpu(cap_info_internal); 4406 } 4407 4408 static int 4409 ath12k_wmi_tlv_mac_phy_caps_ext_parse(struct ath12k_base *ab, 4410 const struct ath12k_wmi_caps_ext_params *caps, 4411 struct ath12k_pdev *pdev) 4412 { 4413 struct ath12k_band_cap *cap_band; 4414 u32 bands, support_320mhz; 4415 int i; 4416 4417 if (ab->hw_params->single_pdev_only) { 4418 if (caps->hw_mode_id == WMI_HOST_HW_MODE_SINGLE) { 4419 support_320mhz = le32_to_cpu(caps->eht_cap_phy_info_5ghz[0]) & 4420 IEEE80211_EHT_PHY_CAP0_320MHZ_IN_6GHZ; 4421 cap_band = &pdev->cap.band[NL80211_BAND_6GHZ]; 4422 cap_band->eht_cap_phy_info[0] |= support_320mhz; 4423 return 0; 4424 } 4425 4426 for (i = 0; i < ab->fw_pdev_count; i++) { 4427 struct ath12k_fw_pdev *fw_pdev = &ab->fw_pdev[i]; 4428 4429 if (fw_pdev->pdev_id == ath12k_wmi_caps_ext_get_pdev_id(caps) && 4430 fw_pdev->phy_id == le32_to_cpu(caps->phy_id)) { 4431 bands = fw_pdev->supported_bands; 4432 break; 4433 } 4434 } 4435 4436 if (i == ab->fw_pdev_count) 4437 return -EINVAL; 4438 } else { 4439 bands = pdev->cap.supported_bands; 4440 } 4441 4442 if (bands & WMI_HOST_WLAN_2G_CAP) { 4443 ath12k_wmi_eht_caps_parse(pdev, NL80211_BAND_2GHZ, 4444 caps->eht_cap_mac_info_2ghz, 4445 caps->eht_cap_phy_info_2ghz, 4446 caps->eht_supp_mcs_ext_2ghz, 4447 &caps->eht_ppet_2ghz, 4448 caps->eht_cap_info_internal); 4449 } 4450 4451 if (bands & WMI_HOST_WLAN_5G_CAP) { 4452 ath12k_wmi_eht_caps_parse(pdev, NL80211_BAND_5GHZ, 4453 caps->eht_cap_mac_info_5ghz, 4454 caps->eht_cap_phy_info_5ghz, 4455 caps->eht_supp_mcs_ext_5ghz, 4456 &caps->eht_ppet_5ghz, 4457 caps->eht_cap_info_internal); 4458 4459 ath12k_wmi_eht_caps_parse(pdev, NL80211_BAND_6GHZ, 4460 caps->eht_cap_mac_info_5ghz, 4461 caps->eht_cap_phy_info_5ghz, 4462 caps->eht_supp_mcs_ext_5ghz, 4463 &caps->eht_ppet_5ghz, 4464 caps->eht_cap_info_internal); 4465 } 4466 4467 return 0; 4468 } 4469 4470 static int ath12k_wmi_tlv_mac_phy_caps_ext(struct ath12k_base *ab, u16 tag, 4471 u16 len, const void *ptr, 4472 void *data) 4473 { 4474 const struct ath12k_wmi_caps_ext_params *caps = ptr; 4475 int i = 0, ret; 4476 4477 if (tag != WMI_TAG_MAC_PHY_CAPABILITIES_EXT) 4478 return -EPROTO; 4479 4480 if (ab->hw_params->single_pdev_only) { 4481 if (ab->wmi_ab.preferred_hw_mode != le32_to_cpu(caps->hw_mode_id) && 4482 caps->hw_mode_id != WMI_HOST_HW_MODE_SINGLE) 4483 return 0; 4484 } else { 4485 for (i = 0; i < ab->num_radios; i++) { 4486 if (ab->pdevs[i].pdev_id == 4487 ath12k_wmi_caps_ext_get_pdev_id(caps)) 4488 break; 4489 } 4490 4491 if (i == ab->num_radios) 4492 return -EINVAL; 4493 } 4494 4495 ret = ath12k_wmi_tlv_mac_phy_caps_ext_parse(ab, caps, &ab->pdevs[i]); 4496 if (ret) { 4497 ath12k_warn(ab, 4498 "failed to parse extended MAC PHY capabilities for pdev %d: %d\n", 4499 ret, ab->pdevs[i].pdev_id); 4500 return ret; 4501 } 4502 4503 return 0; 4504 } 4505 4506 static int ath12k_wmi_svc_rdy_ext2_parse(struct ath12k_base *ab, 4507 u16 tag, u16 len, 4508 const void *ptr, void *data) 4509 { 4510 struct ath12k_wmi_pdev *wmi_handle = &ab->wmi_ab.wmi[0]; 4511 struct ath12k_wmi_svc_rdy_ext2_parse *parse = data; 4512 int ret; 4513 4514 switch (tag) { 4515 case WMI_TAG_SERVICE_READY_EXT2_EVENT: 4516 ret = ath12k_pull_svc_ready_ext2(wmi_handle, ptr, 4517 &parse->arg); 4518 if (ret) { 4519 ath12k_warn(ab, 4520 "failed to extract wmi service ready ext2 parameters: %d\n", 4521 ret); 4522 return ret; 4523 } 4524 break; 4525 4526 case WMI_TAG_ARRAY_STRUCT: 4527 if (!parse->dma_ring_cap_done) { 4528 ret = ath12k_wmi_dma_ring_caps(ab, len, ptr, 4529 &parse->dma_caps_parse); 4530 if (ret) 4531 return ret; 4532 4533 parse->dma_ring_cap_done = true; 4534 } else if (!parse->spectral_bin_scaling_done) { 4535 /* TODO: This is a place-holder as WMI tag for 4536 * spectral scaling is before 4537 * WMI_TAG_MAC_PHY_CAPABILITIES_EXT 4538 */ 4539 parse->spectral_bin_scaling_done = true; 4540 } else if (!parse->mac_phy_caps_ext_done) { 4541 ret = ath12k_wmi_tlv_iter(ab, ptr, len, 4542 ath12k_wmi_tlv_mac_phy_caps_ext, 4543 parse); 4544 if (ret) { 4545 ath12k_warn(ab, "failed to parse extended MAC PHY capabilities WMI TLV: %d\n", 4546 ret); 4547 return ret; 4548 } 4549 4550 parse->mac_phy_caps_ext_done = true; 4551 } 4552 break; 4553 default: 4554 break; 4555 } 4556 4557 return 0; 4558 } 4559 4560 static int ath12k_service_ready_ext2_event(struct ath12k_base *ab, 4561 struct sk_buff *skb) 4562 { 4563 struct ath12k_wmi_svc_rdy_ext2_parse svc_rdy_ext2 = { }; 4564 int ret; 4565 4566 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 4567 ath12k_wmi_svc_rdy_ext2_parse, 4568 &svc_rdy_ext2); 4569 if (ret) { 4570 ath12k_warn(ab, "failed to parse ext2 event tlv %d\n", ret); 4571 goto err; 4572 } 4573 4574 complete(&ab->wmi_ab.service_ready); 4575 4576 return 0; 4577 4578 err: 4579 ath12k_wmi_free_dbring_caps(ab); 4580 return ret; 4581 } 4582 4583 static int ath12k_pull_vdev_start_resp_tlv(struct ath12k_base *ab, struct sk_buff *skb, 4584 struct wmi_vdev_start_resp_event *vdev_rsp) 4585 { 4586 const void **tb; 4587 const struct wmi_vdev_start_resp_event *ev; 4588 int ret; 4589 4590 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 4591 if (IS_ERR(tb)) { 4592 ret = PTR_ERR(tb); 4593 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 4594 return ret; 4595 } 4596 4597 ev = tb[WMI_TAG_VDEV_START_RESPONSE_EVENT]; 4598 if (!ev) { 4599 ath12k_warn(ab, "failed to fetch vdev start resp ev"); 4600 kfree(tb); 4601 return -EPROTO; 4602 } 4603 4604 *vdev_rsp = *ev; 4605 4606 kfree(tb); 4607 return 0; 4608 } 4609 4610 static struct ath12k_reg_rule 4611 *create_ext_reg_rules_from_wmi(u32 num_reg_rules, 4612 struct ath12k_wmi_reg_rule_ext_params *wmi_reg_rule) 4613 { 4614 struct ath12k_reg_rule *reg_rule_ptr; 4615 u32 count; 4616 4617 reg_rule_ptr = kzalloc((num_reg_rules * sizeof(*reg_rule_ptr)), 4618 GFP_ATOMIC); 4619 4620 if (!reg_rule_ptr) 4621 return NULL; 4622 4623 for (count = 0; count < num_reg_rules; count++) { 4624 reg_rule_ptr[count].start_freq = 4625 le32_get_bits(wmi_reg_rule[count].freq_info, 4626 REG_RULE_START_FREQ); 4627 reg_rule_ptr[count].end_freq = 4628 le32_get_bits(wmi_reg_rule[count].freq_info, 4629 REG_RULE_END_FREQ); 4630 reg_rule_ptr[count].max_bw = 4631 le32_get_bits(wmi_reg_rule[count].bw_pwr_info, 4632 REG_RULE_MAX_BW); 4633 reg_rule_ptr[count].reg_power = 4634 le32_get_bits(wmi_reg_rule[count].bw_pwr_info, 4635 REG_RULE_REG_PWR); 4636 reg_rule_ptr[count].ant_gain = 4637 le32_get_bits(wmi_reg_rule[count].bw_pwr_info, 4638 REG_RULE_ANT_GAIN); 4639 reg_rule_ptr[count].flags = 4640 le32_get_bits(wmi_reg_rule[count].flag_info, 4641 REG_RULE_FLAGS); 4642 reg_rule_ptr[count].psd_flag = 4643 le32_get_bits(wmi_reg_rule[count].psd_power_info, 4644 REG_RULE_PSD_INFO); 4645 reg_rule_ptr[count].psd_eirp = 4646 le32_get_bits(wmi_reg_rule[count].psd_power_info, 4647 REG_RULE_PSD_EIRP); 4648 } 4649 4650 return reg_rule_ptr; 4651 } 4652 4653 static int ath12k_pull_reg_chan_list_ext_update_ev(struct ath12k_base *ab, 4654 struct sk_buff *skb, 4655 struct ath12k_reg_info *reg_info) 4656 { 4657 const void **tb; 4658 const struct wmi_reg_chan_list_cc_ext_event *ev; 4659 struct ath12k_wmi_reg_rule_ext_params *ext_wmi_reg_rule; 4660 u32 num_2g_reg_rules, num_5g_reg_rules; 4661 u32 num_6g_reg_rules_ap[WMI_REG_CURRENT_MAX_AP_TYPE]; 4662 u32 num_6g_reg_rules_cl[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE]; 4663 u32 total_reg_rules = 0; 4664 int ret, i, j; 4665 4666 ath12k_dbg(ab, ATH12K_DBG_WMI, "processing regulatory ext channel list\n"); 4667 4668 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 4669 if (IS_ERR(tb)) { 4670 ret = PTR_ERR(tb); 4671 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 4672 return ret; 4673 } 4674 4675 ev = tb[WMI_TAG_REG_CHAN_LIST_CC_EXT_EVENT]; 4676 if (!ev) { 4677 ath12k_warn(ab, "failed to fetch reg chan list ext update ev\n"); 4678 kfree(tb); 4679 return -EPROTO; 4680 } 4681 4682 reg_info->num_2g_reg_rules = le32_to_cpu(ev->num_2g_reg_rules); 4683 reg_info->num_5g_reg_rules = le32_to_cpu(ev->num_5g_reg_rules); 4684 reg_info->num_6g_reg_rules_ap[WMI_REG_INDOOR_AP] = 4685 le32_to_cpu(ev->num_6g_reg_rules_ap_lpi); 4686 reg_info->num_6g_reg_rules_ap[WMI_REG_STD_POWER_AP] = 4687 le32_to_cpu(ev->num_6g_reg_rules_ap_sp); 4688 reg_info->num_6g_reg_rules_ap[WMI_REG_VLP_AP] = 4689 le32_to_cpu(ev->num_6g_reg_rules_ap_vlp); 4690 4691 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) { 4692 reg_info->num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i] = 4693 le32_to_cpu(ev->num_6g_reg_rules_cl_lpi[i]); 4694 reg_info->num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i] = 4695 le32_to_cpu(ev->num_6g_reg_rules_cl_sp[i]); 4696 reg_info->num_6g_reg_rules_cl[WMI_REG_VLP_AP][i] = 4697 le32_to_cpu(ev->num_6g_reg_rules_cl_vlp[i]); 4698 } 4699 4700 num_2g_reg_rules = reg_info->num_2g_reg_rules; 4701 total_reg_rules += num_2g_reg_rules; 4702 num_5g_reg_rules = reg_info->num_5g_reg_rules; 4703 total_reg_rules += num_5g_reg_rules; 4704 4705 if (num_2g_reg_rules > MAX_REG_RULES || num_5g_reg_rules > MAX_REG_RULES) { 4706 ath12k_warn(ab, "Num reg rules for 2G/5G exceeds max limit (num_2g_reg_rules: %d num_5g_reg_rules: %d max_rules: %d)\n", 4707 num_2g_reg_rules, num_5g_reg_rules, MAX_REG_RULES); 4708 kfree(tb); 4709 return -EINVAL; 4710 } 4711 4712 for (i = 0; i < WMI_REG_CURRENT_MAX_AP_TYPE; i++) { 4713 num_6g_reg_rules_ap[i] = reg_info->num_6g_reg_rules_ap[i]; 4714 4715 if (num_6g_reg_rules_ap[i] > MAX_6G_REG_RULES) { 4716 ath12k_warn(ab, "Num 6G reg rules for AP mode(%d) exceeds max limit (num_6g_reg_rules_ap: %d, max_rules: %d)\n", 4717 i, num_6g_reg_rules_ap[i], MAX_6G_REG_RULES); 4718 kfree(tb); 4719 return -EINVAL; 4720 } 4721 4722 total_reg_rules += num_6g_reg_rules_ap[i]; 4723 } 4724 4725 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) { 4726 num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i] = 4727 reg_info->num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i]; 4728 total_reg_rules += num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i]; 4729 4730 num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i] = 4731 reg_info->num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i]; 4732 total_reg_rules += num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i]; 4733 4734 num_6g_reg_rules_cl[WMI_REG_VLP_AP][i] = 4735 reg_info->num_6g_reg_rules_cl[WMI_REG_VLP_AP][i]; 4736 total_reg_rules += num_6g_reg_rules_cl[WMI_REG_VLP_AP][i]; 4737 4738 if (num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i] > MAX_6G_REG_RULES || 4739 num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i] > MAX_6G_REG_RULES || 4740 num_6g_reg_rules_cl[WMI_REG_VLP_AP][i] > MAX_6G_REG_RULES) { 4741 ath12k_warn(ab, "Num 6g client reg rules exceeds max limit, for client(type: %d)\n", 4742 i); 4743 kfree(tb); 4744 return -EINVAL; 4745 } 4746 } 4747 4748 if (!total_reg_rules) { 4749 ath12k_warn(ab, "No reg rules available\n"); 4750 kfree(tb); 4751 return -EINVAL; 4752 } 4753 4754 memcpy(reg_info->alpha2, &ev->alpha2, REG_ALPHA2_LEN); 4755 4756 /* FIXME: Currently FW includes 6G reg rule also in 5G rule 4757 * list for country US. 4758 * Having same 6G reg rule in 5G and 6G rules list causes 4759 * intersect check to be true, and same rules will be shown 4760 * multiple times in iw cmd. So added hack below to avoid 4761 * parsing 6G rule from 5G reg rule list, and this can be 4762 * removed later, after FW updates to remove 6G reg rule 4763 * from 5G rules list. 4764 */ 4765 if (memcmp(reg_info->alpha2, "US", 2) == 0) { 4766 reg_info->num_5g_reg_rules = REG_US_5G_NUM_REG_RULES; 4767 num_5g_reg_rules = reg_info->num_5g_reg_rules; 4768 } 4769 4770 reg_info->dfs_region = le32_to_cpu(ev->dfs_region); 4771 reg_info->phybitmap = le32_to_cpu(ev->phybitmap); 4772 reg_info->num_phy = le32_to_cpu(ev->num_phy); 4773 reg_info->phy_id = le32_to_cpu(ev->phy_id); 4774 reg_info->ctry_code = le32_to_cpu(ev->country_id); 4775 reg_info->reg_dmn_pair = le32_to_cpu(ev->domain_code); 4776 4777 switch (le32_to_cpu(ev->status_code)) { 4778 case WMI_REG_SET_CC_STATUS_PASS: 4779 reg_info->status_code = REG_SET_CC_STATUS_PASS; 4780 break; 4781 case WMI_REG_CURRENT_ALPHA2_NOT_FOUND: 4782 reg_info->status_code = REG_CURRENT_ALPHA2_NOT_FOUND; 4783 break; 4784 case WMI_REG_INIT_ALPHA2_NOT_FOUND: 4785 reg_info->status_code = REG_INIT_ALPHA2_NOT_FOUND; 4786 break; 4787 case WMI_REG_SET_CC_CHANGE_NOT_ALLOWED: 4788 reg_info->status_code = REG_SET_CC_CHANGE_NOT_ALLOWED; 4789 break; 4790 case WMI_REG_SET_CC_STATUS_NO_MEMORY: 4791 reg_info->status_code = REG_SET_CC_STATUS_NO_MEMORY; 4792 break; 4793 case WMI_REG_SET_CC_STATUS_FAIL: 4794 reg_info->status_code = REG_SET_CC_STATUS_FAIL; 4795 break; 4796 } 4797 4798 reg_info->is_ext_reg_event = true; 4799 4800 reg_info->min_bw_2g = le32_to_cpu(ev->min_bw_2g); 4801 reg_info->max_bw_2g = le32_to_cpu(ev->max_bw_2g); 4802 reg_info->min_bw_5g = le32_to_cpu(ev->min_bw_5g); 4803 reg_info->max_bw_5g = le32_to_cpu(ev->max_bw_5g); 4804 reg_info->min_bw_6g_ap[WMI_REG_INDOOR_AP] = le32_to_cpu(ev->min_bw_6g_ap_lpi); 4805 reg_info->max_bw_6g_ap[WMI_REG_INDOOR_AP] = le32_to_cpu(ev->max_bw_6g_ap_lpi); 4806 reg_info->min_bw_6g_ap[WMI_REG_STD_POWER_AP] = le32_to_cpu(ev->min_bw_6g_ap_sp); 4807 reg_info->max_bw_6g_ap[WMI_REG_STD_POWER_AP] = le32_to_cpu(ev->max_bw_6g_ap_sp); 4808 reg_info->min_bw_6g_ap[WMI_REG_VLP_AP] = le32_to_cpu(ev->min_bw_6g_ap_vlp); 4809 reg_info->max_bw_6g_ap[WMI_REG_VLP_AP] = le32_to_cpu(ev->max_bw_6g_ap_vlp); 4810 4811 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) { 4812 reg_info->min_bw_6g_client[WMI_REG_INDOOR_AP][i] = 4813 le32_to_cpu(ev->min_bw_6g_client_lpi[i]); 4814 reg_info->max_bw_6g_client[WMI_REG_INDOOR_AP][i] = 4815 le32_to_cpu(ev->max_bw_6g_client_lpi[i]); 4816 reg_info->min_bw_6g_client[WMI_REG_STD_POWER_AP][i] = 4817 le32_to_cpu(ev->min_bw_6g_client_sp[i]); 4818 reg_info->max_bw_6g_client[WMI_REG_STD_POWER_AP][i] = 4819 le32_to_cpu(ev->max_bw_6g_client_sp[i]); 4820 reg_info->min_bw_6g_client[WMI_REG_VLP_AP][i] = 4821 le32_to_cpu(ev->min_bw_6g_client_vlp[i]); 4822 reg_info->max_bw_6g_client[WMI_REG_VLP_AP][i] = 4823 le32_to_cpu(ev->max_bw_6g_client_vlp[i]); 4824 } 4825 4826 ath12k_dbg(ab, ATH12K_DBG_WMI, 4827 "%s:cc_ext %s dfs %d BW: min_2g %d max_2g %d min_5g %d max_5g %d phy_bitmap 0x%x", 4828 __func__, reg_info->alpha2, reg_info->dfs_region, 4829 reg_info->min_bw_2g, reg_info->max_bw_2g, 4830 reg_info->min_bw_5g, reg_info->max_bw_5g, 4831 reg_info->phybitmap); 4832 4833 ath12k_dbg(ab, ATH12K_DBG_WMI, 4834 "num_2g_reg_rules %d num_5g_reg_rules %d", 4835 num_2g_reg_rules, num_5g_reg_rules); 4836 4837 ath12k_dbg(ab, ATH12K_DBG_WMI, 4838 "num_6g_reg_rules_ap_lpi: %d num_6g_reg_rules_ap_sp: %d num_6g_reg_rules_ap_vlp: %d", 4839 num_6g_reg_rules_ap[WMI_REG_INDOOR_AP], 4840 num_6g_reg_rules_ap[WMI_REG_STD_POWER_AP], 4841 num_6g_reg_rules_ap[WMI_REG_VLP_AP]); 4842 4843 ath12k_dbg(ab, ATH12K_DBG_WMI, 4844 "6g Regular client: num_6g_reg_rules_lpi: %d num_6g_reg_rules_sp: %d num_6g_reg_rules_vlp: %d", 4845 num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][WMI_REG_DEFAULT_CLIENT], 4846 num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][WMI_REG_DEFAULT_CLIENT], 4847 num_6g_reg_rules_cl[WMI_REG_VLP_AP][WMI_REG_DEFAULT_CLIENT]); 4848 4849 ath12k_dbg(ab, ATH12K_DBG_WMI, 4850 "6g Subordinate client: num_6g_reg_rules_lpi: %d num_6g_reg_rules_sp: %d num_6g_reg_rules_vlp: %d", 4851 num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][WMI_REG_SUBORDINATE_CLIENT], 4852 num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][WMI_REG_SUBORDINATE_CLIENT], 4853 num_6g_reg_rules_cl[WMI_REG_VLP_AP][WMI_REG_SUBORDINATE_CLIENT]); 4854 4855 ext_wmi_reg_rule = 4856 (struct ath12k_wmi_reg_rule_ext_params *)((u8 *)ev 4857 + sizeof(*ev) 4858 + sizeof(struct wmi_tlv)); 4859 4860 if (num_2g_reg_rules) { 4861 reg_info->reg_rules_2g_ptr = 4862 create_ext_reg_rules_from_wmi(num_2g_reg_rules, 4863 ext_wmi_reg_rule); 4864 4865 if (!reg_info->reg_rules_2g_ptr) { 4866 kfree(tb); 4867 ath12k_warn(ab, "Unable to Allocate memory for 2g rules\n"); 4868 return -ENOMEM; 4869 } 4870 } 4871 4872 if (num_5g_reg_rules) { 4873 ext_wmi_reg_rule += num_2g_reg_rules; 4874 reg_info->reg_rules_5g_ptr = 4875 create_ext_reg_rules_from_wmi(num_5g_reg_rules, 4876 ext_wmi_reg_rule); 4877 4878 if (!reg_info->reg_rules_5g_ptr) { 4879 kfree(tb); 4880 ath12k_warn(ab, "Unable to Allocate memory for 5g rules\n"); 4881 return -ENOMEM; 4882 } 4883 } 4884 4885 ext_wmi_reg_rule += num_5g_reg_rules; 4886 4887 for (i = 0; i < WMI_REG_CURRENT_MAX_AP_TYPE; i++) { 4888 reg_info->reg_rules_6g_ap_ptr[i] = 4889 create_ext_reg_rules_from_wmi(num_6g_reg_rules_ap[i], 4890 ext_wmi_reg_rule); 4891 4892 if (!reg_info->reg_rules_6g_ap_ptr[i]) { 4893 kfree(tb); 4894 ath12k_warn(ab, "Unable to Allocate memory for 6g ap rules\n"); 4895 return -ENOMEM; 4896 } 4897 4898 ext_wmi_reg_rule += num_6g_reg_rules_ap[i]; 4899 } 4900 4901 for (j = 0; j < WMI_REG_CURRENT_MAX_AP_TYPE; j++) { 4902 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) { 4903 reg_info->reg_rules_6g_client_ptr[j][i] = 4904 create_ext_reg_rules_from_wmi(num_6g_reg_rules_cl[j][i], 4905 ext_wmi_reg_rule); 4906 4907 if (!reg_info->reg_rules_6g_client_ptr[j][i]) { 4908 kfree(tb); 4909 ath12k_warn(ab, "Unable to Allocate memory for 6g client rules\n"); 4910 return -ENOMEM; 4911 } 4912 4913 ext_wmi_reg_rule += num_6g_reg_rules_cl[j][i]; 4914 } 4915 } 4916 4917 reg_info->client_type = le32_to_cpu(ev->client_type); 4918 reg_info->rnr_tpe_usable = ev->rnr_tpe_usable; 4919 reg_info->unspecified_ap_usable = ev->unspecified_ap_usable; 4920 reg_info->domain_code_6g_ap[WMI_REG_INDOOR_AP] = 4921 le32_to_cpu(ev->domain_code_6g_ap_lpi); 4922 reg_info->domain_code_6g_ap[WMI_REG_STD_POWER_AP] = 4923 le32_to_cpu(ev->domain_code_6g_ap_sp); 4924 reg_info->domain_code_6g_ap[WMI_REG_VLP_AP] = 4925 le32_to_cpu(ev->domain_code_6g_ap_vlp); 4926 4927 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) { 4928 reg_info->domain_code_6g_client[WMI_REG_INDOOR_AP][i] = 4929 le32_to_cpu(ev->domain_code_6g_client_lpi[i]); 4930 reg_info->domain_code_6g_client[WMI_REG_STD_POWER_AP][i] = 4931 le32_to_cpu(ev->domain_code_6g_client_sp[i]); 4932 reg_info->domain_code_6g_client[WMI_REG_VLP_AP][i] = 4933 le32_to_cpu(ev->domain_code_6g_client_vlp[i]); 4934 } 4935 4936 reg_info->domain_code_6g_super_id = le32_to_cpu(ev->domain_code_6g_super_id); 4937 4938 ath12k_dbg(ab, ATH12K_DBG_WMI, "6g client_type: %d domain_code_6g_super_id: %d", 4939 reg_info->client_type, reg_info->domain_code_6g_super_id); 4940 4941 ath12k_dbg(ab, ATH12K_DBG_WMI, "processed regulatory ext channel list\n"); 4942 4943 kfree(tb); 4944 return 0; 4945 } 4946 4947 static int ath12k_pull_peer_del_resp_ev(struct ath12k_base *ab, struct sk_buff *skb, 4948 struct wmi_peer_delete_resp_event *peer_del_resp) 4949 { 4950 const void **tb; 4951 const struct wmi_peer_delete_resp_event *ev; 4952 int ret; 4953 4954 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 4955 if (IS_ERR(tb)) { 4956 ret = PTR_ERR(tb); 4957 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 4958 return ret; 4959 } 4960 4961 ev = tb[WMI_TAG_PEER_DELETE_RESP_EVENT]; 4962 if (!ev) { 4963 ath12k_warn(ab, "failed to fetch peer delete resp ev"); 4964 kfree(tb); 4965 return -EPROTO; 4966 } 4967 4968 memset(peer_del_resp, 0, sizeof(*peer_del_resp)); 4969 4970 peer_del_resp->vdev_id = ev->vdev_id; 4971 ether_addr_copy(peer_del_resp->peer_macaddr.addr, 4972 ev->peer_macaddr.addr); 4973 4974 kfree(tb); 4975 return 0; 4976 } 4977 4978 static int ath12k_pull_vdev_del_resp_ev(struct ath12k_base *ab, 4979 struct sk_buff *skb, 4980 u32 *vdev_id) 4981 { 4982 const void **tb; 4983 const struct wmi_vdev_delete_resp_event *ev; 4984 int ret; 4985 4986 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 4987 if (IS_ERR(tb)) { 4988 ret = PTR_ERR(tb); 4989 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 4990 return ret; 4991 } 4992 4993 ev = tb[WMI_TAG_VDEV_DELETE_RESP_EVENT]; 4994 if (!ev) { 4995 ath12k_warn(ab, "failed to fetch vdev delete resp ev"); 4996 kfree(tb); 4997 return -EPROTO; 4998 } 4999 5000 *vdev_id = le32_to_cpu(ev->vdev_id); 5001 5002 kfree(tb); 5003 return 0; 5004 } 5005 5006 static int ath12k_pull_bcn_tx_status_ev(struct ath12k_base *ab, 5007 struct sk_buff *skb, 5008 u32 *vdev_id, u32 *tx_status) 5009 { 5010 const void **tb; 5011 const struct wmi_bcn_tx_status_event *ev; 5012 int ret; 5013 5014 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 5015 if (IS_ERR(tb)) { 5016 ret = PTR_ERR(tb); 5017 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5018 return ret; 5019 } 5020 5021 ev = tb[WMI_TAG_OFFLOAD_BCN_TX_STATUS_EVENT]; 5022 if (!ev) { 5023 ath12k_warn(ab, "failed to fetch bcn tx status ev"); 5024 kfree(tb); 5025 return -EPROTO; 5026 } 5027 5028 *vdev_id = le32_to_cpu(ev->vdev_id); 5029 *tx_status = le32_to_cpu(ev->tx_status); 5030 5031 kfree(tb); 5032 return 0; 5033 } 5034 5035 static int ath12k_pull_vdev_stopped_param_tlv(struct ath12k_base *ab, struct sk_buff *skb, 5036 u32 *vdev_id) 5037 { 5038 const void **tb; 5039 const struct wmi_vdev_stopped_event *ev; 5040 int ret; 5041 5042 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 5043 if (IS_ERR(tb)) { 5044 ret = PTR_ERR(tb); 5045 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5046 return ret; 5047 } 5048 5049 ev = tb[WMI_TAG_VDEV_STOPPED_EVENT]; 5050 if (!ev) { 5051 ath12k_warn(ab, "failed to fetch vdev stop ev"); 5052 kfree(tb); 5053 return -EPROTO; 5054 } 5055 5056 *vdev_id = le32_to_cpu(ev->vdev_id); 5057 5058 kfree(tb); 5059 return 0; 5060 } 5061 5062 static int ath12k_wmi_tlv_mgmt_rx_parse(struct ath12k_base *ab, 5063 u16 tag, u16 len, 5064 const void *ptr, void *data) 5065 { 5066 struct wmi_tlv_mgmt_rx_parse *parse = data; 5067 5068 switch (tag) { 5069 case WMI_TAG_MGMT_RX_HDR: 5070 parse->fixed = ptr; 5071 break; 5072 case WMI_TAG_ARRAY_BYTE: 5073 if (!parse->frame_buf_done) { 5074 parse->frame_buf = ptr; 5075 parse->frame_buf_done = true; 5076 } 5077 break; 5078 } 5079 return 0; 5080 } 5081 5082 static int ath12k_pull_mgmt_rx_params_tlv(struct ath12k_base *ab, 5083 struct sk_buff *skb, 5084 struct ath12k_wmi_mgmt_rx_arg *hdr) 5085 { 5086 struct wmi_tlv_mgmt_rx_parse parse = { }; 5087 const struct ath12k_wmi_mgmt_rx_params *ev; 5088 const u8 *frame; 5089 int i, ret; 5090 5091 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 5092 ath12k_wmi_tlv_mgmt_rx_parse, 5093 &parse); 5094 if (ret) { 5095 ath12k_warn(ab, "failed to parse mgmt rx tlv %d\n", ret); 5096 return ret; 5097 } 5098 5099 ev = parse.fixed; 5100 frame = parse.frame_buf; 5101 5102 if (!ev || !frame) { 5103 ath12k_warn(ab, "failed to fetch mgmt rx hdr"); 5104 return -EPROTO; 5105 } 5106 5107 hdr->pdev_id = le32_to_cpu(ev->pdev_id); 5108 hdr->chan_freq = le32_to_cpu(ev->chan_freq); 5109 hdr->channel = le32_to_cpu(ev->channel); 5110 hdr->snr = le32_to_cpu(ev->snr); 5111 hdr->rate = le32_to_cpu(ev->rate); 5112 hdr->phy_mode = le32_to_cpu(ev->phy_mode); 5113 hdr->buf_len = le32_to_cpu(ev->buf_len); 5114 hdr->status = le32_to_cpu(ev->status); 5115 hdr->flags = le32_to_cpu(ev->flags); 5116 hdr->rssi = a_sle32_to_cpu(ev->rssi); 5117 hdr->tsf_delta = le32_to_cpu(ev->tsf_delta); 5118 5119 for (i = 0; i < ATH_MAX_ANTENNA; i++) 5120 hdr->rssi_ctl[i] = le32_to_cpu(ev->rssi_ctl[i]); 5121 5122 if (skb->len < (frame - skb->data) + hdr->buf_len) { 5123 ath12k_warn(ab, "invalid length in mgmt rx hdr ev"); 5124 return -EPROTO; 5125 } 5126 5127 /* shift the sk_buff to point to `frame` */ 5128 skb_trim(skb, 0); 5129 skb_put(skb, frame - skb->data); 5130 skb_pull(skb, frame - skb->data); 5131 skb_put(skb, hdr->buf_len); 5132 5133 return 0; 5134 } 5135 5136 static int wmi_process_mgmt_tx_comp(struct ath12k *ar, u32 desc_id, 5137 u32 status) 5138 { 5139 struct sk_buff *msdu; 5140 struct ieee80211_tx_info *info; 5141 struct ath12k_skb_cb *skb_cb; 5142 int num_mgmt; 5143 5144 spin_lock_bh(&ar->txmgmt_idr_lock); 5145 msdu = idr_find(&ar->txmgmt_idr, desc_id); 5146 5147 if (!msdu) { 5148 ath12k_warn(ar->ab, "received mgmt tx compl for invalid msdu_id: %d\n", 5149 desc_id); 5150 spin_unlock_bh(&ar->txmgmt_idr_lock); 5151 return -ENOENT; 5152 } 5153 5154 idr_remove(&ar->txmgmt_idr, desc_id); 5155 spin_unlock_bh(&ar->txmgmt_idr_lock); 5156 5157 skb_cb = ATH12K_SKB_CB(msdu); 5158 dma_unmap_single(ar->ab->dev, skb_cb->paddr, msdu->len, DMA_TO_DEVICE); 5159 5160 info = IEEE80211_SKB_CB(msdu); 5161 if ((!(info->flags & IEEE80211_TX_CTL_NO_ACK)) && !status) 5162 info->flags |= IEEE80211_TX_STAT_ACK; 5163 5164 ieee80211_tx_status_irqsafe(ath12k_ar_to_hw(ar), msdu); 5165 5166 num_mgmt = atomic_dec_if_positive(&ar->num_pending_mgmt_tx); 5167 5168 /* WARN when we received this event without doing any mgmt tx */ 5169 if (num_mgmt < 0) 5170 WARN_ON_ONCE(1); 5171 5172 if (!num_mgmt) 5173 wake_up(&ar->txmgmt_empty_waitq); 5174 5175 return 0; 5176 } 5177 5178 static int ath12k_pull_mgmt_tx_compl_param_tlv(struct ath12k_base *ab, 5179 struct sk_buff *skb, 5180 struct wmi_mgmt_tx_compl_event *param) 5181 { 5182 const void **tb; 5183 const struct wmi_mgmt_tx_compl_event *ev; 5184 int ret; 5185 5186 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 5187 if (IS_ERR(tb)) { 5188 ret = PTR_ERR(tb); 5189 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5190 return ret; 5191 } 5192 5193 ev = tb[WMI_TAG_MGMT_TX_COMPL_EVENT]; 5194 if (!ev) { 5195 ath12k_warn(ab, "failed to fetch mgmt tx compl ev"); 5196 kfree(tb); 5197 return -EPROTO; 5198 } 5199 5200 param->pdev_id = ev->pdev_id; 5201 param->desc_id = ev->desc_id; 5202 param->status = ev->status; 5203 5204 kfree(tb); 5205 return 0; 5206 } 5207 5208 static void ath12k_wmi_event_scan_started(struct ath12k *ar) 5209 { 5210 lockdep_assert_held(&ar->data_lock); 5211 5212 switch (ar->scan.state) { 5213 case ATH12K_SCAN_IDLE: 5214 case ATH12K_SCAN_RUNNING: 5215 case ATH12K_SCAN_ABORTING: 5216 ath12k_warn(ar->ab, "received scan started event in an invalid scan state: %s (%d)\n", 5217 ath12k_scan_state_str(ar->scan.state), 5218 ar->scan.state); 5219 break; 5220 case ATH12K_SCAN_STARTING: 5221 ar->scan.state = ATH12K_SCAN_RUNNING; 5222 5223 if (ar->scan.is_roc) 5224 ieee80211_ready_on_channel(ath12k_ar_to_hw(ar)); 5225 5226 complete(&ar->scan.started); 5227 break; 5228 } 5229 } 5230 5231 static void ath12k_wmi_event_scan_start_failed(struct ath12k *ar) 5232 { 5233 lockdep_assert_held(&ar->data_lock); 5234 5235 switch (ar->scan.state) { 5236 case ATH12K_SCAN_IDLE: 5237 case ATH12K_SCAN_RUNNING: 5238 case ATH12K_SCAN_ABORTING: 5239 ath12k_warn(ar->ab, "received scan start failed event in an invalid scan state: %s (%d)\n", 5240 ath12k_scan_state_str(ar->scan.state), 5241 ar->scan.state); 5242 break; 5243 case ATH12K_SCAN_STARTING: 5244 complete(&ar->scan.started); 5245 __ath12k_mac_scan_finish(ar); 5246 break; 5247 } 5248 } 5249 5250 static void ath12k_wmi_event_scan_completed(struct ath12k *ar) 5251 { 5252 lockdep_assert_held(&ar->data_lock); 5253 5254 switch (ar->scan.state) { 5255 case ATH12K_SCAN_IDLE: 5256 case ATH12K_SCAN_STARTING: 5257 /* One suspected reason scan can be completed while starting is 5258 * if firmware fails to deliver all scan events to the host, 5259 * e.g. when transport pipe is full. This has been observed 5260 * with spectral scan phyerr events starving wmi transport 5261 * pipe. In such case the "scan completed" event should be (and 5262 * is) ignored by the host as it may be just firmware's scan 5263 * state machine recovering. 5264 */ 5265 ath12k_warn(ar->ab, "received scan completed event in an invalid scan state: %s (%d)\n", 5266 ath12k_scan_state_str(ar->scan.state), 5267 ar->scan.state); 5268 break; 5269 case ATH12K_SCAN_RUNNING: 5270 case ATH12K_SCAN_ABORTING: 5271 __ath12k_mac_scan_finish(ar); 5272 break; 5273 } 5274 } 5275 5276 static void ath12k_wmi_event_scan_bss_chan(struct ath12k *ar) 5277 { 5278 lockdep_assert_held(&ar->data_lock); 5279 5280 switch (ar->scan.state) { 5281 case ATH12K_SCAN_IDLE: 5282 case ATH12K_SCAN_STARTING: 5283 ath12k_warn(ar->ab, "received scan bss chan event in an invalid scan state: %s (%d)\n", 5284 ath12k_scan_state_str(ar->scan.state), 5285 ar->scan.state); 5286 break; 5287 case ATH12K_SCAN_RUNNING: 5288 case ATH12K_SCAN_ABORTING: 5289 ar->scan_channel = NULL; 5290 break; 5291 } 5292 } 5293 5294 static void ath12k_wmi_event_scan_foreign_chan(struct ath12k *ar, u32 freq) 5295 { 5296 struct ieee80211_hw *hw = ath12k_ar_to_hw(ar); 5297 5298 lockdep_assert_held(&ar->data_lock); 5299 5300 switch (ar->scan.state) { 5301 case ATH12K_SCAN_IDLE: 5302 case ATH12K_SCAN_STARTING: 5303 ath12k_warn(ar->ab, "received scan foreign chan event in an invalid scan state: %s (%d)\n", 5304 ath12k_scan_state_str(ar->scan.state), 5305 ar->scan.state); 5306 break; 5307 case ATH12K_SCAN_RUNNING: 5308 case ATH12K_SCAN_ABORTING: 5309 ar->scan_channel = ieee80211_get_channel(hw->wiphy, freq); 5310 5311 if (ar->scan.is_roc && ar->scan.roc_freq == freq) 5312 complete(&ar->scan.on_channel); 5313 5314 break; 5315 } 5316 } 5317 5318 static const char * 5319 ath12k_wmi_event_scan_type_str(enum wmi_scan_event_type type, 5320 enum wmi_scan_completion_reason reason) 5321 { 5322 switch (type) { 5323 case WMI_SCAN_EVENT_STARTED: 5324 return "started"; 5325 case WMI_SCAN_EVENT_COMPLETED: 5326 switch (reason) { 5327 case WMI_SCAN_REASON_COMPLETED: 5328 return "completed"; 5329 case WMI_SCAN_REASON_CANCELLED: 5330 return "completed [cancelled]"; 5331 case WMI_SCAN_REASON_PREEMPTED: 5332 return "completed [preempted]"; 5333 case WMI_SCAN_REASON_TIMEDOUT: 5334 return "completed [timedout]"; 5335 case WMI_SCAN_REASON_INTERNAL_FAILURE: 5336 return "completed [internal err]"; 5337 case WMI_SCAN_REASON_MAX: 5338 break; 5339 } 5340 return "completed [unknown]"; 5341 case WMI_SCAN_EVENT_BSS_CHANNEL: 5342 return "bss channel"; 5343 case WMI_SCAN_EVENT_FOREIGN_CHAN: 5344 return "foreign channel"; 5345 case WMI_SCAN_EVENT_DEQUEUED: 5346 return "dequeued"; 5347 case WMI_SCAN_EVENT_PREEMPTED: 5348 return "preempted"; 5349 case WMI_SCAN_EVENT_START_FAILED: 5350 return "start failed"; 5351 case WMI_SCAN_EVENT_RESTARTED: 5352 return "restarted"; 5353 case WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT: 5354 return "foreign channel exit"; 5355 default: 5356 return "unknown"; 5357 } 5358 } 5359 5360 static int ath12k_pull_scan_ev(struct ath12k_base *ab, struct sk_buff *skb, 5361 struct wmi_scan_event *scan_evt_param) 5362 { 5363 const void **tb; 5364 const struct wmi_scan_event *ev; 5365 int ret; 5366 5367 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 5368 if (IS_ERR(tb)) { 5369 ret = PTR_ERR(tb); 5370 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5371 return ret; 5372 } 5373 5374 ev = tb[WMI_TAG_SCAN_EVENT]; 5375 if (!ev) { 5376 ath12k_warn(ab, "failed to fetch scan ev"); 5377 kfree(tb); 5378 return -EPROTO; 5379 } 5380 5381 scan_evt_param->event_type = ev->event_type; 5382 scan_evt_param->reason = ev->reason; 5383 scan_evt_param->channel_freq = ev->channel_freq; 5384 scan_evt_param->scan_req_id = ev->scan_req_id; 5385 scan_evt_param->scan_id = ev->scan_id; 5386 scan_evt_param->vdev_id = ev->vdev_id; 5387 scan_evt_param->tsf_timestamp = ev->tsf_timestamp; 5388 5389 kfree(tb); 5390 return 0; 5391 } 5392 5393 static int ath12k_pull_peer_sta_kickout_ev(struct ath12k_base *ab, struct sk_buff *skb, 5394 struct wmi_peer_sta_kickout_arg *arg) 5395 { 5396 const void **tb; 5397 const struct wmi_peer_sta_kickout_event *ev; 5398 int ret; 5399 5400 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 5401 if (IS_ERR(tb)) { 5402 ret = PTR_ERR(tb); 5403 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5404 return ret; 5405 } 5406 5407 ev = tb[WMI_TAG_PEER_STA_KICKOUT_EVENT]; 5408 if (!ev) { 5409 ath12k_warn(ab, "failed to fetch peer sta kickout ev"); 5410 kfree(tb); 5411 return -EPROTO; 5412 } 5413 5414 arg->mac_addr = ev->peer_macaddr.addr; 5415 5416 kfree(tb); 5417 return 0; 5418 } 5419 5420 static int ath12k_pull_roam_ev(struct ath12k_base *ab, struct sk_buff *skb, 5421 struct wmi_roam_event *roam_ev) 5422 { 5423 const void **tb; 5424 const struct wmi_roam_event *ev; 5425 int ret; 5426 5427 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 5428 if (IS_ERR(tb)) { 5429 ret = PTR_ERR(tb); 5430 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5431 return ret; 5432 } 5433 5434 ev = tb[WMI_TAG_ROAM_EVENT]; 5435 if (!ev) { 5436 ath12k_warn(ab, "failed to fetch roam ev"); 5437 kfree(tb); 5438 return -EPROTO; 5439 } 5440 5441 roam_ev->vdev_id = ev->vdev_id; 5442 roam_ev->reason = ev->reason; 5443 roam_ev->rssi = ev->rssi; 5444 5445 kfree(tb); 5446 return 0; 5447 } 5448 5449 static int freq_to_idx(struct ath12k *ar, int freq) 5450 { 5451 struct ieee80211_supported_band *sband; 5452 struct ieee80211_hw *hw = ath12k_ar_to_hw(ar); 5453 int band, ch, idx = 0; 5454 5455 for (band = NL80211_BAND_2GHZ; band < NUM_NL80211_BANDS; band++) { 5456 if (!ar->mac.sbands[band].channels) 5457 continue; 5458 5459 sband = hw->wiphy->bands[band]; 5460 if (!sband) 5461 continue; 5462 5463 for (ch = 0; ch < sband->n_channels; ch++, idx++) 5464 if (sband->channels[ch].center_freq == freq) 5465 goto exit; 5466 } 5467 5468 exit: 5469 return idx; 5470 } 5471 5472 static int ath12k_pull_chan_info_ev(struct ath12k_base *ab, struct sk_buff *skb, 5473 struct wmi_chan_info_event *ch_info_ev) 5474 { 5475 const void **tb; 5476 const struct wmi_chan_info_event *ev; 5477 int ret; 5478 5479 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 5480 if (IS_ERR(tb)) { 5481 ret = PTR_ERR(tb); 5482 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5483 return ret; 5484 } 5485 5486 ev = tb[WMI_TAG_CHAN_INFO_EVENT]; 5487 if (!ev) { 5488 ath12k_warn(ab, "failed to fetch chan info ev"); 5489 kfree(tb); 5490 return -EPROTO; 5491 } 5492 5493 ch_info_ev->err_code = ev->err_code; 5494 ch_info_ev->freq = ev->freq; 5495 ch_info_ev->cmd_flags = ev->cmd_flags; 5496 ch_info_ev->noise_floor = ev->noise_floor; 5497 ch_info_ev->rx_clear_count = ev->rx_clear_count; 5498 ch_info_ev->cycle_count = ev->cycle_count; 5499 ch_info_ev->chan_tx_pwr_range = ev->chan_tx_pwr_range; 5500 ch_info_ev->chan_tx_pwr_tp = ev->chan_tx_pwr_tp; 5501 ch_info_ev->rx_frame_count = ev->rx_frame_count; 5502 ch_info_ev->tx_frame_cnt = ev->tx_frame_cnt; 5503 ch_info_ev->mac_clk_mhz = ev->mac_clk_mhz; 5504 ch_info_ev->vdev_id = ev->vdev_id; 5505 5506 kfree(tb); 5507 return 0; 5508 } 5509 5510 static int 5511 ath12k_pull_pdev_bss_chan_info_ev(struct ath12k_base *ab, struct sk_buff *skb, 5512 struct wmi_pdev_bss_chan_info_event *bss_ch_info_ev) 5513 { 5514 const void **tb; 5515 const struct wmi_pdev_bss_chan_info_event *ev; 5516 int ret; 5517 5518 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 5519 if (IS_ERR(tb)) { 5520 ret = PTR_ERR(tb); 5521 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5522 return ret; 5523 } 5524 5525 ev = tb[WMI_TAG_PDEV_BSS_CHAN_INFO_EVENT]; 5526 if (!ev) { 5527 ath12k_warn(ab, "failed to fetch pdev bss chan info ev"); 5528 kfree(tb); 5529 return -EPROTO; 5530 } 5531 5532 bss_ch_info_ev->pdev_id = ev->pdev_id; 5533 bss_ch_info_ev->freq = ev->freq; 5534 bss_ch_info_ev->noise_floor = ev->noise_floor; 5535 bss_ch_info_ev->rx_clear_count_low = ev->rx_clear_count_low; 5536 bss_ch_info_ev->rx_clear_count_high = ev->rx_clear_count_high; 5537 bss_ch_info_ev->cycle_count_low = ev->cycle_count_low; 5538 bss_ch_info_ev->cycle_count_high = ev->cycle_count_high; 5539 bss_ch_info_ev->tx_cycle_count_low = ev->tx_cycle_count_low; 5540 bss_ch_info_ev->tx_cycle_count_high = ev->tx_cycle_count_high; 5541 bss_ch_info_ev->rx_cycle_count_low = ev->rx_cycle_count_low; 5542 bss_ch_info_ev->rx_cycle_count_high = ev->rx_cycle_count_high; 5543 bss_ch_info_ev->rx_bss_cycle_count_low = ev->rx_bss_cycle_count_low; 5544 bss_ch_info_ev->rx_bss_cycle_count_high = ev->rx_bss_cycle_count_high; 5545 5546 kfree(tb); 5547 return 0; 5548 } 5549 5550 static int 5551 ath12k_pull_vdev_install_key_compl_ev(struct ath12k_base *ab, struct sk_buff *skb, 5552 struct wmi_vdev_install_key_complete_arg *arg) 5553 { 5554 const void **tb; 5555 const struct wmi_vdev_install_key_compl_event *ev; 5556 int ret; 5557 5558 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 5559 if (IS_ERR(tb)) { 5560 ret = PTR_ERR(tb); 5561 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5562 return ret; 5563 } 5564 5565 ev = tb[WMI_TAG_VDEV_INSTALL_KEY_COMPLETE_EVENT]; 5566 if (!ev) { 5567 ath12k_warn(ab, "failed to fetch vdev install key compl ev"); 5568 kfree(tb); 5569 return -EPROTO; 5570 } 5571 5572 arg->vdev_id = le32_to_cpu(ev->vdev_id); 5573 arg->macaddr = ev->peer_macaddr.addr; 5574 arg->key_idx = le32_to_cpu(ev->key_idx); 5575 arg->key_flags = le32_to_cpu(ev->key_flags); 5576 arg->status = le32_to_cpu(ev->status); 5577 5578 kfree(tb); 5579 return 0; 5580 } 5581 5582 static int ath12k_pull_peer_assoc_conf_ev(struct ath12k_base *ab, struct sk_buff *skb, 5583 struct wmi_peer_assoc_conf_arg *peer_assoc_conf) 5584 { 5585 const void **tb; 5586 const struct wmi_peer_assoc_conf_event *ev; 5587 int ret; 5588 5589 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 5590 if (IS_ERR(tb)) { 5591 ret = PTR_ERR(tb); 5592 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5593 return ret; 5594 } 5595 5596 ev = tb[WMI_TAG_PEER_ASSOC_CONF_EVENT]; 5597 if (!ev) { 5598 ath12k_warn(ab, "failed to fetch peer assoc conf ev"); 5599 kfree(tb); 5600 return -EPROTO; 5601 } 5602 5603 peer_assoc_conf->vdev_id = le32_to_cpu(ev->vdev_id); 5604 peer_assoc_conf->macaddr = ev->peer_macaddr.addr; 5605 5606 kfree(tb); 5607 return 0; 5608 } 5609 5610 static int 5611 ath12k_pull_pdev_temp_ev(struct ath12k_base *ab, struct sk_buff *skb, 5612 const struct wmi_pdev_temperature_event *ev) 5613 { 5614 const void **tb; 5615 int ret; 5616 5617 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 5618 if (IS_ERR(tb)) { 5619 ret = PTR_ERR(tb); 5620 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5621 return ret; 5622 } 5623 5624 ev = tb[WMI_TAG_PDEV_TEMPERATURE_EVENT]; 5625 if (!ev) { 5626 ath12k_warn(ab, "failed to fetch pdev temp ev"); 5627 kfree(tb); 5628 return -EPROTO; 5629 } 5630 5631 kfree(tb); 5632 return 0; 5633 } 5634 5635 static void ath12k_wmi_op_ep_tx_credits(struct ath12k_base *ab) 5636 { 5637 /* try to send pending beacons first. they take priority */ 5638 wake_up(&ab->wmi_ab.tx_credits_wq); 5639 } 5640 5641 static void ath12k_wmi_htc_tx_complete(struct ath12k_base *ab, 5642 struct sk_buff *skb) 5643 { 5644 dev_kfree_skb(skb); 5645 } 5646 5647 static bool ath12k_reg_is_world_alpha(char *alpha) 5648 { 5649 if (alpha[0] == '0' && alpha[1] == '0') 5650 return true; 5651 5652 if (alpha[0] == 'n' && alpha[1] == 'a') 5653 return true; 5654 5655 return false; 5656 } 5657 5658 static int ath12k_reg_chan_list_event(struct ath12k_base *ab, struct sk_buff *skb) 5659 { 5660 struct ath12k_reg_info *reg_info = NULL; 5661 struct ieee80211_regdomain *regd = NULL; 5662 bool intersect = false; 5663 int ret = 0, pdev_idx, i, j; 5664 struct ath12k *ar; 5665 5666 reg_info = kzalloc(sizeof(*reg_info), GFP_ATOMIC); 5667 if (!reg_info) { 5668 ret = -ENOMEM; 5669 goto fallback; 5670 } 5671 5672 ret = ath12k_pull_reg_chan_list_ext_update_ev(ab, skb, reg_info); 5673 5674 if (ret) { 5675 ath12k_warn(ab, "failed to extract regulatory info from received event\n"); 5676 goto fallback; 5677 } 5678 5679 if (reg_info->status_code != REG_SET_CC_STATUS_PASS) { 5680 /* In case of failure to set the requested ctry, 5681 * fw retains the current regd. We print a failure info 5682 * and return from here. 5683 */ 5684 ath12k_warn(ab, "Failed to set the requested Country regulatory setting\n"); 5685 goto mem_free; 5686 } 5687 5688 pdev_idx = reg_info->phy_id; 5689 5690 if (pdev_idx >= ab->num_radios) { 5691 /* Process the event for phy0 only if single_pdev_only 5692 * is true. If pdev_idx is valid but not 0, discard the 5693 * event. Otherwise, it goes to fallback. 5694 */ 5695 if (ab->hw_params->single_pdev_only && 5696 pdev_idx < ab->hw_params->num_rxmda_per_pdev) 5697 goto mem_free; 5698 else 5699 goto fallback; 5700 } 5701 5702 /* Avoid multiple overwrites to default regd, during core 5703 * stop-start after mac registration. 5704 */ 5705 if (ab->default_regd[pdev_idx] && !ab->new_regd[pdev_idx] && 5706 !memcmp(ab->default_regd[pdev_idx]->alpha2, 5707 reg_info->alpha2, 2)) 5708 goto mem_free; 5709 5710 /* Intersect new rules with default regd if a new country setting was 5711 * requested, i.e a default regd was already set during initialization 5712 * and the regd coming from this event has a valid country info. 5713 */ 5714 if (ab->default_regd[pdev_idx] && 5715 !ath12k_reg_is_world_alpha((char *) 5716 ab->default_regd[pdev_idx]->alpha2) && 5717 !ath12k_reg_is_world_alpha((char *)reg_info->alpha2)) 5718 intersect = true; 5719 5720 regd = ath12k_reg_build_regd(ab, reg_info, intersect); 5721 if (!regd) { 5722 ath12k_warn(ab, "failed to build regd from reg_info\n"); 5723 goto fallback; 5724 } 5725 5726 spin_lock(&ab->base_lock); 5727 if (test_bit(ATH12K_FLAG_REGISTERED, &ab->dev_flags)) { 5728 /* Once mac is registered, ar is valid and all CC events from 5729 * fw is considered to be received due to user requests 5730 * currently. 5731 * Free previously built regd before assigning the newly 5732 * generated regd to ar. NULL pointer handling will be 5733 * taken care by kfree itself. 5734 */ 5735 ar = ab->pdevs[pdev_idx].ar; 5736 kfree(ab->new_regd[pdev_idx]); 5737 ab->new_regd[pdev_idx] = regd; 5738 queue_work(ab->workqueue, &ar->regd_update_work); 5739 } else { 5740 /* Multiple events for the same *ar is not expected. But we 5741 * can still clear any previously stored default_regd if we 5742 * are receiving this event for the same radio by mistake. 5743 * NULL pointer handling will be taken care by kfree itself. 5744 */ 5745 kfree(ab->default_regd[pdev_idx]); 5746 /* This regd would be applied during mac registration */ 5747 ab->default_regd[pdev_idx] = regd; 5748 } 5749 ab->dfs_region = reg_info->dfs_region; 5750 spin_unlock(&ab->base_lock); 5751 5752 goto mem_free; 5753 5754 fallback: 5755 /* Fallback to older reg (by sending previous country setting 5756 * again if fw has succeeded and we failed to process here. 5757 * The Regdomain should be uniform across driver and fw. Since the 5758 * FW has processed the command and sent a success status, we expect 5759 * this function to succeed as well. If it doesn't, CTRY needs to be 5760 * reverted at the fw and the old SCAN_CHAN_LIST cmd needs to be sent. 5761 */ 5762 /* TODO: This is rare, but still should also be handled */ 5763 WARN_ON(1); 5764 mem_free: 5765 if (reg_info) { 5766 kfree(reg_info->reg_rules_2g_ptr); 5767 kfree(reg_info->reg_rules_5g_ptr); 5768 if (reg_info->is_ext_reg_event) { 5769 for (i = 0; i < WMI_REG_CURRENT_MAX_AP_TYPE; i++) 5770 kfree(reg_info->reg_rules_6g_ap_ptr[i]); 5771 5772 for (j = 0; j < WMI_REG_CURRENT_MAX_AP_TYPE; j++) 5773 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) 5774 kfree(reg_info->reg_rules_6g_client_ptr[j][i]); 5775 } 5776 kfree(reg_info); 5777 } 5778 return ret; 5779 } 5780 5781 static int ath12k_wmi_rdy_parse(struct ath12k_base *ab, u16 tag, u16 len, 5782 const void *ptr, void *data) 5783 { 5784 struct ath12k_wmi_rdy_parse *rdy_parse = data; 5785 struct wmi_ready_event fixed_param; 5786 struct ath12k_wmi_mac_addr_params *addr_list; 5787 struct ath12k_pdev *pdev; 5788 u32 num_mac_addr; 5789 int i; 5790 5791 switch (tag) { 5792 case WMI_TAG_READY_EVENT: 5793 memset(&fixed_param, 0, sizeof(fixed_param)); 5794 memcpy(&fixed_param, (struct wmi_ready_event *)ptr, 5795 min_t(u16, sizeof(fixed_param), len)); 5796 ab->wlan_init_status = le32_to_cpu(fixed_param.ready_event_min.status); 5797 rdy_parse->num_extra_mac_addr = 5798 le32_to_cpu(fixed_param.ready_event_min.num_extra_mac_addr); 5799 5800 ether_addr_copy(ab->mac_addr, 5801 fixed_param.ready_event_min.mac_addr.addr); 5802 ab->pktlog_defs_checksum = le32_to_cpu(fixed_param.pktlog_defs_checksum); 5803 ab->wmi_ready = true; 5804 break; 5805 case WMI_TAG_ARRAY_FIXED_STRUCT: 5806 addr_list = (struct ath12k_wmi_mac_addr_params *)ptr; 5807 num_mac_addr = rdy_parse->num_extra_mac_addr; 5808 5809 if (!(ab->num_radios > 1 && num_mac_addr >= ab->num_radios)) 5810 break; 5811 5812 for (i = 0; i < ab->num_radios; i++) { 5813 pdev = &ab->pdevs[i]; 5814 ether_addr_copy(pdev->mac_addr, addr_list[i].addr); 5815 } 5816 ab->pdevs_macaddr_valid = true; 5817 break; 5818 default: 5819 break; 5820 } 5821 5822 return 0; 5823 } 5824 5825 static int ath12k_ready_event(struct ath12k_base *ab, struct sk_buff *skb) 5826 { 5827 struct ath12k_wmi_rdy_parse rdy_parse = { }; 5828 int ret; 5829 5830 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 5831 ath12k_wmi_rdy_parse, &rdy_parse); 5832 if (ret) { 5833 ath12k_warn(ab, "failed to parse tlv %d\n", ret); 5834 return ret; 5835 } 5836 5837 complete(&ab->wmi_ab.unified_ready); 5838 return 0; 5839 } 5840 5841 static void ath12k_peer_delete_resp_event(struct ath12k_base *ab, struct sk_buff *skb) 5842 { 5843 struct wmi_peer_delete_resp_event peer_del_resp; 5844 struct ath12k *ar; 5845 5846 if (ath12k_pull_peer_del_resp_ev(ab, skb, &peer_del_resp) != 0) { 5847 ath12k_warn(ab, "failed to extract peer delete resp"); 5848 return; 5849 } 5850 5851 rcu_read_lock(); 5852 ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(peer_del_resp.vdev_id)); 5853 if (!ar) { 5854 ath12k_warn(ab, "invalid vdev id in peer delete resp ev %d", 5855 peer_del_resp.vdev_id); 5856 rcu_read_unlock(); 5857 return; 5858 } 5859 5860 complete(&ar->peer_delete_done); 5861 rcu_read_unlock(); 5862 ath12k_dbg(ab, ATH12K_DBG_WMI, "peer delete resp for vdev id %d addr %pM\n", 5863 peer_del_resp.vdev_id, peer_del_resp.peer_macaddr.addr); 5864 } 5865 5866 static void ath12k_vdev_delete_resp_event(struct ath12k_base *ab, 5867 struct sk_buff *skb) 5868 { 5869 struct ath12k *ar; 5870 u32 vdev_id = 0; 5871 5872 if (ath12k_pull_vdev_del_resp_ev(ab, skb, &vdev_id) != 0) { 5873 ath12k_warn(ab, "failed to extract vdev delete resp"); 5874 return; 5875 } 5876 5877 rcu_read_lock(); 5878 ar = ath12k_mac_get_ar_by_vdev_id(ab, vdev_id); 5879 if (!ar) { 5880 ath12k_warn(ab, "invalid vdev id in vdev delete resp ev %d", 5881 vdev_id); 5882 rcu_read_unlock(); 5883 return; 5884 } 5885 5886 complete(&ar->vdev_delete_done); 5887 5888 rcu_read_unlock(); 5889 5890 ath12k_dbg(ab, ATH12K_DBG_WMI, "vdev delete resp for vdev id %d\n", 5891 vdev_id); 5892 } 5893 5894 static const char *ath12k_wmi_vdev_resp_print(u32 vdev_resp_status) 5895 { 5896 switch (vdev_resp_status) { 5897 case WMI_VDEV_START_RESPONSE_INVALID_VDEVID: 5898 return "invalid vdev id"; 5899 case WMI_VDEV_START_RESPONSE_NOT_SUPPORTED: 5900 return "not supported"; 5901 case WMI_VDEV_START_RESPONSE_DFS_VIOLATION: 5902 return "dfs violation"; 5903 case WMI_VDEV_START_RESPONSE_INVALID_REGDOMAIN: 5904 return "invalid regdomain"; 5905 default: 5906 return "unknown"; 5907 } 5908 } 5909 5910 static void ath12k_vdev_start_resp_event(struct ath12k_base *ab, struct sk_buff *skb) 5911 { 5912 struct wmi_vdev_start_resp_event vdev_start_resp; 5913 struct ath12k *ar; 5914 u32 status; 5915 5916 if (ath12k_pull_vdev_start_resp_tlv(ab, skb, &vdev_start_resp) != 0) { 5917 ath12k_warn(ab, "failed to extract vdev start resp"); 5918 return; 5919 } 5920 5921 rcu_read_lock(); 5922 ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(vdev_start_resp.vdev_id)); 5923 if (!ar) { 5924 ath12k_warn(ab, "invalid vdev id in vdev start resp ev %d", 5925 vdev_start_resp.vdev_id); 5926 rcu_read_unlock(); 5927 return; 5928 } 5929 5930 ar->last_wmi_vdev_start_status = 0; 5931 5932 status = le32_to_cpu(vdev_start_resp.status); 5933 5934 if (WARN_ON_ONCE(status)) { 5935 ath12k_warn(ab, "vdev start resp error status %d (%s)\n", 5936 status, ath12k_wmi_vdev_resp_print(status)); 5937 ar->last_wmi_vdev_start_status = status; 5938 } 5939 5940 complete(&ar->vdev_setup_done); 5941 5942 rcu_read_unlock(); 5943 5944 ath12k_dbg(ab, ATH12K_DBG_WMI, "vdev start resp for vdev id %d", 5945 vdev_start_resp.vdev_id); 5946 } 5947 5948 static void ath12k_bcn_tx_status_event(struct ath12k_base *ab, struct sk_buff *skb) 5949 { 5950 u32 vdev_id, tx_status; 5951 5952 if (ath12k_pull_bcn_tx_status_ev(ab, skb, &vdev_id, &tx_status) != 0) { 5953 ath12k_warn(ab, "failed to extract bcn tx status"); 5954 return; 5955 } 5956 } 5957 5958 static void ath12k_vdev_stopped_event(struct ath12k_base *ab, struct sk_buff *skb) 5959 { 5960 struct ath12k *ar; 5961 u32 vdev_id = 0; 5962 5963 if (ath12k_pull_vdev_stopped_param_tlv(ab, skb, &vdev_id) != 0) { 5964 ath12k_warn(ab, "failed to extract vdev stopped event"); 5965 return; 5966 } 5967 5968 rcu_read_lock(); 5969 ar = ath12k_mac_get_ar_by_vdev_id(ab, vdev_id); 5970 if (!ar) { 5971 ath12k_warn(ab, "invalid vdev id in vdev stopped ev %d", 5972 vdev_id); 5973 rcu_read_unlock(); 5974 return; 5975 } 5976 5977 complete(&ar->vdev_setup_done); 5978 5979 rcu_read_unlock(); 5980 5981 ath12k_dbg(ab, ATH12K_DBG_WMI, "vdev stopped for vdev id %d", vdev_id); 5982 } 5983 5984 static void ath12k_mgmt_rx_event(struct ath12k_base *ab, struct sk_buff *skb) 5985 { 5986 struct ath12k_wmi_mgmt_rx_arg rx_ev = {0}; 5987 struct ath12k *ar; 5988 struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb); 5989 struct ieee80211_hdr *hdr; 5990 u16 fc; 5991 struct ieee80211_supported_band *sband; 5992 5993 if (ath12k_pull_mgmt_rx_params_tlv(ab, skb, &rx_ev) != 0) { 5994 ath12k_warn(ab, "failed to extract mgmt rx event"); 5995 dev_kfree_skb(skb); 5996 return; 5997 } 5998 5999 memset(status, 0, sizeof(*status)); 6000 6001 ath12k_dbg(ab, ATH12K_DBG_MGMT, "mgmt rx event status %08x\n", 6002 rx_ev.status); 6003 6004 rcu_read_lock(); 6005 ar = ath12k_mac_get_ar_by_pdev_id(ab, rx_ev.pdev_id); 6006 6007 if (!ar) { 6008 ath12k_warn(ab, "invalid pdev_id %d in mgmt_rx_event\n", 6009 rx_ev.pdev_id); 6010 dev_kfree_skb(skb); 6011 goto exit; 6012 } 6013 6014 if ((test_bit(ATH12K_CAC_RUNNING, &ar->dev_flags)) || 6015 (rx_ev.status & (WMI_RX_STATUS_ERR_DECRYPT | 6016 WMI_RX_STATUS_ERR_KEY_CACHE_MISS | 6017 WMI_RX_STATUS_ERR_CRC))) { 6018 dev_kfree_skb(skb); 6019 goto exit; 6020 } 6021 6022 if (rx_ev.status & WMI_RX_STATUS_ERR_MIC) 6023 status->flag |= RX_FLAG_MMIC_ERROR; 6024 6025 if (rx_ev.chan_freq >= ATH12K_MIN_6G_FREQ) { 6026 status->band = NL80211_BAND_6GHZ; 6027 } else if (rx_ev.channel >= 1 && rx_ev.channel <= 14) { 6028 status->band = NL80211_BAND_2GHZ; 6029 } else if (rx_ev.channel >= 36 && rx_ev.channel <= ATH12K_MAX_5G_CHAN) { 6030 status->band = NL80211_BAND_5GHZ; 6031 } else { 6032 /* Shouldn't happen unless list of advertised channels to 6033 * mac80211 has been changed. 6034 */ 6035 WARN_ON_ONCE(1); 6036 dev_kfree_skb(skb); 6037 goto exit; 6038 } 6039 6040 if (rx_ev.phy_mode == MODE_11B && 6041 (status->band == NL80211_BAND_5GHZ || status->band == NL80211_BAND_6GHZ)) 6042 ath12k_dbg(ab, ATH12K_DBG_WMI, 6043 "wmi mgmt rx 11b (CCK) on 5/6GHz, band = %d\n", status->band); 6044 6045 sband = &ar->mac.sbands[status->band]; 6046 6047 status->freq = ieee80211_channel_to_frequency(rx_ev.channel, 6048 status->band); 6049 status->signal = rx_ev.snr + ATH12K_DEFAULT_NOISE_FLOOR; 6050 status->rate_idx = ath12k_mac_bitrate_to_idx(sband, rx_ev.rate / 100); 6051 6052 hdr = (struct ieee80211_hdr *)skb->data; 6053 fc = le16_to_cpu(hdr->frame_control); 6054 6055 /* Firmware is guaranteed to report all essential management frames via 6056 * WMI while it can deliver some extra via HTT. Since there can be 6057 * duplicates split the reporting wrt monitor/sniffing. 6058 */ 6059 status->flag |= RX_FLAG_SKIP_MONITOR; 6060 6061 /* In case of PMF, FW delivers decrypted frames with Protected Bit set 6062 * including group privacy action frames. 6063 */ 6064 if (ieee80211_has_protected(hdr->frame_control)) { 6065 status->flag |= RX_FLAG_DECRYPTED; 6066 6067 if (!ieee80211_is_robust_mgmt_frame(skb)) { 6068 status->flag |= RX_FLAG_IV_STRIPPED | 6069 RX_FLAG_MMIC_STRIPPED; 6070 hdr->frame_control = __cpu_to_le16(fc & 6071 ~IEEE80211_FCTL_PROTECTED); 6072 } 6073 } 6074 6075 if (ieee80211_is_beacon(hdr->frame_control)) 6076 ath12k_mac_handle_beacon(ar, skb); 6077 6078 ath12k_dbg(ab, ATH12K_DBG_MGMT, 6079 "event mgmt rx skb %p len %d ftype %02x stype %02x\n", 6080 skb, skb->len, 6081 fc & IEEE80211_FCTL_FTYPE, fc & IEEE80211_FCTL_STYPE); 6082 6083 ath12k_dbg(ab, ATH12K_DBG_MGMT, 6084 "event mgmt rx freq %d band %d snr %d, rate_idx %d\n", 6085 status->freq, status->band, status->signal, 6086 status->rate_idx); 6087 6088 ieee80211_rx_ni(ath12k_ar_to_hw(ar), skb); 6089 6090 exit: 6091 rcu_read_unlock(); 6092 } 6093 6094 static void ath12k_mgmt_tx_compl_event(struct ath12k_base *ab, struct sk_buff *skb) 6095 { 6096 struct wmi_mgmt_tx_compl_event tx_compl_param = {0}; 6097 struct ath12k *ar; 6098 6099 if (ath12k_pull_mgmt_tx_compl_param_tlv(ab, skb, &tx_compl_param) != 0) { 6100 ath12k_warn(ab, "failed to extract mgmt tx compl event"); 6101 return; 6102 } 6103 6104 rcu_read_lock(); 6105 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(tx_compl_param.pdev_id)); 6106 if (!ar) { 6107 ath12k_warn(ab, "invalid pdev id %d in mgmt_tx_compl_event\n", 6108 tx_compl_param.pdev_id); 6109 goto exit; 6110 } 6111 6112 wmi_process_mgmt_tx_comp(ar, le32_to_cpu(tx_compl_param.desc_id), 6113 le32_to_cpu(tx_compl_param.status)); 6114 6115 ath12k_dbg(ab, ATH12K_DBG_MGMT, 6116 "mgmt tx compl ev pdev_id %d, desc_id %d, status %d", 6117 tx_compl_param.pdev_id, tx_compl_param.desc_id, 6118 tx_compl_param.status); 6119 6120 exit: 6121 rcu_read_unlock(); 6122 } 6123 6124 static struct ath12k *ath12k_get_ar_on_scan_state(struct ath12k_base *ab, 6125 u32 vdev_id, 6126 enum ath12k_scan_state state) 6127 { 6128 int i; 6129 struct ath12k_pdev *pdev; 6130 struct ath12k *ar; 6131 6132 for (i = 0; i < ab->num_radios; i++) { 6133 pdev = rcu_dereference(ab->pdevs_active[i]); 6134 if (pdev && pdev->ar) { 6135 ar = pdev->ar; 6136 6137 spin_lock_bh(&ar->data_lock); 6138 if (ar->scan.state == state && 6139 ar->scan.vdev_id == vdev_id) { 6140 spin_unlock_bh(&ar->data_lock); 6141 return ar; 6142 } 6143 spin_unlock_bh(&ar->data_lock); 6144 } 6145 } 6146 return NULL; 6147 } 6148 6149 static void ath12k_scan_event(struct ath12k_base *ab, struct sk_buff *skb) 6150 { 6151 struct ath12k *ar; 6152 struct wmi_scan_event scan_ev = {0}; 6153 6154 if (ath12k_pull_scan_ev(ab, skb, &scan_ev) != 0) { 6155 ath12k_warn(ab, "failed to extract scan event"); 6156 return; 6157 } 6158 6159 rcu_read_lock(); 6160 6161 /* In case the scan was cancelled, ex. during interface teardown, 6162 * the interface will not be found in active interfaces. 6163 * Rather, in such scenarios, iterate over the active pdev's to 6164 * search 'ar' if the corresponding 'ar' scan is ABORTING and the 6165 * aborting scan's vdev id matches this event info. 6166 */ 6167 if (le32_to_cpu(scan_ev.event_type) == WMI_SCAN_EVENT_COMPLETED && 6168 le32_to_cpu(scan_ev.reason) == WMI_SCAN_REASON_CANCELLED) { 6169 ar = ath12k_get_ar_on_scan_state(ab, le32_to_cpu(scan_ev.vdev_id), 6170 ATH12K_SCAN_ABORTING); 6171 if (!ar) 6172 ar = ath12k_get_ar_on_scan_state(ab, le32_to_cpu(scan_ev.vdev_id), 6173 ATH12K_SCAN_RUNNING); 6174 } else { 6175 ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(scan_ev.vdev_id)); 6176 } 6177 6178 if (!ar) { 6179 ath12k_warn(ab, "Received scan event for unknown vdev"); 6180 rcu_read_unlock(); 6181 return; 6182 } 6183 6184 spin_lock_bh(&ar->data_lock); 6185 6186 ath12k_dbg(ab, ATH12K_DBG_WMI, 6187 "scan event %s type %d reason %d freq %d req_id %d scan_id %d vdev_id %d state %s (%d)\n", 6188 ath12k_wmi_event_scan_type_str(le32_to_cpu(scan_ev.event_type), 6189 le32_to_cpu(scan_ev.reason)), 6190 le32_to_cpu(scan_ev.event_type), 6191 le32_to_cpu(scan_ev.reason), 6192 le32_to_cpu(scan_ev.channel_freq), 6193 le32_to_cpu(scan_ev.scan_req_id), 6194 le32_to_cpu(scan_ev.scan_id), 6195 le32_to_cpu(scan_ev.vdev_id), 6196 ath12k_scan_state_str(ar->scan.state), ar->scan.state); 6197 6198 switch (le32_to_cpu(scan_ev.event_type)) { 6199 case WMI_SCAN_EVENT_STARTED: 6200 ath12k_wmi_event_scan_started(ar); 6201 break; 6202 case WMI_SCAN_EVENT_COMPLETED: 6203 ath12k_wmi_event_scan_completed(ar); 6204 break; 6205 case WMI_SCAN_EVENT_BSS_CHANNEL: 6206 ath12k_wmi_event_scan_bss_chan(ar); 6207 break; 6208 case WMI_SCAN_EVENT_FOREIGN_CHAN: 6209 ath12k_wmi_event_scan_foreign_chan(ar, le32_to_cpu(scan_ev.channel_freq)); 6210 break; 6211 case WMI_SCAN_EVENT_START_FAILED: 6212 ath12k_warn(ab, "received scan start failure event\n"); 6213 ath12k_wmi_event_scan_start_failed(ar); 6214 break; 6215 case WMI_SCAN_EVENT_DEQUEUED: 6216 __ath12k_mac_scan_finish(ar); 6217 break; 6218 case WMI_SCAN_EVENT_PREEMPTED: 6219 case WMI_SCAN_EVENT_RESTARTED: 6220 case WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT: 6221 default: 6222 break; 6223 } 6224 6225 spin_unlock_bh(&ar->data_lock); 6226 6227 rcu_read_unlock(); 6228 } 6229 6230 static void ath12k_peer_sta_kickout_event(struct ath12k_base *ab, struct sk_buff *skb) 6231 { 6232 struct wmi_peer_sta_kickout_arg arg = {}; 6233 struct ieee80211_sta *sta; 6234 struct ath12k_peer *peer; 6235 struct ath12k *ar; 6236 6237 if (ath12k_pull_peer_sta_kickout_ev(ab, skb, &arg) != 0) { 6238 ath12k_warn(ab, "failed to extract peer sta kickout event"); 6239 return; 6240 } 6241 6242 rcu_read_lock(); 6243 6244 spin_lock_bh(&ab->base_lock); 6245 6246 peer = ath12k_peer_find_by_addr(ab, arg.mac_addr); 6247 6248 if (!peer) { 6249 ath12k_warn(ab, "peer not found %pM\n", 6250 arg.mac_addr); 6251 goto exit; 6252 } 6253 6254 ar = ath12k_mac_get_ar_by_vdev_id(ab, peer->vdev_id); 6255 if (!ar) { 6256 ath12k_warn(ab, "invalid vdev id in peer sta kickout ev %d", 6257 peer->vdev_id); 6258 goto exit; 6259 } 6260 6261 sta = ieee80211_find_sta_by_ifaddr(ath12k_ar_to_hw(ar), 6262 arg.mac_addr, NULL); 6263 if (!sta) { 6264 ath12k_warn(ab, "Spurious quick kickout for STA %pM\n", 6265 arg.mac_addr); 6266 goto exit; 6267 } 6268 6269 ath12k_dbg(ab, ATH12K_DBG_WMI, "peer sta kickout event %pM", 6270 arg.mac_addr); 6271 6272 ieee80211_report_low_ack(sta, 10); 6273 6274 exit: 6275 spin_unlock_bh(&ab->base_lock); 6276 rcu_read_unlock(); 6277 } 6278 6279 static void ath12k_roam_event(struct ath12k_base *ab, struct sk_buff *skb) 6280 { 6281 struct wmi_roam_event roam_ev = {}; 6282 struct ath12k *ar; 6283 u32 vdev_id; 6284 u8 roam_reason; 6285 6286 if (ath12k_pull_roam_ev(ab, skb, &roam_ev) != 0) { 6287 ath12k_warn(ab, "failed to extract roam event"); 6288 return; 6289 } 6290 6291 vdev_id = le32_to_cpu(roam_ev.vdev_id); 6292 roam_reason = u32_get_bits(le32_to_cpu(roam_ev.reason), 6293 WMI_ROAM_REASON_MASK); 6294 6295 ath12k_dbg(ab, ATH12K_DBG_WMI, 6296 "wmi roam event vdev %u reason %d rssi %d\n", 6297 vdev_id, roam_reason, roam_ev.rssi); 6298 6299 rcu_read_lock(); 6300 ar = ath12k_mac_get_ar_by_vdev_id(ab, vdev_id); 6301 if (!ar) { 6302 ath12k_warn(ab, "invalid vdev id in roam ev %d", vdev_id); 6303 rcu_read_unlock(); 6304 return; 6305 } 6306 6307 if (roam_reason >= WMI_ROAM_REASON_MAX) 6308 ath12k_warn(ab, "ignoring unknown roam event reason %d on vdev %i\n", 6309 roam_reason, vdev_id); 6310 6311 switch (roam_reason) { 6312 case WMI_ROAM_REASON_BEACON_MISS: 6313 ath12k_mac_handle_beacon_miss(ar, vdev_id); 6314 break; 6315 case WMI_ROAM_REASON_BETTER_AP: 6316 case WMI_ROAM_REASON_LOW_RSSI: 6317 case WMI_ROAM_REASON_SUITABLE_AP_FOUND: 6318 case WMI_ROAM_REASON_HO_FAILED: 6319 ath12k_warn(ab, "ignoring not implemented roam event reason %d on vdev %i\n", 6320 roam_reason, vdev_id); 6321 break; 6322 } 6323 6324 rcu_read_unlock(); 6325 } 6326 6327 static void ath12k_chan_info_event(struct ath12k_base *ab, struct sk_buff *skb) 6328 { 6329 struct wmi_chan_info_event ch_info_ev = {0}; 6330 struct ath12k *ar; 6331 struct survey_info *survey; 6332 int idx; 6333 /* HW channel counters frequency value in hertz */ 6334 u32 cc_freq_hz = ab->cc_freq_hz; 6335 6336 if (ath12k_pull_chan_info_ev(ab, skb, &ch_info_ev) != 0) { 6337 ath12k_warn(ab, "failed to extract chan info event"); 6338 return; 6339 } 6340 6341 ath12k_dbg(ab, ATH12K_DBG_WMI, 6342 "chan info vdev_id %d err_code %d freq %d cmd_flags %d noise_floor %d rx_clear_count %d cycle_count %d mac_clk_mhz %d\n", 6343 ch_info_ev.vdev_id, ch_info_ev.err_code, ch_info_ev.freq, 6344 ch_info_ev.cmd_flags, ch_info_ev.noise_floor, 6345 ch_info_ev.rx_clear_count, ch_info_ev.cycle_count, 6346 ch_info_ev.mac_clk_mhz); 6347 6348 if (le32_to_cpu(ch_info_ev.cmd_flags) == WMI_CHAN_INFO_END_RESP) { 6349 ath12k_dbg(ab, ATH12K_DBG_WMI, "chan info report completed\n"); 6350 return; 6351 } 6352 6353 rcu_read_lock(); 6354 ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(ch_info_ev.vdev_id)); 6355 if (!ar) { 6356 ath12k_warn(ab, "invalid vdev id in chan info ev %d", 6357 ch_info_ev.vdev_id); 6358 rcu_read_unlock(); 6359 return; 6360 } 6361 spin_lock_bh(&ar->data_lock); 6362 6363 switch (ar->scan.state) { 6364 case ATH12K_SCAN_IDLE: 6365 case ATH12K_SCAN_STARTING: 6366 ath12k_warn(ab, "received chan info event without a scan request, ignoring\n"); 6367 goto exit; 6368 case ATH12K_SCAN_RUNNING: 6369 case ATH12K_SCAN_ABORTING: 6370 break; 6371 } 6372 6373 idx = freq_to_idx(ar, le32_to_cpu(ch_info_ev.freq)); 6374 if (idx >= ARRAY_SIZE(ar->survey)) { 6375 ath12k_warn(ab, "chan info: invalid frequency %d (idx %d out of bounds)\n", 6376 ch_info_ev.freq, idx); 6377 goto exit; 6378 } 6379 6380 /* If FW provides MAC clock frequency in Mhz, overriding the initialized 6381 * HW channel counters frequency value 6382 */ 6383 if (ch_info_ev.mac_clk_mhz) 6384 cc_freq_hz = (le32_to_cpu(ch_info_ev.mac_clk_mhz) * 1000); 6385 6386 if (ch_info_ev.cmd_flags == WMI_CHAN_INFO_START_RESP) { 6387 survey = &ar->survey[idx]; 6388 memset(survey, 0, sizeof(*survey)); 6389 survey->noise = le32_to_cpu(ch_info_ev.noise_floor); 6390 survey->filled = SURVEY_INFO_NOISE_DBM | SURVEY_INFO_TIME | 6391 SURVEY_INFO_TIME_BUSY; 6392 survey->time = div_u64(le32_to_cpu(ch_info_ev.cycle_count), cc_freq_hz); 6393 survey->time_busy = div_u64(le32_to_cpu(ch_info_ev.rx_clear_count), 6394 cc_freq_hz); 6395 } 6396 exit: 6397 spin_unlock_bh(&ar->data_lock); 6398 rcu_read_unlock(); 6399 } 6400 6401 static void 6402 ath12k_pdev_bss_chan_info_event(struct ath12k_base *ab, struct sk_buff *skb) 6403 { 6404 struct wmi_pdev_bss_chan_info_event bss_ch_info_ev = {}; 6405 struct survey_info *survey; 6406 struct ath12k *ar; 6407 u32 cc_freq_hz = ab->cc_freq_hz; 6408 u64 busy, total, tx, rx, rx_bss; 6409 int idx; 6410 6411 if (ath12k_pull_pdev_bss_chan_info_ev(ab, skb, &bss_ch_info_ev) != 0) { 6412 ath12k_warn(ab, "failed to extract pdev bss chan info event"); 6413 return; 6414 } 6415 6416 busy = (u64)(le32_to_cpu(bss_ch_info_ev.rx_clear_count_high)) << 32 | 6417 le32_to_cpu(bss_ch_info_ev.rx_clear_count_low); 6418 6419 total = (u64)(le32_to_cpu(bss_ch_info_ev.cycle_count_high)) << 32 | 6420 le32_to_cpu(bss_ch_info_ev.cycle_count_low); 6421 6422 tx = (u64)(le32_to_cpu(bss_ch_info_ev.tx_cycle_count_high)) << 32 | 6423 le32_to_cpu(bss_ch_info_ev.tx_cycle_count_low); 6424 6425 rx = (u64)(le32_to_cpu(bss_ch_info_ev.rx_cycle_count_high)) << 32 | 6426 le32_to_cpu(bss_ch_info_ev.rx_cycle_count_low); 6427 6428 rx_bss = (u64)(le32_to_cpu(bss_ch_info_ev.rx_bss_cycle_count_high)) << 32 | 6429 le32_to_cpu(bss_ch_info_ev.rx_bss_cycle_count_low); 6430 6431 ath12k_dbg(ab, ATH12K_DBG_WMI, 6432 "pdev bss chan info:\n pdev_id: %d freq: %d noise: %d cycle: busy %llu total %llu tx %llu rx %llu rx_bss %llu\n", 6433 bss_ch_info_ev.pdev_id, bss_ch_info_ev.freq, 6434 bss_ch_info_ev.noise_floor, busy, total, 6435 tx, rx, rx_bss); 6436 6437 rcu_read_lock(); 6438 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(bss_ch_info_ev.pdev_id)); 6439 6440 if (!ar) { 6441 ath12k_warn(ab, "invalid pdev id %d in bss_chan_info event\n", 6442 bss_ch_info_ev.pdev_id); 6443 rcu_read_unlock(); 6444 return; 6445 } 6446 6447 spin_lock_bh(&ar->data_lock); 6448 idx = freq_to_idx(ar, le32_to_cpu(bss_ch_info_ev.freq)); 6449 if (idx >= ARRAY_SIZE(ar->survey)) { 6450 ath12k_warn(ab, "bss chan info: invalid frequency %d (idx %d out of bounds)\n", 6451 bss_ch_info_ev.freq, idx); 6452 goto exit; 6453 } 6454 6455 survey = &ar->survey[idx]; 6456 6457 survey->noise = le32_to_cpu(bss_ch_info_ev.noise_floor); 6458 survey->time = div_u64(total, cc_freq_hz); 6459 survey->time_busy = div_u64(busy, cc_freq_hz); 6460 survey->time_rx = div_u64(rx_bss, cc_freq_hz); 6461 survey->time_tx = div_u64(tx, cc_freq_hz); 6462 survey->filled |= (SURVEY_INFO_NOISE_DBM | 6463 SURVEY_INFO_TIME | 6464 SURVEY_INFO_TIME_BUSY | 6465 SURVEY_INFO_TIME_RX | 6466 SURVEY_INFO_TIME_TX); 6467 exit: 6468 spin_unlock_bh(&ar->data_lock); 6469 complete(&ar->bss_survey_done); 6470 6471 rcu_read_unlock(); 6472 } 6473 6474 static void ath12k_vdev_install_key_compl_event(struct ath12k_base *ab, 6475 struct sk_buff *skb) 6476 { 6477 struct wmi_vdev_install_key_complete_arg install_key_compl = {0}; 6478 struct ath12k *ar; 6479 6480 if (ath12k_pull_vdev_install_key_compl_ev(ab, skb, &install_key_compl) != 0) { 6481 ath12k_warn(ab, "failed to extract install key compl event"); 6482 return; 6483 } 6484 6485 ath12k_dbg(ab, ATH12K_DBG_WMI, 6486 "vdev install key ev idx %d flags %08x macaddr %pM status %d\n", 6487 install_key_compl.key_idx, install_key_compl.key_flags, 6488 install_key_compl.macaddr, install_key_compl.status); 6489 6490 rcu_read_lock(); 6491 ar = ath12k_mac_get_ar_by_vdev_id(ab, install_key_compl.vdev_id); 6492 if (!ar) { 6493 ath12k_warn(ab, "invalid vdev id in install key compl ev %d", 6494 install_key_compl.vdev_id); 6495 rcu_read_unlock(); 6496 return; 6497 } 6498 6499 ar->install_key_status = 0; 6500 6501 if (install_key_compl.status != WMI_VDEV_INSTALL_KEY_COMPL_STATUS_SUCCESS) { 6502 ath12k_warn(ab, "install key failed for %pM status %d\n", 6503 install_key_compl.macaddr, install_key_compl.status); 6504 ar->install_key_status = install_key_compl.status; 6505 } 6506 6507 complete(&ar->install_key_done); 6508 rcu_read_unlock(); 6509 } 6510 6511 static int ath12k_wmi_tlv_services_parser(struct ath12k_base *ab, 6512 u16 tag, u16 len, 6513 const void *ptr, 6514 void *data) 6515 { 6516 const struct wmi_service_available_event *ev; 6517 u32 *wmi_ext2_service_bitmap; 6518 int i, j; 6519 u16 expected_len; 6520 6521 expected_len = WMI_SERVICE_SEGMENT_BM_SIZE32 * sizeof(u32); 6522 if (len < expected_len) { 6523 ath12k_warn(ab, "invalid length %d for the WMI services available tag 0x%x\n", 6524 len, tag); 6525 return -EINVAL; 6526 } 6527 6528 switch (tag) { 6529 case WMI_TAG_SERVICE_AVAILABLE_EVENT: 6530 ev = (struct wmi_service_available_event *)ptr; 6531 for (i = 0, j = WMI_MAX_SERVICE; 6532 i < WMI_SERVICE_SEGMENT_BM_SIZE32 && j < WMI_MAX_EXT_SERVICE; 6533 i++) { 6534 do { 6535 if (le32_to_cpu(ev->wmi_service_segment_bitmap[i]) & 6536 BIT(j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32)) 6537 set_bit(j, ab->wmi_ab.svc_map); 6538 } while (++j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32); 6539 } 6540 6541 ath12k_dbg(ab, ATH12K_DBG_WMI, 6542 "wmi_ext_service_bitmap 0x%x 0x%x 0x%x 0x%x", 6543 ev->wmi_service_segment_bitmap[0], 6544 ev->wmi_service_segment_bitmap[1], 6545 ev->wmi_service_segment_bitmap[2], 6546 ev->wmi_service_segment_bitmap[3]); 6547 break; 6548 case WMI_TAG_ARRAY_UINT32: 6549 wmi_ext2_service_bitmap = (u32 *)ptr; 6550 for (i = 0, j = WMI_MAX_EXT_SERVICE; 6551 i < WMI_SERVICE_SEGMENT_BM_SIZE32 && j < WMI_MAX_EXT2_SERVICE; 6552 i++) { 6553 do { 6554 if (wmi_ext2_service_bitmap[i] & 6555 BIT(j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32)) 6556 set_bit(j, ab->wmi_ab.svc_map); 6557 } while (++j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32); 6558 } 6559 6560 ath12k_dbg(ab, ATH12K_DBG_WMI, 6561 "wmi_ext2_service_bitmap 0x%04x 0x%04x 0x%04x 0x%04x", 6562 wmi_ext2_service_bitmap[0], wmi_ext2_service_bitmap[1], 6563 wmi_ext2_service_bitmap[2], wmi_ext2_service_bitmap[3]); 6564 break; 6565 } 6566 return 0; 6567 } 6568 6569 static int ath12k_service_available_event(struct ath12k_base *ab, struct sk_buff *skb) 6570 { 6571 int ret; 6572 6573 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 6574 ath12k_wmi_tlv_services_parser, 6575 NULL); 6576 return ret; 6577 } 6578 6579 static void ath12k_peer_assoc_conf_event(struct ath12k_base *ab, struct sk_buff *skb) 6580 { 6581 struct wmi_peer_assoc_conf_arg peer_assoc_conf = {0}; 6582 struct ath12k *ar; 6583 6584 if (ath12k_pull_peer_assoc_conf_ev(ab, skb, &peer_assoc_conf) != 0) { 6585 ath12k_warn(ab, "failed to extract peer assoc conf event"); 6586 return; 6587 } 6588 6589 ath12k_dbg(ab, ATH12K_DBG_WMI, 6590 "peer assoc conf ev vdev id %d macaddr %pM\n", 6591 peer_assoc_conf.vdev_id, peer_assoc_conf.macaddr); 6592 6593 rcu_read_lock(); 6594 ar = ath12k_mac_get_ar_by_vdev_id(ab, peer_assoc_conf.vdev_id); 6595 6596 if (!ar) { 6597 ath12k_warn(ab, "invalid vdev id in peer assoc conf ev %d", 6598 peer_assoc_conf.vdev_id); 6599 rcu_read_unlock(); 6600 return; 6601 } 6602 6603 complete(&ar->peer_assoc_done); 6604 rcu_read_unlock(); 6605 } 6606 6607 static void ath12k_update_stats_event(struct ath12k_base *ab, struct sk_buff *skb) 6608 { 6609 } 6610 6611 /* PDEV_CTL_FAILSAFE_CHECK_EVENT is received from FW when the frequency scanned 6612 * is not part of BDF CTL(Conformance test limits) table entries. 6613 */ 6614 static void ath12k_pdev_ctl_failsafe_check_event(struct ath12k_base *ab, 6615 struct sk_buff *skb) 6616 { 6617 const void **tb; 6618 const struct wmi_pdev_ctl_failsafe_chk_event *ev; 6619 int ret; 6620 6621 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 6622 if (IS_ERR(tb)) { 6623 ret = PTR_ERR(tb); 6624 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 6625 return; 6626 } 6627 6628 ev = tb[WMI_TAG_PDEV_CTL_FAILSAFE_CHECK_EVENT]; 6629 if (!ev) { 6630 ath12k_warn(ab, "failed to fetch pdev ctl failsafe check ev"); 6631 kfree(tb); 6632 return; 6633 } 6634 6635 ath12k_dbg(ab, ATH12K_DBG_WMI, 6636 "pdev ctl failsafe check ev status %d\n", 6637 ev->ctl_failsafe_status); 6638 6639 /* If ctl_failsafe_status is set to 1 FW will max out the Transmit power 6640 * to 10 dBm else the CTL power entry in the BDF would be picked up. 6641 */ 6642 if (ev->ctl_failsafe_status != 0) 6643 ath12k_warn(ab, "pdev ctl failsafe failure status %d", 6644 ev->ctl_failsafe_status); 6645 6646 kfree(tb); 6647 } 6648 6649 static void 6650 ath12k_wmi_process_csa_switch_count_event(struct ath12k_base *ab, 6651 const struct ath12k_wmi_pdev_csa_event *ev, 6652 const u32 *vdev_ids) 6653 { 6654 int i; 6655 struct ath12k_vif *arvif; 6656 6657 /* Finish CSA once the switch count becomes NULL */ 6658 if (ev->current_switch_count) 6659 return; 6660 6661 rcu_read_lock(); 6662 for (i = 0; i < le32_to_cpu(ev->num_vdevs); i++) { 6663 arvif = ath12k_mac_get_arvif_by_vdev_id(ab, vdev_ids[i]); 6664 6665 if (!arvif) { 6666 ath12k_warn(ab, "Recvd csa status for unknown vdev %d", 6667 vdev_ids[i]); 6668 continue; 6669 } 6670 6671 if (arvif->is_up && arvif->vif->bss_conf.csa_active) 6672 ieee80211_csa_finish(arvif->vif, 0); 6673 } 6674 rcu_read_unlock(); 6675 } 6676 6677 static void 6678 ath12k_wmi_pdev_csa_switch_count_status_event(struct ath12k_base *ab, 6679 struct sk_buff *skb) 6680 { 6681 const void **tb; 6682 const struct ath12k_wmi_pdev_csa_event *ev; 6683 const u32 *vdev_ids; 6684 int ret; 6685 6686 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 6687 if (IS_ERR(tb)) { 6688 ret = PTR_ERR(tb); 6689 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 6690 return; 6691 } 6692 6693 ev = tb[WMI_TAG_PDEV_CSA_SWITCH_COUNT_STATUS_EVENT]; 6694 vdev_ids = tb[WMI_TAG_ARRAY_UINT32]; 6695 6696 if (!ev || !vdev_ids) { 6697 ath12k_warn(ab, "failed to fetch pdev csa switch count ev"); 6698 kfree(tb); 6699 return; 6700 } 6701 6702 ath12k_dbg(ab, ATH12K_DBG_WMI, 6703 "pdev csa switch count %d for pdev %d, num_vdevs %d", 6704 ev->current_switch_count, ev->pdev_id, 6705 ev->num_vdevs); 6706 6707 ath12k_wmi_process_csa_switch_count_event(ab, ev, vdev_ids); 6708 6709 kfree(tb); 6710 } 6711 6712 static void 6713 ath12k_wmi_pdev_dfs_radar_detected_event(struct ath12k_base *ab, struct sk_buff *skb) 6714 { 6715 const void **tb; 6716 const struct ath12k_wmi_pdev_radar_event *ev; 6717 struct ath12k *ar; 6718 int ret; 6719 6720 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 6721 if (IS_ERR(tb)) { 6722 ret = PTR_ERR(tb); 6723 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 6724 return; 6725 } 6726 6727 ev = tb[WMI_TAG_PDEV_DFS_RADAR_DETECTION_EVENT]; 6728 6729 if (!ev) { 6730 ath12k_warn(ab, "failed to fetch pdev dfs radar detected ev"); 6731 kfree(tb); 6732 return; 6733 } 6734 6735 ath12k_dbg(ab, ATH12K_DBG_WMI, 6736 "pdev dfs radar detected on pdev %d, detection mode %d, chan freq %d, chan_width %d, detector id %d, seg id %d, timestamp %d, chirp %d, freq offset %d, sidx %d", 6737 ev->pdev_id, ev->detection_mode, ev->chan_freq, ev->chan_width, 6738 ev->detector_id, ev->segment_id, ev->timestamp, ev->is_chirp, 6739 ev->freq_offset, ev->sidx); 6740 6741 rcu_read_lock(); 6742 6743 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(ev->pdev_id)); 6744 6745 if (!ar) { 6746 ath12k_warn(ab, "radar detected in invalid pdev %d\n", 6747 ev->pdev_id); 6748 goto exit; 6749 } 6750 6751 ath12k_dbg(ar->ab, ATH12K_DBG_REG, "DFS Radar Detected in pdev %d\n", 6752 ev->pdev_id); 6753 6754 if (ar->dfs_block_radar_events) 6755 ath12k_info(ab, "DFS Radar detected, but ignored as requested\n"); 6756 else 6757 ieee80211_radar_detected(ath12k_ar_to_hw(ar)); 6758 6759 exit: 6760 rcu_read_unlock(); 6761 6762 kfree(tb); 6763 } 6764 6765 static void 6766 ath12k_wmi_pdev_temperature_event(struct ath12k_base *ab, 6767 struct sk_buff *skb) 6768 { 6769 struct ath12k *ar; 6770 struct wmi_pdev_temperature_event ev = {0}; 6771 6772 if (ath12k_pull_pdev_temp_ev(ab, skb, &ev) != 0) { 6773 ath12k_warn(ab, "failed to extract pdev temperature event"); 6774 return; 6775 } 6776 6777 ath12k_dbg(ab, ATH12K_DBG_WMI, 6778 "pdev temperature ev temp %d pdev_id %d\n", ev.temp, ev.pdev_id); 6779 6780 rcu_read_lock(); 6781 6782 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(ev.pdev_id)); 6783 if (!ar) { 6784 ath12k_warn(ab, "invalid pdev id in pdev temperature ev %d", ev.pdev_id); 6785 goto exit; 6786 } 6787 6788 exit: 6789 rcu_read_unlock(); 6790 } 6791 6792 static void ath12k_fils_discovery_event(struct ath12k_base *ab, 6793 struct sk_buff *skb) 6794 { 6795 const void **tb; 6796 const struct wmi_fils_discovery_event *ev; 6797 int ret; 6798 6799 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 6800 if (IS_ERR(tb)) { 6801 ret = PTR_ERR(tb); 6802 ath12k_warn(ab, 6803 "failed to parse FILS discovery event tlv %d\n", 6804 ret); 6805 return; 6806 } 6807 6808 ev = tb[WMI_TAG_HOST_SWFDA_EVENT]; 6809 if (!ev) { 6810 ath12k_warn(ab, "failed to fetch FILS discovery event\n"); 6811 kfree(tb); 6812 return; 6813 } 6814 6815 ath12k_warn(ab, 6816 "FILS discovery frame expected from host for vdev_id: %u, transmission scheduled at %u, next TBTT: %u\n", 6817 ev->vdev_id, ev->fils_tt, ev->tbtt); 6818 6819 kfree(tb); 6820 } 6821 6822 static void ath12k_probe_resp_tx_status_event(struct ath12k_base *ab, 6823 struct sk_buff *skb) 6824 { 6825 const void **tb; 6826 const struct wmi_probe_resp_tx_status_event *ev; 6827 int ret; 6828 6829 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 6830 if (IS_ERR(tb)) { 6831 ret = PTR_ERR(tb); 6832 ath12k_warn(ab, 6833 "failed to parse probe response transmission status event tlv: %d\n", 6834 ret); 6835 return; 6836 } 6837 6838 ev = tb[WMI_TAG_OFFLOAD_PRB_RSP_TX_STATUS_EVENT]; 6839 if (!ev) { 6840 ath12k_warn(ab, 6841 "failed to fetch probe response transmission status event"); 6842 kfree(tb); 6843 return; 6844 } 6845 6846 if (ev->tx_status) 6847 ath12k_warn(ab, 6848 "Probe response transmission failed for vdev_id %u, status %u\n", 6849 ev->vdev_id, ev->tx_status); 6850 6851 kfree(tb); 6852 } 6853 6854 static int ath12k_wmi_p2p_noa_event(struct ath12k_base *ab, 6855 struct sk_buff *skb) 6856 { 6857 const void **tb; 6858 const struct wmi_p2p_noa_event *ev; 6859 const struct ath12k_wmi_p2p_noa_info *noa; 6860 struct ath12k *ar; 6861 int ret, vdev_id; 6862 6863 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 6864 if (IS_ERR(tb)) { 6865 ret = PTR_ERR(tb); 6866 ath12k_warn(ab, "failed to parse P2P NoA TLV: %d\n", ret); 6867 return ret; 6868 } 6869 6870 ev = tb[WMI_TAG_P2P_NOA_EVENT]; 6871 noa = tb[WMI_TAG_P2P_NOA_INFO]; 6872 6873 if (!ev || !noa) { 6874 ret = -EPROTO; 6875 goto out; 6876 } 6877 6878 vdev_id = __le32_to_cpu(ev->vdev_id); 6879 6880 ath12k_dbg(ab, ATH12K_DBG_WMI, 6881 "wmi tlv p2p noa vdev_id %i descriptors %u\n", 6882 vdev_id, le32_get_bits(noa->noa_attr, WMI_P2P_NOA_INFO_DESC_NUM)); 6883 6884 rcu_read_lock(); 6885 ar = ath12k_mac_get_ar_by_vdev_id(ab, vdev_id); 6886 if (!ar) { 6887 ath12k_warn(ab, "invalid vdev id %d in P2P NoA event\n", 6888 vdev_id); 6889 ret = -EINVAL; 6890 goto unlock; 6891 } 6892 6893 ath12k_p2p_noa_update_by_vdev_id(ar, vdev_id, noa); 6894 6895 ret = 0; 6896 6897 unlock: 6898 rcu_read_unlock(); 6899 out: 6900 kfree(tb); 6901 return ret; 6902 } 6903 6904 static void ath12k_rfkill_state_change_event(struct ath12k_base *ab, 6905 struct sk_buff *skb) 6906 { 6907 const struct wmi_rfkill_state_change_event *ev; 6908 const void **tb; 6909 int ret; 6910 6911 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 6912 if (IS_ERR(tb)) { 6913 ret = PTR_ERR(tb); 6914 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 6915 return; 6916 } 6917 6918 ev = tb[WMI_TAG_RFKILL_EVENT]; 6919 if (!ev) { 6920 kfree(tb); 6921 return; 6922 } 6923 6924 ath12k_dbg(ab, ATH12K_DBG_MAC, 6925 "wmi tlv rfkill state change gpio %d type %d radio_state %d\n", 6926 le32_to_cpu(ev->gpio_pin_num), 6927 le32_to_cpu(ev->int_type), 6928 le32_to_cpu(ev->radio_state)); 6929 6930 spin_lock_bh(&ab->base_lock); 6931 ab->rfkill_radio_on = (ev->radio_state == cpu_to_le32(WMI_RFKILL_RADIO_STATE_ON)); 6932 spin_unlock_bh(&ab->base_lock); 6933 6934 queue_work(ab->workqueue, &ab->rfkill_work); 6935 kfree(tb); 6936 } 6937 6938 static void 6939 ath12k_wmi_diag_event(struct ath12k_base *ab, struct sk_buff *skb) 6940 { 6941 trace_ath12k_wmi_diag(ab, skb->data, skb->len); 6942 } 6943 6944 static void ath12k_wmi_twt_enable_event(struct ath12k_base *ab, 6945 struct sk_buff *skb) 6946 { 6947 const void **tb; 6948 const struct wmi_twt_enable_event *ev; 6949 int ret; 6950 6951 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 6952 if (IS_ERR(tb)) { 6953 ret = PTR_ERR(tb); 6954 ath12k_warn(ab, "failed to parse wmi twt enable status event tlv: %d\n", 6955 ret); 6956 return; 6957 } 6958 6959 ev = tb[WMI_TAG_TWT_ENABLE_COMPLETE_EVENT]; 6960 if (!ev) { 6961 ath12k_warn(ab, "failed to fetch twt enable wmi event\n"); 6962 goto exit; 6963 } 6964 6965 ath12k_dbg(ab, ATH12K_DBG_MAC, "wmi twt enable event pdev id %u status %u\n", 6966 le32_to_cpu(ev->pdev_id), 6967 le32_to_cpu(ev->status)); 6968 6969 exit: 6970 kfree(tb); 6971 } 6972 6973 static void ath12k_wmi_twt_disable_event(struct ath12k_base *ab, 6974 struct sk_buff *skb) 6975 { 6976 const void **tb; 6977 const struct wmi_twt_disable_event *ev; 6978 int ret; 6979 6980 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 6981 if (IS_ERR(tb)) { 6982 ret = PTR_ERR(tb); 6983 ath12k_warn(ab, "failed to parse wmi twt disable status event tlv: %d\n", 6984 ret); 6985 return; 6986 } 6987 6988 ev = tb[WMI_TAG_TWT_DISABLE_COMPLETE_EVENT]; 6989 if (!ev) { 6990 ath12k_warn(ab, "failed to fetch twt disable wmi event\n"); 6991 goto exit; 6992 } 6993 6994 ath12k_dbg(ab, ATH12K_DBG_MAC, "wmi twt disable event pdev id %d status %u\n", 6995 le32_to_cpu(ev->pdev_id), 6996 le32_to_cpu(ev->status)); 6997 6998 exit: 6999 kfree(tb); 7000 } 7001 7002 static void ath12k_wmi_op_rx(struct ath12k_base *ab, struct sk_buff *skb) 7003 { 7004 struct wmi_cmd_hdr *cmd_hdr; 7005 enum wmi_tlv_event_id id; 7006 7007 cmd_hdr = (struct wmi_cmd_hdr *)skb->data; 7008 id = le32_get_bits(cmd_hdr->cmd_id, WMI_CMD_HDR_CMD_ID); 7009 7010 if (!skb_pull(skb, sizeof(struct wmi_cmd_hdr))) 7011 goto out; 7012 7013 switch (id) { 7014 /* Process all the WMI events here */ 7015 case WMI_SERVICE_READY_EVENTID: 7016 ath12k_service_ready_event(ab, skb); 7017 break; 7018 case WMI_SERVICE_READY_EXT_EVENTID: 7019 ath12k_service_ready_ext_event(ab, skb); 7020 break; 7021 case WMI_SERVICE_READY_EXT2_EVENTID: 7022 ath12k_service_ready_ext2_event(ab, skb); 7023 break; 7024 case WMI_REG_CHAN_LIST_CC_EXT_EVENTID: 7025 ath12k_reg_chan_list_event(ab, skb); 7026 break; 7027 case WMI_READY_EVENTID: 7028 ath12k_ready_event(ab, skb); 7029 break; 7030 case WMI_PEER_DELETE_RESP_EVENTID: 7031 ath12k_peer_delete_resp_event(ab, skb); 7032 break; 7033 case WMI_VDEV_START_RESP_EVENTID: 7034 ath12k_vdev_start_resp_event(ab, skb); 7035 break; 7036 case WMI_OFFLOAD_BCN_TX_STATUS_EVENTID: 7037 ath12k_bcn_tx_status_event(ab, skb); 7038 break; 7039 case WMI_VDEV_STOPPED_EVENTID: 7040 ath12k_vdev_stopped_event(ab, skb); 7041 break; 7042 case WMI_MGMT_RX_EVENTID: 7043 ath12k_mgmt_rx_event(ab, skb); 7044 /* mgmt_rx_event() owns the skb now! */ 7045 return; 7046 case WMI_MGMT_TX_COMPLETION_EVENTID: 7047 ath12k_mgmt_tx_compl_event(ab, skb); 7048 break; 7049 case WMI_SCAN_EVENTID: 7050 ath12k_scan_event(ab, skb); 7051 break; 7052 case WMI_PEER_STA_KICKOUT_EVENTID: 7053 ath12k_peer_sta_kickout_event(ab, skb); 7054 break; 7055 case WMI_ROAM_EVENTID: 7056 ath12k_roam_event(ab, skb); 7057 break; 7058 case WMI_CHAN_INFO_EVENTID: 7059 ath12k_chan_info_event(ab, skb); 7060 break; 7061 case WMI_PDEV_BSS_CHAN_INFO_EVENTID: 7062 ath12k_pdev_bss_chan_info_event(ab, skb); 7063 break; 7064 case WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID: 7065 ath12k_vdev_install_key_compl_event(ab, skb); 7066 break; 7067 case WMI_SERVICE_AVAILABLE_EVENTID: 7068 ath12k_service_available_event(ab, skb); 7069 break; 7070 case WMI_PEER_ASSOC_CONF_EVENTID: 7071 ath12k_peer_assoc_conf_event(ab, skb); 7072 break; 7073 case WMI_UPDATE_STATS_EVENTID: 7074 ath12k_update_stats_event(ab, skb); 7075 break; 7076 case WMI_PDEV_CTL_FAILSAFE_CHECK_EVENTID: 7077 ath12k_pdev_ctl_failsafe_check_event(ab, skb); 7078 break; 7079 case WMI_PDEV_CSA_SWITCH_COUNT_STATUS_EVENTID: 7080 ath12k_wmi_pdev_csa_switch_count_status_event(ab, skb); 7081 break; 7082 case WMI_PDEV_TEMPERATURE_EVENTID: 7083 ath12k_wmi_pdev_temperature_event(ab, skb); 7084 break; 7085 case WMI_PDEV_DMA_RING_BUF_RELEASE_EVENTID: 7086 ath12k_wmi_pdev_dma_ring_buf_release_event(ab, skb); 7087 break; 7088 case WMI_HOST_FILS_DISCOVERY_EVENTID: 7089 ath12k_fils_discovery_event(ab, skb); 7090 break; 7091 case WMI_OFFLOAD_PROB_RESP_TX_STATUS_EVENTID: 7092 ath12k_probe_resp_tx_status_event(ab, skb); 7093 break; 7094 case WMI_RFKILL_STATE_CHANGE_EVENTID: 7095 ath12k_rfkill_state_change_event(ab, skb); 7096 break; 7097 case WMI_TWT_ENABLE_EVENTID: 7098 ath12k_wmi_twt_enable_event(ab, skb); 7099 break; 7100 case WMI_TWT_DISABLE_EVENTID: 7101 ath12k_wmi_twt_disable_event(ab, skb); 7102 break; 7103 case WMI_P2P_NOA_EVENTID: 7104 ath12k_wmi_p2p_noa_event(ab, skb); 7105 break; 7106 /* add Unsupported events here */ 7107 case WMI_TBTTOFFSET_EXT_UPDATE_EVENTID: 7108 case WMI_PEER_OPER_MODE_CHANGE_EVENTID: 7109 case WMI_PDEV_DMA_RING_CFG_RSP_EVENTID: 7110 ath12k_dbg(ab, ATH12K_DBG_WMI, 7111 "ignoring unsupported event 0x%x\n", id); 7112 break; 7113 case WMI_PDEV_DFS_RADAR_DETECTION_EVENTID: 7114 ath12k_wmi_pdev_dfs_radar_detected_event(ab, skb); 7115 break; 7116 case WMI_VDEV_DELETE_RESP_EVENTID: 7117 ath12k_vdev_delete_resp_event(ab, skb); 7118 break; 7119 case WMI_DIAG_EVENTID: 7120 ath12k_wmi_diag_event(ab, skb); 7121 break; 7122 /* TODO: Add remaining events */ 7123 default: 7124 ath12k_dbg(ab, ATH12K_DBG_WMI, "Unknown eventid: 0x%x\n", id); 7125 break; 7126 } 7127 7128 out: 7129 dev_kfree_skb(skb); 7130 } 7131 7132 static int ath12k_connect_pdev_htc_service(struct ath12k_base *ab, 7133 u32 pdev_idx) 7134 { 7135 int status; 7136 u32 svc_id[] = { ATH12K_HTC_SVC_ID_WMI_CONTROL, 7137 ATH12K_HTC_SVC_ID_WMI_CONTROL_MAC1, 7138 ATH12K_HTC_SVC_ID_WMI_CONTROL_MAC2 }; 7139 struct ath12k_htc_svc_conn_req conn_req = {}; 7140 struct ath12k_htc_svc_conn_resp conn_resp = {}; 7141 7142 /* these fields are the same for all service endpoints */ 7143 conn_req.ep_ops.ep_tx_complete = ath12k_wmi_htc_tx_complete; 7144 conn_req.ep_ops.ep_rx_complete = ath12k_wmi_op_rx; 7145 conn_req.ep_ops.ep_tx_credits = ath12k_wmi_op_ep_tx_credits; 7146 7147 /* connect to control service */ 7148 conn_req.service_id = svc_id[pdev_idx]; 7149 7150 status = ath12k_htc_connect_service(&ab->htc, &conn_req, &conn_resp); 7151 if (status) { 7152 ath12k_warn(ab, "failed to connect to WMI CONTROL service status: %d\n", 7153 status); 7154 return status; 7155 } 7156 7157 ab->wmi_ab.wmi_endpoint_id[pdev_idx] = conn_resp.eid; 7158 ab->wmi_ab.wmi[pdev_idx].eid = conn_resp.eid; 7159 ab->wmi_ab.max_msg_len[pdev_idx] = conn_resp.max_msg_len; 7160 7161 return 0; 7162 } 7163 7164 static int 7165 ath12k_wmi_send_unit_test_cmd(struct ath12k *ar, 7166 struct wmi_unit_test_cmd ut_cmd, 7167 u32 *test_args) 7168 { 7169 struct ath12k_wmi_pdev *wmi = ar->wmi; 7170 struct wmi_unit_test_cmd *cmd; 7171 struct sk_buff *skb; 7172 struct wmi_tlv *tlv; 7173 void *ptr; 7174 u32 *ut_cmd_args; 7175 int buf_len, arg_len; 7176 int ret; 7177 int i; 7178 7179 arg_len = sizeof(u32) * le32_to_cpu(ut_cmd.num_args); 7180 buf_len = sizeof(ut_cmd) + arg_len + TLV_HDR_SIZE; 7181 7182 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, buf_len); 7183 if (!skb) 7184 return -ENOMEM; 7185 7186 cmd = (struct wmi_unit_test_cmd *)skb->data; 7187 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_UNIT_TEST_CMD, 7188 sizeof(ut_cmd)); 7189 7190 cmd->vdev_id = ut_cmd.vdev_id; 7191 cmd->module_id = ut_cmd.module_id; 7192 cmd->num_args = ut_cmd.num_args; 7193 cmd->diag_token = ut_cmd.diag_token; 7194 7195 ptr = skb->data + sizeof(ut_cmd); 7196 7197 tlv = ptr; 7198 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, arg_len); 7199 7200 ptr += TLV_HDR_SIZE; 7201 7202 ut_cmd_args = ptr; 7203 for (i = 0; i < le32_to_cpu(ut_cmd.num_args); i++) 7204 ut_cmd_args[i] = test_args[i]; 7205 7206 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 7207 "WMI unit test : module %d vdev %d n_args %d token %d\n", 7208 cmd->module_id, cmd->vdev_id, cmd->num_args, 7209 cmd->diag_token); 7210 7211 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_UNIT_TEST_CMDID); 7212 7213 if (ret) { 7214 ath12k_warn(ar->ab, "failed to send WMI_UNIT_TEST CMD :%d\n", 7215 ret); 7216 dev_kfree_skb(skb); 7217 } 7218 7219 return ret; 7220 } 7221 7222 int ath12k_wmi_simulate_radar(struct ath12k *ar) 7223 { 7224 struct ath12k_vif *arvif; 7225 u32 dfs_args[DFS_MAX_TEST_ARGS]; 7226 struct wmi_unit_test_cmd wmi_ut; 7227 bool arvif_found = false; 7228 7229 list_for_each_entry(arvif, &ar->arvifs, list) { 7230 if (arvif->is_started && arvif->vdev_type == WMI_VDEV_TYPE_AP) { 7231 arvif_found = true; 7232 break; 7233 } 7234 } 7235 7236 if (!arvif_found) 7237 return -EINVAL; 7238 7239 dfs_args[DFS_TEST_CMDID] = 0; 7240 dfs_args[DFS_TEST_PDEV_ID] = ar->pdev->pdev_id; 7241 /* Currently we could pass segment_id(b0 - b1), chirp(b2) 7242 * freq offset (b3 - b10) to unit test. For simulation 7243 * purpose this can be set to 0 which is valid. 7244 */ 7245 dfs_args[DFS_TEST_RADAR_PARAM] = 0; 7246 7247 wmi_ut.vdev_id = cpu_to_le32(arvif->vdev_id); 7248 wmi_ut.module_id = cpu_to_le32(DFS_UNIT_TEST_MODULE); 7249 wmi_ut.num_args = cpu_to_le32(DFS_MAX_TEST_ARGS); 7250 wmi_ut.diag_token = cpu_to_le32(DFS_UNIT_TEST_TOKEN); 7251 7252 ath12k_dbg(ar->ab, ATH12K_DBG_REG, "Triggering Radar Simulation\n"); 7253 7254 return ath12k_wmi_send_unit_test_cmd(ar, wmi_ut, dfs_args); 7255 } 7256 7257 int ath12k_wmi_connect(struct ath12k_base *ab) 7258 { 7259 u32 i; 7260 u8 wmi_ep_count; 7261 7262 wmi_ep_count = ab->htc.wmi_ep_count; 7263 if (wmi_ep_count > ab->hw_params->max_radios) 7264 return -1; 7265 7266 for (i = 0; i < wmi_ep_count; i++) 7267 ath12k_connect_pdev_htc_service(ab, i); 7268 7269 return 0; 7270 } 7271 7272 static void ath12k_wmi_pdev_detach(struct ath12k_base *ab, u8 pdev_id) 7273 { 7274 if (WARN_ON(pdev_id >= MAX_RADIOS)) 7275 return; 7276 7277 /* TODO: Deinit any pdev specific wmi resource */ 7278 } 7279 7280 int ath12k_wmi_pdev_attach(struct ath12k_base *ab, 7281 u8 pdev_id) 7282 { 7283 struct ath12k_wmi_pdev *wmi_handle; 7284 7285 if (pdev_id >= ab->hw_params->max_radios) 7286 return -EINVAL; 7287 7288 wmi_handle = &ab->wmi_ab.wmi[pdev_id]; 7289 7290 wmi_handle->wmi_ab = &ab->wmi_ab; 7291 7292 ab->wmi_ab.ab = ab; 7293 /* TODO: Init remaining resource specific to pdev */ 7294 7295 return 0; 7296 } 7297 7298 int ath12k_wmi_attach(struct ath12k_base *ab) 7299 { 7300 int ret; 7301 7302 ret = ath12k_wmi_pdev_attach(ab, 0); 7303 if (ret) 7304 return ret; 7305 7306 ab->wmi_ab.ab = ab; 7307 ab->wmi_ab.preferred_hw_mode = WMI_HOST_HW_MODE_MAX; 7308 7309 /* It's overwritten when service_ext_ready is handled */ 7310 if (ab->hw_params->single_pdev_only) 7311 ab->wmi_ab.preferred_hw_mode = WMI_HOST_HW_MODE_SINGLE; 7312 7313 /* TODO: Init remaining wmi soc resources required */ 7314 init_completion(&ab->wmi_ab.service_ready); 7315 init_completion(&ab->wmi_ab.unified_ready); 7316 7317 return 0; 7318 } 7319 7320 void ath12k_wmi_detach(struct ath12k_base *ab) 7321 { 7322 int i; 7323 7324 /* TODO: Deinit wmi resource specific to SOC as required */ 7325 7326 for (i = 0; i < ab->htc.wmi_ep_count; i++) 7327 ath12k_wmi_pdev_detach(ab, i); 7328 7329 ath12k_wmi_free_dbring_caps(ab); 7330 } 7331