1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */ 2 /* 3 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved. 4 * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. 5 */ 6 7 #ifndef ATH12K_CORE_H 8 #define ATH12K_CORE_H 9 10 #include <linux/types.h> 11 #include <linux/interrupt.h> 12 #include <linux/irq.h> 13 #include <linux/bitfield.h> 14 #include <linux/dmi.h> 15 #include <linux/ctype.h> 16 #include <linux/firmware.h> 17 #include <linux/of_reserved_mem.h> 18 #include <linux/panic_notifier.h> 19 #include <linux/average.h> 20 #include <linux/of.h> 21 #include <linux/rhashtable.h> 22 #include "qmi.h" 23 #include "htc.h" 24 #include "wmi.h" 25 #include "hal.h" 26 #include "dp.h" 27 #include "ce.h" 28 #include "mac.h" 29 #include "hw.h" 30 #include "reg.h" 31 #include "dbring.h" 32 #include "fw.h" 33 #include "acpi.h" 34 #include "wow.h" 35 #include "debugfs_htt_stats.h" 36 #include "coredump.h" 37 #include "cmn_defs.h" 38 #include "dp_cmn.h" 39 #include "thermal.h" 40 41 #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK) 42 43 #define ATH12K_TX_MGMT_NUM_PENDING_MAX 512 44 45 #define ATH12K_TX_MGMT_TARGET_MAX_SUPPORT_WMI 64 46 47 /* Pending management packets threshold for dropping probe responses */ 48 #define ATH12K_PRB_RSP_DROP_THRESHOLD ((ATH12K_TX_MGMT_TARGET_MAX_SUPPORT_WMI * 3) / 4) 49 50 /* SMBIOS type containing Board Data File Name Extension */ 51 #define ATH12K_SMBIOS_BDF_EXT_TYPE 0xF8 52 53 /* SMBIOS type structure length (excluding strings-set) */ 54 #define ATH12K_SMBIOS_BDF_EXT_LENGTH 0x9 55 56 /* The magic used by QCA spec */ 57 #define ATH12K_SMBIOS_BDF_EXT_MAGIC "BDF_" 58 59 #define ATH12K_INVALID_HW_MAC_ID 0xFF 60 #define ATH12K_CONNECTION_LOSS_HZ (3 * HZ) 61 62 #define ATH12K_MON_TIMER_INTERVAL 10 63 #define ATH12K_RESET_TIMEOUT_HZ (20 * HZ) 64 #define ATH12K_RESET_MAX_FAIL_COUNT_FIRST 3 65 #define ATH12K_RESET_MAX_FAIL_COUNT_FINAL 5 66 #define ATH12K_RESET_FAIL_TIMEOUT_HZ (20 * HZ) 67 #define ATH12K_RECONFIGURE_TIMEOUT_HZ (10 * HZ) 68 #define ATH12K_RECOVER_START_TIMEOUT_HZ (20 * HZ) 69 70 #define ATH12K_INVALID_GROUP_ID 0xFF 71 #define ATH12K_INVALID_DEVICE_ID 0xFF 72 73 #define ATH12K_MAX_MLO_PEERS 256 74 #define ATH12K_MLO_PEER_ID_INVALID 0xFFFF 75 76 #define ATH12K_INVALID_RSSI_FULL -1 77 #define ATH12K_INVALID_RSSI_EMPTY -128 78 79 enum ath12k_bdf_search { 80 ATH12K_BDF_SEARCH_DEFAULT, 81 ATH12K_BDF_SEARCH_BUS_AND_BOARD, 82 }; 83 84 enum wme_ac { 85 WME_AC_BE, 86 WME_AC_BK, 87 WME_AC_VI, 88 WME_AC_VO, 89 WME_NUM_AC 90 }; 91 92 #define ATH12K_HT_MCS_MAX 7 93 #define ATH12K_VHT_MCS_MAX 9 94 #define ATH12K_HE_MCS_MAX 11 95 #define ATH12K_EHT_MCS_MAX 15 96 97 enum ath12k_crypt_mode { 98 /* Only use hardware crypto engine */ 99 ATH12K_CRYPT_MODE_HW, 100 /* Only use software crypto */ 101 ATH12K_CRYPT_MODE_SW, 102 }; 103 104 static inline enum wme_ac ath12k_tid_to_ac(u32 tid) 105 { 106 return (((tid == 0) || (tid == 3)) ? WME_AC_BE : 107 ((tid == 1) || (tid == 2)) ? WME_AC_BK : 108 ((tid == 4) || (tid == 5)) ? WME_AC_VI : 109 WME_AC_VO); 110 } 111 112 static inline u64 ath12k_le32hilo_to_u64(__le32 hi, __le32 lo) 113 { 114 u64 hi64 = le32_to_cpu(hi); 115 u64 lo64 = le32_to_cpu(lo); 116 117 return (hi64 << 32) | lo64; 118 } 119 120 enum ath12k_skb_flags { 121 ATH12K_SKB_HW_80211_ENCAP = BIT(0), 122 ATH12K_SKB_CIPHER_SET = BIT(1), 123 ATH12K_SKB_MLO_STA = BIT(2), 124 }; 125 126 struct ath12k_skb_cb { 127 dma_addr_t paddr; 128 struct ath12k *ar; 129 struct ieee80211_vif *vif; 130 dma_addr_t paddr_ext_desc; 131 u32 cipher; 132 u8 flags; 133 u8 link_id; 134 }; 135 136 struct ath12k_skb_rxcb { 137 dma_addr_t paddr; 138 bool is_first_msdu; 139 bool is_last_msdu; 140 bool is_continuation; 141 bool is_mcbc; 142 bool is_eapol; 143 struct hal_rx_desc *rx_desc; 144 u8 err_rel_src; 145 u8 err_code; 146 u8 hw_link_id; 147 u8 unmapped; 148 u8 is_frag; 149 u8 tid; 150 u16 peer_id; 151 bool is_end_of_ppdu; 152 }; 153 154 enum ath12k_hw_rev { 155 ATH12K_HW_QCN9274_HW10, 156 ATH12K_HW_QCN9274_HW20, 157 ATH12K_HW_WCN7850_HW20, 158 ATH12K_HW_IPQ5332_HW10, 159 ATH12K_HW_QCC2072_HW10, 160 }; 161 162 enum ath12k_firmware_mode { 163 /* the default mode, standard 802.11 functionality */ 164 ATH12K_FIRMWARE_MODE_NORMAL, 165 166 /* factory tests etc */ 167 ATH12K_FIRMWARE_MODE_FTM, 168 }; 169 170 #define ATH12K_IRQ_NUM_MAX 57 171 #define ATH12K_EXT_IRQ_NUM_MAX 16 172 #define ATH12K_MAX_TCL_RING_NUM 3 173 174 struct ath12k_ext_irq_grp { 175 struct ath12k_base *ab; 176 u32 irqs[ATH12K_EXT_IRQ_NUM_MAX]; 177 u32 num_irq; 178 u32 grp_id; 179 u64 timestamp; 180 bool napi_enabled; 181 struct napi_struct napi; 182 struct net_device *napi_ndev; 183 }; 184 185 enum ath12k_smbios_cc_type { 186 /* disable country code setting from SMBIOS */ 187 ATH12K_SMBIOS_CC_DISABLE = 0, 188 189 /* set country code by ANSI country name, based on ISO3166-1 alpha2 */ 190 ATH12K_SMBIOS_CC_ISO = 1, 191 192 /* worldwide regdomain */ 193 ATH12K_SMBIOS_CC_WW = 2, 194 }; 195 196 struct ath12k_smbios_bdf { 197 struct dmi_header hdr; 198 u8 features_disabled; 199 200 /* enum ath12k_smbios_cc_type */ 201 u8 country_code_flag; 202 203 /* To set specific country, you need to set country code 204 * flag=ATH12K_SMBIOS_CC_ISO first, then if country is United 205 * States, then country code value = 0x5553 ("US",'U' = 0x55, 'S'= 206 * 0x53). To set country to INDONESIA, then country code value = 207 * 0x4944 ("IN", 'I'=0x49, 'D'=0x44). If country code flag = 208 * ATH12K_SMBIOS_CC_WW, then you can use worldwide regulatory 209 * setting. 210 */ 211 u16 cc_code; 212 213 u8 bdf_enabled; 214 u8 bdf_ext[]; 215 } __packed; 216 217 #define HEHANDLE_CAP_PHYINFO_SIZE 3 218 #define HECAP_PHYINFO_SIZE 9 219 #define HECAP_MACINFO_SIZE 5 220 #define HECAP_TXRX_MCS_NSS_SIZE 2 221 #define HECAP_PPET16_PPET8_MAX_SIZE 25 222 223 #define HE_PPET16_PPET8_SIZE 8 224 225 /* 802.11ax PPE (PPDU packet Extension) threshold */ 226 struct he_ppe_threshold { 227 u32 numss_m1; 228 u32 ru_mask; 229 u32 ppet16_ppet8_ru3_ru0[HE_PPET16_PPET8_SIZE]; 230 }; 231 232 struct ath12k_he { 233 u8 hecap_macinfo[HECAP_MACINFO_SIZE]; 234 u32 hecap_rxmcsnssmap; 235 u32 hecap_txmcsnssmap; 236 u32 hecap_phyinfo[HEHANDLE_CAP_PHYINFO_SIZE]; 237 struct he_ppe_threshold hecap_ppet; 238 u32 heop_param; 239 }; 240 241 enum { 242 WMI_HOST_TP_SCALE_MAX = 0, 243 WMI_HOST_TP_SCALE_50 = 1, 244 WMI_HOST_TP_SCALE_25 = 2, 245 WMI_HOST_TP_SCALE_12 = 3, 246 WMI_HOST_TP_SCALE_MIN = 4, 247 WMI_HOST_TP_SCALE_SIZE = 5, 248 }; 249 250 enum ath12k_scan_state { 251 ATH12K_SCAN_IDLE, 252 ATH12K_SCAN_STARTING, 253 ATH12K_SCAN_RUNNING, 254 ATH12K_SCAN_ABORTING, 255 }; 256 257 enum ath12k_11d_state { 258 ATH12K_11D_IDLE, 259 ATH12K_11D_PREPARING, 260 ATH12K_11D_RUNNING, 261 }; 262 263 enum ath12k_hw_group_flags { 264 ATH12K_GROUP_FLAG_REGISTERED, 265 ATH12K_GROUP_FLAG_UNREGISTER, 266 }; 267 268 enum ath12k_dev_flags { 269 ATH12K_FLAG_CAC_RUNNING, 270 ATH12K_FLAG_CRASH_FLUSH, 271 ATH12K_FLAG_RAW_MODE, 272 ATH12K_FLAG_HW_CRYPTO_DISABLED, 273 ATH12K_FLAG_RECOVERY, 274 ATH12K_FLAG_UNREGISTERING, 275 ATH12K_FLAG_REGISTERED, 276 ATH12K_FLAG_QMI_FAIL, 277 ATH12K_FLAG_HTC_SUSPEND_COMPLETE, 278 ATH12K_FLAG_CE_IRQ_ENABLED, 279 ATH12K_FLAG_EXT_IRQ_ENABLED, 280 ATH12K_FLAG_QMI_FW_READY_COMPLETE, 281 ATH12K_FLAG_FTM_SEGMENTED, 282 ATH12K_FLAG_FIXED_MEM_REGION, 283 }; 284 285 struct ath12k_tx_conf { 286 bool changed; 287 u16 ac; 288 struct ieee80211_tx_queue_params tx_queue_params; 289 }; 290 291 struct ath12k_key_conf { 292 enum set_key_cmd cmd; 293 struct list_head list; 294 struct ieee80211_sta *sta; 295 struct ieee80211_key_conf *key; 296 }; 297 298 struct ath12k_vif_cache { 299 struct ath12k_tx_conf tx_conf; 300 struct ath12k_key_conf key_conf; 301 u32 bss_conf_changed; 302 }; 303 304 struct ath12k_rekey_data { 305 u8 kck[NL80211_KCK_LEN]; 306 u8 kek[NL80211_KCK_LEN]; 307 u64 replay_ctr; 308 bool enable_offload; 309 }; 310 311 struct ath12k_link_vif { 312 u32 vdev_id; 313 u32 beacon_interval; 314 u32 dtim_period; 315 316 struct ath12k *ar; 317 318 bool beacon_prot; 319 320 struct wmi_wmm_params_all_arg wmm_params; 321 struct list_head list; 322 323 bool is_created; 324 bool is_started; 325 bool is_up; 326 u8 bssid[ETH_ALEN]; 327 struct cfg80211_bitrate_mask bitrate_mask; 328 struct delayed_work connection_loss_work; 329 int num_legacy_stations; 330 int rtscts_prot_mode; 331 int txpower; 332 bool rsnie_present; 333 bool wpaie_present; 334 u8 vdev_stats_id; 335 u32 punct_bitmap; 336 u8 link_id; 337 struct ath12k_vif *ahvif; 338 struct ath12k_rekey_data rekey_data; 339 struct ath12k_link_stats link_stats; 340 spinlock_t link_stats_lock; /* Protects updates to link_stats */ 341 342 u8 current_cntdown_counter; 343 344 /* only used in station mode */ 345 bool is_sta_assoc_link; 346 347 struct ath12k_reg_tpc_power_info reg_tpc_info; 348 349 bool group_key_valid; 350 struct wmi_vdev_install_key_arg group_key; 351 bool pairwise_key_done; 352 u16 num_stations; 353 bool is_csa_in_progress; 354 struct wiphy_work bcn_tx_work; 355 }; 356 357 struct ath12k_vif { 358 struct ath12k_dp_vif dp_vif; 359 360 enum wmi_vdev_type vdev_type; 361 enum wmi_vdev_subtype vdev_subtype; 362 struct ieee80211_vif *vif; 363 struct ath12k_hw *ah; 364 365 union { 366 struct { 367 u32 uapsd; 368 } sta; 369 struct { 370 /* 127 stations; wmi limit */ 371 u8 tim_bitmap[16]; 372 u8 tim_len; 373 u32 ssid_len; 374 u8 ssid[IEEE80211_MAX_SSID_LEN]; 375 bool hidden_ssid; 376 /* P2P_IE with NoA attribute for P2P_GO case */ 377 u32 noa_len; 378 u8 *noa_data; 379 } ap; 380 } u; 381 382 u32 aid; 383 bool ps; 384 385 struct ath12k_link_vif deflink; 386 struct ath12k_link_vif __rcu *link[ATH12K_NUM_MAX_LINKS]; 387 struct ath12k_vif_cache *cache[IEEE80211_MLD_MAX_NUM_LINKS]; 388 /* indicates bitmap of link vif created in FW */ 389 u32 links_map; 390 /* Must be last - ends in a flexible-array member. 391 * 392 * FIXME: Driver should not copy struct ieee80211_chanctx_conf, 393 * especially because it has a flexible array. Find a better way. 394 */ 395 struct ieee80211_chanctx_conf chanctx; 396 }; 397 398 struct ath12k_vif_iter { 399 u32 vdev_id; 400 struct ath12k *ar; 401 struct ath12k_link_vif *arvif; 402 }; 403 404 #define ATH12K_SCAN_TIMEOUT_HZ (20 * HZ) 405 406 #define ATH12K_HE_MCS_NUM 12 407 #define ATH12K_VHT_MCS_NUM 10 408 #define ATH12K_BW_NUM 5 409 #define ATH12K_NSS_NUM 4 410 #define ATH12K_LEGACY_NUM 12 411 #define ATH12K_GI_NUM 4 412 #define ATH12K_HT_MCS_NUM 32 413 414 enum ath12k_pkt_rx_err { 415 ATH12K_PKT_RX_ERR_FCS, 416 ATH12K_PKT_RX_ERR_TKIP, 417 ATH12K_PKT_RX_ERR_CRYPT, 418 ATH12K_PKT_RX_ERR_PEER_IDX_INVAL, 419 ATH12K_PKT_RX_ERR_MAX, 420 }; 421 422 enum ath12k_ampdu_subfrm_num { 423 ATH12K_AMPDU_SUBFRM_NUM_10, 424 ATH12K_AMPDU_SUBFRM_NUM_20, 425 ATH12K_AMPDU_SUBFRM_NUM_30, 426 ATH12K_AMPDU_SUBFRM_NUM_40, 427 ATH12K_AMPDU_SUBFRM_NUM_50, 428 ATH12K_AMPDU_SUBFRM_NUM_60, 429 ATH12K_AMPDU_SUBFRM_NUM_MORE, 430 ATH12K_AMPDU_SUBFRM_NUM_MAX, 431 }; 432 433 enum ath12k_amsdu_subfrm_num { 434 ATH12K_AMSDU_SUBFRM_NUM_1, 435 ATH12K_AMSDU_SUBFRM_NUM_2, 436 ATH12K_AMSDU_SUBFRM_NUM_3, 437 ATH12K_AMSDU_SUBFRM_NUM_4, 438 ATH12K_AMSDU_SUBFRM_NUM_MORE, 439 ATH12K_AMSDU_SUBFRM_NUM_MAX, 440 }; 441 442 enum ath12k_counter_type { 443 ATH12K_COUNTER_TYPE_BYTES, 444 ATH12K_COUNTER_TYPE_PKTS, 445 ATH12K_COUNTER_TYPE_MAX, 446 }; 447 448 enum ath12k_stats_type { 449 ATH12K_STATS_TYPE_SUCC, 450 ATH12K_STATS_TYPE_FAIL, 451 ATH12K_STATS_TYPE_RETRY, 452 ATH12K_STATS_TYPE_AMPDU, 453 ATH12K_STATS_TYPE_MAX, 454 }; 455 456 struct ath12k_htt_data_stats { 457 u64 legacy[ATH12K_COUNTER_TYPE_MAX][ATH12K_LEGACY_NUM]; 458 u64 ht[ATH12K_COUNTER_TYPE_MAX][ATH12K_HT_MCS_NUM]; 459 u64 vht[ATH12K_COUNTER_TYPE_MAX][ATH12K_VHT_MCS_NUM]; 460 u64 he[ATH12K_COUNTER_TYPE_MAX][ATH12K_HE_MCS_NUM]; 461 u64 bw[ATH12K_COUNTER_TYPE_MAX][ATH12K_BW_NUM]; 462 u64 nss[ATH12K_COUNTER_TYPE_MAX][ATH12K_NSS_NUM]; 463 u64 gi[ATH12K_COUNTER_TYPE_MAX][ATH12K_GI_NUM]; 464 u64 transmit_type[ATH12K_COUNTER_TYPE_MAX][HAL_RX_RECEPTION_TYPE_MAX]; 465 u64 ru_loc[ATH12K_COUNTER_TYPE_MAX][HAL_RX_RU_ALLOC_TYPE_MAX]; 466 }; 467 468 struct ath12k_htt_tx_stats { 469 struct ath12k_htt_data_stats stats[ATH12K_STATS_TYPE_MAX]; 470 u64 tx_duration; 471 u64 ba_fails; 472 u64 ack_fails; 473 u16 ru_start; 474 u16 ru_tones; 475 u32 mu_group[MAX_MU_GROUP_ID]; 476 }; 477 478 struct ath12k_per_ppdu_tx_stats { 479 u16 succ_pkts; 480 u16 failed_pkts; 481 u16 retry_pkts; 482 u32 succ_bytes; 483 u32 failed_bytes; 484 u32 retry_bytes; 485 }; 486 487 struct ath12k_link_sta { 488 struct ath12k_link_vif *arvif; 489 struct ath12k_sta *ahsta; 490 491 /* link address similar to ieee80211_link_sta */ 492 u8 addr[ETH_ALEN]; 493 494 /* the following are protected by ar->data_lock */ 495 u32 changed; /* IEEE80211_RC_* */ 496 u32 bw; 497 u32 nss; 498 u32 smps; 499 500 struct wiphy_work update_wk; 501 u8 link_id; 502 u32 bw_prev; 503 u32 peer_nss; 504 s8 rssi_beacon; 505 s8 chain_signal[IEEE80211_MAX_CHAINS]; 506 507 /* For now the assoc link will be considered primary */ 508 bool is_assoc_link; 509 510 /* for firmware use only */ 511 u8 link_idx; 512 513 /* peer addr based rhashtable list pointer */ 514 struct rhash_head rhash_addr; 515 }; 516 517 struct ath12k_sta { 518 struct ath12k_vif *ahvif; 519 enum hal_pn_type pn_type; 520 struct ath12k_link_sta deflink; 521 struct ath12k_link_sta __rcu *link[IEEE80211_MLD_MAX_NUM_LINKS]; 522 /* indicates bitmap of link sta created in FW */ 523 u16 links_map; 524 u8 assoc_link_id; 525 u16 ml_peer_id; 526 u16 free_logical_link_idx_map; 527 528 enum ieee80211_sta_state state; 529 }; 530 531 #define ATH12K_HALF_20MHZ_BW 10 532 #define ATH12K_2GHZ_MIN_CENTER 2412 533 #define ATH12K_2GHZ_MAX_CENTER 2484 534 #define ATH12K_5GHZ_MIN_CENTER 4900 535 #define ATH12K_5GHZ_MAX_CENTER 5920 536 #define ATH12K_6GHZ_MIN_CENTER 5935 537 #define ATH12K_6GHZ_MAX_CENTER 7115 538 #define ATH12K_MIN_2GHZ_FREQ (ATH12K_2GHZ_MIN_CENTER - ATH12K_HALF_20MHZ_BW - 1) 539 #define ATH12K_MAX_2GHZ_FREQ (ATH12K_2GHZ_MAX_CENTER + ATH12K_HALF_20MHZ_BW + 1) 540 #define ATH12K_MIN_5GHZ_FREQ (ATH12K_5GHZ_MIN_CENTER - ATH12K_HALF_20MHZ_BW) 541 #define ATH12K_MAX_5GHZ_FREQ (ATH12K_5GHZ_MAX_CENTER + ATH12K_HALF_20MHZ_BW) 542 #define ATH12K_MIN_6GHZ_FREQ (ATH12K_6GHZ_MIN_CENTER - ATH12K_HALF_20MHZ_BW) 543 #define ATH12K_MAX_6GHZ_FREQ (ATH12K_6GHZ_MAX_CENTER + ATH12K_HALF_20MHZ_BW) 544 #define ATH12K_NUM_CHANS 101 545 #define ATH12K_MAX_5GHZ_CHAN 173 546 547 static inline bool ath12k_is_2ghz_channel_freq(u32 freq) 548 { 549 return freq >= ATH12K_MIN_2GHZ_FREQ && 550 freq <= ATH12K_MAX_2GHZ_FREQ; 551 } 552 553 enum ath12k_hw_state { 554 ATH12K_HW_STATE_OFF, 555 ATH12K_HW_STATE_ON, 556 ATH12K_HW_STATE_RESTARTING, 557 ATH12K_HW_STATE_RESTARTED, 558 ATH12K_HW_STATE_WEDGED, 559 ATH12K_HW_STATE_TM, 560 /* Add other states as required */ 561 }; 562 563 /* Antenna noise floor */ 564 #define ATH12K_DEFAULT_NOISE_FLOOR -95 565 566 struct ath12k_ftm_event_obj { 567 u32 data_pos; 568 u32 expected_seq; 569 u8 *eventdata; 570 }; 571 572 struct ath12k_fw_stats { 573 u32 pdev_id; 574 u32 stats_id; 575 struct list_head pdevs; 576 struct list_head vdevs; 577 struct list_head bcn; 578 u32 num_vdev_recvd; 579 }; 580 581 struct ath12k_dbg_htt_stats { 582 enum ath12k_dbg_htt_ext_stats_type type; 583 u32 cfg_param[4]; 584 u8 reset; 585 struct debug_htt_stats_req *stats_req; 586 }; 587 588 struct ath12k_debug { 589 struct dentry *debugfs_pdev; 590 struct dentry *debugfs_pdev_symlink; 591 struct ath12k_dbg_htt_stats htt_stats; 592 enum wmi_halphy_ctrl_path_stats_id tpc_stats_type; 593 bool tpc_request; 594 struct completion tpc_complete; 595 struct wmi_tpc_stats_arg *tpc_stats; 596 u32 rx_filter; 597 bool extd_rx_stats; 598 }; 599 600 struct ath12k_pdev_rssi_offsets { 601 s32 temp_offset; 602 s8 min_nf_dbm; 603 /* Cache the sum here to avoid calculating it every time in hot path 604 * noise_floor = min_nf_dbm + temp_offset 605 */ 606 s32 noise_floor; 607 }; 608 609 #define ATH12K_FLUSH_TIMEOUT (5 * HZ) 610 #define ATH12K_VDEV_DELETE_TIMEOUT_HZ (5 * HZ) 611 612 struct ath12k { 613 struct ath12k_base *ab; 614 struct ath12k_pdev *pdev; 615 struct ath12k_hw *ah; 616 struct ath12k_wmi_pdev *wmi; 617 struct ath12k_pdev_dp dp; 618 u8 mac_addr[ETH_ALEN]; 619 u32 ht_cap_info; 620 u32 vht_cap_info; 621 struct ath12k_he ar_he; 622 bool supports_6ghz; 623 struct { 624 struct completion started; 625 struct completion completed; 626 struct completion on_channel; 627 struct delayed_work timeout; 628 enum ath12k_scan_state state; 629 bool is_roc; 630 int roc_freq; 631 bool roc_notify; 632 struct wiphy_work vdev_clean_wk; 633 struct ath12k_link_vif *arvif; 634 } scan; 635 636 struct { 637 struct ieee80211_supported_band sbands[NUM_NL80211_BANDS]; 638 struct ieee80211_sband_iftype_data 639 iftype[NUM_NL80211_BANDS][NUM_NL80211_IFTYPES]; 640 } mac; 641 642 unsigned long dev_flags; 643 unsigned int filter_flags; 644 u32 min_tx_power; 645 u32 max_tx_power; 646 u32 txpower_limit_2g; 647 u32 txpower_limit_5g; 648 u32 txpower_scale; 649 u32 power_scale; 650 u32 chan_tx_pwr; 651 u32 rts_threshold; 652 u32 num_stations; 653 u32 max_num_stations; 654 655 /* protects the radio specific data like debug stats, ppdu_stats_info stats, 656 * vdev_stop_status info, scan data, ath12k_sta info, ath12k_link_vif info, 657 * channel context data, survey info, test mode data, regd_channel_update_queue. 658 */ 659 spinlock_t data_lock; 660 661 struct list_head arvifs; 662 /* should never be NULL; needed for regular htt rx */ 663 struct ieee80211_channel *rx_channel; 664 665 /* valid during scan; needed for mgmt rx during scan */ 666 struct ieee80211_channel *scan_channel; 667 668 u8 cfg_tx_chainmask; 669 u8 cfg_rx_chainmask; 670 u8 num_rx_chains; 671 u8 num_tx_chains; 672 /* pdev_idx starts from 0 whereas pdev->pdev_id starts with 1 */ 673 u8 pdev_idx; 674 u8 lmac_id; 675 u8 hw_link_id; 676 677 struct completion peer_assoc_done; 678 struct completion peer_delete_done; 679 680 int install_key_status; 681 struct completion install_key_done; 682 683 int last_wmi_vdev_start_status; 684 struct completion vdev_setup_done; 685 struct completion vdev_delete_done; 686 687 int num_peers; 688 int max_num_peers; 689 u32 num_started_vdevs; 690 u32 num_created_vdevs; 691 unsigned long long allocated_vdev_map; 692 693 struct idr txmgmt_idr; 694 /* protects txmgmt_idr data */ 695 spinlock_t txmgmt_idr_lock; 696 atomic_t num_pending_mgmt_tx; 697 wait_queue_head_t txmgmt_empty_waitq; 698 699 /* cycle count is reported twice for each visited channel during scan. 700 * access protected by data_lock 701 */ 702 u32 survey_last_rx_clear_count; 703 u32 survey_last_cycle_count; 704 705 /* Channel info events are expected to come in pairs without and with 706 * COMPLETE flag set respectively for each channel visit during scan. 707 * 708 * However there are deviations from this rule. This flag is used to 709 * avoid reporting garbage data. 710 */ 711 bool ch_info_can_report_survey; 712 struct survey_info survey[ATH12K_NUM_CHANS]; 713 struct completion bss_survey_done; 714 715 struct work_struct regd_update_work; 716 struct work_struct regd_channel_update_work; 717 struct list_head regd_channel_update_queue; 718 719 struct wiphy_work wmi_mgmt_tx_work; 720 struct sk_buff_head wmi_mgmt_tx_queue; 721 722 struct ath12k_wow wow; 723 struct completion target_suspend; 724 bool target_suspend_ack; 725 726 struct ath12k_per_peer_tx_stats cached_stats; 727 u32 last_ppdu_id; 728 u32 cached_ppdu_id; 729 #ifdef CONFIG_ATH12K_DEBUGFS 730 struct ath12k_debug debug; 731 #endif 732 733 bool dfs_block_radar_events; 734 bool monitor_vdev_created; 735 bool monitor_started; 736 int monitor_vdev_id; 737 738 struct wiphy_radio_freq_range freq_range; 739 740 bool nlo_enabled; 741 742 /* Protected by wiphy::mtx lock. */ 743 u32 vdev_id_11d_scan; 744 struct completion completed_11d_scan; 745 enum ath12k_11d_state state_11d; 746 u8 alpha2[REG_ALPHA2_LEN]; 747 bool regdom_set_by_user; 748 struct completion regd_update_completed; 749 750 struct completion fw_stats_complete; 751 struct completion fw_stats_done; 752 753 struct completion mlo_setup_done; 754 u32 mlo_setup_status; 755 u8 ftm_msgref; 756 struct ath12k_fw_stats fw_stats; 757 unsigned long last_tx_power_update; 758 759 s8 max_allowed_tx_power; 760 struct ath12k_pdev_rssi_offsets rssi_info; 761 762 struct ath12k_thermal thermal; 763 }; 764 765 struct ath12k_hw { 766 struct ieee80211_hw *hw; 767 struct device *dev; 768 769 /* Protect the write operation of the hardware state ath12k_hw::state 770 * between hardware start<=>reconfigure<=>stop transitions. 771 */ 772 struct mutex hw_mutex; 773 enum ath12k_hw_state state; 774 bool regd_updated; 775 bool use_6ghz_regd; 776 777 u8 num_radio; 778 779 DECLARE_BITMAP(free_ml_peer_id_map, ATH12K_MAX_MLO_PEERS); 780 781 struct ath12k_dp_hw dp_hw; 782 783 /* Keep last */ 784 struct ath12k radio[] __aligned(sizeof(void *)); 785 }; 786 787 struct ath12k_band_cap { 788 u32 phy_id; 789 u32 max_bw_supported; 790 u32 ht_cap_info; 791 u32 he_cap_info[2]; 792 u32 he_mcs; 793 u32 he_cap_phy_info[PSOC_HOST_MAX_PHY_SIZE]; 794 struct ath12k_wmi_ppe_threshold_arg he_ppet; 795 u16 he_6ghz_capa; 796 u32 eht_cap_mac_info[WMI_MAX_EHTCAP_MAC_SIZE]; 797 u32 eht_cap_phy_info[WMI_MAX_EHTCAP_PHY_SIZE]; 798 u32 eht_mcs_20_only; 799 u32 eht_mcs_80; 800 u32 eht_mcs_160; 801 u32 eht_mcs_320; 802 struct ath12k_wmi_ppe_threshold_arg eht_ppet; 803 u32 eht_cap_info_internal; 804 }; 805 806 struct ath12k_pdev_cap { 807 u32 supported_bands; 808 u32 ampdu_density; 809 u32 vht_cap; 810 u32 vht_mcs; 811 u32 he_mcs; 812 u32 tx_chain_mask; 813 u32 rx_chain_mask; 814 u32 tx_chain_mask_shift; 815 u32 rx_chain_mask_shift; 816 struct ath12k_band_cap band[NUM_NL80211_BANDS]; 817 u32 eml_cap; 818 u32 mld_cap; 819 bool nss_ratio_enabled; 820 u8 nss_ratio_info; 821 }; 822 823 struct mlo_timestamp { 824 u32 info; 825 u32 sync_timestamp_lo_us; 826 u32 sync_timestamp_hi_us; 827 u32 mlo_offset_lo; 828 u32 mlo_offset_hi; 829 u32 mlo_offset_clks; 830 u32 mlo_comp_clks; 831 u32 mlo_comp_timer; 832 }; 833 834 struct ath12k_pdev { 835 struct ath12k *ar; 836 u32 pdev_id; 837 u32 hw_link_id; 838 struct ath12k_pdev_cap cap; 839 u8 mac_addr[ETH_ALEN]; 840 struct mlo_timestamp timestamp; 841 }; 842 843 struct ath12k_fw_pdev { 844 u32 pdev_id; 845 u32 phy_id; 846 u32 supported_bands; 847 }; 848 849 struct ath12k_board_data { 850 const struct firmware *fw; 851 const void *data; 852 size_t len; 853 }; 854 855 struct ath12k_reg_freq { 856 u32 start_freq; 857 u32 end_freq; 858 }; 859 860 struct ath12k_mlo_memory { 861 struct target_mem_chunk chunk[ATH12K_QMI_WLANFW_MAX_NUM_MEM_SEG_V01]; 862 int mlo_mem_size; 863 bool init_done; 864 }; 865 866 struct ath12k_hw_link { 867 u8 device_id; 868 u8 pdev_idx; 869 }; 870 871 /* Holds info on the group of devices that are registered as a single 872 * wiphy, protected with struct ath12k_hw_group::mutex. 873 */ 874 struct ath12k_hw_group { 875 /* Keep dp_hw_grp as the first member to allow efficient 876 * usage of cache lines for DP fields 877 */ 878 struct ath12k_dp_hw_group dp_hw_grp; 879 struct ath12k_hw_link hw_links[ATH12K_GROUP_MAX_RADIO]; 880 struct list_head list; 881 u8 id; 882 u8 num_devices; 883 u8 num_probed; 884 u8 num_started; 885 unsigned long flags; 886 struct ath12k_base *ab[ATH12K_MAX_DEVICES]; 887 888 /* protects access to this struct */ 889 struct mutex mutex; 890 891 /* Holds information of wiphy (hw) registration. 892 * 893 * In Multi/Single Link Operation case, all pdevs are registered as 894 * a single wiphy. In other (legacy/Non-MLO) cases, each pdev is 895 * registered as separate wiphys. 896 */ 897 struct ath12k_hw *ah[ATH12K_GROUP_MAX_RADIO]; 898 u8 num_hw; 899 bool mlo_capable; 900 struct device_node *wsi_node[ATH12K_MAX_DEVICES]; 901 struct ath12k_mlo_memory mlo_mem; 902 bool hw_link_id_init_done; 903 }; 904 905 /* Holds WSI info specific to each device, excluding WSI group info */ 906 struct ath12k_wsi_info { 907 u32 index; 908 u32 hw_link_id_base; 909 }; 910 911 struct ath12k_dp_profile_params { 912 u32 tx_comp_ring_size; 913 u32 rxdma_monitor_buf_ring_size; 914 u32 rxdma_monitor_dst_ring_size; 915 u32 num_pool_tx_desc; 916 u32 rx_desc_count; 917 }; 918 919 struct ath12k_mem_profile_based_param { 920 u32 num_vdevs; 921 u32 max_client_single; 922 u32 max_client_dbs; 923 u32 max_client_dbs_sbs; 924 struct ath12k_dp_profile_params dp_params; 925 }; 926 927 enum ath12k_device_family { 928 ATH12K_DEVICE_FAMILY_START, 929 ATH12K_DEVICE_FAMILY_WIFI7 = ATH12K_DEVICE_FAMILY_START, 930 ATH12K_DEVICE_FAMILY_MAX, 931 }; 932 933 /* Master structure to hold the hw data which may be used in core module */ 934 struct ath12k_base { 935 enum ath12k_hw_rev hw_rev; 936 struct platform_device *pdev; 937 struct device *dev; 938 struct ath12k_qmi qmi; 939 struct ath12k_wmi_base wmi_ab; 940 struct completion fw_ready; 941 u8 device_id; 942 int num_radios; 943 /* HW channel counters frequency value in hertz common to all MACs */ 944 u32 cc_freq_hz; 945 946 struct ath12k_dump_file_data *dump_data; 947 size_t ath12k_coredump_len; 948 struct work_struct dump_work; 949 950 struct ath12k_htc htc; 951 952 struct ath12k_dp *dp; 953 954 void __iomem *mem; 955 unsigned long mem_len; 956 957 void __iomem *mem_ce; 958 u32 ce_remap_base_addr; 959 u32 cmem_offset; 960 bool ce_remap; 961 962 struct { 963 enum ath12k_bus bus; 964 const struct ath12k_hif_ops *ops; 965 } hif; 966 967 struct { 968 struct completion wakeup_completed; 969 u32 wmi_conf_rx_decap_mode; 970 } wow; 971 972 struct ath12k_ce ce; 973 struct timer_list rx_replenish_retry; 974 struct ath12k_hal hal; 975 /* To synchronize core_start/core_stop */ 976 struct mutex core_lock; 977 /* Protects data like peers */ 978 spinlock_t base_lock; 979 980 /* Single pdev device (struct ath12k_hw_params::single_pdev_only): 981 * 982 * Firmware maintains data for all bands but advertises a single 983 * phy to the host which is stored as a single element in this 984 * array. 985 * 986 * Other devices: 987 * 988 * This array will contain as many elements as the number of 989 * radios. 990 */ 991 struct ath12k_pdev pdevs[MAX_RADIOS]; 992 993 /* struct ath12k_hw_params::single_pdev_only devices use this to 994 * store phy specific data 995 */ 996 struct ath12k_fw_pdev fw_pdev[MAX_RADIOS]; 997 u8 fw_pdev_count; 998 999 struct ath12k_pdev __rcu *pdevs_active[MAX_RADIOS]; 1000 1001 struct ath12k_wmi_hal_reg_capabilities_ext_arg hal_reg_cap[MAX_RADIOS]; 1002 unsigned long long free_vdev_map; 1003 unsigned long long free_vdev_stats_id_map; 1004 wait_queue_head_t peer_mapping_wq; 1005 u8 mac_addr[ETH_ALEN]; 1006 bool wmi_ready; 1007 u32 wlan_init_status; 1008 int irq_num[ATH12K_IRQ_NUM_MAX]; 1009 struct ath12k_ext_irq_grp ext_irq_grp[ATH12K_EXT_IRQ_GRP_NUM_MAX]; 1010 struct napi_struct *napi; 1011 struct ath12k_wmi_target_cap_arg target_caps; 1012 u32 ext_service_bitmap[WMI_SERVICE_EXT_BM_SIZE]; 1013 bool pdevs_macaddr_valid; 1014 1015 const struct ath12k_hw_params *hw_params; 1016 1017 const struct firmware *cal_file; 1018 1019 /* Below regd's are protected by ab->data_lock */ 1020 /* This is the regd set for every radio 1021 * by the firmware during initialization 1022 */ 1023 struct ieee80211_regdomain *default_regd[MAX_RADIOS]; 1024 /* This regd is set during dynamic country setting 1025 * This may or may not be used during the runtime 1026 */ 1027 struct ieee80211_regdomain *new_regd[MAX_RADIOS]; 1028 1029 struct ath12k_reg_info *reg_info[MAX_RADIOS]; 1030 1031 /* Current DFS Regulatory */ 1032 enum ath12k_dfs_region dfs_region; 1033 #ifdef CONFIG_ATH12K_DEBUGFS 1034 struct dentry *debugfs_soc; 1035 #endif 1036 1037 unsigned long dev_flags; 1038 struct completion driver_recovery; 1039 struct workqueue_struct *workqueue; 1040 struct work_struct restart_work; 1041 struct workqueue_struct *workqueue_aux; 1042 struct work_struct reset_work; 1043 atomic_t reset_count; 1044 atomic_t recovery_count; 1045 bool is_reset; 1046 struct completion reset_complete; 1047 /* continuous recovery fail count */ 1048 atomic_t fail_cont_count; 1049 unsigned long reset_fail_timeout; 1050 struct work_struct update_11d_work; 1051 u8 new_alpha2[2]; 1052 struct { 1053 /* protected by data_lock */ 1054 u32 fw_crash_counter; 1055 } stats; 1056 u32 pktlog_defs_checksum; 1057 1058 struct ath12k_dbring_cap *db_caps; 1059 u32 num_db_cap; 1060 1061 struct completion htc_suspend; 1062 1063 u64 fw_soc_drop_count; 1064 bool static_window_map; 1065 1066 struct work_struct rfkill_work; 1067 /* true means radio is on */ 1068 bool rfkill_radio_on; 1069 1070 struct { 1071 enum ath12k_bdf_search bdf_search; 1072 u32 vendor; 1073 u32 device; 1074 u32 subsystem_vendor; 1075 u32 subsystem_device; 1076 } id; 1077 1078 struct { 1079 u32 api_version; 1080 1081 const struct firmware *fw; 1082 const u8 *amss_data; 1083 size_t amss_len; 1084 const u8 *amss_dualmac_data; 1085 size_t amss_dualmac_len; 1086 const u8 *m3_data; 1087 size_t m3_len; 1088 const u8 *aux_uc_data; 1089 size_t aux_uc_len; 1090 1091 DECLARE_BITMAP(fw_features, ATH12K_FW_FEATURE_COUNT); 1092 bool fw_features_valid; 1093 } fw; 1094 1095 struct completion restart_completed; 1096 1097 #ifdef CONFIG_ACPI 1098 1099 struct { 1100 bool started; 1101 u32 func_bit; 1102 bool acpi_tas_enable; 1103 bool acpi_bios_sar_enable; 1104 bool acpi_disable_11be; 1105 bool acpi_disable_rfkill; 1106 bool acpi_cca_enable; 1107 bool acpi_band_edge_enable; 1108 bool acpi_enable_bdf; 1109 u32 bit_flag; 1110 char bdf_string[ATH12K_ACPI_BDF_MAX_LEN]; 1111 u8 tas_cfg[ATH12K_ACPI_DSM_TAS_CFG_SIZE]; 1112 u8 tas_sar_power_table[ATH12K_ACPI_DSM_TAS_DATA_SIZE]; 1113 u8 bios_sar_data[ATH12K_ACPI_DSM_BIOS_SAR_DATA_SIZE]; 1114 u8 geo_offset_data[ATH12K_ACPI_DSM_GEO_OFFSET_DATA_SIZE]; 1115 u8 cca_data[ATH12K_ACPI_DSM_CCA_DATA_SIZE]; 1116 u8 band_edge_power[ATH12K_ACPI_DSM_BAND_EDGE_DATA_SIZE]; 1117 } acpi; 1118 1119 #endif /* CONFIG_ACPI */ 1120 1121 struct notifier_block panic_nb; 1122 1123 struct ath12k_hw_group *ag; 1124 struct ath12k_wsi_info wsi_info; 1125 enum ath12k_firmware_mode fw_mode; 1126 struct ath12k_ftm_event_obj ftm_event_obj; 1127 bool hw_group_ref; 1128 1129 /* Denote whether MLO is possible within the device */ 1130 bool single_chip_mlo_support; 1131 1132 struct ath12k_reg_freq reg_freq_2ghz; 1133 struct ath12k_reg_freq reg_freq_5ghz; 1134 struct ath12k_reg_freq reg_freq_6ghz; 1135 const struct ath12k_mem_profile_based_param *profile_param; 1136 enum ath12k_qmi_mem_mode target_mem_mode; 1137 1138 /* FIXME: Define this field in a ag equivalent object available 1139 * during the initial phase of probe later. 1140 */ 1141 const struct ieee80211_ops *ath12k_ops; 1142 1143 struct rhashtable *rhead_sta_addr; 1144 struct rhashtable_params rhash_sta_addr_param; 1145 1146 /* must be last */ 1147 u8 drv_priv[] __aligned(sizeof(void *)); 1148 }; 1149 1150 struct ath12k_pdev_map { 1151 struct ath12k_base *ab; 1152 u8 pdev_idx; 1153 }; 1154 1155 struct ath12k_fw_stats_vdev { 1156 struct list_head list; 1157 1158 u32 vdev_id; 1159 u32 beacon_snr; 1160 u32 data_snr; 1161 u32 num_tx_frames[WLAN_MAX_AC]; 1162 u32 num_rx_frames; 1163 u32 num_tx_frames_retries[WLAN_MAX_AC]; 1164 u32 num_tx_frames_failures[WLAN_MAX_AC]; 1165 u32 num_rts_fail; 1166 u32 num_rts_success; 1167 u32 num_rx_err; 1168 u32 num_rx_discard; 1169 u32 num_tx_not_acked; 1170 u32 tx_rate_history[MAX_TX_RATE_VALUES]; 1171 u32 beacon_rssi_history[MAX_TX_RATE_VALUES]; 1172 }; 1173 1174 struct ath12k_fw_stats_bcn { 1175 struct list_head list; 1176 1177 u32 vdev_id; 1178 u32 tx_bcn_succ_cnt; 1179 u32 tx_bcn_outage_cnt; 1180 }; 1181 1182 struct ath12k_fw_stats_pdev { 1183 struct list_head list; 1184 1185 /* PDEV stats */ 1186 s32 ch_noise_floor; 1187 u32 tx_frame_count; 1188 u32 rx_frame_count; 1189 u32 rx_clear_count; 1190 u32 cycle_count; 1191 u32 phy_err_count; 1192 u32 chan_tx_power; 1193 u32 ack_rx_bad; 1194 u32 rts_bad; 1195 u32 rts_good; 1196 u32 fcs_bad; 1197 u32 no_beacons; 1198 u32 mib_int_count; 1199 1200 /* PDEV TX stats */ 1201 s32 comp_queued; 1202 s32 comp_delivered; 1203 s32 msdu_enqued; 1204 s32 mpdu_enqued; 1205 s32 wmm_drop; 1206 s32 local_enqued; 1207 s32 local_freed; 1208 s32 hw_queued; 1209 s32 hw_reaped; 1210 s32 underrun; 1211 s32 tx_abort; 1212 s32 mpdus_requed; 1213 u32 tx_ko; 1214 u32 data_rc; 1215 u32 self_triggers; 1216 u32 sw_retry_failure; 1217 u32 illgl_rate_phy_err; 1218 u32 pdev_cont_xretry; 1219 u32 pdev_tx_timeout; 1220 u32 pdev_resets; 1221 u32 stateless_tid_alloc_failure; 1222 u32 phy_underrun; 1223 u32 txop_ovf; 1224 1225 /* PDEV RX stats */ 1226 s32 mid_ppdu_route_change; 1227 s32 status_rcvd; 1228 s32 r0_frags; 1229 s32 r1_frags; 1230 s32 r2_frags; 1231 s32 r3_frags; 1232 s32 htt_msdus; 1233 s32 htt_mpdus; 1234 s32 loc_msdus; 1235 s32 loc_mpdus; 1236 s32 oversize_amsdu; 1237 s32 phy_errs; 1238 s32 phy_err_drop; 1239 s32 mpdu_errs; 1240 }; 1241 1242 int ath12k_core_qmi_firmware_ready(struct ath12k_base *ab); 1243 void ath12k_core_hw_group_cleanup(struct ath12k_hw_group *ag); 1244 int ath12k_core_pre_init(struct ath12k_base *ab); 1245 int ath12k_core_init(struct ath12k_base *ath12k); 1246 void ath12k_core_deinit(struct ath12k_base *ath12k); 1247 struct ath12k_base *ath12k_core_alloc(struct device *dev, size_t priv_size, 1248 enum ath12k_bus bus); 1249 void ath12k_core_free(struct ath12k_base *ath12k); 1250 int ath12k_core_fetch_board_data_api_1(struct ath12k_base *ab, 1251 struct ath12k_board_data *bd, 1252 char *filename); 1253 int ath12k_core_fetch_bdf(struct ath12k_base *ath12k, 1254 struct ath12k_board_data *bd); 1255 void ath12k_core_free_bdf(struct ath12k_base *ab, struct ath12k_board_data *bd); 1256 int ath12k_core_fetch_regdb(struct ath12k_base *ab, struct ath12k_board_data *bd); 1257 int ath12k_core_check_dt(struct ath12k_base *ath12k); 1258 int ath12k_core_check_smbios(struct ath12k_base *ab); 1259 void ath12k_core_halt(struct ath12k *ar); 1260 int ath12k_core_resume_early(struct ath12k_base *ab); 1261 int ath12k_core_resume(struct ath12k_base *ab); 1262 int ath12k_core_suspend(struct ath12k_base *ab); 1263 int ath12k_core_suspend_late(struct ath12k_base *ab); 1264 void ath12k_core_hw_group_unassign(struct ath12k_base *ab); 1265 u8 ath12k_get_num_partner_link(struct ath12k *ar); 1266 1267 const struct firmware *ath12k_core_firmware_request(struct ath12k_base *ab, 1268 const char *filename); 1269 u32 ath12k_core_get_max_station_per_radio(struct ath12k_base *ab); 1270 u32 ath12k_core_get_max_peers_per_radio(struct ath12k_base *ab); 1271 1272 void ath12k_core_hw_group_set_mlo_capable(struct ath12k_hw_group *ag); 1273 void ath12k_fw_stats_init(struct ath12k *ar); 1274 void ath12k_fw_stats_bcn_free(struct list_head *head); 1275 void ath12k_fw_stats_free(struct ath12k_fw_stats *stats); 1276 void ath12k_fw_stats_reset(struct ath12k *ar); 1277 struct reserved_mem *ath12k_core_get_reserved_mem(struct ath12k_base *ab, 1278 int index); 1279 enum ath12k_qmi_mem_mode ath12k_core_get_memory_mode(struct ath12k_base *ab); 1280 1281 static inline const char *ath12k_scan_state_str(enum ath12k_scan_state state) 1282 { 1283 switch (state) { 1284 case ATH12K_SCAN_IDLE: 1285 return "idle"; 1286 case ATH12K_SCAN_STARTING: 1287 return "starting"; 1288 case ATH12K_SCAN_RUNNING: 1289 return "running"; 1290 case ATH12K_SCAN_ABORTING: 1291 return "aborting"; 1292 } 1293 1294 return "unknown"; 1295 } 1296 1297 static inline struct ath12k_skb_cb *ATH12K_SKB_CB(struct sk_buff *skb) 1298 { 1299 BUILD_BUG_ON(sizeof(struct ath12k_skb_cb) > 1300 IEEE80211_TX_INFO_DRIVER_DATA_SIZE); 1301 return (struct ath12k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data; 1302 } 1303 1304 static inline struct ath12k_skb_rxcb *ATH12K_SKB_RXCB(struct sk_buff *skb) 1305 { 1306 BUILD_BUG_ON(sizeof(struct ath12k_skb_rxcb) > sizeof(skb->cb)); 1307 return (struct ath12k_skb_rxcb *)skb->cb; 1308 } 1309 1310 static inline struct ath12k_vif *ath12k_vif_to_ahvif(struct ieee80211_vif *vif) 1311 { 1312 return (struct ath12k_vif *)vif->drv_priv; 1313 } 1314 1315 static inline struct ath12k_sta *ath12k_sta_to_ahsta(struct ieee80211_sta *sta) 1316 { 1317 return (struct ath12k_sta *)sta->drv_priv; 1318 } 1319 1320 static inline struct ieee80211_sta *ath12k_ahsta_to_sta(struct ath12k_sta *ahsta) 1321 { 1322 return container_of((void *)ahsta, struct ieee80211_sta, drv_priv); 1323 } 1324 1325 static inline struct ieee80211_vif *ath12k_ahvif_to_vif(struct ath12k_vif *ahvif) 1326 { 1327 return container_of((void *)ahvif, struct ieee80211_vif, drv_priv); 1328 } 1329 1330 static inline struct ath12k *ath12k_ab_to_ar(struct ath12k_base *ab, 1331 int mac_id) 1332 { 1333 return ab->pdevs[ath12k_hw_mac_id_to_pdev_id(ab->hw_params, mac_id)].ar; 1334 } 1335 1336 static inline void ath12k_core_create_firmware_path(struct ath12k_base *ab, 1337 const char *filename, 1338 void *buf, size_t buf_len) 1339 { 1340 const char *fw_name = NULL; 1341 1342 of_property_read_string(ab->dev->of_node, "firmware-name", &fw_name); 1343 1344 if (fw_name && strncmp(filename, "board", 5)) 1345 snprintf(buf, buf_len, "%s/%s/%s/%s", ATH12K_FW_DIR, 1346 ab->hw_params->fw.dir, fw_name, filename); 1347 else 1348 snprintf(buf, buf_len, "%s/%s/%s", ATH12K_FW_DIR, 1349 ab->hw_params->fw.dir, filename); 1350 } 1351 1352 static inline const char *ath12k_bus_str(enum ath12k_bus bus) 1353 { 1354 switch (bus) { 1355 case ATH12K_BUS_PCI: 1356 return "pci"; 1357 case ATH12K_BUS_AHB: 1358 return "ahb"; 1359 } 1360 1361 return "unknown"; 1362 } 1363 1364 static inline struct ath12k_hw *ath12k_hw_to_ah(struct ieee80211_hw *hw) 1365 { 1366 return hw->priv; 1367 } 1368 1369 static inline struct ath12k *ath12k_ah_to_ar(struct ath12k_hw *ah, u8 hw_link_id) 1370 { 1371 if (WARN(hw_link_id >= ah->num_radio, 1372 "bad hw link id %d, so switch to default link\n", hw_link_id)) 1373 hw_link_id = 0; 1374 1375 return &ah->radio[hw_link_id]; 1376 } 1377 1378 static inline struct ath12k_hw *ath12k_ar_to_ah(struct ath12k *ar) 1379 { 1380 return ar->ah; 1381 } 1382 1383 static inline struct ieee80211_hw *ath12k_ar_to_hw(struct ath12k *ar) 1384 { 1385 return ar->ah->hw; 1386 } 1387 1388 #define for_each_ar(ah, ar, index) \ 1389 for ((index) = 0; ((index) < (ah)->num_radio && \ 1390 ((ar) = &(ah)->radio[(index)])); (index)++) 1391 1392 static inline struct ath12k_hw *ath12k_ag_to_ah(struct ath12k_hw_group *ag, int idx) 1393 { 1394 return ag->ah[idx]; 1395 } 1396 1397 static inline void ath12k_ag_set_ah(struct ath12k_hw_group *ag, int idx, 1398 struct ath12k_hw *ah) 1399 { 1400 ag->ah[idx] = ah; 1401 } 1402 1403 static inline struct ath12k_hw_group *ath12k_ab_to_ag(struct ath12k_base *ab) 1404 { 1405 return ab->ag; 1406 } 1407 1408 static inline struct ath12k_base *ath12k_ag_to_ab(struct ath12k_hw_group *ag, 1409 u8 device_id) 1410 { 1411 return ag->ab[device_id]; 1412 } 1413 1414 static inline s32 ath12k_pdev_get_noise_floor(struct ath12k *ar) 1415 { 1416 lockdep_assert_held(&ar->data_lock); 1417 1418 return ar->rssi_info.noise_floor; 1419 } 1420 1421 /* The @ab->dp NULL check or assertion is intentionally omitted because 1422 * @ab->dp is guaranteed to be non-NULL after a successful probe and 1423 * remains valid until teardown. Invoking this before allocation or 1424 * after teardown is considered invalid usage. 1425 */ 1426 static inline struct ath12k_dp *ath12k_ab_to_dp(struct ath12k_base *ab) 1427 { 1428 return ab->dp; 1429 } 1430 1431 static inline struct ath12k *ath12k_pdev_dp_to_ar(struct ath12k_pdev_dp *dp) 1432 { 1433 return container_of(dp, struct ath12k, dp); 1434 } 1435 #endif /* _CORE_H_ */ 1436