1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */ 2 /* 3 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved. 4 * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. 5 */ 6 7 #ifndef ATH12K_CORE_H 8 #define ATH12K_CORE_H 9 10 #include <linux/types.h> 11 #include <linux/interrupt.h> 12 #include <linux/irq.h> 13 #include <linux/bitfield.h> 14 #include <linux/dmi.h> 15 #include <linux/ctype.h> 16 #include <linux/firmware.h> 17 #include <linux/of_reserved_mem.h> 18 #include <linux/panic_notifier.h> 19 #include <linux/average.h> 20 #include <linux/of.h> 21 #include <linux/rhashtable.h> 22 #include "qmi.h" 23 #include "htc.h" 24 #include "wmi.h" 25 #include "hal.h" 26 #include "dp.h" 27 #include "ce.h" 28 #include "mac.h" 29 #include "hw.h" 30 #include "reg.h" 31 #include "dbring.h" 32 #include "fw.h" 33 #include "acpi.h" 34 #include "wow.h" 35 #include "debugfs_htt_stats.h" 36 #include "coredump.h" 37 #include "cmn_defs.h" 38 #include "dp_cmn.h" 39 #include "thermal.h" 40 41 #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK) 42 43 #define ATH12K_TX_MGMT_NUM_PENDING_MAX 512 44 45 #define ATH12K_TX_MGMT_TARGET_MAX_SUPPORT_WMI 64 46 47 /* Pending management packets threshold for dropping probe responses */ 48 #define ATH12K_PRB_RSP_DROP_THRESHOLD ((ATH12K_TX_MGMT_TARGET_MAX_SUPPORT_WMI * 3) / 4) 49 50 /* SMBIOS type containing Board Data File Name Extension */ 51 #define ATH12K_SMBIOS_BDF_EXT_TYPE 0xF8 52 53 /* SMBIOS type structure length (excluding strings-set) */ 54 #define ATH12K_SMBIOS_BDF_EXT_LENGTH 0x9 55 56 /* The magic used by QCA spec */ 57 #define ATH12K_SMBIOS_BDF_EXT_MAGIC "BDF_" 58 59 #define ATH12K_INVALID_HW_MAC_ID 0xFF 60 #define ATH12K_CONNECTION_LOSS_HZ (3 * HZ) 61 62 #define ATH12K_MON_TIMER_INTERVAL 10 63 #define ATH12K_RESET_TIMEOUT_HZ (20 * HZ) 64 #define ATH12K_RESET_MAX_FAIL_COUNT_FIRST 3 65 #define ATH12K_RESET_MAX_FAIL_COUNT_FINAL 5 66 #define ATH12K_RESET_FAIL_TIMEOUT_HZ (20 * HZ) 67 #define ATH12K_RECONFIGURE_TIMEOUT_HZ (10 * HZ) 68 #define ATH12K_RECOVER_START_TIMEOUT_HZ (20 * HZ) 69 70 #define ATH12K_INVALID_GROUP_ID 0xFF 71 #define ATH12K_INVALID_DEVICE_ID 0xFF 72 73 #define ATH12K_MAX_MLO_PEERS 256 74 #define ATH12K_MLO_PEER_ID_INVALID 0xFFFF 75 76 #define ATH12K_INVALID_RSSI_FULL -1 77 #define ATH12K_INVALID_RSSI_EMPTY -128 78 79 enum ath12k_bdf_search { 80 ATH12K_BDF_SEARCH_DEFAULT, 81 ATH12K_BDF_SEARCH_BUS_AND_BOARD, 82 }; 83 84 enum wme_ac { 85 WME_AC_BE, 86 WME_AC_BK, 87 WME_AC_VI, 88 WME_AC_VO, 89 WME_NUM_AC 90 }; 91 92 #define ATH12K_HT_MCS_MAX 7 93 #define ATH12K_VHT_MCS_MAX 9 94 #define ATH12K_HE_MCS_MAX 11 95 #define ATH12K_EHT_MCS_MAX 15 96 97 enum ath12k_crypt_mode { 98 /* Only use hardware crypto engine */ 99 ATH12K_CRYPT_MODE_HW, 100 /* Only use software crypto */ 101 ATH12K_CRYPT_MODE_SW, 102 }; 103 104 static inline enum wme_ac ath12k_tid_to_ac(u32 tid) 105 { 106 return (((tid == 0) || (tid == 3)) ? WME_AC_BE : 107 ((tid == 1) || (tid == 2)) ? WME_AC_BK : 108 ((tid == 4) || (tid == 5)) ? WME_AC_VI : 109 WME_AC_VO); 110 } 111 112 static inline u64 ath12k_le32hilo_to_u64(__le32 hi, __le32 lo) 113 { 114 u64 hi64 = le32_to_cpu(hi); 115 u64 lo64 = le32_to_cpu(lo); 116 117 return (hi64 << 32) | lo64; 118 } 119 120 enum ath12k_skb_flags { 121 ATH12K_SKB_HW_80211_ENCAP = BIT(0), 122 ATH12K_SKB_CIPHER_SET = BIT(1), 123 ATH12K_SKB_MLO_STA = BIT(2), 124 }; 125 126 struct ath12k_skb_cb { 127 dma_addr_t paddr; 128 struct ath12k *ar; 129 struct ieee80211_vif *vif; 130 dma_addr_t paddr_ext_desc; 131 u32 cipher; 132 u8 flags; 133 u8 link_id; 134 }; 135 136 struct ath12k_skb_rxcb { 137 dma_addr_t paddr; 138 bool is_first_msdu; 139 bool is_last_msdu; 140 bool is_continuation; 141 bool is_mcbc; 142 bool is_eapol; 143 struct hal_rx_desc *rx_desc; 144 u8 err_rel_src; 145 u8 err_code; 146 u8 hw_link_id; 147 u8 unmapped; 148 u8 is_frag; 149 u8 tid; 150 u16 peer_id; 151 bool is_end_of_ppdu; 152 }; 153 154 enum ath12k_hw_rev { 155 ATH12K_HW_QCN9274_HW10, 156 ATH12K_HW_QCN9274_HW20, 157 ATH12K_HW_WCN7850_HW20, 158 ATH12K_HW_IPQ5332_HW10, 159 ATH12K_HW_QCC2072_HW10, 160 ATH12K_HW_IPQ5424_HW10, 161 }; 162 163 enum ath12k_firmware_mode { 164 /* the default mode, standard 802.11 functionality */ 165 ATH12K_FIRMWARE_MODE_NORMAL, 166 167 /* factory tests etc */ 168 ATH12K_FIRMWARE_MODE_FTM, 169 }; 170 171 #define ATH12K_IRQ_NUM_MAX 57 172 #define ATH12K_EXT_IRQ_NUM_MAX 16 173 #define ATH12K_MAX_TCL_RING_NUM 3 174 175 struct ath12k_ext_irq_grp { 176 struct ath12k_base *ab; 177 u32 irqs[ATH12K_EXT_IRQ_NUM_MAX]; 178 u32 num_irq; 179 u32 grp_id; 180 u64 timestamp; 181 bool napi_enabled; 182 struct napi_struct napi; 183 struct net_device *napi_ndev; 184 }; 185 186 enum ath12k_smbios_cc_type { 187 /* disable country code setting from SMBIOS */ 188 ATH12K_SMBIOS_CC_DISABLE = 0, 189 190 /* set country code by ANSI country name, based on ISO3166-1 alpha2 */ 191 ATH12K_SMBIOS_CC_ISO = 1, 192 193 /* worldwide regdomain */ 194 ATH12K_SMBIOS_CC_WW = 2, 195 }; 196 197 struct ath12k_smbios_bdf { 198 struct dmi_header hdr; 199 u8 features_disabled; 200 201 /* enum ath12k_smbios_cc_type */ 202 u8 country_code_flag; 203 204 /* To set specific country, you need to set country code 205 * flag=ATH12K_SMBIOS_CC_ISO first, then if country is United 206 * States, then country code value = 0x5553 ("US",'U' = 0x55, 'S'= 207 * 0x53). To set country to INDONESIA, then country code value = 208 * 0x4944 ("IN", 'I'=0x49, 'D'=0x44). If country code flag = 209 * ATH12K_SMBIOS_CC_WW, then you can use worldwide regulatory 210 * setting. 211 */ 212 u16 cc_code; 213 214 u8 bdf_enabled; 215 u8 bdf_ext[]; 216 } __packed; 217 218 #define HEHANDLE_CAP_PHYINFO_SIZE 3 219 #define HECAP_PHYINFO_SIZE 9 220 #define HECAP_MACINFO_SIZE 5 221 #define HECAP_TXRX_MCS_NSS_SIZE 2 222 #define HECAP_PPET16_PPET8_MAX_SIZE 25 223 224 #define HE_PPET16_PPET8_SIZE 8 225 226 /* 802.11ax PPE (PPDU packet Extension) threshold */ 227 struct he_ppe_threshold { 228 u32 numss_m1; 229 u32 ru_mask; 230 u32 ppet16_ppet8_ru3_ru0[HE_PPET16_PPET8_SIZE]; 231 }; 232 233 struct ath12k_he { 234 u8 hecap_macinfo[HECAP_MACINFO_SIZE]; 235 u32 hecap_rxmcsnssmap; 236 u32 hecap_txmcsnssmap; 237 u32 hecap_phyinfo[HEHANDLE_CAP_PHYINFO_SIZE]; 238 struct he_ppe_threshold hecap_ppet; 239 u32 heop_param; 240 }; 241 242 enum { 243 WMI_HOST_TP_SCALE_MAX = 0, 244 WMI_HOST_TP_SCALE_50 = 1, 245 WMI_HOST_TP_SCALE_25 = 2, 246 WMI_HOST_TP_SCALE_12 = 3, 247 WMI_HOST_TP_SCALE_MIN = 4, 248 WMI_HOST_TP_SCALE_SIZE = 5, 249 }; 250 251 enum ath12k_scan_state { 252 ATH12K_SCAN_IDLE, 253 ATH12K_SCAN_STARTING, 254 ATH12K_SCAN_RUNNING, 255 ATH12K_SCAN_ABORTING, 256 }; 257 258 enum ath12k_11d_state { 259 ATH12K_11D_IDLE, 260 ATH12K_11D_PREPARING, 261 ATH12K_11D_RUNNING, 262 }; 263 264 enum ath12k_hw_group_flags { 265 ATH12K_GROUP_FLAG_REGISTERED, 266 ATH12K_GROUP_FLAG_UNREGISTER, 267 }; 268 269 enum ath12k_dev_flags { 270 ATH12K_FLAG_CAC_RUNNING, 271 ATH12K_FLAG_CRASH_FLUSH, 272 ATH12K_FLAG_RAW_MODE, 273 ATH12K_FLAG_HW_CRYPTO_DISABLED, 274 ATH12K_FLAG_RECOVERY, 275 ATH12K_FLAG_UNREGISTERING, 276 ATH12K_FLAG_REGISTERED, 277 ATH12K_FLAG_QMI_FAIL, 278 ATH12K_FLAG_HTC_SUSPEND_COMPLETE, 279 ATH12K_FLAG_CE_IRQ_ENABLED, 280 ATH12K_FLAG_EXT_IRQ_ENABLED, 281 ATH12K_FLAG_QMI_FW_READY_COMPLETE, 282 ATH12K_FLAG_FTM_SEGMENTED, 283 ATH12K_FLAG_FIXED_MEM_REGION, 284 }; 285 286 struct ath12k_tx_conf { 287 bool changed; 288 u16 ac; 289 struct ieee80211_tx_queue_params tx_queue_params; 290 }; 291 292 struct ath12k_key_conf { 293 enum set_key_cmd cmd; 294 struct list_head list; 295 struct ieee80211_sta *sta; 296 struct ieee80211_key_conf *key; 297 }; 298 299 struct ath12k_vif_cache { 300 struct ath12k_tx_conf tx_conf; 301 struct ath12k_key_conf key_conf; 302 u32 bss_conf_changed; 303 }; 304 305 struct ath12k_rekey_data { 306 u8 kck[NL80211_KCK_LEN]; 307 u8 kek[NL80211_KCK_LEN]; 308 u64 replay_ctr; 309 bool enable_offload; 310 }; 311 312 struct ath12k_link_vif { 313 u32 vdev_id; 314 u32 beacon_interval; 315 u32 dtim_period; 316 317 struct ath12k *ar; 318 319 bool beacon_prot; 320 321 struct wmi_wmm_params_all_arg wmm_params; 322 struct list_head list; 323 324 bool is_created; 325 bool is_started; 326 bool is_up; 327 u8 bssid[ETH_ALEN]; 328 struct cfg80211_bitrate_mask bitrate_mask; 329 struct delayed_work connection_loss_work; 330 int num_legacy_stations; 331 int rtscts_prot_mode; 332 int txpower; 333 bool rsnie_present; 334 bool wpaie_present; 335 u8 vdev_stats_id; 336 u32 punct_bitmap; 337 u8 link_id; 338 struct ath12k_vif *ahvif; 339 struct ath12k_rekey_data rekey_data; 340 struct ath12k_link_stats link_stats; 341 spinlock_t link_stats_lock; /* Protects updates to link_stats */ 342 343 u8 current_cntdown_counter; 344 345 /* only used in station mode */ 346 bool is_sta_assoc_link; 347 348 struct ath12k_reg_tpc_power_info reg_tpc_info; 349 350 bool group_key_valid; 351 struct wmi_vdev_install_key_arg group_key; 352 bool pairwise_key_done; 353 u16 num_stations; 354 bool is_csa_in_progress; 355 struct wiphy_work bcn_tx_work; 356 }; 357 358 struct ath12k_vif { 359 struct ath12k_dp_vif dp_vif; 360 361 enum wmi_vdev_type vdev_type; 362 enum wmi_vdev_subtype vdev_subtype; 363 struct ieee80211_vif *vif; 364 struct ath12k_hw *ah; 365 366 union { 367 struct { 368 u32 uapsd; 369 } sta; 370 struct { 371 /* 127 stations; wmi limit */ 372 u8 tim_bitmap[16]; 373 u8 tim_len; 374 u32 ssid_len; 375 u8 ssid[IEEE80211_MAX_SSID_LEN]; 376 bool hidden_ssid; 377 /* P2P_IE with NoA attribute for P2P_GO case */ 378 u32 noa_len; 379 u8 *noa_data; 380 } ap; 381 } u; 382 383 u32 aid; 384 bool ps; 385 386 struct ath12k_link_vif deflink; 387 struct ath12k_link_vif __rcu *link[ATH12K_NUM_MAX_LINKS]; 388 struct ath12k_vif_cache *cache[IEEE80211_MLD_MAX_NUM_LINKS]; 389 /* indicates bitmap of link vif created in FW */ 390 u32 links_map; 391 /* Must be last - ends in a flexible-array member. 392 * 393 * FIXME: Driver should not copy struct ieee80211_chanctx_conf, 394 * especially because it has a flexible array. Find a better way. 395 */ 396 struct ieee80211_chanctx_conf chanctx; 397 }; 398 399 struct ath12k_vif_iter { 400 u32 vdev_id; 401 struct ath12k *ar; 402 struct ath12k_link_vif *arvif; 403 }; 404 405 #define ATH12K_SCAN_TIMEOUT_HZ (20 * HZ) 406 407 #define ATH12K_HE_MCS_NUM 12 408 #define ATH12K_VHT_MCS_NUM 10 409 #define ATH12K_BW_NUM 5 410 #define ATH12K_NSS_NUM 4 411 #define ATH12K_LEGACY_NUM 12 412 #define ATH12K_GI_NUM 4 413 #define ATH12K_HT_MCS_NUM 32 414 415 enum ath12k_pkt_rx_err { 416 ATH12K_PKT_RX_ERR_FCS, 417 ATH12K_PKT_RX_ERR_TKIP, 418 ATH12K_PKT_RX_ERR_CRYPT, 419 ATH12K_PKT_RX_ERR_PEER_IDX_INVAL, 420 ATH12K_PKT_RX_ERR_MAX, 421 }; 422 423 enum ath12k_ampdu_subfrm_num { 424 ATH12K_AMPDU_SUBFRM_NUM_10, 425 ATH12K_AMPDU_SUBFRM_NUM_20, 426 ATH12K_AMPDU_SUBFRM_NUM_30, 427 ATH12K_AMPDU_SUBFRM_NUM_40, 428 ATH12K_AMPDU_SUBFRM_NUM_50, 429 ATH12K_AMPDU_SUBFRM_NUM_60, 430 ATH12K_AMPDU_SUBFRM_NUM_MORE, 431 ATH12K_AMPDU_SUBFRM_NUM_MAX, 432 }; 433 434 enum ath12k_amsdu_subfrm_num { 435 ATH12K_AMSDU_SUBFRM_NUM_1, 436 ATH12K_AMSDU_SUBFRM_NUM_2, 437 ATH12K_AMSDU_SUBFRM_NUM_3, 438 ATH12K_AMSDU_SUBFRM_NUM_4, 439 ATH12K_AMSDU_SUBFRM_NUM_MORE, 440 ATH12K_AMSDU_SUBFRM_NUM_MAX, 441 }; 442 443 enum ath12k_counter_type { 444 ATH12K_COUNTER_TYPE_BYTES, 445 ATH12K_COUNTER_TYPE_PKTS, 446 ATH12K_COUNTER_TYPE_MAX, 447 }; 448 449 enum ath12k_stats_type { 450 ATH12K_STATS_TYPE_SUCC, 451 ATH12K_STATS_TYPE_FAIL, 452 ATH12K_STATS_TYPE_RETRY, 453 ATH12K_STATS_TYPE_AMPDU, 454 ATH12K_STATS_TYPE_MAX, 455 }; 456 457 struct ath12k_htt_data_stats { 458 u64 legacy[ATH12K_COUNTER_TYPE_MAX][ATH12K_LEGACY_NUM]; 459 u64 ht[ATH12K_COUNTER_TYPE_MAX][ATH12K_HT_MCS_NUM]; 460 u64 vht[ATH12K_COUNTER_TYPE_MAX][ATH12K_VHT_MCS_NUM]; 461 u64 he[ATH12K_COUNTER_TYPE_MAX][ATH12K_HE_MCS_NUM]; 462 u64 bw[ATH12K_COUNTER_TYPE_MAX][ATH12K_BW_NUM]; 463 u64 nss[ATH12K_COUNTER_TYPE_MAX][ATH12K_NSS_NUM]; 464 u64 gi[ATH12K_COUNTER_TYPE_MAX][ATH12K_GI_NUM]; 465 u64 transmit_type[ATH12K_COUNTER_TYPE_MAX][HAL_RX_RECEPTION_TYPE_MAX]; 466 u64 ru_loc[ATH12K_COUNTER_TYPE_MAX][HAL_RX_RU_ALLOC_TYPE_MAX]; 467 }; 468 469 struct ath12k_htt_tx_stats { 470 struct ath12k_htt_data_stats stats[ATH12K_STATS_TYPE_MAX]; 471 u64 tx_duration; 472 u64 ba_fails; 473 u64 ack_fails; 474 u16 ru_start; 475 u16 ru_tones; 476 u32 mu_group[MAX_MU_GROUP_ID]; 477 }; 478 479 struct ath12k_per_ppdu_tx_stats { 480 u16 succ_pkts; 481 u16 failed_pkts; 482 u16 retry_pkts; 483 u32 succ_bytes; 484 u32 failed_bytes; 485 u32 retry_bytes; 486 }; 487 488 struct ath12k_link_sta { 489 struct ath12k_link_vif *arvif; 490 struct ath12k_sta *ahsta; 491 492 /* link address similar to ieee80211_link_sta */ 493 u8 addr[ETH_ALEN]; 494 495 /* the following are protected by ar->data_lock */ 496 u32 changed; /* IEEE80211_RC_* */ 497 u32 bw; 498 u32 nss; 499 u32 smps; 500 501 struct wiphy_work update_wk; 502 u8 link_id; 503 u32 bw_prev; 504 u32 peer_nss; 505 s8 rssi_beacon; 506 s8 chain_signal[IEEE80211_MAX_CHAINS]; 507 508 /* For now the assoc link will be considered primary */ 509 bool is_assoc_link; 510 511 /* for firmware use only */ 512 u8 link_idx; 513 514 /* peer addr based rhashtable list pointer */ 515 struct rhash_head rhash_addr; 516 }; 517 518 struct ath12k_sta { 519 struct ath12k_vif *ahvif; 520 enum hal_pn_type pn_type; 521 struct ath12k_link_sta deflink; 522 struct ath12k_link_sta __rcu *link[IEEE80211_MLD_MAX_NUM_LINKS]; 523 /* indicates bitmap of link sta created in FW */ 524 u16 links_map; 525 u8 assoc_link_id; 526 u16 ml_peer_id; 527 u16 free_logical_link_idx_map; 528 529 enum ieee80211_sta_state state; 530 }; 531 532 #define ATH12K_HALF_20MHZ_BW 10 533 #define ATH12K_2GHZ_MIN_CENTER 2412 534 #define ATH12K_2GHZ_MAX_CENTER 2484 535 #define ATH12K_5GHZ_MIN_CENTER 4900 536 #define ATH12K_5GHZ_MAX_CENTER 5920 537 #define ATH12K_6GHZ_MIN_CENTER 5935 538 #define ATH12K_6GHZ_MAX_CENTER 7115 539 #define ATH12K_MIN_2GHZ_FREQ (ATH12K_2GHZ_MIN_CENTER - ATH12K_HALF_20MHZ_BW - 1) 540 #define ATH12K_MAX_2GHZ_FREQ (ATH12K_2GHZ_MAX_CENTER + ATH12K_HALF_20MHZ_BW + 1) 541 #define ATH12K_MIN_5GHZ_FREQ (ATH12K_5GHZ_MIN_CENTER - ATH12K_HALF_20MHZ_BW) 542 #define ATH12K_MAX_5GHZ_FREQ (ATH12K_5GHZ_MAX_CENTER + ATH12K_HALF_20MHZ_BW) 543 #define ATH12K_MIN_6GHZ_FREQ (ATH12K_6GHZ_MIN_CENTER - ATH12K_HALF_20MHZ_BW) 544 #define ATH12K_MAX_6GHZ_FREQ (ATH12K_6GHZ_MAX_CENTER + ATH12K_HALF_20MHZ_BW) 545 #define ATH12K_NUM_CHANS 101 546 #define ATH12K_MAX_5GHZ_CHAN 173 547 548 static inline bool ath12k_is_2ghz_channel_freq(u32 freq) 549 { 550 return freq >= ATH12K_MIN_2GHZ_FREQ && 551 freq <= ATH12K_MAX_2GHZ_FREQ; 552 } 553 554 enum ath12k_hw_state { 555 ATH12K_HW_STATE_OFF, 556 ATH12K_HW_STATE_ON, 557 ATH12K_HW_STATE_RESTARTING, 558 ATH12K_HW_STATE_RESTARTED, 559 ATH12K_HW_STATE_WEDGED, 560 ATH12K_HW_STATE_TM, 561 /* Add other states as required */ 562 }; 563 564 /* Antenna noise floor */ 565 #define ATH12K_DEFAULT_NOISE_FLOOR -95 566 567 struct ath12k_ftm_event_obj { 568 u32 data_pos; 569 u32 expected_seq; 570 u8 *eventdata; 571 }; 572 573 struct ath12k_fw_stats { 574 u32 pdev_id; 575 u32 stats_id; 576 struct list_head pdevs; 577 struct list_head vdevs; 578 struct list_head bcn; 579 u32 num_vdev_recvd; 580 }; 581 582 struct ath12k_dbg_htt_stats { 583 enum ath12k_dbg_htt_ext_stats_type type; 584 u32 cfg_param[4]; 585 u8 reset; 586 struct debug_htt_stats_req *stats_req; 587 }; 588 589 struct ath12k_debug { 590 struct dentry *debugfs_pdev; 591 struct dentry *debugfs_pdev_symlink; 592 struct dentry *debugfs_pdev_symlink_default; 593 struct ath12k_dbg_htt_stats htt_stats; 594 enum wmi_halphy_ctrl_path_stats_id tpc_stats_type; 595 bool tpc_request; 596 struct completion tpc_complete; 597 struct wmi_tpc_stats_arg *tpc_stats; 598 u32 rx_filter; 599 bool extd_rx_stats; 600 }; 601 602 struct ath12k_pdev_rssi_offsets { 603 s32 temp_offset; 604 s8 min_nf_dbm; 605 /* Cache the sum here to avoid calculating it every time in hot path 606 * noise_floor = min_nf_dbm + temp_offset 607 */ 608 s32 noise_floor; 609 }; 610 611 #define ATH12K_FLUSH_TIMEOUT (5 * HZ) 612 #define ATH12K_VDEV_DELETE_TIMEOUT_HZ (5 * HZ) 613 614 struct ath12k { 615 struct ath12k_base *ab; 616 struct ath12k_pdev *pdev; 617 struct ath12k_hw *ah; 618 struct ath12k_wmi_pdev *wmi; 619 struct ath12k_pdev_dp dp; 620 u8 mac_addr[ETH_ALEN]; 621 u32 ht_cap_info; 622 u32 vht_cap_info; 623 struct ath12k_he ar_he; 624 bool supports_6ghz; 625 struct { 626 struct completion started; 627 struct completion completed; 628 struct completion on_channel; 629 struct delayed_work timeout; 630 enum ath12k_scan_state state; 631 bool is_roc; 632 int roc_freq; 633 bool roc_notify; 634 struct wiphy_work vdev_clean_wk; 635 struct ath12k_link_vif *arvif; 636 } scan; 637 638 struct { 639 struct ieee80211_supported_band sbands[NUM_NL80211_BANDS]; 640 struct ieee80211_sband_iftype_data 641 iftype[NUM_NL80211_BANDS][NUM_NL80211_IFTYPES]; 642 } mac; 643 644 unsigned long dev_flags; 645 unsigned int filter_flags; 646 u32 min_tx_power; 647 u32 max_tx_power; 648 u32 txpower_limit_2g; 649 u32 txpower_limit_5g; 650 u32 txpower_scale; 651 u32 power_scale; 652 u32 chan_tx_pwr; 653 u32 rts_threshold; 654 u32 num_stations; 655 u32 max_num_stations; 656 657 /* protects the radio specific data like debug stats, ppdu_stats_info stats, 658 * vdev_stop_status info, scan data, ath12k_sta info, ath12k_link_vif info, 659 * channel context data, survey info, test mode data, regd_channel_update_queue. 660 */ 661 spinlock_t data_lock; 662 663 struct list_head arvifs; 664 /* should never be NULL; needed for regular htt rx */ 665 struct ieee80211_channel *rx_channel; 666 667 /* valid during scan; needed for mgmt rx during scan */ 668 struct ieee80211_channel *scan_channel; 669 670 u8 cfg_tx_chainmask; 671 u8 cfg_rx_chainmask; 672 u8 num_rx_chains; 673 u8 num_tx_chains; 674 /* pdev_idx starts from 0 whereas pdev->pdev_id starts with 1 */ 675 u8 pdev_idx; 676 u8 lmac_id; 677 u8 hw_link_id; 678 u8 radio_idx; 679 680 struct completion peer_assoc_done; 681 struct completion peer_delete_done; 682 683 int install_key_status; 684 struct completion install_key_done; 685 686 int last_wmi_vdev_start_status; 687 struct completion vdev_setup_done; 688 struct completion vdev_delete_done; 689 690 int num_peers; 691 int max_num_peers; 692 u32 num_started_vdevs; 693 u32 num_created_vdevs; 694 unsigned long long allocated_vdev_map; 695 696 struct idr txmgmt_idr; 697 /* protects txmgmt_idr data */ 698 spinlock_t txmgmt_idr_lock; 699 atomic_t num_pending_mgmt_tx; 700 wait_queue_head_t txmgmt_empty_waitq; 701 702 /* cycle count is reported twice for each visited channel during scan. 703 * access protected by data_lock 704 */ 705 u32 survey_last_rx_clear_count; 706 u32 survey_last_cycle_count; 707 708 /* Channel info events are expected to come in pairs without and with 709 * COMPLETE flag set respectively for each channel visit during scan. 710 * 711 * However there are deviations from this rule. This flag is used to 712 * avoid reporting garbage data. 713 */ 714 bool ch_info_can_report_survey; 715 struct survey_info survey[ATH12K_NUM_CHANS]; 716 struct completion bss_survey_done; 717 718 struct work_struct regd_update_work; 719 struct work_struct regd_channel_update_work; 720 struct list_head regd_channel_update_queue; 721 722 struct wiphy_work wmi_mgmt_tx_work; 723 struct sk_buff_head wmi_mgmt_tx_queue; 724 725 struct ath12k_wow wow; 726 struct completion target_suspend; 727 bool target_suspend_ack; 728 729 struct ath12k_per_peer_tx_stats cached_stats; 730 u32 last_ppdu_id; 731 u32 cached_ppdu_id; 732 #ifdef CONFIG_ATH12K_DEBUGFS 733 struct ath12k_debug debug; 734 #endif 735 736 bool dfs_block_radar_events; 737 bool monitor_vdev_created; 738 bool monitor_started; 739 int monitor_vdev_id; 740 741 struct wiphy_radio_freq_range freq_range; 742 743 bool nlo_enabled; 744 745 /* Protected by wiphy::mtx lock. */ 746 u32 vdev_id_11d_scan; 747 struct completion completed_11d_scan; 748 enum ath12k_11d_state state_11d; 749 u8 alpha2[REG_ALPHA2_LEN]; 750 bool regdom_set_by_user; 751 struct completion regd_update_completed; 752 753 struct completion fw_stats_complete; 754 struct completion fw_stats_done; 755 756 struct completion mlo_setup_done; 757 u32 mlo_setup_status; 758 u8 ftm_msgref; 759 struct ath12k_fw_stats fw_stats; 760 unsigned long last_tx_power_update; 761 762 s8 max_allowed_tx_power; 763 struct ath12k_pdev_rssi_offsets rssi_info; 764 765 struct ath12k_thermal thermal; 766 }; 767 768 struct ath12k_hw { 769 struct ieee80211_hw *hw; 770 struct device *dev; 771 772 /* Protect the write operation of the hardware state ath12k_hw::state 773 * between hardware start<=>reconfigure<=>stop transitions. 774 */ 775 struct mutex hw_mutex; 776 enum ath12k_hw_state state; 777 bool regd_updated; 778 bool use_6ghz_regd; 779 780 u8 num_radio; 781 782 DECLARE_BITMAP(free_ml_peer_id_map, ATH12K_MAX_MLO_PEERS); 783 784 struct ath12k_dp_hw dp_hw; 785 786 /* Keep last */ 787 struct ath12k radio[] __aligned(sizeof(void *)); 788 }; 789 790 struct ath12k_band_cap { 791 u32 phy_id; 792 u32 max_bw_supported; 793 u32 ht_cap_info; 794 u32 he_cap_info[2]; 795 u32 he_mcs; 796 u32 he_cap_phy_info[PSOC_HOST_MAX_PHY_SIZE]; 797 struct ath12k_wmi_ppe_threshold_arg he_ppet; 798 u16 he_6ghz_capa; 799 u32 eht_cap_mac_info[WMI_MAX_EHTCAP_MAC_SIZE]; 800 u32 eht_cap_phy_info[WMI_MAX_EHTCAP_PHY_SIZE]; 801 u32 eht_mcs_20_only; 802 u32 eht_mcs_80; 803 u32 eht_mcs_160; 804 u32 eht_mcs_320; 805 struct ath12k_wmi_ppe_threshold_arg eht_ppet; 806 u32 eht_cap_info_internal; 807 }; 808 809 struct ath12k_pdev_cap { 810 u32 supported_bands; 811 u32 ampdu_density; 812 u32 vht_cap; 813 u32 vht_mcs; 814 u32 he_mcs; 815 u32 tx_chain_mask; 816 u32 rx_chain_mask; 817 u32 tx_chain_mask_shift; 818 u32 rx_chain_mask_shift; 819 struct ath12k_band_cap band[NUM_NL80211_BANDS]; 820 u32 eml_cap; 821 u32 mld_cap; 822 bool nss_ratio_enabled; 823 u8 nss_ratio_info; 824 }; 825 826 struct mlo_timestamp { 827 u32 info; 828 u32 sync_timestamp_lo_us; 829 u32 sync_timestamp_hi_us; 830 u32 mlo_offset_lo; 831 u32 mlo_offset_hi; 832 u32 mlo_offset_clks; 833 u32 mlo_comp_clks; 834 u32 mlo_comp_timer; 835 }; 836 837 struct ath12k_pdev { 838 struct ath12k *ar; 839 u32 pdev_id; 840 u32 hw_link_id; 841 struct ath12k_pdev_cap cap; 842 u8 mac_addr[ETH_ALEN]; 843 struct mlo_timestamp timestamp; 844 }; 845 846 struct ath12k_fw_pdev { 847 u32 pdev_id; 848 u32 phy_id; 849 u32 supported_bands; 850 }; 851 852 struct ath12k_board_data { 853 const struct firmware *fw; 854 const void *data; 855 size_t len; 856 }; 857 858 struct ath12k_reg_freq { 859 u32 start_freq; 860 u32 end_freq; 861 }; 862 863 struct ath12k_mlo_memory { 864 struct target_mem_chunk chunk[ATH12K_QMI_WLANFW_MAX_NUM_MEM_SEG_V01]; 865 int mlo_mem_size; 866 bool init_done; 867 }; 868 869 struct ath12k_hw_link { 870 u8 device_id; 871 u8 pdev_idx; 872 }; 873 874 /* Holds info on the group of devices that are registered as a single 875 * wiphy, protected with struct ath12k_hw_group::mutex. 876 */ 877 struct ath12k_hw_group { 878 /* Keep dp_hw_grp as the first member to allow efficient 879 * usage of cache lines for DP fields 880 */ 881 struct ath12k_dp_hw_group dp_hw_grp; 882 struct ath12k_hw_link hw_links[ATH12K_GROUP_MAX_RADIO]; 883 struct list_head list; 884 u8 id; 885 u8 num_devices; 886 u8 num_probed; 887 u8 num_started; 888 unsigned long flags; 889 struct ath12k_base *ab[ATH12K_MAX_DEVICES]; 890 891 /* protects access to this struct */ 892 struct mutex mutex; 893 894 /* Holds information of wiphy (hw) registration. 895 * 896 * In Multi/Single Link Operation case, all pdevs are registered as 897 * a single wiphy. In other (legacy/Non-MLO) cases, each pdev is 898 * registered as separate wiphys. 899 */ 900 struct ath12k_hw *ah[ATH12K_GROUP_MAX_RADIO]; 901 u8 num_hw; 902 bool mlo_capable; 903 struct device_node *wsi_node[ATH12K_MAX_DEVICES]; 904 struct ath12k_mlo_memory mlo_mem; 905 bool hw_link_id_init_done; 906 }; 907 908 /* Holds WSI info specific to each device, excluding WSI group info */ 909 struct ath12k_wsi_info { 910 u32 index; 911 u32 hw_link_id_base; 912 }; 913 914 struct ath12k_dp_profile_params { 915 u32 tx_comp_ring_size; 916 u32 rxdma_monitor_buf_ring_size; 917 u32 rxdma_monitor_dst_ring_size; 918 u32 num_pool_tx_desc; 919 u32 rx_desc_count; 920 }; 921 922 struct ath12k_mem_profile_based_param { 923 u32 num_vdevs; 924 u32 max_client_single; 925 u32 max_client_dbs; 926 u32 max_client_dbs_sbs; 927 struct ath12k_dp_profile_params dp_params; 928 }; 929 930 enum ath12k_device_family { 931 ATH12K_DEVICE_FAMILY_START, 932 ATH12K_DEVICE_FAMILY_WIFI7 = ATH12K_DEVICE_FAMILY_START, 933 ATH12K_DEVICE_FAMILY_MAX, 934 }; 935 936 /* Master structure to hold the hw data which may be used in core module */ 937 struct ath12k_base { 938 enum ath12k_hw_rev hw_rev; 939 struct platform_device *pdev; 940 struct device *dev; 941 struct ath12k_qmi qmi; 942 struct ath12k_wmi_base wmi_ab; 943 struct completion fw_ready; 944 u8 device_id; 945 int num_radios; 946 /* HW channel counters frequency value in hertz common to all MACs */ 947 u32 cc_freq_hz; 948 949 struct ath12k_dump_file_data *dump_data; 950 size_t ath12k_coredump_len; 951 struct work_struct dump_work; 952 953 struct ath12k_htc htc; 954 955 struct ath12k_dp *dp; 956 957 void __iomem *mem; 958 unsigned long mem_len; 959 960 void __iomem *mem_ce; 961 u32 ce_remap_base_addr; 962 u32 cmem_offset; 963 bool ce_remap; 964 965 struct { 966 enum ath12k_bus bus; 967 const struct ath12k_hif_ops *ops; 968 } hif; 969 970 struct { 971 struct completion wakeup_completed; 972 u32 wmi_conf_rx_decap_mode; 973 } wow; 974 975 struct ath12k_ce ce; 976 struct timer_list rx_replenish_retry; 977 struct ath12k_hal hal; 978 /* To synchronize core_start/core_stop */ 979 struct mutex core_lock; 980 /* Protects data like peers */ 981 spinlock_t base_lock; 982 983 /* Single pdev device (struct ath12k_hw_params::single_pdev_only): 984 * 985 * Firmware maintains data for all bands but advertises a single 986 * phy to the host which is stored as a single element in this 987 * array. 988 * 989 * Other devices: 990 * 991 * This array will contain as many elements as the number of 992 * radios. 993 */ 994 struct ath12k_pdev pdevs[MAX_RADIOS]; 995 996 /* struct ath12k_hw_params::single_pdev_only devices use this to 997 * store phy specific data 998 */ 999 struct ath12k_fw_pdev fw_pdev[MAX_RADIOS]; 1000 u8 fw_pdev_count; 1001 1002 struct ath12k_pdev __rcu *pdevs_active[MAX_RADIOS]; 1003 1004 struct ath12k_wmi_hal_reg_capabilities_ext_arg hal_reg_cap[MAX_RADIOS]; 1005 unsigned long long free_vdev_map; 1006 unsigned long long free_vdev_stats_id_map; 1007 wait_queue_head_t peer_mapping_wq; 1008 u8 mac_addr[ETH_ALEN]; 1009 bool wmi_ready; 1010 u32 wlan_init_status; 1011 int irq_num[ATH12K_IRQ_NUM_MAX]; 1012 struct ath12k_ext_irq_grp ext_irq_grp[ATH12K_EXT_IRQ_GRP_NUM_MAX]; 1013 struct napi_struct *napi; 1014 struct ath12k_wmi_target_cap_arg target_caps; 1015 u32 ext_service_bitmap[WMI_SERVICE_EXT_BM_SIZE]; 1016 bool pdevs_macaddr_valid; 1017 1018 const struct ath12k_hw_params *hw_params; 1019 1020 const struct firmware *cal_file; 1021 1022 /* Below regd's are protected by ab->data_lock */ 1023 /* This is the regd set for every radio 1024 * by the firmware during initialization 1025 */ 1026 struct ieee80211_regdomain *default_regd[MAX_RADIOS]; 1027 /* This regd is set during dynamic country setting 1028 * This may or may not be used during the runtime 1029 */ 1030 struct ieee80211_regdomain *new_regd[MAX_RADIOS]; 1031 1032 struct ath12k_reg_info *reg_info[MAX_RADIOS]; 1033 1034 /* Current DFS Regulatory */ 1035 enum ath12k_dfs_region dfs_region; 1036 #ifdef CONFIG_ATH12K_DEBUGFS 1037 struct dentry *debugfs_soc; 1038 #endif 1039 1040 unsigned long dev_flags; 1041 struct completion driver_recovery; 1042 struct workqueue_struct *workqueue; 1043 struct work_struct restart_work; 1044 struct workqueue_struct *workqueue_aux; 1045 struct work_struct reset_work; 1046 atomic_t reset_count; 1047 atomic_t recovery_count; 1048 bool is_reset; 1049 struct completion reset_complete; 1050 /* continuous recovery fail count */ 1051 atomic_t fail_cont_count; 1052 unsigned long reset_fail_timeout; 1053 struct work_struct update_11d_work; 1054 u8 new_alpha2[2]; 1055 struct { 1056 /* protected by data_lock */ 1057 u32 fw_crash_counter; 1058 } stats; 1059 u32 pktlog_defs_checksum; 1060 1061 struct ath12k_dbring_cap *db_caps; 1062 u32 num_db_cap; 1063 1064 struct completion htc_suspend; 1065 1066 u64 fw_soc_drop_count; 1067 bool static_window_map; 1068 1069 struct work_struct rfkill_work; 1070 /* true means radio is on */ 1071 bool rfkill_radio_on; 1072 1073 struct { 1074 enum ath12k_bdf_search bdf_search; 1075 u32 vendor; 1076 u32 device; 1077 u32 subsystem_vendor; 1078 u32 subsystem_device; 1079 } id; 1080 1081 struct { 1082 u32 api_version; 1083 1084 const struct firmware *fw; 1085 const u8 *amss_data; 1086 size_t amss_len; 1087 const u8 *amss_dualmac_data; 1088 size_t amss_dualmac_len; 1089 const u8 *m3_data; 1090 size_t m3_len; 1091 const u8 *aux_uc_data; 1092 size_t aux_uc_len; 1093 1094 DECLARE_BITMAP(fw_features, ATH12K_FW_FEATURE_COUNT); 1095 bool fw_features_valid; 1096 } fw; 1097 1098 struct completion restart_completed; 1099 1100 #ifdef CONFIG_ACPI 1101 1102 struct { 1103 bool started; 1104 u32 func_bit; 1105 bool acpi_tas_enable; 1106 bool acpi_bios_sar_enable; 1107 bool acpi_disable_11be; 1108 bool acpi_disable_rfkill; 1109 bool acpi_cca_enable; 1110 bool acpi_band_edge_enable; 1111 bool acpi_enable_bdf; 1112 u32 bit_flag; 1113 char bdf_string[ATH12K_ACPI_BDF_MAX_LEN]; 1114 u8 tas_cfg[ATH12K_ACPI_DSM_TAS_CFG_SIZE]; 1115 u8 tas_sar_power_table[ATH12K_ACPI_DSM_TAS_DATA_SIZE]; 1116 u8 bios_sar_data[ATH12K_ACPI_DSM_BIOS_SAR_DATA_SIZE]; 1117 u8 geo_offset_data[ATH12K_ACPI_DSM_GEO_OFFSET_DATA_SIZE]; 1118 u8 cca_data[ATH12K_ACPI_DSM_CCA_DATA_SIZE]; 1119 u8 band_edge_power[ATH12K_ACPI_DSM_BAND_EDGE_DATA_SIZE]; 1120 } acpi; 1121 1122 #endif /* CONFIG_ACPI */ 1123 1124 struct notifier_block panic_nb; 1125 1126 struct ath12k_hw_group *ag; 1127 struct ath12k_wsi_info wsi_info; 1128 enum ath12k_firmware_mode fw_mode; 1129 struct ath12k_ftm_event_obj ftm_event_obj; 1130 bool hw_group_ref; 1131 1132 /* Denote whether MLO is possible within the device */ 1133 bool single_chip_mlo_support; 1134 1135 struct ath12k_reg_freq reg_freq_2ghz; 1136 struct ath12k_reg_freq reg_freq_5ghz; 1137 struct ath12k_reg_freq reg_freq_6ghz; 1138 const struct ath12k_mem_profile_based_param *profile_param; 1139 enum ath12k_qmi_mem_mode target_mem_mode; 1140 1141 /* FIXME: Define this field in a ag equivalent object available 1142 * during the initial phase of probe later. 1143 */ 1144 const struct ieee80211_ops *ath12k_ops; 1145 1146 struct rhashtable *rhead_sta_addr; 1147 struct rhashtable_params rhash_sta_addr_param; 1148 1149 /* must be last */ 1150 u8 drv_priv[] __aligned(sizeof(void *)); 1151 }; 1152 1153 struct ath12k_pdev_map { 1154 struct ath12k_base *ab; 1155 u8 pdev_idx; 1156 }; 1157 1158 struct ath12k_fw_stats_vdev { 1159 struct list_head list; 1160 1161 u32 vdev_id; 1162 u32 beacon_snr; 1163 u32 data_snr; 1164 u32 num_tx_frames[WLAN_MAX_AC]; 1165 u32 num_rx_frames; 1166 u32 num_tx_frames_retries[WLAN_MAX_AC]; 1167 u32 num_tx_frames_failures[WLAN_MAX_AC]; 1168 u32 num_rts_fail; 1169 u32 num_rts_success; 1170 u32 num_rx_err; 1171 u32 num_rx_discard; 1172 u32 num_tx_not_acked; 1173 u32 tx_rate_history[MAX_TX_RATE_VALUES]; 1174 u32 beacon_rssi_history[MAX_TX_RATE_VALUES]; 1175 }; 1176 1177 struct ath12k_fw_stats_bcn { 1178 struct list_head list; 1179 1180 u32 vdev_id; 1181 u32 tx_bcn_succ_cnt; 1182 u32 tx_bcn_outage_cnt; 1183 }; 1184 1185 struct ath12k_fw_stats_pdev { 1186 struct list_head list; 1187 1188 /* PDEV stats */ 1189 s32 ch_noise_floor; 1190 u32 tx_frame_count; 1191 u32 rx_frame_count; 1192 u32 rx_clear_count; 1193 u32 cycle_count; 1194 u32 phy_err_count; 1195 u32 chan_tx_power; 1196 u32 ack_rx_bad; 1197 u32 rts_bad; 1198 u32 rts_good; 1199 u32 fcs_bad; 1200 u32 no_beacons; 1201 u32 mib_int_count; 1202 1203 /* PDEV TX stats */ 1204 s32 comp_queued; 1205 s32 comp_delivered; 1206 s32 msdu_enqued; 1207 s32 mpdu_enqued; 1208 s32 wmm_drop; 1209 s32 local_enqued; 1210 s32 local_freed; 1211 s32 hw_queued; 1212 s32 hw_reaped; 1213 s32 underrun; 1214 s32 tx_abort; 1215 s32 mpdus_requed; 1216 u32 tx_ko; 1217 u32 data_rc; 1218 u32 self_triggers; 1219 u32 sw_retry_failure; 1220 u32 illgl_rate_phy_err; 1221 u32 pdev_cont_xretry; 1222 u32 pdev_tx_timeout; 1223 u32 pdev_resets; 1224 u32 stateless_tid_alloc_failure; 1225 u32 phy_underrun; 1226 u32 txop_ovf; 1227 1228 /* PDEV RX stats */ 1229 s32 mid_ppdu_route_change; 1230 s32 status_rcvd; 1231 s32 r0_frags; 1232 s32 r1_frags; 1233 s32 r2_frags; 1234 s32 r3_frags; 1235 s32 htt_msdus; 1236 s32 htt_mpdus; 1237 s32 loc_msdus; 1238 s32 loc_mpdus; 1239 s32 oversize_amsdu; 1240 s32 phy_errs; 1241 s32 phy_err_drop; 1242 s32 mpdu_errs; 1243 }; 1244 1245 int ath12k_core_qmi_firmware_ready(struct ath12k_base *ab); 1246 void ath12k_core_hw_group_cleanup(struct ath12k_hw_group *ag); 1247 int ath12k_core_pre_init(struct ath12k_base *ab); 1248 int ath12k_core_init(struct ath12k_base *ath12k); 1249 void ath12k_core_deinit(struct ath12k_base *ath12k); 1250 struct ath12k_base *ath12k_core_alloc(struct device *dev, size_t priv_size, 1251 enum ath12k_bus bus); 1252 void ath12k_core_free(struct ath12k_base *ath12k); 1253 int ath12k_core_fetch_board_data_api_1(struct ath12k_base *ab, 1254 struct ath12k_board_data *bd, 1255 char *filename); 1256 int ath12k_core_fetch_bdf(struct ath12k_base *ath12k, 1257 struct ath12k_board_data *bd); 1258 void ath12k_core_free_bdf(struct ath12k_base *ab, struct ath12k_board_data *bd); 1259 int ath12k_core_fetch_regdb(struct ath12k_base *ab, struct ath12k_board_data *bd); 1260 int ath12k_core_check_dt(struct ath12k_base *ath12k); 1261 int ath12k_core_check_smbios(struct ath12k_base *ab); 1262 void ath12k_core_halt(struct ath12k *ar); 1263 int ath12k_core_resume_early(struct ath12k_base *ab); 1264 int ath12k_core_resume(struct ath12k_base *ab); 1265 int ath12k_core_suspend(struct ath12k_base *ab); 1266 int ath12k_core_suspend_late(struct ath12k_base *ab); 1267 void ath12k_core_hw_group_unassign(struct ath12k_base *ab); 1268 u8 ath12k_get_num_partner_link(struct ath12k *ar); 1269 1270 const struct firmware *ath12k_core_firmware_request(struct ath12k_base *ab, 1271 const char *filename); 1272 u32 ath12k_core_get_max_station_per_radio(struct ath12k_base *ab); 1273 u32 ath12k_core_get_max_peers_per_radio(struct ath12k_base *ab); 1274 1275 void ath12k_core_hw_group_set_mlo_capable(struct ath12k_hw_group *ag); 1276 void ath12k_fw_stats_init(struct ath12k *ar); 1277 void ath12k_fw_stats_bcn_free(struct list_head *head); 1278 void ath12k_fw_stats_free(struct ath12k_fw_stats *stats); 1279 void ath12k_fw_stats_reset(struct ath12k *ar); 1280 struct reserved_mem *ath12k_core_get_reserved_mem(struct ath12k_base *ab, 1281 int index); 1282 enum ath12k_qmi_mem_mode ath12k_core_get_memory_mode(struct ath12k_base *ab); 1283 1284 static inline const char *ath12k_scan_state_str(enum ath12k_scan_state state) 1285 { 1286 switch (state) { 1287 case ATH12K_SCAN_IDLE: 1288 return "idle"; 1289 case ATH12K_SCAN_STARTING: 1290 return "starting"; 1291 case ATH12K_SCAN_RUNNING: 1292 return "running"; 1293 case ATH12K_SCAN_ABORTING: 1294 return "aborting"; 1295 } 1296 1297 return "unknown"; 1298 } 1299 1300 static inline struct ath12k_skb_cb *ATH12K_SKB_CB(struct sk_buff *skb) 1301 { 1302 BUILD_BUG_ON(sizeof(struct ath12k_skb_cb) > 1303 IEEE80211_TX_INFO_DRIVER_DATA_SIZE); 1304 return (struct ath12k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data; 1305 } 1306 1307 static inline struct ath12k_skb_rxcb *ATH12K_SKB_RXCB(struct sk_buff *skb) 1308 { 1309 BUILD_BUG_ON(sizeof(struct ath12k_skb_rxcb) > sizeof(skb->cb)); 1310 return (struct ath12k_skb_rxcb *)skb->cb; 1311 } 1312 1313 static inline struct ath12k_vif *ath12k_vif_to_ahvif(struct ieee80211_vif *vif) 1314 { 1315 return (struct ath12k_vif *)vif->drv_priv; 1316 } 1317 1318 static inline struct ath12k_sta *ath12k_sta_to_ahsta(struct ieee80211_sta *sta) 1319 { 1320 return (struct ath12k_sta *)sta->drv_priv; 1321 } 1322 1323 static inline struct ieee80211_sta *ath12k_ahsta_to_sta(struct ath12k_sta *ahsta) 1324 { 1325 return container_of((void *)ahsta, struct ieee80211_sta, drv_priv); 1326 } 1327 1328 static inline struct ieee80211_vif *ath12k_ahvif_to_vif(struct ath12k_vif *ahvif) 1329 { 1330 return container_of((void *)ahvif, struct ieee80211_vif, drv_priv); 1331 } 1332 1333 static inline struct ath12k *ath12k_ab_to_ar(struct ath12k_base *ab, 1334 int mac_id) 1335 { 1336 return ab->pdevs[ath12k_hw_mac_id_to_pdev_id(ab->hw_params, mac_id)].ar; 1337 } 1338 1339 static inline void ath12k_core_create_firmware_path(struct ath12k_base *ab, 1340 const char *filename, 1341 void *buf, size_t buf_len) 1342 { 1343 const char *fw_name = NULL; 1344 1345 of_property_read_string(ab->dev->of_node, "firmware-name", &fw_name); 1346 1347 if (fw_name && strncmp(filename, "board", 5)) 1348 snprintf(buf, buf_len, "%s/%s/%s/%s", ATH12K_FW_DIR, 1349 ab->hw_params->fw.dir, fw_name, filename); 1350 else 1351 snprintf(buf, buf_len, "%s/%s/%s", ATH12K_FW_DIR, 1352 ab->hw_params->fw.dir, filename); 1353 } 1354 1355 static inline const char *ath12k_bus_str(enum ath12k_bus bus) 1356 { 1357 switch (bus) { 1358 case ATH12K_BUS_PCI: 1359 return "pci"; 1360 case ATH12K_BUS_AHB: 1361 return "ahb"; 1362 } 1363 1364 return "unknown"; 1365 } 1366 1367 static inline struct ath12k_hw *ath12k_hw_to_ah(struct ieee80211_hw *hw) 1368 { 1369 return hw->priv; 1370 } 1371 1372 static inline struct ath12k *ath12k_ah_to_ar(struct ath12k_hw *ah, u8 radio_idx) 1373 { 1374 if (WARN(radio_idx >= ah->num_radio, 1375 "bad radio index %d, use default radio\n", radio_idx)) 1376 radio_idx = 0; 1377 1378 return &ah->radio[radio_idx]; 1379 } 1380 1381 static inline struct ath12k_hw *ath12k_ar_to_ah(struct ath12k *ar) 1382 { 1383 return ar->ah; 1384 } 1385 1386 static inline struct ieee80211_hw *ath12k_ar_to_hw(struct ath12k *ar) 1387 { 1388 return ar->ah->hw; 1389 } 1390 1391 #define for_each_ar(ah, ar, index) \ 1392 for ((index) = 0; ((index) < (ah)->num_radio && \ 1393 ((ar) = &(ah)->radio[(index)])); (index)++) 1394 1395 static inline struct ath12k_hw *ath12k_ag_to_ah(struct ath12k_hw_group *ag, int idx) 1396 { 1397 return ag->ah[idx]; 1398 } 1399 1400 static inline void ath12k_ag_set_ah(struct ath12k_hw_group *ag, int idx, 1401 struct ath12k_hw *ah) 1402 { 1403 ag->ah[idx] = ah; 1404 } 1405 1406 static inline struct ath12k_hw_group *ath12k_ab_to_ag(struct ath12k_base *ab) 1407 { 1408 return ab->ag; 1409 } 1410 1411 static inline struct ath12k_base *ath12k_ag_to_ab(struct ath12k_hw_group *ag, 1412 u8 device_id) 1413 { 1414 return ag->ab[device_id]; 1415 } 1416 1417 static inline s32 ath12k_pdev_get_noise_floor(struct ath12k *ar) 1418 { 1419 lockdep_assert_held(&ar->data_lock); 1420 1421 return ar->rssi_info.noise_floor; 1422 } 1423 1424 /* The @ab->dp NULL check or assertion is intentionally omitted because 1425 * @ab->dp is guaranteed to be non-NULL after a successful probe and 1426 * remains valid until teardown. Invoking this before allocation or 1427 * after teardown is considered invalid usage. 1428 */ 1429 static inline struct ath12k_dp *ath12k_ab_to_dp(struct ath12k_base *ab) 1430 { 1431 return ab->dp; 1432 } 1433 1434 static inline struct ath12k *ath12k_pdev_dp_to_ar(struct ath12k_pdev_dp *dp) 1435 { 1436 return container_of(dp, struct ath12k, dp); 1437 } 1438 #endif /* _CORE_H_ */ 1439