1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */ 2 /* 3 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved. 4 * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved. 5 */ 6 7 #ifndef ATH12K_CORE_H 8 #define ATH12K_CORE_H 9 10 #include <linux/types.h> 11 #include <linux/interrupt.h> 12 #include <linux/irq.h> 13 #include <linux/bitfield.h> 14 #include <linux/dmi.h> 15 #include <linux/ctype.h> 16 #include <linux/firmware.h> 17 #include <linux/panic_notifier.h> 18 #include "qmi.h" 19 #include "htc.h" 20 #include "wmi.h" 21 #include "hal.h" 22 #include "dp.h" 23 #include "ce.h" 24 #include "mac.h" 25 #include "hw.h" 26 #include "hal_rx.h" 27 #include "reg.h" 28 #include "dbring.h" 29 #include "fw.h" 30 #include "acpi.h" 31 #include "wow.h" 32 #include "debugfs_htt_stats.h" 33 34 #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK) 35 36 #define ATH12K_TX_MGMT_NUM_PENDING_MAX 512 37 38 #define ATH12K_TX_MGMT_TARGET_MAX_SUPPORT_WMI 64 39 40 /* Pending management packets threshold for dropping probe responses */ 41 #define ATH12K_PRB_RSP_DROP_THRESHOLD ((ATH12K_TX_MGMT_TARGET_MAX_SUPPORT_WMI * 3) / 4) 42 43 /* SMBIOS type containing Board Data File Name Extension */ 44 #define ATH12K_SMBIOS_BDF_EXT_TYPE 0xF8 45 46 /* SMBIOS type structure length (excluding strings-set) */ 47 #define ATH12K_SMBIOS_BDF_EXT_LENGTH 0x9 48 49 /* The magic used by QCA spec */ 50 #define ATH12K_SMBIOS_BDF_EXT_MAGIC "BDF_" 51 52 #define ATH12K_INVALID_HW_MAC_ID 0xFF 53 #define ATH12K_CONNECTION_LOSS_HZ (3 * HZ) 54 #define ATH12K_RX_RATE_TABLE_NUM 320 55 #define ATH12K_RX_RATE_TABLE_11AX_NUM 576 56 57 #define ATH12K_MON_TIMER_INTERVAL 10 58 #define ATH12K_RESET_TIMEOUT_HZ (20 * HZ) 59 #define ATH12K_RESET_MAX_FAIL_COUNT_FIRST 3 60 #define ATH12K_RESET_MAX_FAIL_COUNT_FINAL 5 61 #define ATH12K_RESET_FAIL_TIMEOUT_HZ (20 * HZ) 62 #define ATH12K_RECONFIGURE_TIMEOUT_HZ (10 * HZ) 63 #define ATH12K_RECOVER_START_TIMEOUT_HZ (20 * HZ) 64 65 enum ath12k_bdf_search { 66 ATH12K_BDF_SEARCH_DEFAULT, 67 ATH12K_BDF_SEARCH_BUS_AND_BOARD, 68 }; 69 70 enum wme_ac { 71 WME_AC_BE, 72 WME_AC_BK, 73 WME_AC_VI, 74 WME_AC_VO, 75 WME_NUM_AC 76 }; 77 78 #define ATH12K_HT_MCS_MAX 7 79 #define ATH12K_VHT_MCS_MAX 9 80 #define ATH12K_HE_MCS_MAX 11 81 82 enum ath12k_crypt_mode { 83 /* Only use hardware crypto engine */ 84 ATH12K_CRYPT_MODE_HW, 85 /* Only use software crypto */ 86 ATH12K_CRYPT_MODE_SW, 87 }; 88 89 static inline enum wme_ac ath12k_tid_to_ac(u32 tid) 90 { 91 return (((tid == 0) || (tid == 3)) ? WME_AC_BE : 92 ((tid == 1) || (tid == 2)) ? WME_AC_BK : 93 ((tid == 4) || (tid == 5)) ? WME_AC_VI : 94 WME_AC_VO); 95 } 96 97 enum ath12k_skb_flags { 98 ATH12K_SKB_HW_80211_ENCAP = BIT(0), 99 ATH12K_SKB_CIPHER_SET = BIT(1), 100 }; 101 102 struct ath12k_skb_cb { 103 dma_addr_t paddr; 104 struct ath12k *ar; 105 struct ieee80211_vif *vif; 106 dma_addr_t paddr_ext_desc; 107 u32 cipher; 108 u8 flags; 109 }; 110 111 struct ath12k_skb_rxcb { 112 dma_addr_t paddr; 113 bool is_first_msdu; 114 bool is_last_msdu; 115 bool is_continuation; 116 bool is_mcbc; 117 bool is_eapol; 118 struct hal_rx_desc *rx_desc; 119 u8 err_rel_src; 120 u8 err_code; 121 u8 mac_id; 122 u8 unmapped; 123 u8 is_frag; 124 u8 tid; 125 u16 peer_id; 126 }; 127 128 enum ath12k_hw_rev { 129 ATH12K_HW_QCN9274_HW10, 130 ATH12K_HW_QCN9274_HW20, 131 ATH12K_HW_WCN7850_HW20 132 }; 133 134 enum ath12k_firmware_mode { 135 /* the default mode, standard 802.11 functionality */ 136 ATH12K_FIRMWARE_MODE_NORMAL, 137 138 /* factory tests etc */ 139 ATH12K_FIRMWARE_MODE_FTM, 140 }; 141 142 #define ATH12K_IRQ_NUM_MAX 57 143 #define ATH12K_EXT_IRQ_NUM_MAX 16 144 145 struct ath12k_ext_irq_grp { 146 struct ath12k_base *ab; 147 u32 irqs[ATH12K_EXT_IRQ_NUM_MAX]; 148 u32 num_irq; 149 u32 grp_id; 150 u64 timestamp; 151 struct napi_struct napi; 152 struct net_device *napi_ndev; 153 }; 154 155 struct ath12k_smbios_bdf { 156 struct dmi_header hdr; 157 u32 padding; 158 u8 bdf_enabled; 159 u8 bdf_ext[]; 160 } __packed; 161 162 #define HEHANDLE_CAP_PHYINFO_SIZE 3 163 #define HECAP_PHYINFO_SIZE 9 164 #define HECAP_MACINFO_SIZE 5 165 #define HECAP_TXRX_MCS_NSS_SIZE 2 166 #define HECAP_PPET16_PPET8_MAX_SIZE 25 167 168 #define HE_PPET16_PPET8_SIZE 8 169 170 /* 802.11ax PPE (PPDU packet Extension) threshold */ 171 struct he_ppe_threshold { 172 u32 numss_m1; 173 u32 ru_mask; 174 u32 ppet16_ppet8_ru3_ru0[HE_PPET16_PPET8_SIZE]; 175 }; 176 177 struct ath12k_he { 178 u8 hecap_macinfo[HECAP_MACINFO_SIZE]; 179 u32 hecap_rxmcsnssmap; 180 u32 hecap_txmcsnssmap; 181 u32 hecap_phyinfo[HEHANDLE_CAP_PHYINFO_SIZE]; 182 struct he_ppe_threshold hecap_ppet; 183 u32 heop_param; 184 }; 185 186 enum { 187 WMI_HOST_TP_SCALE_MAX = 0, 188 WMI_HOST_TP_SCALE_50 = 1, 189 WMI_HOST_TP_SCALE_25 = 2, 190 WMI_HOST_TP_SCALE_12 = 3, 191 WMI_HOST_TP_SCALE_MIN = 4, 192 WMI_HOST_TP_SCALE_SIZE = 5, 193 }; 194 195 enum ath12k_scan_state { 196 ATH12K_SCAN_IDLE, 197 ATH12K_SCAN_STARTING, 198 ATH12K_SCAN_RUNNING, 199 ATH12K_SCAN_ABORTING, 200 }; 201 202 enum ath12k_dev_flags { 203 ATH12K_CAC_RUNNING, 204 ATH12K_FLAG_CRASH_FLUSH, 205 ATH12K_FLAG_RAW_MODE, 206 ATH12K_FLAG_HW_CRYPTO_DISABLED, 207 ATH12K_FLAG_RECOVERY, 208 ATH12K_FLAG_UNREGISTERING, 209 ATH12K_FLAG_REGISTERED, 210 ATH12K_FLAG_QMI_FAIL, 211 ATH12K_FLAG_HTC_SUSPEND_COMPLETE, 212 ATH12K_FLAG_CE_IRQ_ENABLED, 213 ATH12K_FLAG_EXT_IRQ_ENABLED, 214 }; 215 216 struct ath12k_tx_conf { 217 bool changed; 218 u16 ac; 219 struct ieee80211_tx_queue_params tx_queue_params; 220 }; 221 222 struct ath12k_key_conf { 223 bool changed; 224 enum set_key_cmd cmd; 225 struct ieee80211_key_conf *key; 226 }; 227 228 struct ath12k_vif_cache { 229 struct ath12k_tx_conf tx_conf; 230 struct ath12k_key_conf key_conf; 231 u32 bss_conf_changed; 232 }; 233 234 struct ath12k_rekey_data { 235 u8 kck[NL80211_KCK_LEN]; 236 u8 kek[NL80211_KCK_LEN]; 237 u64 replay_ctr; 238 bool enable_offload; 239 }; 240 241 struct ath12k_vif { 242 u32 vdev_id; 243 enum wmi_vdev_type vdev_type; 244 enum wmi_vdev_subtype vdev_subtype; 245 u32 beacon_interval; 246 u32 dtim_period; 247 u16 ast_hash; 248 u16 ast_idx; 249 u16 tcl_metadata; 250 u8 hal_addr_search_flags; 251 u8 search_type; 252 253 struct ath12k *ar; 254 struct ieee80211_vif *vif; 255 256 int bank_id; 257 u8 vdev_id_check_en; 258 259 struct wmi_wmm_params_all_arg wmm_params; 260 struct list_head list; 261 union { 262 struct { 263 u32 uapsd; 264 } sta; 265 struct { 266 /* 127 stations; wmi limit */ 267 u8 tim_bitmap[16]; 268 u8 tim_len; 269 u32 ssid_len; 270 u8 ssid[IEEE80211_MAX_SSID_LEN]; 271 bool hidden_ssid; 272 /* P2P_IE with NoA attribute for P2P_GO case */ 273 u32 noa_len; 274 u8 *noa_data; 275 } ap; 276 } u; 277 278 bool is_created; 279 bool is_started; 280 bool is_up; 281 u32 aid; 282 u8 bssid[ETH_ALEN]; 283 struct cfg80211_bitrate_mask bitrate_mask; 284 struct delayed_work connection_loss_work; 285 int num_legacy_stations; 286 int rtscts_prot_mode; 287 int txpower; 288 bool rsnie_present; 289 bool wpaie_present; 290 struct ieee80211_chanctx_conf chanctx; 291 u32 key_cipher; 292 u8 tx_encap_type; 293 u8 vdev_stats_id; 294 u32 punct_bitmap; 295 bool ps; 296 struct ath12k_vif_cache *cache; 297 struct ath12k_rekey_data rekey_data; 298 }; 299 300 struct ath12k_vif_iter { 301 u32 vdev_id; 302 struct ath12k *ar; 303 struct ath12k_vif *arvif; 304 }; 305 306 #define HAL_AST_IDX_INVALID 0xFFFF 307 #define HAL_RX_MAX_MCS 12 308 #define HAL_RX_MAX_MCS_HT 31 309 #define HAL_RX_MAX_MCS_VHT 9 310 #define HAL_RX_MAX_MCS_HE 11 311 #define HAL_RX_MAX_NSS 8 312 #define HAL_RX_MAX_NUM_LEGACY_RATES 12 313 #define ATH12K_RX_RATE_TABLE_11AX_NUM 576 314 #define ATH12K_RX_RATE_TABLE_NUM 320 315 316 struct ath12k_rx_peer_rate_stats { 317 u64 ht_mcs_count[HAL_RX_MAX_MCS_HT + 1]; 318 u64 vht_mcs_count[HAL_RX_MAX_MCS_VHT + 1]; 319 u64 he_mcs_count[HAL_RX_MAX_MCS_HE + 1]; 320 u64 nss_count[HAL_RX_MAX_NSS]; 321 u64 bw_count[HAL_RX_BW_MAX]; 322 u64 gi_count[HAL_RX_GI_MAX]; 323 u64 legacy_count[HAL_RX_MAX_NUM_LEGACY_RATES]; 324 u64 rx_rate[ATH12K_RX_RATE_TABLE_11AX_NUM]; 325 }; 326 327 struct ath12k_rx_peer_stats { 328 u64 num_msdu; 329 u64 num_mpdu_fcs_ok; 330 u64 num_mpdu_fcs_err; 331 u64 tcp_msdu_count; 332 u64 udp_msdu_count; 333 u64 other_msdu_count; 334 u64 ampdu_msdu_count; 335 u64 non_ampdu_msdu_count; 336 u64 stbc_count; 337 u64 beamformed_count; 338 u64 mcs_count[HAL_RX_MAX_MCS + 1]; 339 u64 nss_count[HAL_RX_MAX_NSS]; 340 u64 bw_count[HAL_RX_BW_MAX]; 341 u64 gi_count[HAL_RX_GI_MAX]; 342 u64 coding_count[HAL_RX_SU_MU_CODING_MAX]; 343 u64 tid_count[IEEE80211_NUM_TIDS + 1]; 344 u64 pream_cnt[HAL_RX_PREAMBLE_MAX]; 345 u64 reception_type[HAL_RX_RECEPTION_TYPE_MAX]; 346 u64 rx_duration; 347 u64 dcm_count; 348 u64 ru_alloc_cnt[HAL_RX_RU_ALLOC_TYPE_MAX]; 349 struct ath12k_rx_peer_rate_stats pkt_stats; 350 struct ath12k_rx_peer_rate_stats byte_stats; 351 }; 352 353 #define ATH12K_HE_MCS_NUM 12 354 #define ATH12K_VHT_MCS_NUM 10 355 #define ATH12K_BW_NUM 5 356 #define ATH12K_NSS_NUM 4 357 #define ATH12K_LEGACY_NUM 12 358 #define ATH12K_GI_NUM 4 359 #define ATH12K_HT_MCS_NUM 32 360 361 enum ath12k_pkt_rx_err { 362 ATH12K_PKT_RX_ERR_FCS, 363 ATH12K_PKT_RX_ERR_TKIP, 364 ATH12K_PKT_RX_ERR_CRYPT, 365 ATH12K_PKT_RX_ERR_PEER_IDX_INVAL, 366 ATH12K_PKT_RX_ERR_MAX, 367 }; 368 369 enum ath12k_ampdu_subfrm_num { 370 ATH12K_AMPDU_SUBFRM_NUM_10, 371 ATH12K_AMPDU_SUBFRM_NUM_20, 372 ATH12K_AMPDU_SUBFRM_NUM_30, 373 ATH12K_AMPDU_SUBFRM_NUM_40, 374 ATH12K_AMPDU_SUBFRM_NUM_50, 375 ATH12K_AMPDU_SUBFRM_NUM_60, 376 ATH12K_AMPDU_SUBFRM_NUM_MORE, 377 ATH12K_AMPDU_SUBFRM_NUM_MAX, 378 }; 379 380 enum ath12k_amsdu_subfrm_num { 381 ATH12K_AMSDU_SUBFRM_NUM_1, 382 ATH12K_AMSDU_SUBFRM_NUM_2, 383 ATH12K_AMSDU_SUBFRM_NUM_3, 384 ATH12K_AMSDU_SUBFRM_NUM_4, 385 ATH12K_AMSDU_SUBFRM_NUM_MORE, 386 ATH12K_AMSDU_SUBFRM_NUM_MAX, 387 }; 388 389 enum ath12k_counter_type { 390 ATH12K_COUNTER_TYPE_BYTES, 391 ATH12K_COUNTER_TYPE_PKTS, 392 ATH12K_COUNTER_TYPE_MAX, 393 }; 394 395 enum ath12k_stats_type { 396 ATH12K_STATS_TYPE_SUCC, 397 ATH12K_STATS_TYPE_FAIL, 398 ATH12K_STATS_TYPE_RETRY, 399 ATH12K_STATS_TYPE_AMPDU, 400 ATH12K_STATS_TYPE_MAX, 401 }; 402 403 struct ath12k_htt_data_stats { 404 u64 legacy[ATH12K_COUNTER_TYPE_MAX][ATH12K_LEGACY_NUM]; 405 u64 ht[ATH12K_COUNTER_TYPE_MAX][ATH12K_HT_MCS_NUM]; 406 u64 vht[ATH12K_COUNTER_TYPE_MAX][ATH12K_VHT_MCS_NUM]; 407 u64 he[ATH12K_COUNTER_TYPE_MAX][ATH12K_HE_MCS_NUM]; 408 u64 bw[ATH12K_COUNTER_TYPE_MAX][ATH12K_BW_NUM]; 409 u64 nss[ATH12K_COUNTER_TYPE_MAX][ATH12K_NSS_NUM]; 410 u64 gi[ATH12K_COUNTER_TYPE_MAX][ATH12K_GI_NUM]; 411 u64 transmit_type[ATH12K_COUNTER_TYPE_MAX][HAL_RX_RECEPTION_TYPE_MAX]; 412 u64 ru_loc[ATH12K_COUNTER_TYPE_MAX][HAL_RX_RU_ALLOC_TYPE_MAX]; 413 }; 414 415 struct ath12k_htt_tx_stats { 416 struct ath12k_htt_data_stats stats[ATH12K_STATS_TYPE_MAX]; 417 u64 tx_duration; 418 u64 ba_fails; 419 u64 ack_fails; 420 u16 ru_start; 421 u16 ru_tones; 422 u32 mu_group[MAX_MU_GROUP_ID]; 423 }; 424 425 struct ath12k_per_ppdu_tx_stats { 426 u16 succ_pkts; 427 u16 failed_pkts; 428 u16 retry_pkts; 429 u32 succ_bytes; 430 u32 failed_bytes; 431 u32 retry_bytes; 432 }; 433 434 struct ath12k_wbm_tx_stats { 435 u64 wbm_tx_comp_stats[HAL_WBM_REL_HTT_TX_COMP_STATUS_MAX]; 436 }; 437 438 struct ath12k_sta { 439 struct ath12k_vif *arvif; 440 441 /* the following are protected by ar->data_lock */ 442 u32 changed; /* IEEE80211_RC_* */ 443 u32 bw; 444 u32 nss; 445 u32 smps; 446 enum hal_pn_type pn_type; 447 448 struct work_struct update_wk; 449 struct rate_info txrate; 450 struct rate_info last_txrate; 451 u64 rx_duration; 452 u64 tx_duration; 453 u8 rssi_comb; 454 struct ath12k_rx_peer_stats *rx_stats; 455 struct ath12k_wbm_tx_stats *wbm_tx_stats; 456 u32 bw_prev; 457 }; 458 459 #define ATH12K_MIN_5G_FREQ 4150 460 #define ATH12K_MIN_6G_FREQ 5925 461 #define ATH12K_MAX_6G_FREQ 7115 462 #define ATH12K_NUM_CHANS 101 463 #define ATH12K_MAX_5G_CHAN 173 464 465 enum ath12k_hw_state { 466 ATH12K_HW_STATE_OFF, 467 ATH12K_HW_STATE_ON, 468 ATH12K_HW_STATE_RESTARTING, 469 ATH12K_HW_STATE_RESTARTED, 470 ATH12K_HW_STATE_WEDGED, 471 /* Add other states as required */ 472 }; 473 474 /* Antenna noise floor */ 475 #define ATH12K_DEFAULT_NOISE_FLOOR -95 476 477 struct ath12k_fw_stats { 478 u32 pdev_id; 479 u32 stats_id; 480 struct list_head pdevs; 481 struct list_head vdevs; 482 struct list_head bcn; 483 }; 484 485 struct ath12k_dbg_htt_stats { 486 enum ath12k_dbg_htt_ext_stats_type type; 487 u32 cfg_param[4]; 488 u8 reset; 489 struct debug_htt_stats_req *stats_req; 490 }; 491 492 struct ath12k_debug { 493 struct dentry *debugfs_pdev; 494 struct dentry *debugfs_pdev_symlink; 495 struct ath12k_dbg_htt_stats htt_stats; 496 }; 497 498 struct ath12k_per_peer_tx_stats { 499 u32 succ_bytes; 500 u32 retry_bytes; 501 u32 failed_bytes; 502 u32 duration; 503 u16 succ_pkts; 504 u16 retry_pkts; 505 u16 failed_pkts; 506 u16 ru_start; 507 u16 ru_tones; 508 u8 ba_fails; 509 u8 ppdu_type; 510 u32 mu_grpid; 511 u32 mu_pos; 512 bool is_ampdu; 513 }; 514 515 #define ATH12K_FLUSH_TIMEOUT (5 * HZ) 516 #define ATH12K_VDEV_DELETE_TIMEOUT_HZ (5 * HZ) 517 518 struct ath12k { 519 struct ath12k_base *ab; 520 struct ath12k_pdev *pdev; 521 struct ath12k_hw *ah; 522 struct ath12k_wmi_pdev *wmi; 523 struct ath12k_pdev_dp dp; 524 u8 mac_addr[ETH_ALEN]; 525 u32 ht_cap_info; 526 u32 vht_cap_info; 527 struct ath12k_he ar_he; 528 bool supports_6ghz; 529 struct { 530 struct completion started; 531 struct completion completed; 532 struct completion on_channel; 533 struct delayed_work timeout; 534 enum ath12k_scan_state state; 535 bool is_roc; 536 int vdev_id; 537 int roc_freq; 538 bool roc_notify; 539 } scan; 540 541 struct { 542 struct ieee80211_supported_band sbands[NUM_NL80211_BANDS]; 543 struct ieee80211_sband_iftype_data 544 iftype[NUM_NL80211_BANDS][NUM_NL80211_IFTYPES]; 545 } mac; 546 547 unsigned long dev_flags; 548 unsigned int filter_flags; 549 u32 min_tx_power; 550 u32 max_tx_power; 551 u32 txpower_limit_2g; 552 u32 txpower_limit_5g; 553 u32 txpower_scale; 554 u32 power_scale; 555 u32 chan_tx_pwr; 556 u32 num_stations; 557 u32 max_num_stations; 558 bool monitor_present; 559 /* To synchronize concurrent synchronous mac80211 callback operations, 560 * concurrent debugfs configuration and concurrent FW statistics events. 561 */ 562 struct mutex conf_mutex; 563 /* protects the radio specific data like debug stats, ppdu_stats_info stats, 564 * vdev_stop_status info, scan data, ath12k_sta info, ath12k_vif info, 565 * channel context data, survey info, test mode data. 566 */ 567 spinlock_t data_lock; 568 569 struct list_head arvifs; 570 /* should never be NULL; needed for regular htt rx */ 571 struct ieee80211_channel *rx_channel; 572 573 /* valid during scan; needed for mgmt rx during scan */ 574 struct ieee80211_channel *scan_channel; 575 576 u8 cfg_tx_chainmask; 577 u8 cfg_rx_chainmask; 578 u8 num_rx_chains; 579 u8 num_tx_chains; 580 /* pdev_idx starts from 0 whereas pdev->pdev_id starts with 1 */ 581 u8 pdev_idx; 582 u8 lmac_id; 583 u8 hw_link_id; 584 585 struct completion peer_assoc_done; 586 struct completion peer_delete_done; 587 588 int install_key_status; 589 struct completion install_key_done; 590 591 int last_wmi_vdev_start_status; 592 struct completion vdev_setup_done; 593 struct completion vdev_delete_done; 594 595 int num_peers; 596 int max_num_peers; 597 u32 num_started_vdevs; 598 u32 num_created_vdevs; 599 unsigned long long allocated_vdev_map; 600 601 struct idr txmgmt_idr; 602 /* protects txmgmt_idr data */ 603 spinlock_t txmgmt_idr_lock; 604 atomic_t num_pending_mgmt_tx; 605 wait_queue_head_t txmgmt_empty_waitq; 606 607 /* cycle count is reported twice for each visited channel during scan. 608 * access protected by data_lock 609 */ 610 u32 survey_last_rx_clear_count; 611 u32 survey_last_cycle_count; 612 613 /* Channel info events are expected to come in pairs without and with 614 * COMPLETE flag set respectively for each channel visit during scan. 615 * 616 * However there are deviations from this rule. This flag is used to 617 * avoid reporting garbage data. 618 */ 619 bool ch_info_can_report_survey; 620 struct survey_info survey[ATH12K_NUM_CHANS]; 621 struct completion bss_survey_done; 622 623 struct work_struct regd_update_work; 624 625 struct work_struct wmi_mgmt_tx_work; 626 struct sk_buff_head wmi_mgmt_tx_queue; 627 628 struct ath12k_wow wow; 629 struct completion target_suspend; 630 bool target_suspend_ack; 631 struct ath12k_per_peer_tx_stats peer_tx_stats; 632 struct list_head ppdu_stats_info; 633 u32 ppdu_stat_list_depth; 634 635 struct ath12k_per_peer_tx_stats cached_stats; 636 u32 last_ppdu_id; 637 u32 cached_ppdu_id; 638 #ifdef CONFIG_ATH12K_DEBUGFS 639 struct ath12k_debug debug; 640 #endif 641 642 bool dfs_block_radar_events; 643 bool monitor_conf_enabled; 644 bool monitor_vdev_created; 645 bool monitor_started; 646 int monitor_vdev_id; 647 648 u32 freq_low; 649 u32 freq_high; 650 651 bool nlo_enabled; 652 }; 653 654 struct ath12k_hw { 655 struct ieee80211_hw *hw; 656 /* Protect the write operation of the hardware state ath12k_hw::state 657 * between hardware start<=>reconfigure<=>stop transitions. 658 */ 659 struct mutex hw_mutex; 660 enum ath12k_hw_state state; 661 bool regd_updated; 662 bool use_6ghz_regd; 663 u8 num_radio; 664 665 /* Keep last */ 666 struct ath12k radio[] __aligned(sizeof(void *)); 667 }; 668 669 struct ath12k_band_cap { 670 u32 phy_id; 671 u32 max_bw_supported; 672 u32 ht_cap_info; 673 u32 he_cap_info[2]; 674 u32 he_mcs; 675 u32 he_cap_phy_info[PSOC_HOST_MAX_PHY_SIZE]; 676 struct ath12k_wmi_ppe_threshold_arg he_ppet; 677 u16 he_6ghz_capa; 678 u32 eht_cap_mac_info[WMI_MAX_EHTCAP_MAC_SIZE]; 679 u32 eht_cap_phy_info[WMI_MAX_EHTCAP_PHY_SIZE]; 680 u32 eht_mcs_20_only; 681 u32 eht_mcs_80; 682 u32 eht_mcs_160; 683 u32 eht_mcs_320; 684 struct ath12k_wmi_ppe_threshold_arg eht_ppet; 685 u32 eht_cap_info_internal; 686 }; 687 688 struct ath12k_pdev_cap { 689 u32 supported_bands; 690 u32 ampdu_density; 691 u32 vht_cap; 692 u32 vht_mcs; 693 u32 he_mcs; 694 u32 tx_chain_mask; 695 u32 rx_chain_mask; 696 u32 tx_chain_mask_shift; 697 u32 rx_chain_mask_shift; 698 struct ath12k_band_cap band[NUM_NL80211_BANDS]; 699 }; 700 701 struct mlo_timestamp { 702 u32 info; 703 u32 sync_timestamp_lo_us; 704 u32 sync_timestamp_hi_us; 705 u32 mlo_offset_lo; 706 u32 mlo_offset_hi; 707 u32 mlo_offset_clks; 708 u32 mlo_comp_clks; 709 u32 mlo_comp_timer; 710 }; 711 712 struct ath12k_pdev { 713 struct ath12k *ar; 714 u32 pdev_id; 715 u32 hw_link_id; 716 struct ath12k_pdev_cap cap; 717 u8 mac_addr[ETH_ALEN]; 718 struct mlo_timestamp timestamp; 719 }; 720 721 struct ath12k_fw_pdev { 722 u32 pdev_id; 723 u32 phy_id; 724 u32 supported_bands; 725 }; 726 727 struct ath12k_board_data { 728 const struct firmware *fw; 729 const void *data; 730 size_t len; 731 }; 732 733 struct ath12k_soc_dp_tx_err_stats { 734 /* TCL Ring Descriptor unavailable */ 735 u32 desc_na[DP_TCL_NUM_RING_MAX]; 736 /* Other failures during dp_tx due to mem allocation failure 737 * idr unavailable etc. 738 */ 739 atomic_t misc_fail; 740 }; 741 742 struct ath12k_soc_dp_stats { 743 u32 err_ring_pkts; 744 u32 invalid_rbm; 745 u32 rxdma_error[HAL_REO_ENTR_RING_RXDMA_ECODE_MAX]; 746 u32 reo_error[HAL_REO_DEST_RING_ERROR_CODE_MAX]; 747 u32 hal_reo_error[DP_REO_DST_RING_MAX]; 748 struct ath12k_soc_dp_tx_err_stats tx_err; 749 }; 750 751 /** 752 * enum ath12k_link_capable_flags - link capable flags 753 * 754 * Single/Multi link capability information 755 * 756 * @ATH12K_INTRA_DEVICE_MLO_SUPPORT: SLO/MLO form between the radio, where all 757 * the links (radios) present within a device. 758 * @ATH12K_INTER_DEVICE_MLO_SUPPORT: SLO/MLO form between the radio, where all 759 * the links (radios) present across the devices. 760 */ 761 enum ath12k_link_capable_flags { 762 ATH12K_INTRA_DEVICE_MLO_SUPPORT = BIT(0), 763 ATH12K_INTER_DEVICE_MLO_SUPPORT = BIT(1), 764 }; 765 766 /* Master structure to hold the hw data which may be used in core module */ 767 struct ath12k_base { 768 enum ath12k_hw_rev hw_rev; 769 struct platform_device *pdev; 770 struct device *dev; 771 struct ath12k_qmi qmi; 772 struct ath12k_wmi_base wmi_ab; 773 struct completion fw_ready; 774 u8 device_id; 775 int num_radios; 776 /* HW channel counters frequency value in hertz common to all MACs */ 777 u32 cc_freq_hz; 778 779 struct ath12k_htc htc; 780 781 struct ath12k_dp dp; 782 783 void __iomem *mem; 784 unsigned long mem_len; 785 786 struct { 787 enum ath12k_bus bus; 788 const struct ath12k_hif_ops *ops; 789 } hif; 790 791 struct { 792 struct completion wakeup_completed; 793 u32 wmi_conf_rx_decap_mode; 794 } wow; 795 796 struct ath12k_ce ce; 797 struct timer_list rx_replenish_retry; 798 struct ath12k_hal hal; 799 /* To synchronize core_start/core_stop */ 800 struct mutex core_lock; 801 /* Protects data like peers */ 802 spinlock_t base_lock; 803 804 /* Single pdev device (struct ath12k_hw_params::single_pdev_only): 805 * 806 * Firmware maintains data for all bands but advertises a single 807 * phy to the host which is stored as a single element in this 808 * array. 809 * 810 * Other devices: 811 * 812 * This array will contain as many elements as the number of 813 * radios. 814 */ 815 struct ath12k_pdev pdevs[MAX_RADIOS]; 816 817 /* struct ath12k_hw_params::single_pdev_only devices use this to 818 * store phy specific data 819 */ 820 struct ath12k_fw_pdev fw_pdev[MAX_RADIOS]; 821 u8 fw_pdev_count; 822 823 struct ath12k_pdev __rcu *pdevs_active[MAX_RADIOS]; 824 825 /* Holds information of wiphy (hw) registration. 826 * 827 * In Multi/Single Link Operation case, all pdevs are registered as 828 * a single wiphy. In other (legacy/Non-MLO) cases, each pdev is 829 * registered as separate wiphys. 830 */ 831 struct ath12k_hw *ah[MAX_RADIOS]; 832 u8 num_hw; 833 834 struct ath12k_wmi_hal_reg_capabilities_ext_arg hal_reg_cap[MAX_RADIOS]; 835 unsigned long long free_vdev_map; 836 unsigned long long free_vdev_stats_id_map; 837 struct list_head peers; 838 wait_queue_head_t peer_mapping_wq; 839 u8 mac_addr[ETH_ALEN]; 840 bool wmi_ready; 841 u32 wlan_init_status; 842 int irq_num[ATH12K_IRQ_NUM_MAX]; 843 struct ath12k_ext_irq_grp ext_irq_grp[ATH12K_EXT_IRQ_GRP_NUM_MAX]; 844 struct napi_struct *napi; 845 struct ath12k_wmi_target_cap_arg target_caps; 846 u32 ext_service_bitmap[WMI_SERVICE_EXT_BM_SIZE]; 847 bool pdevs_macaddr_valid; 848 849 const struct ath12k_hw_params *hw_params; 850 851 const struct firmware *cal_file; 852 853 /* Below regd's are protected by ab->data_lock */ 854 /* This is the regd set for every radio 855 * by the firmware during initialization 856 */ 857 struct ieee80211_regdomain *default_regd[MAX_RADIOS]; 858 /* This regd is set during dynamic country setting 859 * This may or may not be used during the runtime 860 */ 861 struct ieee80211_regdomain *new_regd[MAX_RADIOS]; 862 863 /* Current DFS Regulatory */ 864 enum ath12k_dfs_region dfs_region; 865 struct ath12k_soc_dp_stats soc_stats; 866 #ifdef CONFIG_ATH12K_DEBUGFS 867 struct dentry *debugfs_soc; 868 #endif 869 870 unsigned long dev_flags; 871 struct completion driver_recovery; 872 struct workqueue_struct *workqueue; 873 struct work_struct restart_work; 874 struct workqueue_struct *workqueue_aux; 875 struct work_struct reset_work; 876 atomic_t reset_count; 877 atomic_t recovery_count; 878 bool is_reset; 879 struct completion reset_complete; 880 /* continuous recovery fail count */ 881 atomic_t fail_cont_count; 882 unsigned long reset_fail_timeout; 883 struct { 884 /* protected by data_lock */ 885 u32 fw_crash_counter; 886 } stats; 887 u32 pktlog_defs_checksum; 888 889 struct ath12k_dbring_cap *db_caps; 890 u32 num_db_cap; 891 892 struct timer_list mon_reap_timer; 893 894 struct completion htc_suspend; 895 896 u64 fw_soc_drop_count; 897 bool static_window_map; 898 899 struct work_struct rfkill_work; 900 /* true means radio is on */ 901 bool rfkill_radio_on; 902 903 struct { 904 enum ath12k_bdf_search bdf_search; 905 u32 vendor; 906 u32 device; 907 u32 subsystem_vendor; 908 u32 subsystem_device; 909 } id; 910 911 struct { 912 u32 api_version; 913 914 const struct firmware *fw; 915 const u8 *amss_data; 916 size_t amss_len; 917 const u8 *amss_dualmac_data; 918 size_t amss_dualmac_len; 919 const u8 *m3_data; 920 size_t m3_len; 921 922 DECLARE_BITMAP(fw_features, ATH12K_FW_FEATURE_COUNT); 923 } fw; 924 925 const struct hal_rx_ops *hal_rx_ops; 926 927 /* mlo_capable_flags denotes the single/multi link operation 928 * capabilities of the Device. 929 * 930 * See enum ath12k_link_capable_flags 931 */ 932 u8 mlo_capable_flags; 933 934 struct completion restart_completed; 935 936 #ifdef CONFIG_ACPI 937 938 struct { 939 bool started; 940 u32 func_bit; 941 bool acpi_tas_enable; 942 bool acpi_bios_sar_enable; 943 u8 tas_cfg[ATH12K_ACPI_DSM_TAS_CFG_SIZE]; 944 u8 tas_sar_power_table[ATH12K_ACPI_DSM_TAS_DATA_SIZE]; 945 u8 bios_sar_data[ATH12K_ACPI_DSM_BIOS_SAR_DATA_SIZE]; 946 u8 geo_offset_data[ATH12K_ACPI_DSM_GEO_OFFSET_DATA_SIZE]; 947 u8 cca_data[ATH12K_ACPI_DSM_CCA_DATA_SIZE]; 948 u8 band_edge_power[ATH12K_ACPI_DSM_BAND_EDGE_DATA_SIZE]; 949 } acpi; 950 951 #endif /* CONFIG_ACPI */ 952 953 struct notifier_block panic_nb; 954 955 /* must be last */ 956 u8 drv_priv[] __aligned(sizeof(void *)); 957 }; 958 959 struct ath12k_pdev_map { 960 struct ath12k_base *ab; 961 u8 pdev_idx; 962 }; 963 964 int ath12k_core_qmi_firmware_ready(struct ath12k_base *ab); 965 int ath12k_core_pre_init(struct ath12k_base *ab); 966 int ath12k_core_init(struct ath12k_base *ath12k); 967 void ath12k_core_deinit(struct ath12k_base *ath12k); 968 struct ath12k_base *ath12k_core_alloc(struct device *dev, size_t priv_size, 969 enum ath12k_bus bus); 970 void ath12k_core_free(struct ath12k_base *ath12k); 971 int ath12k_core_fetch_board_data_api_1(struct ath12k_base *ab, 972 struct ath12k_board_data *bd, 973 char *filename); 974 int ath12k_core_fetch_bdf(struct ath12k_base *ath12k, 975 struct ath12k_board_data *bd); 976 void ath12k_core_free_bdf(struct ath12k_base *ab, struct ath12k_board_data *bd); 977 int ath12k_core_fetch_regdb(struct ath12k_base *ab, struct ath12k_board_data *bd); 978 int ath12k_core_check_dt(struct ath12k_base *ath12k); 979 int ath12k_core_check_smbios(struct ath12k_base *ab); 980 void ath12k_core_halt(struct ath12k *ar); 981 int ath12k_core_resume_early(struct ath12k_base *ab); 982 int ath12k_core_resume(struct ath12k_base *ab); 983 int ath12k_core_suspend(struct ath12k_base *ab); 984 int ath12k_core_suspend_late(struct ath12k_base *ab); 985 986 const struct firmware *ath12k_core_firmware_request(struct ath12k_base *ab, 987 const char *filename); 988 u32 ath12k_core_get_max_station_per_radio(struct ath12k_base *ab); 989 u32 ath12k_core_get_max_peers_per_radio(struct ath12k_base *ab); 990 u32 ath12k_core_get_max_num_tids(struct ath12k_base *ab); 991 992 static inline const char *ath12k_scan_state_str(enum ath12k_scan_state state) 993 { 994 switch (state) { 995 case ATH12K_SCAN_IDLE: 996 return "idle"; 997 case ATH12K_SCAN_STARTING: 998 return "starting"; 999 case ATH12K_SCAN_RUNNING: 1000 return "running"; 1001 case ATH12K_SCAN_ABORTING: 1002 return "aborting"; 1003 } 1004 1005 return "unknown"; 1006 } 1007 1008 static inline struct ath12k_skb_cb *ATH12K_SKB_CB(struct sk_buff *skb) 1009 { 1010 BUILD_BUG_ON(sizeof(struct ath12k_skb_cb) > 1011 IEEE80211_TX_INFO_DRIVER_DATA_SIZE); 1012 return (struct ath12k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data; 1013 } 1014 1015 static inline struct ath12k_skb_rxcb *ATH12K_SKB_RXCB(struct sk_buff *skb) 1016 { 1017 BUILD_BUG_ON(sizeof(struct ath12k_skb_rxcb) > sizeof(skb->cb)); 1018 return (struct ath12k_skb_rxcb *)skb->cb; 1019 } 1020 1021 static inline struct ath12k_vif *ath12k_vif_to_arvif(struct ieee80211_vif *vif) 1022 { 1023 return (struct ath12k_vif *)vif->drv_priv; 1024 } 1025 1026 static inline struct ath12k_sta *ath12k_sta_to_arsta(struct ieee80211_sta *sta) 1027 { 1028 return (struct ath12k_sta *)sta->drv_priv; 1029 } 1030 1031 static inline struct ath12k *ath12k_ab_to_ar(struct ath12k_base *ab, 1032 int mac_id) 1033 { 1034 return ab->pdevs[ath12k_hw_mac_id_to_pdev_id(ab->hw_params, mac_id)].ar; 1035 } 1036 1037 static inline void ath12k_core_create_firmware_path(struct ath12k_base *ab, 1038 const char *filename, 1039 void *buf, size_t buf_len) 1040 { 1041 snprintf(buf, buf_len, "%s/%s/%s", ATH12K_FW_DIR, 1042 ab->hw_params->fw.dir, filename); 1043 } 1044 1045 static inline const char *ath12k_bus_str(enum ath12k_bus bus) 1046 { 1047 switch (bus) { 1048 case ATH12K_BUS_PCI: 1049 return "pci"; 1050 } 1051 1052 return "unknown"; 1053 } 1054 1055 static inline struct ath12k_hw *ath12k_hw_to_ah(struct ieee80211_hw *hw) 1056 { 1057 return hw->priv; 1058 } 1059 1060 static inline struct ath12k *ath12k_ah_to_ar(struct ath12k_hw *ah, u8 hw_link_id) 1061 { 1062 if (WARN(hw_link_id >= ah->num_radio, 1063 "bad hw link id %d, so switch to default link\n", hw_link_id)) 1064 hw_link_id = 0; 1065 1066 return &ah->radio[hw_link_id]; 1067 } 1068 1069 static inline struct ath12k_hw *ath12k_ar_to_ah(struct ath12k *ar) 1070 { 1071 return ar->ah; 1072 } 1073 1074 static inline struct ieee80211_hw *ath12k_ar_to_hw(struct ath12k *ar) 1075 { 1076 return ar->ah->hw; 1077 } 1078 1079 #define for_each_ar(ah, ar, index) \ 1080 for ((index) = 0; ((index) < (ah)->num_radio && \ 1081 ((ar) = &(ah)->radio[(index)])); (index)++) 1082 #endif /* _CORE_H_ */ 1083