1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */ 2 /* 3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. 4 * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. 5 */ 6 7 #ifndef ATH11K_WMI_H 8 #define ATH11K_WMI_H 9 10 #include <net/mac80211.h> 11 #include "htc.h" 12 13 struct ath11k_base; 14 struct ath11k; 15 struct ath11k_fw_stats; 16 struct ath11k_fw_dbglog; 17 struct ath11k_vif; 18 struct ath11k_reg_tpc_power_info; 19 20 #define PSOC_HOST_MAX_NUM_SS (8) 21 22 /* defines to set Packet extension values which can be 0 us, 8 usec or 16 usec */ 23 #define MAX_HE_NSS 8 24 #define MAX_HE_MODULATION 8 25 #define MAX_HE_RU 4 26 #define HE_MODULATION_NONE 7 27 #define HE_PET_0_USEC 0 28 #define HE_PET_8_USEC 1 29 #define HE_PET_16_USEC 2 30 31 #define WMI_MAX_CHAINS 8 32 33 #define WMI_MAX_NUM_SS MAX_HE_NSS 34 #define WMI_MAX_NUM_RU MAX_HE_RU 35 36 #define WMI_TLV_CMD(grp_id) (((grp_id) << 12) | 0x1) 37 #define WMI_TLV_EV(grp_id) (((grp_id) << 12) | 0x1) 38 #define WMI_TLV_CMD_UNSUPPORTED 0 39 #define WMI_TLV_PDEV_PARAM_UNSUPPORTED 0 40 #define WMI_TLV_VDEV_PARAM_UNSUPPORTED 0 41 42 struct wmi_cmd_hdr { 43 u32 cmd_id; 44 } __packed; 45 46 struct wmi_tlv { 47 u32 header; 48 u8 value[]; 49 } __packed; 50 51 #define WMI_TLV_LEN GENMASK(15, 0) 52 #define WMI_TLV_TAG GENMASK(31, 16) 53 #define TLV_HDR_SIZE sizeof_field(struct wmi_tlv, header) 54 55 #define WMI_CMD_HDR_CMD_ID GENMASK(23, 0) 56 #define WMI_MAX_MEM_REQS 32 57 #define ATH11K_MAX_HW_LISTEN_INTERVAL 5 58 59 #define WLAN_SCAN_MAX_HINT_S_SSID 10 60 #define WLAN_SCAN_MAX_HINT_BSSID 10 61 #define MAX_RNR_BSS 5 62 63 #define WLAN_SCAN_PARAMS_MAX_SSID 16 64 #define WLAN_SCAN_PARAMS_MAX_BSSID 4 65 #define WLAN_SCAN_PARAMS_MAX_IE_LEN 512 66 67 #define WMI_APPEND_TO_EXISTING_CHAN_LIST_FLAG 1 68 69 #define MAX_WMI_UTF_LEN 252 70 #define WMI_BA_MODE_BUFFER_SIZE_256 3 71 /* 72 * HW mode config type replicated from FW header 73 * @WMI_HOST_HW_MODE_SINGLE: Only one PHY is active. 74 * @WMI_HOST_HW_MODE_DBS: Both PHYs are active in different bands, 75 * one in 2G and another in 5G. 76 * @WMI_HOST_HW_MODE_SBS_PASSIVE: Both PHYs are in passive mode (only rx) in 77 * same band; no tx allowed. 78 * @WMI_HOST_HW_MODE_SBS: Both PHYs are active in the same band. 79 * Support for both PHYs within one band is planned 80 * for 5G only(as indicated in WMI_MAC_PHY_CAPABILITIES), 81 * but could be extended to other bands in the future. 82 * The separation of the band between the two PHYs needs 83 * to be communicated separately. 84 * @WMI_HOST_HW_MODE_DBS_SBS: 3 PHYs, with 2 on the same band doing SBS 85 * as in WMI_HW_MODE_SBS, and 3rd on the other band 86 * @WMI_HOST_HW_MODE_DBS_OR_SBS: Two PHY with one PHY capabale of both 2G and 87 * 5G. It can support SBS (5G + 5G) OR DBS (5G + 2G). 88 * @WMI_HOST_HW_MODE_MAX: Max hw_mode_id. Used to indicate invalid mode. 89 */ 90 enum wmi_host_hw_mode_config_type { 91 WMI_HOST_HW_MODE_SINGLE = 0, 92 WMI_HOST_HW_MODE_DBS = 1, 93 WMI_HOST_HW_MODE_SBS_PASSIVE = 2, 94 WMI_HOST_HW_MODE_SBS = 3, 95 WMI_HOST_HW_MODE_DBS_SBS = 4, 96 WMI_HOST_HW_MODE_DBS_OR_SBS = 5, 97 98 /* keep last */ 99 WMI_HOST_HW_MODE_MAX 100 }; 101 102 /* HW mode priority values used to detect the preferred HW mode 103 * on the available modes. 104 */ 105 enum wmi_host_hw_mode_priority { 106 WMI_HOST_HW_MODE_DBS_SBS_PRI, 107 WMI_HOST_HW_MODE_DBS_PRI, 108 WMI_HOST_HW_MODE_DBS_OR_SBS_PRI, 109 WMI_HOST_HW_MODE_SBS_PRI, 110 WMI_HOST_HW_MODE_SBS_PASSIVE_PRI, 111 WMI_HOST_HW_MODE_SINGLE_PRI, 112 113 /* keep last the lowest priority */ 114 WMI_HOST_HW_MODE_MAX_PRI 115 }; 116 117 enum WMI_HOST_WLAN_BAND { 118 WMI_HOST_WLAN_2G_CAP = 0x1, 119 WMI_HOST_WLAN_5G_CAP = 0x2, 120 WMI_HOST_WLAN_2G_5G_CAP = WMI_HOST_WLAN_2G_CAP | WMI_HOST_WLAN_5G_CAP, 121 }; 122 123 /* Parameters used for WMI_VDEV_PARAM_AUTORATE_MISC_CFG command. 124 * Used only for HE auto rate mode. 125 */ 126 enum { 127 /* HE LTF related configuration */ 128 WMI_HE_AUTORATE_LTF_1X = BIT(0), 129 WMI_HE_AUTORATE_LTF_2X = BIT(1), 130 WMI_HE_AUTORATE_LTF_4X = BIT(2), 131 132 /* HE GI related configuration */ 133 WMI_AUTORATE_400NS_GI = BIT(8), 134 WMI_AUTORATE_800NS_GI = BIT(9), 135 WMI_AUTORATE_1600NS_GI = BIT(10), 136 WMI_AUTORATE_3200NS_GI = BIT(11), 137 }; 138 139 enum { 140 WMI_HOST_VDEV_FLAGS_NON_MBSSID_AP = 0x00000001, 141 WMI_HOST_VDEV_FLAGS_TRANSMIT_AP = 0x00000002, 142 WMI_HOST_VDEV_FLAGS_NON_TRANSMIT_AP = 0x00000004, 143 WMI_HOST_VDEV_FLAGS_EMA_MODE = 0x00000008, 144 WMI_HOST_VDEV_FLAGS_SCAN_MODE_VAP = 0x00000010, 145 }; 146 147 /* 148 * wmi command groups. 149 */ 150 enum wmi_cmd_group { 151 /* 0 to 2 are reserved */ 152 WMI_GRP_START = 0x3, 153 WMI_GRP_SCAN = WMI_GRP_START, 154 WMI_GRP_PDEV = 0x4, 155 WMI_GRP_VDEV = 0x5, 156 WMI_GRP_PEER = 0x6, 157 WMI_GRP_MGMT = 0x7, 158 WMI_GRP_BA_NEG = 0x8, 159 WMI_GRP_STA_PS = 0x9, 160 WMI_GRP_DFS = 0xa, 161 WMI_GRP_ROAM = 0xb, 162 WMI_GRP_OFL_SCAN = 0xc, 163 WMI_GRP_P2P = 0xd, 164 WMI_GRP_AP_PS = 0xe, 165 WMI_GRP_RATE_CTRL = 0xf, 166 WMI_GRP_PROFILE = 0x10, 167 WMI_GRP_SUSPEND = 0x11, 168 WMI_GRP_BCN_FILTER = 0x12, 169 WMI_GRP_WOW = 0x13, 170 WMI_GRP_RTT = 0x14, 171 WMI_GRP_SPECTRAL = 0x15, 172 WMI_GRP_STATS = 0x16, 173 WMI_GRP_ARP_NS_OFL = 0x17, 174 WMI_GRP_NLO_OFL = 0x18, 175 WMI_GRP_GTK_OFL = 0x19, 176 WMI_GRP_CSA_OFL = 0x1a, 177 WMI_GRP_CHATTER = 0x1b, 178 WMI_GRP_TID_ADDBA = 0x1c, 179 WMI_GRP_MISC = 0x1d, 180 WMI_GRP_GPIO = 0x1e, 181 WMI_GRP_FWTEST = 0x1f, 182 WMI_GRP_TDLS = 0x20, 183 WMI_GRP_RESMGR = 0x21, 184 WMI_GRP_STA_SMPS = 0x22, 185 WMI_GRP_WLAN_HB = 0x23, 186 WMI_GRP_RMC = 0x24, 187 WMI_GRP_MHF_OFL = 0x25, 188 WMI_GRP_LOCATION_SCAN = 0x26, 189 WMI_GRP_OEM = 0x27, 190 WMI_GRP_NAN = 0x28, 191 WMI_GRP_COEX = 0x29, 192 WMI_GRP_OBSS_OFL = 0x2a, 193 WMI_GRP_LPI = 0x2b, 194 WMI_GRP_EXTSCAN = 0x2c, 195 WMI_GRP_DHCP_OFL = 0x2d, 196 WMI_GRP_IPA = 0x2e, 197 WMI_GRP_MDNS_OFL = 0x2f, 198 WMI_GRP_SAP_OFL = 0x30, 199 WMI_GRP_OCB = 0x31, 200 WMI_GRP_SOC = 0x32, 201 WMI_GRP_PKT_FILTER = 0x33, 202 WMI_GRP_MAWC = 0x34, 203 WMI_GRP_PMF_OFFLOAD = 0x35, 204 WMI_GRP_BPF_OFFLOAD = 0x36, 205 WMI_GRP_NAN_DATA = 0x37, 206 WMI_GRP_PROTOTYPE = 0x38, 207 WMI_GRP_MONITOR = 0x39, 208 WMI_GRP_REGULATORY = 0x3a, 209 WMI_GRP_HW_DATA_FILTER = 0x3b, 210 WMI_GRP_WLM = 0x3c, 211 WMI_GRP_11K_OFFLOAD = 0x3d, 212 WMI_GRP_TWT = 0x3e, 213 WMI_GRP_MOTION_DET = 0x3f, 214 WMI_GRP_SPATIAL_REUSE = 0x40, 215 }; 216 217 #define WMI_CMD_GRP(grp_id) (((grp_id) << 12) | 0x1) 218 #define WMI_EVT_GRP_START_ID(grp_id) (((grp_id) << 12) | 0x1) 219 220 #define WMI_CMD_UNSUPPORTED 0 221 222 enum wmi_tlv_cmd_id { 223 WMI_INIT_CMDID = 0x1, 224 WMI_START_SCAN_CMDID = WMI_TLV_CMD(WMI_GRP_SCAN), 225 WMI_STOP_SCAN_CMDID, 226 WMI_SCAN_CHAN_LIST_CMDID, 227 WMI_SCAN_SCH_PRIO_TBL_CMDID, 228 WMI_SCAN_UPDATE_REQUEST_CMDID, 229 WMI_SCAN_PROB_REQ_OUI_CMDID, 230 WMI_SCAN_ADAPTIVE_DWELL_CONFIG_CMDID, 231 WMI_PDEV_SET_REGDOMAIN_CMDID = WMI_TLV_CMD(WMI_GRP_PDEV), 232 WMI_PDEV_SET_CHANNEL_CMDID, 233 WMI_PDEV_SET_PARAM_CMDID, 234 WMI_PDEV_PKTLOG_ENABLE_CMDID, 235 WMI_PDEV_PKTLOG_DISABLE_CMDID, 236 WMI_PDEV_SET_WMM_PARAMS_CMDID, 237 WMI_PDEV_SET_HT_CAP_IE_CMDID, 238 WMI_PDEV_SET_VHT_CAP_IE_CMDID, 239 WMI_PDEV_SET_DSCP_TID_MAP_CMDID, 240 WMI_PDEV_SET_QUIET_MODE_CMDID, 241 WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID, 242 WMI_PDEV_GET_TPC_CONFIG_CMDID, 243 WMI_PDEV_SET_BASE_MACADDR_CMDID, 244 WMI_PDEV_DUMP_CMDID, 245 WMI_PDEV_SET_LED_CONFIG_CMDID, 246 WMI_PDEV_GET_TEMPERATURE_CMDID, 247 WMI_PDEV_SET_LED_FLASHING_CMDID, 248 WMI_PDEV_SMART_ANT_ENABLE_CMDID, 249 WMI_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID, 250 WMI_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID, 251 WMI_PDEV_SET_CTL_TABLE_CMDID, 252 WMI_PDEV_SET_MIMOGAIN_TABLE_CMDID, 253 WMI_PDEV_FIPS_CMDID, 254 WMI_PDEV_GET_ANI_CCK_CONFIG_CMDID, 255 WMI_PDEV_GET_ANI_OFDM_CONFIG_CMDID, 256 WMI_PDEV_GET_NFCAL_POWER_CMDID, 257 WMI_PDEV_GET_TPC_CMDID, 258 WMI_MIB_STATS_ENABLE_CMDID, 259 WMI_PDEV_SET_PCL_CMDID, 260 WMI_PDEV_SET_HW_MODE_CMDID, 261 WMI_PDEV_SET_MAC_CONFIG_CMDID, 262 WMI_PDEV_SET_ANTENNA_MODE_CMDID, 263 WMI_SET_PERIODIC_CHANNEL_STATS_CONFIG_CMDID, 264 WMI_PDEV_WAL_POWER_DEBUG_CMDID, 265 WMI_PDEV_SET_REORDER_TIMEOUT_VAL_CMDID, 266 WMI_PDEV_SET_WAKEUP_CONFIG_CMDID, 267 WMI_PDEV_GET_ANTDIV_STATUS_CMDID, 268 WMI_PDEV_GET_CHIP_POWER_STATS_CMDID, 269 WMI_PDEV_SET_STATS_THRESHOLD_CMDID, 270 WMI_PDEV_MULTIPLE_VDEV_RESTART_REQUEST_CMDID, 271 WMI_PDEV_UPDATE_PKT_ROUTING_CMDID, 272 WMI_PDEV_CHECK_CAL_VERSION_CMDID, 273 WMI_PDEV_SET_DIVERSITY_GAIN_CMDID, 274 WMI_PDEV_DIV_GET_RSSI_ANTID_CMDID, 275 WMI_PDEV_BSS_CHAN_INFO_REQUEST_CMDID, 276 WMI_PDEV_UPDATE_PMK_CACHE_CMDID, 277 WMI_PDEV_UPDATE_FILS_HLP_PKT_CMDID, 278 WMI_PDEV_UPDATE_CTLTABLE_REQUEST_CMDID, 279 WMI_PDEV_CONFIG_VENDOR_OUI_ACTION_CMDID, 280 WMI_PDEV_SET_AC_TX_QUEUE_OPTIMIZED_CMDID, 281 WMI_PDEV_SET_RX_FILTER_PROMISCUOUS_CMDID, 282 WMI_PDEV_DMA_RING_CFG_REQ_CMDID, 283 WMI_PDEV_HE_TB_ACTION_FRM_CMDID, 284 WMI_PDEV_PKTLOG_FILTER_CMDID, 285 WMI_PDEV_SET_RAP_CONFIG_CMDID, 286 WMI_PDEV_DSM_FILTER_CMDID, 287 WMI_PDEV_FRAME_INJECT_CMDID, 288 WMI_PDEV_TBTT_OFFSET_SYNC_CMDID, 289 WMI_PDEV_SET_SRG_BSS_COLOR_BITMAP_CMDID, 290 WMI_PDEV_SET_SRG_PARTIAL_BSSID_BITMAP_CMDID, 291 WMI_PDEV_SET_SRG_OBSS_COLOR_ENABLE_BITMAP_CMDID, 292 WMI_PDEV_SET_SRG_OBSS_BSSID_ENABLE_BITMAP_CMDID, 293 WMI_PDEV_SET_NON_SRG_OBSS_COLOR_ENABLE_BITMAP_CMDID, 294 WMI_PDEV_SET_NON_SRG_OBSS_BSSID_ENABLE_BITMAP_CMDID, 295 WMI_PDEV_GET_TPC_STATS_CMDID, 296 WMI_PDEV_ENABLE_DURATION_BASED_TX_MODE_SELECTION_CMDID, 297 WMI_PDEV_GET_DPD_STATUS_CMDID, 298 WMI_PDEV_SET_BIOS_SAR_TABLE_CMDID, 299 WMI_PDEV_SET_BIOS_GEO_TABLE_CMDID, 300 WMI_VDEV_CREATE_CMDID = WMI_TLV_CMD(WMI_GRP_VDEV), 301 WMI_VDEV_DELETE_CMDID, 302 WMI_VDEV_START_REQUEST_CMDID, 303 WMI_VDEV_RESTART_REQUEST_CMDID, 304 WMI_VDEV_UP_CMDID, 305 WMI_VDEV_STOP_CMDID, 306 WMI_VDEV_DOWN_CMDID, 307 WMI_VDEV_SET_PARAM_CMDID, 308 WMI_VDEV_INSTALL_KEY_CMDID, 309 WMI_VDEV_WNM_SLEEPMODE_CMDID, 310 WMI_VDEV_WMM_ADDTS_CMDID, 311 WMI_VDEV_WMM_DELTS_CMDID, 312 WMI_VDEV_SET_WMM_PARAMS_CMDID, 313 WMI_VDEV_SET_GTX_PARAMS_CMDID, 314 WMI_VDEV_IPSEC_NATKEEPALIVE_FILTER_CMDID, 315 WMI_VDEV_PLMREQ_START_CMDID, 316 WMI_VDEV_PLMREQ_STOP_CMDID, 317 WMI_VDEV_TSF_TSTAMP_ACTION_CMDID, 318 WMI_VDEV_SET_IE_CMDID, 319 WMI_VDEV_RATEMASK_CMDID, 320 WMI_VDEV_ATF_REQUEST_CMDID, 321 WMI_VDEV_SET_DSCP_TID_MAP_CMDID, 322 WMI_VDEV_FILTER_NEIGHBOR_RX_PACKETS_CMDID, 323 WMI_VDEV_SET_QUIET_MODE_CMDID, 324 WMI_VDEV_SET_CUSTOM_AGGR_SIZE_CMDID, 325 WMI_VDEV_ENCRYPT_DECRYPT_DATA_REQ_CMDID, 326 WMI_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_CMDID, 327 WMI_VDEV_SET_ARP_STAT_CMDID, 328 WMI_VDEV_GET_ARP_STAT_CMDID, 329 WMI_VDEV_GET_TX_POWER_CMDID, 330 WMI_VDEV_LIMIT_OFFCHAN_CMDID, 331 WMI_VDEV_SET_CUSTOM_SW_RETRY_TH_CMDID, 332 WMI_VDEV_CHAINMASK_CONFIG_CMDID, 333 WMI_VDEV_GET_BCN_RECEPTION_STATS_CMDID, 334 WMI_VDEV_GET_MWS_COEX_INFO_CMDID, 335 WMI_VDEV_DELETE_ALL_PEER_CMDID, 336 WMI_VDEV_BSS_MAX_IDLE_TIME_CMDID, 337 WMI_VDEV_AUDIO_SYNC_TRIGGER_CMDID, 338 WMI_VDEV_AUDIO_SYNC_QTIMER_CMDID, 339 WMI_VDEV_SET_PCL_CMDID, 340 WMI_VDEV_GET_BIG_DATA_CMDID, 341 WMI_VDEV_GET_BIG_DATA_P2_CMDID, 342 WMI_VDEV_SET_TPC_POWER_CMDID, 343 WMI_PEER_CREATE_CMDID = WMI_TLV_CMD(WMI_GRP_PEER), 344 WMI_PEER_DELETE_CMDID, 345 WMI_PEER_FLUSH_TIDS_CMDID, 346 WMI_PEER_SET_PARAM_CMDID, 347 WMI_PEER_ASSOC_CMDID, 348 WMI_PEER_ADD_WDS_ENTRY_CMDID, 349 WMI_PEER_REMOVE_WDS_ENTRY_CMDID, 350 WMI_PEER_MCAST_GROUP_CMDID, 351 WMI_PEER_INFO_REQ_CMDID, 352 WMI_PEER_GET_ESTIMATED_LINKSPEED_CMDID, 353 WMI_PEER_SET_RATE_REPORT_CONDITION_CMDID, 354 WMI_PEER_UPDATE_WDS_ENTRY_CMDID, 355 WMI_PEER_ADD_PROXY_STA_ENTRY_CMDID, 356 WMI_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID, 357 WMI_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID, 358 WMI_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID, 359 WMI_PEER_ATF_REQUEST_CMDID, 360 WMI_PEER_BWF_REQUEST_CMDID, 361 WMI_PEER_REORDER_QUEUE_SETUP_CMDID, 362 WMI_PEER_REORDER_QUEUE_REMOVE_CMDID, 363 WMI_PEER_SET_RX_BLOCKSIZE_CMDID, 364 WMI_PEER_ANTDIV_INFO_REQ_CMDID, 365 WMI_PEER_RESERVED0_CMDID, 366 WMI_PEER_TID_MSDUQ_QDEPTH_THRESH_UPDATE_CMDID, 367 WMI_PEER_TID_CONFIGURATIONS_CMDID, 368 WMI_PEER_CFR_CAPTURE_CMDID, 369 WMI_BCN_TX_CMDID = WMI_TLV_CMD(WMI_GRP_MGMT), 370 WMI_PDEV_SEND_BCN_CMDID, 371 WMI_BCN_TMPL_CMDID, 372 WMI_BCN_FILTER_RX_CMDID, 373 WMI_PRB_REQ_FILTER_RX_CMDID, 374 WMI_MGMT_TX_CMDID, 375 WMI_PRB_TMPL_CMDID, 376 WMI_MGMT_TX_SEND_CMDID, 377 WMI_OFFCHAN_DATA_TX_SEND_CMDID, 378 WMI_PDEV_SEND_FD_CMDID, 379 WMI_BCN_OFFLOAD_CTRL_CMDID, 380 WMI_BSS_COLOR_CHANGE_ENABLE_CMDID, 381 WMI_VDEV_BCN_OFFLOAD_QUIET_CONFIG_CMDID, 382 WMI_FILS_DISCOVERY_TMPL_CMDID, 383 WMI_ADDBA_CLEAR_RESP_CMDID = WMI_TLV_CMD(WMI_GRP_BA_NEG), 384 WMI_ADDBA_SEND_CMDID, 385 WMI_ADDBA_STATUS_CMDID, 386 WMI_DELBA_SEND_CMDID, 387 WMI_ADDBA_SET_RESP_CMDID, 388 WMI_SEND_SINGLEAMSDU_CMDID, 389 WMI_STA_POWERSAVE_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_STA_PS), 390 WMI_STA_POWERSAVE_PARAM_CMDID, 391 WMI_STA_MIMO_PS_MODE_CMDID, 392 WMI_PDEV_DFS_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_DFS), 393 WMI_PDEV_DFS_DISABLE_CMDID, 394 WMI_DFS_PHYERR_FILTER_ENA_CMDID, 395 WMI_DFS_PHYERR_FILTER_DIS_CMDID, 396 WMI_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMDID, 397 WMI_PDEV_DFS_PHYERR_OFFLOAD_DISABLE_CMDID, 398 WMI_VDEV_ADFS_CH_CFG_CMDID, 399 WMI_VDEV_ADFS_OCAC_ABORT_CMDID, 400 WMI_ROAM_SCAN_MODE = WMI_TLV_CMD(WMI_GRP_ROAM), 401 WMI_ROAM_SCAN_RSSI_THRESHOLD, 402 WMI_ROAM_SCAN_PERIOD, 403 WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, 404 WMI_ROAM_AP_PROFILE, 405 WMI_ROAM_CHAN_LIST, 406 WMI_ROAM_SCAN_CMD, 407 WMI_ROAM_SYNCH_COMPLETE, 408 WMI_ROAM_SET_RIC_REQUEST_CMDID, 409 WMI_ROAM_INVOKE_CMDID, 410 WMI_ROAM_FILTER_CMDID, 411 WMI_ROAM_SUBNET_CHANGE_CONFIG_CMDID, 412 WMI_ROAM_CONFIGURE_MAWC_CMDID, 413 WMI_ROAM_SET_MBO_PARAM_CMDID, 414 WMI_ROAM_PER_CONFIG_CMDID, 415 WMI_ROAM_BTM_CONFIG_CMDID, 416 WMI_ENABLE_FILS_CMDID, 417 WMI_OFL_SCAN_ADD_AP_PROFILE = WMI_TLV_CMD(WMI_GRP_OFL_SCAN), 418 WMI_OFL_SCAN_REMOVE_AP_PROFILE, 419 WMI_OFL_SCAN_PERIOD, 420 WMI_P2P_DEV_SET_DEVICE_INFO = WMI_TLV_CMD(WMI_GRP_P2P), 421 WMI_P2P_DEV_SET_DISCOVERABILITY, 422 WMI_P2P_GO_SET_BEACON_IE, 423 WMI_P2P_GO_SET_PROBE_RESP_IE, 424 WMI_P2P_SET_VENDOR_IE_DATA_CMDID, 425 WMI_P2P_DISC_OFFLOAD_CONFIG_CMDID, 426 WMI_P2P_DISC_OFFLOAD_APPIE_CMDID, 427 WMI_P2P_DISC_OFFLOAD_PATTERN_CMDID, 428 WMI_P2P_SET_OPPPS_PARAM_CMDID, 429 WMI_P2P_LISTEN_OFFLOAD_START_CMDID, 430 WMI_P2P_LISTEN_OFFLOAD_STOP_CMDID, 431 WMI_AP_PS_PEER_PARAM_CMDID = WMI_TLV_CMD(WMI_GRP_AP_PS), 432 WMI_AP_PS_PEER_UAPSD_COEX_CMDID, 433 WMI_AP_PS_EGAP_PARAM_CMDID, 434 WMI_PEER_RATE_RETRY_SCHED_CMDID = WMI_TLV_CMD(WMI_GRP_RATE_CTRL), 435 WMI_WLAN_PROFILE_TRIGGER_CMDID = WMI_TLV_CMD(WMI_GRP_PROFILE), 436 WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID, 437 WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID, 438 WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID, 439 WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID, 440 WMI_PDEV_SUSPEND_CMDID = WMI_TLV_CMD(WMI_GRP_SUSPEND), 441 WMI_PDEV_RESUME_CMDID, 442 WMI_ADD_BCN_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_BCN_FILTER), 443 WMI_RMV_BCN_FILTER_CMDID, 444 WMI_WOW_ADD_WAKE_PATTERN_CMDID = WMI_TLV_CMD(WMI_GRP_WOW), 445 WMI_WOW_DEL_WAKE_PATTERN_CMDID, 446 WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID, 447 WMI_WOW_ENABLE_CMDID, 448 WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID, 449 WMI_WOW_IOAC_ADD_KEEPALIVE_CMDID, 450 WMI_WOW_IOAC_DEL_KEEPALIVE_CMDID, 451 WMI_WOW_IOAC_ADD_WAKE_PATTERN_CMDID, 452 WMI_WOW_IOAC_DEL_WAKE_PATTERN_CMDID, 453 WMI_D0_WOW_ENABLE_DISABLE_CMDID, 454 WMI_EXTWOW_ENABLE_CMDID, 455 WMI_EXTWOW_SET_APP_TYPE1_PARAMS_CMDID, 456 WMI_EXTWOW_SET_APP_TYPE2_PARAMS_CMDID, 457 WMI_WOW_ENABLE_ICMPV6_NA_FLT_CMDID, 458 WMI_WOW_UDP_SVC_OFLD_CMDID, 459 WMI_WOW_HOSTWAKEUP_GPIO_PIN_PATTERN_CONFIG_CMDID, 460 WMI_WOW_SET_ACTION_WAKE_UP_CMDID, 461 WMI_RTT_MEASREQ_CMDID = WMI_TLV_CMD(WMI_GRP_RTT), 462 WMI_RTT_TSF_CMDID, 463 WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID = WMI_TLV_CMD(WMI_GRP_SPECTRAL), 464 WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID, 465 WMI_REQUEST_STATS_CMDID = WMI_TLV_CMD(WMI_GRP_STATS), 466 WMI_MCC_SCHED_TRAFFIC_STATS_CMDID, 467 WMI_REQUEST_STATS_EXT_CMDID, 468 WMI_REQUEST_LINK_STATS_CMDID, 469 WMI_START_LINK_STATS_CMDID, 470 WMI_CLEAR_LINK_STATS_CMDID, 471 WMI_GET_FW_MEM_DUMP_CMDID, 472 WMI_DEBUG_MESG_FLUSH_CMDID, 473 WMI_DIAG_EVENT_LOG_CONFIG_CMDID, 474 WMI_REQUEST_WLAN_STATS_CMDID, 475 WMI_REQUEST_RCPI_CMDID, 476 WMI_REQUEST_PEER_STATS_INFO_CMDID, 477 WMI_REQUEST_RADIO_CHAN_STATS_CMDID, 478 WMI_SET_ARP_NS_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_ARP_NS_OFL), 479 WMI_ADD_PROACTIVE_ARP_RSP_PATTERN_CMDID, 480 WMI_DEL_PROACTIVE_ARP_RSP_PATTERN_CMDID, 481 WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_NLO_OFL), 482 WMI_APFIND_CMDID, 483 WMI_PASSPOINT_LIST_CONFIG_CMDID, 484 WMI_NLO_CONFIGURE_MAWC_CMDID, 485 WMI_GTK_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_GTK_OFL), 486 WMI_CSA_OFFLOAD_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_CSA_OFL), 487 WMI_CSA_OFFLOAD_CHANSWITCH_CMDID, 488 WMI_CHATTER_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_CHATTER), 489 WMI_CHATTER_ADD_COALESCING_FILTER_CMDID, 490 WMI_CHATTER_DELETE_COALESCING_FILTER_CMDID, 491 WMI_CHATTER_COALESCING_QUERY_CMDID, 492 WMI_PEER_TID_ADDBA_CMDID = WMI_TLV_CMD(WMI_GRP_TID_ADDBA), 493 WMI_PEER_TID_DELBA_CMDID, 494 WMI_STA_DTIM_PS_METHOD_CMDID, 495 WMI_STA_UAPSD_AUTO_TRIG_CMDID, 496 WMI_STA_KEEPALIVE_CMDID, 497 WMI_BA_REQ_SSN_CMDID, 498 WMI_ECHO_CMDID = WMI_TLV_CMD(WMI_GRP_MISC), 499 WMI_PDEV_UTF_CMDID, 500 WMI_DBGLOG_CFG_CMDID, 501 WMI_PDEV_QVIT_CMDID, 502 WMI_PDEV_FTM_INTG_CMDID, 503 WMI_VDEV_SET_KEEPALIVE_CMDID, 504 WMI_VDEV_GET_KEEPALIVE_CMDID, 505 WMI_FORCE_FW_HANG_CMDID, 506 WMI_SET_MCASTBCAST_FILTER_CMDID, 507 WMI_THERMAL_MGMT_CMDID, 508 WMI_HOST_AUTO_SHUTDOWN_CFG_CMDID, 509 WMI_TPC_CHAINMASK_CONFIG_CMDID, 510 WMI_SET_ANTENNA_DIVERSITY_CMDID, 511 WMI_OCB_SET_SCHED_CMDID, 512 WMI_RSSI_BREACH_MONITOR_CONFIG_CMDID, 513 WMI_LRO_CONFIG_CMDID, 514 WMI_TRANSFER_DATA_TO_FLASH_CMDID, 515 WMI_CONFIG_ENHANCED_MCAST_FILTER_CMDID, 516 WMI_VDEV_WISA_CMDID, 517 WMI_DBGLOG_TIME_STAMP_SYNC_CMDID, 518 WMI_SET_MULTIPLE_MCAST_FILTER_CMDID, 519 WMI_READ_DATA_FROM_FLASH_CMDID, 520 WMI_THERM_THROT_SET_CONF_CMDID, 521 WMI_RUNTIME_DPD_RECAL_CMDID, 522 WMI_GET_TPC_POWER_CMDID, 523 WMI_IDLE_TRIGGER_MONITOR_CMDID, 524 WMI_GPIO_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_GPIO), 525 WMI_GPIO_OUTPUT_CMDID, 526 WMI_TXBF_CMDID, 527 WMI_FWTEST_VDEV_MCC_SET_TBTT_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_FWTEST), 528 WMI_FWTEST_P2P_SET_NOA_PARAM_CMDID, 529 WMI_UNIT_TEST_CMDID, 530 WMI_FWTEST_CMDID, 531 WMI_QBOOST_CFG_CMDID, 532 WMI_TDLS_SET_STATE_CMDID = WMI_TLV_CMD(WMI_GRP_TDLS), 533 WMI_TDLS_PEER_UPDATE_CMDID, 534 WMI_TDLS_SET_OFFCHAN_MODE_CMDID, 535 WMI_RESMGR_ADAPTIVE_OCS_EN_DIS_CMDID = WMI_TLV_CMD(WMI_GRP_RESMGR), 536 WMI_RESMGR_SET_CHAN_TIME_QUOTA_CMDID, 537 WMI_RESMGR_SET_CHAN_LATENCY_CMDID, 538 WMI_STA_SMPS_FORCE_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_STA_SMPS), 539 WMI_STA_SMPS_PARAM_CMDID, 540 WMI_HB_SET_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_WLAN_HB), 541 WMI_HB_SET_TCP_PARAMS_CMDID, 542 WMI_HB_SET_TCP_PKT_FILTER_CMDID, 543 WMI_HB_SET_UDP_PARAMS_CMDID, 544 WMI_HB_SET_UDP_PKT_FILTER_CMDID, 545 WMI_RMC_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_RMC), 546 WMI_RMC_SET_ACTION_PERIOD_CMDID, 547 WMI_RMC_CONFIG_CMDID, 548 WMI_RMC_SET_MANUAL_LEADER_CMDID, 549 WMI_MHF_OFFLOAD_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_MHF_OFL), 550 WMI_MHF_OFFLOAD_PLUMB_ROUTING_TBL_CMDID, 551 WMI_BATCH_SCAN_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_LOCATION_SCAN), 552 WMI_BATCH_SCAN_DISABLE_CMDID, 553 WMI_BATCH_SCAN_TRIGGER_RESULT_CMDID, 554 WMI_OEM_REQ_CMDID = WMI_TLV_CMD(WMI_GRP_OEM), 555 WMI_OEM_REQUEST_CMDID, 556 WMI_LPI_OEM_REQ_CMDID, 557 WMI_NAN_CMDID = WMI_TLV_CMD(WMI_GRP_NAN), 558 WMI_MODEM_POWER_STATE_CMDID = WMI_TLV_CMD(WMI_GRP_COEX), 559 WMI_CHAN_AVOID_UPDATE_CMDID, 560 WMI_COEX_CONFIG_CMDID, 561 WMI_CHAN_AVOID_RPT_ALLOW_CMDID, 562 WMI_COEX_GET_ANTENNA_ISOLATION_CMDID, 563 WMI_SAR_LIMITS_CMDID, 564 WMI_OBSS_SCAN_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_OBSS_OFL), 565 WMI_OBSS_SCAN_DISABLE_CMDID, 566 WMI_OBSS_COLOR_COLLISION_DET_CONFIG_CMDID, 567 WMI_LPI_MGMT_SNOOPING_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_LPI), 568 WMI_LPI_START_SCAN_CMDID, 569 WMI_LPI_STOP_SCAN_CMDID, 570 WMI_EXTSCAN_START_CMDID = WMI_TLV_CMD(WMI_GRP_EXTSCAN), 571 WMI_EXTSCAN_STOP_CMDID, 572 WMI_EXTSCAN_CONFIGURE_WLAN_CHANGE_MONITOR_CMDID, 573 WMI_EXTSCAN_CONFIGURE_HOTLIST_MONITOR_CMDID, 574 WMI_EXTSCAN_GET_CACHED_RESULTS_CMDID, 575 WMI_EXTSCAN_GET_WLAN_CHANGE_RESULTS_CMDID, 576 WMI_EXTSCAN_SET_CAPABILITIES_CMDID, 577 WMI_EXTSCAN_GET_CAPABILITIES_CMDID, 578 WMI_EXTSCAN_CONFIGURE_HOTLIST_SSID_MONITOR_CMDID, 579 WMI_EXTSCAN_CONFIGURE_MAWC_CMDID, 580 WMI_SET_DHCP_SERVER_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_DHCP_OFL), 581 WMI_IPA_OFFLOAD_ENABLE_DISABLE_CMDID = WMI_TLV_CMD(WMI_GRP_IPA), 582 WMI_MDNS_OFFLOAD_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_MDNS_OFL), 583 WMI_MDNS_SET_FQDN_CMDID, 584 WMI_MDNS_SET_RESPONSE_CMDID, 585 WMI_MDNS_GET_STATS_CMDID, 586 WMI_SAP_OFL_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_SAP_OFL), 587 WMI_SAP_SET_BLACKLIST_PARAM_CMDID, 588 WMI_OCB_SET_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_OCB), 589 WMI_OCB_SET_UTC_TIME_CMDID, 590 WMI_OCB_START_TIMING_ADVERT_CMDID, 591 WMI_OCB_STOP_TIMING_ADVERT_CMDID, 592 WMI_OCB_GET_TSF_TIMER_CMDID, 593 WMI_DCC_GET_STATS_CMDID, 594 WMI_DCC_CLEAR_STATS_CMDID, 595 WMI_DCC_UPDATE_NDL_CMDID, 596 WMI_SOC_SET_PCL_CMDID = WMI_TLV_CMD(WMI_GRP_SOC), 597 WMI_SOC_SET_HW_MODE_CMDID, 598 WMI_SOC_SET_DUAL_MAC_CONFIG_CMDID, 599 WMI_SOC_SET_ANTENNA_MODE_CMDID, 600 WMI_PACKET_FILTER_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_PKT_FILTER), 601 WMI_PACKET_FILTER_ENABLE_CMDID, 602 WMI_MAWC_SENSOR_REPORT_IND_CMDID = WMI_TLV_CMD(WMI_GRP_MAWC), 603 WMI_PMF_OFFLOAD_SET_SA_QUERY_CMDID = WMI_TLV_CMD(WMI_GRP_PMF_OFFLOAD), 604 WMI_BPF_GET_CAPABILITY_CMDID = WMI_TLV_CMD(WMI_GRP_BPF_OFFLOAD), 605 WMI_BPF_GET_VDEV_STATS_CMDID, 606 WMI_BPF_SET_VDEV_INSTRUCTIONS_CMDID, 607 WMI_BPF_DEL_VDEV_INSTRUCTIONS_CMDID, 608 WMI_BPF_SET_VDEV_ACTIVE_MODE_CMDID, 609 WMI_MNT_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_MONITOR), 610 WMI_SET_CURRENT_COUNTRY_CMDID = WMI_TLV_CMD(WMI_GRP_REGULATORY), 611 WMI_11D_SCAN_START_CMDID, 612 WMI_11D_SCAN_STOP_CMDID, 613 WMI_SET_INIT_COUNTRY_CMDID, 614 WMI_NDI_GET_CAP_REQ_CMDID = WMI_TLV_CMD(WMI_GRP_PROTOTYPE), 615 WMI_NDP_INITIATOR_REQ_CMDID, 616 WMI_NDP_RESPONDER_REQ_CMDID, 617 WMI_NDP_END_REQ_CMDID, 618 WMI_HW_DATA_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_HW_DATA_FILTER), 619 WMI_TWT_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_TWT), 620 WMI_TWT_DISABLE_CMDID, 621 WMI_TWT_ADD_DIALOG_CMDID, 622 WMI_TWT_DEL_DIALOG_CMDID, 623 WMI_TWT_PAUSE_DIALOG_CMDID, 624 WMI_TWT_RESUME_DIALOG_CMDID, 625 WMI_PDEV_OBSS_PD_SPATIAL_REUSE_CMDID = 626 WMI_TLV_CMD(WMI_GRP_SPATIAL_REUSE), 627 WMI_PDEV_OBSS_PD_SPATIAL_REUSE_SET_DEF_OBSS_THRESH_CMDID, 628 }; 629 630 enum wmi_tlv_event_id { 631 WMI_SERVICE_READY_EVENTID = 0x1, 632 WMI_READY_EVENTID, 633 WMI_SERVICE_AVAILABLE_EVENTID, 634 WMI_SCAN_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_SCAN), 635 WMI_PDEV_TPC_CONFIG_EVENTID = WMI_TLV_CMD(WMI_GRP_PDEV), 636 WMI_CHAN_INFO_EVENTID, 637 WMI_PHYERR_EVENTID, 638 WMI_PDEV_DUMP_EVENTID, 639 WMI_TX_PAUSE_EVENTID, 640 WMI_DFS_RADAR_EVENTID, 641 WMI_PDEV_L1SS_TRACK_EVENTID, 642 WMI_PDEV_TEMPERATURE_EVENTID, 643 WMI_SERVICE_READY_EXT_EVENTID, 644 WMI_PDEV_FIPS_EVENTID, 645 WMI_PDEV_CHANNEL_HOPPING_EVENTID, 646 WMI_PDEV_ANI_CCK_LEVEL_EVENTID, 647 WMI_PDEV_ANI_OFDM_LEVEL_EVENTID, 648 WMI_PDEV_TPC_EVENTID, 649 WMI_PDEV_NFCAL_POWER_ALL_CHANNELS_EVENTID, 650 WMI_PDEV_SET_HW_MODE_RESP_EVENTID, 651 WMI_PDEV_HW_MODE_TRANSITION_EVENTID, 652 WMI_PDEV_SET_MAC_CONFIG_RESP_EVENTID, 653 WMI_PDEV_ANTDIV_STATUS_EVENTID, 654 WMI_PDEV_CHIP_POWER_STATS_EVENTID, 655 WMI_PDEV_CHIP_POWER_SAVE_FAILURE_DETECTED_EVENTID, 656 WMI_PDEV_CSA_SWITCH_COUNT_STATUS_EVENTID, 657 WMI_PDEV_CHECK_CAL_VERSION_EVENTID, 658 WMI_PDEV_DIV_RSSI_ANTID_EVENTID, 659 WMI_PDEV_BSS_CHAN_INFO_EVENTID, 660 WMI_PDEV_UPDATE_CTLTABLE_EVENTID, 661 WMI_PDEV_DMA_RING_CFG_RSP_EVENTID, 662 WMI_PDEV_DMA_RING_BUF_RELEASE_EVENTID, 663 WMI_PDEV_CTL_FAILSAFE_CHECK_EVENTID, 664 WMI_PDEV_CSC_SWITCH_COUNT_STATUS_EVENTID, 665 WMI_PDEV_COLD_BOOT_CAL_DATA_EVENTID, 666 WMI_PDEV_RAP_INFO_EVENTID, 667 WMI_CHAN_RF_CHARACTERIZATION_INFO_EVENTID, 668 WMI_SERVICE_READY_EXT2_EVENTID, 669 WMI_VDEV_START_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_VDEV), 670 WMI_VDEV_STOPPED_EVENTID, 671 WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID, 672 WMI_VDEV_MCC_BCN_INTERVAL_CHANGE_REQ_EVENTID, 673 WMI_VDEV_TSF_REPORT_EVENTID, 674 WMI_VDEV_DELETE_RESP_EVENTID, 675 WMI_VDEV_ENCRYPT_DECRYPT_DATA_RESP_EVENTID, 676 WMI_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_STATUS_EVENTID, 677 WMI_PEER_STA_KICKOUT_EVENTID = WMI_TLV_CMD(WMI_GRP_PEER), 678 WMI_PEER_INFO_EVENTID, 679 WMI_PEER_TX_FAIL_CNT_THR_EVENTID, 680 WMI_PEER_ESTIMATED_LINKSPEED_EVENTID, 681 WMI_PEER_STATE_EVENTID, 682 WMI_PEER_ASSOC_CONF_EVENTID, 683 WMI_PEER_DELETE_RESP_EVENTID, 684 WMI_PEER_RATECODE_LIST_EVENTID, 685 WMI_WDS_PEER_EVENTID, 686 WMI_PEER_STA_PS_STATECHG_EVENTID, 687 WMI_PEER_ANTDIV_INFO_EVENTID, 688 WMI_PEER_RESERVED0_EVENTID, 689 WMI_PEER_RESERVED1_EVENTID, 690 WMI_PEER_RESERVED2_EVENTID, 691 WMI_PEER_RESERVED3_EVENTID, 692 WMI_PEER_RESERVED4_EVENTID, 693 WMI_PEER_RESERVED5_EVENTID, 694 WMI_PEER_RESERVED6_EVENTID, 695 WMI_PEER_RESERVED7_EVENTID, 696 WMI_PEER_RESERVED8_EVENTID, 697 WMI_PEER_RESERVED9_EVENTID, 698 WMI_PEER_RESERVED10_EVENTID, 699 WMI_PEER_OPER_MODE_CHANGE_EVENTID, 700 WMI_PEER_TX_PN_RESPONSE_EVENTID, 701 WMI_PEER_CFR_CAPTURE_EVENTID, 702 WMI_PEER_CREATE_CONF_EVENTID, 703 WMI_MGMT_RX_EVENTID = WMI_TLV_CMD(WMI_GRP_MGMT), 704 WMI_HOST_SWBA_EVENTID, 705 WMI_TBTTOFFSET_UPDATE_EVENTID, 706 WMI_OFFLOAD_BCN_TX_STATUS_EVENTID, 707 WMI_OFFLOAD_PROB_RESP_TX_STATUS_EVENTID, 708 WMI_MGMT_TX_COMPLETION_EVENTID, 709 WMI_MGMT_TX_BUNDLE_COMPLETION_EVENTID, 710 WMI_TBTTOFFSET_EXT_UPDATE_EVENTID, 711 WMI_OFFCHAN_DATA_TX_COMPLETION_EVENTID, 712 WMI_HOST_FILS_DISCOVERY_EVENTID, 713 WMI_TX_DELBA_COMPLETE_EVENTID = WMI_TLV_CMD(WMI_GRP_BA_NEG), 714 WMI_TX_ADDBA_COMPLETE_EVENTID, 715 WMI_BA_RSP_SSN_EVENTID, 716 WMI_AGGR_STATE_TRIG_EVENTID, 717 WMI_ROAM_EVENTID = WMI_TLV_CMD(WMI_GRP_ROAM), 718 WMI_PROFILE_MATCH, 719 WMI_ROAM_SYNCH_EVENTID, 720 WMI_P2P_DISC_EVENTID = WMI_TLV_CMD(WMI_GRP_P2P), 721 WMI_P2P_NOA_EVENTID, 722 WMI_P2P_LISTEN_OFFLOAD_STOPPED_EVENTID, 723 WMI_AP_PS_EGAP_INFO_EVENTID = WMI_TLV_CMD(WMI_GRP_AP_PS), 724 WMI_PDEV_RESUME_EVENTID = WMI_TLV_CMD(WMI_GRP_SUSPEND), 725 WMI_WOW_WAKEUP_HOST_EVENTID = WMI_TLV_CMD(WMI_GRP_WOW), 726 WMI_D0_WOW_DISABLE_ACK_EVENTID, 727 WMI_WOW_INITIAL_WAKEUP_EVENTID, 728 WMI_RTT_MEASUREMENT_REPORT_EVENTID = WMI_TLV_CMD(WMI_GRP_RTT), 729 WMI_TSF_MEASUREMENT_REPORT_EVENTID, 730 WMI_RTT_ERROR_REPORT_EVENTID, 731 WMI_STATS_EXT_EVENTID = WMI_TLV_CMD(WMI_GRP_STATS), 732 WMI_IFACE_LINK_STATS_EVENTID, 733 WMI_PEER_LINK_STATS_EVENTID, 734 WMI_RADIO_LINK_STATS_EVENTID, 735 WMI_UPDATE_FW_MEM_DUMP_EVENTID, 736 WMI_DIAG_EVENT_LOG_SUPPORTED_EVENTID, 737 WMI_INST_RSSI_STATS_EVENTID, 738 WMI_RADIO_TX_POWER_LEVEL_STATS_EVENTID, 739 WMI_REPORT_STATS_EVENTID, 740 WMI_UPDATE_RCPI_EVENTID, 741 WMI_PEER_STATS_INFO_EVENTID, 742 WMI_RADIO_CHAN_STATS_EVENTID, 743 WMI_NLO_MATCH_EVENTID = WMI_TLV_CMD(WMI_GRP_NLO_OFL), 744 WMI_NLO_SCAN_COMPLETE_EVENTID, 745 WMI_APFIND_EVENTID, 746 WMI_PASSPOINT_MATCH_EVENTID, 747 WMI_GTK_OFFLOAD_STATUS_EVENTID = WMI_TLV_CMD(WMI_GRP_GTK_OFL), 748 WMI_GTK_REKEY_FAIL_EVENTID, 749 WMI_CSA_HANDLING_EVENTID = WMI_TLV_CMD(WMI_GRP_CSA_OFL), 750 WMI_CHATTER_PC_QUERY_EVENTID = WMI_TLV_CMD(WMI_GRP_CHATTER), 751 WMI_PDEV_DFS_RADAR_DETECTION_EVENTID = WMI_TLV_CMD(WMI_GRP_DFS), 752 WMI_VDEV_DFS_CAC_COMPLETE_EVENTID, 753 WMI_VDEV_ADFS_OCAC_COMPLETE_EVENTID, 754 WMI_ECHO_EVENTID = WMI_TLV_CMD(WMI_GRP_MISC), 755 WMI_PDEV_UTF_EVENTID, 756 WMI_DEBUG_MESG_EVENTID, 757 WMI_UPDATE_STATS_EVENTID, 758 WMI_DEBUG_PRINT_EVENTID, 759 WMI_DCS_INTERFERENCE_EVENTID, 760 WMI_PDEV_QVIT_EVENTID, 761 WMI_WLAN_PROFILE_DATA_EVENTID, 762 WMI_PDEV_FTM_INTG_EVENTID, 763 WMI_WLAN_FREQ_AVOID_EVENTID, 764 WMI_VDEV_GET_KEEPALIVE_EVENTID, 765 WMI_THERMAL_MGMT_EVENTID, 766 WMI_DIAG_DATA_CONTAINER_EVENTID, 767 WMI_HOST_AUTO_SHUTDOWN_EVENTID, 768 WMI_UPDATE_WHAL_MIB_STATS_EVENTID, 769 WMI_UPDATE_VDEV_RATE_STATS_EVENTID, 770 WMI_DIAG_EVENTID, 771 WMI_OCB_SET_SCHED_EVENTID, 772 WMI_DEBUG_MESG_FLUSH_COMPLETE_EVENTID, 773 WMI_RSSI_BREACH_EVENTID, 774 WMI_TRANSFER_DATA_TO_FLASH_COMPLETE_EVENTID, 775 WMI_PDEV_UTF_SCPC_EVENTID, 776 WMI_READ_DATA_FROM_FLASH_EVENTID, 777 WMI_REPORT_RX_AGGR_FAILURE_EVENTID, 778 WMI_PKGID_EVENTID, 779 WMI_GPIO_INPUT_EVENTID = WMI_TLV_CMD(WMI_GRP_GPIO), 780 WMI_UPLOADH_EVENTID, 781 WMI_CAPTUREH_EVENTID, 782 WMI_RFKILL_STATE_CHANGE_EVENTID, 783 WMI_TDLS_PEER_EVENTID = WMI_TLV_CMD(WMI_GRP_TDLS), 784 WMI_STA_SMPS_FORCE_MODE_COMPL_EVENTID = WMI_TLV_CMD(WMI_GRP_STA_SMPS), 785 WMI_BATCH_SCAN_ENABLED_EVENTID = WMI_TLV_CMD(WMI_GRP_LOCATION_SCAN), 786 WMI_BATCH_SCAN_RESULT_EVENTID, 787 WMI_OEM_CAPABILITY_EVENTID = WMI_TLV_CMD(WMI_GRP_OEM), 788 WMI_OEM_MEASUREMENT_REPORT_EVENTID, 789 WMI_OEM_ERROR_REPORT_EVENTID, 790 WMI_OEM_RESPONSE_EVENTID, 791 WMI_NAN_EVENTID = WMI_TLV_CMD(WMI_GRP_NAN), 792 WMI_NAN_DISC_IFACE_CREATED_EVENTID, 793 WMI_NAN_DISC_IFACE_DELETED_EVENTID, 794 WMI_NAN_STARTED_CLUSTER_EVENTID, 795 WMI_NAN_JOINED_CLUSTER_EVENTID, 796 WMI_COEX_REPORT_ANTENNA_ISOLATION_EVENTID = WMI_TLV_CMD(WMI_GRP_COEX), 797 WMI_LPI_RESULT_EVENTID = WMI_TLV_CMD(WMI_GRP_LPI), 798 WMI_LPI_STATUS_EVENTID, 799 WMI_LPI_HANDOFF_EVENTID, 800 WMI_EXTSCAN_START_STOP_EVENTID = WMI_TLV_CMD(WMI_GRP_EXTSCAN), 801 WMI_EXTSCAN_OPERATION_EVENTID, 802 WMI_EXTSCAN_TABLE_USAGE_EVENTID, 803 WMI_EXTSCAN_CACHED_RESULTS_EVENTID, 804 WMI_EXTSCAN_WLAN_CHANGE_RESULTS_EVENTID, 805 WMI_EXTSCAN_HOTLIST_MATCH_EVENTID, 806 WMI_EXTSCAN_CAPABILITIES_EVENTID, 807 WMI_EXTSCAN_HOTLIST_SSID_MATCH_EVENTID, 808 WMI_MDNS_STATS_EVENTID = WMI_TLV_CMD(WMI_GRP_MDNS_OFL), 809 WMI_SAP_OFL_ADD_STA_EVENTID = WMI_TLV_CMD(WMI_GRP_SAP_OFL), 810 WMI_SAP_OFL_DEL_STA_EVENTID, 811 WMI_OBSS_COLOR_COLLISION_DETECTION_EVENTID = 812 WMI_EVT_GRP_START_ID(WMI_GRP_OBSS_OFL), 813 WMI_OCB_SET_CONFIG_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_OCB), 814 WMI_OCB_GET_TSF_TIMER_RESP_EVENTID, 815 WMI_DCC_GET_STATS_RESP_EVENTID, 816 WMI_DCC_UPDATE_NDL_RESP_EVENTID, 817 WMI_DCC_STATS_EVENTID, 818 WMI_SOC_SET_HW_MODE_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_SOC), 819 WMI_SOC_HW_MODE_TRANSITION_EVENTID, 820 WMI_SOC_SET_DUAL_MAC_CONFIG_RESP_EVENTID, 821 WMI_MAWC_ENABLE_SENSOR_EVENTID = WMI_TLV_CMD(WMI_GRP_MAWC), 822 WMI_BPF_CAPABILIY_INFO_EVENTID = WMI_TLV_CMD(WMI_GRP_BPF_OFFLOAD), 823 WMI_BPF_VDEV_STATS_INFO_EVENTID, 824 WMI_RMC_NEW_LEADER_EVENTID = WMI_TLV_CMD(WMI_GRP_RMC), 825 WMI_REG_CHAN_LIST_CC_EVENTID = WMI_TLV_CMD(WMI_GRP_REGULATORY), 826 WMI_11D_NEW_COUNTRY_EVENTID, 827 WMI_REG_CHAN_LIST_CC_EXT_EVENTID, 828 WMI_NDI_CAP_RSP_EVENTID = WMI_TLV_CMD(WMI_GRP_PROTOTYPE), 829 WMI_NDP_INITIATOR_RSP_EVENTID, 830 WMI_NDP_RESPONDER_RSP_EVENTID, 831 WMI_NDP_END_RSP_EVENTID, 832 WMI_NDP_INDICATION_EVENTID, 833 WMI_NDP_CONFIRM_EVENTID, 834 WMI_NDP_END_INDICATION_EVENTID, 835 836 WMI_TWT_ENABLE_EVENTID = WMI_TLV_CMD(WMI_GRP_TWT), 837 WMI_TWT_DISABLE_EVENTID, 838 WMI_TWT_ADD_DIALOG_EVENTID, 839 WMI_TWT_DEL_DIALOG_EVENTID, 840 WMI_TWT_PAUSE_DIALOG_EVENTID, 841 WMI_TWT_RESUME_DIALOG_EVENTID, 842 }; 843 844 enum wmi_tlv_pdev_param { 845 WMI_PDEV_PARAM_TX_CHAIN_MASK = 0x1, 846 WMI_PDEV_PARAM_RX_CHAIN_MASK, 847 WMI_PDEV_PARAM_TXPOWER_LIMIT2G, 848 WMI_PDEV_PARAM_TXPOWER_LIMIT5G, 849 WMI_PDEV_PARAM_TXPOWER_SCALE, 850 WMI_PDEV_PARAM_BEACON_GEN_MODE, 851 WMI_PDEV_PARAM_BEACON_TX_MODE, 852 WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE, 853 WMI_PDEV_PARAM_PROTECTION_MODE, 854 WMI_PDEV_PARAM_DYNAMIC_BW, 855 WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH, 856 WMI_PDEV_PARAM_AGG_SW_RETRY_TH, 857 WMI_PDEV_PARAM_STA_KICKOUT_TH, 858 WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING, 859 WMI_PDEV_PARAM_LTR_ENABLE, 860 WMI_PDEV_PARAM_LTR_AC_LATENCY_BE, 861 WMI_PDEV_PARAM_LTR_AC_LATENCY_BK, 862 WMI_PDEV_PARAM_LTR_AC_LATENCY_VI, 863 WMI_PDEV_PARAM_LTR_AC_LATENCY_VO, 864 WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT, 865 WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE, 866 WMI_PDEV_PARAM_LTR_RX_OVERRIDE, 867 WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT, 868 WMI_PDEV_PARAM_L1SS_ENABLE, 869 WMI_PDEV_PARAM_DSLEEP_ENABLE, 870 WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH, 871 WMI_PDEV_PARAM_PCIELP_TXBUF_WATERMARK, 872 WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN, 873 WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE, 874 WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD, 875 WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD, 876 WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD, 877 WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD, 878 WMI_PDEV_PARAM_PMF_QOS, 879 WMI_PDEV_PARAM_ARP_AC_OVERRIDE, 880 WMI_PDEV_PARAM_DCS, 881 WMI_PDEV_PARAM_ANI_ENABLE, 882 WMI_PDEV_PARAM_ANI_POLL_PERIOD, 883 WMI_PDEV_PARAM_ANI_LISTEN_PERIOD, 884 WMI_PDEV_PARAM_ANI_OFDM_LEVEL, 885 WMI_PDEV_PARAM_ANI_CCK_LEVEL, 886 WMI_PDEV_PARAM_DYNTXCHAIN, 887 WMI_PDEV_PARAM_PROXY_STA, 888 WMI_PDEV_PARAM_IDLE_PS_CONFIG, 889 WMI_PDEV_PARAM_POWER_GATING_SLEEP, 890 WMI_PDEV_PARAM_RFKILL_ENABLE, 891 WMI_PDEV_PARAM_BURST_DUR, 892 WMI_PDEV_PARAM_BURST_ENABLE, 893 WMI_PDEV_PARAM_HW_RFKILL_CONFIG, 894 WMI_PDEV_PARAM_LOW_POWER_RF_ENABLE, 895 WMI_PDEV_PARAM_L1SS_TRACK, 896 WMI_PDEV_PARAM_HYST_EN, 897 WMI_PDEV_PARAM_POWER_COLLAPSE_ENABLE, 898 WMI_PDEV_PARAM_LED_SYS_STATE, 899 WMI_PDEV_PARAM_LED_ENABLE, 900 WMI_PDEV_PARAM_AUDIO_OVER_WLAN_LATENCY, 901 WMI_PDEV_PARAM_AUDIO_OVER_WLAN_ENABLE, 902 WMI_PDEV_PARAM_WHAL_MIB_STATS_UPDATE_ENABLE, 903 WMI_PDEV_PARAM_VDEV_RATE_STATS_UPDATE_PERIOD, 904 WMI_PDEV_PARAM_CTS_CBW, 905 WMI_PDEV_PARAM_WNTS_CONFIG, 906 WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_ENABLE, 907 WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_MIN_SLEEP_SLOP, 908 WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_INC_DEC_STEP, 909 WMI_PDEV_PARAM_EARLY_RX_FIX_SLEEP_SLOP, 910 WMI_PDEV_PARAM_BMISS_BASED_ADAPTIVE_BTO_ENABLE, 911 WMI_PDEV_PARAM_BMISS_BTO_MIN_BCN_TIMEOUT, 912 WMI_PDEV_PARAM_BMISS_BTO_INC_DEC_STEP, 913 WMI_PDEV_PARAM_BTO_FIX_BCN_TIMEOUT, 914 WMI_PDEV_PARAM_CE_BASED_ADAPTIVE_BTO_ENABLE, 915 WMI_PDEV_PARAM_CE_BTO_COMBO_CE_VALUE, 916 WMI_PDEV_PARAM_TX_CHAIN_MASK_2G, 917 WMI_PDEV_PARAM_RX_CHAIN_MASK_2G, 918 WMI_PDEV_PARAM_TX_CHAIN_MASK_5G, 919 WMI_PDEV_PARAM_RX_CHAIN_MASK_5G, 920 WMI_PDEV_PARAM_TX_CHAIN_MASK_CCK, 921 WMI_PDEV_PARAM_TX_CHAIN_MASK_1SS, 922 WMI_PDEV_PARAM_CTS2SELF_FOR_P2P_GO_CONFIG, 923 WMI_PDEV_PARAM_TXPOWER_DECR_DB, 924 WMI_PDEV_PARAM_AGGR_BURST, 925 WMI_PDEV_PARAM_RX_DECAP_MODE, 926 WMI_PDEV_PARAM_FAST_CHANNEL_RESET, 927 WMI_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA, 928 WMI_PDEV_PARAM_ANTENNA_GAIN, 929 WMI_PDEV_PARAM_RX_FILTER, 930 WMI_PDEV_SET_MCAST_TO_UCAST_TID, 931 WMI_PDEV_PARAM_PROXY_STA_MODE, 932 WMI_PDEV_PARAM_SET_MCAST2UCAST_MODE, 933 WMI_PDEV_PARAM_SET_MCAST2UCAST_BUFFER, 934 WMI_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER, 935 WMI_PDEV_PEER_STA_PS_STATECHG_ENABLE, 936 WMI_PDEV_PARAM_IGMPMLD_AC_OVERRIDE, 937 WMI_PDEV_PARAM_BLOCK_INTERBSS, 938 WMI_PDEV_PARAM_SET_DISABLE_RESET_CMDID, 939 WMI_PDEV_PARAM_SET_MSDU_TTL_CMDID, 940 WMI_PDEV_PARAM_SET_PPDU_DURATION_CMDID, 941 WMI_PDEV_PARAM_TXBF_SOUND_PERIOD_CMDID, 942 WMI_PDEV_PARAM_SET_PROMISC_MODE_CMDID, 943 WMI_PDEV_PARAM_SET_BURST_MODE_CMDID, 944 WMI_PDEV_PARAM_EN_STATS, 945 WMI_PDEV_PARAM_MU_GROUP_POLICY, 946 WMI_PDEV_PARAM_NOISE_DETECTION, 947 WMI_PDEV_PARAM_NOISE_THRESHOLD, 948 WMI_PDEV_PARAM_DPD_ENABLE, 949 WMI_PDEV_PARAM_SET_MCAST_BCAST_ECHO, 950 WMI_PDEV_PARAM_ATF_STRICT_SCH, 951 WMI_PDEV_PARAM_ATF_SCHED_DURATION, 952 WMI_PDEV_PARAM_ANT_PLZN, 953 WMI_PDEV_PARAM_MGMT_RETRY_LIMIT, 954 WMI_PDEV_PARAM_SENSITIVITY_LEVEL, 955 WMI_PDEV_PARAM_SIGNED_TXPOWER_2G, 956 WMI_PDEV_PARAM_SIGNED_TXPOWER_5G, 957 WMI_PDEV_PARAM_ENABLE_PER_TID_AMSDU, 958 WMI_PDEV_PARAM_ENABLE_PER_TID_AMPDU, 959 WMI_PDEV_PARAM_CCA_THRESHOLD, 960 WMI_PDEV_PARAM_RTS_FIXED_RATE, 961 WMI_PDEV_PARAM_PDEV_RESET, 962 WMI_PDEV_PARAM_WAPI_MBSSID_OFFSET, 963 WMI_PDEV_PARAM_ARP_DBG_SRCADDR, 964 WMI_PDEV_PARAM_ARP_DBG_DSTADDR, 965 WMI_PDEV_PARAM_ATF_OBSS_NOISE_SCH, 966 WMI_PDEV_PARAM_ATF_OBSS_NOISE_SCALING_FACTOR, 967 WMI_PDEV_PARAM_CUST_TXPOWER_SCALE, 968 WMI_PDEV_PARAM_ATF_DYNAMIC_ENABLE, 969 WMI_PDEV_PARAM_CTRL_RETRY_LIMIT, 970 WMI_PDEV_PARAM_PROPAGATION_DELAY, 971 WMI_PDEV_PARAM_ENA_ANT_DIV, 972 WMI_PDEV_PARAM_FORCE_CHAIN_ANT, 973 WMI_PDEV_PARAM_ANT_DIV_SELFTEST, 974 WMI_PDEV_PARAM_ANT_DIV_SELFTEST_INTVL, 975 WMI_PDEV_PARAM_STATS_OBSERVATION_PERIOD, 976 WMI_PDEV_PARAM_TX_PPDU_DELAY_BIN_SIZE_MS, 977 WMI_PDEV_PARAM_TX_PPDU_DELAY_ARRAY_LEN, 978 WMI_PDEV_PARAM_TX_MPDU_AGGR_ARRAY_LEN, 979 WMI_PDEV_PARAM_RX_MPDU_AGGR_ARRAY_LEN, 980 WMI_PDEV_PARAM_TX_SCH_DELAY, 981 WMI_PDEV_PARAM_ENABLE_RTS_SIFS_BURSTING, 982 WMI_PDEV_PARAM_MAX_MPDUS_IN_AMPDU, 983 WMI_PDEV_PARAM_PEER_STATS_INFO_ENABLE, 984 WMI_PDEV_PARAM_FAST_PWR_TRANSITION, 985 WMI_PDEV_PARAM_RADIO_CHAN_STATS_ENABLE, 986 WMI_PDEV_PARAM_RADIO_DIAGNOSIS_ENABLE, 987 WMI_PDEV_PARAM_MESH_MCAST_ENABLE, 988 WMI_PDEV_PARAM_PER_PEER_CFR_ENABLE = 0xa8, 989 WMI_PDEV_PARAM_SET_CMD_OBSS_PD_THRESHOLD = 0xbc, 990 WMI_PDEV_PARAM_SET_CMD_OBSS_PD_PER_AC = 0xbe, 991 WMI_PDEV_PARAM_ENABLE_SR_PROHIBIT = 0xc6, 992 }; 993 994 enum wmi_tlv_vdev_param { 995 WMI_VDEV_PARAM_RTS_THRESHOLD = 0x1, 996 WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD, 997 WMI_VDEV_PARAM_BEACON_INTERVAL, 998 WMI_VDEV_PARAM_LISTEN_INTERVAL, 999 WMI_VDEV_PARAM_MULTICAST_RATE, 1000 WMI_VDEV_PARAM_MGMT_TX_RATE, 1001 WMI_VDEV_PARAM_SLOT_TIME, 1002 WMI_VDEV_PARAM_PREAMBLE, 1003 WMI_VDEV_PARAM_SWBA_TIME, 1004 WMI_VDEV_STATS_UPDATE_PERIOD, 1005 WMI_VDEV_PWRSAVE_AGEOUT_TIME, 1006 WMI_VDEV_HOST_SWBA_INTERVAL, 1007 WMI_VDEV_PARAM_DTIM_PERIOD, 1008 WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT, 1009 WMI_VDEV_PARAM_WDS, 1010 WMI_VDEV_PARAM_ATIM_WINDOW, 1011 WMI_VDEV_PARAM_BMISS_COUNT_MAX, 1012 WMI_VDEV_PARAM_BMISS_FIRST_BCNT, 1013 WMI_VDEV_PARAM_BMISS_FINAL_BCNT, 1014 WMI_VDEV_PARAM_FEATURE_WMM, 1015 WMI_VDEV_PARAM_CHWIDTH, 1016 WMI_VDEV_PARAM_CHEXTOFFSET, 1017 WMI_VDEV_PARAM_DISABLE_HTPROTECTION, 1018 WMI_VDEV_PARAM_STA_QUICKKICKOUT, 1019 WMI_VDEV_PARAM_MGMT_RATE, 1020 WMI_VDEV_PARAM_PROTECTION_MODE, 1021 WMI_VDEV_PARAM_FIXED_RATE, 1022 WMI_VDEV_PARAM_SGI, 1023 WMI_VDEV_PARAM_LDPC, 1024 WMI_VDEV_PARAM_TX_STBC, 1025 WMI_VDEV_PARAM_RX_STBC, 1026 WMI_VDEV_PARAM_INTRA_BSS_FWD, 1027 WMI_VDEV_PARAM_DEF_KEYID, 1028 WMI_VDEV_PARAM_NSS, 1029 WMI_VDEV_PARAM_BCAST_DATA_RATE, 1030 WMI_VDEV_PARAM_MCAST_DATA_RATE, 1031 WMI_VDEV_PARAM_MCAST_INDICATE, 1032 WMI_VDEV_PARAM_DHCP_INDICATE, 1033 WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE, 1034 WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS, 1035 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS, 1036 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS, 1037 WMI_VDEV_PARAM_AP_ENABLE_NAWDS, 1038 WMI_VDEV_PARAM_ENABLE_RTSCTS, 1039 WMI_VDEV_PARAM_TXBF, 1040 WMI_VDEV_PARAM_PACKET_POWERSAVE, 1041 WMI_VDEV_PARAM_DROP_UNENCRY, 1042 WMI_VDEV_PARAM_TX_ENCAP_TYPE, 1043 WMI_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS, 1044 WMI_VDEV_PARAM_EARLY_RX_ADJUST_ENABLE, 1045 WMI_VDEV_PARAM_EARLY_RX_TGT_BMISS_NUM, 1046 WMI_VDEV_PARAM_EARLY_RX_BMISS_SAMPLE_CYCLE, 1047 WMI_VDEV_PARAM_EARLY_RX_SLOP_STEP, 1048 WMI_VDEV_PARAM_EARLY_RX_INIT_SLOP, 1049 WMI_VDEV_PARAM_EARLY_RX_ADJUST_PAUSE, 1050 WMI_VDEV_PARAM_TX_PWRLIMIT, 1051 WMI_VDEV_PARAM_SNR_NUM_FOR_CAL, 1052 WMI_VDEV_PARAM_ROAM_FW_OFFLOAD, 1053 WMI_VDEV_PARAM_ENABLE_RMC, 1054 WMI_VDEV_PARAM_IBSS_MAX_BCN_LOST_MS, 1055 WMI_VDEV_PARAM_MAX_RATE, 1056 WMI_VDEV_PARAM_EARLY_RX_DRIFT_SAMPLE, 1057 WMI_VDEV_PARAM_SET_IBSS_TX_FAIL_CNT_THR, 1058 WMI_VDEV_PARAM_EBT_RESYNC_TIMEOUT, 1059 WMI_VDEV_PARAM_AGGR_TRIG_EVENT_ENABLE, 1060 WMI_VDEV_PARAM_IS_IBSS_POWER_SAVE_ALLOWED, 1061 WMI_VDEV_PARAM_IS_POWER_COLLAPSE_ALLOWED, 1062 WMI_VDEV_PARAM_IS_AWAKE_ON_TXRX_ENABLED, 1063 WMI_VDEV_PARAM_INACTIVITY_CNT, 1064 WMI_VDEV_PARAM_TXSP_END_INACTIVITY_TIME_MS, 1065 WMI_VDEV_PARAM_DTIM_POLICY, 1066 WMI_VDEV_PARAM_IBSS_PS_WARMUP_TIME_SECS, 1067 WMI_VDEV_PARAM_IBSS_PS_1RX_CHAIN_IN_ATIM_WINDOW_ENABLE, 1068 WMI_VDEV_PARAM_RX_LEAK_WINDOW, 1069 WMI_VDEV_PARAM_STATS_AVG_FACTOR, 1070 WMI_VDEV_PARAM_DISCONNECT_TH, 1071 WMI_VDEV_PARAM_RTSCTS_RATE, 1072 WMI_VDEV_PARAM_MCC_RTSCTS_PROTECTION_ENABLE, 1073 WMI_VDEV_PARAM_MCC_BROADCAST_PROBE_ENABLE, 1074 WMI_VDEV_PARAM_TXPOWER_SCALE, 1075 WMI_VDEV_PARAM_TXPOWER_SCALE_DECR_DB, 1076 WMI_VDEV_PARAM_MCAST2UCAST_SET, 1077 WMI_VDEV_PARAM_RC_NUM_RETRIES, 1078 WMI_VDEV_PARAM_CABQ_MAXDUR, 1079 WMI_VDEV_PARAM_MFPTEST_SET, 1080 WMI_VDEV_PARAM_RTS_FIXED_RATE, 1081 WMI_VDEV_PARAM_VHT_SGIMASK, 1082 WMI_VDEV_PARAM_VHT80_RATEMASK, 1083 WMI_VDEV_PARAM_PROXY_STA, 1084 WMI_VDEV_PARAM_VIRTUAL_CELL_MODE, 1085 WMI_VDEV_PARAM_RX_DECAP_TYPE, 1086 WMI_VDEV_PARAM_BW_NSS_RATEMASK, 1087 WMI_VDEV_PARAM_SENSOR_AP, 1088 WMI_VDEV_PARAM_BEACON_RATE, 1089 WMI_VDEV_PARAM_DTIM_ENABLE_CTS, 1090 WMI_VDEV_PARAM_STA_KICKOUT, 1091 WMI_VDEV_PARAM_CAPABILITIES, 1092 WMI_VDEV_PARAM_TSF_INCREMENT, 1093 WMI_VDEV_PARAM_AMPDU_PER_AC, 1094 WMI_VDEV_PARAM_RX_FILTER, 1095 WMI_VDEV_PARAM_MGMT_TX_POWER, 1096 WMI_VDEV_PARAM_NON_AGG_SW_RETRY_TH, 1097 WMI_VDEV_PARAM_AGG_SW_RETRY_TH, 1098 WMI_VDEV_PARAM_DISABLE_DYN_BW_RTS, 1099 WMI_VDEV_PARAM_ATF_SSID_SCHED_POLICY, 1100 WMI_VDEV_PARAM_HE_DCM, 1101 WMI_VDEV_PARAM_HE_RANGE_EXT, 1102 WMI_VDEV_PARAM_ENABLE_BCAST_PROBE_RESPONSE, 1103 WMI_VDEV_PARAM_FILS_MAX_CHANNEL_GUARD_TIME, 1104 WMI_VDEV_PARAM_HE_LTF = 0x74, 1105 WMI_VDEV_PARAM_ENABLE_DISABLE_RTT_RESPONDER_ROLE = 0x7d, 1106 WMI_VDEV_PARAM_BA_MODE = 0x7e, 1107 WMI_VDEV_PARAM_AUTORATE_MISC_CFG = 0x80, 1108 WMI_VDEV_PARAM_SET_HE_SOUNDING_MODE = 0x87, 1109 WMI_VDEV_PARAM_6GHZ_PARAMS = 0x99, 1110 WMI_VDEV_PARAM_PROTOTYPE = 0x8000, 1111 WMI_VDEV_PARAM_BSS_COLOR, 1112 WMI_VDEV_PARAM_SET_HEMU_MODE, 1113 WMI_VDEV_PARAM_HEOPS_0_31 = 0x8003, 1114 }; 1115 1116 enum wmi_tlv_peer_flags { 1117 WMI_PEER_AUTH = 0x00000001, 1118 WMI_PEER_QOS = 0x00000002, 1119 WMI_PEER_NEED_PTK_4_WAY = 0x00000004, 1120 WMI_PEER_NEED_GTK_2_WAY = 0x00000010, 1121 WMI_PEER_HE = 0x00000400, 1122 WMI_PEER_APSD = 0x00000800, 1123 WMI_PEER_HT = 0x00001000, 1124 WMI_PEER_40MHZ = 0x00002000, 1125 WMI_PEER_STBC = 0x00008000, 1126 WMI_PEER_LDPC = 0x00010000, 1127 WMI_PEER_DYN_MIMOPS = 0x00020000, 1128 WMI_PEER_STATIC_MIMOPS = 0x00040000, 1129 WMI_PEER_SPATIAL_MUX = 0x00200000, 1130 WMI_PEER_TWT_REQ = 0x00400000, 1131 WMI_PEER_TWT_RESP = 0x00800000, 1132 WMI_PEER_VHT = 0x02000000, 1133 WMI_PEER_80MHZ = 0x04000000, 1134 WMI_PEER_PMF = 0x08000000, 1135 WMI_PEER_IS_P2P_CAPABLE = 0x20000000, 1136 WMI_PEER_160MHZ = 0x40000000, 1137 WMI_PEER_SAFEMODE_EN = 0x80000000, 1138 }; 1139 1140 /** Enum list of TLV Tags for each parameter structure type. */ 1141 enum wmi_tlv_tag { 1142 WMI_TAG_LAST_RESERVED = 15, 1143 WMI_TAG_FIRST_ARRAY_ENUM, 1144 WMI_TAG_ARRAY_UINT32 = WMI_TAG_FIRST_ARRAY_ENUM, 1145 WMI_TAG_ARRAY_BYTE, 1146 WMI_TAG_ARRAY_STRUCT, 1147 WMI_TAG_ARRAY_FIXED_STRUCT, 1148 WMI_TAG_LAST_ARRAY_ENUM = 31, 1149 WMI_TAG_SERVICE_READY_EVENT, 1150 WMI_TAG_HAL_REG_CAPABILITIES, 1151 WMI_TAG_WLAN_HOST_MEM_REQ, 1152 WMI_TAG_READY_EVENT, 1153 WMI_TAG_SCAN_EVENT, 1154 WMI_TAG_PDEV_TPC_CONFIG_EVENT, 1155 WMI_TAG_CHAN_INFO_EVENT, 1156 WMI_TAG_COMB_PHYERR_RX_HDR, 1157 WMI_TAG_VDEV_START_RESPONSE_EVENT, 1158 WMI_TAG_VDEV_STOPPED_EVENT, 1159 WMI_TAG_VDEV_INSTALL_KEY_COMPLETE_EVENT, 1160 WMI_TAG_PEER_STA_KICKOUT_EVENT, 1161 WMI_TAG_MGMT_RX_HDR, 1162 WMI_TAG_TBTT_OFFSET_EVENT, 1163 WMI_TAG_TX_DELBA_COMPLETE_EVENT, 1164 WMI_TAG_TX_ADDBA_COMPLETE_EVENT, 1165 WMI_TAG_ROAM_EVENT, 1166 WMI_TAG_WOW_EVENT_INFO, 1167 WMI_TAG_WOW_EVENT_INFO_SECTION_BITMAP, 1168 WMI_TAG_RTT_EVENT_HEADER, 1169 WMI_TAG_RTT_ERROR_REPORT_EVENT, 1170 WMI_TAG_RTT_MEAS_EVENT, 1171 WMI_TAG_ECHO_EVENT, 1172 WMI_TAG_FTM_INTG_EVENT, 1173 WMI_TAG_VDEV_GET_KEEPALIVE_EVENT, 1174 WMI_TAG_GPIO_INPUT_EVENT, 1175 WMI_TAG_CSA_EVENT, 1176 WMI_TAG_GTK_OFFLOAD_STATUS_EVENT, 1177 WMI_TAG_IGTK_INFO, 1178 WMI_TAG_DCS_INTERFERENCE_EVENT, 1179 WMI_TAG_ATH_DCS_CW_INT, 1180 WMI_TAG_WLAN_DCS_CW_INT = /* ALIAS */ 1181 WMI_TAG_ATH_DCS_CW_INT, 1182 WMI_TAG_ATH_DCS_WLAN_INT_STAT, 1183 WMI_TAG_WLAN_DCS_IM_TGT_STATS_T = /* ALIAS */ 1184 WMI_TAG_ATH_DCS_WLAN_INT_STAT, 1185 WMI_TAG_WLAN_PROFILE_CTX_T, 1186 WMI_TAG_WLAN_PROFILE_T, 1187 WMI_TAG_PDEV_QVIT_EVENT, 1188 WMI_TAG_HOST_SWBA_EVENT, 1189 WMI_TAG_TIM_INFO, 1190 WMI_TAG_P2P_NOA_INFO, 1191 WMI_TAG_STATS_EVENT, 1192 WMI_TAG_AVOID_FREQ_RANGES_EVENT, 1193 WMI_TAG_AVOID_FREQ_RANGE_DESC, 1194 WMI_TAG_GTK_REKEY_FAIL_EVENT, 1195 WMI_TAG_INIT_CMD, 1196 WMI_TAG_RESOURCE_CONFIG, 1197 WMI_TAG_WLAN_HOST_MEMORY_CHUNK, 1198 WMI_TAG_START_SCAN_CMD, 1199 WMI_TAG_STOP_SCAN_CMD, 1200 WMI_TAG_SCAN_CHAN_LIST_CMD, 1201 WMI_TAG_CHANNEL, 1202 WMI_TAG_PDEV_SET_REGDOMAIN_CMD, 1203 WMI_TAG_PDEV_SET_PARAM_CMD, 1204 WMI_TAG_PDEV_SET_WMM_PARAMS_CMD, 1205 WMI_TAG_WMM_PARAMS, 1206 WMI_TAG_PDEV_SET_QUIET_CMD, 1207 WMI_TAG_VDEV_CREATE_CMD, 1208 WMI_TAG_VDEV_DELETE_CMD, 1209 WMI_TAG_VDEV_START_REQUEST_CMD, 1210 WMI_TAG_P2P_NOA_DESCRIPTOR, 1211 WMI_TAG_P2P_GO_SET_BEACON_IE, 1212 WMI_TAG_GTK_OFFLOAD_CMD, 1213 WMI_TAG_VDEV_UP_CMD, 1214 WMI_TAG_VDEV_STOP_CMD, 1215 WMI_TAG_VDEV_DOWN_CMD, 1216 WMI_TAG_VDEV_SET_PARAM_CMD, 1217 WMI_TAG_VDEV_INSTALL_KEY_CMD, 1218 WMI_TAG_PEER_CREATE_CMD, 1219 WMI_TAG_PEER_DELETE_CMD, 1220 WMI_TAG_PEER_FLUSH_TIDS_CMD, 1221 WMI_TAG_PEER_SET_PARAM_CMD, 1222 WMI_TAG_PEER_ASSOC_COMPLETE_CMD, 1223 WMI_TAG_VHT_RATE_SET, 1224 WMI_TAG_BCN_TMPL_CMD, 1225 WMI_TAG_PRB_TMPL_CMD, 1226 WMI_TAG_BCN_PRB_INFO, 1227 WMI_TAG_PEER_TID_ADDBA_CMD, 1228 WMI_TAG_PEER_TID_DELBA_CMD, 1229 WMI_TAG_STA_POWERSAVE_MODE_CMD, 1230 WMI_TAG_STA_POWERSAVE_PARAM_CMD, 1231 WMI_TAG_STA_DTIM_PS_METHOD_CMD, 1232 WMI_TAG_ROAM_SCAN_MODE, 1233 WMI_TAG_ROAM_SCAN_RSSI_THRESHOLD, 1234 WMI_TAG_ROAM_SCAN_PERIOD, 1235 WMI_TAG_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, 1236 WMI_TAG_PDEV_SUSPEND_CMD, 1237 WMI_TAG_PDEV_RESUME_CMD, 1238 WMI_TAG_ADD_BCN_FILTER_CMD, 1239 WMI_TAG_RMV_BCN_FILTER_CMD, 1240 WMI_TAG_WOW_ENABLE_CMD, 1241 WMI_TAG_WOW_HOSTWAKEUP_FROM_SLEEP_CMD, 1242 WMI_TAG_STA_UAPSD_AUTO_TRIG_CMD, 1243 WMI_TAG_STA_UAPSD_AUTO_TRIG_PARAM, 1244 WMI_TAG_SET_ARP_NS_OFFLOAD_CMD, 1245 WMI_TAG_ARP_OFFLOAD_TUPLE, 1246 WMI_TAG_NS_OFFLOAD_TUPLE, 1247 WMI_TAG_FTM_INTG_CMD, 1248 WMI_TAG_STA_KEEPALIVE_CMD, 1249 WMI_TAG_STA_KEEPALIVE_ARP_RESPONSE, 1250 WMI_TAG_P2P_SET_VENDOR_IE_DATA_CMD, 1251 WMI_TAG_AP_PS_PEER_CMD, 1252 WMI_TAG_PEER_RATE_RETRY_SCHED_CMD, 1253 WMI_TAG_WLAN_PROFILE_TRIGGER_CMD, 1254 WMI_TAG_WLAN_PROFILE_SET_HIST_INTVL_CMD, 1255 WMI_TAG_WLAN_PROFILE_GET_PROF_DATA_CMD, 1256 WMI_TAG_WLAN_PROFILE_ENABLE_PROFILE_ID_CMD, 1257 WMI_TAG_WOW_DEL_PATTERN_CMD, 1258 WMI_TAG_WOW_ADD_DEL_EVT_CMD, 1259 WMI_TAG_RTT_MEASREQ_HEAD, 1260 WMI_TAG_RTT_MEASREQ_BODY, 1261 WMI_TAG_RTT_TSF_CMD, 1262 WMI_TAG_VDEV_SPECTRAL_CONFIGURE_CMD, 1263 WMI_TAG_VDEV_SPECTRAL_ENABLE_CMD, 1264 WMI_TAG_REQUEST_STATS_CMD, 1265 WMI_TAG_NLO_CONFIG_CMD, 1266 WMI_TAG_NLO_CONFIGURED_PARAMETERS, 1267 WMI_TAG_CSA_OFFLOAD_ENABLE_CMD, 1268 WMI_TAG_CSA_OFFLOAD_CHANSWITCH_CMD, 1269 WMI_TAG_CHATTER_SET_MODE_CMD, 1270 WMI_TAG_ECHO_CMD, 1271 WMI_TAG_VDEV_SET_KEEPALIVE_CMD, 1272 WMI_TAG_VDEV_GET_KEEPALIVE_CMD, 1273 WMI_TAG_FORCE_FW_HANG_CMD, 1274 WMI_TAG_GPIO_CONFIG_CMD, 1275 WMI_TAG_GPIO_OUTPUT_CMD, 1276 WMI_TAG_PEER_ADD_WDS_ENTRY_CMD, 1277 WMI_TAG_PEER_REMOVE_WDS_ENTRY_CMD, 1278 WMI_TAG_BCN_TX_HDR, 1279 WMI_TAG_BCN_SEND_FROM_HOST_CMD, 1280 WMI_TAG_MGMT_TX_HDR, 1281 WMI_TAG_ADDBA_CLEAR_RESP_CMD, 1282 WMI_TAG_ADDBA_SEND_CMD, 1283 WMI_TAG_DELBA_SEND_CMD, 1284 WMI_TAG_ADDBA_SETRESPONSE_CMD, 1285 WMI_TAG_SEND_SINGLEAMSDU_CMD, 1286 WMI_TAG_PDEV_PKTLOG_ENABLE_CMD, 1287 WMI_TAG_PDEV_PKTLOG_DISABLE_CMD, 1288 WMI_TAG_PDEV_SET_HT_IE_CMD, 1289 WMI_TAG_PDEV_SET_VHT_IE_CMD, 1290 WMI_TAG_PDEV_SET_DSCP_TID_MAP_CMD, 1291 WMI_TAG_PDEV_GREEN_AP_PS_ENABLE_CMD, 1292 WMI_TAG_PDEV_GET_TPC_CONFIG_CMD, 1293 WMI_TAG_PDEV_SET_BASE_MACADDR_CMD, 1294 WMI_TAG_PEER_MCAST_GROUP_CMD, 1295 WMI_TAG_ROAM_AP_PROFILE, 1296 WMI_TAG_AP_PROFILE, 1297 WMI_TAG_SCAN_SCH_PRIORITY_TABLE_CMD, 1298 WMI_TAG_PDEV_DFS_ENABLE_CMD, 1299 WMI_TAG_PDEV_DFS_DISABLE_CMD, 1300 WMI_TAG_WOW_ADD_PATTERN_CMD, 1301 WMI_TAG_WOW_BITMAP_PATTERN_T, 1302 WMI_TAG_WOW_IPV4_SYNC_PATTERN_T, 1303 WMI_TAG_WOW_IPV6_SYNC_PATTERN_T, 1304 WMI_TAG_WOW_MAGIC_PATTERN_CMD, 1305 WMI_TAG_SCAN_UPDATE_REQUEST_CMD, 1306 WMI_TAG_CHATTER_PKT_COALESCING_FILTER, 1307 WMI_TAG_CHATTER_COALESCING_ADD_FILTER_CMD, 1308 WMI_TAG_CHATTER_COALESCING_DELETE_FILTER_CMD, 1309 WMI_TAG_CHATTER_COALESCING_QUERY_CMD, 1310 WMI_TAG_TXBF_CMD, 1311 WMI_TAG_DEBUG_LOG_CONFIG_CMD, 1312 WMI_TAG_NLO_EVENT, 1313 WMI_TAG_CHATTER_QUERY_REPLY_EVENT, 1314 WMI_TAG_UPLOAD_H_HDR, 1315 WMI_TAG_CAPTURE_H_EVENT_HDR, 1316 WMI_TAG_VDEV_WNM_SLEEPMODE_CMD, 1317 WMI_TAG_VDEV_IPSEC_NATKEEPALIVE_FILTER_CMD, 1318 WMI_TAG_VDEV_WMM_ADDTS_CMD, 1319 WMI_TAG_VDEV_WMM_DELTS_CMD, 1320 WMI_TAG_VDEV_SET_WMM_PARAMS_CMD, 1321 WMI_TAG_TDLS_SET_STATE_CMD, 1322 WMI_TAG_TDLS_PEER_UPDATE_CMD, 1323 WMI_TAG_TDLS_PEER_EVENT, 1324 WMI_TAG_TDLS_PEER_CAPABILITIES, 1325 WMI_TAG_VDEV_MCC_SET_TBTT_MODE_CMD, 1326 WMI_TAG_ROAM_CHAN_LIST, 1327 WMI_TAG_VDEV_MCC_BCN_INTVL_CHANGE_EVENT, 1328 WMI_TAG_RESMGR_ADAPTIVE_OCS_ENABLE_DISABLE_CMD, 1329 WMI_TAG_RESMGR_SET_CHAN_TIME_QUOTA_CMD, 1330 WMI_TAG_RESMGR_SET_CHAN_LATENCY_CMD, 1331 WMI_TAG_BA_REQ_SSN_CMD, 1332 WMI_TAG_BA_RSP_SSN_EVENT, 1333 WMI_TAG_STA_SMPS_FORCE_MODE_CMD, 1334 WMI_TAG_SET_MCASTBCAST_FILTER_CMD, 1335 WMI_TAG_P2P_SET_OPPPS_CMD, 1336 WMI_TAG_P2P_SET_NOA_CMD, 1337 WMI_TAG_BA_REQ_SSN_CMD_SUB_STRUCT_PARAM, 1338 WMI_TAG_BA_REQ_SSN_EVENT_SUB_STRUCT_PARAM, 1339 WMI_TAG_STA_SMPS_PARAM_CMD, 1340 WMI_TAG_VDEV_SET_GTX_PARAMS_CMD, 1341 WMI_TAG_MCC_SCHED_TRAFFIC_STATS_CMD, 1342 WMI_TAG_MCC_SCHED_STA_TRAFFIC_STATS, 1343 WMI_TAG_OFFLOAD_BCN_TX_STATUS_EVENT, 1344 WMI_TAG_P2P_NOA_EVENT, 1345 WMI_TAG_HB_SET_ENABLE_CMD, 1346 WMI_TAG_HB_SET_TCP_PARAMS_CMD, 1347 WMI_TAG_HB_SET_TCP_PKT_FILTER_CMD, 1348 WMI_TAG_HB_SET_UDP_PARAMS_CMD, 1349 WMI_TAG_HB_SET_UDP_PKT_FILTER_CMD, 1350 WMI_TAG_HB_IND_EVENT, 1351 WMI_TAG_TX_PAUSE_EVENT, 1352 WMI_TAG_RFKILL_EVENT, 1353 WMI_TAG_DFS_RADAR_EVENT, 1354 WMI_TAG_DFS_PHYERR_FILTER_ENA_CMD, 1355 WMI_TAG_DFS_PHYERR_FILTER_DIS_CMD, 1356 WMI_TAG_BATCH_SCAN_RESULT_SCAN_LIST, 1357 WMI_TAG_BATCH_SCAN_RESULT_NETWORK_INFO, 1358 WMI_TAG_BATCH_SCAN_ENABLE_CMD, 1359 WMI_TAG_BATCH_SCAN_DISABLE_CMD, 1360 WMI_TAG_BATCH_SCAN_TRIGGER_RESULT_CMD, 1361 WMI_TAG_BATCH_SCAN_ENABLED_EVENT, 1362 WMI_TAG_BATCH_SCAN_RESULT_EVENT, 1363 WMI_TAG_VDEV_PLMREQ_START_CMD, 1364 WMI_TAG_VDEV_PLMREQ_STOP_CMD, 1365 WMI_TAG_THERMAL_MGMT_CMD, 1366 WMI_TAG_THERMAL_MGMT_EVENT, 1367 WMI_TAG_PEER_INFO_REQ_CMD, 1368 WMI_TAG_PEER_INFO_EVENT, 1369 WMI_TAG_PEER_INFO, 1370 WMI_TAG_PEER_TX_FAIL_CNT_THR_EVENT, 1371 WMI_TAG_RMC_SET_MODE_CMD, 1372 WMI_TAG_RMC_SET_ACTION_PERIOD_CMD, 1373 WMI_TAG_RMC_CONFIG_CMD, 1374 WMI_TAG_MHF_OFFLOAD_SET_MODE_CMD, 1375 WMI_TAG_MHF_OFFLOAD_PLUMB_ROUTING_TABLE_CMD, 1376 WMI_TAG_ADD_PROACTIVE_ARP_RSP_PATTERN_CMD, 1377 WMI_TAG_DEL_PROACTIVE_ARP_RSP_PATTERN_CMD, 1378 WMI_TAG_NAN_CMD_PARAM, 1379 WMI_TAG_NAN_EVENT_HDR, 1380 WMI_TAG_PDEV_L1SS_TRACK_EVENT, 1381 WMI_TAG_DIAG_DATA_CONTAINER_EVENT, 1382 WMI_TAG_MODEM_POWER_STATE_CMD_PARAM, 1383 WMI_TAG_PEER_GET_ESTIMATED_LINKSPEED_CMD, 1384 WMI_TAG_PEER_ESTIMATED_LINKSPEED_EVENT, 1385 WMI_TAG_AGGR_STATE_TRIG_EVENT, 1386 WMI_TAG_MHF_OFFLOAD_ROUTING_TABLE_ENTRY, 1387 WMI_TAG_ROAM_SCAN_CMD, 1388 WMI_TAG_REQ_STATS_EXT_CMD, 1389 WMI_TAG_STATS_EXT_EVENT, 1390 WMI_TAG_OBSS_SCAN_ENABLE_CMD, 1391 WMI_TAG_OBSS_SCAN_DISABLE_CMD, 1392 WMI_TAG_OFFLOAD_PRB_RSP_TX_STATUS_EVENT, 1393 WMI_TAG_PDEV_SET_LED_CONFIG_CMD, 1394 WMI_TAG_HOST_AUTO_SHUTDOWN_CFG_CMD, 1395 WMI_TAG_HOST_AUTO_SHUTDOWN_EVENT, 1396 WMI_TAG_UPDATE_WHAL_MIB_STATS_EVENT, 1397 WMI_TAG_CHAN_AVOID_UPDATE_CMD_PARAM, 1398 WMI_TAG_WOW_IOAC_PKT_PATTERN_T, 1399 WMI_TAG_WOW_IOAC_TMR_PATTERN_T, 1400 WMI_TAG_WOW_IOAC_ADD_KEEPALIVE_CMD, 1401 WMI_TAG_WOW_IOAC_DEL_KEEPALIVE_CMD, 1402 WMI_TAG_WOW_IOAC_KEEPALIVE_T, 1403 WMI_TAG_WOW_IOAC_ADD_PATTERN_CMD, 1404 WMI_TAG_WOW_IOAC_DEL_PATTERN_CMD, 1405 WMI_TAG_START_LINK_STATS_CMD, 1406 WMI_TAG_CLEAR_LINK_STATS_CMD, 1407 WMI_TAG_REQUEST_LINK_STATS_CMD, 1408 WMI_TAG_IFACE_LINK_STATS_EVENT, 1409 WMI_TAG_RADIO_LINK_STATS_EVENT, 1410 WMI_TAG_PEER_STATS_EVENT, 1411 WMI_TAG_CHANNEL_STATS, 1412 WMI_TAG_RADIO_LINK_STATS, 1413 WMI_TAG_RATE_STATS, 1414 WMI_TAG_PEER_LINK_STATS, 1415 WMI_TAG_WMM_AC_STATS, 1416 WMI_TAG_IFACE_LINK_STATS, 1417 WMI_TAG_LPI_MGMT_SNOOPING_CONFIG_CMD, 1418 WMI_TAG_LPI_START_SCAN_CMD, 1419 WMI_TAG_LPI_STOP_SCAN_CMD, 1420 WMI_TAG_LPI_RESULT_EVENT, 1421 WMI_TAG_PEER_STATE_EVENT, 1422 WMI_TAG_EXTSCAN_BUCKET_CMD, 1423 WMI_TAG_EXTSCAN_BUCKET_CHANNEL_EVENT, 1424 WMI_TAG_EXTSCAN_START_CMD, 1425 WMI_TAG_EXTSCAN_STOP_CMD, 1426 WMI_TAG_EXTSCAN_CONFIGURE_WLAN_CHANGE_MONITOR_CMD, 1427 WMI_TAG_EXTSCAN_WLAN_CHANGE_BSSID_PARAM_CMD, 1428 WMI_TAG_EXTSCAN_CONFIGURE_HOTLIST_MONITOR_CMD, 1429 WMI_TAG_EXTSCAN_GET_CACHED_RESULTS_CMD, 1430 WMI_TAG_EXTSCAN_GET_WLAN_CHANGE_RESULTS_CMD, 1431 WMI_TAG_EXTSCAN_SET_CAPABILITIES_CMD, 1432 WMI_TAG_EXTSCAN_GET_CAPABILITIES_CMD, 1433 WMI_TAG_EXTSCAN_OPERATION_EVENT, 1434 WMI_TAG_EXTSCAN_START_STOP_EVENT, 1435 WMI_TAG_EXTSCAN_TABLE_USAGE_EVENT, 1436 WMI_TAG_EXTSCAN_WLAN_DESCRIPTOR_EVENT, 1437 WMI_TAG_EXTSCAN_RSSI_INFO_EVENT, 1438 WMI_TAG_EXTSCAN_CACHED_RESULTS_EVENT, 1439 WMI_TAG_EXTSCAN_WLAN_CHANGE_RESULTS_EVENT, 1440 WMI_TAG_EXTSCAN_WLAN_CHANGE_RESULT_BSSID_EVENT, 1441 WMI_TAG_EXTSCAN_HOTLIST_MATCH_EVENT, 1442 WMI_TAG_EXTSCAN_CAPABILITIES_EVENT, 1443 WMI_TAG_EXTSCAN_CACHE_CAPABILITIES_EVENT, 1444 WMI_TAG_EXTSCAN_WLAN_CHANGE_MONITOR_CAPABILITIES_EVENT, 1445 WMI_TAG_EXTSCAN_HOTLIST_MONITOR_CAPABILITIES_EVENT, 1446 WMI_TAG_D0_WOW_ENABLE_DISABLE_CMD, 1447 WMI_TAG_D0_WOW_DISABLE_ACK_EVENT, 1448 WMI_TAG_UNIT_TEST_CMD, 1449 WMI_TAG_ROAM_OFFLOAD_TLV_PARAM, 1450 WMI_TAG_ROAM_11I_OFFLOAD_TLV_PARAM, 1451 WMI_TAG_ROAM_11R_OFFLOAD_TLV_PARAM, 1452 WMI_TAG_ROAM_ESE_OFFLOAD_TLV_PARAM, 1453 WMI_TAG_ROAM_SYNCH_EVENT, 1454 WMI_TAG_ROAM_SYNCH_COMPLETE, 1455 WMI_TAG_EXTWOW_ENABLE_CMD, 1456 WMI_TAG_EXTWOW_SET_APP_TYPE1_PARAMS_CMD, 1457 WMI_TAG_EXTWOW_SET_APP_TYPE2_PARAMS_CMD, 1458 WMI_TAG_LPI_STATUS_EVENT, 1459 WMI_TAG_LPI_HANDOFF_EVENT, 1460 WMI_TAG_VDEV_RATE_STATS_EVENT, 1461 WMI_TAG_VDEV_RATE_HT_INFO, 1462 WMI_TAG_RIC_REQUEST, 1463 WMI_TAG_PDEV_GET_TEMPERATURE_CMD, 1464 WMI_TAG_PDEV_TEMPERATURE_EVENT, 1465 WMI_TAG_SET_DHCP_SERVER_OFFLOAD_CMD, 1466 WMI_TAG_TPC_CHAINMASK_CONFIG_CMD, 1467 WMI_TAG_RIC_TSPEC, 1468 WMI_TAG_TPC_CHAINMASK_CONFIG, 1469 WMI_TAG_IPA_OFFLOAD_ENABLE_DISABLE_CMD, 1470 WMI_TAG_SCAN_PROB_REQ_OUI_CMD, 1471 WMI_TAG_KEY_MATERIAL, 1472 WMI_TAG_TDLS_SET_OFFCHAN_MODE_CMD, 1473 WMI_TAG_SET_LED_FLASHING_CMD, 1474 WMI_TAG_MDNS_OFFLOAD_CMD, 1475 WMI_TAG_MDNS_SET_FQDN_CMD, 1476 WMI_TAG_MDNS_SET_RESP_CMD, 1477 WMI_TAG_MDNS_GET_STATS_CMD, 1478 WMI_TAG_MDNS_STATS_EVENT, 1479 WMI_TAG_ROAM_INVOKE_CMD, 1480 WMI_TAG_PDEV_RESUME_EVENT, 1481 WMI_TAG_PDEV_SET_ANTENNA_DIVERSITY_CMD, 1482 WMI_TAG_SAP_OFL_ENABLE_CMD, 1483 WMI_TAG_SAP_OFL_ADD_STA_EVENT, 1484 WMI_TAG_SAP_OFL_DEL_STA_EVENT, 1485 WMI_TAG_APFIND_CMD_PARAM, 1486 WMI_TAG_APFIND_EVENT_HDR, 1487 WMI_TAG_OCB_SET_SCHED_CMD, 1488 WMI_TAG_OCB_SET_SCHED_EVENT, 1489 WMI_TAG_OCB_SET_CONFIG_CMD, 1490 WMI_TAG_OCB_SET_CONFIG_RESP_EVENT, 1491 WMI_TAG_OCB_SET_UTC_TIME_CMD, 1492 WMI_TAG_OCB_START_TIMING_ADVERT_CMD, 1493 WMI_TAG_OCB_STOP_TIMING_ADVERT_CMD, 1494 WMI_TAG_OCB_GET_TSF_TIMER_CMD, 1495 WMI_TAG_OCB_GET_TSF_TIMER_RESP_EVENT, 1496 WMI_TAG_DCC_GET_STATS_CMD, 1497 WMI_TAG_DCC_CHANNEL_STATS_REQUEST, 1498 WMI_TAG_DCC_GET_STATS_RESP_EVENT, 1499 WMI_TAG_DCC_CLEAR_STATS_CMD, 1500 WMI_TAG_DCC_UPDATE_NDL_CMD, 1501 WMI_TAG_DCC_UPDATE_NDL_RESP_EVENT, 1502 WMI_TAG_DCC_STATS_EVENT, 1503 WMI_TAG_OCB_CHANNEL, 1504 WMI_TAG_OCB_SCHEDULE_ELEMENT, 1505 WMI_TAG_DCC_NDL_STATS_PER_CHANNEL, 1506 WMI_TAG_DCC_NDL_CHAN, 1507 WMI_TAG_QOS_PARAMETER, 1508 WMI_TAG_DCC_NDL_ACTIVE_STATE_CONFIG, 1509 WMI_TAG_ROAM_SCAN_EXTENDED_THRESHOLD_PARAM, 1510 WMI_TAG_ROAM_FILTER, 1511 WMI_TAG_PASSPOINT_CONFIG_CMD, 1512 WMI_TAG_PASSPOINT_EVENT_HDR, 1513 WMI_TAG_EXTSCAN_CONFIGURE_HOTLIST_SSID_MONITOR_CMD, 1514 WMI_TAG_EXTSCAN_HOTLIST_SSID_MATCH_EVENT, 1515 WMI_TAG_VDEV_TSF_TSTAMP_ACTION_CMD, 1516 WMI_TAG_VDEV_TSF_REPORT_EVENT, 1517 WMI_TAG_GET_FW_MEM_DUMP, 1518 WMI_TAG_UPDATE_FW_MEM_DUMP, 1519 WMI_TAG_FW_MEM_DUMP_PARAMS, 1520 WMI_TAG_DEBUG_MESG_FLUSH, 1521 WMI_TAG_DEBUG_MESG_FLUSH_COMPLETE, 1522 WMI_TAG_PEER_SET_RATE_REPORT_CONDITION, 1523 WMI_TAG_ROAM_SUBNET_CHANGE_CONFIG, 1524 WMI_TAG_VDEV_SET_IE_CMD, 1525 WMI_TAG_RSSI_BREACH_MONITOR_CONFIG, 1526 WMI_TAG_RSSI_BREACH_EVENT, 1527 WMI_TAG_WOW_EVENT_INITIAL_WAKEUP, 1528 WMI_TAG_SOC_SET_PCL_CMD, 1529 WMI_TAG_SOC_SET_HW_MODE_CMD, 1530 WMI_TAG_SOC_SET_HW_MODE_RESPONSE_EVENT, 1531 WMI_TAG_SOC_HW_MODE_TRANSITION_EVENT, 1532 WMI_TAG_VDEV_TXRX_STREAMS, 1533 WMI_TAG_SOC_SET_HW_MODE_RESPONSE_VDEV_MAC_ENTRY, 1534 WMI_TAG_SOC_SET_DUAL_MAC_CONFIG_CMD, 1535 WMI_TAG_SOC_SET_DUAL_MAC_CONFIG_RESPONSE_EVENT, 1536 WMI_TAG_WOW_IOAC_SOCK_PATTERN_T, 1537 WMI_TAG_WOW_ENABLE_ICMPV6_NA_FLT_CMD, 1538 WMI_TAG_DIAG_EVENT_LOG_CONFIG, 1539 WMI_TAG_DIAG_EVENT_LOG_SUPPORTED_EVENT_FIXED_PARAMS, 1540 WMI_TAG_PACKET_FILTER_CONFIG, 1541 WMI_TAG_PACKET_FILTER_ENABLE, 1542 WMI_TAG_SAP_SET_BLACKLIST_PARAM_CMD, 1543 WMI_TAG_MGMT_TX_SEND_CMD, 1544 WMI_TAG_MGMT_TX_COMPL_EVENT, 1545 WMI_TAG_SOC_SET_ANTENNA_MODE_CMD, 1546 WMI_TAG_WOW_UDP_SVC_OFLD_CMD, 1547 WMI_TAG_LRO_INFO_CMD, 1548 WMI_TAG_ROAM_EARLYSTOP_RSSI_THRES_PARAM, 1549 WMI_TAG_SERVICE_READY_EXT_EVENT, 1550 WMI_TAG_MAWC_SENSOR_REPORT_IND_CMD, 1551 WMI_TAG_MAWC_ENABLE_SENSOR_EVENT, 1552 WMI_TAG_ROAM_CONFIGURE_MAWC_CMD, 1553 WMI_TAG_NLO_CONFIGURE_MAWC_CMD, 1554 WMI_TAG_EXTSCAN_CONFIGURE_MAWC_CMD, 1555 WMI_TAG_PEER_ASSOC_CONF_EVENT, 1556 WMI_TAG_WOW_HOSTWAKEUP_GPIO_PIN_PATTERN_CONFIG_CMD, 1557 WMI_TAG_AP_PS_EGAP_PARAM_CMD, 1558 WMI_TAG_AP_PS_EGAP_INFO_EVENT, 1559 WMI_TAG_PMF_OFFLOAD_SET_SA_QUERY_CMD, 1560 WMI_TAG_TRANSFER_DATA_TO_FLASH_CMD, 1561 WMI_TAG_TRANSFER_DATA_TO_FLASH_COMPLETE_EVENT, 1562 WMI_TAG_SCPC_EVENT, 1563 WMI_TAG_AP_PS_EGAP_INFO_CHAINMASK_LIST, 1564 WMI_TAG_STA_SMPS_FORCE_MODE_COMPLETE_EVENT, 1565 WMI_TAG_BPF_GET_CAPABILITY_CMD, 1566 WMI_TAG_BPF_CAPABILITY_INFO_EVT, 1567 WMI_TAG_BPF_GET_VDEV_STATS_CMD, 1568 WMI_TAG_BPF_VDEV_STATS_INFO_EVT, 1569 WMI_TAG_BPF_SET_VDEV_INSTRUCTIONS_CMD, 1570 WMI_TAG_BPF_DEL_VDEV_INSTRUCTIONS_CMD, 1571 WMI_TAG_VDEV_DELETE_RESP_EVENT, 1572 WMI_TAG_PEER_DELETE_RESP_EVENT, 1573 WMI_TAG_ROAM_DENSE_THRES_PARAM, 1574 WMI_TAG_ENLO_CANDIDATE_SCORE_PARAM, 1575 WMI_TAG_PEER_UPDATE_WDS_ENTRY_CMD, 1576 WMI_TAG_VDEV_CONFIG_RATEMASK, 1577 WMI_TAG_PDEV_FIPS_CMD, 1578 WMI_TAG_PDEV_SMART_ANT_ENABLE_CMD, 1579 WMI_TAG_PDEV_SMART_ANT_SET_RX_ANTENNA_CMD, 1580 WMI_TAG_PEER_SMART_ANT_SET_TX_ANTENNA_CMD, 1581 WMI_TAG_PEER_SMART_ANT_SET_TRAIN_ANTENNA_CMD, 1582 WMI_TAG_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMD, 1583 WMI_TAG_PDEV_SET_ANT_SWITCH_TBL_CMD, 1584 WMI_TAG_PDEV_SET_CTL_TABLE_CMD, 1585 WMI_TAG_PDEV_SET_MIMOGAIN_TABLE_CMD, 1586 WMI_TAG_FWTEST_SET_PARAM_CMD, 1587 WMI_TAG_PEER_ATF_REQUEST, 1588 WMI_TAG_VDEV_ATF_REQUEST, 1589 WMI_TAG_PDEV_GET_ANI_CCK_CONFIG_CMD, 1590 WMI_TAG_PDEV_GET_ANI_OFDM_CONFIG_CMD, 1591 WMI_TAG_INST_RSSI_STATS_RESP, 1592 WMI_TAG_MED_UTIL_REPORT_EVENT, 1593 WMI_TAG_PEER_STA_PS_STATECHANGE_EVENT, 1594 WMI_TAG_WDS_ADDR_EVENT, 1595 WMI_TAG_PEER_RATECODE_LIST_EVENT, 1596 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_EVENT, 1597 WMI_TAG_PDEV_TPC_EVENT, 1598 WMI_TAG_ANI_OFDM_EVENT, 1599 WMI_TAG_ANI_CCK_EVENT, 1600 WMI_TAG_PDEV_CHANNEL_HOPPING_EVENT, 1601 WMI_TAG_PDEV_FIPS_EVENT, 1602 WMI_TAG_ATF_PEER_INFO, 1603 WMI_TAG_PDEV_GET_TPC_CMD, 1604 WMI_TAG_VDEV_FILTER_NRP_CONFIG_CMD, 1605 WMI_TAG_QBOOST_CFG_CMD, 1606 WMI_TAG_PDEV_SMART_ANT_GPIO_HANDLE, 1607 WMI_TAG_PEER_SMART_ANT_SET_TX_ANTENNA_SERIES, 1608 WMI_TAG_PEER_SMART_ANT_SET_TRAIN_ANTENNA_PARAM, 1609 WMI_TAG_PDEV_SET_ANT_CTRL_CHAIN, 1610 WMI_TAG_PEER_CCK_OFDM_RATE_INFO, 1611 WMI_TAG_PEER_MCS_RATE_INFO, 1612 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_NFDBR, 1613 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_NFDBM, 1614 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_FREQNUM, 1615 WMI_TAG_MU_REPORT_TOTAL_MU, 1616 WMI_TAG_VDEV_SET_DSCP_TID_MAP_CMD, 1617 WMI_TAG_ROAM_SET_MBO, 1618 WMI_TAG_MIB_STATS_ENABLE_CMD, 1619 WMI_TAG_NAN_DISC_IFACE_CREATED_EVENT, 1620 WMI_TAG_NAN_DISC_IFACE_DELETED_EVENT, 1621 WMI_TAG_NAN_STARTED_CLUSTER_EVENT, 1622 WMI_TAG_NAN_JOINED_CLUSTER_EVENT, 1623 WMI_TAG_NDI_GET_CAP_REQ, 1624 WMI_TAG_NDP_INITIATOR_REQ, 1625 WMI_TAG_NDP_RESPONDER_REQ, 1626 WMI_TAG_NDP_END_REQ, 1627 WMI_TAG_NDI_CAP_RSP_EVENT, 1628 WMI_TAG_NDP_INITIATOR_RSP_EVENT, 1629 WMI_TAG_NDP_RESPONDER_RSP_EVENT, 1630 WMI_TAG_NDP_END_RSP_EVENT, 1631 WMI_TAG_NDP_INDICATION_EVENT, 1632 WMI_TAG_NDP_CONFIRM_EVENT, 1633 WMI_TAG_NDP_END_INDICATION_EVENT, 1634 WMI_TAG_VDEV_SET_QUIET_CMD, 1635 WMI_TAG_PDEV_SET_PCL_CMD, 1636 WMI_TAG_PDEV_SET_HW_MODE_CMD, 1637 WMI_TAG_PDEV_SET_MAC_CONFIG_CMD, 1638 WMI_TAG_PDEV_SET_ANTENNA_MODE_CMD, 1639 WMI_TAG_PDEV_SET_HW_MODE_RESPONSE_EVENT, 1640 WMI_TAG_PDEV_HW_MODE_TRANSITION_EVENT, 1641 WMI_TAG_PDEV_SET_HW_MODE_RESPONSE_VDEV_MAC_ENTRY, 1642 WMI_TAG_PDEV_SET_MAC_CONFIG_RESPONSE_EVENT, 1643 WMI_TAG_COEX_CONFIG_CMD, 1644 WMI_TAG_CONFIG_ENHANCED_MCAST_FILTER, 1645 WMI_TAG_CHAN_AVOID_RPT_ALLOW_CMD, 1646 WMI_TAG_SET_PERIODIC_CHANNEL_STATS_CONFIG, 1647 WMI_TAG_VDEV_SET_CUSTOM_AGGR_SIZE_CMD, 1648 WMI_TAG_PDEV_WAL_POWER_DEBUG_CMD, 1649 WMI_TAG_MAC_PHY_CAPABILITIES, 1650 WMI_TAG_HW_MODE_CAPABILITIES, 1651 WMI_TAG_SOC_MAC_PHY_HW_MODE_CAPS, 1652 WMI_TAG_HAL_REG_CAPABILITIES_EXT, 1653 WMI_TAG_SOC_HAL_REG_CAPABILITIES, 1654 WMI_TAG_VDEV_WISA_CMD, 1655 WMI_TAG_TX_POWER_LEVEL_STATS_EVT, 1656 WMI_TAG_SCAN_ADAPTIVE_DWELL_PARAMETERS_TLV, 1657 WMI_TAG_SCAN_ADAPTIVE_DWELL_CONFIG, 1658 WMI_TAG_WOW_SET_ACTION_WAKE_UP_CMD, 1659 WMI_TAG_NDP_END_RSP_PER_NDI, 1660 WMI_TAG_PEER_BWF_REQUEST, 1661 WMI_TAG_BWF_PEER_INFO, 1662 WMI_TAG_DBGLOG_TIME_STAMP_SYNC_CMD, 1663 WMI_TAG_RMC_SET_LEADER_CMD, 1664 WMI_TAG_RMC_MANUAL_LEADER_EVENT, 1665 WMI_TAG_PER_CHAIN_RSSI_STATS, 1666 WMI_TAG_RSSI_STATS, 1667 WMI_TAG_P2P_LO_START_CMD, 1668 WMI_TAG_P2P_LO_STOP_CMD, 1669 WMI_TAG_P2P_LO_STOPPED_EVENT, 1670 WMI_TAG_REORDER_QUEUE_SETUP_CMD, 1671 WMI_TAG_REORDER_QUEUE_REMOVE_CMD, 1672 WMI_TAG_SET_MULTIPLE_MCAST_FILTER_CMD, 1673 WMI_TAG_MGMT_TX_COMPL_BUNDLE_EVENT, 1674 WMI_TAG_READ_DATA_FROM_FLASH_CMD, 1675 WMI_TAG_READ_DATA_FROM_FLASH_EVENT, 1676 WMI_TAG_PDEV_SET_REORDER_TIMEOUT_VAL_CMD, 1677 WMI_TAG_PEER_SET_RX_BLOCKSIZE_CMD, 1678 WMI_TAG_PDEV_SET_WAKEUP_CONFIG_CMDID, 1679 WMI_TAG_TLV_BUF_LEN_PARAM, 1680 WMI_TAG_SERVICE_AVAILABLE_EVENT, 1681 WMI_TAG_PEER_ANTDIV_INFO_REQ_CMD, 1682 WMI_TAG_PEER_ANTDIV_INFO_EVENT, 1683 WMI_TAG_PEER_ANTDIV_INFO, 1684 WMI_TAG_PDEV_GET_ANTDIV_STATUS_CMD, 1685 WMI_TAG_PDEV_ANTDIV_STATUS_EVENT, 1686 WMI_TAG_MNT_FILTER_CMD, 1687 WMI_TAG_GET_CHIP_POWER_STATS_CMD, 1688 WMI_TAG_PDEV_CHIP_POWER_STATS_EVENT, 1689 WMI_TAG_COEX_GET_ANTENNA_ISOLATION_CMD, 1690 WMI_TAG_COEX_REPORT_ISOLATION_EVENT, 1691 WMI_TAG_CHAN_CCA_STATS, 1692 WMI_TAG_PEER_SIGNAL_STATS, 1693 WMI_TAG_TX_STATS, 1694 WMI_TAG_PEER_AC_TX_STATS, 1695 WMI_TAG_RX_STATS, 1696 WMI_TAG_PEER_AC_RX_STATS, 1697 WMI_TAG_REPORT_STATS_EVENT, 1698 WMI_TAG_CHAN_CCA_STATS_THRESH, 1699 WMI_TAG_PEER_SIGNAL_STATS_THRESH, 1700 WMI_TAG_TX_STATS_THRESH, 1701 WMI_TAG_RX_STATS_THRESH, 1702 WMI_TAG_PDEV_SET_STATS_THRESHOLD_CMD, 1703 WMI_TAG_REQUEST_WLAN_STATS_CMD, 1704 WMI_TAG_RX_AGGR_FAILURE_EVENT, 1705 WMI_TAG_RX_AGGR_FAILURE_INFO, 1706 WMI_TAG_VDEV_ENCRYPT_DECRYPT_DATA_REQ_CMD, 1707 WMI_TAG_VDEV_ENCRYPT_DECRYPT_DATA_RESP_EVENT, 1708 WMI_TAG_PDEV_BAND_TO_MAC, 1709 WMI_TAG_TBTT_OFFSET_INFO, 1710 WMI_TAG_TBTT_OFFSET_EXT_EVENT, 1711 WMI_TAG_SAR_LIMITS_CMD, 1712 WMI_TAG_SAR_LIMIT_CMD_ROW, 1713 WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMD, 1714 WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_DISABLE_CMD, 1715 WMI_TAG_VDEV_ADFS_CH_CFG_CMD, 1716 WMI_TAG_VDEV_ADFS_OCAC_ABORT_CMD, 1717 WMI_TAG_PDEV_DFS_RADAR_DETECTION_EVENT, 1718 WMI_TAG_VDEV_ADFS_OCAC_COMPLETE_EVENT, 1719 WMI_TAG_VDEV_DFS_CAC_COMPLETE_EVENT, 1720 WMI_TAG_VENDOR_OUI, 1721 WMI_TAG_REQUEST_RCPI_CMD, 1722 WMI_TAG_UPDATE_RCPI_EVENT, 1723 WMI_TAG_REQUEST_PEER_STATS_INFO_CMD, 1724 WMI_TAG_PEER_STATS_INFO, 1725 WMI_TAG_PEER_STATS_INFO_EVENT, 1726 WMI_TAG_PKGID_EVENT, 1727 WMI_TAG_CONNECTED_NLO_RSSI_PARAMS, 1728 WMI_TAG_SET_CURRENT_COUNTRY_CMD, 1729 WMI_TAG_REGULATORY_RULE_STRUCT, 1730 WMI_TAG_REG_CHAN_LIST_CC_EVENT, 1731 WMI_TAG_11D_SCAN_START_CMD, 1732 WMI_TAG_11D_SCAN_STOP_CMD, 1733 WMI_TAG_11D_NEW_COUNTRY_EVENT, 1734 WMI_TAG_REQUEST_RADIO_CHAN_STATS_CMD, 1735 WMI_TAG_RADIO_CHAN_STATS, 1736 WMI_TAG_RADIO_CHAN_STATS_EVENT, 1737 WMI_TAG_ROAM_PER_CONFIG, 1738 WMI_TAG_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_CMD, 1739 WMI_TAG_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_STATUS_EVENT, 1740 WMI_TAG_BPF_SET_VDEV_ACTIVE_MODE_CMD, 1741 WMI_TAG_HW_DATA_FILTER_CMD, 1742 WMI_TAG_CONNECTED_NLO_BSS_BAND_RSSI_PREF, 1743 WMI_TAG_PEER_OPER_MODE_CHANGE_EVENT, 1744 WMI_TAG_CHIP_POWER_SAVE_FAILURE_DETECTED, 1745 WMI_TAG_PDEV_MULTIPLE_VDEV_RESTART_REQUEST_CMD, 1746 WMI_TAG_PDEV_CSA_SWITCH_COUNT_STATUS_EVENT, 1747 WMI_TAG_PDEV_UPDATE_PKT_ROUTING_CMD, 1748 WMI_TAG_PDEV_CHECK_CAL_VERSION_CMD, 1749 WMI_TAG_PDEV_CHECK_CAL_VERSION_EVENT, 1750 WMI_TAG_PDEV_SET_DIVERSITY_GAIN_CMD, 1751 WMI_TAG_MAC_PHY_CHAINMASK_COMBO, 1752 WMI_TAG_MAC_PHY_CHAINMASK_CAPABILITY, 1753 WMI_TAG_VDEV_SET_ARP_STATS_CMD, 1754 WMI_TAG_VDEV_GET_ARP_STATS_CMD, 1755 WMI_TAG_VDEV_GET_ARP_STATS_EVENT, 1756 WMI_TAG_IFACE_OFFLOAD_STATS, 1757 WMI_TAG_REQUEST_STATS_CMD_SUB_STRUCT_PARAM, 1758 WMI_TAG_RSSI_CTL_EXT, 1759 WMI_TAG_SINGLE_PHYERR_EXT_RX_HDR, 1760 WMI_TAG_COEX_BT_ACTIVITY_EVENT, 1761 WMI_TAG_VDEV_GET_TX_POWER_CMD, 1762 WMI_TAG_VDEV_TX_POWER_EVENT, 1763 WMI_TAG_OFFCHAN_DATA_TX_COMPL_EVENT, 1764 WMI_TAG_OFFCHAN_DATA_TX_SEND_CMD, 1765 WMI_TAG_TX_SEND_PARAMS, 1766 WMI_TAG_HE_RATE_SET, 1767 WMI_TAG_CONGESTION_STATS, 1768 WMI_TAG_SET_INIT_COUNTRY_CMD, 1769 WMI_TAG_SCAN_DBS_DUTY_CYCLE, 1770 WMI_TAG_SCAN_DBS_DUTY_CYCLE_PARAM_TLV, 1771 WMI_TAG_PDEV_DIV_GET_RSSI_ANTID, 1772 WMI_TAG_THERM_THROT_CONFIG_REQUEST, 1773 WMI_TAG_THERM_THROT_LEVEL_CONFIG_INFO, 1774 WMI_TAG_THERM_THROT_STATS_EVENT, 1775 WMI_TAG_THERM_THROT_LEVEL_STATS_INFO, 1776 WMI_TAG_PDEV_DIV_RSSI_ANTID_EVENT, 1777 WMI_TAG_OEM_DMA_RING_CAPABILITIES, 1778 WMI_TAG_OEM_DMA_RING_CFG_REQ, 1779 WMI_TAG_OEM_DMA_RING_CFG_RSP, 1780 WMI_TAG_OEM_INDIRECT_DATA, 1781 WMI_TAG_OEM_DMA_BUF_RELEASE, 1782 WMI_TAG_OEM_DMA_BUF_RELEASE_ENTRY, 1783 WMI_TAG_PDEV_BSS_CHAN_INFO_REQUEST, 1784 WMI_TAG_PDEV_BSS_CHAN_INFO_EVENT, 1785 WMI_TAG_ROAM_LCA_DISALLOW_CONFIG, 1786 WMI_TAG_VDEV_LIMIT_OFFCHAN_CMD, 1787 WMI_TAG_ROAM_RSSI_REJECTION_OCE_CONFIG, 1788 WMI_TAG_UNIT_TEST_EVENT, 1789 WMI_TAG_ROAM_FILS_OFFLOAD, 1790 WMI_TAG_PDEV_UPDATE_PMK_CACHE_CMD, 1791 WMI_TAG_PMK_CACHE, 1792 WMI_TAG_PDEV_UPDATE_FILS_HLP_PKT_CMD, 1793 WMI_TAG_ROAM_FILS_SYNCH, 1794 WMI_TAG_GTK_OFFLOAD_EXTENDED, 1795 WMI_TAG_ROAM_BG_SCAN_ROAMING, 1796 WMI_TAG_OIC_PING_OFFLOAD_PARAMS_CMD, 1797 WMI_TAG_OIC_PING_OFFLOAD_SET_ENABLE_CMD, 1798 WMI_TAG_OIC_PING_HANDOFF_EVENT, 1799 WMI_TAG_DHCP_LEASE_RENEW_OFFLOAD_CMD, 1800 WMI_TAG_DHCP_LEASE_RENEW_EVENT, 1801 WMI_TAG_BTM_CONFIG, 1802 WMI_TAG_DEBUG_MESG_FW_DATA_STALL, 1803 WMI_TAG_WLM_CONFIG_CMD, 1804 WMI_TAG_PDEV_UPDATE_CTLTABLE_REQUEST, 1805 WMI_TAG_PDEV_UPDATE_CTLTABLE_EVENT, 1806 WMI_TAG_ROAM_CND_SCORING_PARAM, 1807 WMI_TAG_PDEV_CONFIG_VENDOR_OUI_ACTION, 1808 WMI_TAG_VENDOR_OUI_EXT, 1809 WMI_TAG_ROAM_SYNCH_FRAME_EVENT, 1810 WMI_TAG_FD_SEND_FROM_HOST_CMD, 1811 WMI_TAG_ENABLE_FILS_CMD, 1812 WMI_TAG_HOST_SWFDA_EVENT, 1813 WMI_TAG_BCN_OFFLOAD_CTRL_CMD, 1814 WMI_TAG_PDEV_SET_AC_TX_QUEUE_OPTIMIZED_CMD, 1815 WMI_TAG_STATS_PERIOD, 1816 WMI_TAG_NDL_SCHEDULE_UPDATE, 1817 WMI_TAG_PEER_TID_MSDUQ_QDEPTH_THRESH_UPDATE_CMD, 1818 WMI_TAG_MSDUQ_QDEPTH_THRESH_UPDATE, 1819 WMI_TAG_PDEV_SET_RX_FILTER_PROMISCUOUS_CMD, 1820 WMI_TAG_SAR2_RESULT_EVENT, 1821 WMI_TAG_SAR_CAPABILITIES, 1822 WMI_TAG_SAP_OBSS_DETECTION_CFG_CMD, 1823 WMI_TAG_SAP_OBSS_DETECTION_INFO_EVT, 1824 WMI_TAG_DMA_RING_CAPABILITIES, 1825 WMI_TAG_DMA_RING_CFG_REQ, 1826 WMI_TAG_DMA_RING_CFG_RSP, 1827 WMI_TAG_DMA_BUF_RELEASE, 1828 WMI_TAG_DMA_BUF_RELEASE_ENTRY, 1829 WMI_TAG_SAR_GET_LIMITS_CMD, 1830 WMI_TAG_SAR_GET_LIMITS_EVENT, 1831 WMI_TAG_SAR_GET_LIMITS_EVENT_ROW, 1832 WMI_TAG_OFFLOAD_11K_REPORT, 1833 WMI_TAG_INVOKE_NEIGHBOR_REPORT, 1834 WMI_TAG_NEIGHBOR_REPORT_OFFLOAD, 1835 WMI_TAG_VDEV_SET_CONNECTIVITY_CHECK_STATS, 1836 WMI_TAG_VDEV_GET_CONNECTIVITY_CHECK_STATS, 1837 WMI_TAG_BPF_SET_VDEV_ENABLE_CMD, 1838 WMI_TAG_BPF_SET_VDEV_WORK_MEMORY_CMD, 1839 WMI_TAG_BPF_GET_VDEV_WORK_MEMORY_CMD, 1840 WMI_TAG_BPF_GET_VDEV_WORK_MEMORY_RESP_EVT, 1841 WMI_TAG_PDEV_GET_NFCAL_POWER, 1842 WMI_TAG_BSS_COLOR_CHANGE_ENABLE, 1843 WMI_TAG_OBSS_COLOR_COLLISION_DET_CONFIG, 1844 WMI_TAG_OBSS_COLOR_COLLISION_EVT, 1845 WMI_TAG_RUNTIME_DPD_RECAL_CMD, 1846 WMI_TAG_TWT_ENABLE_CMD, 1847 WMI_TAG_TWT_DISABLE_CMD, 1848 WMI_TAG_TWT_ADD_DIALOG_CMD, 1849 WMI_TAG_TWT_DEL_DIALOG_CMD, 1850 WMI_TAG_TWT_PAUSE_DIALOG_CMD, 1851 WMI_TAG_TWT_RESUME_DIALOG_CMD, 1852 WMI_TAG_TWT_ENABLE_COMPLETE_EVENT, 1853 WMI_TAG_TWT_DISABLE_COMPLETE_EVENT, 1854 WMI_TAG_TWT_ADD_DIALOG_COMPLETE_EVENT, 1855 WMI_TAG_TWT_DEL_DIALOG_COMPLETE_EVENT, 1856 WMI_TAG_TWT_PAUSE_DIALOG_COMPLETE_EVENT, 1857 WMI_TAG_TWT_RESUME_DIALOG_COMPLETE_EVENT, 1858 WMI_TAG_REQUEST_ROAM_SCAN_STATS_CMD, 1859 WMI_TAG_ROAM_SCAN_STATS_EVENT, 1860 WMI_TAG_PEER_TID_CONFIGURATIONS_CMD, 1861 WMI_TAG_VDEV_SET_CUSTOM_SW_RETRY_TH_CMD, 1862 WMI_TAG_GET_TPC_POWER_CMD, 1863 WMI_TAG_GET_TPC_POWER_EVENT, 1864 WMI_TAG_DMA_BUF_RELEASE_SPECTRAL_META_DATA, 1865 WMI_TAG_MOTION_DET_CONFIG_PARAMS_CMD, 1866 WMI_TAG_MOTION_DET_BASE_LINE_CONFIG_PARAMS_CMD, 1867 WMI_TAG_MOTION_DET_START_STOP_CMD, 1868 WMI_TAG_MOTION_DET_BASE_LINE_START_STOP_CMD, 1869 WMI_TAG_MOTION_DET_EVENT, 1870 WMI_TAG_MOTION_DET_BASE_LINE_EVENT, 1871 WMI_TAG_NDP_TRANSPORT_IP, 1872 WMI_TAG_OBSS_SPATIAL_REUSE_SET_CMD, 1873 WMI_TAG_ESP_ESTIMATE_EVENT, 1874 WMI_TAG_NAN_HOST_CONFIG, 1875 WMI_TAG_SPECTRAL_BIN_SCALING_PARAMS, 1876 WMI_TAG_PEER_CFR_CAPTURE_CMD, 1877 WMI_TAG_PEER_CHAN_WIDTH_SWITCH_CMD, 1878 WMI_TAG_CHAN_WIDTH_PEER_LIST, 1879 WMI_TAG_OBSS_SPATIAL_REUSE_SET_DEF_OBSS_THRESH_CMD, 1880 WMI_TAG_PDEV_HE_TB_ACTION_FRM_CMD, 1881 WMI_TAG_PEER_EXTD2_STATS, 1882 WMI_TAG_HPCS_PULSE_START_CMD, 1883 WMI_TAG_PDEV_CTL_FAILSAFE_CHECK_EVENT, 1884 WMI_TAG_VDEV_CHAINMASK_CONFIG_CMD, 1885 WMI_TAG_VDEV_BCN_OFFLOAD_QUIET_CONFIG_CMD, 1886 WMI_TAG_NAN_EVENT_INFO, 1887 WMI_TAG_NDP_CHANNEL_INFO, 1888 WMI_TAG_NDP_CMD, 1889 WMI_TAG_NDP_EVENT, 1890 WMI_TAG_PDEV_PEER_PKTLOG_FILTER_CMD = 0x301, 1891 WMI_TAG_PDEV_PEER_PKTLOG_FILTER_INFO, 1892 WMI_TAG_PEER_CFR_CAPTURE_EVENT = 0x317, 1893 WMI_TAG_CFR_CAPTURE_PHASE_PARAM = 0x33b, 1894 WMI_TAG_FILS_DISCOVERY_TMPL_CMD = 0x344, 1895 WMI_TAG_PDEV_SRG_BSS_COLOR_BITMAP_CMD = 0x37b, 1896 WMI_TAG_PDEV_SRG_PARTIAL_BSSID_BITMAP_CMD, 1897 WMI_TAG_PDEV_SRG_OBSS_COLOR_ENABLE_BITMAP_CMD = 0x381, 1898 WMI_TAG_PDEV_SRG_OBSS_BSSID_ENABLE_BITMAP_CMD, 1899 WMI_TAG_PDEV_NON_SRG_OBSS_COLOR_ENABLE_BITMAP_CMD, 1900 WMI_TAG_PDEV_NON_SRG_OBSS_BSSID_ENABLE_BITMAP_CMD, 1901 WMI_TAG_REGULATORY_RULE_EXT_STRUCT = 0x3A9, 1902 WMI_TAG_REG_CHAN_LIST_CC_EXT_EVENT, 1903 WMI_TAG_VDEV_SET_TPC_POWER_CMD = 0x3B5, 1904 WMI_TAG_VDEV_CH_POWER_INFO, 1905 WMI_TAG_PDEV_SET_BIOS_SAR_TABLE_CMD = 0x3D8, 1906 WMI_TAG_PDEV_SET_BIOS_GEO_TABLE_CMD, 1907 WMI_TAG_MAX 1908 }; 1909 1910 enum wmi_tlv_service { 1911 WMI_TLV_SERVICE_BEACON_OFFLOAD = 0, 1912 WMI_TLV_SERVICE_SCAN_OFFLOAD = 1, 1913 WMI_TLV_SERVICE_ROAM_SCAN_OFFLOAD = 2, 1914 WMI_TLV_SERVICE_BCN_MISS_OFFLOAD = 3, 1915 WMI_TLV_SERVICE_STA_PWRSAVE = 4, 1916 WMI_TLV_SERVICE_STA_ADVANCED_PWRSAVE = 5, 1917 WMI_TLV_SERVICE_AP_UAPSD = 6, 1918 WMI_TLV_SERVICE_AP_DFS = 7, 1919 WMI_TLV_SERVICE_11AC = 8, 1920 WMI_TLV_SERVICE_BLOCKACK = 9, 1921 WMI_TLV_SERVICE_PHYERR = 10, 1922 WMI_TLV_SERVICE_BCN_FILTER = 11, 1923 WMI_TLV_SERVICE_RTT = 12, 1924 WMI_TLV_SERVICE_WOW = 13, 1925 WMI_TLV_SERVICE_RATECTRL_CACHE = 14, 1926 WMI_TLV_SERVICE_IRAM_TIDS = 15, 1927 WMI_TLV_SERVICE_ARPNS_OFFLOAD = 16, 1928 WMI_TLV_SERVICE_NLO = 17, 1929 WMI_TLV_SERVICE_GTK_OFFLOAD = 18, 1930 WMI_TLV_SERVICE_SCAN_SCH = 19, 1931 WMI_TLV_SERVICE_CSA_OFFLOAD = 20, 1932 WMI_TLV_SERVICE_CHATTER = 21, 1933 WMI_TLV_SERVICE_COEX_FREQAVOID = 22, 1934 WMI_TLV_SERVICE_PACKET_POWER_SAVE = 23, 1935 WMI_TLV_SERVICE_FORCE_FW_HANG = 24, 1936 WMI_TLV_SERVICE_GPIO = 25, 1937 WMI_TLV_SERVICE_STA_DTIM_PS_MODULATED_DTIM = 26, 1938 WMI_STA_UAPSD_BASIC_AUTO_TRIG = 27, 1939 WMI_STA_UAPSD_VAR_AUTO_TRIG = 28, 1940 WMI_TLV_SERVICE_STA_KEEP_ALIVE = 29, 1941 WMI_TLV_SERVICE_TX_ENCAP = 30, 1942 WMI_TLV_SERVICE_AP_PS_DETECT_OUT_OF_SYNC = 31, 1943 WMI_TLV_SERVICE_EARLY_RX = 32, 1944 WMI_TLV_SERVICE_STA_SMPS = 33, 1945 WMI_TLV_SERVICE_FWTEST = 34, 1946 WMI_TLV_SERVICE_STA_WMMAC = 35, 1947 WMI_TLV_SERVICE_TDLS = 36, 1948 WMI_TLV_SERVICE_BURST = 37, 1949 WMI_TLV_SERVICE_MCC_BCN_INTERVAL_CHANGE = 38, 1950 WMI_TLV_SERVICE_ADAPTIVE_OCS = 39, 1951 WMI_TLV_SERVICE_BA_SSN_SUPPORT = 40, 1952 WMI_TLV_SERVICE_FILTER_IPSEC_NATKEEPALIVE = 41, 1953 WMI_TLV_SERVICE_WLAN_HB = 42, 1954 WMI_TLV_SERVICE_LTE_ANT_SHARE_SUPPORT = 43, 1955 WMI_TLV_SERVICE_BATCH_SCAN = 44, 1956 WMI_TLV_SERVICE_QPOWER = 45, 1957 WMI_TLV_SERVICE_PLMREQ = 46, 1958 WMI_TLV_SERVICE_THERMAL_MGMT = 47, 1959 WMI_TLV_SERVICE_RMC = 48, 1960 WMI_TLV_SERVICE_MHF_OFFLOAD = 49, 1961 WMI_TLV_SERVICE_COEX_SAR = 50, 1962 WMI_TLV_SERVICE_BCN_TXRATE_OVERRIDE = 51, 1963 WMI_TLV_SERVICE_NAN = 52, 1964 WMI_TLV_SERVICE_L1SS_STAT = 53, 1965 WMI_TLV_SERVICE_ESTIMATE_LINKSPEED = 54, 1966 WMI_TLV_SERVICE_OBSS_SCAN = 55, 1967 WMI_TLV_SERVICE_TDLS_OFFCHAN = 56, 1968 WMI_TLV_SERVICE_TDLS_UAPSD_BUFFER_STA = 57, 1969 WMI_TLV_SERVICE_TDLS_UAPSD_SLEEP_STA = 58, 1970 WMI_TLV_SERVICE_IBSS_PWRSAVE = 59, 1971 WMI_TLV_SERVICE_LPASS = 60, 1972 WMI_TLV_SERVICE_EXTSCAN = 61, 1973 WMI_TLV_SERVICE_D0WOW = 62, 1974 WMI_TLV_SERVICE_HSOFFLOAD = 63, 1975 WMI_TLV_SERVICE_ROAM_HO_OFFLOAD = 64, 1976 WMI_TLV_SERVICE_RX_FULL_REORDER = 65, 1977 WMI_TLV_SERVICE_DHCP_OFFLOAD = 66, 1978 WMI_TLV_SERVICE_STA_RX_IPA_OFFLOAD_SUPPORT = 67, 1979 WMI_TLV_SERVICE_MDNS_OFFLOAD = 68, 1980 WMI_TLV_SERVICE_SAP_AUTH_OFFLOAD = 69, 1981 WMI_TLV_SERVICE_DUAL_BAND_SIMULTANEOUS_SUPPORT = 70, 1982 WMI_TLV_SERVICE_OCB = 71, 1983 WMI_TLV_SERVICE_AP_ARPNS_OFFLOAD = 72, 1984 WMI_TLV_SERVICE_PER_BAND_CHAINMASK_SUPPORT = 73, 1985 WMI_TLV_SERVICE_PACKET_FILTER_OFFLOAD = 74, 1986 WMI_TLV_SERVICE_MGMT_TX_HTT = 75, 1987 WMI_TLV_SERVICE_MGMT_TX_WMI = 76, 1988 WMI_TLV_SERVICE_EXT_MSG = 77, 1989 WMI_TLV_SERVICE_MAWC = 78, 1990 WMI_TLV_SERVICE_PEER_ASSOC_CONF = 79, 1991 WMI_TLV_SERVICE_EGAP = 80, 1992 WMI_TLV_SERVICE_STA_PMF_OFFLOAD = 81, 1993 WMI_TLV_SERVICE_UNIFIED_WOW_CAPABILITY = 82, 1994 WMI_TLV_SERVICE_ENHANCED_PROXY_STA = 83, 1995 WMI_TLV_SERVICE_ATF = 84, 1996 WMI_TLV_SERVICE_COEX_GPIO = 85, 1997 WMI_TLV_SERVICE_AUX_SPECTRAL_INTF = 86, 1998 WMI_TLV_SERVICE_AUX_CHAN_LOAD_INTF = 87, 1999 WMI_TLV_SERVICE_BSS_CHANNEL_INFO_64 = 88, 2000 WMI_TLV_SERVICE_ENTERPRISE_MESH = 89, 2001 WMI_TLV_SERVICE_RESTRT_CHNL_SUPPORT = 90, 2002 WMI_TLV_SERVICE_BPF_OFFLOAD = 91, 2003 WMI_TLV_SERVICE_SYNC_DELETE_CMDS = 92, 2004 WMI_TLV_SERVICE_SMART_ANTENNA_SW_SUPPORT = 93, 2005 WMI_TLV_SERVICE_SMART_ANTENNA_HW_SUPPORT = 94, 2006 WMI_TLV_SERVICE_RATECTRL_LIMIT_MAX_MIN_RATES = 95, 2007 WMI_TLV_SERVICE_NAN_DATA = 96, 2008 WMI_TLV_SERVICE_NAN_RTT = 97, 2009 WMI_TLV_SERVICE_11AX = 98, 2010 WMI_TLV_SERVICE_DEPRECATED_REPLACE = 99, 2011 WMI_TLV_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE = 100, 2012 WMI_TLV_SERVICE_ENHANCED_MCAST_FILTER = 101, 2013 WMI_TLV_SERVICE_PERIODIC_CHAN_STAT_SUPPORT = 102, 2014 WMI_TLV_SERVICE_MESH_11S = 103, 2015 WMI_TLV_SERVICE_HALF_RATE_QUARTER_RATE_SUPPORT = 104, 2016 WMI_TLV_SERVICE_VDEV_RX_FILTER = 105, 2017 WMI_TLV_SERVICE_P2P_LISTEN_OFFLOAD_SUPPORT = 106, 2018 WMI_TLV_SERVICE_MARK_FIRST_WAKEUP_PACKET = 107, 2019 WMI_TLV_SERVICE_MULTIPLE_MCAST_FILTER_SET = 108, 2020 WMI_TLV_SERVICE_HOST_MANAGED_RX_REORDER = 109, 2021 WMI_TLV_SERVICE_FLASH_RDWR_SUPPORT = 110, 2022 WMI_TLV_SERVICE_WLAN_STATS_REPORT = 111, 2023 WMI_TLV_SERVICE_TX_MSDU_ID_NEW_PARTITION_SUPPORT = 112, 2024 WMI_TLV_SERVICE_DFS_PHYERR_OFFLOAD = 113, 2025 WMI_TLV_SERVICE_RCPI_SUPPORT = 114, 2026 WMI_TLV_SERVICE_FW_MEM_DUMP_SUPPORT = 115, 2027 WMI_TLV_SERVICE_PEER_STATS_INFO = 116, 2028 WMI_TLV_SERVICE_REGULATORY_DB = 117, 2029 WMI_TLV_SERVICE_11D_OFFLOAD = 118, 2030 WMI_TLV_SERVICE_HW_DATA_FILTERING = 119, 2031 WMI_TLV_SERVICE_MULTIPLE_VDEV_RESTART = 120, 2032 WMI_TLV_SERVICE_PKT_ROUTING = 121, 2033 WMI_TLV_SERVICE_CHECK_CAL_VERSION = 122, 2034 WMI_TLV_SERVICE_OFFCHAN_TX_WMI = 123, 2035 WMI_TLV_SERVICE_8SS_TX_BFEE = 124, 2036 WMI_TLV_SERVICE_EXTENDED_NSS_SUPPORT = 125, 2037 WMI_TLV_SERVICE_ACK_TIMEOUT = 126, 2038 WMI_TLV_SERVICE_PDEV_BSS_CHANNEL_INFO_64 = 127, 2039 2040 /* The first 128 bits */ 2041 WMI_MAX_SERVICE = 128, 2042 2043 WMI_TLV_SERVICE_CHAN_LOAD_INFO = 128, 2044 WMI_TLV_SERVICE_TX_PPDU_INFO_STATS_SUPPORT = 129, 2045 WMI_TLV_SERVICE_VDEV_LIMIT_OFFCHAN_SUPPORT = 130, 2046 WMI_TLV_SERVICE_FILS_SUPPORT = 131, 2047 WMI_TLV_SERVICE_WLAN_OIC_PING_OFFLOAD = 132, 2048 WMI_TLV_SERVICE_WLAN_DHCP_RENEW = 133, 2049 WMI_TLV_SERVICE_MAWC_SUPPORT = 134, 2050 WMI_TLV_SERVICE_VDEV_LATENCY_CONFIG = 135, 2051 WMI_TLV_SERVICE_PDEV_UPDATE_CTLTABLE_SUPPORT = 136, 2052 WMI_TLV_SERVICE_PKTLOG_SUPPORT_OVER_HTT = 137, 2053 WMI_TLV_SERVICE_VDEV_MULTI_GROUP_KEY_SUPPORT = 138, 2054 WMI_TLV_SERVICE_SCAN_PHYMODE_SUPPORT = 139, 2055 WMI_TLV_SERVICE_THERM_THROT = 140, 2056 WMI_TLV_SERVICE_BCN_OFFLOAD_START_STOP_SUPPORT = 141, 2057 WMI_TLV_SERVICE_WOW_WAKEUP_BY_TIMER_PATTERN = 142, 2058 WMI_TLV_SERVICE_PEER_MAP_UNMAP_V2_SUPPORT = 143, 2059 WMI_TLV_SERVICE_OFFCHAN_DATA_TID_SUPPORT = 144, 2060 WMI_TLV_SERVICE_RX_PROMISC_ENABLE_SUPPORT = 145, 2061 WMI_TLV_SERVICE_SUPPORT_DIRECT_DMA = 146, 2062 WMI_TLV_SERVICE_AP_OBSS_DETECTION_OFFLOAD = 147, 2063 WMI_TLV_SERVICE_11K_NEIGHBOUR_REPORT_SUPPORT = 148, 2064 WMI_TLV_SERVICE_LISTEN_INTERVAL_OFFLOAD_SUPPORT = 149, 2065 WMI_TLV_SERVICE_BSS_COLOR_OFFLOAD = 150, 2066 WMI_TLV_SERVICE_RUNTIME_DPD_RECAL = 151, 2067 WMI_TLV_SERVICE_STA_TWT = 152, 2068 WMI_TLV_SERVICE_AP_TWT = 153, 2069 WMI_TLV_SERVICE_GMAC_OFFLOAD_SUPPORT = 154, 2070 WMI_TLV_SERVICE_SPOOF_MAC_SUPPORT = 155, 2071 WMI_TLV_SERVICE_PEER_TID_CONFIGS_SUPPORT = 156, 2072 WMI_TLV_SERVICE_VDEV_SWRETRY_PER_AC_CONFIG_SUPPORT = 157, 2073 WMI_TLV_SERVICE_DUAL_BEACON_ON_SINGLE_MAC_SCC_SUPPORT = 158, 2074 WMI_TLV_SERVICE_DUAL_BEACON_ON_SINGLE_MAC_MCC_SUPPORT = 159, 2075 WMI_TLV_SERVICE_MOTION_DET = 160, 2076 WMI_TLV_SERVICE_INFRA_MBSSID = 161, 2077 WMI_TLV_SERVICE_OBSS_SPATIAL_REUSE = 162, 2078 WMI_TLV_SERVICE_VDEV_DIFFERENT_BEACON_INTERVAL_SUPPORT = 163, 2079 WMI_TLV_SERVICE_NAN_DBS_SUPPORT = 164, 2080 WMI_TLV_SERVICE_NDI_DBS_SUPPORT = 165, 2081 WMI_TLV_SERVICE_NAN_SAP_SUPPORT = 166, 2082 WMI_TLV_SERVICE_NDI_SAP_SUPPORT = 167, 2083 WMI_TLV_SERVICE_CFR_CAPTURE_SUPPORT = 168, 2084 WMI_TLV_SERVICE_CFR_CAPTURE_IND_MSG_TYPE_1 = 169, 2085 WMI_TLV_SERVICE_ESP_SUPPORT = 170, 2086 WMI_TLV_SERVICE_PEER_CHWIDTH_CHANGE = 171, 2087 WMI_TLV_SERVICE_WLAN_HPCS_PULSE = 172, 2088 WMI_TLV_SERVICE_PER_VDEV_CHAINMASK_CONFIG_SUPPORT = 173, 2089 WMI_TLV_SERVICE_TX_DATA_MGMT_ACK_RSSI = 174, 2090 WMI_TLV_SERVICE_NAN_DISABLE_SUPPORT = 175, 2091 WMI_TLV_SERVICE_HTT_H2T_NO_HTC_HDR_LEN_IN_MSG_LEN = 176, 2092 WMI_TLV_SERVICE_COEX_SUPPORT_UNEQUAL_ISOLATION = 177, 2093 WMI_TLV_SERVICE_HW_DB2DBM_CONVERSION_SUPPORT = 178, 2094 WMI_TLV_SERVICE_SUPPORT_EXTEND_ADDRESS = 179, 2095 WMI_TLV_SERVICE_BEACON_RECEPTION_STATS = 180, 2096 WMI_TLV_SERVICE_FETCH_TX_PN = 181, 2097 WMI_TLV_SERVICE_PEER_UNMAP_RESPONSE_SUPPORT = 182, 2098 WMI_TLV_SERVICE_TX_PER_PEER_AMPDU_SIZE = 183, 2099 WMI_TLV_SERVICE_BSS_COLOR_SWITCH_COUNT = 184, 2100 WMI_TLV_SERVICE_HTT_PEER_STATS_SUPPORT = 185, 2101 WMI_TLV_SERVICE_UL_RU26_ALLOWED = 186, 2102 WMI_TLV_SERVICE_GET_MWS_COEX_STATE = 187, 2103 WMI_TLV_SERVICE_GET_MWS_DPWB_STATE = 188, 2104 WMI_TLV_SERVICE_GET_MWS_TDM_STATE = 189, 2105 WMI_TLV_SERVICE_GET_MWS_IDRX_STATE = 190, 2106 WMI_TLV_SERVICE_GET_MWS_ANTENNA_SHARING_STATE = 191, 2107 WMI_TLV_SERVICE_ENHANCED_TPC_CONFIG_EVENT = 192, 2108 WMI_TLV_SERVICE_WLM_STATS_REQUEST = 193, 2109 WMI_TLV_SERVICE_EXT_PEER_TID_CONFIGS_SUPPORT = 194, 2110 WMI_TLV_SERVICE_WPA3_FT_SAE_SUPPORT = 195, 2111 WMI_TLV_SERVICE_WPA3_FT_SUITE_B_SUPPORT = 196, 2112 WMI_TLV_SERVICE_VOW_ENABLE = 197, 2113 WMI_TLV_SERVICE_CFR_CAPTURE_IND_EVT_TYPE_1 = 198, 2114 WMI_TLV_SERVICE_BROADCAST_TWT = 199, 2115 WMI_TLV_SERVICE_RAP_DETECTION_SUPPORT = 200, 2116 WMI_TLV_SERVICE_PS_TDCC = 201, 2117 WMI_TLV_SERVICE_THREE_WAY_COEX_CONFIG_LEGACY = 202, 2118 WMI_TLV_SERVICE_THREE_WAY_COEX_CONFIG_OVERRIDE = 203, 2119 WMI_TLV_SERVICE_TX_PWR_PER_PEER = 204, 2120 WMI_TLV_SERVICE_STA_PLUS_STA_SUPPORT = 205, 2121 WMI_TLV_SERVICE_WPA3_FT_FILS = 206, 2122 WMI_TLV_SERVICE_ADAPTIVE_11R_ROAM = 207, 2123 WMI_TLV_SERVICE_CHAN_RF_CHARACTERIZATION_INFO = 208, 2124 WMI_TLV_SERVICE_FW_IFACE_COMBINATION_SUPPORT = 209, 2125 WMI_TLV_SERVICE_TX_COMPL_TSF64 = 210, 2126 WMI_TLV_SERVICE_DSM_ROAM_FILTER = 211, 2127 WMI_TLV_SERVICE_PACKET_CAPTURE_SUPPORT = 212, 2128 WMI_TLV_SERVICE_PER_PEER_HTT_STATS_RESET = 213, 2129 WMI_TLV_SERVICE_FREQINFO_IN_METADATA = 219, 2130 WMI_TLV_SERVICE_EXT2_MSG = 220, 2131 WMI_TLV_SERVICE_PEER_POWER_SAVE_DURATION_SUPPORT = 246, 2132 WMI_TLV_SERVICE_SRG_SRP_SPATIAL_REUSE_SUPPORT = 249, 2133 WMI_TLV_SERVICE_MBSS_PARAM_IN_VDEV_START_SUPPORT = 253, 2134 WMI_TLV_SERVICE_PASSIVE_SCAN_START_TIME_ENHANCE = 263, 2135 2136 /* The second 128 bits */ 2137 WMI_MAX_EXT_SERVICE = 256, 2138 WMI_TLV_SERVICE_SCAN_CONFIG_PER_CHANNEL = 265, 2139 WMI_TLV_SERVICE_EXT_TPC_REG_SUPPORT = 280, 2140 WMI_TLV_SERVICE_REG_CC_EXT_EVENT_SUPPORT = 281, 2141 WMI_TLV_SERVICE_BIOS_SAR_SUPPORT = 326, 2142 WMI_TLV_SERVICE_SUPPORT_11D_FOR_HOST_SCAN = 357, 2143 2144 /* The third 128 bits */ 2145 WMI_MAX_EXT2_SERVICE = 384 2146 }; 2147 2148 enum { 2149 WMI_SMPS_FORCED_MODE_NONE = 0, 2150 WMI_SMPS_FORCED_MODE_DISABLED, 2151 WMI_SMPS_FORCED_MODE_STATIC, 2152 WMI_SMPS_FORCED_MODE_DYNAMIC 2153 }; 2154 2155 #define WMI_TPC_CHAINMASK_CONFIG_BAND_2G 0 2156 #define WMI_TPC_CHAINMASK_CONFIG_BAND_5G 1 2157 #define WMI_NUM_SUPPORTED_BAND_MAX 2 2158 2159 #define WMI_PEER_MIMO_PS_STATE 0x1 2160 #define WMI_PEER_AMPDU 0x2 2161 #define WMI_PEER_AUTHORIZE 0x3 2162 #define WMI_PEER_CHWIDTH 0x4 2163 #define WMI_PEER_NSS 0x5 2164 #define WMI_PEER_USE_4ADDR 0x6 2165 #define WMI_PEER_MEMBERSHIP 0x7 2166 #define WMI_PEER_USERPOS 0x8 2167 #define WMI_PEER_CRIT_PROTO_HINT_ENABLED 0x9 2168 #define WMI_PEER_TX_FAIL_CNT_THR 0xA 2169 #define WMI_PEER_SET_HW_RETRY_CTS2S 0xB 2170 #define WMI_PEER_IBSS_ATIM_WINDOW_LENGTH 0xC 2171 #define WMI_PEER_PHYMODE 0xD 2172 #define WMI_PEER_USE_FIXED_PWR 0xE 2173 #define WMI_PEER_PARAM_FIXED_RATE 0xF 2174 #define WMI_PEER_SET_MU_WHITELIST 0x10 2175 #define WMI_PEER_SET_MAX_TX_RATE 0x11 2176 #define WMI_PEER_SET_MIN_TX_RATE 0x12 2177 #define WMI_PEER_SET_DEFAULT_ROUTING 0x13 2178 2179 /* slot time long */ 2180 #define WMI_VDEV_SLOT_TIME_LONG 0x1 2181 /* slot time short */ 2182 #define WMI_VDEV_SLOT_TIME_SHORT 0x2 2183 /* preablbe long */ 2184 #define WMI_VDEV_PREAMBLE_LONG 0x1 2185 /* preablbe short */ 2186 #define WMI_VDEV_PREAMBLE_SHORT 0x2 2187 2188 enum wmi_peer_smps_state { 2189 WMI_PEER_SMPS_PS_NONE = 0x0, 2190 WMI_PEER_SMPS_STATIC = 0x1, 2191 WMI_PEER_SMPS_DYNAMIC = 0x2 2192 }; 2193 2194 enum wmi_peer_chwidth { 2195 WMI_PEER_CHWIDTH_20MHZ = 0, 2196 WMI_PEER_CHWIDTH_40MHZ = 1, 2197 WMI_PEER_CHWIDTH_80MHZ = 2, 2198 WMI_PEER_CHWIDTH_160MHZ = 3, 2199 }; 2200 2201 enum wmi_beacon_gen_mode { 2202 WMI_BEACON_STAGGERED_MODE = 0, 2203 WMI_BEACON_BURST_MODE = 1 2204 }; 2205 2206 enum wmi_direct_buffer_module { 2207 WMI_DIRECT_BUF_SPECTRAL = 0, 2208 WMI_DIRECT_BUF_CFR = 1, 2209 2210 /* keep it last */ 2211 WMI_DIRECT_BUF_MAX 2212 }; 2213 2214 /* enum wmi_nss_ratio - NSS ratio received from FW during service ready ext 2215 * event 2216 * WMI_NSS_RATIO_1BY2_NSS -Max nss of 160MHz is equals to half of the max nss 2217 * of 80MHz 2218 * WMI_NSS_RATIO_3BY4_NSS - Max nss of 160MHz is equals to 3/4 of the max nss 2219 * of 80MHz 2220 * WMI_NSS_RATIO_1_NSS - Max nss of 160MHz is equals to the max nss of 80MHz 2221 * WMI_NSS_RATIO_2_NSS - Max nss of 160MHz is equals to two times the max 2222 * nss of 80MHz 2223 */ 2224 2225 enum wmi_nss_ratio { 2226 WMI_NSS_RATIO_1BY2_NSS = 0x0, 2227 WMI_NSS_RATIO_3BY4_NSS = 0x1, 2228 WMI_NSS_RATIO_1_NSS = 0x2, 2229 WMI_NSS_RATIO_2_NSS = 0x3, 2230 }; 2231 2232 enum wmi_dtim_policy { 2233 WMI_DTIM_POLICY_IGNORE = 1, 2234 WMI_DTIM_POLICY_NORMAL = 2, 2235 WMI_DTIM_POLICY_STICK = 3, 2236 WMI_DTIM_POLICY_AUTO = 4, 2237 }; 2238 2239 struct wmi_host_pdev_band_to_mac { 2240 u32 pdev_id; 2241 u32 start_freq; 2242 u32 end_freq; 2243 }; 2244 2245 struct ath11k_ppe_threshold { 2246 u32 numss_m1; 2247 u32 ru_bit_mask; 2248 u32 ppet16_ppet8_ru3_ru0[PSOC_HOST_MAX_NUM_SS]; 2249 }; 2250 2251 struct ath11k_service_ext_param { 2252 u32 default_conc_scan_config_bits; 2253 u32 default_fw_config_bits; 2254 struct ath11k_ppe_threshold ppet; 2255 u32 he_cap_info; 2256 u32 mpdu_density; 2257 u32 max_bssid_rx_filters; 2258 u32 num_hw_modes; 2259 u32 num_phy; 2260 }; 2261 2262 struct ath11k_hw_mode_caps { 2263 u32 hw_mode_id; 2264 u32 phy_id_map; 2265 u32 hw_mode_config_type; 2266 }; 2267 2268 #define PSOC_HOST_MAX_PHY_SIZE (3) 2269 #define ATH11K_11B_SUPPORT BIT(0) 2270 #define ATH11K_11G_SUPPORT BIT(1) 2271 #define ATH11K_11A_SUPPORT BIT(2) 2272 #define ATH11K_11N_SUPPORT BIT(3) 2273 #define ATH11K_11AC_SUPPORT BIT(4) 2274 #define ATH11K_11AX_SUPPORT BIT(5) 2275 2276 struct ath11k_hal_reg_capabilities_ext { 2277 u32 phy_id; 2278 u32 eeprom_reg_domain; 2279 u32 eeprom_reg_domain_ext; 2280 u32 regcap1; 2281 u32 regcap2; 2282 u32 wireless_modes; 2283 u32 low_2ghz_chan; 2284 u32 high_2ghz_chan; 2285 u32 low_5ghz_chan; 2286 u32 high_5ghz_chan; 2287 }; 2288 2289 #define WMI_HOST_MAX_PDEV 3 2290 2291 struct wlan_host_mem_chunk { 2292 u32 tlv_header; 2293 u32 req_id; 2294 u32 ptr; 2295 u32 size; 2296 } __packed; 2297 2298 struct wmi_host_mem_chunk { 2299 void *vaddr; 2300 dma_addr_t paddr; 2301 u32 len; 2302 u32 req_id; 2303 }; 2304 2305 struct wmi_init_cmd_param { 2306 u32 tlv_header; 2307 struct target_resource_config *res_cfg; 2308 u8 num_mem_chunks; 2309 struct wmi_host_mem_chunk *mem_chunks; 2310 u32 hw_mode_id; 2311 u32 num_band_to_mac; 2312 struct wmi_host_pdev_band_to_mac band_to_mac[WMI_HOST_MAX_PDEV]; 2313 }; 2314 2315 struct wmi_pdev_band_to_mac { 2316 u32 tlv_header; 2317 u32 pdev_id; 2318 u32 start_freq; 2319 u32 end_freq; 2320 } __packed; 2321 2322 struct wmi_pdev_set_hw_mode_cmd_param { 2323 u32 tlv_header; 2324 u32 pdev_id; 2325 u32 hw_mode_index; 2326 u32 num_band_to_mac; 2327 } __packed; 2328 2329 struct wmi_ppe_threshold { 2330 u32 numss_m1; /** NSS - 1*/ 2331 union { 2332 u32 ru_count; 2333 u32 ru_mask; 2334 } __packed; 2335 u32 ppet16_ppet8_ru3_ru0[WMI_MAX_NUM_SS]; 2336 } __packed; 2337 2338 #define HW_BD_INFO_SIZE 5 2339 2340 struct wmi_abi_version { 2341 u32 abi_version_0; 2342 u32 abi_version_1; 2343 u32 abi_version_ns_0; 2344 u32 abi_version_ns_1; 2345 u32 abi_version_ns_2; 2346 u32 abi_version_ns_3; 2347 } __packed; 2348 2349 struct wmi_init_cmd { 2350 u32 tlv_header; 2351 struct wmi_abi_version host_abi_vers; 2352 u32 num_host_mem_chunks; 2353 } __packed; 2354 2355 #define WMI_RSRC_CFG_FLAG1_BSS_CHANNEL_INFO_64 BIT(5) 2356 #define WMI_RSRC_CFG_FLAG2_CALC_NEXT_DTIM_COUNT_SET BIT(9) 2357 #define WMI_RSRC_CFG_FLAG1_ACK_RSSI BIT(18) 2358 2359 #define WMI_CFG_HOST_SERVICE_FLAG_REG_CC_EXT 4 2360 2361 struct wmi_resource_config { 2362 u32 tlv_header; 2363 u32 num_vdevs; 2364 u32 num_peers; 2365 u32 num_offload_peers; 2366 u32 num_offload_reorder_buffs; 2367 u32 num_peer_keys; 2368 u32 num_tids; 2369 u32 ast_skid_limit; 2370 u32 tx_chain_mask; 2371 u32 rx_chain_mask; 2372 u32 rx_timeout_pri[4]; 2373 u32 rx_decap_mode; 2374 u32 scan_max_pending_req; 2375 u32 bmiss_offload_max_vdev; 2376 u32 roam_offload_max_vdev; 2377 u32 roam_offload_max_ap_profiles; 2378 u32 num_mcast_groups; 2379 u32 num_mcast_table_elems; 2380 u32 mcast2ucast_mode; 2381 u32 tx_dbg_log_size; 2382 u32 num_wds_entries; 2383 u32 dma_burst_size; 2384 u32 mac_aggr_delim; 2385 u32 rx_skip_defrag_timeout_dup_detection_check; 2386 u32 vow_config; 2387 u32 gtk_offload_max_vdev; 2388 u32 num_msdu_desc; 2389 u32 max_frag_entries; 2390 u32 num_tdls_vdevs; 2391 u32 num_tdls_conn_table_entries; 2392 u32 beacon_tx_offload_max_vdev; 2393 u32 num_multicast_filter_entries; 2394 u32 num_wow_filters; 2395 u32 num_keep_alive_pattern; 2396 u32 keep_alive_pattern_size; 2397 u32 max_tdls_concurrent_sleep_sta; 2398 u32 max_tdls_concurrent_buffer_sta; 2399 u32 wmi_send_separate; 2400 u32 num_ocb_vdevs; 2401 u32 num_ocb_channels; 2402 u32 num_ocb_schedules; 2403 u32 flag1; 2404 u32 smart_ant_cap; 2405 u32 bk_minfree; 2406 u32 be_minfree; 2407 u32 vi_minfree; 2408 u32 vo_minfree; 2409 u32 alloc_frag_desc_for_data_pkt; 2410 u32 num_ns_ext_tuples_cfg; 2411 u32 bpf_instruction_size; 2412 u32 max_bssid_rx_filters; 2413 u32 use_pdev_id; 2414 u32 max_num_dbs_scan_duty_cycle; 2415 u32 max_num_group_keys; 2416 u32 peer_map_unmap_v2_support; 2417 u32 sched_params; 2418 u32 twt_ap_pdev_count; 2419 u32 twt_ap_sta_count; 2420 u32 max_nlo_ssids; 2421 u32 num_pkt_filters; 2422 u32 num_max_sta_vdevs; 2423 u32 max_bssid_indicator; 2424 u32 ul_resp_config; 2425 u32 msdu_flow_override_config0; 2426 u32 msdu_flow_override_config1; 2427 u32 flags2; 2428 u32 host_service_flags; 2429 u32 max_rnr_neighbours; 2430 u32 ema_max_vap_cnt; 2431 u32 ema_max_profile_period; 2432 } __packed; 2433 2434 struct wmi_service_ready_event { 2435 u32 fw_build_vers; 2436 struct wmi_abi_version fw_abi_vers; 2437 u32 phy_capability; 2438 u32 max_frag_entry; 2439 u32 num_rf_chains; 2440 u32 ht_cap_info; 2441 u32 vht_cap_info; 2442 u32 vht_supp_mcs; 2443 u32 hw_min_tx_power; 2444 u32 hw_max_tx_power; 2445 u32 sys_cap_info; 2446 u32 min_pkt_size_enable; 2447 u32 max_bcn_ie_size; 2448 u32 num_mem_reqs; 2449 u32 max_num_scan_channels; 2450 u32 hw_bd_id; 2451 u32 hw_bd_info[HW_BD_INFO_SIZE]; 2452 u32 max_supported_macs; 2453 u32 wmi_fw_sub_feat_caps; 2454 u32 num_dbs_hw_modes; 2455 /* txrx_chainmask 2456 * [7:0] - 2G band tx chain mask 2457 * [15:8] - 2G band rx chain mask 2458 * [23:16] - 5G band tx chain mask 2459 * [31:24] - 5G band rx chain mask 2460 */ 2461 u32 txrx_chainmask; 2462 u32 default_dbs_hw_mode_index; 2463 u32 num_msdu_desc; 2464 } __packed; 2465 2466 #define WMI_SERVICE_BM_SIZE ((WMI_MAX_SERVICE + sizeof(u32) - 1) / sizeof(u32)) 2467 2468 #define WMI_SERVICE_SEGMENT_BM_SIZE32 4 /* 4x u32 = 128 bits */ 2469 #define WMI_SERVICE_EXT_BM_SIZE (WMI_SERVICE_SEGMENT_BM_SIZE32 * sizeof(u32)) 2470 #define WMI_AVAIL_SERVICE_BITS_IN_SIZE32 32 2471 #define WMI_SERVICE_BITS_IN_SIZE32 4 2472 2473 struct wmi_service_ready_ext_event { 2474 u32 default_conc_scan_config_bits; 2475 u32 default_fw_config_bits; 2476 struct wmi_ppe_threshold ppet; 2477 u32 he_cap_info; 2478 u32 mpdu_density; 2479 u32 max_bssid_rx_filters; 2480 u32 fw_build_vers_ext; 2481 u32 max_nlo_ssids; 2482 u32 max_bssid_indicator; 2483 u32 he_cap_info_ext; 2484 } __packed; 2485 2486 struct wmi_soc_mac_phy_hw_mode_caps { 2487 u32 num_hw_modes; 2488 u32 num_chainmask_tables; 2489 } __packed; 2490 2491 struct wmi_hw_mode_capabilities { 2492 u32 tlv_header; 2493 u32 hw_mode_id; 2494 u32 phy_id_map; 2495 u32 hw_mode_config_type; 2496 } __packed; 2497 2498 #define WMI_MAX_HECAP_PHY_SIZE (3) 2499 #define WMI_NSS_RATIO_ENABLE_DISABLE_BITPOS BIT(0) 2500 #define WMI_NSS_RATIO_ENABLE_DISABLE_GET(_val) \ 2501 FIELD_GET(WMI_NSS_RATIO_ENABLE_DISABLE_BITPOS, _val) 2502 #define WMI_NSS_RATIO_INFO_BITPOS GENMASK(4, 1) 2503 #define WMI_NSS_RATIO_INFO_GET(_val) \ 2504 FIELD_GET(WMI_NSS_RATIO_INFO_BITPOS, _val) 2505 2506 struct wmi_mac_phy_capabilities { 2507 u32 hw_mode_id; 2508 u32 pdev_id; 2509 u32 phy_id; 2510 u32 supported_flags; 2511 u32 supported_bands; 2512 u32 ampdu_density; 2513 u32 max_bw_supported_2g; 2514 u32 ht_cap_info_2g; 2515 u32 vht_cap_info_2g; 2516 u32 vht_supp_mcs_2g; 2517 u32 he_cap_info_2g; 2518 u32 he_supp_mcs_2g; 2519 u32 tx_chain_mask_2g; 2520 u32 rx_chain_mask_2g; 2521 u32 max_bw_supported_5g; 2522 u32 ht_cap_info_5g; 2523 u32 vht_cap_info_5g; 2524 u32 vht_supp_mcs_5g; 2525 u32 he_cap_info_5g; 2526 u32 he_supp_mcs_5g; 2527 u32 tx_chain_mask_5g; 2528 u32 rx_chain_mask_5g; 2529 u32 he_cap_phy_info_2g[WMI_MAX_HECAP_PHY_SIZE]; 2530 u32 he_cap_phy_info_5g[WMI_MAX_HECAP_PHY_SIZE]; 2531 struct wmi_ppe_threshold he_ppet2g; 2532 struct wmi_ppe_threshold he_ppet5g; 2533 u32 chainmask_table_id; 2534 u32 lmac_id; 2535 u32 he_cap_info_2g_ext; 2536 u32 he_cap_info_5g_ext; 2537 u32 he_cap_info_internal; 2538 u32 wireless_modes; 2539 u32 low_2ghz_chan_freq; 2540 u32 high_2ghz_chan_freq; 2541 u32 low_5ghz_chan_freq; 2542 u32 high_5ghz_chan_freq; 2543 u32 nss_ratio; 2544 } __packed; 2545 2546 struct wmi_hal_reg_capabilities_ext { 2547 u32 tlv_header; 2548 u32 phy_id; 2549 u32 eeprom_reg_domain; 2550 u32 eeprom_reg_domain_ext; 2551 u32 regcap1; 2552 u32 regcap2; 2553 u32 wireless_modes; 2554 u32 low_2ghz_chan; 2555 u32 high_2ghz_chan; 2556 u32 low_5ghz_chan; 2557 u32 high_5ghz_chan; 2558 } __packed; 2559 2560 struct wmi_soc_hal_reg_capabilities { 2561 u32 num_phy; 2562 } __packed; 2563 2564 /* 2 word representation of MAC addr */ 2565 struct wmi_mac_addr { 2566 union { 2567 u8 addr[6]; 2568 struct { 2569 u32 word0; 2570 u32 word1; 2571 } __packed; 2572 } __packed; 2573 } __packed; 2574 2575 struct wmi_dma_ring_capabilities { 2576 u32 tlv_header; 2577 u32 pdev_id; 2578 u32 module_id; 2579 u32 min_elem; 2580 u32 min_buf_sz; 2581 u32 min_buf_align; 2582 } __packed; 2583 2584 struct wmi_ready_event_min { 2585 struct wmi_abi_version fw_abi_vers; 2586 struct wmi_mac_addr mac_addr; 2587 u32 status; 2588 u32 num_dscp_table; 2589 u32 num_extra_mac_addr; 2590 u32 num_total_peers; 2591 u32 num_extra_peers; 2592 } __packed; 2593 2594 struct wmi_ready_event { 2595 struct wmi_ready_event_min ready_event_min; 2596 u32 max_ast_index; 2597 u32 pktlog_defs_checksum; 2598 } __packed; 2599 2600 struct wmi_service_available_event { 2601 u32 wmi_service_segment_offset; 2602 u32 wmi_service_segment_bitmap[WMI_SERVICE_SEGMENT_BM_SIZE32]; 2603 } __packed; 2604 2605 struct ath11k_pdev_wmi { 2606 struct ath11k_wmi_base *wmi_ab; 2607 enum ath11k_htc_ep_id eid; 2608 u32 rx_decap_mode; 2609 wait_queue_head_t tx_ce_desc_wq; 2610 }; 2611 2612 struct vdev_create_params { 2613 u8 if_id; 2614 u32 type; 2615 u32 subtype; 2616 struct { 2617 u8 tx; 2618 u8 rx; 2619 } chains[NUM_NL80211_BANDS]; 2620 u32 pdev_id; 2621 u32 mbssid_flags; 2622 u32 mbssid_tx_vdev_id; 2623 }; 2624 2625 struct wmi_vdev_create_cmd { 2626 u32 tlv_header; 2627 u32 vdev_id; 2628 u32 vdev_type; 2629 u32 vdev_subtype; 2630 struct wmi_mac_addr vdev_macaddr; 2631 u32 num_cfg_txrx_streams; 2632 u32 pdev_id; 2633 u32 mbssid_flags; 2634 u32 mbssid_tx_vdev_id; 2635 } __packed; 2636 2637 struct wmi_vdev_txrx_streams { 2638 u32 tlv_header; 2639 u32 band; 2640 u32 supported_tx_streams; 2641 u32 supported_rx_streams; 2642 } __packed; 2643 2644 struct wmi_vdev_delete_cmd { 2645 u32 tlv_header; 2646 u32 vdev_id; 2647 } __packed; 2648 2649 struct wmi_vdev_up_cmd { 2650 u32 tlv_header; 2651 u32 vdev_id; 2652 u32 vdev_assoc_id; 2653 struct wmi_mac_addr vdev_bssid; 2654 struct wmi_mac_addr tx_vdev_bssid; 2655 u32 nontx_profile_idx; 2656 u32 nontx_profile_cnt; 2657 } __packed; 2658 2659 struct wmi_vdev_stop_cmd { 2660 u32 tlv_header; 2661 u32 vdev_id; 2662 } __packed; 2663 2664 struct wmi_vdev_down_cmd { 2665 u32 tlv_header; 2666 u32 vdev_id; 2667 } __packed; 2668 2669 #define WMI_VDEV_START_HIDDEN_SSID BIT(0) 2670 #define WMI_VDEV_START_PMF_ENABLED BIT(1) 2671 #define WMI_VDEV_START_LDPC_RX_ENABLED BIT(3) 2672 #define WMI_VDEV_START_HW_ENCRYPTION_DISABLED BIT(4) 2673 2674 struct wmi_ssid { 2675 u32 ssid_len; 2676 u32 ssid[8]; 2677 } __packed; 2678 2679 #define ATH11K_VDEV_SETUP_TIMEOUT_HZ (1 * HZ) 2680 2681 struct wmi_vdev_start_request_cmd { 2682 u32 tlv_header; 2683 u32 vdev_id; 2684 u32 requestor_id; 2685 u32 beacon_interval; 2686 u32 dtim_period; 2687 u32 flags; 2688 struct wmi_ssid ssid; 2689 u32 bcn_tx_rate; 2690 u32 bcn_txpower; 2691 u32 num_noa_descriptors; 2692 u32 disable_hw_ack; 2693 u32 preferred_tx_streams; 2694 u32 preferred_rx_streams; 2695 u32 he_ops; 2696 u32 cac_duration_ms; 2697 u32 regdomain; 2698 u32 min_data_rate; 2699 u32 mbssid_flags; 2700 u32 mbssid_tx_vdev_id; 2701 } __packed; 2702 2703 #define MGMT_TX_DL_FRM_LEN 64 2704 #define WMI_MAC_MAX_SSID_LENGTH 32 2705 struct mac_ssid { 2706 u8 length; 2707 u8 mac_ssid[WMI_MAC_MAX_SSID_LENGTH]; 2708 } __packed; 2709 2710 struct wmi_p2p_noa_descriptor { 2711 u32 type_count; 2712 u32 duration; 2713 u32 interval; 2714 u32 start_time; 2715 }; 2716 2717 struct channel_param { 2718 u8 chan_id; 2719 u8 pwr; 2720 u32 mhz; 2721 u32 half_rate:1, 2722 quarter_rate:1, 2723 dfs_set:1, 2724 dfs_set_cfreq2:1, 2725 is_chan_passive:1, 2726 allow_ht:1, 2727 allow_vht:1, 2728 allow_he:1, 2729 set_agile:1, 2730 psc_channel:1; 2731 u32 phy_mode; 2732 u32 cfreq1; 2733 u32 cfreq2; 2734 char maxpower; 2735 char minpower; 2736 char maxregpower; 2737 u8 antennamax; 2738 u8 reg_class_id; 2739 } __packed; 2740 2741 enum wmi_phy_mode { 2742 MODE_11A = 0, 2743 MODE_11G = 1, /* 11b/g Mode */ 2744 MODE_11B = 2, /* 11b Mode */ 2745 MODE_11GONLY = 3, /* 11g only Mode */ 2746 MODE_11NA_HT20 = 4, 2747 MODE_11NG_HT20 = 5, 2748 MODE_11NA_HT40 = 6, 2749 MODE_11NG_HT40 = 7, 2750 MODE_11AC_VHT20 = 8, 2751 MODE_11AC_VHT40 = 9, 2752 MODE_11AC_VHT80 = 10, 2753 MODE_11AC_VHT20_2G = 11, 2754 MODE_11AC_VHT40_2G = 12, 2755 MODE_11AC_VHT80_2G = 13, 2756 MODE_11AC_VHT80_80 = 14, 2757 MODE_11AC_VHT160 = 15, 2758 MODE_11AX_HE20 = 16, 2759 MODE_11AX_HE40 = 17, 2760 MODE_11AX_HE80 = 18, 2761 MODE_11AX_HE80_80 = 19, 2762 MODE_11AX_HE160 = 20, 2763 MODE_11AX_HE20_2G = 21, 2764 MODE_11AX_HE40_2G = 22, 2765 MODE_11AX_HE80_2G = 23, 2766 MODE_UNKNOWN = 24, 2767 MODE_MAX = 24 2768 }; 2769 2770 static inline const char *ath11k_wmi_phymode_str(enum wmi_phy_mode mode) 2771 { 2772 switch (mode) { 2773 case MODE_11A: 2774 return "11a"; 2775 case MODE_11G: 2776 return "11g"; 2777 case MODE_11B: 2778 return "11b"; 2779 case MODE_11GONLY: 2780 return "11gonly"; 2781 case MODE_11NA_HT20: 2782 return "11na-ht20"; 2783 case MODE_11NG_HT20: 2784 return "11ng-ht20"; 2785 case MODE_11NA_HT40: 2786 return "11na-ht40"; 2787 case MODE_11NG_HT40: 2788 return "11ng-ht40"; 2789 case MODE_11AC_VHT20: 2790 return "11ac-vht20"; 2791 case MODE_11AC_VHT40: 2792 return "11ac-vht40"; 2793 case MODE_11AC_VHT80: 2794 return "11ac-vht80"; 2795 case MODE_11AC_VHT160: 2796 return "11ac-vht160"; 2797 case MODE_11AC_VHT80_80: 2798 return "11ac-vht80+80"; 2799 case MODE_11AC_VHT20_2G: 2800 return "11ac-vht20-2g"; 2801 case MODE_11AC_VHT40_2G: 2802 return "11ac-vht40-2g"; 2803 case MODE_11AC_VHT80_2G: 2804 return "11ac-vht80-2g"; 2805 case MODE_11AX_HE20: 2806 return "11ax-he20"; 2807 case MODE_11AX_HE40: 2808 return "11ax-he40"; 2809 case MODE_11AX_HE80: 2810 return "11ax-he80"; 2811 case MODE_11AX_HE80_80: 2812 return "11ax-he80+80"; 2813 case MODE_11AX_HE160: 2814 return "11ax-he160"; 2815 case MODE_11AX_HE20_2G: 2816 return "11ax-he20-2g"; 2817 case MODE_11AX_HE40_2G: 2818 return "11ax-he40-2g"; 2819 case MODE_11AX_HE80_2G: 2820 return "11ax-he80-2g"; 2821 case MODE_UNKNOWN: 2822 /* skip */ 2823 break; 2824 2825 /* no default handler to allow compiler to check that the 2826 * enum is fully handled 2827 */ 2828 } 2829 2830 return "<unknown>"; 2831 } 2832 2833 struct wmi_channel_arg { 2834 u32 freq; 2835 u32 band_center_freq1; 2836 u32 band_center_freq2; 2837 bool passive; 2838 bool allow_ibss; 2839 bool allow_ht; 2840 bool allow_vht; 2841 bool ht40plus; 2842 bool chan_radar; 2843 bool freq2_radar; 2844 bool allow_he; 2845 u32 min_power; 2846 u32 max_power; 2847 u32 max_reg_power; 2848 u32 max_antenna_gain; 2849 enum wmi_phy_mode mode; 2850 }; 2851 2852 struct wmi_vdev_start_req_arg { 2853 u32 vdev_id; 2854 struct wmi_channel_arg channel; 2855 u32 bcn_intval; 2856 u32 dtim_period; 2857 u8 *ssid; 2858 u32 ssid_len; 2859 u32 bcn_tx_rate; 2860 u32 bcn_tx_power; 2861 bool disable_hw_ack; 2862 bool hidden_ssid; 2863 bool pmf_enabled; 2864 u32 he_ops; 2865 u32 cac_duration_ms; 2866 u32 regdomain; 2867 u32 pref_rx_streams; 2868 u32 pref_tx_streams; 2869 u32 num_noa_descriptors; 2870 u32 min_data_rate; 2871 u32 mbssid_flags; 2872 u32 mbssid_tx_vdev_id; 2873 }; 2874 2875 struct peer_create_params { 2876 const u8 *peer_addr; 2877 u32 peer_type; 2878 u32 vdev_id; 2879 }; 2880 2881 struct peer_delete_params { 2882 u8 vdev_id; 2883 }; 2884 2885 struct peer_flush_params { 2886 u32 peer_tid_bitmap; 2887 u8 vdev_id; 2888 }; 2889 2890 struct pdev_set_regdomain_params { 2891 u16 current_rd_in_use; 2892 u16 current_rd_2g; 2893 u16 current_rd_5g; 2894 u32 ctl_2g; 2895 u32 ctl_5g; 2896 u8 dfs_domain; 2897 u32 pdev_id; 2898 }; 2899 2900 struct rx_reorder_queue_remove_params { 2901 u8 *peer_macaddr; 2902 u16 vdev_id; 2903 u32 peer_tid_bitmap; 2904 }; 2905 2906 #define WMI_HOST_PDEV_ID_SOC 0xFF 2907 #define WMI_HOST_PDEV_ID_0 0 2908 #define WMI_HOST_PDEV_ID_1 1 2909 #define WMI_HOST_PDEV_ID_2 2 2910 2911 #define WMI_PDEV_ID_SOC 0 2912 #define WMI_PDEV_ID_1ST 1 2913 #define WMI_PDEV_ID_2ND 2 2914 #define WMI_PDEV_ID_3RD 3 2915 2916 /* Freq units in MHz */ 2917 #define REG_RULE_START_FREQ 0x0000ffff 2918 #define REG_RULE_END_FREQ 0xffff0000 2919 #define REG_RULE_FLAGS 0x0000ffff 2920 #define REG_RULE_MAX_BW 0x0000ffff 2921 #define REG_RULE_REG_PWR 0x00ff0000 2922 #define REG_RULE_ANT_GAIN 0xff000000 2923 #define REG_RULE_PSD_INFO BIT(0) 2924 #define REG_RULE_PSD_EIRP 0xff0000 2925 2926 #define WMI_VDEV_PARAM_TXBF_SU_TX_BFEE BIT(0) 2927 #define WMI_VDEV_PARAM_TXBF_MU_TX_BFEE BIT(1) 2928 #define WMI_VDEV_PARAM_TXBF_SU_TX_BFER BIT(2) 2929 #define WMI_VDEV_PARAM_TXBF_MU_TX_BFER BIT(3) 2930 2931 #define HE_PHYCAP_BYTE_0 0 2932 #define HE_PHYCAP_BYTE_1 1 2933 #define HE_PHYCAP_BYTE_2 2 2934 #define HE_PHYCAP_BYTE_3 3 2935 #define HE_PHYCAP_BYTE_4 4 2936 2937 #define HECAP_PHY_SU_BFER BIT(7) 2938 #define HECAP_PHY_SU_BFEE BIT(0) 2939 #define HECAP_PHY_MU_BFER BIT(1) 2940 #define HECAP_PHY_UL_MUMIMO BIT(6) 2941 #define HECAP_PHY_UL_MUOFDMA BIT(7) 2942 2943 #define HECAP_PHY_SUBFMR_GET(hecap_phy) \ 2944 FIELD_GET(HECAP_PHY_SU_BFER, hecap_phy[HE_PHYCAP_BYTE_3]) 2945 2946 #define HECAP_PHY_SUBFME_GET(hecap_phy) \ 2947 FIELD_GET(HECAP_PHY_SU_BFEE, hecap_phy[HE_PHYCAP_BYTE_4]) 2948 2949 #define HECAP_PHY_MUBFMR_GET(hecap_phy) \ 2950 FIELD_GET(HECAP_PHY_MU_BFER, hecap_phy[HE_PHYCAP_BYTE_4]) 2951 2952 #define HECAP_PHY_ULMUMIMO_GET(hecap_phy) \ 2953 FIELD_GET(HECAP_PHY_UL_MUMIMO, hecap_phy[HE_PHYCAP_BYTE_2]) 2954 2955 #define HECAP_PHY_ULOFDMA_GET(hecap_phy) \ 2956 FIELD_GET(HECAP_PHY_UL_MUOFDMA, hecap_phy[HE_PHYCAP_BYTE_2]) 2957 2958 #define HE_MODE_SU_TX_BFEE BIT(0) 2959 #define HE_MODE_SU_TX_BFER BIT(1) 2960 #define HE_MODE_MU_TX_BFEE BIT(2) 2961 #define HE_MODE_MU_TX_BFER BIT(3) 2962 #define HE_MODE_DL_OFDMA BIT(4) 2963 #define HE_MODE_UL_OFDMA BIT(5) 2964 #define HE_MODE_UL_MUMIMO BIT(6) 2965 2966 #define HE_DL_MUOFDMA_ENABLE 1 2967 #define HE_UL_MUOFDMA_ENABLE 1 2968 #define HE_DL_MUMIMO_ENABLE 1 2969 #define HE_UL_MUMIMO_ENABLE 1 2970 #define HE_MU_BFEE_ENABLE 1 2971 #define HE_SU_BFEE_ENABLE 1 2972 #define HE_MU_BFER_ENABLE 1 2973 #define HE_SU_BFER_ENABLE 1 2974 2975 #define HE_VHT_SOUNDING_MODE_ENABLE 1 2976 #define HE_SU_MU_SOUNDING_MODE_ENABLE 1 2977 #define HE_TRIG_NONTRIG_SOUNDING_MODE_ENABLE 1 2978 2979 /* HE or VHT Sounding */ 2980 #define HE_VHT_SOUNDING_MODE BIT(0) 2981 /* SU or MU Sounding */ 2982 #define HE_SU_MU_SOUNDING_MODE BIT(2) 2983 /* Trig or Non-Trig Sounding */ 2984 #define HE_TRIG_NONTRIG_SOUNDING_MODE BIT(3) 2985 2986 #define WMI_TXBF_STS_CAP_OFFSET_LSB 4 2987 #define WMI_TXBF_STS_CAP_OFFSET_MASK 0x70 2988 #define WMI_BF_SOUND_DIM_OFFSET_LSB 8 2989 #define WMI_BF_SOUND_DIM_OFFSET_MASK 0x700 2990 2991 struct pdev_params { 2992 u32 param_id; 2993 u32 param_value; 2994 }; 2995 2996 enum wmi_peer_type { 2997 WMI_PEER_TYPE_DEFAULT = 0, 2998 WMI_PEER_TYPE_BSS = 1, 2999 WMI_PEER_TYPE_TDLS = 2, 3000 }; 3001 3002 struct wmi_peer_create_cmd { 3003 u32 tlv_header; 3004 u32 vdev_id; 3005 struct wmi_mac_addr peer_macaddr; 3006 u32 peer_type; 3007 } __packed; 3008 3009 struct wmi_peer_delete_cmd { 3010 u32 tlv_header; 3011 u32 vdev_id; 3012 struct wmi_mac_addr peer_macaddr; 3013 } __packed; 3014 3015 struct wmi_peer_reorder_queue_setup_cmd { 3016 u32 tlv_header; 3017 u32 vdev_id; 3018 struct wmi_mac_addr peer_macaddr; 3019 u32 tid; 3020 u32 queue_ptr_lo; 3021 u32 queue_ptr_hi; 3022 u32 queue_no; 3023 u32 ba_window_size_valid; 3024 u32 ba_window_size; 3025 } __packed; 3026 3027 struct wmi_peer_reorder_queue_remove_cmd { 3028 u32 tlv_header; 3029 u32 vdev_id; 3030 struct wmi_mac_addr peer_macaddr; 3031 u32 tid_mask; 3032 } __packed; 3033 3034 struct gpio_config_params { 3035 u32 gpio_num; 3036 u32 input; 3037 u32 pull_type; 3038 u32 intr_mode; 3039 }; 3040 3041 enum wmi_gpio_type { 3042 WMI_GPIO_PULL_NONE, 3043 WMI_GPIO_PULL_UP, 3044 WMI_GPIO_PULL_DOWN 3045 }; 3046 3047 enum wmi_gpio_intr_type { 3048 WMI_GPIO_INTTYPE_DISABLE, 3049 WMI_GPIO_INTTYPE_RISING_EDGE, 3050 WMI_GPIO_INTTYPE_FALLING_EDGE, 3051 WMI_GPIO_INTTYPE_BOTH_EDGE, 3052 WMI_GPIO_INTTYPE_LEVEL_LOW, 3053 WMI_GPIO_INTTYPE_LEVEL_HIGH 3054 }; 3055 3056 enum wmi_bss_chan_info_req_type { 3057 WMI_BSS_SURVEY_REQ_TYPE_READ = 1, 3058 WMI_BSS_SURVEY_REQ_TYPE_READ_CLEAR, 3059 }; 3060 3061 struct wmi_gpio_config_cmd_param { 3062 u32 tlv_header; 3063 u32 gpio_num; 3064 u32 input; 3065 u32 pull_type; 3066 u32 intr_mode; 3067 }; 3068 3069 struct gpio_output_params { 3070 u32 gpio_num; 3071 u32 set; 3072 }; 3073 3074 struct wmi_gpio_output_cmd_param { 3075 u32 tlv_header; 3076 u32 gpio_num; 3077 u32 set; 3078 }; 3079 3080 struct set_fwtest_params { 3081 u32 arg; 3082 u32 value; 3083 }; 3084 3085 struct wmi_fwtest_set_param_cmd_param { 3086 u32 tlv_header; 3087 u32 param_id; 3088 u32 param_value; 3089 }; 3090 3091 struct wmi_pdev_set_param_cmd { 3092 u32 tlv_header; 3093 u32 pdev_id; 3094 u32 param_id; 3095 u32 param_value; 3096 } __packed; 3097 3098 struct wmi_pdev_set_ps_mode_cmd { 3099 u32 tlv_header; 3100 u32 vdev_id; 3101 u32 sta_ps_mode; 3102 } __packed; 3103 3104 struct wmi_pdev_suspend_cmd { 3105 u32 tlv_header; 3106 u32 pdev_id; 3107 u32 suspend_opt; 3108 } __packed; 3109 3110 struct wmi_pdev_resume_cmd { 3111 u32 tlv_header; 3112 u32 pdev_id; 3113 } __packed; 3114 3115 struct wmi_pdev_bss_chan_info_req_cmd { 3116 u32 tlv_header; 3117 /* ref wmi_bss_chan_info_req_type */ 3118 u32 req_type; 3119 u32 pdev_id; 3120 } __packed; 3121 3122 struct wmi_ap_ps_peer_cmd { 3123 u32 tlv_header; 3124 u32 vdev_id; 3125 struct wmi_mac_addr peer_macaddr; 3126 u32 param; 3127 u32 value; 3128 } __packed; 3129 3130 struct wmi_sta_powersave_param_cmd { 3131 u32 tlv_header; 3132 u32 vdev_id; 3133 u32 param; 3134 u32 value; 3135 } __packed; 3136 3137 struct wmi_pdev_set_regdomain_cmd { 3138 u32 tlv_header; 3139 u32 pdev_id; 3140 u32 reg_domain; 3141 u32 reg_domain_2g; 3142 u32 reg_domain_5g; 3143 u32 conformance_test_limit_2g; 3144 u32 conformance_test_limit_5g; 3145 u32 dfs_domain; 3146 } __packed; 3147 3148 struct wmi_peer_set_param_cmd { 3149 u32 tlv_header; 3150 u32 vdev_id; 3151 struct wmi_mac_addr peer_macaddr; 3152 u32 param_id; 3153 u32 param_value; 3154 } __packed; 3155 3156 struct wmi_peer_flush_tids_cmd { 3157 u32 tlv_header; 3158 u32 vdev_id; 3159 struct wmi_mac_addr peer_macaddr; 3160 u32 peer_tid_bitmap; 3161 } __packed; 3162 3163 struct wmi_dfs_phyerr_offload_cmd { 3164 u32 tlv_header; 3165 u32 pdev_id; 3166 } __packed; 3167 3168 struct wmi_bcn_offload_ctrl_cmd { 3169 u32 tlv_header; 3170 u32 vdev_id; 3171 u32 bcn_ctrl_op; 3172 } __packed; 3173 3174 enum scan_dwelltime_adaptive_mode { 3175 SCAN_DWELL_MODE_DEFAULT = 0, 3176 SCAN_DWELL_MODE_CONSERVATIVE = 1, 3177 SCAN_DWELL_MODE_MODERATE = 2, 3178 SCAN_DWELL_MODE_AGGRESSIVE = 3, 3179 SCAN_DWELL_MODE_STATIC = 4 3180 }; 3181 3182 #define WLAN_SSID_MAX_LEN 32 3183 3184 struct element_info { 3185 u32 len; 3186 u8 *ptr; 3187 }; 3188 3189 struct wlan_ssid { 3190 u8 length; 3191 u8 ssid[WLAN_SSID_MAX_LEN]; 3192 }; 3193 3194 struct wmi_vdev_ch_power_info { 3195 u32 tlv_header; 3196 3197 /* Channel center frequency (MHz) */ 3198 u32 chan_cfreq; 3199 3200 /* Unit: dBm, either PSD/EIRP power for this frequency or 3201 * incremental for non-PSD BW 3202 */ 3203 u32 tx_power; 3204 } __packed; 3205 3206 struct wmi_vdev_set_tpc_power_cmd { 3207 u32 tlv_header; 3208 u32 vdev_id; 3209 3210 /* Value: 0 or 1, is PSD power or not */ 3211 u32 psd_power; 3212 3213 /* Maximum EIRP power (dBm units), valid only if power is PSD */ 3214 u32 eirp_power; 3215 3216 /* Type: WMI_6GHZ_REG_TYPE, used for halphy CTL lookup */ 3217 u32 power_type_6ghz; 3218 3219 /* This fixed_param TLV is followed by the below TLVs: 3220 * num_pwr_levels of wmi_vdev_ch_power_info 3221 * For PSD power, it is the PSD/EIRP power of the frequency (20 MHz chunks). 3222 * For non-PSD power, the power values are for 20, 40, and till 3223 * BSS BW power levels. 3224 * The num_pwr_levels will be checked by sw how many elements present 3225 * in the variable-length array. 3226 */ 3227 } __packed; 3228 3229 #define WMI_IE_BITMAP_SIZE 8 3230 3231 /* prefix used by scan requestor ids on the host */ 3232 #define WMI_HOST_SCAN_REQUESTOR_ID_PREFIX 0xA000 3233 3234 /* prefix used by scan request ids generated on the host */ 3235 /* host cycles through the lower 12 bits to generate ids */ 3236 #define WMI_HOST_SCAN_REQ_ID_PREFIX 0xA000 3237 3238 /* Values lower than this may be refused by some firmware revisions with a scan 3239 * completion with a timedout reason. 3240 */ 3241 #define WMI_SCAN_CHAN_MIN_TIME_MSEC 40 3242 3243 /* Scan priority numbers must be sequential, starting with 0 */ 3244 enum wmi_scan_priority { 3245 WMI_SCAN_PRIORITY_VERY_LOW = 0, 3246 WMI_SCAN_PRIORITY_LOW, 3247 WMI_SCAN_PRIORITY_MEDIUM, 3248 WMI_SCAN_PRIORITY_HIGH, 3249 WMI_SCAN_PRIORITY_VERY_HIGH, 3250 WMI_SCAN_PRIORITY_COUNT /* number of priorities supported */ 3251 }; 3252 3253 enum wmi_scan_event_type { 3254 WMI_SCAN_EVENT_STARTED = BIT(0), 3255 WMI_SCAN_EVENT_COMPLETED = BIT(1), 3256 WMI_SCAN_EVENT_BSS_CHANNEL = BIT(2), 3257 WMI_SCAN_EVENT_FOREIGN_CHAN = BIT(3), 3258 WMI_SCAN_EVENT_DEQUEUED = BIT(4), 3259 /* possibly by high-prio scan */ 3260 WMI_SCAN_EVENT_PREEMPTED = BIT(5), 3261 WMI_SCAN_EVENT_START_FAILED = BIT(6), 3262 WMI_SCAN_EVENT_RESTARTED = BIT(7), 3263 WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT = BIT(8), 3264 WMI_SCAN_EVENT_SUSPENDED = BIT(9), 3265 WMI_SCAN_EVENT_RESUMED = BIT(10), 3266 WMI_SCAN_EVENT_MAX = BIT(15), 3267 }; 3268 3269 enum wmi_scan_completion_reason { 3270 WMI_SCAN_REASON_COMPLETED, 3271 WMI_SCAN_REASON_CANCELLED, 3272 WMI_SCAN_REASON_PREEMPTED, 3273 WMI_SCAN_REASON_TIMEDOUT, 3274 WMI_SCAN_REASON_INTERNAL_FAILURE, 3275 WMI_SCAN_REASON_MAX, 3276 }; 3277 3278 struct wmi_start_scan_cmd { 3279 u32 tlv_header; 3280 u32 scan_id; 3281 u32 scan_req_id; 3282 u32 vdev_id; 3283 u32 scan_priority; 3284 u32 notify_scan_events; 3285 u32 dwell_time_active; 3286 u32 dwell_time_passive; 3287 u32 min_rest_time; 3288 u32 max_rest_time; 3289 u32 repeat_probe_time; 3290 u32 probe_spacing_time; 3291 u32 idle_time; 3292 u32 max_scan_time; 3293 u32 probe_delay; 3294 u32 scan_ctrl_flags; 3295 u32 burst_duration; 3296 u32 num_chan; 3297 u32 num_bssid; 3298 u32 num_ssids; 3299 u32 ie_len; 3300 u32 n_probes; 3301 struct wmi_mac_addr mac_addr; 3302 struct wmi_mac_addr mac_mask; 3303 u32 ie_bitmap[WMI_IE_BITMAP_SIZE]; 3304 u32 num_vendor_oui; 3305 u32 scan_ctrl_flags_ext; 3306 u32 dwell_time_active_2g; 3307 u32 dwell_time_active_6g; 3308 u32 dwell_time_passive_6g; 3309 u32 scan_start_offset; 3310 } __packed; 3311 3312 #define WMI_SCAN_FLAG_PASSIVE 0x1 3313 #define WMI_SCAN_ADD_BCAST_PROBE_REQ 0x2 3314 #define WMI_SCAN_ADD_CCK_RATES 0x4 3315 #define WMI_SCAN_ADD_OFDM_RATES 0x8 3316 #define WMI_SCAN_CHAN_STAT_EVENT 0x10 3317 #define WMI_SCAN_FILTER_PROBE_REQ 0x20 3318 #define WMI_SCAN_BYPASS_DFS_CHN 0x40 3319 #define WMI_SCAN_CONTINUE_ON_ERROR 0x80 3320 #define WMI_SCAN_FILTER_PROMISCUOS 0x100 3321 #define WMI_SCAN_FLAG_FORCE_ACTIVE_ON_DFS 0x200 3322 #define WMI_SCAN_ADD_TPC_IE_IN_PROBE_REQ 0x400 3323 #define WMI_SCAN_ADD_DS_IE_IN_PROBE_REQ 0x800 3324 #define WMI_SCAN_ADD_SPOOF_MAC_IN_PROBE_REQ 0x1000 3325 #define WMI_SCAN_OFFCHAN_MGMT_TX 0x2000 3326 #define WMI_SCAN_OFFCHAN_DATA_TX 0x4000 3327 #define WMI_SCAN_CAPTURE_PHY_ERROR 0x8000 3328 #define WMI_SCAN_FLAG_STRICT_PASSIVE_ON_PCHN 0x10000 3329 #define WMI_SCAN_FLAG_HALF_RATE_SUPPORT 0x20000 3330 #define WMI_SCAN_FLAG_QUARTER_RATE_SUPPORT 0x40000 3331 #define WMI_SCAN_RANDOM_SEQ_NO_IN_PROBE_REQ 0x80000 3332 #define WMI_SCAN_ENABLE_IE_WHTELIST_IN_PROBE_REQ 0x100000 3333 3334 #define WMI_SCAN_DWELL_MODE_MASK 0x00E00000 3335 #define WMI_SCAN_DWELL_MODE_SHIFT 21 3336 #define WMI_SCAN_FLAG_EXT_PASSIVE_SCAN_START_TIME_ENHANCE 0x00000800 3337 3338 #define WMI_SCAN_CONFIG_PER_CHANNEL_MASK GENMASK(19, 0) 3339 #define WMI_SCAN_CH_FLAG_SCAN_ONLY_IF_RNR_FOUND BIT(20) 3340 3341 enum { 3342 WMI_SCAN_DWELL_MODE_DEFAULT = 0, 3343 WMI_SCAN_DWELL_MODE_CONSERVATIVE = 1, 3344 WMI_SCAN_DWELL_MODE_MODERATE = 2, 3345 WMI_SCAN_DWELL_MODE_AGGRESSIVE = 3, 3346 WMI_SCAN_DWELL_MODE_STATIC = 4, 3347 }; 3348 3349 #define WMI_SCAN_SET_DWELL_MODE(flag, mode) \ 3350 ((flag) |= (((mode) << WMI_SCAN_DWELL_MODE_SHIFT) & \ 3351 WMI_SCAN_DWELL_MODE_MASK)) 3352 3353 struct hint_short_ssid { 3354 u32 freq_flags; 3355 u32 short_ssid; 3356 }; 3357 3358 struct hint_bssid { 3359 u32 freq_flags; 3360 struct wmi_mac_addr bssid; 3361 }; 3362 3363 struct scan_req_params { 3364 u32 scan_id; 3365 u32 scan_req_id; 3366 u32 vdev_id; 3367 u32 pdev_id; 3368 enum wmi_scan_priority scan_priority; 3369 u32 scan_ev_started:1, 3370 scan_ev_completed:1, 3371 scan_ev_bss_chan:1, 3372 scan_ev_foreign_chan:1, 3373 scan_ev_dequeued:1, 3374 scan_ev_preempted:1, 3375 scan_ev_start_failed:1, 3376 scan_ev_restarted:1, 3377 scan_ev_foreign_chn_exit:1, 3378 scan_ev_invalid:1, 3379 scan_ev_gpio_timeout:1, 3380 scan_ev_suspended:1, 3381 scan_ev_resumed:1; 3382 u32 scan_ctrl_flags_ext; 3383 u32 dwell_time_active; 3384 u32 dwell_time_active_2g; 3385 u32 dwell_time_passive; 3386 u32 dwell_time_active_6g; 3387 u32 dwell_time_passive_6g; 3388 u32 min_rest_time; 3389 u32 max_rest_time; 3390 u32 repeat_probe_time; 3391 u32 probe_spacing_time; 3392 u32 idle_time; 3393 u32 max_scan_time; 3394 u32 probe_delay; 3395 u32 scan_f_passive:1, 3396 scan_f_bcast_probe:1, 3397 scan_f_cck_rates:1, 3398 scan_f_ofdm_rates:1, 3399 scan_f_chan_stat_evnt:1, 3400 scan_f_filter_prb_req:1, 3401 scan_f_bypass_dfs_chn:1, 3402 scan_f_continue_on_err:1, 3403 scan_f_offchan_mgmt_tx:1, 3404 scan_f_offchan_data_tx:1, 3405 scan_f_promisc_mode:1, 3406 scan_f_capture_phy_err:1, 3407 scan_f_strict_passive_pch:1, 3408 scan_f_half_rate:1, 3409 scan_f_quarter_rate:1, 3410 scan_f_force_active_dfs_chn:1, 3411 scan_f_add_tpc_ie_in_probe:1, 3412 scan_f_add_ds_ie_in_probe:1, 3413 scan_f_add_spoofed_mac_in_probe:1, 3414 scan_f_add_rand_seq_in_probe:1, 3415 scan_f_en_ie_whitelist_in_probe:1, 3416 scan_f_forced:1, 3417 scan_f_2ghz:1, 3418 scan_f_5ghz:1, 3419 scan_f_80mhz:1; 3420 enum scan_dwelltime_adaptive_mode adaptive_dwell_time_mode; 3421 u32 burst_duration; 3422 u32 num_chan; 3423 u32 num_bssid; 3424 u32 num_ssids; 3425 u32 n_probes; 3426 u32 *chan_list; 3427 u32 notify_scan_events; 3428 struct wlan_ssid ssid[WLAN_SCAN_PARAMS_MAX_SSID]; 3429 struct wmi_mac_addr bssid_list[WLAN_SCAN_PARAMS_MAX_BSSID]; 3430 struct element_info extraie; 3431 struct element_info htcap; 3432 struct element_info vhtcap; 3433 u32 num_hint_s_ssid; 3434 u32 num_hint_bssid; 3435 struct hint_short_ssid hint_s_ssid[WLAN_SCAN_MAX_HINT_S_SSID]; 3436 struct hint_bssid hint_bssid[WLAN_SCAN_MAX_HINT_BSSID]; 3437 struct wmi_mac_addr mac_addr; 3438 struct wmi_mac_addr mac_mask; 3439 }; 3440 3441 struct wmi_ssid_arg { 3442 int len; 3443 const u8 *ssid; 3444 }; 3445 3446 struct wmi_bssid_arg { 3447 const u8 *bssid; 3448 }; 3449 3450 #define WMI_SCAN_STOP_ONE 0x00000000 3451 #define WMI_SCN_STOP_VAP_ALL 0x01000000 3452 #define WMI_SCAN_STOP_ALL 0x04000000 3453 3454 /* Prefix 0xA000 indicates that the scan request 3455 * is trigger by HOST 3456 */ 3457 #define ATH11K_SCAN_ID 0xA000 3458 3459 enum scan_cancel_req_type { 3460 WLAN_SCAN_CANCEL_SINGLE = 1, 3461 WLAN_SCAN_CANCEL_VDEV_ALL, 3462 WLAN_SCAN_CANCEL_PDEV_ALL, 3463 }; 3464 3465 struct scan_cancel_param { 3466 u32 requester; 3467 u32 scan_id; 3468 enum scan_cancel_req_type req_type; 3469 u32 vdev_id; 3470 u32 pdev_id; 3471 }; 3472 3473 #define WMI_CHAN_INFO_MODE GENMASK(5, 0) 3474 #define WMI_CHAN_INFO_HT40_PLUS BIT(6) 3475 #define WMI_CHAN_INFO_PASSIVE BIT(7) 3476 #define WMI_CHAN_INFO_ADHOC_ALLOWED BIT(8) 3477 #define WMI_CHAN_INFO_AP_DISABLED BIT(9) 3478 #define WMI_CHAN_INFO_DFS BIT(10) 3479 #define WMI_CHAN_INFO_ALLOW_HT BIT(11) 3480 #define WMI_CHAN_INFO_ALLOW_VHT BIT(12) 3481 #define WMI_CHAN_INFO_CHAN_CHANGE_CAUSE_CSA BIT(13) 3482 #define WMI_CHAN_INFO_HALF_RATE BIT(14) 3483 #define WMI_CHAN_INFO_QUARTER_RATE BIT(15) 3484 #define WMI_CHAN_INFO_DFS_FREQ2 BIT(16) 3485 #define WMI_CHAN_INFO_ALLOW_HE BIT(17) 3486 #define WMI_CHAN_INFO_PSC BIT(18) 3487 3488 #define WMI_CHAN_REG_INFO1_MIN_PWR GENMASK(7, 0) 3489 #define WMI_CHAN_REG_INFO1_MAX_PWR GENMASK(15, 8) 3490 #define WMI_CHAN_REG_INFO1_MAX_REG_PWR GENMASK(23, 16) 3491 #define WMI_CHAN_REG_INFO1_REG_CLS GENMASK(31, 24) 3492 3493 #define WMI_CHAN_REG_INFO2_ANT_MAX GENMASK(7, 0) 3494 #define WMI_CHAN_REG_INFO2_MAX_TX_PWR GENMASK(15, 8) 3495 3496 struct wmi_channel { 3497 u32 tlv_header; 3498 u32 mhz; 3499 u32 band_center_freq1; 3500 u32 band_center_freq2; 3501 u32 info; 3502 u32 reg_info_1; 3503 u32 reg_info_2; 3504 } __packed; 3505 3506 struct wmi_mgmt_params { 3507 void *tx_frame; 3508 u16 frm_len; 3509 u8 vdev_id; 3510 u16 chanfreq; 3511 void *pdata; 3512 u16 desc_id; 3513 u8 *macaddr; 3514 }; 3515 3516 enum wmi_sta_ps_mode { 3517 WMI_STA_PS_MODE_DISABLED = 0, 3518 WMI_STA_PS_MODE_ENABLED = 1, 3519 }; 3520 3521 #define WMI_SMPS_MASK_LOWER_16BITS 0xFF 3522 #define WMI_SMPS_MASK_UPPER_3BITS 0x7 3523 #define WMI_SMPS_PARAM_VALUE_SHIFT 29 3524 3525 #define ATH11K_WMI_FW_HANG_ASSERT_TYPE 1 3526 #define ATH11K_WMI_FW_HANG_DELAY 0 3527 3528 /* type, 0:unused 1: ASSERT 2: not respond detect command 3529 * delay_time_ms, the simulate will delay time 3530 */ 3531 3532 struct wmi_force_fw_hang_cmd { 3533 u32 tlv_header; 3534 u32 type; 3535 u32 delay_time_ms; 3536 }; 3537 3538 struct wmi_vdev_set_param_cmd { 3539 u32 tlv_header; 3540 u32 vdev_id; 3541 u32 param_id; 3542 u32 param_value; 3543 } __packed; 3544 3545 enum wmi_stats_id { 3546 WMI_REQUEST_PEER_STAT = BIT(0), 3547 WMI_REQUEST_AP_STAT = BIT(1), 3548 WMI_REQUEST_PDEV_STAT = BIT(2), 3549 WMI_REQUEST_VDEV_STAT = BIT(3), 3550 WMI_REQUEST_BCNFLT_STAT = BIT(4), 3551 WMI_REQUEST_VDEV_RATE_STAT = BIT(5), 3552 WMI_REQUEST_INST_STAT = BIT(6), 3553 WMI_REQUEST_MIB_STAT = BIT(7), 3554 WMI_REQUEST_RSSI_PER_CHAIN_STAT = BIT(8), 3555 WMI_REQUEST_CONGESTION_STAT = BIT(9), 3556 WMI_REQUEST_PEER_EXTD_STAT = BIT(10), 3557 WMI_REQUEST_BCN_STAT = BIT(11), 3558 WMI_REQUEST_BCN_STAT_RESET = BIT(12), 3559 WMI_REQUEST_PEER_EXTD2_STAT = BIT(13), 3560 }; 3561 3562 struct wmi_request_stats_cmd { 3563 u32 tlv_header; 3564 enum wmi_stats_id stats_id; 3565 u32 vdev_id; 3566 struct wmi_mac_addr peer_macaddr; 3567 u32 pdev_id; 3568 } __packed; 3569 3570 struct wmi_get_pdev_temperature_cmd { 3571 u32 tlv_header; 3572 u32 param; 3573 u32 pdev_id; 3574 } __packed; 3575 3576 struct wmi_ftm_seg_hdr { 3577 u32 len; 3578 u32 msgref; 3579 u32 segmentinfo; 3580 u32 pdev_id; 3581 } __packed; 3582 3583 struct wmi_ftm_cmd { 3584 u32 tlv_header; 3585 struct wmi_ftm_seg_hdr seg_hdr; 3586 u8 data[]; 3587 } __packed; 3588 3589 struct wmi_ftm_event_msg { 3590 struct wmi_ftm_seg_hdr seg_hdr; 3591 u8 data[]; 3592 } __packed; 3593 3594 #define WMI_P2P_MAX_NOA_DESCRIPTORS 4 3595 3596 struct wmi_p2p_noa_event { 3597 u32 vdev_id; 3598 } __packed; 3599 3600 struct ath11k_wmi_p2p_noa_descriptor { 3601 u32 type_count; /* 255: continuous schedule, 0: reserved */ 3602 u32 duration; /* Absent period duration in micro seconds */ 3603 u32 interval; /* Absent period interval in micro seconds */ 3604 u32 start_time; /* 32 bit tsf time when in starts */ 3605 } __packed; 3606 3607 #define WMI_P2P_NOA_INFO_CHANGED_FLAG BIT(0) 3608 #define WMI_P2P_NOA_INFO_INDEX GENMASK(15, 8) 3609 #define WMI_P2P_NOA_INFO_OPP_PS BIT(16) 3610 #define WMI_P2P_NOA_INFO_CTWIN_TU GENMASK(23, 17) 3611 #define WMI_P2P_NOA_INFO_DESC_NUM GENMASK(31, 24) 3612 3613 struct ath11k_wmi_p2p_noa_info { 3614 /* Bit 0 - Flag to indicate an update in NOA schedule 3615 * Bits 7-1 - Reserved 3616 * Bits 15-8 - Index (identifies the instance of NOA sub element) 3617 * Bit 16 - Opp PS state of the AP 3618 * Bits 23-17 - Ctwindow in TUs 3619 * Bits 31-24 - Number of NOA descriptors 3620 */ 3621 u32 noa_attr; 3622 struct ath11k_wmi_p2p_noa_descriptor descriptors[WMI_P2P_MAX_NOA_DESCRIPTORS]; 3623 } __packed; 3624 3625 #define WMI_BEACON_TX_BUFFER_SIZE 512 3626 3627 #define WMI_EMA_TMPL_IDX_SHIFT 8 3628 #define WMI_EMA_FIRST_TMPL_SHIFT 16 3629 #define WMI_EMA_LAST_TMPL_SHIFT 24 3630 3631 struct wmi_bcn_tmpl_cmd { 3632 u32 tlv_header; 3633 u32 vdev_id; 3634 u32 tim_ie_offset; 3635 u32 buf_len; 3636 u32 csa_switch_count_offset; 3637 u32 ext_csa_switch_count_offset; 3638 u32 csa_event_bitmap; 3639 u32 mbssid_ie_offset; 3640 u32 esp_ie_offset; 3641 u32 csc_switch_count_offset; 3642 u32 csc_event_bitmap; 3643 u32 mu_edca_ie_offset; 3644 u32 feature_enable_bitmap; 3645 u32 ema_params; 3646 } __packed; 3647 3648 struct wmi_p2p_go_set_beacon_ie_cmd { 3649 u32 tlv_header; 3650 u32 vdev_id; 3651 u32 ie_buf_len; 3652 u8 tlv[]; 3653 } __packed; 3654 3655 struct wmi_key_seq_counter { 3656 u32 key_seq_counter_l; 3657 u32 key_seq_counter_h; 3658 } __packed; 3659 3660 struct wmi_vdev_install_key_cmd { 3661 u32 tlv_header; 3662 u32 vdev_id; 3663 struct wmi_mac_addr peer_macaddr; 3664 u32 key_idx; 3665 u32 key_flags; 3666 u32 key_cipher; 3667 struct wmi_key_seq_counter key_rsc_counter; 3668 struct wmi_key_seq_counter key_global_rsc_counter; 3669 struct wmi_key_seq_counter key_tsc_counter; 3670 u8 wpi_key_rsc_counter[16]; 3671 u8 wpi_key_tsc_counter[16]; 3672 u32 key_len; 3673 u32 key_txmic_len; 3674 u32 key_rxmic_len; 3675 u32 is_group_key_id_valid; 3676 u32 group_key_id; 3677 3678 /* Followed by key_data containing key followed by 3679 * tx mic and then rx mic 3680 */ 3681 } __packed; 3682 3683 struct wmi_vdev_install_key_arg { 3684 u32 vdev_id; 3685 const u8 *macaddr; 3686 u32 key_idx; 3687 u32 key_flags; 3688 u32 key_cipher; 3689 u32 key_len; 3690 u32 key_txmic_len; 3691 u32 key_rxmic_len; 3692 u64 key_rsc_counter; 3693 const void *key_data; 3694 }; 3695 3696 #define WMI_MAX_SUPPORTED_RATES 128 3697 #define WMI_HOST_MAX_HECAP_PHY_SIZE 3 3698 #define WMI_HOST_MAX_HE_RATE_SET 3 3699 #define WMI_HECAP_TXRX_MCS_NSS_IDX_80 0 3700 #define WMI_HECAP_TXRX_MCS_NSS_IDX_160 1 3701 #define WMI_HECAP_TXRX_MCS_NSS_IDX_80_80 2 3702 3703 struct wmi_rate_set_arg { 3704 u32 num_rates; 3705 u8 rates[WMI_MAX_SUPPORTED_RATES]; 3706 }; 3707 3708 struct peer_assoc_params { 3709 struct wmi_mac_addr peer_macaddr; 3710 u32 vdev_id; 3711 u32 peer_new_assoc; 3712 u32 peer_associd; 3713 u32 peer_flags; 3714 u32 peer_caps; 3715 u32 peer_listen_intval; 3716 u32 peer_ht_caps; 3717 u32 peer_max_mpdu; 3718 u32 peer_mpdu_density; 3719 u32 peer_rate_caps; 3720 u32 peer_nss; 3721 u32 peer_vht_caps; 3722 u32 peer_phymode; 3723 u32 peer_ht_info[2]; 3724 struct wmi_rate_set_arg peer_legacy_rates; 3725 struct wmi_rate_set_arg peer_ht_rates; 3726 u32 rx_max_rate; 3727 u32 rx_mcs_set; 3728 u32 tx_max_rate; 3729 u32 tx_mcs_set; 3730 u8 vht_capable; 3731 u8 min_data_rate; 3732 u32 tx_max_mcs_nss; 3733 u32 peer_bw_rxnss_override; 3734 bool is_pmf_enabled; 3735 bool is_wme_set; 3736 bool qos_flag; 3737 bool apsd_flag; 3738 bool ht_flag; 3739 bool bw_40; 3740 bool bw_80; 3741 bool bw_160; 3742 bool stbc_flag; 3743 bool ldpc_flag; 3744 bool static_mimops_flag; 3745 bool dynamic_mimops_flag; 3746 bool spatial_mux_flag; 3747 bool vht_flag; 3748 bool vht_ng_flag; 3749 bool need_ptk_4_way; 3750 bool need_gtk_2_way; 3751 bool auth_flag; 3752 bool safe_mode_enabled; 3753 bool amsdu_disable; 3754 /* Use common structure */ 3755 u8 peer_mac[ETH_ALEN]; 3756 3757 bool he_flag; 3758 u32 peer_he_cap_macinfo[2]; 3759 u32 peer_he_cap_macinfo_internal; 3760 u32 peer_he_caps_6ghz; 3761 u32 peer_he_ops; 3762 u32 peer_he_cap_phyinfo[WMI_HOST_MAX_HECAP_PHY_SIZE]; 3763 u32 peer_he_mcs_count; 3764 u32 peer_he_rx_mcs_set[WMI_HOST_MAX_HE_RATE_SET]; 3765 u32 peer_he_tx_mcs_set[WMI_HOST_MAX_HE_RATE_SET]; 3766 bool twt_responder; 3767 bool twt_requester; 3768 bool is_assoc; 3769 struct ath11k_ppe_threshold peer_ppet; 3770 }; 3771 3772 struct wmi_peer_assoc_complete_cmd { 3773 u32 tlv_header; 3774 struct wmi_mac_addr peer_macaddr; 3775 u32 vdev_id; 3776 u32 peer_new_assoc; 3777 u32 peer_associd; 3778 u32 peer_flags; 3779 u32 peer_caps; 3780 u32 peer_listen_intval; 3781 u32 peer_ht_caps; 3782 u32 peer_max_mpdu; 3783 u32 peer_mpdu_density; 3784 u32 peer_rate_caps; 3785 u32 peer_nss; 3786 u32 peer_vht_caps; 3787 u32 peer_phymode; 3788 u32 peer_ht_info[2]; 3789 u32 num_peer_legacy_rates; 3790 u32 num_peer_ht_rates; 3791 u32 peer_bw_rxnss_override; 3792 struct wmi_ppe_threshold peer_ppet; 3793 u32 peer_he_cap_info; 3794 u32 peer_he_ops; 3795 u32 peer_he_cap_phy[WMI_MAX_HECAP_PHY_SIZE]; 3796 u32 peer_he_mcs; 3797 u32 peer_he_cap_info_ext; 3798 u32 peer_he_cap_info_internal; 3799 u32 min_data_rate; 3800 u32 peer_he_caps_6ghz; 3801 } __packed; 3802 3803 struct wmi_stop_scan_cmd { 3804 u32 tlv_header; 3805 u32 requestor; 3806 u32 scan_id; 3807 u32 req_type; 3808 u32 vdev_id; 3809 u32 pdev_id; 3810 }; 3811 3812 struct scan_chan_list_params { 3813 struct list_head list; 3814 u32 pdev_id; 3815 u16 nallchans; 3816 struct channel_param ch_param[]; 3817 }; 3818 3819 struct wmi_scan_chan_list_cmd { 3820 u32 tlv_header; 3821 u32 num_scan_chans; 3822 u32 flags; 3823 u32 pdev_id; 3824 } __packed; 3825 3826 struct wmi_scan_prob_req_oui_cmd { 3827 u32 tlv_header; 3828 u32 prob_req_oui; 3829 } __packed; 3830 3831 #define WMI_MGMT_SEND_DOWNLD_LEN 64 3832 3833 #define WMI_TX_PARAMS_DWORD0_POWER GENMASK(7, 0) 3834 #define WMI_TX_PARAMS_DWORD0_MCS_MASK GENMASK(19, 8) 3835 #define WMI_TX_PARAMS_DWORD0_NSS_MASK GENMASK(27, 20) 3836 #define WMI_TX_PARAMS_DWORD0_RETRY_LIMIT GENMASK(31, 28) 3837 3838 #define WMI_TX_PARAMS_DWORD1_CHAIN_MASK GENMASK(7, 0) 3839 #define WMI_TX_PARAMS_DWORD1_BW_MASK GENMASK(14, 8) 3840 #define WMI_TX_PARAMS_DWORD1_PREAMBLE_TYPE GENMASK(19, 15) 3841 #define WMI_TX_PARAMS_DWORD1_FRAME_TYPE BIT(20) 3842 #define WMI_TX_PARAMS_DWORD1_CFR_CAPTURE BIT(21) 3843 #define WMI_TX_PARAMS_DWORD1_RSVD GENMASK(31, 22) 3844 3845 struct wmi_mgmt_send_params { 3846 u32 tlv_header; 3847 u32 tx_params_dword0; 3848 u32 tx_params_dword1; 3849 }; 3850 3851 struct wmi_mgmt_send_cmd { 3852 u32 tlv_header; 3853 u32 vdev_id; 3854 u32 desc_id; 3855 u32 chanfreq; 3856 u32 paddr_lo; 3857 u32 paddr_hi; 3858 u32 frame_len; 3859 u32 buf_len; 3860 u32 tx_params_valid; 3861 3862 /* This TLV is followed by struct wmi_mgmt_frame */ 3863 3864 /* Followed by struct wmi_mgmt_send_params */ 3865 } __packed; 3866 3867 struct wmi_sta_powersave_mode_cmd { 3868 u32 tlv_header; 3869 u32 vdev_id; 3870 u32 sta_ps_mode; 3871 }; 3872 3873 struct wmi_sta_smps_force_mode_cmd { 3874 u32 tlv_header; 3875 u32 vdev_id; 3876 u32 forced_mode; 3877 }; 3878 3879 struct wmi_sta_smps_param_cmd { 3880 u32 tlv_header; 3881 u32 vdev_id; 3882 u32 param; 3883 u32 value; 3884 }; 3885 3886 struct wmi_bcn_prb_info { 3887 u32 tlv_header; 3888 u32 caps; 3889 u32 erp; 3890 } __packed; 3891 3892 enum { 3893 WMI_PDEV_SUSPEND, 3894 WMI_PDEV_SUSPEND_AND_DISABLE_INTR, 3895 }; 3896 3897 struct green_ap_ps_params { 3898 u32 value; 3899 }; 3900 3901 struct wmi_pdev_green_ap_ps_enable_cmd_param { 3902 u32 tlv_header; 3903 u32 pdev_id; 3904 u32 enable; 3905 }; 3906 3907 struct ap_ps_params { 3908 u32 vdev_id; 3909 u32 param; 3910 u32 value; 3911 }; 3912 3913 struct vdev_set_params { 3914 u32 if_id; 3915 u32 param_id; 3916 u32 param_value; 3917 }; 3918 3919 struct stats_request_params { 3920 u32 stats_id; 3921 u32 vdev_id; 3922 u32 pdev_id; 3923 }; 3924 3925 struct wmi_set_current_country_params { 3926 u8 alpha2[3]; 3927 }; 3928 3929 struct wmi_set_current_country_cmd { 3930 u32 tlv_header; 3931 u32 pdev_id; 3932 u32 new_alpha2; 3933 } __packed; 3934 3935 enum set_init_cc_type { 3936 WMI_COUNTRY_INFO_TYPE_ALPHA, 3937 WMI_COUNTRY_INFO_TYPE_COUNTRY_CODE, 3938 WMI_COUNTRY_INFO_TYPE_REGDOMAIN, 3939 }; 3940 3941 enum set_init_cc_flags { 3942 INVALID_CC, 3943 CC_IS_SET, 3944 REGDMN_IS_SET, 3945 ALPHA_IS_SET, 3946 }; 3947 3948 struct wmi_init_country_params { 3949 union { 3950 u16 country_code; 3951 u16 regdom_id; 3952 u8 alpha2[3]; 3953 } cc_info; 3954 enum set_init_cc_flags flags; 3955 }; 3956 3957 struct wmi_init_country_cmd { 3958 u32 tlv_header; 3959 u32 pdev_id; 3960 u32 init_cc_type; 3961 union { 3962 u32 country_code; 3963 u32 regdom_id; 3964 u32 alpha2; 3965 } cc_info; 3966 } __packed; 3967 3968 struct wmi_11d_scan_start_params { 3969 u32 vdev_id; 3970 u32 scan_period_msec; 3971 u32 start_interval_msec; 3972 }; 3973 3974 struct wmi_11d_scan_start_cmd { 3975 u32 tlv_header; 3976 u32 vdev_id; 3977 u32 scan_period_msec; 3978 u32 start_interval_msec; 3979 } __packed; 3980 3981 struct wmi_11d_scan_stop_cmd { 3982 u32 tlv_header; 3983 u32 vdev_id; 3984 } __packed; 3985 3986 struct wmi_11d_new_cc_ev { 3987 u32 new_alpha2; 3988 } __packed; 3989 3990 #define THERMAL_LEVELS 1 3991 struct tt_level_config { 3992 u32 tmplwm; 3993 u32 tmphwm; 3994 u32 dcoffpercent; 3995 u32 priority; 3996 }; 3997 3998 struct thermal_mitigation_params { 3999 u32 pdev_id; 4000 u32 enable; 4001 u32 dc; 4002 u32 dc_per_event; 4003 struct tt_level_config levelconf[THERMAL_LEVELS]; 4004 }; 4005 4006 struct wmi_therm_throt_config_request_cmd { 4007 u32 tlv_header; 4008 u32 pdev_id; 4009 u32 enable; 4010 u32 dc; 4011 u32 dc_per_event; 4012 u32 therm_throt_levels; 4013 } __packed; 4014 4015 struct wmi_therm_throt_level_config_info { 4016 u32 tlv_header; 4017 u32 temp_lwm; 4018 u32 temp_hwm; 4019 u32 dc_off_percent; 4020 u32 prio; 4021 } __packed; 4022 4023 struct wmi_delba_send_cmd { 4024 u32 tlv_header; 4025 u32 vdev_id; 4026 struct wmi_mac_addr peer_macaddr; 4027 u32 tid; 4028 u32 initiator; 4029 u32 reasoncode; 4030 } __packed; 4031 4032 struct wmi_addba_setresponse_cmd { 4033 u32 tlv_header; 4034 u32 vdev_id; 4035 struct wmi_mac_addr peer_macaddr; 4036 u32 tid; 4037 u32 statuscode; 4038 } __packed; 4039 4040 struct wmi_addba_send_cmd { 4041 u32 tlv_header; 4042 u32 vdev_id; 4043 struct wmi_mac_addr peer_macaddr; 4044 u32 tid; 4045 u32 buffersize; 4046 } __packed; 4047 4048 struct wmi_addba_clear_resp_cmd { 4049 u32 tlv_header; 4050 u32 vdev_id; 4051 struct wmi_mac_addr peer_macaddr; 4052 } __packed; 4053 4054 struct wmi_pdev_pktlog_filter_info { 4055 u32 tlv_header; 4056 struct wmi_mac_addr peer_macaddr; 4057 } __packed; 4058 4059 struct wmi_pdev_pktlog_filter_cmd { 4060 u32 tlv_header; 4061 u32 pdev_id; 4062 u32 enable; 4063 u32 filter_type; 4064 u32 num_mac; 4065 } __packed; 4066 4067 enum ath11k_wmi_pktlog_enable { 4068 ATH11K_WMI_PKTLOG_ENABLE_AUTO = 0, 4069 ATH11K_WMI_PKTLOG_ENABLE_FORCE = 1, 4070 }; 4071 4072 struct wmi_pktlog_enable_cmd { 4073 u32 tlv_header; 4074 u32 pdev_id; 4075 u32 evlist; /* WMI_PKTLOG_EVENT */ 4076 u32 enable; 4077 } __packed; 4078 4079 struct wmi_pktlog_disable_cmd { 4080 u32 tlv_header; 4081 u32 pdev_id; 4082 } __packed; 4083 4084 #define DFS_PHYERR_UNIT_TEST_CMD 0 4085 #define DFS_UNIT_TEST_MODULE 0x2b 4086 #define DFS_UNIT_TEST_TOKEN 0xAA 4087 4088 enum dfs_test_args_idx { 4089 DFS_TEST_CMDID = 0, 4090 DFS_TEST_PDEV_ID, 4091 DFS_TEST_RADAR_PARAM, 4092 DFS_MAX_TEST_ARGS, 4093 }; 4094 4095 struct wmi_dfs_unit_test_arg { 4096 u32 cmd_id; 4097 u32 pdev_id; 4098 u32 radar_param; 4099 }; 4100 4101 struct wmi_unit_test_cmd { 4102 u32 tlv_header; 4103 u32 vdev_id; 4104 u32 module_id; 4105 u32 num_args; 4106 u32 diag_token; 4107 /* Followed by test args*/ 4108 } __packed; 4109 4110 #define MAX_SUPPORTED_RATES 128 4111 4112 struct beacon_tmpl_params { 4113 u8 vdev_id; 4114 u32 tim_ie_offset; 4115 u32 tmpl_len; 4116 u32 tmpl_len_aligned; 4117 u32 csa_switch_count_offset; 4118 u32 ext_csa_switch_count_offset; 4119 u8 *frm; 4120 }; 4121 4122 struct wmi_rate_set { 4123 u32 num_rates; 4124 u32 rates[(MAX_SUPPORTED_RATES / 4) + 1]; 4125 }; 4126 4127 struct wmi_vht_rate_set { 4128 u32 tlv_header; 4129 u32 rx_max_rate; 4130 /* MCS at which the peer can transmit */ 4131 u32 rx_mcs_set; 4132 u32 tx_max_rate; 4133 /* MCS at which the peer can receive */ 4134 u32 tx_mcs_set; 4135 u32 tx_max_mcs_nss; 4136 } __packed; 4137 4138 struct wmi_he_rate_set { 4139 u32 tlv_header; 4140 4141 /* MCS at which the peer can receive */ 4142 u32 rx_mcs_set; 4143 4144 /* MCS at which the peer can transmit */ 4145 u32 tx_mcs_set; 4146 } __packed; 4147 4148 #define MAX_REG_RULES 10 4149 #define REG_ALPHA2_LEN 2 4150 #define MAX_6GHZ_REG_RULES 5 4151 4152 enum wmi_start_event_param { 4153 WMI_VDEV_START_RESP_EVENT = 0, 4154 WMI_VDEV_RESTART_RESP_EVENT, 4155 }; 4156 4157 struct wmi_vdev_start_resp_event { 4158 u32 vdev_id; 4159 u32 requestor_id; 4160 enum wmi_start_event_param resp_type; 4161 u32 status; 4162 u32 chain_mask; 4163 u32 smps_mode; 4164 union { 4165 u32 mac_id; 4166 u32 pdev_id; 4167 }; 4168 u32 cfgd_tx_streams; 4169 u32 cfgd_rx_streams; 4170 s32 max_allowed_tx_power; 4171 } __packed; 4172 4173 /* VDEV start response status codes */ 4174 enum wmi_vdev_start_resp_status_code { 4175 WMI_VDEV_START_RESPONSE_STATUS_SUCCESS = 0, 4176 WMI_VDEV_START_RESPONSE_INVALID_VDEVID = 1, 4177 WMI_VDEV_START_RESPONSE_NOT_SUPPORTED = 2, 4178 WMI_VDEV_START_RESPONSE_DFS_VIOLATION = 3, 4179 WMI_VDEV_START_RESPONSE_INVALID_REGDOMAIN = 4, 4180 }; 4181 4182 /* Regaulatory Rule Flags Passed by FW */ 4183 #define REGULATORY_CHAN_DISABLED BIT(0) 4184 #define REGULATORY_CHAN_NO_IR BIT(1) 4185 #define REGULATORY_CHAN_RADAR BIT(3) 4186 #define REGULATORY_CHAN_NO_OFDM BIT(6) 4187 #define REGULATORY_CHAN_INDOOR_ONLY BIT(9) 4188 4189 #define REGULATORY_CHAN_NO_HT40 BIT(4) 4190 #define REGULATORY_CHAN_NO_80MHZ BIT(7) 4191 #define REGULATORY_CHAN_NO_160MHZ BIT(8) 4192 #define REGULATORY_CHAN_NO_20MHZ BIT(11) 4193 #define REGULATORY_CHAN_NO_10MHZ BIT(12) 4194 4195 enum wmi_reg_chan_list_cmd_type { 4196 WMI_REG_CHAN_LIST_CC_ID = 0, 4197 WMI_REG_CHAN_LIST_CC_EXT_ID = 1, 4198 }; 4199 4200 enum wmi_reg_cc_setting_code { 4201 WMI_REG_SET_CC_STATUS_PASS = 0, 4202 WMI_REG_CURRENT_ALPHA2_NOT_FOUND = 1, 4203 WMI_REG_INIT_ALPHA2_NOT_FOUND = 2, 4204 WMI_REG_SET_CC_CHANGE_NOT_ALLOWED = 3, 4205 WMI_REG_SET_CC_STATUS_NO_MEMORY = 4, 4206 WMI_REG_SET_CC_STATUS_FAIL = 5, 4207 4208 /* add new setting code above, update in 4209 * @enum cc_setting_code as well. 4210 * Also handle it in ath11k_wmi_cc_setting_code_to_reg() 4211 */ 4212 }; 4213 4214 enum cc_setting_code { 4215 REG_SET_CC_STATUS_PASS = 0, 4216 REG_CURRENT_ALPHA2_NOT_FOUND = 1, 4217 REG_INIT_ALPHA2_NOT_FOUND = 2, 4218 REG_SET_CC_CHANGE_NOT_ALLOWED = 3, 4219 REG_SET_CC_STATUS_NO_MEMORY = 4, 4220 REG_SET_CC_STATUS_FAIL = 5, 4221 4222 /* add new setting code above, update in 4223 * @enum wmi_reg_cc_setting_code as well. 4224 * Also handle it in ath11k_cc_status_to_str() 4225 */ 4226 }; 4227 4228 enum ath11k_wmi_cfr_capture_bw { 4229 WMI_PEER_CFR_CAPTURE_BW_20, 4230 WMI_PEER_CFR_CAPTURE_BW_40, 4231 WMI_PEER_CFR_CAPTURE_BW_80, 4232 WMI_PEER_CFR_CAPTURE_BW_MAX, 4233 }; 4234 4235 enum ath11k_wmi_cfr_capture_method { 4236 WMI_CFR_CAPTURE_METHOD_NULL_FRAME, 4237 WMI_CFR_CAPTURE_METHOD_NULL_FRAME_WITH_PHASE, 4238 WMI_CFR_CAPTURE_METHOD_PROBE_RESP, 4239 WMI_CFR_CAPTURE_METHOD_MAX, 4240 }; 4241 4242 #define WMI_CFR_FRAME_TX_STATUS GENMASK(1, 0) 4243 #define WMI_CFR_CAPTURE_STATUS_PEER_PS BIT(30) 4244 #define WMI_CFR_PEER_CAPTURE_STATUS BIT(31) 4245 4246 #define WMI_CFR_CORRELATION_INFO2_BUF_ADDR_HIGH GENMASK(3, 0) 4247 #define WMI_CFR_CORRELATION_INFO2_PPDU_ID GENMASK(31, 16) 4248 4249 #define WMI_CFR_CFO_MEASUREMENT_VALID BIT(0) 4250 #define WMI_CFR_CFO_MEASUREMENT_RAW_DATA GENMASK(14, 1) 4251 4252 struct ath11k_wmi_cfr_peer_tx_event_param { 4253 u32 capture_method; 4254 u32 vdev_id; 4255 struct wmi_mac_addr mac_addr; 4256 u32 chan_mhz; 4257 u32 bandwidth; 4258 u32 phy_mode; 4259 u32 band_center_freq1; 4260 u32 band_center_freq2; 4261 u32 sts_count; 4262 u32 correlation_info_1; 4263 u32 correlation_info_2; 4264 u32 status; 4265 u32 timestamp_us; 4266 u32 counter; 4267 u32 chain_rssi[WMI_MAX_CHAINS]; 4268 u32 cfo_measurement; 4269 u32 rx_start_ts; 4270 } __packed; 4271 4272 struct ath11k_wmi_cfr_peer_tx_event_phase_param { 4273 u32 chain_phase[WMI_MAX_CHAINS]; 4274 u8 agc_gain[WMI_MAX_CHAINS]; 4275 } __packed; 4276 4277 enum ath11k_wmi_frame_tx_status { 4278 WMI_FRAME_TX_STATUS_OK, 4279 WMI_FRAME_TX_STATUS_XRETRY, 4280 WMI_FRAME_TX_STATUS_DROP, 4281 WMI_FRAME_TX_STATUS_FILTERED, 4282 }; 4283 4284 struct wmi_peer_cfr_capture_conf_arg { 4285 enum ath11k_wmi_cfr_capture_bw bw; 4286 enum ath11k_wmi_cfr_capture_method method; 4287 u32 request; 4288 u32 periodicity; 4289 }; 4290 4291 struct wmi_peer_cfr_capture_cmd_fixed_param { 4292 u32 tlv_header; 4293 u32 request; 4294 struct wmi_mac_addr mac_addr; 4295 u32 vdev_id; 4296 u32 periodicity; 4297 /* BW of measurement - of type enum ath11k_wmi_cfr_capture_bw */ 4298 u32 bandwidth; 4299 /* Method used to capture CFR - of type enum ath11k_wmi_cfr_capture_method */ 4300 u32 capture_method; 4301 } __packed; 4302 4303 #define WMI_PEER_CFR_CAPTURE_ENABLE 1 4304 #define WMI_PEER_CFR_CAPTURE_DISABLE 0 4305 4306 /*periodicity in ms */ 4307 #define WMI_PEER_CFR_PERIODICITY_MAX 600000 4308 4309 static inline enum cc_setting_code 4310 ath11k_wmi_cc_setting_code_to_reg(enum wmi_reg_cc_setting_code status_code) 4311 { 4312 switch (status_code) { 4313 case WMI_REG_SET_CC_STATUS_PASS: 4314 return REG_SET_CC_STATUS_PASS; 4315 case WMI_REG_CURRENT_ALPHA2_NOT_FOUND: 4316 return REG_CURRENT_ALPHA2_NOT_FOUND; 4317 case WMI_REG_INIT_ALPHA2_NOT_FOUND: 4318 return REG_INIT_ALPHA2_NOT_FOUND; 4319 case WMI_REG_SET_CC_CHANGE_NOT_ALLOWED: 4320 return REG_SET_CC_CHANGE_NOT_ALLOWED; 4321 case WMI_REG_SET_CC_STATUS_NO_MEMORY: 4322 return REG_SET_CC_STATUS_NO_MEMORY; 4323 case WMI_REG_SET_CC_STATUS_FAIL: 4324 return REG_SET_CC_STATUS_FAIL; 4325 } 4326 4327 return REG_SET_CC_STATUS_FAIL; 4328 } 4329 4330 static inline const char *ath11k_cc_status_to_str(enum cc_setting_code code) 4331 { 4332 switch (code) { 4333 case REG_SET_CC_STATUS_PASS: 4334 return "REG_SET_CC_STATUS_PASS"; 4335 case REG_CURRENT_ALPHA2_NOT_FOUND: 4336 return "REG_CURRENT_ALPHA2_NOT_FOUND"; 4337 case REG_INIT_ALPHA2_NOT_FOUND: 4338 return "REG_INIT_ALPHA2_NOT_FOUND"; 4339 case REG_SET_CC_CHANGE_NOT_ALLOWED: 4340 return "REG_SET_CC_CHANGE_NOT_ALLOWED"; 4341 case REG_SET_CC_STATUS_NO_MEMORY: 4342 return "REG_SET_CC_STATUS_NO_MEMORY"; 4343 case REG_SET_CC_STATUS_FAIL: 4344 return "REG_SET_CC_STATUS_FAIL"; 4345 } 4346 4347 return "Unknown CC status"; 4348 } 4349 4350 enum wmi_reg_6ghz_ap_type { 4351 WMI_REG_INDOOR_AP = 0, 4352 WMI_REG_STANDARD_POWER_AP = 1, 4353 WMI_REG_VERY_LOW_POWER_AP = 2, 4354 4355 /* add AP type above, handle in ath11k_6ghz_ap_type_to_str() 4356 */ 4357 WMI_REG_CURRENT_MAX_AP_TYPE, 4358 WMI_REG_MAX_AP_TYPE = 7, 4359 }; 4360 4361 static inline const char * 4362 ath11k_6ghz_ap_type_to_str(enum wmi_reg_6ghz_ap_type type) 4363 { 4364 switch (type) { 4365 case WMI_REG_INDOOR_AP: 4366 return "INDOOR AP"; 4367 case WMI_REG_STANDARD_POWER_AP: 4368 return "STANDARD POWER AP"; 4369 case WMI_REG_VERY_LOW_POWER_AP: 4370 return "VERY LOW POWER AP"; 4371 case WMI_REG_CURRENT_MAX_AP_TYPE: 4372 return "CURRENT_MAX_AP_TYPE"; 4373 case WMI_REG_MAX_AP_TYPE: 4374 return "MAX_AP_TYPE"; 4375 } 4376 4377 return "unknown 6 GHz AP type"; 4378 } 4379 4380 enum wmi_reg_6ghz_client_type { 4381 WMI_REG_DEFAULT_CLIENT = 0, 4382 WMI_REG_SUBORDINATE_CLIENT = 1, 4383 WMI_REG_MAX_CLIENT_TYPE = 2, 4384 4385 /* add client type above, handle it in 4386 * ath11k_6ghz_client_type_to_str() 4387 */ 4388 }; 4389 4390 static inline const char * 4391 ath11k_6ghz_client_type_to_str(enum wmi_reg_6ghz_client_type type) 4392 { 4393 switch (type) { 4394 case WMI_REG_DEFAULT_CLIENT: 4395 return "DEFAULT CLIENT"; 4396 case WMI_REG_SUBORDINATE_CLIENT: 4397 return "SUBORDINATE CLIENT"; 4398 case WMI_REG_MAX_CLIENT_TYPE: 4399 return "MAX_CLIENT_TYPE"; 4400 } 4401 4402 return "unknown 6 GHz client type"; 4403 } 4404 4405 enum reg_subdomains_6ghz { 4406 EMPTY_6GHZ = 0x0, 4407 FCC1_CLIENT_LPI_REGULAR_6GHZ = 0x01, 4408 FCC1_CLIENT_SP_6GHZ = 0x02, 4409 FCC1_AP_LPI_6GHZ = 0x03, 4410 FCC1_CLIENT_LPI_SUBORDINATE = FCC1_AP_LPI_6GHZ, 4411 FCC1_AP_SP_6GHZ = 0x04, 4412 ETSI1_LPI_6GHZ = 0x10, 4413 ETSI1_VLP_6GHZ = 0x11, 4414 ETSI2_LPI_6GHZ = 0x12, 4415 ETSI2_VLP_6GHZ = 0x13, 4416 APL1_LPI_6GHZ = 0x20, 4417 APL1_VLP_6GHZ = 0x21, 4418 4419 /* add sub-domain above, handle it in 4420 * ath11k_sub_reg_6ghz_to_str() 4421 */ 4422 }; 4423 4424 static inline const char * 4425 ath11k_sub_reg_6ghz_to_str(enum reg_subdomains_6ghz sub_id) 4426 { 4427 switch (sub_id) { 4428 case EMPTY_6GHZ: 4429 return "N/A"; 4430 case FCC1_CLIENT_LPI_REGULAR_6GHZ: 4431 return "FCC1_CLIENT_LPI_REGULAR_6GHZ"; 4432 case FCC1_CLIENT_SP_6GHZ: 4433 return "FCC1_CLIENT_SP_6GHZ"; 4434 case FCC1_AP_LPI_6GHZ: 4435 return "FCC1_AP_LPI_6GHZ/FCC1_CLIENT_LPI_SUBORDINATE"; 4436 case FCC1_AP_SP_6GHZ: 4437 return "FCC1_AP_SP_6GHZ"; 4438 case ETSI1_LPI_6GHZ: 4439 return "ETSI1_LPI_6GHZ"; 4440 case ETSI1_VLP_6GHZ: 4441 return "ETSI1_VLP_6GHZ"; 4442 case ETSI2_LPI_6GHZ: 4443 return "ETSI2_LPI_6GHZ"; 4444 case ETSI2_VLP_6GHZ: 4445 return "ETSI2_VLP_6GHZ"; 4446 case APL1_LPI_6GHZ: 4447 return "APL1_LPI_6GHZ"; 4448 case APL1_VLP_6GHZ: 4449 return "APL1_VLP_6GHZ"; 4450 } 4451 4452 return "unknown sub reg id"; 4453 } 4454 4455 enum reg_super_domain_6ghz { 4456 FCC1_6GHZ = 0x01, 4457 ETSI1_6GHZ = 0x02, 4458 ETSI2_6GHZ = 0x03, 4459 APL1_6GHZ = 0x04, 4460 FCC1_6GHZ_CL = 0x05, 4461 4462 /* add super domain above, handle it in 4463 * ath11k_super_reg_6ghz_to_str() 4464 */ 4465 }; 4466 4467 static inline const char * 4468 ath11k_super_reg_6ghz_to_str(enum reg_super_domain_6ghz domain_id) 4469 { 4470 switch (domain_id) { 4471 case FCC1_6GHZ: 4472 return "FCC1_6GHZ"; 4473 case ETSI1_6GHZ: 4474 return "ETSI1_6GHZ"; 4475 case ETSI2_6GHZ: 4476 return "ETSI2_6GHZ"; 4477 case APL1_6GHZ: 4478 return "APL1_6GHZ"; 4479 case FCC1_6GHZ_CL: 4480 return "FCC1_6GHZ_CL"; 4481 } 4482 4483 return "unknown domain id"; 4484 } 4485 4486 struct cur_reg_rule { 4487 u16 start_freq; 4488 u16 end_freq; 4489 u16 max_bw; 4490 u8 reg_power; 4491 u8 ant_gain; 4492 u16 flags; 4493 bool psd_flag; 4494 s8 psd_eirp; 4495 }; 4496 4497 struct cur_regulatory_info { 4498 enum cc_setting_code status_code; 4499 u8 num_phy; 4500 u8 phy_id; 4501 u16 reg_dmn_pair; 4502 u16 ctry_code; 4503 u8 alpha2[REG_ALPHA2_LEN + 1]; 4504 u32 dfs_region; 4505 u32 phybitmap; 4506 u32 min_bw_2ghz; 4507 u32 max_bw_2ghz; 4508 u32 min_bw_5ghz; 4509 u32 max_bw_5ghz; 4510 u32 num_2ghz_reg_rules; 4511 u32 num_5ghz_reg_rules; 4512 struct cur_reg_rule *reg_rules_2ghz_ptr; 4513 struct cur_reg_rule *reg_rules_5ghz_ptr; 4514 bool is_ext_reg_event; 4515 enum wmi_reg_6ghz_client_type client_type; 4516 bool rnr_tpe_usable; 4517 bool unspecified_ap_usable; 4518 u8 domain_code_6ghz_ap[WMI_REG_CURRENT_MAX_AP_TYPE]; 4519 u8 domain_code_6ghz_client[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE]; 4520 u32 domain_code_6ghz_super_id; 4521 u32 min_bw_6ghz_ap[WMI_REG_CURRENT_MAX_AP_TYPE]; 4522 u32 max_bw_6ghz_ap[WMI_REG_CURRENT_MAX_AP_TYPE]; 4523 u32 min_bw_6ghz_client[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE]; 4524 u32 max_bw_6ghz_client[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE]; 4525 u32 num_6ghz_rules_ap[WMI_REG_CURRENT_MAX_AP_TYPE]; 4526 u32 num_6ghz_rules_client[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE]; 4527 struct cur_reg_rule *reg_rules_6ghz_ap_ptr[WMI_REG_CURRENT_MAX_AP_TYPE]; 4528 struct cur_reg_rule *reg_rules_6ghz_client_ptr 4529 [WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE]; 4530 }; 4531 4532 struct wmi_reg_chan_list_cc_event { 4533 u32 status_code; 4534 u32 phy_id; 4535 u32 alpha2; 4536 u32 num_phy; 4537 u32 country_id; 4538 u32 domain_code; 4539 u32 dfs_region; 4540 u32 phybitmap; 4541 u32 min_bw_2ghz; 4542 u32 max_bw_2ghz; 4543 u32 min_bw_5ghz; 4544 u32 max_bw_5ghz; 4545 u32 num_2ghz_reg_rules; 4546 u32 num_5ghz_reg_rules; 4547 } __packed; 4548 4549 struct wmi_regulatory_rule_struct { 4550 u32 tlv_header; 4551 u32 freq_info; 4552 u32 bw_pwr_info; 4553 u32 flag_info; 4554 }; 4555 4556 #define WMI_REG_CLIENT_MAX 4 4557 4558 struct wmi_reg_chan_list_cc_ext_event { 4559 u32 status_code; 4560 u32 phy_id; 4561 u32 alpha2; 4562 u32 num_phy; 4563 u32 country_id; 4564 u32 domain_code; 4565 u32 dfs_region; 4566 u32 phybitmap; 4567 u32 min_bw_2ghz; 4568 u32 max_bw_2ghz; 4569 u32 min_bw_5ghz; 4570 u32 max_bw_5ghz; 4571 u32 num_2ghz_reg_rules; 4572 u32 num_5ghz_reg_rules; 4573 u32 client_type; 4574 u32 rnr_tpe_usable; 4575 u32 unspecified_ap_usable; 4576 u32 domain_code_6ghz_ap_lpi; 4577 u32 domain_code_6ghz_ap_sp; 4578 u32 domain_code_6ghz_ap_vlp; 4579 u32 domain_code_6ghz_client_lpi[WMI_REG_CLIENT_MAX]; 4580 u32 domain_code_6ghz_client_sp[WMI_REG_CLIENT_MAX]; 4581 u32 domain_code_6ghz_client_vlp[WMI_REG_CLIENT_MAX]; 4582 u32 domain_code_6ghz_super_id; 4583 u32 min_bw_6ghz_ap_sp; 4584 u32 max_bw_6ghz_ap_sp; 4585 u32 min_bw_6ghz_ap_lpi; 4586 u32 max_bw_6ghz_ap_lpi; 4587 u32 min_bw_6ghz_ap_vlp; 4588 u32 max_bw_6ghz_ap_vlp; 4589 u32 min_bw_6ghz_client_sp[WMI_REG_CLIENT_MAX]; 4590 u32 max_bw_6ghz_client_sp[WMI_REG_CLIENT_MAX]; 4591 u32 min_bw_6ghz_client_lpi[WMI_REG_CLIENT_MAX]; 4592 u32 max_bw_6ghz_client_lpi[WMI_REG_CLIENT_MAX]; 4593 u32 min_bw_6ghz_client_vlp[WMI_REG_CLIENT_MAX]; 4594 u32 max_bw_6ghz_client_vlp[WMI_REG_CLIENT_MAX]; 4595 u32 num_6ghz_reg_rules_ap_sp; 4596 u32 num_6ghz_reg_rules_ap_lpi; 4597 u32 num_6ghz_reg_rules_ap_vlp; 4598 u32 num_6ghz_reg_rules_client_sp[WMI_REG_CLIENT_MAX]; 4599 u32 num_6ghz_reg_rules_client_lpi[WMI_REG_CLIENT_MAX]; 4600 u32 num_6ghz_reg_rules_client_vlp[WMI_REG_CLIENT_MAX]; 4601 } __packed; 4602 4603 struct wmi_regulatory_ext_rule { 4604 u32 tlv_header; 4605 u32 freq_info; 4606 u32 bw_pwr_info; 4607 u32 flag_info; 4608 u32 psd_power_info; 4609 } __packed; 4610 4611 struct wmi_vdev_delete_resp_event { 4612 u32 vdev_id; 4613 } __packed; 4614 4615 struct wmi_peer_delete_resp_event { 4616 u32 vdev_id; 4617 struct wmi_mac_addr peer_macaddr; 4618 } __packed; 4619 4620 struct wmi_bcn_tx_status_event { 4621 u32 vdev_id; 4622 u32 tx_status; 4623 } __packed; 4624 4625 struct wmi_vdev_stopped_event { 4626 u32 vdev_id; 4627 } __packed; 4628 4629 struct wmi_pdev_bss_chan_info_event { 4630 u32 freq; /* Units in MHz */ 4631 u32 noise_floor; /* units are dBm */ 4632 /* rx clear - how often the channel was unused */ 4633 u32 rx_clear_count_low; 4634 u32 rx_clear_count_high; 4635 /* cycle count - elapsed time during measured period, in clock ticks */ 4636 u32 cycle_count_low; 4637 u32 cycle_count_high; 4638 /* tx cycle count - elapsed time spent in tx, in clock ticks */ 4639 u32 tx_cycle_count_low; 4640 u32 tx_cycle_count_high; 4641 /* rx cycle count - elapsed time spent in rx, in clock ticks */ 4642 u32 rx_cycle_count_low; 4643 u32 rx_cycle_count_high; 4644 /*rx_cycle cnt for my bss in 64bits format */ 4645 u32 rx_bss_cycle_count_low; 4646 u32 rx_bss_cycle_count_high; 4647 u32 pdev_id; 4648 } __packed; 4649 4650 #define WMI_VDEV_INSTALL_KEY_COMPL_STATUS_SUCCESS 0 4651 4652 struct wmi_vdev_install_key_compl_event { 4653 u32 vdev_id; 4654 struct wmi_mac_addr peer_macaddr; 4655 u32 key_idx; 4656 u32 key_flags; 4657 u32 status; 4658 } __packed; 4659 4660 struct wmi_vdev_install_key_complete_arg { 4661 u32 vdev_id; 4662 const u8 *macaddr; 4663 u32 key_idx; 4664 u32 key_flags; 4665 u32 status; 4666 }; 4667 4668 struct wmi_peer_assoc_conf_event { 4669 u32 vdev_id; 4670 struct wmi_mac_addr peer_macaddr; 4671 } __packed; 4672 4673 struct wmi_peer_assoc_conf_arg { 4674 u32 vdev_id; 4675 const u8 *macaddr; 4676 }; 4677 4678 struct wmi_fils_discovery_event { 4679 u32 vdev_id; 4680 u32 fils_tt; 4681 u32 tbtt; 4682 } __packed; 4683 4684 struct wmi_probe_resp_tx_status_event { 4685 u32 vdev_id; 4686 u32 tx_status; 4687 } __packed; 4688 4689 /* 4690 * PDEV statistics 4691 */ 4692 struct wmi_pdev_stats_base { 4693 s32 chan_nf; 4694 u32 tx_frame_count; /* Cycles spent transmitting frames */ 4695 u32 rx_frame_count; /* Cycles spent receiving frames */ 4696 u32 rx_clear_count; /* Total channel busy time, evidently */ 4697 u32 cycle_count; /* Total on-channel time */ 4698 u32 phy_err_count; 4699 u32 chan_tx_pwr; 4700 } __packed; 4701 4702 struct wmi_pdev_stats_extra { 4703 u32 ack_rx_bad; 4704 u32 rts_bad; 4705 u32 rts_good; 4706 u32 fcs_bad; 4707 u32 no_beacons; 4708 u32 mib_int_count; 4709 } __packed; 4710 4711 struct wmi_pdev_stats_tx { 4712 /* Num HTT cookies queued to dispatch list */ 4713 s32 comp_queued; 4714 4715 /* Num HTT cookies dispatched */ 4716 s32 comp_delivered; 4717 4718 /* Num MSDU queued to WAL */ 4719 s32 msdu_enqued; 4720 4721 /* Num MPDU queue to WAL */ 4722 s32 mpdu_enqued; 4723 4724 /* Num MSDUs dropped by WMM limit */ 4725 s32 wmm_drop; 4726 4727 /* Num Local frames queued */ 4728 s32 local_enqued; 4729 4730 /* Num Local frames done */ 4731 s32 local_freed; 4732 4733 /* Num queued to HW */ 4734 s32 hw_queued; 4735 4736 /* Num PPDU reaped from HW */ 4737 s32 hw_reaped; 4738 4739 /* Num underruns */ 4740 s32 underrun; 4741 4742 /* Num hw paused */ 4743 u32 hw_paused; 4744 4745 /* Num PPDUs cleaned up in TX abort */ 4746 s32 tx_abort; 4747 4748 /* Num MPDUs requeued by SW */ 4749 s32 mpdus_requeued; 4750 4751 /* excessive retries */ 4752 u32 tx_ko; 4753 4754 u32 tx_xretry; 4755 4756 /* data hw rate code */ 4757 u32 data_rc; 4758 4759 /* Scheduler self triggers */ 4760 u32 self_triggers; 4761 4762 /* frames dropped due to excessive sw retries */ 4763 u32 sw_retry_failure; 4764 4765 /* illegal rate phy errors */ 4766 u32 illgl_rate_phy_err; 4767 4768 /* wal pdev continuous xretry */ 4769 u32 pdev_cont_xretry; 4770 4771 /* wal pdev tx timeouts */ 4772 u32 pdev_tx_timeout; 4773 4774 /* wal pdev resets */ 4775 u32 pdev_resets; 4776 4777 /* frames dropped due to non-availability of stateless TIDs */ 4778 u32 stateless_tid_alloc_failure; 4779 4780 /* PhY/BB underrun */ 4781 u32 phy_underrun; 4782 4783 /* MPDU is more than txop limit */ 4784 u32 txop_ovf; 4785 4786 /* Num sequences posted */ 4787 u32 seq_posted; 4788 4789 /* Num sequences failed in queueing */ 4790 u32 seq_failed_queueing; 4791 4792 /* Num sequences completed */ 4793 u32 seq_completed; 4794 4795 /* Num sequences restarted */ 4796 u32 seq_restarted; 4797 4798 /* Num of MU sequences posted */ 4799 u32 mu_seq_posted; 4800 4801 /* Num MPDUs flushed by SW, HWPAUSED, SW TXABORT 4802 * (Reset,channel change) 4803 */ 4804 s32 mpdus_sw_flush; 4805 4806 /* Num MPDUs filtered by HW, all filter condition (TTL expired) */ 4807 s32 mpdus_hw_filter; 4808 4809 /* Num MPDUs truncated by PDG (TXOP, TBTT, 4810 * PPDU_duration based on rate, dyn_bw) 4811 */ 4812 s32 mpdus_truncated; 4813 4814 /* Num MPDUs that was tried but didn't receive ACK or BA */ 4815 s32 mpdus_ack_failed; 4816 4817 /* Num MPDUs that was dropped du to expiry. */ 4818 s32 mpdus_expired; 4819 } __packed; 4820 4821 struct wmi_pdev_stats_rx { 4822 /* Cnts any change in ring routing mid-ppdu */ 4823 s32 mid_ppdu_route_change; 4824 4825 /* Total number of statuses processed */ 4826 s32 status_rcvd; 4827 4828 /* Extra frags on rings 0-3 */ 4829 s32 r0_frags; 4830 s32 r1_frags; 4831 s32 r2_frags; 4832 s32 r3_frags; 4833 4834 /* MSDUs / MPDUs delivered to HTT */ 4835 s32 htt_msdus; 4836 s32 htt_mpdus; 4837 4838 /* MSDUs / MPDUs delivered to local stack */ 4839 s32 loc_msdus; 4840 s32 loc_mpdus; 4841 4842 /* AMSDUs that have more MSDUs than the status ring size */ 4843 s32 oversize_amsdu; 4844 4845 /* Number of PHY errors */ 4846 s32 phy_errs; 4847 4848 /* Number of PHY errors drops */ 4849 s32 phy_err_drop; 4850 4851 /* Number of mpdu errors - FCS, MIC, ENC etc. */ 4852 s32 mpdu_errs; 4853 4854 /* Num overflow errors */ 4855 s32 rx_ovfl_errs; 4856 } __packed; 4857 4858 struct wmi_pdev_stats { 4859 struct wmi_pdev_stats_base base; 4860 struct wmi_pdev_stats_tx tx; 4861 struct wmi_pdev_stats_rx rx; 4862 } __packed; 4863 4864 #define WLAN_MAX_AC 4 4865 #define MAX_TX_RATE_VALUES 10 4866 #define MAX_TX_RATE_VALUES 10 4867 4868 struct wmi_vdev_stats { 4869 u32 vdev_id; 4870 u32 beacon_snr; 4871 u32 data_snr; 4872 u32 num_tx_frames[WLAN_MAX_AC]; 4873 u32 num_rx_frames; 4874 u32 num_tx_frames_retries[WLAN_MAX_AC]; 4875 u32 num_tx_frames_failures[WLAN_MAX_AC]; 4876 u32 num_rts_fail; 4877 u32 num_rts_success; 4878 u32 num_rx_err; 4879 u32 num_rx_discard; 4880 u32 num_tx_not_acked; 4881 u32 tx_rate_history[MAX_TX_RATE_VALUES]; 4882 u32 beacon_rssi_history[MAX_TX_RATE_VALUES]; 4883 } __packed; 4884 4885 struct wmi_bcn_stats { 4886 u32 vdev_id; 4887 u32 tx_bcn_succ_cnt; 4888 u32 tx_bcn_outage_cnt; 4889 } __packed; 4890 4891 struct wmi_stats_event { 4892 u32 stats_id; 4893 u32 num_pdev_stats; 4894 u32 num_vdev_stats; 4895 u32 num_peer_stats; 4896 u32 num_bcnflt_stats; 4897 u32 num_chan_stats; 4898 u32 num_mib_stats; 4899 u32 pdev_id; 4900 u32 num_bcn_stats; 4901 u32 num_peer_extd_stats; 4902 u32 num_peer_extd2_stats; 4903 } __packed; 4904 4905 struct wmi_rssi_stats { 4906 u32 vdev_id; 4907 u32 rssi_avg_beacon[WMI_MAX_CHAINS]; 4908 u32 rssi_avg_data[WMI_MAX_CHAINS]; 4909 struct wmi_mac_addr peer_macaddr; 4910 } __packed; 4911 4912 struct wmi_per_chain_rssi_stats { 4913 u32 num_per_chain_rssi_stats; 4914 } __packed; 4915 4916 struct wmi_pdev_ctl_failsafe_chk_event { 4917 u32 pdev_id; 4918 u32 ctl_failsafe_status; 4919 } __packed; 4920 4921 struct wmi_pdev_csa_switch_ev { 4922 u32 pdev_id; 4923 u32 current_switch_count; 4924 u32 num_vdevs; 4925 } __packed; 4926 4927 struct wmi_pdev_radar_ev { 4928 u32 pdev_id; 4929 u32 detection_mode; 4930 u32 chan_freq; 4931 u32 chan_width; 4932 u32 detector_id; 4933 u32 segment_id; 4934 u32 timestamp; 4935 u32 is_chirp; 4936 s32 freq_offset; 4937 s32 sidx; 4938 } __packed; 4939 4940 struct wmi_pdev_temperature_event { 4941 /* temperature value in Celsius degree */ 4942 s32 temp; 4943 u32 pdev_id; 4944 } __packed; 4945 4946 #define WMI_RX_STATUS_OK 0x00 4947 #define WMI_RX_STATUS_ERR_CRC 0x01 4948 #define WMI_RX_STATUS_ERR_DECRYPT 0x08 4949 #define WMI_RX_STATUS_ERR_MIC 0x10 4950 #define WMI_RX_STATUS_ERR_KEY_CACHE_MISS 0x20 4951 4952 #define WLAN_MGMT_TXRX_HOST_MAX_ANTENNA 4 4953 4954 struct mgmt_rx_event_params { 4955 u32 chan_freq; 4956 u32 channel; 4957 u32 snr; 4958 u8 rssi_ctl[WLAN_MGMT_TXRX_HOST_MAX_ANTENNA]; 4959 u32 rate; 4960 enum wmi_phy_mode phy_mode; 4961 u32 buf_len; 4962 int status; 4963 u32 flags; 4964 int rssi; 4965 u32 tsf_delta; 4966 u8 pdev_id; 4967 }; 4968 4969 #define ATH_MAX_ANTENNA 4 4970 4971 struct wmi_mgmt_rx_hdr { 4972 u32 channel; 4973 u32 snr; 4974 u32 rate; 4975 u32 phy_mode; 4976 u32 buf_len; 4977 u32 status; 4978 u32 rssi_ctl[ATH_MAX_ANTENNA]; 4979 u32 flags; 4980 int rssi; 4981 u32 tsf_delta; 4982 u32 rx_tsf_l32; 4983 u32 rx_tsf_u32; 4984 u32 pdev_id; 4985 u32 chan_freq; 4986 } __packed; 4987 4988 #define MAX_ANTENNA_EIGHT 8 4989 4990 struct wmi_rssi_ctl_ext { 4991 u32 tlv_header; 4992 u32 rssi_ctl_ext[MAX_ANTENNA_EIGHT - ATH_MAX_ANTENNA]; 4993 }; 4994 4995 struct wmi_mgmt_tx_compl_event { 4996 u32 desc_id; 4997 u32 status; 4998 u32 pdev_id; 4999 u32 ppdu_id; 5000 u32 ack_rssi; 5001 } __packed; 5002 5003 struct wmi_scan_event { 5004 u32 event_type; /* %WMI_SCAN_EVENT_ */ 5005 u32 reason; /* %WMI_SCAN_REASON_ */ 5006 u32 channel_freq; /* only valid for WMI_SCAN_EVENT_FOREIGN_CHANNEL */ 5007 u32 scan_req_id; 5008 u32 scan_id; 5009 u32 vdev_id; 5010 /* TSF Timestamp when the scan event (%WMI_SCAN_EVENT_) is completed 5011 * In case of AP it is TSF of the AP vdev 5012 * In case of STA connected state, this is the TSF of the AP 5013 * In case of STA not connected, it will be the free running HW timer 5014 */ 5015 u32 tsf_timestamp; 5016 } __packed; 5017 5018 struct wmi_peer_sta_kickout_arg { 5019 const u8 *mac_addr; 5020 }; 5021 5022 struct wmi_peer_sta_kickout_event { 5023 struct wmi_mac_addr peer_macaddr; 5024 } __packed; 5025 5026 enum wmi_roam_reason { 5027 WMI_ROAM_REASON_BETTER_AP = 1, 5028 WMI_ROAM_REASON_BEACON_MISS = 2, 5029 WMI_ROAM_REASON_LOW_RSSI = 3, 5030 WMI_ROAM_REASON_SUITABLE_AP_FOUND = 4, 5031 WMI_ROAM_REASON_HO_FAILED = 5, 5032 5033 /* keep last */ 5034 WMI_ROAM_REASON_MAX, 5035 }; 5036 5037 struct wmi_roam_event { 5038 u32 vdev_id; 5039 u32 reason; 5040 u32 rssi; 5041 } __packed; 5042 5043 #define WMI_CHAN_INFO_START_RESP 0 5044 #define WMI_CHAN_INFO_END_RESP 1 5045 5046 struct wmi_chan_info_event { 5047 u32 err_code; 5048 u32 freq; 5049 u32 cmd_flags; 5050 u32 noise_floor; 5051 u32 rx_clear_count; 5052 u32 cycle_count; 5053 u32 chan_tx_pwr_range; 5054 u32 chan_tx_pwr_tp; 5055 u32 rx_frame_count; 5056 u32 my_bss_rx_cycle_count; 5057 u32 rx_11b_mode_data_duration; 5058 u32 tx_frame_cnt; 5059 u32 mac_clk_mhz; 5060 u32 vdev_id; 5061 } __packed; 5062 5063 struct ath11k_targ_cap { 5064 u32 phy_capability; 5065 u32 max_frag_entry; 5066 u32 num_rf_chains; 5067 u32 ht_cap_info; 5068 u32 vht_cap_info; 5069 u32 vht_supp_mcs; 5070 u32 hw_min_tx_power; 5071 u32 hw_max_tx_power; 5072 u32 sys_cap_info; 5073 u32 min_pkt_size_enable; 5074 u32 max_bcn_ie_size; 5075 u32 max_num_scan_channels; 5076 u32 max_supported_macs; 5077 u32 wmi_fw_sub_feat_caps; 5078 u32 txrx_chainmask; 5079 u32 default_dbs_hw_mode_index; 5080 u32 num_msdu_desc; 5081 }; 5082 5083 enum wmi_vdev_type { 5084 WMI_VDEV_TYPE_UNSPEC = 0, 5085 WMI_VDEV_TYPE_AP = 1, 5086 WMI_VDEV_TYPE_STA = 2, 5087 WMI_VDEV_TYPE_IBSS = 3, 5088 WMI_VDEV_TYPE_MONITOR = 4, 5089 }; 5090 5091 enum wmi_vdev_subtype { 5092 WMI_VDEV_SUBTYPE_NONE, 5093 WMI_VDEV_SUBTYPE_P2P_DEVICE, 5094 WMI_VDEV_SUBTYPE_P2P_CLIENT, 5095 WMI_VDEV_SUBTYPE_P2P_GO, 5096 WMI_VDEV_SUBTYPE_PROXY_STA, 5097 WMI_VDEV_SUBTYPE_MESH_NON_11S, 5098 WMI_VDEV_SUBTYPE_MESH_11S, 5099 }; 5100 5101 enum wmi_sta_powersave_param { 5102 WMI_STA_PS_PARAM_RX_WAKE_POLICY = 0, 5103 WMI_STA_PS_PARAM_TX_WAKE_THRESHOLD = 1, 5104 WMI_STA_PS_PARAM_PSPOLL_COUNT = 2, 5105 WMI_STA_PS_PARAM_INACTIVITY_TIME = 3, 5106 WMI_STA_PS_PARAM_UAPSD = 4, 5107 }; 5108 5109 #define WMI_UAPSD_AC_TYPE_DELI 0 5110 #define WMI_UAPSD_AC_TYPE_TRIG 1 5111 5112 #define WMI_UAPSD_AC_BIT_MASK(ac, type) \ 5113 ((type == WMI_UAPSD_AC_TYPE_DELI) ? \ 5114 (1 << (ac << 1)) : (1 << ((ac << 1) + 1))) 5115 5116 enum wmi_sta_ps_param_uapsd { 5117 WMI_STA_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0), 5118 WMI_STA_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1), 5119 WMI_STA_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2), 5120 WMI_STA_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3), 5121 WMI_STA_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4), 5122 WMI_STA_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5), 5123 WMI_STA_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6), 5124 WMI_STA_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7), 5125 }; 5126 5127 #define WMI_STA_UAPSD_MAX_INTERVAL_MSEC UINT_MAX 5128 5129 struct wmi_sta_uapsd_auto_trig_param { 5130 u32 wmm_ac; 5131 u32 user_priority; 5132 u32 service_interval; 5133 u32 suspend_interval; 5134 u32 delay_interval; 5135 }; 5136 5137 struct wmi_sta_uapsd_auto_trig_cmd_fixed_param { 5138 u32 vdev_id; 5139 struct wmi_mac_addr peer_macaddr; 5140 u32 num_ac; 5141 }; 5142 5143 struct wmi_sta_uapsd_auto_trig_arg { 5144 u32 wmm_ac; 5145 u32 user_priority; 5146 u32 service_interval; 5147 u32 suspend_interval; 5148 u32 delay_interval; 5149 }; 5150 5151 enum wmi_sta_ps_param_tx_wake_threshold { 5152 WMI_STA_PS_TX_WAKE_THRESHOLD_NEVER = 0, 5153 WMI_STA_PS_TX_WAKE_THRESHOLD_ALWAYS = 1, 5154 5155 /* Values greater than one indicate that many TX attempts per beacon 5156 * interval before the STA will wake up 5157 */ 5158 }; 5159 5160 /* The maximum number of PS-Poll frames the FW will send in response to 5161 * traffic advertised in TIM before waking up (by sending a null frame with PS 5162 * = 0). Value 0 has a special meaning: there is no maximum count and the FW 5163 * will send as many PS-Poll as are necessary to retrieve buffered BU. This 5164 * parameter is used when the RX wake policy is 5165 * WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD and ignored when the RX wake 5166 * policy is WMI_STA_PS_RX_WAKE_POLICY_WAKE. 5167 */ 5168 enum wmi_sta_ps_param_pspoll_count { 5169 WMI_STA_PS_PSPOLL_COUNT_NO_MAX = 0, 5170 /* Values greater than 0 indicate the maximum number of PS-Poll frames 5171 * FW will send before waking up. 5172 */ 5173 }; 5174 5175 /* U-APSD configuration of peer station from (re)assoc request and TSPECs */ 5176 enum wmi_ap_ps_param_uapsd { 5177 WMI_AP_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0), 5178 WMI_AP_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1), 5179 WMI_AP_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2), 5180 WMI_AP_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3), 5181 WMI_AP_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4), 5182 WMI_AP_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5), 5183 WMI_AP_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6), 5184 WMI_AP_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7), 5185 }; 5186 5187 /* U-APSD maximum service period of peer station */ 5188 enum wmi_ap_ps_peer_param_max_sp { 5189 WMI_AP_PS_PEER_PARAM_MAX_SP_UNLIMITED = 0, 5190 WMI_AP_PS_PEER_PARAM_MAX_SP_2 = 1, 5191 WMI_AP_PS_PEER_PARAM_MAX_SP_4 = 2, 5192 WMI_AP_PS_PEER_PARAM_MAX_SP_6 = 3, 5193 MAX_WMI_AP_PS_PEER_PARAM_MAX_SP, 5194 }; 5195 5196 enum wmi_ap_ps_peer_param { 5197 /** Set uapsd configuration for a given peer. 5198 * 5199 * This include the delivery and trigger enabled state for each AC. 5200 * The host MLME needs to set this based on AP capability and stations 5201 * request Set in the association request received from the station. 5202 * 5203 * Lower 8 bits of the value specify the UAPSD configuration. 5204 * 5205 * (see enum wmi_ap_ps_param_uapsd) 5206 * The default value is 0. 5207 */ 5208 WMI_AP_PS_PEER_PARAM_UAPSD = 0, 5209 5210 /** 5211 * Set the service period for a UAPSD capable station 5212 * 5213 * The service period from wme ie in the (re)assoc request frame. 5214 * 5215 * (see enum wmi_ap_ps_peer_param_max_sp) 5216 */ 5217 WMI_AP_PS_PEER_PARAM_MAX_SP = 1, 5218 5219 /** Time in seconds for aging out buffered frames 5220 * for STA in power save 5221 */ 5222 WMI_AP_PS_PEER_PARAM_AGEOUT_TIME = 2, 5223 5224 /** Specify frame types that are considered SIFS 5225 * RESP trigger frame 5226 */ 5227 WMI_AP_PS_PEER_PARAM_SIFS_RESP_FRMTYPE = 3, 5228 5229 /** Specifies the trigger state of TID. 5230 * Valid only for UAPSD frame type 5231 */ 5232 WMI_AP_PS_PEER_PARAM_SIFS_RESP_UAPSD = 4, 5233 5234 /* Specifies the WNM sleep state of a STA */ 5235 WMI_AP_PS_PEER_PARAM_WNM_SLEEP = 5, 5236 }; 5237 5238 #define DISABLE_SIFS_RESPONSE_TRIGGER 0 5239 5240 #define WMI_MAX_KEY_INDEX 3 5241 #define WMI_MAX_KEY_LEN 32 5242 5243 #define WMI_KEY_PAIRWISE 0x00 5244 #define WMI_KEY_GROUP 0x01 5245 5246 #define WMI_CIPHER_NONE 0x0 /* clear key */ 5247 #define WMI_CIPHER_WEP 0x1 5248 #define WMI_CIPHER_TKIP 0x2 5249 #define WMI_CIPHER_AES_OCB 0x3 5250 #define WMI_CIPHER_AES_CCM 0x4 5251 #define WMI_CIPHER_WAPI 0x5 5252 #define WMI_CIPHER_CKIP 0x6 5253 #define WMI_CIPHER_AES_CMAC 0x7 5254 #define WMI_CIPHER_ANY 0x8 5255 #define WMI_CIPHER_AES_GCM 0x9 5256 #define WMI_CIPHER_AES_GMAC 0xa 5257 5258 /* Value to disable fixed rate setting */ 5259 #define WMI_FIXED_RATE_NONE (0xffff) 5260 5261 #define ATH11K_RC_VERSION_OFFSET 28 5262 #define ATH11K_RC_PREAMBLE_OFFSET 8 5263 #define ATH11K_RC_NSS_OFFSET 5 5264 5265 #define ATH11K_HW_RATE_CODE(rate, nss, preamble) \ 5266 ((1 << ATH11K_RC_VERSION_OFFSET) | \ 5267 ((nss) << ATH11K_RC_NSS_OFFSET) | \ 5268 ((preamble) << ATH11K_RC_PREAMBLE_OFFSET) | \ 5269 (rate)) 5270 5271 /* Preamble types to be used with VDEV fixed rate configuration */ 5272 enum wmi_rate_preamble { 5273 WMI_RATE_PREAMBLE_OFDM, 5274 WMI_RATE_PREAMBLE_CCK, 5275 WMI_RATE_PREAMBLE_HT, 5276 WMI_RATE_PREAMBLE_VHT, 5277 WMI_RATE_PREAMBLE_HE, 5278 }; 5279 5280 /** 5281 * enum wmi_rtscts_prot_mode - Enable/Disable RTS/CTS and CTS2Self Protection. 5282 * @WMI_RTS_CTS_DISABLED: RTS/CTS protection is disabled. 5283 * @WMI_USE_RTS_CTS: RTS/CTS Enabled. 5284 * @WMI_USE_CTS2SELF: CTS to self protection Enabled. 5285 */ 5286 enum wmi_rtscts_prot_mode { 5287 WMI_RTS_CTS_DISABLED = 0, 5288 WMI_USE_RTS_CTS = 1, 5289 WMI_USE_CTS2SELF = 2, 5290 }; 5291 5292 /** 5293 * enum wmi_rtscts_profile - Selection of RTS CTS profile along with enabling 5294 * protection mode. 5295 * @WMI_RTSCTS_FOR_NO_RATESERIES: Neither of rate-series should use RTS-CTS 5296 * @WMI_RTSCTS_FOR_SECOND_RATESERIES: Only second rate-series will use RTS-CTS 5297 * @WMI_RTSCTS_ACROSS_SW_RETRIES: Only the second rate-series will use RTS-CTS, 5298 * but if there's a sw retry, both the rate 5299 * series will use RTS-CTS. 5300 * @WMI_RTSCTS_ERP: RTS/CTS used for ERP protection for every PPDU. 5301 * @WMI_RTSCTS_FOR_ALL_RATESERIES: Enable RTS-CTS for all rate series. 5302 */ 5303 enum wmi_rtscts_profile { 5304 WMI_RTSCTS_FOR_NO_RATESERIES = 0, 5305 WMI_RTSCTS_FOR_SECOND_RATESERIES = 1, 5306 WMI_RTSCTS_ACROSS_SW_RETRIES = 2, 5307 WMI_RTSCTS_ERP = 3, 5308 WMI_RTSCTS_FOR_ALL_RATESERIES = 4, 5309 }; 5310 5311 struct ath11k_hal_reg_cap { 5312 u32 eeprom_rd; 5313 u32 eeprom_rd_ext; 5314 u32 regcap1; 5315 u32 regcap2; 5316 u32 wireless_modes; 5317 u32 low_2ghz_chan; 5318 u32 high_2ghz_chan; 5319 u32 low_5ghz_chan; 5320 u32 high_5ghz_chan; 5321 }; 5322 5323 struct ath11k_mem_chunk { 5324 void *vaddr; 5325 dma_addr_t paddr; 5326 u32 len; 5327 u32 req_id; 5328 }; 5329 5330 #define WMI_SKB_HEADROOM sizeof(struct wmi_cmd_hdr) 5331 5332 enum wmi_sta_ps_param_rx_wake_policy { 5333 WMI_STA_PS_RX_WAKE_POLICY_WAKE = 0, 5334 WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD = 1, 5335 }; 5336 5337 /* Do not change existing values! Used by ath11k_frame_mode parameter 5338 * module parameter. 5339 */ 5340 enum ath11k_hw_txrx_mode { 5341 ATH11K_HW_TXRX_RAW = 0, 5342 ATH11K_HW_TXRX_NATIVE_WIFI = 1, 5343 ATH11K_HW_TXRX_ETHERNET = 2, 5344 }; 5345 5346 struct wmi_wmm_params { 5347 u32 tlv_header; 5348 u32 cwmin; 5349 u32 cwmax; 5350 u32 aifs; 5351 u32 txoplimit; 5352 u32 acm; 5353 u32 no_ack; 5354 } __packed; 5355 5356 struct wmi_wmm_params_arg { 5357 u8 acm; 5358 u8 aifs; 5359 u16 cwmin; 5360 u16 cwmax; 5361 u16 txop; 5362 u8 no_ack; 5363 }; 5364 5365 struct wmi_vdev_set_wmm_params_cmd { 5366 u32 tlv_header; 5367 u32 vdev_id; 5368 struct wmi_wmm_params wmm_params[4]; 5369 u32 wmm_param_type; 5370 } __packed; 5371 5372 struct wmi_wmm_params_all_arg { 5373 struct wmi_wmm_params_arg ac_be; 5374 struct wmi_wmm_params_arg ac_bk; 5375 struct wmi_wmm_params_arg ac_vi; 5376 struct wmi_wmm_params_arg ac_vo; 5377 }; 5378 5379 #define ATH11K_TWT_DEF_STA_CONG_TIMER_MS 5000 5380 #define ATH11K_TWT_DEF_DEFAULT_SLOT_SIZE 10 5381 #define ATH11K_TWT_DEF_CONGESTION_THRESH_SETUP 50 5382 #define ATH11K_TWT_DEF_CONGESTION_THRESH_TEARDOWN 20 5383 #define ATH11K_TWT_DEF_CONGESTION_THRESH_CRITICAL 100 5384 #define ATH11K_TWT_DEF_INTERFERENCE_THRESH_TEARDOWN 80 5385 #define ATH11K_TWT_DEF_INTERFERENCE_THRESH_SETUP 50 5386 #define ATH11K_TWT_DEF_MIN_NO_STA_SETUP 10 5387 #define ATH11K_TWT_DEF_MIN_NO_STA_TEARDOWN 2 5388 #define ATH11K_TWT_DEF_NO_OF_BCAST_MCAST_SLOTS 2 5389 #define ATH11K_TWT_DEF_MIN_NO_TWT_SLOTS 2 5390 #define ATH11K_TWT_DEF_MAX_NO_STA_TWT 500 5391 #define ATH11K_TWT_DEF_MODE_CHECK_INTERVAL 10000 5392 #define ATH11K_TWT_DEF_ADD_STA_SLOT_INTERVAL 1000 5393 #define ATH11K_TWT_DEF_REMOVE_STA_SLOT_INTERVAL 5000 5394 5395 struct wmi_twt_enable_params { 5396 u32 sta_cong_timer_ms; 5397 u32 mbss_support; 5398 u32 default_slot_size; 5399 u32 congestion_thresh_setup; 5400 u32 congestion_thresh_teardown; 5401 u32 congestion_thresh_critical; 5402 u32 interference_thresh_teardown; 5403 u32 interference_thresh_setup; 5404 u32 min_no_sta_setup; 5405 u32 min_no_sta_teardown; 5406 u32 no_of_bcast_mcast_slots; 5407 u32 min_no_twt_slots; 5408 u32 max_no_sta_twt; 5409 u32 mode_check_interval; 5410 u32 add_sta_slot_interval; 5411 u32 remove_sta_slot_interval; 5412 }; 5413 5414 struct wmi_twt_enable_params_cmd { 5415 u32 tlv_header; 5416 u32 pdev_id; 5417 u32 sta_cong_timer_ms; 5418 u32 mbss_support; 5419 u32 default_slot_size; 5420 u32 congestion_thresh_setup; 5421 u32 congestion_thresh_teardown; 5422 u32 congestion_thresh_critical; 5423 u32 interference_thresh_teardown; 5424 u32 interference_thresh_setup; 5425 u32 min_no_sta_setup; 5426 u32 min_no_sta_teardown; 5427 u32 no_of_bcast_mcast_slots; 5428 u32 min_no_twt_slots; 5429 u32 max_no_sta_twt; 5430 u32 mode_check_interval; 5431 u32 add_sta_slot_interval; 5432 u32 remove_sta_slot_interval; 5433 } __packed; 5434 5435 struct wmi_twt_disable_params_cmd { 5436 u32 tlv_header; 5437 u32 pdev_id; 5438 } __packed; 5439 5440 enum WMI_HOST_TWT_COMMAND { 5441 WMI_HOST_TWT_COMMAND_REQUEST_TWT = 0, 5442 WMI_HOST_TWT_COMMAND_SUGGEST_TWT, 5443 WMI_HOST_TWT_COMMAND_DEMAND_TWT, 5444 WMI_HOST_TWT_COMMAND_TWT_GROUPING, 5445 WMI_HOST_TWT_COMMAND_ACCEPT_TWT, 5446 WMI_HOST_TWT_COMMAND_ALTERNATE_TWT, 5447 WMI_HOST_TWT_COMMAND_DICTATE_TWT, 5448 WMI_HOST_TWT_COMMAND_REJECT_TWT, 5449 }; 5450 5451 #define WMI_TWT_ADD_DIALOG_FLAG_BCAST BIT(8) 5452 #define WMI_TWT_ADD_DIALOG_FLAG_TRIGGER BIT(9) 5453 #define WMI_TWT_ADD_DIALOG_FLAG_FLOW_TYPE BIT(10) 5454 #define WMI_TWT_ADD_DIALOG_FLAG_PROTECTION BIT(11) 5455 5456 struct wmi_twt_add_dialog_params_cmd { 5457 u32 tlv_header; 5458 u32 vdev_id; 5459 struct wmi_mac_addr peer_macaddr; 5460 u32 dialog_id; 5461 u32 wake_intvl_us; 5462 u32 wake_intvl_mantis; 5463 u32 wake_dura_us; 5464 u32 sp_offset_us; 5465 u32 flags; 5466 } __packed; 5467 5468 struct wmi_twt_add_dialog_params { 5469 u32 vdev_id; 5470 u8 peer_macaddr[ETH_ALEN]; 5471 u32 dialog_id; 5472 u32 wake_intvl_us; 5473 u32 wake_intvl_mantis; 5474 u32 wake_dura_us; 5475 u32 sp_offset_us; 5476 u8 twt_cmd; 5477 u8 flag_bcast; 5478 u8 flag_trigger; 5479 u8 flag_flow_type; 5480 u8 flag_protection; 5481 } __packed; 5482 5483 enum wmi_twt_add_dialog_status { 5484 WMI_ADD_TWT_STATUS_OK, 5485 WMI_ADD_TWT_STATUS_TWT_NOT_ENABLED, 5486 WMI_ADD_TWT_STATUS_USED_DIALOG_ID, 5487 WMI_ADD_TWT_STATUS_INVALID_PARAM, 5488 WMI_ADD_TWT_STATUS_NOT_READY, 5489 WMI_ADD_TWT_STATUS_NO_RESOURCE, 5490 WMI_ADD_TWT_STATUS_NO_ACK, 5491 WMI_ADD_TWT_STATUS_NO_RESPONSE, 5492 WMI_ADD_TWT_STATUS_DENIED, 5493 WMI_ADD_TWT_STATUS_UNKNOWN_ERROR, 5494 }; 5495 5496 struct wmi_twt_add_dialog_event { 5497 u32 vdev_id; 5498 struct wmi_mac_addr peer_macaddr; 5499 u32 dialog_id; 5500 u32 status; 5501 } __packed; 5502 5503 struct wmi_twt_del_dialog_params { 5504 u32 vdev_id; 5505 u8 peer_macaddr[ETH_ALEN]; 5506 u32 dialog_id; 5507 } __packed; 5508 5509 struct wmi_twt_del_dialog_params_cmd { 5510 u32 tlv_header; 5511 u32 vdev_id; 5512 struct wmi_mac_addr peer_macaddr; 5513 u32 dialog_id; 5514 } __packed; 5515 5516 struct wmi_twt_pause_dialog_params { 5517 u32 vdev_id; 5518 u8 peer_macaddr[ETH_ALEN]; 5519 u32 dialog_id; 5520 } __packed; 5521 5522 struct wmi_twt_pause_dialog_params_cmd { 5523 u32 tlv_header; 5524 u32 vdev_id; 5525 struct wmi_mac_addr peer_macaddr; 5526 u32 dialog_id; 5527 } __packed; 5528 5529 struct wmi_twt_resume_dialog_params { 5530 u32 vdev_id; 5531 u8 peer_macaddr[ETH_ALEN]; 5532 u32 dialog_id; 5533 u32 sp_offset_us; 5534 u32 next_twt_size; 5535 } __packed; 5536 5537 struct wmi_twt_resume_dialog_params_cmd { 5538 u32 tlv_header; 5539 u32 vdev_id; 5540 struct wmi_mac_addr peer_macaddr; 5541 u32 dialog_id; 5542 u32 sp_offset_us; 5543 u32 next_twt_size; 5544 } __packed; 5545 5546 struct wmi_obss_spatial_reuse_params_cmd { 5547 u32 tlv_header; 5548 u32 pdev_id; 5549 u32 enable; 5550 s32 obss_min; 5551 s32 obss_max; 5552 u32 vdev_id; 5553 } __packed; 5554 5555 struct wmi_pdev_obss_pd_bitmap_cmd { 5556 u32 tlv_header; 5557 u32 pdev_id; 5558 u32 bitmap[2]; 5559 } __packed; 5560 5561 #define ATH11K_BSS_COLOR_COLLISION_SCAN_PERIOD_MS 200 5562 #define ATH11K_OBSS_COLOR_COLLISION_DETECTION_DISABLE 0 5563 #define ATH11K_OBSS_COLOR_COLLISION_DETECTION 1 5564 5565 #define ATH11K_BSS_COLOR_COLLISION_DETECTION_STA_PERIOD_MS 10000 5566 #define ATH11K_BSS_COLOR_COLLISION_DETECTION_AP_PERIOD_MS 5000 5567 5568 enum wmi_bss_color_collision { 5569 WMI_BSS_COLOR_COLLISION_DISABLE = 0, 5570 WMI_BSS_COLOR_COLLISION_DETECTION, 5571 WMI_BSS_COLOR_FREE_SLOT_TIMER_EXPIRY, 5572 WMI_BSS_COLOR_FREE_SLOT_AVAILABLE, 5573 }; 5574 5575 struct wmi_obss_color_collision_cfg_params_cmd { 5576 u32 tlv_header; 5577 u32 vdev_id; 5578 u32 flags; 5579 u32 evt_type; 5580 u32 current_bss_color; 5581 u32 detection_period_ms; 5582 u32 scan_period_ms; 5583 u32 free_slot_expiry_time_ms; 5584 } __packed; 5585 5586 struct wmi_bss_color_change_enable_params_cmd { 5587 u32 tlv_header; 5588 u32 vdev_id; 5589 u32 enable; 5590 } __packed; 5591 5592 struct wmi_obss_color_collision_event { 5593 u32 vdev_id; 5594 u32 evt_type; 5595 u64 obss_color_bitmap; 5596 } __packed; 5597 5598 #define ATH11K_IPV4_TH_SEED_SIZE 5 5599 #define ATH11K_IPV6_TH_SEED_SIZE 11 5600 5601 struct ath11k_wmi_pdev_lro_config_cmd { 5602 u32 tlv_header; 5603 u32 lro_enable; 5604 u32 res; 5605 u32 th_4[ATH11K_IPV4_TH_SEED_SIZE]; 5606 u32 th_6[ATH11K_IPV6_TH_SEED_SIZE]; 5607 u32 pdev_id; 5608 } __packed; 5609 5610 #define ATH11K_WMI_SPECTRAL_COUNT_DEFAULT 0 5611 #define ATH11K_WMI_SPECTRAL_PERIOD_DEFAULT 224 5612 #define ATH11K_WMI_SPECTRAL_PRIORITY_DEFAULT 1 5613 #define ATH11K_WMI_SPECTRAL_FFT_SIZE_DEFAULT 7 5614 #define ATH11K_WMI_SPECTRAL_GC_ENA_DEFAULT 1 5615 #define ATH11K_WMI_SPECTRAL_RESTART_ENA_DEFAULT 0 5616 #define ATH11K_WMI_SPECTRAL_NOISE_FLOOR_REF_DEFAULT -96 5617 #define ATH11K_WMI_SPECTRAL_INIT_DELAY_DEFAULT 80 5618 #define ATH11K_WMI_SPECTRAL_NB_TONE_THR_DEFAULT 12 5619 #define ATH11K_WMI_SPECTRAL_STR_BIN_THR_DEFAULT 8 5620 #define ATH11K_WMI_SPECTRAL_WB_RPT_MODE_DEFAULT 0 5621 #define ATH11K_WMI_SPECTRAL_RSSI_RPT_MODE_DEFAULT 0 5622 #define ATH11K_WMI_SPECTRAL_RSSI_THR_DEFAULT 0xf0 5623 #define ATH11K_WMI_SPECTRAL_PWR_FORMAT_DEFAULT 0 5624 #define ATH11K_WMI_SPECTRAL_RPT_MODE_DEFAULT 2 5625 #define ATH11K_WMI_SPECTRAL_BIN_SCALE_DEFAULT 1 5626 #define ATH11K_WMI_SPECTRAL_DBM_ADJ_DEFAULT 1 5627 #define ATH11K_WMI_SPECTRAL_CHN_MASK_DEFAULT 1 5628 5629 struct ath11k_wmi_vdev_spectral_conf_param { 5630 u32 vdev_id; 5631 u32 scan_count; 5632 u32 scan_period; 5633 u32 scan_priority; 5634 u32 scan_fft_size; 5635 u32 scan_gc_ena; 5636 u32 scan_restart_ena; 5637 u32 scan_noise_floor_ref; 5638 u32 scan_init_delay; 5639 u32 scan_nb_tone_thr; 5640 u32 scan_str_bin_thr; 5641 u32 scan_wb_rpt_mode; 5642 u32 scan_rssi_rpt_mode; 5643 u32 scan_rssi_thr; 5644 u32 scan_pwr_format; 5645 u32 scan_rpt_mode; 5646 u32 scan_bin_scale; 5647 u32 scan_dbm_adj; 5648 u32 scan_chn_mask; 5649 } __packed; 5650 5651 struct ath11k_wmi_vdev_spectral_conf_cmd { 5652 u32 tlv_header; 5653 struct ath11k_wmi_vdev_spectral_conf_param param; 5654 } __packed; 5655 5656 #define ATH11K_WMI_SPECTRAL_TRIGGER_CMD_TRIGGER 1 5657 #define ATH11K_WMI_SPECTRAL_TRIGGER_CMD_CLEAR 2 5658 #define ATH11K_WMI_SPECTRAL_ENABLE_CMD_ENABLE 1 5659 #define ATH11K_WMI_SPECTRAL_ENABLE_CMD_DISABLE 2 5660 5661 struct ath11k_wmi_vdev_spectral_enable_cmd { 5662 u32 tlv_header; 5663 u32 vdev_id; 5664 u32 trigger_cmd; 5665 u32 enable_cmd; 5666 } __packed; 5667 5668 struct ath11k_wmi_pdev_dma_ring_cfg_req_cmd { 5669 u32 tlv_header; 5670 u32 pdev_id; 5671 u32 module_id; /* see enum wmi_direct_buffer_module */ 5672 u32 base_paddr_lo; 5673 u32 base_paddr_hi; 5674 u32 head_idx_paddr_lo; 5675 u32 head_idx_paddr_hi; 5676 u32 tail_idx_paddr_lo; 5677 u32 tail_idx_paddr_hi; 5678 u32 num_elems; /* Number of elems in the ring */ 5679 u32 buf_size; /* size of allocated buffer in bytes */ 5680 5681 /* Number of wmi_dma_buf_release_entry packed together */ 5682 u32 num_resp_per_event; 5683 5684 /* Target should timeout and send whatever resp 5685 * it has if this time expires, units in milliseconds 5686 */ 5687 u32 event_timeout_ms; 5688 } __packed; 5689 5690 struct ath11k_wmi_dma_buf_release_fixed_param { 5691 u32 pdev_id; 5692 u32 module_id; 5693 u32 num_buf_release_entry; 5694 u32 num_meta_data_entry; 5695 } __packed; 5696 5697 struct wmi_dma_buf_release_entry { 5698 u32 tlv_header; 5699 u32 paddr_lo; 5700 5701 /* Bits 11:0: address of data 5702 * Bits 31:12: host context data 5703 */ 5704 u32 paddr_hi; 5705 } __packed; 5706 5707 #define WMI_SPECTRAL_META_INFO1_FREQ1 GENMASK(15, 0) 5708 #define WMI_SPECTRAL_META_INFO1_FREQ2 GENMASK(31, 16) 5709 5710 #define WMI_SPECTRAL_META_INFO2_CHN_WIDTH GENMASK(7, 0) 5711 5712 struct wmi_dma_buf_release_meta_data { 5713 u32 tlv_header; 5714 s32 noise_floor[WMI_MAX_CHAINS]; 5715 u32 reset_delay; 5716 u32 freq1; 5717 u32 freq2; 5718 u32 ch_width; 5719 } __packed; 5720 5721 enum wmi_fils_discovery_cmd_type { 5722 WMI_FILS_DISCOVERY_CMD, 5723 WMI_UNSOL_BCAST_PROBE_RESP, 5724 }; 5725 5726 struct wmi_fils_discovery_cmd { 5727 u32 tlv_header; 5728 u32 vdev_id; 5729 u32 interval; 5730 u32 config; /* enum wmi_fils_discovery_cmd_type */ 5731 } __packed; 5732 5733 struct wmi_fils_discovery_tmpl_cmd { 5734 u32 tlv_header; 5735 u32 vdev_id; 5736 u32 buf_len; 5737 } __packed; 5738 5739 struct wmi_probe_tmpl_cmd { 5740 u32 tlv_header; 5741 u32 vdev_id; 5742 u32 buf_len; 5743 } __packed; 5744 5745 struct target_resource_config { 5746 u32 num_vdevs; 5747 u32 num_peers; 5748 u32 num_active_peers; 5749 u32 num_offload_peers; 5750 u32 num_offload_reorder_buffs; 5751 u32 num_peer_keys; 5752 u32 num_tids; 5753 u32 ast_skid_limit; 5754 u32 tx_chain_mask; 5755 u32 rx_chain_mask; 5756 u32 rx_timeout_pri[4]; 5757 u32 rx_decap_mode; 5758 u32 scan_max_pending_req; 5759 u32 bmiss_offload_max_vdev; 5760 u32 roam_offload_max_vdev; 5761 u32 roam_offload_max_ap_profiles; 5762 u32 num_mcast_groups; 5763 u32 num_mcast_table_elems; 5764 u32 mcast2ucast_mode; 5765 u32 tx_dbg_log_size; 5766 u32 num_wds_entries; 5767 u32 dma_burst_size; 5768 u32 mac_aggr_delim; 5769 u32 rx_skip_defrag_timeout_dup_detection_check; 5770 u32 vow_config; 5771 u32 gtk_offload_max_vdev; 5772 u32 num_msdu_desc; 5773 u32 max_frag_entries; 5774 u32 max_peer_ext_stats; 5775 u32 smart_ant_cap; 5776 u32 bk_minfree; 5777 u32 be_minfree; 5778 u32 vi_minfree; 5779 u32 vo_minfree; 5780 u32 rx_batchmode; 5781 u32 tt_support; 5782 u32 flag1; 5783 u32 iphdr_pad_config; 5784 u32 qwrap_config:16, 5785 alloc_frag_desc_for_data_pkt:16; 5786 u32 num_tdls_vdevs; 5787 u32 num_tdls_conn_table_entries; 5788 u32 beacon_tx_offload_max_vdev; 5789 u32 num_multicast_filter_entries; 5790 u32 num_wow_filters; 5791 u32 num_keep_alive_pattern; 5792 u32 keep_alive_pattern_size; 5793 u32 max_tdls_concurrent_sleep_sta; 5794 u32 max_tdls_concurrent_buffer_sta; 5795 u32 wmi_send_separate; 5796 u32 num_ocb_vdevs; 5797 u32 num_ocb_channels; 5798 u32 num_ocb_schedules; 5799 u32 num_ns_ext_tuples_cfg; 5800 u32 bpf_instruction_size; 5801 u32 max_bssid_rx_filters; 5802 u32 use_pdev_id; 5803 u32 peer_map_unmap_v2_support; 5804 u32 sched_params; 5805 u32 twt_ap_pdev_count; 5806 u32 twt_ap_sta_count; 5807 u8 is_reg_cc_ext_event_supported; 5808 u32 ema_max_vap_cnt; 5809 u32 ema_max_profile_period; 5810 }; 5811 5812 enum wmi_debug_log_param { 5813 WMI_DEBUG_LOG_PARAM_LOG_LEVEL = 0x1, 5814 WMI_DEBUG_LOG_PARAM_VDEV_ENABLE, 5815 WMI_DEBUG_LOG_PARAM_VDEV_DISABLE, 5816 WMI_DEBUG_LOG_PARAM_VDEV_ENABLE_BITMAP, 5817 WMI_DEBUG_LOG_PARAM_MOD_ENABLE_BITMAP, 5818 WMI_DEBUG_LOG_PARAM_WOW_MOD_ENABLE_BITMAP, 5819 }; 5820 5821 struct wmi_debug_log_config_cmd_fixed_param { 5822 u32 tlv_header; 5823 u32 dbg_log_param; 5824 u32 value; 5825 } __packed; 5826 5827 #define MAX_RADIOS 3 5828 5829 #define WMI_SERVICE_READY_TIMEOUT_HZ (5 * HZ) 5830 #define WMI_SEND_TIMEOUT_HZ (3 * HZ) 5831 5832 enum ath11k_wmi_peer_ps_state { 5833 WMI_PEER_PS_STATE_OFF, 5834 WMI_PEER_PS_STATE_ON, 5835 WMI_PEER_PS_STATE_DISABLED, 5836 }; 5837 5838 enum wmi_peer_ps_supported_bitmap { 5839 /* Used to indicate that power save state change is valid */ 5840 WMI_PEER_PS_VALID = 0x1, 5841 WMI_PEER_PS_STATE_TIMESTAMP = 0x2, 5842 }; 5843 5844 struct wmi_peer_sta_ps_state_chg_event { 5845 struct wmi_mac_addr peer_macaddr; 5846 u32 peer_ps_state; 5847 u32 ps_supported_bitmap; 5848 u32 peer_ps_valid; 5849 u32 peer_ps_timestamp; 5850 } __packed; 5851 5852 struct ath11k_wmi_base { 5853 struct ath11k_base *ab; 5854 struct ath11k_pdev_wmi wmi[MAX_RADIOS]; 5855 enum ath11k_htc_ep_id wmi_endpoint_id[MAX_RADIOS]; 5856 u32 max_msg_len[MAX_RADIOS]; 5857 5858 struct completion service_ready; 5859 struct completion unified_ready; 5860 DECLARE_BITMAP(svc_map, WMI_MAX_EXT2_SERVICE); 5861 wait_queue_head_t tx_credits_wq; 5862 u32 num_mem_chunks; 5863 u32 rx_decap_mode; 5864 struct wmi_host_mem_chunk mem_chunks[WMI_MAX_MEM_REQS]; 5865 5866 enum wmi_host_hw_mode_config_type preferred_hw_mode; 5867 struct target_resource_config wlan_resource_config; 5868 5869 struct ath11k_targ_cap *targ_cap; 5870 }; 5871 5872 /* Definition of HW data filtering */ 5873 enum hw_data_filter_type { 5874 WMI_HW_DATA_FILTER_DROP_NON_ARP_BC = BIT(0), 5875 WMI_HW_DATA_FILTER_DROP_NON_ICMPV6_MC = BIT(1), 5876 }; 5877 5878 struct wmi_hw_data_filter_cmd { 5879 u32 tlv_header; 5880 u32 vdev_id; 5881 u32 enable; 5882 u32 hw_filter_bitmap; 5883 } __packed; 5884 5885 /* WOW structures */ 5886 enum wmi_wow_wakeup_event { 5887 WOW_BMISS_EVENT = 0, 5888 WOW_BETTER_AP_EVENT, 5889 WOW_DEAUTH_RECVD_EVENT, 5890 WOW_MAGIC_PKT_RECVD_EVENT, 5891 WOW_GTK_ERR_EVENT, 5892 WOW_FOURWAY_HSHAKE_EVENT, 5893 WOW_EAPOL_RECVD_EVENT, 5894 WOW_NLO_DETECTED_EVENT, 5895 WOW_DISASSOC_RECVD_EVENT, 5896 WOW_PATTERN_MATCH_EVENT, 5897 WOW_CSA_IE_EVENT, 5898 WOW_PROBE_REQ_WPS_IE_EVENT, 5899 WOW_AUTH_REQ_EVENT, 5900 WOW_ASSOC_REQ_EVENT, 5901 WOW_HTT_EVENT, 5902 WOW_RA_MATCH_EVENT, 5903 WOW_HOST_AUTO_SHUTDOWN_EVENT, 5904 WOW_IOAC_MAGIC_EVENT, 5905 WOW_IOAC_SHORT_EVENT, 5906 WOW_IOAC_EXTEND_EVENT, 5907 WOW_IOAC_TIMER_EVENT, 5908 WOW_DFS_PHYERR_RADAR_EVENT, 5909 WOW_BEACON_EVENT, 5910 WOW_CLIENT_KICKOUT_EVENT, 5911 WOW_EVENT_MAX, 5912 }; 5913 5914 enum wmi_wow_interface_cfg { 5915 WOW_IFACE_PAUSE_ENABLED, 5916 WOW_IFACE_PAUSE_DISABLED 5917 }; 5918 5919 #define C2S(x) case x: return #x 5920 5921 static inline const char *wow_wakeup_event(enum wmi_wow_wakeup_event ev) 5922 { 5923 switch (ev) { 5924 C2S(WOW_BMISS_EVENT); 5925 C2S(WOW_BETTER_AP_EVENT); 5926 C2S(WOW_DEAUTH_RECVD_EVENT); 5927 C2S(WOW_MAGIC_PKT_RECVD_EVENT); 5928 C2S(WOW_GTK_ERR_EVENT); 5929 C2S(WOW_FOURWAY_HSHAKE_EVENT); 5930 C2S(WOW_EAPOL_RECVD_EVENT); 5931 C2S(WOW_NLO_DETECTED_EVENT); 5932 C2S(WOW_DISASSOC_RECVD_EVENT); 5933 C2S(WOW_PATTERN_MATCH_EVENT); 5934 C2S(WOW_CSA_IE_EVENT); 5935 C2S(WOW_PROBE_REQ_WPS_IE_EVENT); 5936 C2S(WOW_AUTH_REQ_EVENT); 5937 C2S(WOW_ASSOC_REQ_EVENT); 5938 C2S(WOW_HTT_EVENT); 5939 C2S(WOW_RA_MATCH_EVENT); 5940 C2S(WOW_HOST_AUTO_SHUTDOWN_EVENT); 5941 C2S(WOW_IOAC_MAGIC_EVENT); 5942 C2S(WOW_IOAC_SHORT_EVENT); 5943 C2S(WOW_IOAC_EXTEND_EVENT); 5944 C2S(WOW_IOAC_TIMER_EVENT); 5945 C2S(WOW_DFS_PHYERR_RADAR_EVENT); 5946 C2S(WOW_BEACON_EVENT); 5947 C2S(WOW_CLIENT_KICKOUT_EVENT); 5948 C2S(WOW_EVENT_MAX); 5949 default: 5950 return NULL; 5951 } 5952 } 5953 5954 enum wmi_wow_wake_reason { 5955 WOW_REASON_UNSPECIFIED = -1, 5956 WOW_REASON_NLOD = 0, 5957 WOW_REASON_AP_ASSOC_LOST, 5958 WOW_REASON_LOW_RSSI, 5959 WOW_REASON_DEAUTH_RECVD, 5960 WOW_REASON_DISASSOC_RECVD, 5961 WOW_REASON_GTK_HS_ERR, 5962 WOW_REASON_EAP_REQ, 5963 WOW_REASON_FOURWAY_HS_RECV, 5964 WOW_REASON_TIMER_INTR_RECV, 5965 WOW_REASON_PATTERN_MATCH_FOUND, 5966 WOW_REASON_RECV_MAGIC_PATTERN, 5967 WOW_REASON_P2P_DISC, 5968 WOW_REASON_WLAN_HB, 5969 WOW_REASON_CSA_EVENT, 5970 WOW_REASON_PROBE_REQ_WPS_IE_RECV, 5971 WOW_REASON_AUTH_REQ_RECV, 5972 WOW_REASON_ASSOC_REQ_RECV, 5973 WOW_REASON_HTT_EVENT, 5974 WOW_REASON_RA_MATCH, 5975 WOW_REASON_HOST_AUTO_SHUTDOWN, 5976 WOW_REASON_IOAC_MAGIC_EVENT, 5977 WOW_REASON_IOAC_SHORT_EVENT, 5978 WOW_REASON_IOAC_EXTEND_EVENT, 5979 WOW_REASON_IOAC_TIMER_EVENT, 5980 WOW_REASON_ROAM_HO, 5981 WOW_REASON_DFS_PHYERR_RADADR_EVENT, 5982 WOW_REASON_BEACON_RECV, 5983 WOW_REASON_CLIENT_KICKOUT_EVENT, 5984 WOW_REASON_PAGE_FAULT = 0x3a, 5985 WOW_REASON_DEBUG_TEST = 0xFF, 5986 }; 5987 5988 static inline const char *wow_reason(enum wmi_wow_wake_reason reason) 5989 { 5990 switch (reason) { 5991 C2S(WOW_REASON_UNSPECIFIED); 5992 C2S(WOW_REASON_NLOD); 5993 C2S(WOW_REASON_AP_ASSOC_LOST); 5994 C2S(WOW_REASON_LOW_RSSI); 5995 C2S(WOW_REASON_DEAUTH_RECVD); 5996 C2S(WOW_REASON_DISASSOC_RECVD); 5997 C2S(WOW_REASON_GTK_HS_ERR); 5998 C2S(WOW_REASON_EAP_REQ); 5999 C2S(WOW_REASON_FOURWAY_HS_RECV); 6000 C2S(WOW_REASON_TIMER_INTR_RECV); 6001 C2S(WOW_REASON_PATTERN_MATCH_FOUND); 6002 C2S(WOW_REASON_RECV_MAGIC_PATTERN); 6003 C2S(WOW_REASON_P2P_DISC); 6004 C2S(WOW_REASON_WLAN_HB); 6005 C2S(WOW_REASON_CSA_EVENT); 6006 C2S(WOW_REASON_PROBE_REQ_WPS_IE_RECV); 6007 C2S(WOW_REASON_AUTH_REQ_RECV); 6008 C2S(WOW_REASON_ASSOC_REQ_RECV); 6009 C2S(WOW_REASON_HTT_EVENT); 6010 C2S(WOW_REASON_RA_MATCH); 6011 C2S(WOW_REASON_HOST_AUTO_SHUTDOWN); 6012 C2S(WOW_REASON_IOAC_MAGIC_EVENT); 6013 C2S(WOW_REASON_IOAC_SHORT_EVENT); 6014 C2S(WOW_REASON_IOAC_EXTEND_EVENT); 6015 C2S(WOW_REASON_IOAC_TIMER_EVENT); 6016 C2S(WOW_REASON_ROAM_HO); 6017 C2S(WOW_REASON_DFS_PHYERR_RADADR_EVENT); 6018 C2S(WOW_REASON_BEACON_RECV); 6019 C2S(WOW_REASON_CLIENT_KICKOUT_EVENT); 6020 C2S(WOW_REASON_PAGE_FAULT); 6021 C2S(WOW_REASON_DEBUG_TEST); 6022 default: 6023 return NULL; 6024 } 6025 } 6026 6027 #undef C2S 6028 6029 struct wmi_wow_ev_arg { 6030 u32 vdev_id; 6031 u32 flag; 6032 enum wmi_wow_wake_reason wake_reason; 6033 u32 data_len; 6034 }; 6035 6036 enum wmi_tlv_pattern_type { 6037 WOW_PATTERN_MIN = 0, 6038 WOW_BITMAP_PATTERN = WOW_PATTERN_MIN, 6039 WOW_IPV4_SYNC_PATTERN, 6040 WOW_IPV6_SYNC_PATTERN, 6041 WOW_WILD_CARD_PATTERN, 6042 WOW_TIMER_PATTERN, 6043 WOW_MAGIC_PATTERN, 6044 WOW_IPV6_RA_PATTERN, 6045 WOW_IOAC_PKT_PATTERN, 6046 WOW_IOAC_TMR_PATTERN, 6047 WOW_PATTERN_MAX 6048 }; 6049 6050 #define WOW_DEFAULT_BITMAP_PATTERN_SIZE 148 6051 #define WOW_DEFAULT_BITMASK_SIZE 148 6052 6053 #define WOW_MIN_PATTERN_SIZE 1 6054 #define WOW_MAX_PATTERN_SIZE 148 6055 #define WOW_MAX_PKT_OFFSET 128 6056 #define WOW_HDR_LEN (sizeof(struct ieee80211_hdr_3addr) + \ 6057 sizeof(struct rfc1042_hdr)) 6058 #define WOW_MAX_REDUCE (WOW_HDR_LEN - sizeof(struct ethhdr) - \ 6059 offsetof(struct ieee80211_hdr_3addr, addr1)) 6060 6061 struct wmi_wow_add_del_event_cmd { 6062 u32 tlv_header; 6063 u32 vdev_id; 6064 u32 is_add; 6065 u32 event_bitmap; 6066 } __packed; 6067 6068 struct wmi_wow_enable_cmd { 6069 u32 tlv_header; 6070 u32 enable; 6071 u32 pause_iface_config; 6072 u32 flags; 6073 } __packed; 6074 6075 struct wmi_wow_host_wakeup_ind { 6076 u32 tlv_header; 6077 u32 reserved; 6078 } __packed; 6079 6080 struct wmi_tlv_wow_event_info { 6081 u32 vdev_id; 6082 u32 flag; 6083 u32 wake_reason; 6084 u32 data_len; 6085 } __packed; 6086 6087 struct wmi_wow_bitmap_pattern { 6088 u32 tlv_header; 6089 u8 patternbuf[WOW_DEFAULT_BITMAP_PATTERN_SIZE]; 6090 u8 bitmaskbuf[WOW_DEFAULT_BITMASK_SIZE]; 6091 u32 pattern_offset; 6092 u32 pattern_len; 6093 u32 bitmask_len; 6094 u32 pattern_id; 6095 } __packed; 6096 6097 struct wmi_wow_add_pattern_cmd { 6098 u32 tlv_header; 6099 u32 vdev_id; 6100 u32 pattern_id; 6101 u32 pattern_type; 6102 } __packed; 6103 6104 struct wmi_wow_del_pattern_cmd { 6105 u32 tlv_header; 6106 u32 vdev_id; 6107 u32 pattern_id; 6108 u32 pattern_type; 6109 } __packed; 6110 6111 #define WMI_PNO_MAX_SCHED_SCAN_PLANS 2 6112 #define WMI_PNO_MAX_SCHED_SCAN_PLAN_INT 7200 6113 #define WMI_PNO_MAX_SCHED_SCAN_PLAN_ITRNS 100 6114 #define WMI_PNO_MAX_NETW_CHANNELS 26 6115 #define WMI_PNO_MAX_NETW_CHANNELS_EX 60 6116 #define WMI_PNO_MAX_SUPP_NETWORKS WLAN_SCAN_PARAMS_MAX_SSID 6117 #define WMI_PNO_MAX_IE_LENGTH WLAN_SCAN_PARAMS_MAX_IE_LEN 6118 6119 /* size based of dot11 declaration without extra IEs as we will not carry those for PNO */ 6120 #define WMI_PNO_MAX_PB_REQ_SIZE 450 6121 6122 #define WMI_PNO_24G_DEFAULT_CH 1 6123 #define WMI_PNO_5G_DEFAULT_CH 36 6124 6125 #define WMI_ACTIVE_MAX_CHANNEL_TIME 40 6126 #define WMI_PASSIVE_MAX_CHANNEL_TIME 110 6127 6128 /* SSID broadcast type */ 6129 enum wmi_ssid_bcast_type { 6130 BCAST_UNKNOWN = 0, 6131 BCAST_NORMAL = 1, 6132 BCAST_HIDDEN = 2, 6133 }; 6134 6135 #define WMI_NLO_MAX_SSIDS 16 6136 #define WMI_NLO_MAX_CHAN 48 6137 6138 #define WMI_NLO_CONFIG_STOP BIT(0) 6139 #define WMI_NLO_CONFIG_START BIT(1) 6140 #define WMI_NLO_CONFIG_RESET BIT(2) 6141 #define WMI_NLO_CONFIG_SLOW_SCAN BIT(4) 6142 #define WMI_NLO_CONFIG_FAST_SCAN BIT(5) 6143 #define WMI_NLO_CONFIG_SSID_HIDE_EN BIT(6) 6144 6145 /* This bit is used to indicate if EPNO or supplicant PNO is enabled. 6146 * Only one of them can be enabled at a given time 6147 */ 6148 #define WMI_NLO_CONFIG_ENLO BIT(7) 6149 #define WMI_NLO_CONFIG_SCAN_PASSIVE BIT(8) 6150 #define WMI_NLO_CONFIG_ENLO_RESET BIT(9) 6151 #define WMI_NLO_CONFIG_SPOOFED_MAC_IN_PROBE_REQ BIT(10) 6152 #define WMI_NLO_CONFIG_RANDOM_SEQ_NO_IN_PROBE_REQ BIT(11) 6153 #define WMI_NLO_CONFIG_ENABLE_IE_WHITELIST_IN_PROBE_REQ BIT(12) 6154 #define WMI_NLO_CONFIG_ENABLE_CNLO_RSSI_CONFIG BIT(13) 6155 6156 struct wmi_nlo_ssid_param { 6157 u32 valid; 6158 struct wmi_ssid ssid; 6159 } __packed; 6160 6161 struct wmi_nlo_enc_param { 6162 u32 valid; 6163 u32 enc_type; 6164 } __packed; 6165 6166 struct wmi_nlo_auth_param { 6167 u32 valid; 6168 u32 auth_type; 6169 } __packed; 6170 6171 struct wmi_nlo_bcast_nw_param { 6172 u32 valid; 6173 u32 bcast_nw_type; 6174 } __packed; 6175 6176 struct wmi_nlo_rssi_param { 6177 u32 valid; 6178 s32 rssi; 6179 } __packed; 6180 6181 struct nlo_configured_parameters { 6182 /* TLV tag and len;*/ 6183 u32 tlv_header; 6184 struct wmi_nlo_ssid_param ssid; 6185 struct wmi_nlo_enc_param enc_type; 6186 struct wmi_nlo_auth_param auth_type; 6187 struct wmi_nlo_rssi_param rssi_cond; 6188 6189 /* indicates if the SSID is hidden or not */ 6190 struct wmi_nlo_bcast_nw_param bcast_nw_type; 6191 } __packed; 6192 6193 struct wmi_network_type { 6194 struct wmi_ssid ssid; 6195 u32 authentication; 6196 u32 encryption; 6197 u32 bcast_nw_type; 6198 u8 channel_count; 6199 u16 channels[WMI_PNO_MAX_NETW_CHANNELS_EX]; 6200 s32 rssi_threshold; 6201 }; 6202 6203 struct wmi_pno_scan_req { 6204 u8 enable; 6205 u8 vdev_id; 6206 u8 uc_networks_count; 6207 struct wmi_network_type a_networks[WMI_PNO_MAX_SUPP_NETWORKS]; 6208 u32 fast_scan_period; 6209 u32 slow_scan_period; 6210 u8 fast_scan_max_cycles; 6211 6212 bool do_passive_scan; 6213 6214 u32 delay_start_time; 6215 u32 active_min_time; 6216 u32 active_max_time; 6217 u32 passive_min_time; 6218 u32 passive_max_time; 6219 6220 /* mac address randomization attributes */ 6221 u32 enable_pno_scan_randomization; 6222 u8 mac_addr[ETH_ALEN]; 6223 u8 mac_addr_mask[ETH_ALEN]; 6224 }; 6225 6226 struct wmi_wow_nlo_config_cmd { 6227 u32 tlv_header; 6228 u32 flags; 6229 u32 vdev_id; 6230 u32 fast_scan_max_cycles; 6231 u32 active_dwell_time; 6232 u32 passive_dwell_time; 6233 u32 probe_bundle_size; 6234 6235 /* ART = IRT */ 6236 u32 rest_time; 6237 6238 /* Max value that can be reached after SBM */ 6239 u32 max_rest_time; 6240 6241 /* SBM */ 6242 u32 scan_backoff_multiplier; 6243 6244 /* SCBM */ 6245 u32 fast_scan_period; 6246 6247 /* specific to windows */ 6248 u32 slow_scan_period; 6249 6250 u32 no_of_ssids; 6251 6252 u32 num_of_channels; 6253 6254 /* NLO scan start delay time in milliseconds */ 6255 u32 delay_start_time; 6256 6257 /* MAC Address to use in Probe Req as SA */ 6258 struct wmi_mac_addr mac_addr; 6259 6260 /* Mask on which MAC has to be randomized */ 6261 struct wmi_mac_addr mac_mask; 6262 6263 /* IE bitmap to use in Probe Req */ 6264 u32 ie_bitmap[8]; 6265 6266 /* Number of vendor OUIs. In the TLV vendor_oui[] */ 6267 u32 num_vendor_oui; 6268 6269 /* Number of connected NLO band preferences */ 6270 u32 num_cnlo_band_pref; 6271 6272 /* The TLVs will follow. 6273 * nlo_configured_parameters nlo_list[]; 6274 * u32 channel_list[num_of_channels]; 6275 */ 6276 } __packed; 6277 6278 #define WMI_MAX_NS_OFFLOADS 2 6279 #define WMI_MAX_ARP_OFFLOADS 2 6280 6281 #define WMI_ARPOL_FLAGS_VALID BIT(0) 6282 #define WMI_ARPOL_FLAGS_MAC_VALID BIT(1) 6283 #define WMI_ARPOL_FLAGS_REMOTE_IP_VALID BIT(2) 6284 6285 struct wmi_arp_offload_tuple { 6286 u32 tlv_header; 6287 u32 flags; 6288 u8 target_ipaddr[4]; 6289 u8 remote_ipaddr[4]; 6290 struct wmi_mac_addr target_mac; 6291 } __packed; 6292 6293 #define WMI_NSOL_FLAGS_VALID BIT(0) 6294 #define WMI_NSOL_FLAGS_MAC_VALID BIT(1) 6295 #define WMI_NSOL_FLAGS_REMOTE_IP_VALID BIT(2) 6296 #define WMI_NSOL_FLAGS_IS_IPV6_ANYCAST BIT(3) 6297 6298 #define WMI_NSOL_MAX_TARGET_IPS 2 6299 6300 struct wmi_ns_offload_tuple { 6301 u32 tlv_header; 6302 u32 flags; 6303 u8 target_ipaddr[WMI_NSOL_MAX_TARGET_IPS][16]; 6304 u8 solicitation_ipaddr[16]; 6305 u8 remote_ipaddr[16]; 6306 struct wmi_mac_addr target_mac; 6307 } __packed; 6308 6309 struct wmi_set_arp_ns_offload_cmd { 6310 u32 tlv_header; 6311 u32 flags; 6312 u32 vdev_id; 6313 u32 num_ns_ext_tuples; 6314 /* The TLVs follow: 6315 * wmi_ns_offload_tuple ns_tuples[WMI_MAX_NS_OFFLOADS]; 6316 * wmi_arp_offload_tuple arp_tuples[WMI_MAX_ARP_OFFLOADS]; 6317 * wmi_ns_offload_tuple ns_ext_tuples[num_ns_ext_tuples]; 6318 */ 6319 } __packed; 6320 6321 #define GTK_OFFLOAD_OPCODE_MASK 0xFF000000 6322 #define GTK_OFFLOAD_ENABLE_OPCODE 0x01000000 6323 #define GTK_OFFLOAD_DISABLE_OPCODE 0x02000000 6324 #define GTK_OFFLOAD_REQUEST_STATUS_OPCODE 0x04000000 6325 6326 #define GTK_OFFLOAD_KEK_BYTES 16 6327 #define GTK_OFFLOAD_KCK_BYTES 16 6328 #define GTK_REPLAY_COUNTER_BYTES 8 6329 #define WMI_MAX_KEY_LEN 32 6330 #define IGTK_PN_SIZE 6 6331 6332 struct wmi_replayc_cnt { 6333 union { 6334 u8 counter[GTK_REPLAY_COUNTER_BYTES]; 6335 struct { 6336 u32 word0; 6337 u32 word1; 6338 } __packed; 6339 } __packed; 6340 } __packed; 6341 6342 struct wmi_gtk_offload_status_event { 6343 u32 vdev_id; 6344 u32 flags; 6345 u32 refresh_cnt; 6346 struct wmi_replayc_cnt replay_ctr; 6347 u8 igtk_key_index; 6348 u8 igtk_key_length; 6349 u8 igtk_key_rsc[IGTK_PN_SIZE]; 6350 u8 igtk_key[WMI_MAX_KEY_LEN]; 6351 u8 gtk_key_index; 6352 u8 gtk_key_length; 6353 u8 gtk_key_rsc[GTK_REPLAY_COUNTER_BYTES]; 6354 u8 gtk_key[WMI_MAX_KEY_LEN]; 6355 } __packed; 6356 6357 struct wmi_gtk_rekey_offload_cmd { 6358 u32 tlv_header; 6359 u32 vdev_id; 6360 u32 flags; 6361 u8 kek[GTK_OFFLOAD_KEK_BYTES]; 6362 u8 kck[GTK_OFFLOAD_KCK_BYTES]; 6363 u8 replay_ctr[GTK_REPLAY_COUNTER_BYTES]; 6364 } __packed; 6365 6366 #define BIOS_SAR_TABLE_LEN (22) 6367 #define BIOS_SAR_RSVD1_LEN (6) 6368 #define BIOS_SAR_RSVD2_LEN (18) 6369 6370 struct wmi_pdev_set_sar_table_cmd { 6371 u32 tlv_header; 6372 u32 pdev_id; 6373 u32 sar_len; 6374 u32 rsvd_len; 6375 } __packed; 6376 6377 struct wmi_pdev_set_geo_table_cmd { 6378 u32 tlv_header; 6379 u32 pdev_id; 6380 u32 rsvd_len; 6381 } __packed; 6382 6383 struct wmi_sta_keepalive_cmd { 6384 u32 tlv_header; 6385 u32 vdev_id; 6386 u32 enabled; 6387 6388 /* WMI_STA_KEEPALIVE_METHOD_ */ 6389 u32 method; 6390 6391 /* in seconds */ 6392 u32 interval; 6393 6394 /* following this structure is the TLV for struct 6395 * wmi_sta_keepalive_arp_resp 6396 */ 6397 } __packed; 6398 6399 struct wmi_sta_keepalive_arp_resp { 6400 u32 tlv_header; 6401 u32 src_ip4_addr; 6402 u32 dest_ip4_addr; 6403 struct wmi_mac_addr dest_mac_addr; 6404 } __packed; 6405 6406 struct wmi_sta_keepalive_arg { 6407 u32 vdev_id; 6408 u32 enabled; 6409 u32 method; 6410 u32 interval; 6411 u32 src_ip4_addr; 6412 u32 dest_ip4_addr; 6413 const u8 dest_mac_addr[ETH_ALEN]; 6414 }; 6415 6416 enum wmi_sta_keepalive_method { 6417 WMI_STA_KEEPALIVE_METHOD_NULL_FRAME = 1, 6418 WMI_STA_KEEPALIVE_METHOD_UNSOLICITED_ARP_RESPONSE = 2, 6419 WMI_STA_KEEPALIVE_METHOD_ETHERNET_LOOPBACK = 3, 6420 WMI_STA_KEEPALIVE_METHOD_GRATUITOUS_ARP_REQUEST = 4, 6421 WMI_STA_KEEPALIVE_METHOD_MGMT_VENDOR_ACTION = 5, 6422 }; 6423 6424 #define WMI_STA_KEEPALIVE_INTERVAL_DEFAULT 30 6425 #define WMI_STA_KEEPALIVE_INTERVAL_DISABLE 0 6426 6427 enum wmi_wmm_params_type { 6428 WMI_WMM_PARAM_TYPE_LEGACY = 0, 6429 WMI_WMM_PARAM_TYPE_11AX_MU_EDCA = 1, 6430 }; 6431 6432 const void **ath11k_wmi_tlv_parse_alloc(struct ath11k_base *ab, 6433 struct sk_buff *skb, gfp_t gfp); 6434 int ath11k_wmi_cmd_send(struct ath11k_pdev_wmi *wmi, struct sk_buff *skb, 6435 u32 cmd_id); 6436 struct sk_buff *ath11k_wmi_alloc_skb(struct ath11k_wmi_base *wmi_sc, u32 len); 6437 int ath11k_wmi_mgmt_send(struct ath11k *ar, u32 vdev_id, u32 buf_id, 6438 struct sk_buff *frame, bool tx_params_valid); 6439 int ath11k_wmi_p2p_go_bcn_ie(struct ath11k *ar, u32 vdev_id, 6440 const u8 *p2p_ie); 6441 int ath11k_wmi_bcn_tmpl(struct ath11k *ar, u32 vdev_id, 6442 struct ieee80211_mutable_offsets *offs, 6443 struct sk_buff *bcn, u32 ema_param); 6444 int ath11k_wmi_vdev_down(struct ath11k *ar, u8 vdev_id); 6445 int ath11k_wmi_vdev_up(struct ath11k *ar, u32 vdev_id, u32 aid, 6446 const u8 *bssid, u8 *tx_bssid, u32 nontx_profile_idx, 6447 u32 nontx_profile_cnt); 6448 int ath11k_wmi_vdev_stop(struct ath11k *ar, u8 vdev_id); 6449 int ath11k_wmi_vdev_start(struct ath11k *ar, struct wmi_vdev_start_req_arg *arg, 6450 bool restart); 6451 int ath11k_wmi_set_peer_param(struct ath11k *ar, const u8 *peer_addr, 6452 u32 vdev_id, u32 param_id, u32 param_val); 6453 int ath11k_wmi_pdev_set_param(struct ath11k *ar, u32 param_id, 6454 u32 param_value, u8 pdev_id); 6455 int ath11k_wmi_pdev_set_ps_mode(struct ath11k *ar, int vdev_id, 6456 enum wmi_sta_ps_mode psmode); 6457 int ath11k_wmi_wait_for_unified_ready(struct ath11k_base *ab); 6458 int ath11k_wmi_cmd_init(struct ath11k_base *ab); 6459 int ath11k_wmi_wait_for_service_ready(struct ath11k_base *ab); 6460 int ath11k_wmi_connect(struct ath11k_base *ab); 6461 int ath11k_wmi_pdev_attach(struct ath11k_base *ab, 6462 u8 pdev_id); 6463 int ath11k_wmi_attach(struct ath11k_base *ab); 6464 void ath11k_wmi_detach(struct ath11k_base *ab); 6465 int ath11k_wmi_vdev_create(struct ath11k *ar, u8 *macaddr, 6466 struct vdev_create_params *param); 6467 int ath11k_wmi_peer_rx_reorder_queue_setup(struct ath11k *ar, int vdev_id, 6468 const u8 *addr, dma_addr_t paddr, 6469 u8 tid, u8 ba_window_size_valid, 6470 u32 ba_window_size); 6471 int ath11k_wmi_send_peer_create_cmd(struct ath11k *ar, 6472 struct peer_create_params *param); 6473 int ath11k_wmi_vdev_set_param_cmd(struct ath11k *ar, u32 vdev_id, 6474 u32 param_id, u32 param_value); 6475 6476 int ath11k_wmi_set_sta_ps_param(struct ath11k *ar, u32 vdev_id, 6477 u32 param, u32 param_value); 6478 int ath11k_wmi_force_fw_hang_cmd(struct ath11k *ar, u32 type, u32 delay_time_ms); 6479 int ath11k_wmi_send_peer_delete_cmd(struct ath11k *ar, 6480 const u8 *peer_addr, u8 vdev_id); 6481 int ath11k_wmi_vdev_delete(struct ath11k *ar, u8 vdev_id); 6482 void ath11k_wmi_start_scan_init(struct ath11k *ar, struct scan_req_params *arg); 6483 int ath11k_wmi_send_scan_start_cmd(struct ath11k *ar, 6484 struct scan_req_params *params); 6485 int ath11k_wmi_send_scan_stop_cmd(struct ath11k *ar, 6486 struct scan_cancel_param *param); 6487 int ath11k_wmi_send_wmm_update_cmd_tlv(struct ath11k *ar, u32 vdev_id, 6488 struct wmi_wmm_params_all_arg *param, 6489 enum wmi_wmm_params_type wmm_param_type); 6490 int ath11k_wmi_pdev_suspend(struct ath11k *ar, u32 suspend_opt, 6491 u32 pdev_id); 6492 int ath11k_wmi_pdev_resume(struct ath11k *ar, u32 pdev_id); 6493 6494 int ath11k_wmi_send_peer_assoc_cmd(struct ath11k *ar, 6495 struct peer_assoc_params *param); 6496 int ath11k_wmi_vdev_install_key(struct ath11k *ar, 6497 struct wmi_vdev_install_key_arg *arg); 6498 int ath11k_wmi_pdev_bss_chan_info_request(struct ath11k *ar, 6499 enum wmi_bss_chan_info_req_type type); 6500 int ath11k_wmi_send_stats_request_cmd(struct ath11k *ar, 6501 struct stats_request_params *param); 6502 int ath11k_wmi_send_pdev_temperature_cmd(struct ath11k *ar); 6503 int ath11k_wmi_send_peer_flush_tids_cmd(struct ath11k *ar, 6504 u8 peer_addr[ETH_ALEN], 6505 struct peer_flush_params *param); 6506 int ath11k_wmi_send_set_ap_ps_param_cmd(struct ath11k *ar, u8 *peer_addr, 6507 struct ap_ps_params *param); 6508 int ath11k_wmi_send_scan_chan_list_cmd(struct ath11k *ar, 6509 struct scan_chan_list_params *chan_list); 6510 int ath11k_wmi_send_dfs_phyerr_offload_enable_cmd(struct ath11k *ar, 6511 u32 pdev_id); 6512 int ath11k_wmi_addba_clear_resp(struct ath11k *ar, u32 vdev_id, const u8 *mac); 6513 int ath11k_wmi_addba_send(struct ath11k *ar, u32 vdev_id, const u8 *mac, 6514 u32 tid, u32 buf_size); 6515 int ath11k_wmi_addba_set_resp(struct ath11k *ar, u32 vdev_id, const u8 *mac, 6516 u32 tid, u32 status); 6517 int ath11k_wmi_delba_send(struct ath11k *ar, u32 vdev_id, const u8 *mac, 6518 u32 tid, u32 initiator, u32 reason); 6519 int ath11k_wmi_send_bcn_offload_control_cmd(struct ath11k *ar, 6520 u32 vdev_id, u32 bcn_ctrl_op); 6521 int ath11k_wmi_send_set_current_country_cmd(struct ath11k *ar, 6522 struct wmi_set_current_country_params *param); 6523 int 6524 ath11k_wmi_send_init_country_cmd(struct ath11k *ar, 6525 struct wmi_init_country_params init_cc_param); 6526 6527 int ath11k_wmi_send_11d_scan_start_cmd(struct ath11k *ar, 6528 struct wmi_11d_scan_start_params *param); 6529 int ath11k_wmi_send_11d_scan_stop_cmd(struct ath11k *ar, u32 vdev_id); 6530 6531 int 6532 ath11k_wmi_send_thermal_mitigation_param_cmd(struct ath11k *ar, 6533 struct thermal_mitigation_params *param); 6534 int ath11k_wmi_pdev_pktlog_enable(struct ath11k *ar, u32 pktlog_filter); 6535 int ath11k_wmi_pdev_pktlog_disable(struct ath11k *ar); 6536 int ath11k_wmi_pdev_peer_pktlog_filter(struct ath11k *ar, u8 *addr, u8 enable); 6537 int 6538 ath11k_wmi_rx_reord_queue_remove(struct ath11k *ar, 6539 struct rx_reorder_queue_remove_params *param); 6540 int ath11k_wmi_send_pdev_set_regdomain(struct ath11k *ar, 6541 struct pdev_set_regdomain_params *param); 6542 int ath11k_wmi_pull_fw_stats(struct ath11k_base *ab, struct sk_buff *skb, 6543 struct ath11k_fw_stats *stats); 6544 void ath11k_wmi_fw_stats_fill(struct ath11k *ar, 6545 struct ath11k_fw_stats *fw_stats, u32 stats_id, 6546 char *buf); 6547 int ath11k_wmi_simulate_radar(struct ath11k *ar); 6548 void ath11k_wmi_fill_default_twt_params(struct wmi_twt_enable_params *twt_params); 6549 int ath11k_wmi_send_twt_enable_cmd(struct ath11k *ar, u32 pdev_id, 6550 struct wmi_twt_enable_params *params); 6551 int ath11k_wmi_send_twt_disable_cmd(struct ath11k *ar, u32 pdev_id); 6552 int ath11k_wmi_send_twt_add_dialog_cmd(struct ath11k *ar, 6553 struct wmi_twt_add_dialog_params *params); 6554 int ath11k_wmi_send_twt_del_dialog_cmd(struct ath11k *ar, 6555 struct wmi_twt_del_dialog_params *params); 6556 int ath11k_wmi_send_twt_pause_dialog_cmd(struct ath11k *ar, 6557 struct wmi_twt_pause_dialog_params *params); 6558 int ath11k_wmi_send_twt_resume_dialog_cmd(struct ath11k *ar, 6559 struct wmi_twt_resume_dialog_params *params); 6560 int ath11k_wmi_send_obss_spr_cmd(struct ath11k *ar, u32 vdev_id, 6561 struct ieee80211_he_obss_pd *he_obss_pd); 6562 int ath11k_wmi_pdev_set_srg_bss_color_bitmap(struct ath11k *ar, u32 *bitmap); 6563 int ath11k_wmi_pdev_set_srg_patial_bssid_bitmap(struct ath11k *ar, u32 *bitmap); 6564 int ath11k_wmi_pdev_srg_obss_color_enable_bitmap(struct ath11k *ar, 6565 u32 *bitmap); 6566 int ath11k_wmi_pdev_srg_obss_bssid_enable_bitmap(struct ath11k *ar, 6567 u32 *bitmap); 6568 int ath11k_wmi_pdev_non_srg_obss_color_enable_bitmap(struct ath11k *ar, 6569 u32 *bitmap); 6570 int ath11k_wmi_pdev_non_srg_obss_bssid_enable_bitmap(struct ath11k *ar, 6571 u32 *bitmap); 6572 int ath11k_wmi_send_obss_color_collision_cfg_cmd(struct ath11k *ar, u32 vdev_id, 6573 u8 bss_color, u32 period, 6574 bool enable); 6575 int ath11k_wmi_send_bss_color_change_enable_cmd(struct ath11k *ar, u32 vdev_id, 6576 bool enable); 6577 int ath11k_wmi_pdev_lro_cfg(struct ath11k *ar, int pdev_id); 6578 int ath11k_wmi_pdev_dma_ring_cfg(struct ath11k *ar, 6579 struct ath11k_wmi_pdev_dma_ring_cfg_req_cmd *param); 6580 int ath11k_wmi_vdev_spectral_enable(struct ath11k *ar, u32 vdev_id, 6581 u32 trigger, u32 enable); 6582 int ath11k_wmi_vdev_spectral_conf(struct ath11k *ar, 6583 struct ath11k_wmi_vdev_spectral_conf_param *param); 6584 int ath11k_wmi_fils_discovery_tmpl(struct ath11k *ar, u32 vdev_id, 6585 struct sk_buff *tmpl); 6586 int ath11k_wmi_fils_discovery(struct ath11k *ar, u32 vdev_id, u32 interval, 6587 bool unsol_bcast_probe_resp_enabled); 6588 int ath11k_wmi_probe_resp_tmpl(struct ath11k *ar, u32 vdev_id, 6589 struct sk_buff *tmpl); 6590 int ath11k_wmi_set_hw_mode(struct ath11k_base *ab, 6591 enum wmi_host_hw_mode_config_type mode); 6592 int ath11k_wmi_wow_host_wakeup_ind(struct ath11k *ar); 6593 int ath11k_wmi_wow_enable(struct ath11k *ar); 6594 int ath11k_wmi_scan_prob_req_oui(struct ath11k *ar, 6595 const u8 mac_addr[ETH_ALEN]); 6596 int ath11k_wmi_fw_dbglog_cfg(struct ath11k *ar, u32 *module_id_bitmap, 6597 struct ath11k_fw_dbglog *dbglog); 6598 int ath11k_wmi_wow_config_pno(struct ath11k *ar, u32 vdev_id, 6599 struct wmi_pno_scan_req *pno_scan); 6600 int ath11k_wmi_wow_del_pattern(struct ath11k *ar, u32 vdev_id, u32 pattern_id); 6601 int ath11k_wmi_wow_add_pattern(struct ath11k *ar, u32 vdev_id, u32 pattern_id, 6602 const u8 *pattern, const u8 *mask, 6603 int pattern_len, int pattern_offset); 6604 int ath11k_wmi_wow_add_wakeup_event(struct ath11k *ar, u32 vdev_id, 6605 enum wmi_wow_wakeup_event event, 6606 u32 enable); 6607 int ath11k_wmi_hw_data_filter_cmd(struct ath11k *ar, u32 vdev_id, 6608 u32 filter_bitmap, bool enable); 6609 int ath11k_wmi_arp_ns_offload(struct ath11k *ar, 6610 struct ath11k_vif *arvif, bool enable); 6611 int ath11k_wmi_gtk_rekey_offload(struct ath11k *ar, 6612 struct ath11k_vif *arvif, bool enable); 6613 int ath11k_wmi_gtk_rekey_getinfo(struct ath11k *ar, 6614 struct ath11k_vif *arvif); 6615 int ath11k_wmi_pdev_set_bios_sar_table_param(struct ath11k *ar, const u8 *sar_val); 6616 int ath11k_wmi_pdev_set_bios_geo_table_param(struct ath11k *ar); 6617 int ath11k_wmi_sta_keepalive(struct ath11k *ar, 6618 const struct wmi_sta_keepalive_arg *arg); 6619 bool ath11k_wmi_supports_6ghz_cc_ext(struct ath11k *ar); 6620 int ath11k_wmi_send_vdev_set_tpc_power(struct ath11k *ar, 6621 u32 vdev_id, 6622 struct ath11k_reg_tpc_power_info *param); 6623 int ath11k_wmi_peer_set_cfr_capture_conf(struct ath11k *ar, 6624 u32 vdev_id, const u8 *mac, 6625 struct wmi_peer_cfr_capture_conf_arg *arg); 6626 #endif 6627