1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */ 2 /* 3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. 4 */ 5 6 #ifndef ATH11K_WMI_H 7 #define ATH11K_WMI_H 8 9 #include <net/mac80211.h> 10 #include "htc.h" 11 12 struct ath11k_base; 13 struct ath11k; 14 struct ath11k_fw_stats; 15 16 #define PSOC_HOST_MAX_NUM_SS (8) 17 18 /* defines to set Packet extension values whic can be 0 us, 8 usec or 16 usec */ 19 #define MAX_HE_NSS 8 20 #define MAX_HE_MODULATION 8 21 #define MAX_HE_RU 4 22 #define HE_MODULATION_NONE 7 23 #define HE_PET_0_USEC 0 24 #define HE_PET_8_USEC 1 25 #define HE_PET_16_USEC 2 26 27 #define WMI_MAX_CHAINS 8 28 29 #define WMI_MAX_NUM_SS MAX_HE_NSS 30 #define WMI_MAX_NUM_RU MAX_HE_RU 31 32 #define WMI_TLV_CMD(grp_id) (((grp_id) << 12) | 0x1) 33 #define WMI_TLV_EV(grp_id) (((grp_id) << 12) | 0x1) 34 #define WMI_TLV_CMD_UNSUPPORTED 0 35 #define WMI_TLV_PDEV_PARAM_UNSUPPORTED 0 36 #define WMI_TLV_VDEV_PARAM_UNSUPPORTED 0 37 38 struct wmi_cmd_hdr { 39 u32 cmd_id; 40 } __packed; 41 42 struct wmi_tlv { 43 u32 header; 44 u8 value[]; 45 } __packed; 46 47 #define WMI_TLV_LEN GENMASK(15, 0) 48 #define WMI_TLV_TAG GENMASK(31, 16) 49 #define TLV_HDR_SIZE sizeof_field(struct wmi_tlv, header) 50 51 #define WMI_CMD_HDR_CMD_ID GENMASK(23, 0) 52 #define WMI_MAX_MEM_REQS 32 53 #define ATH11K_MAX_HW_LISTEN_INTERVAL 5 54 55 #define WLAN_SCAN_MAX_HINT_S_SSID 10 56 #define WLAN_SCAN_MAX_HINT_BSSID 10 57 #define MAX_RNR_BSS 5 58 59 #define WLAN_SCAN_MAX_HINT_S_SSID 10 60 #define WLAN_SCAN_MAX_HINT_BSSID 10 61 #define MAX_RNR_BSS 5 62 63 #define WLAN_SCAN_PARAMS_MAX_SSID 16 64 #define WLAN_SCAN_PARAMS_MAX_BSSID 4 65 #define WLAN_SCAN_PARAMS_MAX_IE_LEN 256 66 67 #define WMI_APPEND_TO_EXISTING_CHAN_LIST_FLAG 1 68 69 #define WMI_BA_MODE_BUFFER_SIZE_256 3 70 /* 71 * HW mode config type replicated from FW header 72 * @WMI_HOST_HW_MODE_SINGLE: Only one PHY is active. 73 * @WMI_HOST_HW_MODE_DBS: Both PHYs are active in different bands, 74 * one in 2G and another in 5G. 75 * @WMI_HOST_HW_MODE_SBS_PASSIVE: Both PHYs are in passive mode (only rx) in 76 * same band; no tx allowed. 77 * @WMI_HOST_HW_MODE_SBS: Both PHYs are active in the same band. 78 * Support for both PHYs within one band is planned 79 * for 5G only(as indicated in WMI_MAC_PHY_CAPABILITIES), 80 * but could be extended to other bands in the future. 81 * The separation of the band between the two PHYs needs 82 * to be communicated separately. 83 * @WMI_HOST_HW_MODE_DBS_SBS: 3 PHYs, with 2 on the same band doing SBS 84 * as in WMI_HW_MODE_SBS, and 3rd on the other band 85 * @WMI_HOST_HW_MODE_DBS_OR_SBS: Two PHY with one PHY capabale of both 2G and 86 * 5G. It can support SBS (5G + 5G) OR DBS (5G + 2G). 87 * @WMI_HOST_HW_MODE_MAX: Max hw_mode_id. Used to indicate invalid mode. 88 */ 89 enum wmi_host_hw_mode_config_type { 90 WMI_HOST_HW_MODE_SINGLE = 0, 91 WMI_HOST_HW_MODE_DBS = 1, 92 WMI_HOST_HW_MODE_SBS_PASSIVE = 2, 93 WMI_HOST_HW_MODE_SBS = 3, 94 WMI_HOST_HW_MODE_DBS_SBS = 4, 95 WMI_HOST_HW_MODE_DBS_OR_SBS = 5, 96 97 /* keep last */ 98 WMI_HOST_HW_MODE_MAX 99 }; 100 101 /* HW mode priority values used to detect the preferred HW mode 102 * on the available modes. 103 */ 104 enum wmi_host_hw_mode_priority { 105 WMI_HOST_HW_MODE_DBS_SBS_PRI, 106 WMI_HOST_HW_MODE_DBS_PRI, 107 WMI_HOST_HW_MODE_DBS_OR_SBS_PRI, 108 WMI_HOST_HW_MODE_SBS_PRI, 109 WMI_HOST_HW_MODE_SBS_PASSIVE_PRI, 110 WMI_HOST_HW_MODE_SINGLE_PRI, 111 112 /* keep last the lowest priority */ 113 WMI_HOST_HW_MODE_MAX_PRI 114 }; 115 116 enum { 117 WMI_HOST_WLAN_2G_CAP = 0x1, 118 WMI_HOST_WLAN_5G_CAP = 0x2, 119 WMI_HOST_WLAN_2G_5G_CAP = 0x3, 120 }; 121 122 /* 123 * wmi command groups. 124 */ 125 enum wmi_cmd_group { 126 /* 0 to 2 are reserved */ 127 WMI_GRP_START = 0x3, 128 WMI_GRP_SCAN = WMI_GRP_START, 129 WMI_GRP_PDEV = 0x4, 130 WMI_GRP_VDEV = 0x5, 131 WMI_GRP_PEER = 0x6, 132 WMI_GRP_MGMT = 0x7, 133 WMI_GRP_BA_NEG = 0x8, 134 WMI_GRP_STA_PS = 0x9, 135 WMI_GRP_DFS = 0xa, 136 WMI_GRP_ROAM = 0xb, 137 WMI_GRP_OFL_SCAN = 0xc, 138 WMI_GRP_P2P = 0xd, 139 WMI_GRP_AP_PS = 0xe, 140 WMI_GRP_RATE_CTRL = 0xf, 141 WMI_GRP_PROFILE = 0x10, 142 WMI_GRP_SUSPEND = 0x11, 143 WMI_GRP_BCN_FILTER = 0x12, 144 WMI_GRP_WOW = 0x13, 145 WMI_GRP_RTT = 0x14, 146 WMI_GRP_SPECTRAL = 0x15, 147 WMI_GRP_STATS = 0x16, 148 WMI_GRP_ARP_NS_OFL = 0x17, 149 WMI_GRP_NLO_OFL = 0x18, 150 WMI_GRP_GTK_OFL = 0x19, 151 WMI_GRP_CSA_OFL = 0x1a, 152 WMI_GRP_CHATTER = 0x1b, 153 WMI_GRP_TID_ADDBA = 0x1c, 154 WMI_GRP_MISC = 0x1d, 155 WMI_GRP_GPIO = 0x1e, 156 WMI_GRP_FWTEST = 0x1f, 157 WMI_GRP_TDLS = 0x20, 158 WMI_GRP_RESMGR = 0x21, 159 WMI_GRP_STA_SMPS = 0x22, 160 WMI_GRP_WLAN_HB = 0x23, 161 WMI_GRP_RMC = 0x24, 162 WMI_GRP_MHF_OFL = 0x25, 163 WMI_GRP_LOCATION_SCAN = 0x26, 164 WMI_GRP_OEM = 0x27, 165 WMI_GRP_NAN = 0x28, 166 WMI_GRP_COEX = 0x29, 167 WMI_GRP_OBSS_OFL = 0x2a, 168 WMI_GRP_LPI = 0x2b, 169 WMI_GRP_EXTSCAN = 0x2c, 170 WMI_GRP_DHCP_OFL = 0x2d, 171 WMI_GRP_IPA = 0x2e, 172 WMI_GRP_MDNS_OFL = 0x2f, 173 WMI_GRP_SAP_OFL = 0x30, 174 WMI_GRP_OCB = 0x31, 175 WMI_GRP_SOC = 0x32, 176 WMI_GRP_PKT_FILTER = 0x33, 177 WMI_GRP_MAWC = 0x34, 178 WMI_GRP_PMF_OFFLOAD = 0x35, 179 WMI_GRP_BPF_OFFLOAD = 0x36, 180 WMI_GRP_NAN_DATA = 0x37, 181 WMI_GRP_PROTOTYPE = 0x38, 182 WMI_GRP_MONITOR = 0x39, 183 WMI_GRP_REGULATORY = 0x3a, 184 WMI_GRP_HW_DATA_FILTER = 0x3b, 185 WMI_GRP_WLM = 0x3c, 186 WMI_GRP_11K_OFFLOAD = 0x3d, 187 WMI_GRP_TWT = 0x3e, 188 WMI_GRP_MOTION_DET = 0x3f, 189 WMI_GRP_SPATIAL_REUSE = 0x40, 190 }; 191 192 #define WMI_CMD_GRP(grp_id) (((grp_id) << 12) | 0x1) 193 #define WMI_EVT_GRP_START_ID(grp_id) (((grp_id) << 12) | 0x1) 194 195 #define WMI_CMD_UNSUPPORTED 0 196 197 enum wmi_tlv_cmd_id { 198 WMI_INIT_CMDID = 0x1, 199 WMI_START_SCAN_CMDID = WMI_TLV_CMD(WMI_GRP_SCAN), 200 WMI_STOP_SCAN_CMDID, 201 WMI_SCAN_CHAN_LIST_CMDID, 202 WMI_SCAN_SCH_PRIO_TBL_CMDID, 203 WMI_SCAN_UPDATE_REQUEST_CMDID, 204 WMI_SCAN_PROB_REQ_OUI_CMDID, 205 WMI_SCAN_ADAPTIVE_DWELL_CONFIG_CMDID, 206 WMI_PDEV_SET_REGDOMAIN_CMDID = WMI_TLV_CMD(WMI_GRP_PDEV), 207 WMI_PDEV_SET_CHANNEL_CMDID, 208 WMI_PDEV_SET_PARAM_CMDID, 209 WMI_PDEV_PKTLOG_ENABLE_CMDID, 210 WMI_PDEV_PKTLOG_DISABLE_CMDID, 211 WMI_PDEV_SET_WMM_PARAMS_CMDID, 212 WMI_PDEV_SET_HT_CAP_IE_CMDID, 213 WMI_PDEV_SET_VHT_CAP_IE_CMDID, 214 WMI_PDEV_SET_DSCP_TID_MAP_CMDID, 215 WMI_PDEV_SET_QUIET_MODE_CMDID, 216 WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID, 217 WMI_PDEV_GET_TPC_CONFIG_CMDID, 218 WMI_PDEV_SET_BASE_MACADDR_CMDID, 219 WMI_PDEV_DUMP_CMDID, 220 WMI_PDEV_SET_LED_CONFIG_CMDID, 221 WMI_PDEV_GET_TEMPERATURE_CMDID, 222 WMI_PDEV_SET_LED_FLASHING_CMDID, 223 WMI_PDEV_SMART_ANT_ENABLE_CMDID, 224 WMI_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID, 225 WMI_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID, 226 WMI_PDEV_SET_CTL_TABLE_CMDID, 227 WMI_PDEV_SET_MIMOGAIN_TABLE_CMDID, 228 WMI_PDEV_FIPS_CMDID, 229 WMI_PDEV_GET_ANI_CCK_CONFIG_CMDID, 230 WMI_PDEV_GET_ANI_OFDM_CONFIG_CMDID, 231 WMI_PDEV_GET_NFCAL_POWER_CMDID, 232 WMI_PDEV_GET_TPC_CMDID, 233 WMI_MIB_STATS_ENABLE_CMDID, 234 WMI_PDEV_SET_PCL_CMDID, 235 WMI_PDEV_SET_HW_MODE_CMDID, 236 WMI_PDEV_SET_MAC_CONFIG_CMDID, 237 WMI_PDEV_SET_ANTENNA_MODE_CMDID, 238 WMI_SET_PERIODIC_CHANNEL_STATS_CONFIG_CMDID, 239 WMI_PDEV_WAL_POWER_DEBUG_CMDID, 240 WMI_PDEV_SET_REORDER_TIMEOUT_VAL_CMDID, 241 WMI_PDEV_SET_WAKEUP_CONFIG_CMDID, 242 WMI_PDEV_GET_ANTDIV_STATUS_CMDID, 243 WMI_PDEV_GET_CHIP_POWER_STATS_CMDID, 244 WMI_PDEV_SET_STATS_THRESHOLD_CMDID, 245 WMI_PDEV_MULTIPLE_VDEV_RESTART_REQUEST_CMDID, 246 WMI_PDEV_UPDATE_PKT_ROUTING_CMDID, 247 WMI_PDEV_CHECK_CAL_VERSION_CMDID, 248 WMI_PDEV_SET_DIVERSITY_GAIN_CMDID, 249 WMI_PDEV_DIV_GET_RSSI_ANTID_CMDID, 250 WMI_PDEV_BSS_CHAN_INFO_REQUEST_CMDID, 251 WMI_PDEV_UPDATE_PMK_CACHE_CMDID, 252 WMI_PDEV_UPDATE_FILS_HLP_PKT_CMDID, 253 WMI_PDEV_UPDATE_CTLTABLE_REQUEST_CMDID, 254 WMI_PDEV_CONFIG_VENDOR_OUI_ACTION_CMDID, 255 WMI_PDEV_SET_AC_TX_QUEUE_OPTIMIZED_CMDID, 256 WMI_PDEV_SET_RX_FILTER_PROMISCUOUS_CMDID, 257 WMI_PDEV_DMA_RING_CFG_REQ_CMDID, 258 WMI_PDEV_HE_TB_ACTION_FRM_CMDID, 259 WMI_PDEV_PKTLOG_FILTER_CMDID, 260 WMI_VDEV_CREATE_CMDID = WMI_TLV_CMD(WMI_GRP_VDEV), 261 WMI_VDEV_DELETE_CMDID, 262 WMI_VDEV_START_REQUEST_CMDID, 263 WMI_VDEV_RESTART_REQUEST_CMDID, 264 WMI_VDEV_UP_CMDID, 265 WMI_VDEV_STOP_CMDID, 266 WMI_VDEV_DOWN_CMDID, 267 WMI_VDEV_SET_PARAM_CMDID, 268 WMI_VDEV_INSTALL_KEY_CMDID, 269 WMI_VDEV_WNM_SLEEPMODE_CMDID, 270 WMI_VDEV_WMM_ADDTS_CMDID, 271 WMI_VDEV_WMM_DELTS_CMDID, 272 WMI_VDEV_SET_WMM_PARAMS_CMDID, 273 WMI_VDEV_SET_GTX_PARAMS_CMDID, 274 WMI_VDEV_IPSEC_NATKEEPALIVE_FILTER_CMDID, 275 WMI_VDEV_PLMREQ_START_CMDID, 276 WMI_VDEV_PLMREQ_STOP_CMDID, 277 WMI_VDEV_TSF_TSTAMP_ACTION_CMDID, 278 WMI_VDEV_SET_IE_CMDID, 279 WMI_VDEV_RATEMASK_CMDID, 280 WMI_VDEV_ATF_REQUEST_CMDID, 281 WMI_VDEV_SET_DSCP_TID_MAP_CMDID, 282 WMI_VDEV_FILTER_NEIGHBOR_RX_PACKETS_CMDID, 283 WMI_VDEV_SET_QUIET_MODE_CMDID, 284 WMI_VDEV_SET_CUSTOM_AGGR_SIZE_CMDID, 285 WMI_VDEV_ENCRYPT_DECRYPT_DATA_REQ_CMDID, 286 WMI_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_CMDID, 287 WMI_PEER_CREATE_CMDID = WMI_TLV_CMD(WMI_GRP_PEER), 288 WMI_PEER_DELETE_CMDID, 289 WMI_PEER_FLUSH_TIDS_CMDID, 290 WMI_PEER_SET_PARAM_CMDID, 291 WMI_PEER_ASSOC_CMDID, 292 WMI_PEER_ADD_WDS_ENTRY_CMDID, 293 WMI_PEER_REMOVE_WDS_ENTRY_CMDID, 294 WMI_PEER_MCAST_GROUP_CMDID, 295 WMI_PEER_INFO_REQ_CMDID, 296 WMI_PEER_GET_ESTIMATED_LINKSPEED_CMDID, 297 WMI_PEER_SET_RATE_REPORT_CONDITION_CMDID, 298 WMI_PEER_UPDATE_WDS_ENTRY_CMDID, 299 WMI_PEER_ADD_PROXY_STA_ENTRY_CMDID, 300 WMI_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID, 301 WMI_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID, 302 WMI_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID, 303 WMI_PEER_ATF_REQUEST_CMDID, 304 WMI_PEER_BWF_REQUEST_CMDID, 305 WMI_PEER_REORDER_QUEUE_SETUP_CMDID, 306 WMI_PEER_REORDER_QUEUE_REMOVE_CMDID, 307 WMI_PEER_SET_RX_BLOCKSIZE_CMDID, 308 WMI_PEER_ANTDIV_INFO_REQ_CMDID, 309 WMI_BCN_TX_CMDID = WMI_TLV_CMD(WMI_GRP_MGMT), 310 WMI_PDEV_SEND_BCN_CMDID, 311 WMI_BCN_TMPL_CMDID, 312 WMI_BCN_FILTER_RX_CMDID, 313 WMI_PRB_REQ_FILTER_RX_CMDID, 314 WMI_MGMT_TX_CMDID, 315 WMI_PRB_TMPL_CMDID, 316 WMI_MGMT_TX_SEND_CMDID, 317 WMI_OFFCHAN_DATA_TX_SEND_CMDID, 318 WMI_PDEV_SEND_FD_CMDID, 319 WMI_BCN_OFFLOAD_CTRL_CMDID, 320 WMI_BSS_COLOR_CHANGE_ENABLE_CMDID, 321 WMI_VDEV_BCN_OFFLOAD_QUIET_CONFIG_CMDID, 322 WMI_FILS_DISCOVERY_TMPL_CMDID, 323 WMI_ADDBA_CLEAR_RESP_CMDID = WMI_TLV_CMD(WMI_GRP_BA_NEG), 324 WMI_ADDBA_SEND_CMDID, 325 WMI_ADDBA_STATUS_CMDID, 326 WMI_DELBA_SEND_CMDID, 327 WMI_ADDBA_SET_RESP_CMDID, 328 WMI_SEND_SINGLEAMSDU_CMDID, 329 WMI_STA_POWERSAVE_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_STA_PS), 330 WMI_STA_POWERSAVE_PARAM_CMDID, 331 WMI_STA_MIMO_PS_MODE_CMDID, 332 WMI_PDEV_DFS_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_DFS), 333 WMI_PDEV_DFS_DISABLE_CMDID, 334 WMI_DFS_PHYERR_FILTER_ENA_CMDID, 335 WMI_DFS_PHYERR_FILTER_DIS_CMDID, 336 WMI_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMDID, 337 WMI_PDEV_DFS_PHYERR_OFFLOAD_DISABLE_CMDID, 338 WMI_VDEV_ADFS_CH_CFG_CMDID, 339 WMI_VDEV_ADFS_OCAC_ABORT_CMDID, 340 WMI_ROAM_SCAN_MODE = WMI_TLV_CMD(WMI_GRP_ROAM), 341 WMI_ROAM_SCAN_RSSI_THRESHOLD, 342 WMI_ROAM_SCAN_PERIOD, 343 WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, 344 WMI_ROAM_AP_PROFILE, 345 WMI_ROAM_CHAN_LIST, 346 WMI_ROAM_SCAN_CMD, 347 WMI_ROAM_SYNCH_COMPLETE, 348 WMI_ROAM_SET_RIC_REQUEST_CMDID, 349 WMI_ROAM_INVOKE_CMDID, 350 WMI_ROAM_FILTER_CMDID, 351 WMI_ROAM_SUBNET_CHANGE_CONFIG_CMDID, 352 WMI_ROAM_CONFIGURE_MAWC_CMDID, 353 WMI_ROAM_SET_MBO_PARAM_CMDID, 354 WMI_ROAM_PER_CONFIG_CMDID, 355 WMI_ROAM_BTM_CONFIG_CMDID, 356 WMI_ENABLE_FILS_CMDID, 357 WMI_OFL_SCAN_ADD_AP_PROFILE = WMI_TLV_CMD(WMI_GRP_OFL_SCAN), 358 WMI_OFL_SCAN_REMOVE_AP_PROFILE, 359 WMI_OFL_SCAN_PERIOD, 360 WMI_P2P_DEV_SET_DEVICE_INFO = WMI_TLV_CMD(WMI_GRP_P2P), 361 WMI_P2P_DEV_SET_DISCOVERABILITY, 362 WMI_P2P_GO_SET_BEACON_IE, 363 WMI_P2P_GO_SET_PROBE_RESP_IE, 364 WMI_P2P_SET_VENDOR_IE_DATA_CMDID, 365 WMI_P2P_DISC_OFFLOAD_CONFIG_CMDID, 366 WMI_P2P_DISC_OFFLOAD_APPIE_CMDID, 367 WMI_P2P_DISC_OFFLOAD_PATTERN_CMDID, 368 WMI_P2P_SET_OPPPS_PARAM_CMDID, 369 WMI_P2P_LISTEN_OFFLOAD_START_CMDID, 370 WMI_P2P_LISTEN_OFFLOAD_STOP_CMDID, 371 WMI_AP_PS_PEER_PARAM_CMDID = WMI_TLV_CMD(WMI_GRP_AP_PS), 372 WMI_AP_PS_PEER_UAPSD_COEX_CMDID, 373 WMI_AP_PS_EGAP_PARAM_CMDID, 374 WMI_PEER_RATE_RETRY_SCHED_CMDID = WMI_TLV_CMD(WMI_GRP_RATE_CTRL), 375 WMI_WLAN_PROFILE_TRIGGER_CMDID = WMI_TLV_CMD(WMI_GRP_PROFILE), 376 WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID, 377 WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID, 378 WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID, 379 WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID, 380 WMI_PDEV_SUSPEND_CMDID = WMI_TLV_CMD(WMI_GRP_SUSPEND), 381 WMI_PDEV_RESUME_CMDID, 382 WMI_ADD_BCN_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_BCN_FILTER), 383 WMI_RMV_BCN_FILTER_CMDID, 384 WMI_WOW_ADD_WAKE_PATTERN_CMDID = WMI_TLV_CMD(WMI_GRP_WOW), 385 WMI_WOW_DEL_WAKE_PATTERN_CMDID, 386 WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID, 387 WMI_WOW_ENABLE_CMDID, 388 WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID, 389 WMI_WOW_IOAC_ADD_KEEPALIVE_CMDID, 390 WMI_WOW_IOAC_DEL_KEEPALIVE_CMDID, 391 WMI_WOW_IOAC_ADD_WAKE_PATTERN_CMDID, 392 WMI_WOW_IOAC_DEL_WAKE_PATTERN_CMDID, 393 WMI_D0_WOW_ENABLE_DISABLE_CMDID, 394 WMI_EXTWOW_ENABLE_CMDID, 395 WMI_EXTWOW_SET_APP_TYPE1_PARAMS_CMDID, 396 WMI_EXTWOW_SET_APP_TYPE2_PARAMS_CMDID, 397 WMI_WOW_ENABLE_ICMPV6_NA_FLT_CMDID, 398 WMI_WOW_UDP_SVC_OFLD_CMDID, 399 WMI_WOW_HOSTWAKEUP_GPIO_PIN_PATTERN_CONFIG_CMDID, 400 WMI_WOW_SET_ACTION_WAKE_UP_CMDID, 401 WMI_RTT_MEASREQ_CMDID = WMI_TLV_CMD(WMI_GRP_RTT), 402 WMI_RTT_TSF_CMDID, 403 WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID = WMI_TLV_CMD(WMI_GRP_SPECTRAL), 404 WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID, 405 WMI_REQUEST_STATS_CMDID = WMI_TLV_CMD(WMI_GRP_STATS), 406 WMI_MCC_SCHED_TRAFFIC_STATS_CMDID, 407 WMI_REQUEST_STATS_EXT_CMDID, 408 WMI_REQUEST_LINK_STATS_CMDID, 409 WMI_START_LINK_STATS_CMDID, 410 WMI_CLEAR_LINK_STATS_CMDID, 411 WMI_GET_FW_MEM_DUMP_CMDID, 412 WMI_DEBUG_MESG_FLUSH_CMDID, 413 WMI_DIAG_EVENT_LOG_CONFIG_CMDID, 414 WMI_REQUEST_WLAN_STATS_CMDID, 415 WMI_REQUEST_RCPI_CMDID, 416 WMI_REQUEST_PEER_STATS_INFO_CMDID, 417 WMI_REQUEST_RADIO_CHAN_STATS_CMDID, 418 WMI_SET_ARP_NS_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_ARP_NS_OFL), 419 WMI_ADD_PROACTIVE_ARP_RSP_PATTERN_CMDID, 420 WMI_DEL_PROACTIVE_ARP_RSP_PATTERN_CMDID, 421 WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_NLO_OFL), 422 WMI_APFIND_CMDID, 423 WMI_PASSPOINT_LIST_CONFIG_CMDID, 424 WMI_NLO_CONFIGURE_MAWC_CMDID, 425 WMI_GTK_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_GTK_OFL), 426 WMI_CSA_OFFLOAD_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_CSA_OFL), 427 WMI_CSA_OFFLOAD_CHANSWITCH_CMDID, 428 WMI_CHATTER_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_CHATTER), 429 WMI_CHATTER_ADD_COALESCING_FILTER_CMDID, 430 WMI_CHATTER_DELETE_COALESCING_FILTER_CMDID, 431 WMI_CHATTER_COALESCING_QUERY_CMDID, 432 WMI_PEER_TID_ADDBA_CMDID = WMI_TLV_CMD(WMI_GRP_TID_ADDBA), 433 WMI_PEER_TID_DELBA_CMDID, 434 WMI_STA_DTIM_PS_METHOD_CMDID, 435 WMI_STA_UAPSD_AUTO_TRIG_CMDID, 436 WMI_STA_KEEPALIVE_CMDID, 437 WMI_BA_REQ_SSN_CMDID, 438 WMI_ECHO_CMDID = WMI_TLV_CMD(WMI_GRP_MISC), 439 WMI_PDEV_UTF_CMDID, 440 WMI_DBGLOG_CFG_CMDID, 441 WMI_PDEV_QVIT_CMDID, 442 WMI_PDEV_FTM_INTG_CMDID, 443 WMI_VDEV_SET_KEEPALIVE_CMDID, 444 WMI_VDEV_GET_KEEPALIVE_CMDID, 445 WMI_FORCE_FW_HANG_CMDID, 446 WMI_SET_MCASTBCAST_FILTER_CMDID, 447 WMI_THERMAL_MGMT_CMDID, 448 WMI_HOST_AUTO_SHUTDOWN_CFG_CMDID, 449 WMI_TPC_CHAINMASK_CONFIG_CMDID, 450 WMI_SET_ANTENNA_DIVERSITY_CMDID, 451 WMI_OCB_SET_SCHED_CMDID, 452 WMI_RSSI_BREACH_MONITOR_CONFIG_CMDID, 453 WMI_LRO_CONFIG_CMDID, 454 WMI_TRANSFER_DATA_TO_FLASH_CMDID, 455 WMI_CONFIG_ENHANCED_MCAST_FILTER_CMDID, 456 WMI_VDEV_WISA_CMDID, 457 WMI_DBGLOG_TIME_STAMP_SYNC_CMDID, 458 WMI_SET_MULTIPLE_MCAST_FILTER_CMDID, 459 WMI_READ_DATA_FROM_FLASH_CMDID, 460 WMI_THERM_THROT_SET_CONF_CMDID, 461 WMI_RUNTIME_DPD_RECAL_CMDID, 462 WMI_GET_TPC_POWER_CMDID, 463 WMI_IDLE_TRIGGER_MONITOR_CMDID, 464 WMI_GPIO_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_GPIO), 465 WMI_GPIO_OUTPUT_CMDID, 466 WMI_TXBF_CMDID, 467 WMI_FWTEST_VDEV_MCC_SET_TBTT_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_FWTEST), 468 WMI_FWTEST_P2P_SET_NOA_PARAM_CMDID, 469 WMI_UNIT_TEST_CMDID, 470 WMI_FWTEST_CMDID, 471 WMI_QBOOST_CFG_CMDID, 472 WMI_TDLS_SET_STATE_CMDID = WMI_TLV_CMD(WMI_GRP_TDLS), 473 WMI_TDLS_PEER_UPDATE_CMDID, 474 WMI_TDLS_SET_OFFCHAN_MODE_CMDID, 475 WMI_RESMGR_ADAPTIVE_OCS_EN_DIS_CMDID = WMI_TLV_CMD(WMI_GRP_RESMGR), 476 WMI_RESMGR_SET_CHAN_TIME_QUOTA_CMDID, 477 WMI_RESMGR_SET_CHAN_LATENCY_CMDID, 478 WMI_STA_SMPS_FORCE_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_STA_SMPS), 479 WMI_STA_SMPS_PARAM_CMDID, 480 WMI_HB_SET_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_WLAN_HB), 481 WMI_HB_SET_TCP_PARAMS_CMDID, 482 WMI_HB_SET_TCP_PKT_FILTER_CMDID, 483 WMI_HB_SET_UDP_PARAMS_CMDID, 484 WMI_HB_SET_UDP_PKT_FILTER_CMDID, 485 WMI_RMC_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_RMC), 486 WMI_RMC_SET_ACTION_PERIOD_CMDID, 487 WMI_RMC_CONFIG_CMDID, 488 WMI_RMC_SET_MANUAL_LEADER_CMDID, 489 WMI_MHF_OFFLOAD_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_MHF_OFL), 490 WMI_MHF_OFFLOAD_PLUMB_ROUTING_TBL_CMDID, 491 WMI_BATCH_SCAN_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_LOCATION_SCAN), 492 WMI_BATCH_SCAN_DISABLE_CMDID, 493 WMI_BATCH_SCAN_TRIGGER_RESULT_CMDID, 494 WMI_OEM_REQ_CMDID = WMI_TLV_CMD(WMI_GRP_OEM), 495 WMI_OEM_REQUEST_CMDID, 496 WMI_LPI_OEM_REQ_CMDID, 497 WMI_NAN_CMDID = WMI_TLV_CMD(WMI_GRP_NAN), 498 WMI_MODEM_POWER_STATE_CMDID = WMI_TLV_CMD(WMI_GRP_COEX), 499 WMI_CHAN_AVOID_UPDATE_CMDID, 500 WMI_COEX_CONFIG_CMDID, 501 WMI_CHAN_AVOID_RPT_ALLOW_CMDID, 502 WMI_COEX_GET_ANTENNA_ISOLATION_CMDID, 503 WMI_SAR_LIMITS_CMDID, 504 WMI_OBSS_SCAN_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_OBSS_OFL), 505 WMI_OBSS_SCAN_DISABLE_CMDID, 506 WMI_OBSS_COLOR_COLLISION_DET_CONFIG_CMDID, 507 WMI_LPI_MGMT_SNOOPING_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_LPI), 508 WMI_LPI_START_SCAN_CMDID, 509 WMI_LPI_STOP_SCAN_CMDID, 510 WMI_EXTSCAN_START_CMDID = WMI_TLV_CMD(WMI_GRP_EXTSCAN), 511 WMI_EXTSCAN_STOP_CMDID, 512 WMI_EXTSCAN_CONFIGURE_WLAN_CHANGE_MONITOR_CMDID, 513 WMI_EXTSCAN_CONFIGURE_HOTLIST_MONITOR_CMDID, 514 WMI_EXTSCAN_GET_CACHED_RESULTS_CMDID, 515 WMI_EXTSCAN_GET_WLAN_CHANGE_RESULTS_CMDID, 516 WMI_EXTSCAN_SET_CAPABILITIES_CMDID, 517 WMI_EXTSCAN_GET_CAPABILITIES_CMDID, 518 WMI_EXTSCAN_CONFIGURE_HOTLIST_SSID_MONITOR_CMDID, 519 WMI_EXTSCAN_CONFIGURE_MAWC_CMDID, 520 WMI_SET_DHCP_SERVER_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_DHCP_OFL), 521 WMI_IPA_OFFLOAD_ENABLE_DISABLE_CMDID = WMI_TLV_CMD(WMI_GRP_IPA), 522 WMI_MDNS_OFFLOAD_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_MDNS_OFL), 523 WMI_MDNS_SET_FQDN_CMDID, 524 WMI_MDNS_SET_RESPONSE_CMDID, 525 WMI_MDNS_GET_STATS_CMDID, 526 WMI_SAP_OFL_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_SAP_OFL), 527 WMI_SAP_SET_BLACKLIST_PARAM_CMDID, 528 WMI_OCB_SET_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_OCB), 529 WMI_OCB_SET_UTC_TIME_CMDID, 530 WMI_OCB_START_TIMING_ADVERT_CMDID, 531 WMI_OCB_STOP_TIMING_ADVERT_CMDID, 532 WMI_OCB_GET_TSF_TIMER_CMDID, 533 WMI_DCC_GET_STATS_CMDID, 534 WMI_DCC_CLEAR_STATS_CMDID, 535 WMI_DCC_UPDATE_NDL_CMDID, 536 WMI_SOC_SET_PCL_CMDID = WMI_TLV_CMD(WMI_GRP_SOC), 537 WMI_SOC_SET_HW_MODE_CMDID, 538 WMI_SOC_SET_DUAL_MAC_CONFIG_CMDID, 539 WMI_SOC_SET_ANTENNA_MODE_CMDID, 540 WMI_PACKET_FILTER_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_PKT_FILTER), 541 WMI_PACKET_FILTER_ENABLE_CMDID, 542 WMI_MAWC_SENSOR_REPORT_IND_CMDID = WMI_TLV_CMD(WMI_GRP_MAWC), 543 WMI_PMF_OFFLOAD_SET_SA_QUERY_CMDID = WMI_TLV_CMD(WMI_GRP_PMF_OFFLOAD), 544 WMI_BPF_GET_CAPABILITY_CMDID = WMI_TLV_CMD(WMI_GRP_BPF_OFFLOAD), 545 WMI_BPF_GET_VDEV_STATS_CMDID, 546 WMI_BPF_SET_VDEV_INSTRUCTIONS_CMDID, 547 WMI_BPF_DEL_VDEV_INSTRUCTIONS_CMDID, 548 WMI_BPF_SET_VDEV_ACTIVE_MODE_CMDID, 549 WMI_MNT_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_MONITOR), 550 WMI_SET_CURRENT_COUNTRY_CMDID = WMI_TLV_CMD(WMI_GRP_REGULATORY), 551 WMI_11D_SCAN_START_CMDID, 552 WMI_11D_SCAN_STOP_CMDID, 553 WMI_SET_INIT_COUNTRY_CMDID, 554 WMI_NDI_GET_CAP_REQ_CMDID = WMI_TLV_CMD(WMI_GRP_PROTOTYPE), 555 WMI_NDP_INITIATOR_REQ_CMDID, 556 WMI_NDP_RESPONDER_REQ_CMDID, 557 WMI_NDP_END_REQ_CMDID, 558 WMI_HW_DATA_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_HW_DATA_FILTER), 559 WMI_TWT_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_TWT), 560 WMI_TWT_DISABLE_CMDID, 561 WMI_TWT_ADD_DIALOG_CMDID, 562 WMI_TWT_DEL_DIALOG_CMDID, 563 WMI_TWT_PAUSE_DIALOG_CMDID, 564 WMI_TWT_RESUME_DIALOG_CMDID, 565 WMI_PDEV_OBSS_PD_SPATIAL_REUSE_CMDID = 566 WMI_TLV_CMD(WMI_GRP_SPATIAL_REUSE), 567 WMI_PDEV_OBSS_PD_SPATIAL_REUSE_SET_DEF_OBSS_THRESH_CMDID, 568 }; 569 570 enum wmi_tlv_event_id { 571 WMI_SERVICE_READY_EVENTID = 0x1, 572 WMI_READY_EVENTID, 573 WMI_SERVICE_AVAILABLE_EVENTID, 574 WMI_SCAN_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_SCAN), 575 WMI_PDEV_TPC_CONFIG_EVENTID = WMI_TLV_CMD(WMI_GRP_PDEV), 576 WMI_CHAN_INFO_EVENTID, 577 WMI_PHYERR_EVENTID, 578 WMI_PDEV_DUMP_EVENTID, 579 WMI_TX_PAUSE_EVENTID, 580 WMI_DFS_RADAR_EVENTID, 581 WMI_PDEV_L1SS_TRACK_EVENTID, 582 WMI_PDEV_TEMPERATURE_EVENTID, 583 WMI_SERVICE_READY_EXT_EVENTID, 584 WMI_PDEV_FIPS_EVENTID, 585 WMI_PDEV_CHANNEL_HOPPING_EVENTID, 586 WMI_PDEV_ANI_CCK_LEVEL_EVENTID, 587 WMI_PDEV_ANI_OFDM_LEVEL_EVENTID, 588 WMI_PDEV_TPC_EVENTID, 589 WMI_PDEV_NFCAL_POWER_ALL_CHANNELS_EVENTID, 590 WMI_PDEV_SET_HW_MODE_RESP_EVENTID, 591 WMI_PDEV_HW_MODE_TRANSITION_EVENTID, 592 WMI_PDEV_SET_MAC_CONFIG_RESP_EVENTID, 593 WMI_PDEV_ANTDIV_STATUS_EVENTID, 594 WMI_PDEV_CHIP_POWER_STATS_EVENTID, 595 WMI_PDEV_CHIP_POWER_SAVE_FAILURE_DETECTED_EVENTID, 596 WMI_PDEV_CSA_SWITCH_COUNT_STATUS_EVENTID, 597 WMI_PDEV_CHECK_CAL_VERSION_EVENTID, 598 WMI_PDEV_DIV_RSSI_ANTID_EVENTID, 599 WMI_PDEV_BSS_CHAN_INFO_EVENTID, 600 WMI_PDEV_UPDATE_CTLTABLE_EVENTID, 601 WMI_PDEV_DMA_RING_CFG_RSP_EVENTID, 602 WMI_PDEV_DMA_RING_BUF_RELEASE_EVENTID, 603 WMI_PDEV_CTL_FAILSAFE_CHECK_EVENTID, 604 WMI_PDEV_CSC_SWITCH_COUNT_STATUS_EVENTID, 605 WMI_PDEV_COLD_BOOT_CAL_DATA_EVENTID, 606 WMI_PDEV_RAP_INFO_EVENTID, 607 WMI_CHAN_RF_CHARACTERIZATION_INFO_EVENTID, 608 WMI_SERVICE_READY_EXT2_EVENTID, 609 WMI_VDEV_START_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_VDEV), 610 WMI_VDEV_STOPPED_EVENTID, 611 WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID, 612 WMI_VDEV_MCC_BCN_INTERVAL_CHANGE_REQ_EVENTID, 613 WMI_VDEV_TSF_REPORT_EVENTID, 614 WMI_VDEV_DELETE_RESP_EVENTID, 615 WMI_VDEV_ENCRYPT_DECRYPT_DATA_RESP_EVENTID, 616 WMI_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_STATUS_EVENTID, 617 WMI_PEER_STA_KICKOUT_EVENTID = WMI_TLV_CMD(WMI_GRP_PEER), 618 WMI_PEER_INFO_EVENTID, 619 WMI_PEER_TX_FAIL_CNT_THR_EVENTID, 620 WMI_PEER_ESTIMATED_LINKSPEED_EVENTID, 621 WMI_PEER_STATE_EVENTID, 622 WMI_PEER_ASSOC_CONF_EVENTID, 623 WMI_PEER_DELETE_RESP_EVENTID, 624 WMI_PEER_RATECODE_LIST_EVENTID, 625 WMI_WDS_PEER_EVENTID, 626 WMI_PEER_STA_PS_STATECHG_EVENTID, 627 WMI_PEER_ANTDIV_INFO_EVENTID, 628 WMI_PEER_RESERVED0_EVENTID, 629 WMI_PEER_RESERVED1_EVENTID, 630 WMI_PEER_RESERVED2_EVENTID, 631 WMI_PEER_RESERVED3_EVENTID, 632 WMI_PEER_RESERVED4_EVENTID, 633 WMI_PEER_RESERVED5_EVENTID, 634 WMI_PEER_RESERVED6_EVENTID, 635 WMI_PEER_RESERVED7_EVENTID, 636 WMI_PEER_RESERVED8_EVENTID, 637 WMI_PEER_RESERVED9_EVENTID, 638 WMI_PEER_RESERVED10_EVENTID, 639 WMI_PEER_OPER_MODE_CHANGE_EVENTID, 640 WMI_MGMT_RX_EVENTID = WMI_TLV_CMD(WMI_GRP_MGMT), 641 WMI_HOST_SWBA_EVENTID, 642 WMI_TBTTOFFSET_UPDATE_EVENTID, 643 WMI_OFFLOAD_BCN_TX_STATUS_EVENTID, 644 WMI_OFFLOAD_PROB_RESP_TX_STATUS_EVENTID, 645 WMI_MGMT_TX_COMPLETION_EVENTID, 646 WMI_MGMT_TX_BUNDLE_COMPLETION_EVENTID, 647 WMI_TBTTOFFSET_EXT_UPDATE_EVENTID, 648 WMI_OFFCHAN_DATA_TX_COMPLETION_EVENTID, 649 WMI_HOST_FILS_DISCOVERY_EVENTID, 650 WMI_TX_DELBA_COMPLETE_EVENTID = WMI_TLV_CMD(WMI_GRP_BA_NEG), 651 WMI_TX_ADDBA_COMPLETE_EVENTID, 652 WMI_BA_RSP_SSN_EVENTID, 653 WMI_AGGR_STATE_TRIG_EVENTID, 654 WMI_ROAM_EVENTID = WMI_TLV_CMD(WMI_GRP_ROAM), 655 WMI_PROFILE_MATCH, 656 WMI_ROAM_SYNCH_EVENTID, 657 WMI_P2P_DISC_EVENTID = WMI_TLV_CMD(WMI_GRP_P2P), 658 WMI_P2P_NOA_EVENTID, 659 WMI_P2P_LISTEN_OFFLOAD_STOPPED_EVENTID, 660 WMI_AP_PS_EGAP_INFO_EVENTID = WMI_TLV_CMD(WMI_GRP_AP_PS), 661 WMI_PDEV_RESUME_EVENTID = WMI_TLV_CMD(WMI_GRP_SUSPEND), 662 WMI_WOW_WAKEUP_HOST_EVENTID = WMI_TLV_CMD(WMI_GRP_WOW), 663 WMI_D0_WOW_DISABLE_ACK_EVENTID, 664 WMI_WOW_INITIAL_WAKEUP_EVENTID, 665 WMI_RTT_MEASUREMENT_REPORT_EVENTID = WMI_TLV_CMD(WMI_GRP_RTT), 666 WMI_TSF_MEASUREMENT_REPORT_EVENTID, 667 WMI_RTT_ERROR_REPORT_EVENTID, 668 WMI_STATS_EXT_EVENTID = WMI_TLV_CMD(WMI_GRP_STATS), 669 WMI_IFACE_LINK_STATS_EVENTID, 670 WMI_PEER_LINK_STATS_EVENTID, 671 WMI_RADIO_LINK_STATS_EVENTID, 672 WMI_UPDATE_FW_MEM_DUMP_EVENTID, 673 WMI_DIAG_EVENT_LOG_SUPPORTED_EVENTID, 674 WMI_INST_RSSI_STATS_EVENTID, 675 WMI_RADIO_TX_POWER_LEVEL_STATS_EVENTID, 676 WMI_REPORT_STATS_EVENTID, 677 WMI_UPDATE_RCPI_EVENTID, 678 WMI_PEER_STATS_INFO_EVENTID, 679 WMI_RADIO_CHAN_STATS_EVENTID, 680 WMI_NLO_MATCH_EVENTID = WMI_TLV_CMD(WMI_GRP_NLO_OFL), 681 WMI_NLO_SCAN_COMPLETE_EVENTID, 682 WMI_APFIND_EVENTID, 683 WMI_PASSPOINT_MATCH_EVENTID, 684 WMI_GTK_OFFLOAD_STATUS_EVENTID = WMI_TLV_CMD(WMI_GRP_GTK_OFL), 685 WMI_GTK_REKEY_FAIL_EVENTID, 686 WMI_CSA_HANDLING_EVENTID = WMI_TLV_CMD(WMI_GRP_CSA_OFL), 687 WMI_CHATTER_PC_QUERY_EVENTID = WMI_TLV_CMD(WMI_GRP_CHATTER), 688 WMI_PDEV_DFS_RADAR_DETECTION_EVENTID = WMI_TLV_CMD(WMI_GRP_DFS), 689 WMI_VDEV_DFS_CAC_COMPLETE_EVENTID, 690 WMI_VDEV_ADFS_OCAC_COMPLETE_EVENTID, 691 WMI_ECHO_EVENTID = WMI_TLV_CMD(WMI_GRP_MISC), 692 WMI_PDEV_UTF_EVENTID, 693 WMI_DEBUG_MESG_EVENTID, 694 WMI_UPDATE_STATS_EVENTID, 695 WMI_DEBUG_PRINT_EVENTID, 696 WMI_DCS_INTERFERENCE_EVENTID, 697 WMI_PDEV_QVIT_EVENTID, 698 WMI_WLAN_PROFILE_DATA_EVENTID, 699 WMI_PDEV_FTM_INTG_EVENTID, 700 WMI_WLAN_FREQ_AVOID_EVENTID, 701 WMI_VDEV_GET_KEEPALIVE_EVENTID, 702 WMI_THERMAL_MGMT_EVENTID, 703 WMI_DIAG_DATA_CONTAINER_EVENTID, 704 WMI_HOST_AUTO_SHUTDOWN_EVENTID, 705 WMI_UPDATE_WHAL_MIB_STATS_EVENTID, 706 WMI_UPDATE_VDEV_RATE_STATS_EVENTID, 707 WMI_DIAG_EVENTID, 708 WMI_OCB_SET_SCHED_EVENTID, 709 WMI_DEBUG_MESG_FLUSH_COMPLETE_EVENTID, 710 WMI_RSSI_BREACH_EVENTID, 711 WMI_TRANSFER_DATA_TO_FLASH_COMPLETE_EVENTID, 712 WMI_PDEV_UTF_SCPC_EVENTID, 713 WMI_READ_DATA_FROM_FLASH_EVENTID, 714 WMI_REPORT_RX_AGGR_FAILURE_EVENTID, 715 WMI_PKGID_EVENTID, 716 WMI_GPIO_INPUT_EVENTID = WMI_TLV_CMD(WMI_GRP_GPIO), 717 WMI_UPLOADH_EVENTID, 718 WMI_CAPTUREH_EVENTID, 719 WMI_RFKILL_STATE_CHANGE_EVENTID, 720 WMI_TDLS_PEER_EVENTID = WMI_TLV_CMD(WMI_GRP_TDLS), 721 WMI_STA_SMPS_FORCE_MODE_COMPL_EVENTID = WMI_TLV_CMD(WMI_GRP_STA_SMPS), 722 WMI_BATCH_SCAN_ENABLED_EVENTID = WMI_TLV_CMD(WMI_GRP_LOCATION_SCAN), 723 WMI_BATCH_SCAN_RESULT_EVENTID, 724 WMI_OEM_CAPABILITY_EVENTID = WMI_TLV_CMD(WMI_GRP_OEM), 725 WMI_OEM_MEASUREMENT_REPORT_EVENTID, 726 WMI_OEM_ERROR_REPORT_EVENTID, 727 WMI_OEM_RESPONSE_EVENTID, 728 WMI_NAN_EVENTID = WMI_TLV_CMD(WMI_GRP_NAN), 729 WMI_NAN_DISC_IFACE_CREATED_EVENTID, 730 WMI_NAN_DISC_IFACE_DELETED_EVENTID, 731 WMI_NAN_STARTED_CLUSTER_EVENTID, 732 WMI_NAN_JOINED_CLUSTER_EVENTID, 733 WMI_COEX_REPORT_ANTENNA_ISOLATION_EVENTID = WMI_TLV_CMD(WMI_GRP_COEX), 734 WMI_LPI_RESULT_EVENTID = WMI_TLV_CMD(WMI_GRP_LPI), 735 WMI_LPI_STATUS_EVENTID, 736 WMI_LPI_HANDOFF_EVENTID, 737 WMI_EXTSCAN_START_STOP_EVENTID = WMI_TLV_CMD(WMI_GRP_EXTSCAN), 738 WMI_EXTSCAN_OPERATION_EVENTID, 739 WMI_EXTSCAN_TABLE_USAGE_EVENTID, 740 WMI_EXTSCAN_CACHED_RESULTS_EVENTID, 741 WMI_EXTSCAN_WLAN_CHANGE_RESULTS_EVENTID, 742 WMI_EXTSCAN_HOTLIST_MATCH_EVENTID, 743 WMI_EXTSCAN_CAPABILITIES_EVENTID, 744 WMI_EXTSCAN_HOTLIST_SSID_MATCH_EVENTID, 745 WMI_MDNS_STATS_EVENTID = WMI_TLV_CMD(WMI_GRP_MDNS_OFL), 746 WMI_SAP_OFL_ADD_STA_EVENTID = WMI_TLV_CMD(WMI_GRP_SAP_OFL), 747 WMI_SAP_OFL_DEL_STA_EVENTID, 748 WMI_OCB_SET_CONFIG_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_OCB), 749 WMI_OCB_GET_TSF_TIMER_RESP_EVENTID, 750 WMI_DCC_GET_STATS_RESP_EVENTID, 751 WMI_DCC_UPDATE_NDL_RESP_EVENTID, 752 WMI_DCC_STATS_EVENTID, 753 WMI_SOC_SET_HW_MODE_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_SOC), 754 WMI_SOC_HW_MODE_TRANSITION_EVENTID, 755 WMI_SOC_SET_DUAL_MAC_CONFIG_RESP_EVENTID, 756 WMI_MAWC_ENABLE_SENSOR_EVENTID = WMI_TLV_CMD(WMI_GRP_MAWC), 757 WMI_BPF_CAPABILIY_INFO_EVENTID = WMI_TLV_CMD(WMI_GRP_BPF_OFFLOAD), 758 WMI_BPF_VDEV_STATS_INFO_EVENTID, 759 WMI_RMC_NEW_LEADER_EVENTID = WMI_TLV_CMD(WMI_GRP_RMC), 760 WMI_REG_CHAN_LIST_CC_EVENTID = WMI_TLV_CMD(WMI_GRP_REGULATORY), 761 WMI_11D_NEW_COUNTRY_EVENTID, 762 WMI_NDI_CAP_RSP_EVENTID = WMI_TLV_CMD(WMI_GRP_PROTOTYPE), 763 WMI_NDP_INITIATOR_RSP_EVENTID, 764 WMI_NDP_RESPONDER_RSP_EVENTID, 765 WMI_NDP_END_RSP_EVENTID, 766 WMI_NDP_INDICATION_EVENTID, 767 WMI_NDP_CONFIRM_EVENTID, 768 WMI_NDP_END_INDICATION_EVENTID, 769 770 WMI_TWT_ENABLE_EVENTID = WMI_TLV_CMD(WMI_GRP_TWT), 771 WMI_TWT_DISABLE_EVENTID, 772 WMI_TWT_ADD_DIALOG_EVENTID, 773 WMI_TWT_DEL_DIALOG_EVENTID, 774 WMI_TWT_PAUSE_DIALOG_EVENTID, 775 WMI_TWT_RESUME_DIALOG_EVENTID, 776 }; 777 778 enum wmi_tlv_pdev_param { 779 WMI_PDEV_PARAM_TX_CHAIN_MASK = 0x1, 780 WMI_PDEV_PARAM_RX_CHAIN_MASK, 781 WMI_PDEV_PARAM_TXPOWER_LIMIT2G, 782 WMI_PDEV_PARAM_TXPOWER_LIMIT5G, 783 WMI_PDEV_PARAM_TXPOWER_SCALE, 784 WMI_PDEV_PARAM_BEACON_GEN_MODE, 785 WMI_PDEV_PARAM_BEACON_TX_MODE, 786 WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE, 787 WMI_PDEV_PARAM_PROTECTION_MODE, 788 WMI_PDEV_PARAM_DYNAMIC_BW, 789 WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH, 790 WMI_PDEV_PARAM_AGG_SW_RETRY_TH, 791 WMI_PDEV_PARAM_STA_KICKOUT_TH, 792 WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING, 793 WMI_PDEV_PARAM_LTR_ENABLE, 794 WMI_PDEV_PARAM_LTR_AC_LATENCY_BE, 795 WMI_PDEV_PARAM_LTR_AC_LATENCY_BK, 796 WMI_PDEV_PARAM_LTR_AC_LATENCY_VI, 797 WMI_PDEV_PARAM_LTR_AC_LATENCY_VO, 798 WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT, 799 WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE, 800 WMI_PDEV_PARAM_LTR_RX_OVERRIDE, 801 WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT, 802 WMI_PDEV_PARAM_L1SS_ENABLE, 803 WMI_PDEV_PARAM_DSLEEP_ENABLE, 804 WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH, 805 WMI_PDEV_PARAM_PCIELP_TXBUF_WATERMARK, 806 WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN, 807 WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE, 808 WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD, 809 WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD, 810 WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD, 811 WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD, 812 WMI_PDEV_PARAM_PMF_QOS, 813 WMI_PDEV_PARAM_ARP_AC_OVERRIDE, 814 WMI_PDEV_PARAM_DCS, 815 WMI_PDEV_PARAM_ANI_ENABLE, 816 WMI_PDEV_PARAM_ANI_POLL_PERIOD, 817 WMI_PDEV_PARAM_ANI_LISTEN_PERIOD, 818 WMI_PDEV_PARAM_ANI_OFDM_LEVEL, 819 WMI_PDEV_PARAM_ANI_CCK_LEVEL, 820 WMI_PDEV_PARAM_DYNTXCHAIN, 821 WMI_PDEV_PARAM_PROXY_STA, 822 WMI_PDEV_PARAM_IDLE_PS_CONFIG, 823 WMI_PDEV_PARAM_POWER_GATING_SLEEP, 824 WMI_PDEV_PARAM_RFKILL_ENABLE, 825 WMI_PDEV_PARAM_BURST_DUR, 826 WMI_PDEV_PARAM_BURST_ENABLE, 827 WMI_PDEV_PARAM_HW_RFKILL_CONFIG, 828 WMI_PDEV_PARAM_LOW_POWER_RF_ENABLE, 829 WMI_PDEV_PARAM_L1SS_TRACK, 830 WMI_PDEV_PARAM_HYST_EN, 831 WMI_PDEV_PARAM_POWER_COLLAPSE_ENABLE, 832 WMI_PDEV_PARAM_LED_SYS_STATE, 833 WMI_PDEV_PARAM_LED_ENABLE, 834 WMI_PDEV_PARAM_AUDIO_OVER_WLAN_LATENCY, 835 WMI_PDEV_PARAM_AUDIO_OVER_WLAN_ENABLE, 836 WMI_PDEV_PARAM_WHAL_MIB_STATS_UPDATE_ENABLE, 837 WMI_PDEV_PARAM_VDEV_RATE_STATS_UPDATE_PERIOD, 838 WMI_PDEV_PARAM_CTS_CBW, 839 WMI_PDEV_PARAM_WNTS_CONFIG, 840 WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_ENABLE, 841 WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_MIN_SLEEP_SLOP, 842 WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_INC_DEC_STEP, 843 WMI_PDEV_PARAM_EARLY_RX_FIX_SLEEP_SLOP, 844 WMI_PDEV_PARAM_BMISS_BASED_ADAPTIVE_BTO_ENABLE, 845 WMI_PDEV_PARAM_BMISS_BTO_MIN_BCN_TIMEOUT, 846 WMI_PDEV_PARAM_BMISS_BTO_INC_DEC_STEP, 847 WMI_PDEV_PARAM_BTO_FIX_BCN_TIMEOUT, 848 WMI_PDEV_PARAM_CE_BASED_ADAPTIVE_BTO_ENABLE, 849 WMI_PDEV_PARAM_CE_BTO_COMBO_CE_VALUE, 850 WMI_PDEV_PARAM_TX_CHAIN_MASK_2G, 851 WMI_PDEV_PARAM_RX_CHAIN_MASK_2G, 852 WMI_PDEV_PARAM_TX_CHAIN_MASK_5G, 853 WMI_PDEV_PARAM_RX_CHAIN_MASK_5G, 854 WMI_PDEV_PARAM_TX_CHAIN_MASK_CCK, 855 WMI_PDEV_PARAM_TX_CHAIN_MASK_1SS, 856 WMI_PDEV_PARAM_CTS2SELF_FOR_P2P_GO_CONFIG, 857 WMI_PDEV_PARAM_TXPOWER_DECR_DB, 858 WMI_PDEV_PARAM_AGGR_BURST, 859 WMI_PDEV_PARAM_RX_DECAP_MODE, 860 WMI_PDEV_PARAM_FAST_CHANNEL_RESET, 861 WMI_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA, 862 WMI_PDEV_PARAM_ANTENNA_GAIN, 863 WMI_PDEV_PARAM_RX_FILTER, 864 WMI_PDEV_SET_MCAST_TO_UCAST_TID, 865 WMI_PDEV_PARAM_PROXY_STA_MODE, 866 WMI_PDEV_PARAM_SET_MCAST2UCAST_MODE, 867 WMI_PDEV_PARAM_SET_MCAST2UCAST_BUFFER, 868 WMI_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER, 869 WMI_PDEV_PEER_STA_PS_STATECHG_ENABLE, 870 WMI_PDEV_PARAM_IGMPMLD_AC_OVERRIDE, 871 WMI_PDEV_PARAM_BLOCK_INTERBSS, 872 WMI_PDEV_PARAM_SET_DISABLE_RESET_CMDID, 873 WMI_PDEV_PARAM_SET_MSDU_TTL_CMDID, 874 WMI_PDEV_PARAM_SET_PPDU_DURATION_CMDID, 875 WMI_PDEV_PARAM_TXBF_SOUND_PERIOD_CMDID, 876 WMI_PDEV_PARAM_SET_PROMISC_MODE_CMDID, 877 WMI_PDEV_PARAM_SET_BURST_MODE_CMDID, 878 WMI_PDEV_PARAM_EN_STATS, 879 WMI_PDEV_PARAM_MU_GROUP_POLICY, 880 WMI_PDEV_PARAM_NOISE_DETECTION, 881 WMI_PDEV_PARAM_NOISE_THRESHOLD, 882 WMI_PDEV_PARAM_DPD_ENABLE, 883 WMI_PDEV_PARAM_SET_MCAST_BCAST_ECHO, 884 WMI_PDEV_PARAM_ATF_STRICT_SCH, 885 WMI_PDEV_PARAM_ATF_SCHED_DURATION, 886 WMI_PDEV_PARAM_ANT_PLZN, 887 WMI_PDEV_PARAM_MGMT_RETRY_LIMIT, 888 WMI_PDEV_PARAM_SENSITIVITY_LEVEL, 889 WMI_PDEV_PARAM_SIGNED_TXPOWER_2G, 890 WMI_PDEV_PARAM_SIGNED_TXPOWER_5G, 891 WMI_PDEV_PARAM_ENABLE_PER_TID_AMSDU, 892 WMI_PDEV_PARAM_ENABLE_PER_TID_AMPDU, 893 WMI_PDEV_PARAM_CCA_THRESHOLD, 894 WMI_PDEV_PARAM_RTS_FIXED_RATE, 895 WMI_PDEV_PARAM_PDEV_RESET, 896 WMI_PDEV_PARAM_WAPI_MBSSID_OFFSET, 897 WMI_PDEV_PARAM_ARP_DBG_SRCADDR, 898 WMI_PDEV_PARAM_ARP_DBG_DSTADDR, 899 WMI_PDEV_PARAM_ATF_OBSS_NOISE_SCH, 900 WMI_PDEV_PARAM_ATF_OBSS_NOISE_SCALING_FACTOR, 901 WMI_PDEV_PARAM_CUST_TXPOWER_SCALE, 902 WMI_PDEV_PARAM_ATF_DYNAMIC_ENABLE, 903 WMI_PDEV_PARAM_CTRL_RETRY_LIMIT, 904 WMI_PDEV_PARAM_PROPAGATION_DELAY, 905 WMI_PDEV_PARAM_ENA_ANT_DIV, 906 WMI_PDEV_PARAM_FORCE_CHAIN_ANT, 907 WMI_PDEV_PARAM_ANT_DIV_SELFTEST, 908 WMI_PDEV_PARAM_ANT_DIV_SELFTEST_INTVL, 909 WMI_PDEV_PARAM_STATS_OBSERVATION_PERIOD, 910 WMI_PDEV_PARAM_TX_PPDU_DELAY_BIN_SIZE_MS, 911 WMI_PDEV_PARAM_TX_PPDU_DELAY_ARRAY_LEN, 912 WMI_PDEV_PARAM_TX_MPDU_AGGR_ARRAY_LEN, 913 WMI_PDEV_PARAM_RX_MPDU_AGGR_ARRAY_LEN, 914 WMI_PDEV_PARAM_TX_SCH_DELAY, 915 WMI_PDEV_PARAM_ENABLE_RTS_SIFS_BURSTING, 916 WMI_PDEV_PARAM_MAX_MPDUS_IN_AMPDU, 917 WMI_PDEV_PARAM_PEER_STATS_INFO_ENABLE, 918 WMI_PDEV_PARAM_FAST_PWR_TRANSITION, 919 WMI_PDEV_PARAM_RADIO_CHAN_STATS_ENABLE, 920 WMI_PDEV_PARAM_RADIO_DIAGNOSIS_ENABLE, 921 WMI_PDEV_PARAM_MESH_MCAST_ENABLE, 922 }; 923 924 enum wmi_tlv_vdev_param { 925 WMI_VDEV_PARAM_RTS_THRESHOLD = 0x1, 926 WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD, 927 WMI_VDEV_PARAM_BEACON_INTERVAL, 928 WMI_VDEV_PARAM_LISTEN_INTERVAL, 929 WMI_VDEV_PARAM_MULTICAST_RATE, 930 WMI_VDEV_PARAM_MGMT_TX_RATE, 931 WMI_VDEV_PARAM_SLOT_TIME, 932 WMI_VDEV_PARAM_PREAMBLE, 933 WMI_VDEV_PARAM_SWBA_TIME, 934 WMI_VDEV_STATS_UPDATE_PERIOD, 935 WMI_VDEV_PWRSAVE_AGEOUT_TIME, 936 WMI_VDEV_HOST_SWBA_INTERVAL, 937 WMI_VDEV_PARAM_DTIM_PERIOD, 938 WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT, 939 WMI_VDEV_PARAM_WDS, 940 WMI_VDEV_PARAM_ATIM_WINDOW, 941 WMI_VDEV_PARAM_BMISS_COUNT_MAX, 942 WMI_VDEV_PARAM_BMISS_FIRST_BCNT, 943 WMI_VDEV_PARAM_BMISS_FINAL_BCNT, 944 WMI_VDEV_PARAM_FEATURE_WMM, 945 WMI_VDEV_PARAM_CHWIDTH, 946 WMI_VDEV_PARAM_CHEXTOFFSET, 947 WMI_VDEV_PARAM_DISABLE_HTPROTECTION, 948 WMI_VDEV_PARAM_STA_QUICKKICKOUT, 949 WMI_VDEV_PARAM_MGMT_RATE, 950 WMI_VDEV_PARAM_PROTECTION_MODE, 951 WMI_VDEV_PARAM_FIXED_RATE, 952 WMI_VDEV_PARAM_SGI, 953 WMI_VDEV_PARAM_LDPC, 954 WMI_VDEV_PARAM_TX_STBC, 955 WMI_VDEV_PARAM_RX_STBC, 956 WMI_VDEV_PARAM_INTRA_BSS_FWD, 957 WMI_VDEV_PARAM_DEF_KEYID, 958 WMI_VDEV_PARAM_NSS, 959 WMI_VDEV_PARAM_BCAST_DATA_RATE, 960 WMI_VDEV_PARAM_MCAST_DATA_RATE, 961 WMI_VDEV_PARAM_MCAST_INDICATE, 962 WMI_VDEV_PARAM_DHCP_INDICATE, 963 WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE, 964 WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS, 965 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS, 966 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS, 967 WMI_VDEV_PARAM_AP_ENABLE_NAWDS, 968 WMI_VDEV_PARAM_ENABLE_RTSCTS, 969 WMI_VDEV_PARAM_TXBF, 970 WMI_VDEV_PARAM_PACKET_POWERSAVE, 971 WMI_VDEV_PARAM_DROP_UNENCRY, 972 WMI_VDEV_PARAM_TX_ENCAP_TYPE, 973 WMI_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS, 974 WMI_VDEV_PARAM_EARLY_RX_ADJUST_ENABLE, 975 WMI_VDEV_PARAM_EARLY_RX_TGT_BMISS_NUM, 976 WMI_VDEV_PARAM_EARLY_RX_BMISS_SAMPLE_CYCLE, 977 WMI_VDEV_PARAM_EARLY_RX_SLOP_STEP, 978 WMI_VDEV_PARAM_EARLY_RX_INIT_SLOP, 979 WMI_VDEV_PARAM_EARLY_RX_ADJUST_PAUSE, 980 WMI_VDEV_PARAM_TX_PWRLIMIT, 981 WMI_VDEV_PARAM_SNR_NUM_FOR_CAL, 982 WMI_VDEV_PARAM_ROAM_FW_OFFLOAD, 983 WMI_VDEV_PARAM_ENABLE_RMC, 984 WMI_VDEV_PARAM_IBSS_MAX_BCN_LOST_MS, 985 WMI_VDEV_PARAM_MAX_RATE, 986 WMI_VDEV_PARAM_EARLY_RX_DRIFT_SAMPLE, 987 WMI_VDEV_PARAM_SET_IBSS_TX_FAIL_CNT_THR, 988 WMI_VDEV_PARAM_EBT_RESYNC_TIMEOUT, 989 WMI_VDEV_PARAM_AGGR_TRIG_EVENT_ENABLE, 990 WMI_VDEV_PARAM_IS_IBSS_POWER_SAVE_ALLOWED, 991 WMI_VDEV_PARAM_IS_POWER_COLLAPSE_ALLOWED, 992 WMI_VDEV_PARAM_IS_AWAKE_ON_TXRX_ENABLED, 993 WMI_VDEV_PARAM_INACTIVITY_CNT, 994 WMI_VDEV_PARAM_TXSP_END_INACTIVITY_TIME_MS, 995 WMI_VDEV_PARAM_DTIM_POLICY, 996 WMI_VDEV_PARAM_IBSS_PS_WARMUP_TIME_SECS, 997 WMI_VDEV_PARAM_IBSS_PS_1RX_CHAIN_IN_ATIM_WINDOW_ENABLE, 998 WMI_VDEV_PARAM_RX_LEAK_WINDOW, 999 WMI_VDEV_PARAM_STATS_AVG_FACTOR, 1000 WMI_VDEV_PARAM_DISCONNECT_TH, 1001 WMI_VDEV_PARAM_RTSCTS_RATE, 1002 WMI_VDEV_PARAM_MCC_RTSCTS_PROTECTION_ENABLE, 1003 WMI_VDEV_PARAM_MCC_BROADCAST_PROBE_ENABLE, 1004 WMI_VDEV_PARAM_TXPOWER_SCALE, 1005 WMI_VDEV_PARAM_TXPOWER_SCALE_DECR_DB, 1006 WMI_VDEV_PARAM_MCAST2UCAST_SET, 1007 WMI_VDEV_PARAM_RC_NUM_RETRIES, 1008 WMI_VDEV_PARAM_CABQ_MAXDUR, 1009 WMI_VDEV_PARAM_MFPTEST_SET, 1010 WMI_VDEV_PARAM_RTS_FIXED_RATE, 1011 WMI_VDEV_PARAM_VHT_SGIMASK, 1012 WMI_VDEV_PARAM_VHT80_RATEMASK, 1013 WMI_VDEV_PARAM_PROXY_STA, 1014 WMI_VDEV_PARAM_VIRTUAL_CELL_MODE, 1015 WMI_VDEV_PARAM_RX_DECAP_TYPE, 1016 WMI_VDEV_PARAM_BW_NSS_RATEMASK, 1017 WMI_VDEV_PARAM_SENSOR_AP, 1018 WMI_VDEV_PARAM_BEACON_RATE, 1019 WMI_VDEV_PARAM_DTIM_ENABLE_CTS, 1020 WMI_VDEV_PARAM_STA_KICKOUT, 1021 WMI_VDEV_PARAM_CAPABILITIES, 1022 WMI_VDEV_PARAM_TSF_INCREMENT, 1023 WMI_VDEV_PARAM_AMPDU_PER_AC, 1024 WMI_VDEV_PARAM_RX_FILTER, 1025 WMI_VDEV_PARAM_MGMT_TX_POWER, 1026 WMI_VDEV_PARAM_NON_AGG_SW_RETRY_TH, 1027 WMI_VDEV_PARAM_AGG_SW_RETRY_TH, 1028 WMI_VDEV_PARAM_DISABLE_DYN_BW_RTS, 1029 WMI_VDEV_PARAM_ATF_SSID_SCHED_POLICY, 1030 WMI_VDEV_PARAM_HE_DCM, 1031 WMI_VDEV_PARAM_HE_RANGE_EXT, 1032 WMI_VDEV_PARAM_ENABLE_BCAST_PROBE_RESPONSE, 1033 WMI_VDEV_PARAM_FILS_MAX_CHANNEL_GUARD_TIME, 1034 WMI_VDEV_PARAM_BA_MODE = 0x7e, 1035 WMI_VDEV_PARAM_SET_HE_SOUNDING_MODE = 0x87, 1036 WMI_VDEV_PARAM_6GHZ_PARAMS = 0x99, 1037 WMI_VDEV_PARAM_PROTOTYPE = 0x8000, 1038 WMI_VDEV_PARAM_BSS_COLOR, 1039 WMI_VDEV_PARAM_SET_HEMU_MODE, 1040 WMI_VDEV_PARAM_HEOPS_0_31 = 0x8003, 1041 }; 1042 1043 enum wmi_tlv_peer_flags { 1044 WMI_TLV_PEER_AUTH = 0x00000001, 1045 WMI_TLV_PEER_QOS = 0x00000002, 1046 WMI_TLV_PEER_NEED_PTK_4_WAY = 0x00000004, 1047 WMI_TLV_PEER_NEED_GTK_2_WAY = 0x00000010, 1048 WMI_TLV_PEER_APSD = 0x00000800, 1049 WMI_TLV_PEER_HT = 0x00001000, 1050 WMI_TLV_PEER_40MHZ = 0x00002000, 1051 WMI_TLV_PEER_STBC = 0x00008000, 1052 WMI_TLV_PEER_LDPC = 0x00010000, 1053 WMI_TLV_PEER_DYN_MIMOPS = 0x00020000, 1054 WMI_TLV_PEER_STATIC_MIMOPS = 0x00040000, 1055 WMI_TLV_PEER_SPATIAL_MUX = 0x00200000, 1056 WMI_TLV_PEER_VHT = 0x02000000, 1057 WMI_TLV_PEER_80MHZ = 0x04000000, 1058 WMI_TLV_PEER_PMF = 0x08000000, 1059 WMI_PEER_IS_P2P_CAPABLE = 0x20000000, 1060 WMI_PEER_160MHZ = 0x40000000, 1061 WMI_PEER_SAFEMODE_EN = 0x80000000, 1062 1063 }; 1064 1065 /** Enum list of TLV Tags for each parameter structure type. */ 1066 enum wmi_tlv_tag { 1067 WMI_TAG_LAST_RESERVED = 15, 1068 WMI_TAG_FIRST_ARRAY_ENUM, 1069 WMI_TAG_ARRAY_UINT32 = WMI_TAG_FIRST_ARRAY_ENUM, 1070 WMI_TAG_ARRAY_BYTE, 1071 WMI_TAG_ARRAY_STRUCT, 1072 WMI_TAG_ARRAY_FIXED_STRUCT, 1073 WMI_TAG_LAST_ARRAY_ENUM = 31, 1074 WMI_TAG_SERVICE_READY_EVENT, 1075 WMI_TAG_HAL_REG_CAPABILITIES, 1076 WMI_TAG_WLAN_HOST_MEM_REQ, 1077 WMI_TAG_READY_EVENT, 1078 WMI_TAG_SCAN_EVENT, 1079 WMI_TAG_PDEV_TPC_CONFIG_EVENT, 1080 WMI_TAG_CHAN_INFO_EVENT, 1081 WMI_TAG_COMB_PHYERR_RX_HDR, 1082 WMI_TAG_VDEV_START_RESPONSE_EVENT, 1083 WMI_TAG_VDEV_STOPPED_EVENT, 1084 WMI_TAG_VDEV_INSTALL_KEY_COMPLETE_EVENT, 1085 WMI_TAG_PEER_STA_KICKOUT_EVENT, 1086 WMI_TAG_MGMT_RX_HDR, 1087 WMI_TAG_TBTT_OFFSET_EVENT, 1088 WMI_TAG_TX_DELBA_COMPLETE_EVENT, 1089 WMI_TAG_TX_ADDBA_COMPLETE_EVENT, 1090 WMI_TAG_ROAM_EVENT, 1091 WMI_TAG_WOW_EVENT_INFO, 1092 WMI_TAG_WOW_EVENT_INFO_SECTION_BITMAP, 1093 WMI_TAG_RTT_EVENT_HEADER, 1094 WMI_TAG_RTT_ERROR_REPORT_EVENT, 1095 WMI_TAG_RTT_MEAS_EVENT, 1096 WMI_TAG_ECHO_EVENT, 1097 WMI_TAG_FTM_INTG_EVENT, 1098 WMI_TAG_VDEV_GET_KEEPALIVE_EVENT, 1099 WMI_TAG_GPIO_INPUT_EVENT, 1100 WMI_TAG_CSA_EVENT, 1101 WMI_TAG_GTK_OFFLOAD_STATUS_EVENT, 1102 WMI_TAG_IGTK_INFO, 1103 WMI_TAG_DCS_INTERFERENCE_EVENT, 1104 WMI_TAG_ATH_DCS_CW_INT, 1105 WMI_TAG_WLAN_DCS_CW_INT = /* ALIAS */ 1106 WMI_TAG_ATH_DCS_CW_INT, 1107 WMI_TAG_ATH_DCS_WLAN_INT_STAT, 1108 WMI_TAG_WLAN_DCS_IM_TGT_STATS_T = /* ALIAS */ 1109 WMI_TAG_ATH_DCS_WLAN_INT_STAT, 1110 WMI_TAG_WLAN_PROFILE_CTX_T, 1111 WMI_TAG_WLAN_PROFILE_T, 1112 WMI_TAG_PDEV_QVIT_EVENT, 1113 WMI_TAG_HOST_SWBA_EVENT, 1114 WMI_TAG_TIM_INFO, 1115 WMI_TAG_P2P_NOA_INFO, 1116 WMI_TAG_STATS_EVENT, 1117 WMI_TAG_AVOID_FREQ_RANGES_EVENT, 1118 WMI_TAG_AVOID_FREQ_RANGE_DESC, 1119 WMI_TAG_GTK_REKEY_FAIL_EVENT, 1120 WMI_TAG_INIT_CMD, 1121 WMI_TAG_RESOURCE_CONFIG, 1122 WMI_TAG_WLAN_HOST_MEMORY_CHUNK, 1123 WMI_TAG_START_SCAN_CMD, 1124 WMI_TAG_STOP_SCAN_CMD, 1125 WMI_TAG_SCAN_CHAN_LIST_CMD, 1126 WMI_TAG_CHANNEL, 1127 WMI_TAG_PDEV_SET_REGDOMAIN_CMD, 1128 WMI_TAG_PDEV_SET_PARAM_CMD, 1129 WMI_TAG_PDEV_SET_WMM_PARAMS_CMD, 1130 WMI_TAG_WMM_PARAMS, 1131 WMI_TAG_PDEV_SET_QUIET_CMD, 1132 WMI_TAG_VDEV_CREATE_CMD, 1133 WMI_TAG_VDEV_DELETE_CMD, 1134 WMI_TAG_VDEV_START_REQUEST_CMD, 1135 WMI_TAG_P2P_NOA_DESCRIPTOR, 1136 WMI_TAG_P2P_GO_SET_BEACON_IE, 1137 WMI_TAG_GTK_OFFLOAD_CMD, 1138 WMI_TAG_VDEV_UP_CMD, 1139 WMI_TAG_VDEV_STOP_CMD, 1140 WMI_TAG_VDEV_DOWN_CMD, 1141 WMI_TAG_VDEV_SET_PARAM_CMD, 1142 WMI_TAG_VDEV_INSTALL_KEY_CMD, 1143 WMI_TAG_PEER_CREATE_CMD, 1144 WMI_TAG_PEER_DELETE_CMD, 1145 WMI_TAG_PEER_FLUSH_TIDS_CMD, 1146 WMI_TAG_PEER_SET_PARAM_CMD, 1147 WMI_TAG_PEER_ASSOC_COMPLETE_CMD, 1148 WMI_TAG_VHT_RATE_SET, 1149 WMI_TAG_BCN_TMPL_CMD, 1150 WMI_TAG_PRB_TMPL_CMD, 1151 WMI_TAG_BCN_PRB_INFO, 1152 WMI_TAG_PEER_TID_ADDBA_CMD, 1153 WMI_TAG_PEER_TID_DELBA_CMD, 1154 WMI_TAG_STA_POWERSAVE_MODE_CMD, 1155 WMI_TAG_STA_POWERSAVE_PARAM_CMD, 1156 WMI_TAG_STA_DTIM_PS_METHOD_CMD, 1157 WMI_TAG_ROAM_SCAN_MODE, 1158 WMI_TAG_ROAM_SCAN_RSSI_THRESHOLD, 1159 WMI_TAG_ROAM_SCAN_PERIOD, 1160 WMI_TAG_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, 1161 WMI_TAG_PDEV_SUSPEND_CMD, 1162 WMI_TAG_PDEV_RESUME_CMD, 1163 WMI_TAG_ADD_BCN_FILTER_CMD, 1164 WMI_TAG_RMV_BCN_FILTER_CMD, 1165 WMI_TAG_WOW_ENABLE_CMD, 1166 WMI_TAG_WOW_HOSTWAKEUP_FROM_SLEEP_CMD, 1167 WMI_TAG_STA_UAPSD_AUTO_TRIG_CMD, 1168 WMI_TAG_STA_UAPSD_AUTO_TRIG_PARAM, 1169 WMI_TAG_SET_ARP_NS_OFFLOAD_CMD, 1170 WMI_TAG_ARP_OFFLOAD_TUPLE, 1171 WMI_TAG_NS_OFFLOAD_TUPLE, 1172 WMI_TAG_FTM_INTG_CMD, 1173 WMI_TAG_STA_KEEPALIVE_CMD, 1174 WMI_TAG_STA_KEEPALVE_ARP_RESPONSE, 1175 WMI_TAG_P2P_SET_VENDOR_IE_DATA_CMD, 1176 WMI_TAG_AP_PS_PEER_CMD, 1177 WMI_TAG_PEER_RATE_RETRY_SCHED_CMD, 1178 WMI_TAG_WLAN_PROFILE_TRIGGER_CMD, 1179 WMI_TAG_WLAN_PROFILE_SET_HIST_INTVL_CMD, 1180 WMI_TAG_WLAN_PROFILE_GET_PROF_DATA_CMD, 1181 WMI_TAG_WLAN_PROFILE_ENABLE_PROFILE_ID_CMD, 1182 WMI_TAG_WOW_DEL_PATTERN_CMD, 1183 WMI_TAG_WOW_ADD_DEL_EVT_CMD, 1184 WMI_TAG_RTT_MEASREQ_HEAD, 1185 WMI_TAG_RTT_MEASREQ_BODY, 1186 WMI_TAG_RTT_TSF_CMD, 1187 WMI_TAG_VDEV_SPECTRAL_CONFIGURE_CMD, 1188 WMI_TAG_VDEV_SPECTRAL_ENABLE_CMD, 1189 WMI_TAG_REQUEST_STATS_CMD, 1190 WMI_TAG_NLO_CONFIG_CMD, 1191 WMI_TAG_NLO_CONFIGURED_PARAMETERS, 1192 WMI_TAG_CSA_OFFLOAD_ENABLE_CMD, 1193 WMI_TAG_CSA_OFFLOAD_CHANSWITCH_CMD, 1194 WMI_TAG_CHATTER_SET_MODE_CMD, 1195 WMI_TAG_ECHO_CMD, 1196 WMI_TAG_VDEV_SET_KEEPALIVE_CMD, 1197 WMI_TAG_VDEV_GET_KEEPALIVE_CMD, 1198 WMI_TAG_FORCE_FW_HANG_CMD, 1199 WMI_TAG_GPIO_CONFIG_CMD, 1200 WMI_TAG_GPIO_OUTPUT_CMD, 1201 WMI_TAG_PEER_ADD_WDS_ENTRY_CMD, 1202 WMI_TAG_PEER_REMOVE_WDS_ENTRY_CMD, 1203 WMI_TAG_BCN_TX_HDR, 1204 WMI_TAG_BCN_SEND_FROM_HOST_CMD, 1205 WMI_TAG_MGMT_TX_HDR, 1206 WMI_TAG_ADDBA_CLEAR_RESP_CMD, 1207 WMI_TAG_ADDBA_SEND_CMD, 1208 WMI_TAG_DELBA_SEND_CMD, 1209 WMI_TAG_ADDBA_SETRESPONSE_CMD, 1210 WMI_TAG_SEND_SINGLEAMSDU_CMD, 1211 WMI_TAG_PDEV_PKTLOG_ENABLE_CMD, 1212 WMI_TAG_PDEV_PKTLOG_DISABLE_CMD, 1213 WMI_TAG_PDEV_SET_HT_IE_CMD, 1214 WMI_TAG_PDEV_SET_VHT_IE_CMD, 1215 WMI_TAG_PDEV_SET_DSCP_TID_MAP_CMD, 1216 WMI_TAG_PDEV_GREEN_AP_PS_ENABLE_CMD, 1217 WMI_TAG_PDEV_GET_TPC_CONFIG_CMD, 1218 WMI_TAG_PDEV_SET_BASE_MACADDR_CMD, 1219 WMI_TAG_PEER_MCAST_GROUP_CMD, 1220 WMI_TAG_ROAM_AP_PROFILE, 1221 WMI_TAG_AP_PROFILE, 1222 WMI_TAG_SCAN_SCH_PRIORITY_TABLE_CMD, 1223 WMI_TAG_PDEV_DFS_ENABLE_CMD, 1224 WMI_TAG_PDEV_DFS_DISABLE_CMD, 1225 WMI_TAG_WOW_ADD_PATTERN_CMD, 1226 WMI_TAG_WOW_BITMAP_PATTERN_T, 1227 WMI_TAG_WOW_IPV4_SYNC_PATTERN_T, 1228 WMI_TAG_WOW_IPV6_SYNC_PATTERN_T, 1229 WMI_TAG_WOW_MAGIC_PATTERN_CMD, 1230 WMI_TAG_SCAN_UPDATE_REQUEST_CMD, 1231 WMI_TAG_CHATTER_PKT_COALESCING_FILTER, 1232 WMI_TAG_CHATTER_COALESCING_ADD_FILTER_CMD, 1233 WMI_TAG_CHATTER_COALESCING_DELETE_FILTER_CMD, 1234 WMI_TAG_CHATTER_COALESCING_QUERY_CMD, 1235 WMI_TAG_TXBF_CMD, 1236 WMI_TAG_DEBUG_LOG_CONFIG_CMD, 1237 WMI_TAG_NLO_EVENT, 1238 WMI_TAG_CHATTER_QUERY_REPLY_EVENT, 1239 WMI_TAG_UPLOAD_H_HDR, 1240 WMI_TAG_CAPTURE_H_EVENT_HDR, 1241 WMI_TAG_VDEV_WNM_SLEEPMODE_CMD, 1242 WMI_TAG_VDEV_IPSEC_NATKEEPALIVE_FILTER_CMD, 1243 WMI_TAG_VDEV_WMM_ADDTS_CMD, 1244 WMI_TAG_VDEV_WMM_DELTS_CMD, 1245 WMI_TAG_VDEV_SET_WMM_PARAMS_CMD, 1246 WMI_TAG_TDLS_SET_STATE_CMD, 1247 WMI_TAG_TDLS_PEER_UPDATE_CMD, 1248 WMI_TAG_TDLS_PEER_EVENT, 1249 WMI_TAG_TDLS_PEER_CAPABILITIES, 1250 WMI_TAG_VDEV_MCC_SET_TBTT_MODE_CMD, 1251 WMI_TAG_ROAM_CHAN_LIST, 1252 WMI_TAG_VDEV_MCC_BCN_INTVL_CHANGE_EVENT, 1253 WMI_TAG_RESMGR_ADAPTIVE_OCS_ENABLE_DISABLE_CMD, 1254 WMI_TAG_RESMGR_SET_CHAN_TIME_QUOTA_CMD, 1255 WMI_TAG_RESMGR_SET_CHAN_LATENCY_CMD, 1256 WMI_TAG_BA_REQ_SSN_CMD, 1257 WMI_TAG_BA_RSP_SSN_EVENT, 1258 WMI_TAG_STA_SMPS_FORCE_MODE_CMD, 1259 WMI_TAG_SET_MCASTBCAST_FILTER_CMD, 1260 WMI_TAG_P2P_SET_OPPPS_CMD, 1261 WMI_TAG_P2P_SET_NOA_CMD, 1262 WMI_TAG_BA_REQ_SSN_CMD_SUB_STRUCT_PARAM, 1263 WMI_TAG_BA_REQ_SSN_EVENT_SUB_STRUCT_PARAM, 1264 WMI_TAG_STA_SMPS_PARAM_CMD, 1265 WMI_TAG_VDEV_SET_GTX_PARAMS_CMD, 1266 WMI_TAG_MCC_SCHED_TRAFFIC_STATS_CMD, 1267 WMI_TAG_MCC_SCHED_STA_TRAFFIC_STATS, 1268 WMI_TAG_OFFLOAD_BCN_TX_STATUS_EVENT, 1269 WMI_TAG_P2P_NOA_EVENT, 1270 WMI_TAG_HB_SET_ENABLE_CMD, 1271 WMI_TAG_HB_SET_TCP_PARAMS_CMD, 1272 WMI_TAG_HB_SET_TCP_PKT_FILTER_CMD, 1273 WMI_TAG_HB_SET_UDP_PARAMS_CMD, 1274 WMI_TAG_HB_SET_UDP_PKT_FILTER_CMD, 1275 WMI_TAG_HB_IND_EVENT, 1276 WMI_TAG_TX_PAUSE_EVENT, 1277 WMI_TAG_RFKILL_EVENT, 1278 WMI_TAG_DFS_RADAR_EVENT, 1279 WMI_TAG_DFS_PHYERR_FILTER_ENA_CMD, 1280 WMI_TAG_DFS_PHYERR_FILTER_DIS_CMD, 1281 WMI_TAG_BATCH_SCAN_RESULT_SCAN_LIST, 1282 WMI_TAG_BATCH_SCAN_RESULT_NETWORK_INFO, 1283 WMI_TAG_BATCH_SCAN_ENABLE_CMD, 1284 WMI_TAG_BATCH_SCAN_DISABLE_CMD, 1285 WMI_TAG_BATCH_SCAN_TRIGGER_RESULT_CMD, 1286 WMI_TAG_BATCH_SCAN_ENABLED_EVENT, 1287 WMI_TAG_BATCH_SCAN_RESULT_EVENT, 1288 WMI_TAG_VDEV_PLMREQ_START_CMD, 1289 WMI_TAG_VDEV_PLMREQ_STOP_CMD, 1290 WMI_TAG_THERMAL_MGMT_CMD, 1291 WMI_TAG_THERMAL_MGMT_EVENT, 1292 WMI_TAG_PEER_INFO_REQ_CMD, 1293 WMI_TAG_PEER_INFO_EVENT, 1294 WMI_TAG_PEER_INFO, 1295 WMI_TAG_PEER_TX_FAIL_CNT_THR_EVENT, 1296 WMI_TAG_RMC_SET_MODE_CMD, 1297 WMI_TAG_RMC_SET_ACTION_PERIOD_CMD, 1298 WMI_TAG_RMC_CONFIG_CMD, 1299 WMI_TAG_MHF_OFFLOAD_SET_MODE_CMD, 1300 WMI_TAG_MHF_OFFLOAD_PLUMB_ROUTING_TABLE_CMD, 1301 WMI_TAG_ADD_PROACTIVE_ARP_RSP_PATTERN_CMD, 1302 WMI_TAG_DEL_PROACTIVE_ARP_RSP_PATTERN_CMD, 1303 WMI_TAG_NAN_CMD_PARAM, 1304 WMI_TAG_NAN_EVENT_HDR, 1305 WMI_TAG_PDEV_L1SS_TRACK_EVENT, 1306 WMI_TAG_DIAG_DATA_CONTAINER_EVENT, 1307 WMI_TAG_MODEM_POWER_STATE_CMD_PARAM, 1308 WMI_TAG_PEER_GET_ESTIMATED_LINKSPEED_CMD, 1309 WMI_TAG_PEER_ESTIMATED_LINKSPEED_EVENT, 1310 WMI_TAG_AGGR_STATE_TRIG_EVENT, 1311 WMI_TAG_MHF_OFFLOAD_ROUTING_TABLE_ENTRY, 1312 WMI_TAG_ROAM_SCAN_CMD, 1313 WMI_TAG_REQ_STATS_EXT_CMD, 1314 WMI_TAG_STATS_EXT_EVENT, 1315 WMI_TAG_OBSS_SCAN_ENABLE_CMD, 1316 WMI_TAG_OBSS_SCAN_DISABLE_CMD, 1317 WMI_TAG_OFFLOAD_PRB_RSP_TX_STATUS_EVENT, 1318 WMI_TAG_PDEV_SET_LED_CONFIG_CMD, 1319 WMI_TAG_HOST_AUTO_SHUTDOWN_CFG_CMD, 1320 WMI_TAG_HOST_AUTO_SHUTDOWN_EVENT, 1321 WMI_TAG_UPDATE_WHAL_MIB_STATS_EVENT, 1322 WMI_TAG_CHAN_AVOID_UPDATE_CMD_PARAM, 1323 WMI_TAG_WOW_IOAC_PKT_PATTERN_T, 1324 WMI_TAG_WOW_IOAC_TMR_PATTERN_T, 1325 WMI_TAG_WOW_IOAC_ADD_KEEPALIVE_CMD, 1326 WMI_TAG_WOW_IOAC_DEL_KEEPALIVE_CMD, 1327 WMI_TAG_WOW_IOAC_KEEPALIVE_T, 1328 WMI_TAG_WOW_IOAC_ADD_PATTERN_CMD, 1329 WMI_TAG_WOW_IOAC_DEL_PATTERN_CMD, 1330 WMI_TAG_START_LINK_STATS_CMD, 1331 WMI_TAG_CLEAR_LINK_STATS_CMD, 1332 WMI_TAG_REQUEST_LINK_STATS_CMD, 1333 WMI_TAG_IFACE_LINK_STATS_EVENT, 1334 WMI_TAG_RADIO_LINK_STATS_EVENT, 1335 WMI_TAG_PEER_STATS_EVENT, 1336 WMI_TAG_CHANNEL_STATS, 1337 WMI_TAG_RADIO_LINK_STATS, 1338 WMI_TAG_RATE_STATS, 1339 WMI_TAG_PEER_LINK_STATS, 1340 WMI_TAG_WMM_AC_STATS, 1341 WMI_TAG_IFACE_LINK_STATS, 1342 WMI_TAG_LPI_MGMT_SNOOPING_CONFIG_CMD, 1343 WMI_TAG_LPI_START_SCAN_CMD, 1344 WMI_TAG_LPI_STOP_SCAN_CMD, 1345 WMI_TAG_LPI_RESULT_EVENT, 1346 WMI_TAG_PEER_STATE_EVENT, 1347 WMI_TAG_EXTSCAN_BUCKET_CMD, 1348 WMI_TAG_EXTSCAN_BUCKET_CHANNEL_EVENT, 1349 WMI_TAG_EXTSCAN_START_CMD, 1350 WMI_TAG_EXTSCAN_STOP_CMD, 1351 WMI_TAG_EXTSCAN_CONFIGURE_WLAN_CHANGE_MONITOR_CMD, 1352 WMI_TAG_EXTSCAN_WLAN_CHANGE_BSSID_PARAM_CMD, 1353 WMI_TAG_EXTSCAN_CONFIGURE_HOTLIST_MONITOR_CMD, 1354 WMI_TAG_EXTSCAN_GET_CACHED_RESULTS_CMD, 1355 WMI_TAG_EXTSCAN_GET_WLAN_CHANGE_RESULTS_CMD, 1356 WMI_TAG_EXTSCAN_SET_CAPABILITIES_CMD, 1357 WMI_TAG_EXTSCAN_GET_CAPABILITIES_CMD, 1358 WMI_TAG_EXTSCAN_OPERATION_EVENT, 1359 WMI_TAG_EXTSCAN_START_STOP_EVENT, 1360 WMI_TAG_EXTSCAN_TABLE_USAGE_EVENT, 1361 WMI_TAG_EXTSCAN_WLAN_DESCRIPTOR_EVENT, 1362 WMI_TAG_EXTSCAN_RSSI_INFO_EVENT, 1363 WMI_TAG_EXTSCAN_CACHED_RESULTS_EVENT, 1364 WMI_TAG_EXTSCAN_WLAN_CHANGE_RESULTS_EVENT, 1365 WMI_TAG_EXTSCAN_WLAN_CHANGE_RESULT_BSSID_EVENT, 1366 WMI_TAG_EXTSCAN_HOTLIST_MATCH_EVENT, 1367 WMI_TAG_EXTSCAN_CAPABILITIES_EVENT, 1368 WMI_TAG_EXTSCAN_CACHE_CAPABILITIES_EVENT, 1369 WMI_TAG_EXTSCAN_WLAN_CHANGE_MONITOR_CAPABILITIES_EVENT, 1370 WMI_TAG_EXTSCAN_HOTLIST_MONITOR_CAPABILITIES_EVENT, 1371 WMI_TAG_D0_WOW_ENABLE_DISABLE_CMD, 1372 WMI_TAG_D0_WOW_DISABLE_ACK_EVENT, 1373 WMI_TAG_UNIT_TEST_CMD, 1374 WMI_TAG_ROAM_OFFLOAD_TLV_PARAM, 1375 WMI_TAG_ROAM_11I_OFFLOAD_TLV_PARAM, 1376 WMI_TAG_ROAM_11R_OFFLOAD_TLV_PARAM, 1377 WMI_TAG_ROAM_ESE_OFFLOAD_TLV_PARAM, 1378 WMI_TAG_ROAM_SYNCH_EVENT, 1379 WMI_TAG_ROAM_SYNCH_COMPLETE, 1380 WMI_TAG_EXTWOW_ENABLE_CMD, 1381 WMI_TAG_EXTWOW_SET_APP_TYPE1_PARAMS_CMD, 1382 WMI_TAG_EXTWOW_SET_APP_TYPE2_PARAMS_CMD, 1383 WMI_TAG_LPI_STATUS_EVENT, 1384 WMI_TAG_LPI_HANDOFF_EVENT, 1385 WMI_TAG_VDEV_RATE_STATS_EVENT, 1386 WMI_TAG_VDEV_RATE_HT_INFO, 1387 WMI_TAG_RIC_REQUEST, 1388 WMI_TAG_PDEV_GET_TEMPERATURE_CMD, 1389 WMI_TAG_PDEV_TEMPERATURE_EVENT, 1390 WMI_TAG_SET_DHCP_SERVER_OFFLOAD_CMD, 1391 WMI_TAG_TPC_CHAINMASK_CONFIG_CMD, 1392 WMI_TAG_RIC_TSPEC, 1393 WMI_TAG_TPC_CHAINMASK_CONFIG, 1394 WMI_TAG_IPA_OFFLOAD_ENABLE_DISABLE_CMD, 1395 WMI_TAG_SCAN_PROB_REQ_OUI_CMD, 1396 WMI_TAG_KEY_MATERIAL, 1397 WMI_TAG_TDLS_SET_OFFCHAN_MODE_CMD, 1398 WMI_TAG_SET_LED_FLASHING_CMD, 1399 WMI_TAG_MDNS_OFFLOAD_CMD, 1400 WMI_TAG_MDNS_SET_FQDN_CMD, 1401 WMI_TAG_MDNS_SET_RESP_CMD, 1402 WMI_TAG_MDNS_GET_STATS_CMD, 1403 WMI_TAG_MDNS_STATS_EVENT, 1404 WMI_TAG_ROAM_INVOKE_CMD, 1405 WMI_TAG_PDEV_RESUME_EVENT, 1406 WMI_TAG_PDEV_SET_ANTENNA_DIVERSITY_CMD, 1407 WMI_TAG_SAP_OFL_ENABLE_CMD, 1408 WMI_TAG_SAP_OFL_ADD_STA_EVENT, 1409 WMI_TAG_SAP_OFL_DEL_STA_EVENT, 1410 WMI_TAG_APFIND_CMD_PARAM, 1411 WMI_TAG_APFIND_EVENT_HDR, 1412 WMI_TAG_OCB_SET_SCHED_CMD, 1413 WMI_TAG_OCB_SET_SCHED_EVENT, 1414 WMI_TAG_OCB_SET_CONFIG_CMD, 1415 WMI_TAG_OCB_SET_CONFIG_RESP_EVENT, 1416 WMI_TAG_OCB_SET_UTC_TIME_CMD, 1417 WMI_TAG_OCB_START_TIMING_ADVERT_CMD, 1418 WMI_TAG_OCB_STOP_TIMING_ADVERT_CMD, 1419 WMI_TAG_OCB_GET_TSF_TIMER_CMD, 1420 WMI_TAG_OCB_GET_TSF_TIMER_RESP_EVENT, 1421 WMI_TAG_DCC_GET_STATS_CMD, 1422 WMI_TAG_DCC_CHANNEL_STATS_REQUEST, 1423 WMI_TAG_DCC_GET_STATS_RESP_EVENT, 1424 WMI_TAG_DCC_CLEAR_STATS_CMD, 1425 WMI_TAG_DCC_UPDATE_NDL_CMD, 1426 WMI_TAG_DCC_UPDATE_NDL_RESP_EVENT, 1427 WMI_TAG_DCC_STATS_EVENT, 1428 WMI_TAG_OCB_CHANNEL, 1429 WMI_TAG_OCB_SCHEDULE_ELEMENT, 1430 WMI_TAG_DCC_NDL_STATS_PER_CHANNEL, 1431 WMI_TAG_DCC_NDL_CHAN, 1432 WMI_TAG_QOS_PARAMETER, 1433 WMI_TAG_DCC_NDL_ACTIVE_STATE_CONFIG, 1434 WMI_TAG_ROAM_SCAN_EXTENDED_THRESHOLD_PARAM, 1435 WMI_TAG_ROAM_FILTER, 1436 WMI_TAG_PASSPOINT_CONFIG_CMD, 1437 WMI_TAG_PASSPOINT_EVENT_HDR, 1438 WMI_TAG_EXTSCAN_CONFIGURE_HOTLIST_SSID_MONITOR_CMD, 1439 WMI_TAG_EXTSCAN_HOTLIST_SSID_MATCH_EVENT, 1440 WMI_TAG_VDEV_TSF_TSTAMP_ACTION_CMD, 1441 WMI_TAG_VDEV_TSF_REPORT_EVENT, 1442 WMI_TAG_GET_FW_MEM_DUMP, 1443 WMI_TAG_UPDATE_FW_MEM_DUMP, 1444 WMI_TAG_FW_MEM_DUMP_PARAMS, 1445 WMI_TAG_DEBUG_MESG_FLUSH, 1446 WMI_TAG_DEBUG_MESG_FLUSH_COMPLETE, 1447 WMI_TAG_PEER_SET_RATE_REPORT_CONDITION, 1448 WMI_TAG_ROAM_SUBNET_CHANGE_CONFIG, 1449 WMI_TAG_VDEV_SET_IE_CMD, 1450 WMI_TAG_RSSI_BREACH_MONITOR_CONFIG, 1451 WMI_TAG_RSSI_BREACH_EVENT, 1452 WMI_TAG_WOW_EVENT_INITIAL_WAKEUP, 1453 WMI_TAG_SOC_SET_PCL_CMD, 1454 WMI_TAG_SOC_SET_HW_MODE_CMD, 1455 WMI_TAG_SOC_SET_HW_MODE_RESPONSE_EVENT, 1456 WMI_TAG_SOC_HW_MODE_TRANSITION_EVENT, 1457 WMI_TAG_VDEV_TXRX_STREAMS, 1458 WMI_TAG_SOC_SET_HW_MODE_RESPONSE_VDEV_MAC_ENTRY, 1459 WMI_TAG_SOC_SET_DUAL_MAC_CONFIG_CMD, 1460 WMI_TAG_SOC_SET_DUAL_MAC_CONFIG_RESPONSE_EVENT, 1461 WMI_TAG_WOW_IOAC_SOCK_PATTERN_T, 1462 WMI_TAG_WOW_ENABLE_ICMPV6_NA_FLT_CMD, 1463 WMI_TAG_DIAG_EVENT_LOG_CONFIG, 1464 WMI_TAG_DIAG_EVENT_LOG_SUPPORTED_EVENT_FIXED_PARAMS, 1465 WMI_TAG_PACKET_FILTER_CONFIG, 1466 WMI_TAG_PACKET_FILTER_ENABLE, 1467 WMI_TAG_SAP_SET_BLACKLIST_PARAM_CMD, 1468 WMI_TAG_MGMT_TX_SEND_CMD, 1469 WMI_TAG_MGMT_TX_COMPL_EVENT, 1470 WMI_TAG_SOC_SET_ANTENNA_MODE_CMD, 1471 WMI_TAG_WOW_UDP_SVC_OFLD_CMD, 1472 WMI_TAG_LRO_INFO_CMD, 1473 WMI_TAG_ROAM_EARLYSTOP_RSSI_THRES_PARAM, 1474 WMI_TAG_SERVICE_READY_EXT_EVENT, 1475 WMI_TAG_MAWC_SENSOR_REPORT_IND_CMD, 1476 WMI_TAG_MAWC_ENABLE_SENSOR_EVENT, 1477 WMI_TAG_ROAM_CONFIGURE_MAWC_CMD, 1478 WMI_TAG_NLO_CONFIGURE_MAWC_CMD, 1479 WMI_TAG_EXTSCAN_CONFIGURE_MAWC_CMD, 1480 WMI_TAG_PEER_ASSOC_CONF_EVENT, 1481 WMI_TAG_WOW_HOSTWAKEUP_GPIO_PIN_PATTERN_CONFIG_CMD, 1482 WMI_TAG_AP_PS_EGAP_PARAM_CMD, 1483 WMI_TAG_AP_PS_EGAP_INFO_EVENT, 1484 WMI_TAG_PMF_OFFLOAD_SET_SA_QUERY_CMD, 1485 WMI_TAG_TRANSFER_DATA_TO_FLASH_CMD, 1486 WMI_TAG_TRANSFER_DATA_TO_FLASH_COMPLETE_EVENT, 1487 WMI_TAG_SCPC_EVENT, 1488 WMI_TAG_AP_PS_EGAP_INFO_CHAINMASK_LIST, 1489 WMI_TAG_STA_SMPS_FORCE_MODE_COMPLETE_EVENT, 1490 WMI_TAG_BPF_GET_CAPABILITY_CMD, 1491 WMI_TAG_BPF_CAPABILITY_INFO_EVT, 1492 WMI_TAG_BPF_GET_VDEV_STATS_CMD, 1493 WMI_TAG_BPF_VDEV_STATS_INFO_EVT, 1494 WMI_TAG_BPF_SET_VDEV_INSTRUCTIONS_CMD, 1495 WMI_TAG_BPF_DEL_VDEV_INSTRUCTIONS_CMD, 1496 WMI_TAG_VDEV_DELETE_RESP_EVENT, 1497 WMI_TAG_PEER_DELETE_RESP_EVENT, 1498 WMI_TAG_ROAM_DENSE_THRES_PARAM, 1499 WMI_TAG_ENLO_CANDIDATE_SCORE_PARAM, 1500 WMI_TAG_PEER_UPDATE_WDS_ENTRY_CMD, 1501 WMI_TAG_VDEV_CONFIG_RATEMASK, 1502 WMI_TAG_PDEV_FIPS_CMD, 1503 WMI_TAG_PDEV_SMART_ANT_ENABLE_CMD, 1504 WMI_TAG_PDEV_SMART_ANT_SET_RX_ANTENNA_CMD, 1505 WMI_TAG_PEER_SMART_ANT_SET_TX_ANTENNA_CMD, 1506 WMI_TAG_PEER_SMART_ANT_SET_TRAIN_ANTENNA_CMD, 1507 WMI_TAG_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMD, 1508 WMI_TAG_PDEV_SET_ANT_SWITCH_TBL_CMD, 1509 WMI_TAG_PDEV_SET_CTL_TABLE_CMD, 1510 WMI_TAG_PDEV_SET_MIMOGAIN_TABLE_CMD, 1511 WMI_TAG_FWTEST_SET_PARAM_CMD, 1512 WMI_TAG_PEER_ATF_REQUEST, 1513 WMI_TAG_VDEV_ATF_REQUEST, 1514 WMI_TAG_PDEV_GET_ANI_CCK_CONFIG_CMD, 1515 WMI_TAG_PDEV_GET_ANI_OFDM_CONFIG_CMD, 1516 WMI_TAG_INST_RSSI_STATS_RESP, 1517 WMI_TAG_MED_UTIL_REPORT_EVENT, 1518 WMI_TAG_PEER_STA_PS_STATECHANGE_EVENT, 1519 WMI_TAG_WDS_ADDR_EVENT, 1520 WMI_TAG_PEER_RATECODE_LIST_EVENT, 1521 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_EVENT, 1522 WMI_TAG_PDEV_TPC_EVENT, 1523 WMI_TAG_ANI_OFDM_EVENT, 1524 WMI_TAG_ANI_CCK_EVENT, 1525 WMI_TAG_PDEV_CHANNEL_HOPPING_EVENT, 1526 WMI_TAG_PDEV_FIPS_EVENT, 1527 WMI_TAG_ATF_PEER_INFO, 1528 WMI_TAG_PDEV_GET_TPC_CMD, 1529 WMI_TAG_VDEV_FILTER_NRP_CONFIG_CMD, 1530 WMI_TAG_QBOOST_CFG_CMD, 1531 WMI_TAG_PDEV_SMART_ANT_GPIO_HANDLE, 1532 WMI_TAG_PEER_SMART_ANT_SET_TX_ANTENNA_SERIES, 1533 WMI_TAG_PEER_SMART_ANT_SET_TRAIN_ANTENNA_PARAM, 1534 WMI_TAG_PDEV_SET_ANT_CTRL_CHAIN, 1535 WMI_TAG_PEER_CCK_OFDM_RATE_INFO, 1536 WMI_TAG_PEER_MCS_RATE_INFO, 1537 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_NFDBR, 1538 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_NFDBM, 1539 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_FREQNUM, 1540 WMI_TAG_MU_REPORT_TOTAL_MU, 1541 WMI_TAG_VDEV_SET_DSCP_TID_MAP_CMD, 1542 WMI_TAG_ROAM_SET_MBO, 1543 WMI_TAG_MIB_STATS_ENABLE_CMD, 1544 WMI_TAG_NAN_DISC_IFACE_CREATED_EVENT, 1545 WMI_TAG_NAN_DISC_IFACE_DELETED_EVENT, 1546 WMI_TAG_NAN_STARTED_CLUSTER_EVENT, 1547 WMI_TAG_NAN_JOINED_CLUSTER_EVENT, 1548 WMI_TAG_NDI_GET_CAP_REQ, 1549 WMI_TAG_NDP_INITIATOR_REQ, 1550 WMI_TAG_NDP_RESPONDER_REQ, 1551 WMI_TAG_NDP_END_REQ, 1552 WMI_TAG_NDI_CAP_RSP_EVENT, 1553 WMI_TAG_NDP_INITIATOR_RSP_EVENT, 1554 WMI_TAG_NDP_RESPONDER_RSP_EVENT, 1555 WMI_TAG_NDP_END_RSP_EVENT, 1556 WMI_TAG_NDP_INDICATION_EVENT, 1557 WMI_TAG_NDP_CONFIRM_EVENT, 1558 WMI_TAG_NDP_END_INDICATION_EVENT, 1559 WMI_TAG_VDEV_SET_QUIET_CMD, 1560 WMI_TAG_PDEV_SET_PCL_CMD, 1561 WMI_TAG_PDEV_SET_HW_MODE_CMD, 1562 WMI_TAG_PDEV_SET_MAC_CONFIG_CMD, 1563 WMI_TAG_PDEV_SET_ANTENNA_MODE_CMD, 1564 WMI_TAG_PDEV_SET_HW_MODE_RESPONSE_EVENT, 1565 WMI_TAG_PDEV_HW_MODE_TRANSITION_EVENT, 1566 WMI_TAG_PDEV_SET_HW_MODE_RESPONSE_VDEV_MAC_ENTRY, 1567 WMI_TAG_PDEV_SET_MAC_CONFIG_RESPONSE_EVENT, 1568 WMI_TAG_COEX_CONFIG_CMD, 1569 WMI_TAG_CONFIG_ENHANCED_MCAST_FILTER, 1570 WMI_TAG_CHAN_AVOID_RPT_ALLOW_CMD, 1571 WMI_TAG_SET_PERIODIC_CHANNEL_STATS_CONFIG, 1572 WMI_TAG_VDEV_SET_CUSTOM_AGGR_SIZE_CMD, 1573 WMI_TAG_PDEV_WAL_POWER_DEBUG_CMD, 1574 WMI_TAG_MAC_PHY_CAPABILITIES, 1575 WMI_TAG_HW_MODE_CAPABILITIES, 1576 WMI_TAG_SOC_MAC_PHY_HW_MODE_CAPS, 1577 WMI_TAG_HAL_REG_CAPABILITIES_EXT, 1578 WMI_TAG_SOC_HAL_REG_CAPABILITIES, 1579 WMI_TAG_VDEV_WISA_CMD, 1580 WMI_TAG_TX_POWER_LEVEL_STATS_EVT, 1581 WMI_TAG_SCAN_ADAPTIVE_DWELL_PARAMETERS_TLV, 1582 WMI_TAG_SCAN_ADAPTIVE_DWELL_CONFIG, 1583 WMI_TAG_WOW_SET_ACTION_WAKE_UP_CMD, 1584 WMI_TAG_NDP_END_RSP_PER_NDI, 1585 WMI_TAG_PEER_BWF_REQUEST, 1586 WMI_TAG_BWF_PEER_INFO, 1587 WMI_TAG_DBGLOG_TIME_STAMP_SYNC_CMD, 1588 WMI_TAG_RMC_SET_LEADER_CMD, 1589 WMI_TAG_RMC_MANUAL_LEADER_EVENT, 1590 WMI_TAG_PER_CHAIN_RSSI_STATS, 1591 WMI_TAG_RSSI_STATS, 1592 WMI_TAG_P2P_LO_START_CMD, 1593 WMI_TAG_P2P_LO_STOP_CMD, 1594 WMI_TAG_P2P_LO_STOPPED_EVENT, 1595 WMI_TAG_REORDER_QUEUE_SETUP_CMD, 1596 WMI_TAG_REORDER_QUEUE_REMOVE_CMD, 1597 WMI_TAG_SET_MULTIPLE_MCAST_FILTER_CMD, 1598 WMI_TAG_MGMT_TX_COMPL_BUNDLE_EVENT, 1599 WMI_TAG_READ_DATA_FROM_FLASH_CMD, 1600 WMI_TAG_READ_DATA_FROM_FLASH_EVENT, 1601 WMI_TAG_PDEV_SET_REORDER_TIMEOUT_VAL_CMD, 1602 WMI_TAG_PEER_SET_RX_BLOCKSIZE_CMD, 1603 WMI_TAG_PDEV_SET_WAKEUP_CONFIG_CMDID, 1604 WMI_TAG_TLV_BUF_LEN_PARAM, 1605 WMI_TAG_SERVICE_AVAILABLE_EVENT, 1606 WMI_TAG_PEER_ANTDIV_INFO_REQ_CMD, 1607 WMI_TAG_PEER_ANTDIV_INFO_EVENT, 1608 WMI_TAG_PEER_ANTDIV_INFO, 1609 WMI_TAG_PDEV_GET_ANTDIV_STATUS_CMD, 1610 WMI_TAG_PDEV_ANTDIV_STATUS_EVENT, 1611 WMI_TAG_MNT_FILTER_CMD, 1612 WMI_TAG_GET_CHIP_POWER_STATS_CMD, 1613 WMI_TAG_PDEV_CHIP_POWER_STATS_EVENT, 1614 WMI_TAG_COEX_GET_ANTENNA_ISOLATION_CMD, 1615 WMI_TAG_COEX_REPORT_ISOLATION_EVENT, 1616 WMI_TAG_CHAN_CCA_STATS, 1617 WMI_TAG_PEER_SIGNAL_STATS, 1618 WMI_TAG_TX_STATS, 1619 WMI_TAG_PEER_AC_TX_STATS, 1620 WMI_TAG_RX_STATS, 1621 WMI_TAG_PEER_AC_RX_STATS, 1622 WMI_TAG_REPORT_STATS_EVENT, 1623 WMI_TAG_CHAN_CCA_STATS_THRESH, 1624 WMI_TAG_PEER_SIGNAL_STATS_THRESH, 1625 WMI_TAG_TX_STATS_THRESH, 1626 WMI_TAG_RX_STATS_THRESH, 1627 WMI_TAG_PDEV_SET_STATS_THRESHOLD_CMD, 1628 WMI_TAG_REQUEST_WLAN_STATS_CMD, 1629 WMI_TAG_RX_AGGR_FAILURE_EVENT, 1630 WMI_TAG_RX_AGGR_FAILURE_INFO, 1631 WMI_TAG_VDEV_ENCRYPT_DECRYPT_DATA_REQ_CMD, 1632 WMI_TAG_VDEV_ENCRYPT_DECRYPT_DATA_RESP_EVENT, 1633 WMI_TAG_PDEV_BAND_TO_MAC, 1634 WMI_TAG_TBTT_OFFSET_INFO, 1635 WMI_TAG_TBTT_OFFSET_EXT_EVENT, 1636 WMI_TAG_SAR_LIMITS_CMD, 1637 WMI_TAG_SAR_LIMIT_CMD_ROW, 1638 WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMD, 1639 WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_DISABLE_CMD, 1640 WMI_TAG_VDEV_ADFS_CH_CFG_CMD, 1641 WMI_TAG_VDEV_ADFS_OCAC_ABORT_CMD, 1642 WMI_TAG_PDEV_DFS_RADAR_DETECTION_EVENT, 1643 WMI_TAG_VDEV_ADFS_OCAC_COMPLETE_EVENT, 1644 WMI_TAG_VDEV_DFS_CAC_COMPLETE_EVENT, 1645 WMI_TAG_VENDOR_OUI, 1646 WMI_TAG_REQUEST_RCPI_CMD, 1647 WMI_TAG_UPDATE_RCPI_EVENT, 1648 WMI_TAG_REQUEST_PEER_STATS_INFO_CMD, 1649 WMI_TAG_PEER_STATS_INFO, 1650 WMI_TAG_PEER_STATS_INFO_EVENT, 1651 WMI_TAG_PKGID_EVENT, 1652 WMI_TAG_CONNECTED_NLO_RSSI_PARAMS, 1653 WMI_TAG_SET_CURRENT_COUNTRY_CMD, 1654 WMI_TAG_REGULATORY_RULE_STRUCT, 1655 WMI_TAG_REG_CHAN_LIST_CC_EVENT, 1656 WMI_TAG_11D_SCAN_START_CMD, 1657 WMI_TAG_11D_SCAN_STOP_CMD, 1658 WMI_TAG_11D_NEW_COUNTRY_EVENT, 1659 WMI_TAG_REQUEST_RADIO_CHAN_STATS_CMD, 1660 WMI_TAG_RADIO_CHAN_STATS, 1661 WMI_TAG_RADIO_CHAN_STATS_EVENT, 1662 WMI_TAG_ROAM_PER_CONFIG, 1663 WMI_TAG_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_CMD, 1664 WMI_TAG_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_STATUS_EVENT, 1665 WMI_TAG_BPF_SET_VDEV_ACTIVE_MODE_CMD, 1666 WMI_TAG_HW_DATA_FILTER_CMD, 1667 WMI_TAG_CONNECTED_NLO_BSS_BAND_RSSI_PREF, 1668 WMI_TAG_PEER_OPER_MODE_CHANGE_EVENT, 1669 WMI_TAG_CHIP_POWER_SAVE_FAILURE_DETECTED, 1670 WMI_TAG_PDEV_MULTIPLE_VDEV_RESTART_REQUEST_CMD, 1671 WMI_TAG_PDEV_CSA_SWITCH_COUNT_STATUS_EVENT, 1672 WMI_TAG_PDEV_UPDATE_PKT_ROUTING_CMD, 1673 WMI_TAG_PDEV_CHECK_CAL_VERSION_CMD, 1674 WMI_TAG_PDEV_CHECK_CAL_VERSION_EVENT, 1675 WMI_TAG_PDEV_SET_DIVERSITY_GAIN_CMD, 1676 WMI_TAG_MAC_PHY_CHAINMASK_COMBO, 1677 WMI_TAG_MAC_PHY_CHAINMASK_CAPABILITY, 1678 WMI_TAG_VDEV_SET_ARP_STATS_CMD, 1679 WMI_TAG_VDEV_GET_ARP_STATS_CMD, 1680 WMI_TAG_VDEV_GET_ARP_STATS_EVENT, 1681 WMI_TAG_IFACE_OFFLOAD_STATS, 1682 WMI_TAG_REQUEST_STATS_CMD_SUB_STRUCT_PARAM, 1683 WMI_TAG_RSSI_CTL_EXT, 1684 WMI_TAG_SINGLE_PHYERR_EXT_RX_HDR, 1685 WMI_TAG_COEX_BT_ACTIVITY_EVENT, 1686 WMI_TAG_VDEV_GET_TX_POWER_CMD, 1687 WMI_TAG_VDEV_TX_POWER_EVENT, 1688 WMI_TAG_OFFCHAN_DATA_TX_COMPL_EVENT, 1689 WMI_TAG_OFFCHAN_DATA_TX_SEND_CMD, 1690 WMI_TAG_TX_SEND_PARAMS, 1691 WMI_TAG_HE_RATE_SET, 1692 WMI_TAG_CONGESTION_STATS, 1693 WMI_TAG_SET_INIT_COUNTRY_CMD, 1694 WMI_TAG_SCAN_DBS_DUTY_CYCLE, 1695 WMI_TAG_SCAN_DBS_DUTY_CYCLE_PARAM_TLV, 1696 WMI_TAG_PDEV_DIV_GET_RSSI_ANTID, 1697 WMI_TAG_THERM_THROT_CONFIG_REQUEST, 1698 WMI_TAG_THERM_THROT_LEVEL_CONFIG_INFO, 1699 WMI_TAG_THERM_THROT_STATS_EVENT, 1700 WMI_TAG_THERM_THROT_LEVEL_STATS_INFO, 1701 WMI_TAG_PDEV_DIV_RSSI_ANTID_EVENT, 1702 WMI_TAG_OEM_DMA_RING_CAPABILITIES, 1703 WMI_TAG_OEM_DMA_RING_CFG_REQ, 1704 WMI_TAG_OEM_DMA_RING_CFG_RSP, 1705 WMI_TAG_OEM_INDIRECT_DATA, 1706 WMI_TAG_OEM_DMA_BUF_RELEASE, 1707 WMI_TAG_OEM_DMA_BUF_RELEASE_ENTRY, 1708 WMI_TAG_PDEV_BSS_CHAN_INFO_REQUEST, 1709 WMI_TAG_PDEV_BSS_CHAN_INFO_EVENT, 1710 WMI_TAG_ROAM_LCA_DISALLOW_CONFIG, 1711 WMI_TAG_VDEV_LIMIT_OFFCHAN_CMD, 1712 WMI_TAG_ROAM_RSSI_REJECTION_OCE_CONFIG, 1713 WMI_TAG_UNIT_TEST_EVENT, 1714 WMI_TAG_ROAM_FILS_OFFLOAD, 1715 WMI_TAG_PDEV_UPDATE_PMK_CACHE_CMD, 1716 WMI_TAG_PMK_CACHE, 1717 WMI_TAG_PDEV_UPDATE_FILS_HLP_PKT_CMD, 1718 WMI_TAG_ROAM_FILS_SYNCH, 1719 WMI_TAG_GTK_OFFLOAD_EXTENDED, 1720 WMI_TAG_ROAM_BG_SCAN_ROAMING, 1721 WMI_TAG_OIC_PING_OFFLOAD_PARAMS_CMD, 1722 WMI_TAG_OIC_PING_OFFLOAD_SET_ENABLE_CMD, 1723 WMI_TAG_OIC_PING_HANDOFF_EVENT, 1724 WMI_TAG_DHCP_LEASE_RENEW_OFFLOAD_CMD, 1725 WMI_TAG_DHCP_LEASE_RENEW_EVENT, 1726 WMI_TAG_BTM_CONFIG, 1727 WMI_TAG_DEBUG_MESG_FW_DATA_STALL, 1728 WMI_TAG_WLM_CONFIG_CMD, 1729 WMI_TAG_PDEV_UPDATE_CTLTABLE_REQUEST, 1730 WMI_TAG_PDEV_UPDATE_CTLTABLE_EVENT, 1731 WMI_TAG_ROAM_CND_SCORING_PARAM, 1732 WMI_TAG_PDEV_CONFIG_VENDOR_OUI_ACTION, 1733 WMI_TAG_VENDOR_OUI_EXT, 1734 WMI_TAG_ROAM_SYNCH_FRAME_EVENT, 1735 WMI_TAG_FD_SEND_FROM_HOST_CMD, 1736 WMI_TAG_ENABLE_FILS_CMD, 1737 WMI_TAG_HOST_SWFDA_EVENT, 1738 WMI_TAG_BCN_OFFLOAD_CTRL_CMD, 1739 WMI_TAG_PDEV_SET_AC_TX_QUEUE_OPTIMIZED_CMD, 1740 WMI_TAG_STATS_PERIOD, 1741 WMI_TAG_NDL_SCHEDULE_UPDATE, 1742 WMI_TAG_PEER_TID_MSDUQ_QDEPTH_THRESH_UPDATE_CMD, 1743 WMI_TAG_MSDUQ_QDEPTH_THRESH_UPDATE, 1744 WMI_TAG_PDEV_SET_RX_FILTER_PROMISCUOUS_CMD, 1745 WMI_TAG_SAR2_RESULT_EVENT, 1746 WMI_TAG_SAR_CAPABILITIES, 1747 WMI_TAG_SAP_OBSS_DETECTION_CFG_CMD, 1748 WMI_TAG_SAP_OBSS_DETECTION_INFO_EVT, 1749 WMI_TAG_DMA_RING_CAPABILITIES, 1750 WMI_TAG_DMA_RING_CFG_REQ, 1751 WMI_TAG_DMA_RING_CFG_RSP, 1752 WMI_TAG_DMA_BUF_RELEASE, 1753 WMI_TAG_DMA_BUF_RELEASE_ENTRY, 1754 WMI_TAG_SAR_GET_LIMITS_CMD, 1755 WMI_TAG_SAR_GET_LIMITS_EVENT, 1756 WMI_TAG_SAR_GET_LIMITS_EVENT_ROW, 1757 WMI_TAG_OFFLOAD_11K_REPORT, 1758 WMI_TAG_INVOKE_NEIGHBOR_REPORT, 1759 WMI_TAG_NEIGHBOR_REPORT_OFFLOAD, 1760 WMI_TAG_VDEV_SET_CONNECTIVITY_CHECK_STATS, 1761 WMI_TAG_VDEV_GET_CONNECTIVITY_CHECK_STATS, 1762 WMI_TAG_BPF_SET_VDEV_ENABLE_CMD, 1763 WMI_TAG_BPF_SET_VDEV_WORK_MEMORY_CMD, 1764 WMI_TAG_BPF_GET_VDEV_WORK_MEMORY_CMD, 1765 WMI_TAG_BPF_GET_VDEV_WORK_MEMORY_RESP_EVT, 1766 WMI_TAG_PDEV_GET_NFCAL_POWER, 1767 WMI_TAG_BSS_COLOR_CHANGE_ENABLE, 1768 WMI_TAG_OBSS_COLOR_COLLISION_DET_CONFIG, 1769 WMI_TAG_OBSS_COLOR_COLLISION_EVT, 1770 WMI_TAG_RUNTIME_DPD_RECAL_CMD, 1771 WMI_TAG_TWT_ENABLE_CMD, 1772 WMI_TAG_TWT_DISABLE_CMD, 1773 WMI_TAG_TWT_ADD_DIALOG_CMD, 1774 WMI_TAG_TWT_DEL_DIALOG_CMD, 1775 WMI_TAG_TWT_PAUSE_DIALOG_CMD, 1776 WMI_TAG_TWT_RESUME_DIALOG_CMD, 1777 WMI_TAG_TWT_ENABLE_COMPLETE_EVENT, 1778 WMI_TAG_TWT_DISABLE_COMPLETE_EVENT, 1779 WMI_TAG_TWT_ADD_DIALOG_COMPLETE_EVENT, 1780 WMI_TAG_TWT_DEL_DIALOG_COMPLETE_EVENT, 1781 WMI_TAG_TWT_PAUSE_DIALOG_COMPLETE_EVENT, 1782 WMI_TAG_TWT_RESUME_DIALOG_COMPLETE_EVENT, 1783 WMI_TAG_REQUEST_ROAM_SCAN_STATS_CMD, 1784 WMI_TAG_ROAM_SCAN_STATS_EVENT, 1785 WMI_TAG_PEER_TID_CONFIGURATIONS_CMD, 1786 WMI_TAG_VDEV_SET_CUSTOM_SW_RETRY_TH_CMD, 1787 WMI_TAG_GET_TPC_POWER_CMD, 1788 WMI_TAG_GET_TPC_POWER_EVENT, 1789 WMI_TAG_DMA_BUF_RELEASE_SPECTRAL_META_DATA, 1790 WMI_TAG_MOTION_DET_CONFIG_PARAMS_CMD, 1791 WMI_TAG_MOTION_DET_BASE_LINE_CONFIG_PARAMS_CMD, 1792 WMI_TAG_MOTION_DET_START_STOP_CMD, 1793 WMI_TAG_MOTION_DET_BASE_LINE_START_STOP_CMD, 1794 WMI_TAG_MOTION_DET_EVENT, 1795 WMI_TAG_MOTION_DET_BASE_LINE_EVENT, 1796 WMI_TAG_NDP_TRANSPORT_IP, 1797 WMI_TAG_OBSS_SPATIAL_REUSE_SET_CMD, 1798 WMI_TAG_ESP_ESTIMATE_EVENT, 1799 WMI_TAG_NAN_HOST_CONFIG, 1800 WMI_TAG_SPECTRAL_BIN_SCALING_PARAMS, 1801 WMI_TAG_PEER_CFR_CAPTURE_CMD, 1802 WMI_TAG_PEER_CHAN_WIDTH_SWITCH_CMD, 1803 WMI_TAG_CHAN_WIDTH_PEER_LIST, 1804 WMI_TAG_OBSS_SPATIAL_REUSE_SET_DEF_OBSS_THRESH_CMD, 1805 WMI_TAG_PDEV_HE_TB_ACTION_FRM_CMD, 1806 WMI_TAG_PEER_EXTD2_STATS, 1807 WMI_TAG_HPCS_PULSE_START_CMD, 1808 WMI_TAG_PDEV_CTL_FAILSAFE_CHECK_EVENT, 1809 WMI_TAG_VDEV_CHAINMASK_CONFIG_CMD, 1810 WMI_TAG_VDEV_BCN_OFFLOAD_QUIET_CONFIG_CMD, 1811 WMI_TAG_NAN_EVENT_INFO, 1812 WMI_TAG_NDP_CHANNEL_INFO, 1813 WMI_TAG_NDP_CMD, 1814 WMI_TAG_NDP_EVENT, 1815 /* TODO add all the missing cmds */ 1816 WMI_TAG_PDEV_PEER_PKTLOG_FILTER_CMD = 0x301, 1817 WMI_TAG_PDEV_PEER_PKTLOG_FILTER_INFO, 1818 WMI_TAG_FILS_DISCOVERY_TMPL_CMD = 0x344, 1819 WMI_TAG_MAX 1820 }; 1821 1822 enum wmi_tlv_service { 1823 WMI_TLV_SERVICE_BEACON_OFFLOAD = 0, 1824 WMI_TLV_SERVICE_SCAN_OFFLOAD = 1, 1825 WMI_TLV_SERVICE_ROAM_SCAN_OFFLOAD = 2, 1826 WMI_TLV_SERVICE_BCN_MISS_OFFLOAD = 3, 1827 WMI_TLV_SERVICE_STA_PWRSAVE = 4, 1828 WMI_TLV_SERVICE_STA_ADVANCED_PWRSAVE = 5, 1829 WMI_TLV_SERVICE_AP_UAPSD = 6, 1830 WMI_TLV_SERVICE_AP_DFS = 7, 1831 WMI_TLV_SERVICE_11AC = 8, 1832 WMI_TLV_SERVICE_BLOCKACK = 9, 1833 WMI_TLV_SERVICE_PHYERR = 10, 1834 WMI_TLV_SERVICE_BCN_FILTER = 11, 1835 WMI_TLV_SERVICE_RTT = 12, 1836 WMI_TLV_SERVICE_WOW = 13, 1837 WMI_TLV_SERVICE_RATECTRL_CACHE = 14, 1838 WMI_TLV_SERVICE_IRAM_TIDS = 15, 1839 WMI_TLV_SERVICE_ARPNS_OFFLOAD = 16, 1840 WMI_TLV_SERVICE_NLO = 17, 1841 WMI_TLV_SERVICE_GTK_OFFLOAD = 18, 1842 WMI_TLV_SERVICE_SCAN_SCH = 19, 1843 WMI_TLV_SERVICE_CSA_OFFLOAD = 20, 1844 WMI_TLV_SERVICE_CHATTER = 21, 1845 WMI_TLV_SERVICE_COEX_FREQAVOID = 22, 1846 WMI_TLV_SERVICE_PACKET_POWER_SAVE = 23, 1847 WMI_TLV_SERVICE_FORCE_FW_HANG = 24, 1848 WMI_TLV_SERVICE_GPIO = 25, 1849 WMI_TLV_SERVICE_STA_DTIM_PS_MODULATED_DTIM = 26, 1850 WMI_STA_UAPSD_BASIC_AUTO_TRIG = 27, 1851 WMI_STA_UAPSD_VAR_AUTO_TRIG = 28, 1852 WMI_TLV_SERVICE_STA_KEEP_ALIVE = 29, 1853 WMI_TLV_SERVICE_TX_ENCAP = 30, 1854 WMI_TLV_SERVICE_AP_PS_DETECT_OUT_OF_SYNC = 31, 1855 WMI_TLV_SERVICE_EARLY_RX = 32, 1856 WMI_TLV_SERVICE_STA_SMPS = 33, 1857 WMI_TLV_SERVICE_FWTEST = 34, 1858 WMI_TLV_SERVICE_STA_WMMAC = 35, 1859 WMI_TLV_SERVICE_TDLS = 36, 1860 WMI_TLV_SERVICE_BURST = 37, 1861 WMI_TLV_SERVICE_MCC_BCN_INTERVAL_CHANGE = 38, 1862 WMI_TLV_SERVICE_ADAPTIVE_OCS = 39, 1863 WMI_TLV_SERVICE_BA_SSN_SUPPORT = 40, 1864 WMI_TLV_SERVICE_FILTER_IPSEC_NATKEEPALIVE = 41, 1865 WMI_TLV_SERVICE_WLAN_HB = 42, 1866 WMI_TLV_SERVICE_LTE_ANT_SHARE_SUPPORT = 43, 1867 WMI_TLV_SERVICE_BATCH_SCAN = 44, 1868 WMI_TLV_SERVICE_QPOWER = 45, 1869 WMI_TLV_SERVICE_PLMREQ = 46, 1870 WMI_TLV_SERVICE_THERMAL_MGMT = 47, 1871 WMI_TLV_SERVICE_RMC = 48, 1872 WMI_TLV_SERVICE_MHF_OFFLOAD = 49, 1873 WMI_TLV_SERVICE_COEX_SAR = 50, 1874 WMI_TLV_SERVICE_BCN_TXRATE_OVERRIDE = 51, 1875 WMI_TLV_SERVICE_NAN = 52, 1876 WMI_TLV_SERVICE_L1SS_STAT = 53, 1877 WMI_TLV_SERVICE_ESTIMATE_LINKSPEED = 54, 1878 WMI_TLV_SERVICE_OBSS_SCAN = 55, 1879 WMI_TLV_SERVICE_TDLS_OFFCHAN = 56, 1880 WMI_TLV_SERVICE_TDLS_UAPSD_BUFFER_STA = 57, 1881 WMI_TLV_SERVICE_TDLS_UAPSD_SLEEP_STA = 58, 1882 WMI_TLV_SERVICE_IBSS_PWRSAVE = 59, 1883 WMI_TLV_SERVICE_LPASS = 60, 1884 WMI_TLV_SERVICE_EXTSCAN = 61, 1885 WMI_TLV_SERVICE_D0WOW = 62, 1886 WMI_TLV_SERVICE_HSOFFLOAD = 63, 1887 WMI_TLV_SERVICE_ROAM_HO_OFFLOAD = 64, 1888 WMI_TLV_SERVICE_RX_FULL_REORDER = 65, 1889 WMI_TLV_SERVICE_DHCP_OFFLOAD = 66, 1890 WMI_TLV_SERVICE_STA_RX_IPA_OFFLOAD_SUPPORT = 67, 1891 WMI_TLV_SERVICE_MDNS_OFFLOAD = 68, 1892 WMI_TLV_SERVICE_SAP_AUTH_OFFLOAD = 69, 1893 WMI_TLV_SERVICE_DUAL_BAND_SIMULTANEOUS_SUPPORT = 70, 1894 WMI_TLV_SERVICE_OCB = 71, 1895 WMI_TLV_SERVICE_AP_ARPNS_OFFLOAD = 72, 1896 WMI_TLV_SERVICE_PER_BAND_CHAINMASK_SUPPORT = 73, 1897 WMI_TLV_SERVICE_PACKET_FILTER_OFFLOAD = 74, 1898 WMI_TLV_SERVICE_MGMT_TX_HTT = 75, 1899 WMI_TLV_SERVICE_MGMT_TX_WMI = 76, 1900 WMI_TLV_SERVICE_EXT_MSG = 77, 1901 WMI_TLV_SERVICE_MAWC = 78, 1902 WMI_TLV_SERVICE_PEER_ASSOC_CONF = 79, 1903 WMI_TLV_SERVICE_EGAP = 80, 1904 WMI_TLV_SERVICE_STA_PMF_OFFLOAD = 81, 1905 WMI_TLV_SERVICE_UNIFIED_WOW_CAPABILITY = 82, 1906 WMI_TLV_SERVICE_ENHANCED_PROXY_STA = 83, 1907 WMI_TLV_SERVICE_ATF = 84, 1908 WMI_TLV_SERVICE_COEX_GPIO = 85, 1909 WMI_TLV_SERVICE_AUX_SPECTRAL_INTF = 86, 1910 WMI_TLV_SERVICE_AUX_CHAN_LOAD_INTF = 87, 1911 WMI_TLV_SERVICE_BSS_CHANNEL_INFO_64 = 88, 1912 WMI_TLV_SERVICE_ENTERPRISE_MESH = 89, 1913 WMI_TLV_SERVICE_RESTRT_CHNL_SUPPORT = 90, 1914 WMI_TLV_SERVICE_BPF_OFFLOAD = 91, 1915 WMI_TLV_SERVICE_SYNC_DELETE_CMDS = 92, 1916 WMI_TLV_SERVICE_SMART_ANTENNA_SW_SUPPORT = 93, 1917 WMI_TLV_SERVICE_SMART_ANTENNA_HW_SUPPORT = 94, 1918 WMI_TLV_SERVICE_RATECTRL_LIMIT_MAX_MIN_RATES = 95, 1919 WMI_TLV_SERVICE_NAN_DATA = 96, 1920 WMI_TLV_SERVICE_NAN_RTT = 97, 1921 WMI_TLV_SERVICE_11AX = 98, 1922 WMI_TLV_SERVICE_DEPRECATED_REPLACE = 99, 1923 WMI_TLV_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE = 100, 1924 WMI_TLV_SERVICE_ENHANCED_MCAST_FILTER = 101, 1925 WMI_TLV_SERVICE_PERIODIC_CHAN_STAT_SUPPORT = 102, 1926 WMI_TLV_SERVICE_MESH_11S = 103, 1927 WMI_TLV_SERVICE_HALF_RATE_QUARTER_RATE_SUPPORT = 104, 1928 WMI_TLV_SERVICE_VDEV_RX_FILTER = 105, 1929 WMI_TLV_SERVICE_P2P_LISTEN_OFFLOAD_SUPPORT = 106, 1930 WMI_TLV_SERVICE_MARK_FIRST_WAKEUP_PACKET = 107, 1931 WMI_TLV_SERVICE_MULTIPLE_MCAST_FILTER_SET = 108, 1932 WMI_TLV_SERVICE_HOST_MANAGED_RX_REORDER = 109, 1933 WMI_TLV_SERVICE_FLASH_RDWR_SUPPORT = 110, 1934 WMI_TLV_SERVICE_WLAN_STATS_REPORT = 111, 1935 WMI_TLV_SERVICE_TX_MSDU_ID_NEW_PARTITION_SUPPORT = 112, 1936 WMI_TLV_SERVICE_DFS_PHYERR_OFFLOAD = 113, 1937 WMI_TLV_SERVICE_RCPI_SUPPORT = 114, 1938 WMI_TLV_SERVICE_FW_MEM_DUMP_SUPPORT = 115, 1939 WMI_TLV_SERVICE_PEER_STATS_INFO = 116, 1940 WMI_TLV_SERVICE_REGULATORY_DB = 117, 1941 WMI_TLV_SERVICE_11D_OFFLOAD = 118, 1942 WMI_TLV_SERVICE_HW_DATA_FILTERING = 119, 1943 WMI_TLV_SERVICE_MULTIPLE_VDEV_RESTART = 120, 1944 WMI_TLV_SERVICE_PKT_ROUTING = 121, 1945 WMI_TLV_SERVICE_CHECK_CAL_VERSION = 122, 1946 WMI_TLV_SERVICE_OFFCHAN_TX_WMI = 123, 1947 WMI_TLV_SERVICE_8SS_TX_BFEE = 124, 1948 WMI_TLV_SERVICE_EXTENDED_NSS_SUPPORT = 125, 1949 WMI_TLV_SERVICE_ACK_TIMEOUT = 126, 1950 WMI_TLV_SERVICE_PDEV_BSS_CHANNEL_INFO_64 = 127, 1951 1952 WMI_MAX_SERVICE = 128, 1953 1954 WMI_TLV_SERVICE_CHAN_LOAD_INFO = 128, 1955 WMI_TLV_SERVICE_TX_PPDU_INFO_STATS_SUPPORT = 129, 1956 WMI_TLV_SERVICE_VDEV_LIMIT_OFFCHAN_SUPPORT = 130, 1957 WMI_TLV_SERVICE_FILS_SUPPORT = 131, 1958 WMI_TLV_SERVICE_WLAN_OIC_PING_OFFLOAD = 132, 1959 WMI_TLV_SERVICE_WLAN_DHCP_RENEW = 133, 1960 WMI_TLV_SERVICE_MAWC_SUPPORT = 134, 1961 WMI_TLV_SERVICE_VDEV_LATENCY_CONFIG = 135, 1962 WMI_TLV_SERVICE_PDEV_UPDATE_CTLTABLE_SUPPORT = 136, 1963 WMI_TLV_SERVICE_PKTLOG_SUPPORT_OVER_HTT = 137, 1964 WMI_TLV_SERVICE_VDEV_MULTI_GROUP_KEY_SUPPORT = 138, 1965 WMI_TLV_SERVICE_SCAN_PHYMODE_SUPPORT = 139, 1966 WMI_TLV_SERVICE_THERM_THROT = 140, 1967 WMI_TLV_SERVICE_BCN_OFFLOAD_START_STOP_SUPPORT = 141, 1968 WMI_TLV_SERVICE_WOW_WAKEUP_BY_TIMER_PATTERN = 142, 1969 WMI_TLV_SERVICE_PEER_MAP_UNMAP_V2_SUPPORT = 143, 1970 WMI_TLV_SERVICE_OFFCHAN_DATA_TID_SUPPORT = 144, 1971 WMI_TLV_SERVICE_RX_PROMISC_ENABLE_SUPPORT = 145, 1972 WMI_TLV_SERVICE_SUPPORT_DIRECT_DMA = 146, 1973 WMI_TLV_SERVICE_AP_OBSS_DETECTION_OFFLOAD = 147, 1974 WMI_TLV_SERVICE_11K_NEIGHBOUR_REPORT_SUPPORT = 148, 1975 WMI_TLV_SERVICE_LISTEN_INTERVAL_OFFLOAD_SUPPORT = 149, 1976 WMI_TLV_SERVICE_BSS_COLOR_OFFLOAD = 150, 1977 WMI_TLV_SERVICE_RUNTIME_DPD_RECAL = 151, 1978 WMI_TLV_SERVICE_STA_TWT = 152, 1979 WMI_TLV_SERVICE_AP_TWT = 153, 1980 WMI_TLV_SERVICE_GMAC_OFFLOAD_SUPPORT = 154, 1981 WMI_TLV_SERVICE_SPOOF_MAC_SUPPORT = 155, 1982 WMI_TLV_SERVICE_PEER_TID_CONFIGS_SUPPORT = 156, 1983 WMI_TLV_SERVICE_VDEV_SWRETRY_PER_AC_CONFIG_SUPPORT = 157, 1984 WMI_TLV_SERVICE_DUAL_BEACON_ON_SINGLE_MAC_SCC_SUPPORT = 158, 1985 WMI_TLV_SERVICE_DUAL_BEACON_ON_SINGLE_MAC_MCC_SUPPORT = 159, 1986 WMI_TLV_SERVICE_MOTION_DET = 160, 1987 WMI_TLV_SERVICE_INFRA_MBSSID = 161, 1988 WMI_TLV_SERVICE_OBSS_SPATIAL_REUSE = 162, 1989 WMI_TLV_SERVICE_VDEV_DIFFERENT_BEACON_INTERVAL_SUPPORT = 163, 1990 WMI_TLV_SERVICE_NAN_DBS_SUPPORT = 164, 1991 WMI_TLV_SERVICE_NDI_DBS_SUPPORT = 165, 1992 WMI_TLV_SERVICE_NAN_SAP_SUPPORT = 166, 1993 WMI_TLV_SERVICE_NDI_SAP_SUPPORT = 167, 1994 WMI_TLV_SERVICE_CFR_CAPTURE_SUPPORT = 168, 1995 WMI_TLV_SERVICE_CFR_CAPTURE_IND_MSG_TYPE_1 = 169, 1996 WMI_TLV_SERVICE_ESP_SUPPORT = 170, 1997 WMI_TLV_SERVICE_PEER_CHWIDTH_CHANGE = 171, 1998 WMI_TLV_SERVICE_WLAN_HPCS_PULSE = 172, 1999 WMI_TLV_SERVICE_PER_VDEV_CHAINMASK_CONFIG_SUPPORT = 173, 2000 WMI_TLV_SERVICE_TX_DATA_MGMT_ACK_RSSI = 174, 2001 WMI_TLV_SERVICE_NAN_DISABLE_SUPPORT = 175, 2002 WMI_TLV_SERVICE_HTT_H2T_NO_HTC_HDR_LEN_IN_MSG_LEN = 176, 2003 WMI_TLV_SERVICE_COEX_SUPPORT_UNEQUAL_ISOLATION = 177, 2004 WMI_TLV_SERVICE_HW_DB2DBM_CONVERSION_SUPPORT = 178, 2005 WMI_TLV_SERVICE_SUPPORT_EXTEND_ADDRESS = 179, 2006 WMI_TLV_SERVICE_BEACON_RECEPTION_STATS = 180, 2007 WMI_TLV_SERVICE_FETCH_TX_PN = 181, 2008 WMI_TLV_SERVICE_PEER_UNMAP_RESPONSE_SUPPORT = 182, 2009 WMI_TLV_SERVICE_TX_PER_PEER_AMPDU_SIZE = 183, 2010 WMI_TLV_SERVICE_BSS_COLOR_SWITCH_COUNT = 184, 2011 WMI_TLV_SERVICE_HTT_PEER_STATS_SUPPORT = 185, 2012 WMI_TLV_SERVICE_UL_RU26_ALLOWED = 186, 2013 WMI_TLV_SERVICE_GET_MWS_COEX_STATE = 187, 2014 WMI_TLV_SERVICE_GET_MWS_DPWB_STATE = 188, 2015 WMI_TLV_SERVICE_GET_MWS_TDM_STATE = 189, 2016 WMI_TLV_SERVICE_GET_MWS_IDRX_STATE = 190, 2017 WMI_TLV_SERVICE_GET_MWS_ANTENNA_SHARING_STATE = 191, 2018 WMI_TLV_SERVICE_ENHANCED_TPC_CONFIG_EVENT = 192, 2019 WMI_TLV_SERVICE_WLM_STATS_REQUEST = 193, 2020 WMI_TLV_SERVICE_EXT_PEER_TID_CONFIGS_SUPPORT = 194, 2021 WMI_TLV_SERVICE_WPA3_FT_SAE_SUPPORT = 195, 2022 WMI_TLV_SERVICE_WPA3_FT_SUITE_B_SUPPORT = 196, 2023 WMI_TLV_SERVICE_VOW_ENABLE = 197, 2024 WMI_TLV_SERVICE_CFR_CAPTURE_IND_EVT_TYPE_1 = 198, 2025 WMI_TLV_SERVICE_BROADCAST_TWT = 199, 2026 WMI_TLV_SERVICE_RAP_DETECTION_SUPPORT = 200, 2027 WMI_TLV_SERVICE_PS_TDCC = 201, 2028 WMI_TLV_SERVICE_THREE_WAY_COEX_CONFIG_LEGACY = 202, 2029 WMI_TLV_SERVICE_THREE_WAY_COEX_CONFIG_OVERRIDE = 203, 2030 WMI_TLV_SERVICE_TX_PWR_PER_PEER = 204, 2031 WMI_TLV_SERVICE_STA_PLUS_STA_SUPPORT = 205, 2032 WMI_TLV_SERVICE_WPA3_FT_FILS = 206, 2033 WMI_TLV_SERVICE_ADAPTIVE_11R_ROAM = 207, 2034 WMI_TLV_SERVICE_CHAN_RF_CHARACTERIZATION_INFO = 208, 2035 WMI_TLV_SERVICE_FW_IFACE_COMBINATION_SUPPORT = 209, 2036 WMI_TLV_SERVICE_TX_COMPL_TSF64 = 210, 2037 WMI_TLV_SERVICE_DSM_ROAM_FILTER = 211, 2038 WMI_TLV_SERVICE_PACKET_CAPTURE_SUPPORT = 212, 2039 WMI_TLV_SERVICE_PER_PEER_HTT_STATS_RESET = 213, 2040 WMI_TLV_SERVICE_FREQINFO_IN_METADATA = 219, 2041 WMI_TLV_SERVICE_EXT2_MSG = 220, 2042 2043 WMI_MAX_EXT_SERVICE 2044 }; 2045 2046 enum { 2047 WMI_SMPS_FORCED_MODE_NONE = 0, 2048 WMI_SMPS_FORCED_MODE_DISABLED, 2049 WMI_SMPS_FORCED_MODE_STATIC, 2050 WMI_SMPS_FORCED_MODE_DYNAMIC 2051 }; 2052 2053 #define WMI_TPC_CHAINMASK_CONFIG_BAND_2G 0 2054 #define WMI_TPC_CHAINMASK_CONFIG_BAND_5G 1 2055 #define WMI_NUM_SUPPORTED_BAND_MAX 2 2056 2057 #define WMI_PEER_MIMO_PS_STATE 0x1 2058 #define WMI_PEER_AMPDU 0x2 2059 #define WMI_PEER_AUTHORIZE 0x3 2060 #define WMI_PEER_CHWIDTH 0x4 2061 #define WMI_PEER_NSS 0x5 2062 #define WMI_PEER_USE_4ADDR 0x6 2063 #define WMI_PEER_MEMBERSHIP 0x7 2064 #define WMI_PEER_USERPOS 0x8 2065 #define WMI_PEER_CRIT_PROTO_HINT_ENABLED 0x9 2066 #define WMI_PEER_TX_FAIL_CNT_THR 0xA 2067 #define WMI_PEER_SET_HW_RETRY_CTS2S 0xB 2068 #define WMI_PEER_IBSS_ATIM_WINDOW_LENGTH 0xC 2069 #define WMI_PEER_PHYMODE 0xD 2070 #define WMI_PEER_USE_FIXED_PWR 0xE 2071 #define WMI_PEER_PARAM_FIXED_RATE 0xF 2072 #define WMI_PEER_SET_MU_WHITELIST 0x10 2073 #define WMI_PEER_SET_MAX_TX_RATE 0x11 2074 #define WMI_PEER_SET_MIN_TX_RATE 0x12 2075 #define WMI_PEER_SET_DEFAULT_ROUTING 0x13 2076 2077 /* slot time long */ 2078 #define WMI_VDEV_SLOT_TIME_LONG 0x1 2079 /* slot time short */ 2080 #define WMI_VDEV_SLOT_TIME_SHORT 0x2 2081 /* preablbe long */ 2082 #define WMI_VDEV_PREAMBLE_LONG 0x1 2083 /* preablbe short */ 2084 #define WMI_VDEV_PREAMBLE_SHORT 0x2 2085 2086 enum wmi_peer_smps_state { 2087 WMI_PEER_SMPS_PS_NONE = 0x0, 2088 WMI_PEER_SMPS_STATIC = 0x1, 2089 WMI_PEER_SMPS_DYNAMIC = 0x2 2090 }; 2091 2092 enum wmi_peer_chwidth { 2093 WMI_PEER_CHWIDTH_20MHZ = 0, 2094 WMI_PEER_CHWIDTH_40MHZ = 1, 2095 WMI_PEER_CHWIDTH_80MHZ = 2, 2096 WMI_PEER_CHWIDTH_160MHZ = 3, 2097 }; 2098 2099 enum wmi_beacon_gen_mode { 2100 WMI_BEACON_STAGGERED_MODE = 0, 2101 WMI_BEACON_BURST_MODE = 1 2102 }; 2103 2104 enum wmi_direct_buffer_module { 2105 WMI_DIRECT_BUF_SPECTRAL = 0, 2106 WMI_DIRECT_BUF_CFR = 1, 2107 2108 /* keep it last */ 2109 WMI_DIRECT_BUF_MAX 2110 }; 2111 2112 struct wmi_host_pdev_band_to_mac { 2113 u32 pdev_id; 2114 u32 start_freq; 2115 u32 end_freq; 2116 }; 2117 2118 struct ath11k_ppe_threshold { 2119 u32 numss_m1; 2120 u32 ru_bit_mask; 2121 u32 ppet16_ppet8_ru3_ru0[PSOC_HOST_MAX_NUM_SS]; 2122 }; 2123 2124 struct ath11k_service_ext_param { 2125 u32 default_conc_scan_config_bits; 2126 u32 default_fw_config_bits; 2127 struct ath11k_ppe_threshold ppet; 2128 u32 he_cap_info; 2129 u32 mpdu_density; 2130 u32 max_bssid_rx_filters; 2131 u32 num_hw_modes; 2132 u32 num_phy; 2133 }; 2134 2135 struct ath11k_hw_mode_caps { 2136 u32 hw_mode_id; 2137 u32 phy_id_map; 2138 u32 hw_mode_config_type; 2139 }; 2140 2141 #define PSOC_HOST_MAX_PHY_SIZE (3) 2142 #define ATH11K_11B_SUPPORT BIT(0) 2143 #define ATH11K_11G_SUPPORT BIT(1) 2144 #define ATH11K_11A_SUPPORT BIT(2) 2145 #define ATH11K_11N_SUPPORT BIT(3) 2146 #define ATH11K_11AC_SUPPORT BIT(4) 2147 #define ATH11K_11AX_SUPPORT BIT(5) 2148 2149 struct ath11k_hal_reg_capabilities_ext { 2150 u32 phy_id; 2151 u32 eeprom_reg_domain; 2152 u32 eeprom_reg_domain_ext; 2153 u32 regcap1; 2154 u32 regcap2; 2155 u32 wireless_modes; 2156 u32 low_2ghz_chan; 2157 u32 high_2ghz_chan; 2158 u32 low_5ghz_chan; 2159 u32 high_5ghz_chan; 2160 }; 2161 2162 #define WMI_HOST_MAX_PDEV 3 2163 2164 struct wlan_host_mem_chunk { 2165 u32 tlv_header; 2166 u32 req_id; 2167 u32 ptr; 2168 u32 size; 2169 } __packed; 2170 2171 struct wmi_host_mem_chunk { 2172 void *vaddr; 2173 dma_addr_t paddr; 2174 u32 len; 2175 u32 req_id; 2176 }; 2177 2178 struct wmi_init_cmd_param { 2179 u32 tlv_header; 2180 struct target_resource_config *res_cfg; 2181 u8 num_mem_chunks; 2182 struct wmi_host_mem_chunk *mem_chunks; 2183 u32 hw_mode_id; 2184 u32 num_band_to_mac; 2185 struct wmi_host_pdev_band_to_mac band_to_mac[WMI_HOST_MAX_PDEV]; 2186 }; 2187 2188 struct wmi_pdev_band_to_mac { 2189 u32 tlv_header; 2190 u32 pdev_id; 2191 u32 start_freq; 2192 u32 end_freq; 2193 } __packed; 2194 2195 struct wmi_pdev_set_hw_mode_cmd_param { 2196 u32 tlv_header; 2197 u32 pdev_id; 2198 u32 hw_mode_index; 2199 u32 num_band_to_mac; 2200 } __packed; 2201 2202 struct wmi_ppe_threshold { 2203 u32 numss_m1; /** NSS - 1*/ 2204 union { 2205 u32 ru_count; 2206 u32 ru_mask; 2207 } __packed; 2208 u32 ppet16_ppet8_ru3_ru0[WMI_MAX_NUM_SS]; 2209 } __packed; 2210 2211 #define HW_BD_INFO_SIZE 5 2212 2213 struct wmi_abi_version { 2214 u32 abi_version_0; 2215 u32 abi_version_1; 2216 u32 abi_version_ns_0; 2217 u32 abi_version_ns_1; 2218 u32 abi_version_ns_2; 2219 u32 abi_version_ns_3; 2220 } __packed; 2221 2222 struct wmi_init_cmd { 2223 u32 tlv_header; 2224 struct wmi_abi_version host_abi_vers; 2225 u32 num_host_mem_chunks; 2226 } __packed; 2227 2228 struct wmi_resource_config { 2229 u32 tlv_header; 2230 u32 num_vdevs; 2231 u32 num_peers; 2232 u32 num_offload_peers; 2233 u32 num_offload_reorder_buffs; 2234 u32 num_peer_keys; 2235 u32 num_tids; 2236 u32 ast_skid_limit; 2237 u32 tx_chain_mask; 2238 u32 rx_chain_mask; 2239 u32 rx_timeout_pri[4]; 2240 u32 rx_decap_mode; 2241 u32 scan_max_pending_req; 2242 u32 bmiss_offload_max_vdev; 2243 u32 roam_offload_max_vdev; 2244 u32 roam_offload_max_ap_profiles; 2245 u32 num_mcast_groups; 2246 u32 num_mcast_table_elems; 2247 u32 mcast2ucast_mode; 2248 u32 tx_dbg_log_size; 2249 u32 num_wds_entries; 2250 u32 dma_burst_size; 2251 u32 mac_aggr_delim; 2252 u32 rx_skip_defrag_timeout_dup_detection_check; 2253 u32 vow_config; 2254 u32 gtk_offload_max_vdev; 2255 u32 num_msdu_desc; 2256 u32 max_frag_entries; 2257 u32 num_tdls_vdevs; 2258 u32 num_tdls_conn_table_entries; 2259 u32 beacon_tx_offload_max_vdev; 2260 u32 num_multicast_filter_entries; 2261 u32 num_wow_filters; 2262 u32 num_keep_alive_pattern; 2263 u32 keep_alive_pattern_size; 2264 u32 max_tdls_concurrent_sleep_sta; 2265 u32 max_tdls_concurrent_buffer_sta; 2266 u32 wmi_send_separate; 2267 u32 num_ocb_vdevs; 2268 u32 num_ocb_channels; 2269 u32 num_ocb_schedules; 2270 u32 flag1; 2271 u32 smart_ant_cap; 2272 u32 bk_minfree; 2273 u32 be_minfree; 2274 u32 vi_minfree; 2275 u32 vo_minfree; 2276 u32 alloc_frag_desc_for_data_pkt; 2277 u32 num_ns_ext_tuples_cfg; 2278 u32 bpf_instruction_size; 2279 u32 max_bssid_rx_filters; 2280 u32 use_pdev_id; 2281 u32 max_num_dbs_scan_duty_cycle; 2282 u32 max_num_group_keys; 2283 u32 peer_map_unmap_v2_support; 2284 u32 sched_params; 2285 u32 twt_ap_pdev_count; 2286 u32 twt_ap_sta_count; 2287 } __packed; 2288 2289 struct wmi_service_ready_event { 2290 u32 fw_build_vers; 2291 struct wmi_abi_version fw_abi_vers; 2292 u32 phy_capability; 2293 u32 max_frag_entry; 2294 u32 num_rf_chains; 2295 u32 ht_cap_info; 2296 u32 vht_cap_info; 2297 u32 vht_supp_mcs; 2298 u32 hw_min_tx_power; 2299 u32 hw_max_tx_power; 2300 u32 sys_cap_info; 2301 u32 min_pkt_size_enable; 2302 u32 max_bcn_ie_size; 2303 u32 num_mem_reqs; 2304 u32 max_num_scan_channels; 2305 u32 hw_bd_id; 2306 u32 hw_bd_info[HW_BD_INFO_SIZE]; 2307 u32 max_supported_macs; 2308 u32 wmi_fw_sub_feat_caps; 2309 u32 num_dbs_hw_modes; 2310 /* txrx_chainmask 2311 * [7:0] - 2G band tx chain mask 2312 * [15:8] - 2G band rx chain mask 2313 * [23:16] - 5G band tx chain mask 2314 * [31:24] - 5G band rx chain mask 2315 */ 2316 u32 txrx_chainmask; 2317 u32 default_dbs_hw_mode_index; 2318 u32 num_msdu_desc; 2319 } __packed; 2320 2321 #define WMI_SERVICE_BM_SIZE ((WMI_MAX_SERVICE + sizeof(u32) - 1) / sizeof(u32)) 2322 2323 #define WMI_SERVICE_SEGMENT_BM_SIZE32 4 /* 4x u32 = 128 bits */ 2324 #define WMI_SERVICE_EXT_BM_SIZE (WMI_SERVICE_SEGMENT_BM_SIZE32 * sizeof(u32)) 2325 #define WMI_AVAIL_SERVICE_BITS_IN_SIZE32 32 2326 #define WMI_SERVICE_BITS_IN_SIZE32 4 2327 2328 struct wmi_service_ready_ext_event { 2329 u32 default_conc_scan_config_bits; 2330 u32 default_fw_config_bits; 2331 struct wmi_ppe_threshold ppet; 2332 u32 he_cap_info; 2333 u32 mpdu_density; 2334 u32 max_bssid_rx_filters; 2335 u32 fw_build_vers_ext; 2336 u32 max_nlo_ssids; 2337 u32 max_bssid_indicator; 2338 u32 he_cap_info_ext; 2339 } __packed; 2340 2341 struct wmi_soc_mac_phy_hw_mode_caps { 2342 u32 num_hw_modes; 2343 u32 num_chainmask_tables; 2344 } __packed; 2345 2346 struct wmi_hw_mode_capabilities { 2347 u32 tlv_header; 2348 u32 hw_mode_id; 2349 u32 phy_id_map; 2350 u32 hw_mode_config_type; 2351 } __packed; 2352 2353 #define WMI_MAX_HECAP_PHY_SIZE (3) 2354 2355 struct wmi_mac_phy_capabilities { 2356 u32 hw_mode_id; 2357 u32 pdev_id; 2358 u32 phy_id; 2359 u32 supported_flags; 2360 u32 supported_bands; 2361 u32 ampdu_density; 2362 u32 max_bw_supported_2g; 2363 u32 ht_cap_info_2g; 2364 u32 vht_cap_info_2g; 2365 u32 vht_supp_mcs_2g; 2366 u32 he_cap_info_2g; 2367 u32 he_supp_mcs_2g; 2368 u32 tx_chain_mask_2g; 2369 u32 rx_chain_mask_2g; 2370 u32 max_bw_supported_5g; 2371 u32 ht_cap_info_5g; 2372 u32 vht_cap_info_5g; 2373 u32 vht_supp_mcs_5g; 2374 u32 he_cap_info_5g; 2375 u32 he_supp_mcs_5g; 2376 u32 tx_chain_mask_5g; 2377 u32 rx_chain_mask_5g; 2378 u32 he_cap_phy_info_2g[WMI_MAX_HECAP_PHY_SIZE]; 2379 u32 he_cap_phy_info_5g[WMI_MAX_HECAP_PHY_SIZE]; 2380 struct wmi_ppe_threshold he_ppet2g; 2381 struct wmi_ppe_threshold he_ppet5g; 2382 u32 chainmask_table_id; 2383 u32 lmac_id; 2384 u32 he_cap_info_2g_ext; 2385 u32 he_cap_info_5g_ext; 2386 u32 he_cap_info_internal; 2387 } __packed; 2388 2389 struct wmi_hal_reg_capabilities_ext { 2390 u32 tlv_header; 2391 u32 phy_id; 2392 u32 eeprom_reg_domain; 2393 u32 eeprom_reg_domain_ext; 2394 u32 regcap1; 2395 u32 regcap2; 2396 u32 wireless_modes; 2397 u32 low_2ghz_chan; 2398 u32 high_2ghz_chan; 2399 u32 low_5ghz_chan; 2400 u32 high_5ghz_chan; 2401 } __packed; 2402 2403 struct wmi_soc_hal_reg_capabilities { 2404 u32 num_phy; 2405 } __packed; 2406 2407 /* 2 word representation of MAC addr */ 2408 struct wmi_mac_addr { 2409 union { 2410 u8 addr[6]; 2411 struct { 2412 u32 word0; 2413 u32 word1; 2414 } __packed; 2415 } __packed; 2416 } __packed; 2417 2418 struct wmi_dma_ring_capabilities { 2419 u32 tlv_header; 2420 u32 pdev_id; 2421 u32 module_id; 2422 u32 min_elem; 2423 u32 min_buf_sz; 2424 u32 min_buf_align; 2425 } __packed; 2426 2427 struct wmi_ready_event_min { 2428 struct wmi_abi_version fw_abi_vers; 2429 struct wmi_mac_addr mac_addr; 2430 u32 status; 2431 u32 num_dscp_table; 2432 u32 num_extra_mac_addr; 2433 u32 num_total_peers; 2434 u32 num_extra_peers; 2435 } __packed; 2436 2437 struct wmi_ready_event { 2438 struct wmi_ready_event_min ready_event_min; 2439 u32 max_ast_index; 2440 u32 pktlog_defs_checksum; 2441 } __packed; 2442 2443 struct wmi_service_available_event { 2444 u32 wmi_service_segment_offset; 2445 u32 wmi_service_segment_bitmap[WMI_SERVICE_SEGMENT_BM_SIZE32]; 2446 } __packed; 2447 2448 struct ath11k_pdev_wmi { 2449 struct ath11k_wmi_base *wmi_ab; 2450 enum ath11k_htc_ep_id eid; 2451 const struct wmi_peer_flags_map *peer_flags; 2452 u32 rx_decap_mode; 2453 }; 2454 2455 struct vdev_create_params { 2456 u8 if_id; 2457 u32 type; 2458 u32 subtype; 2459 struct { 2460 u8 tx; 2461 u8 rx; 2462 } chains[NUM_NL80211_BANDS]; 2463 u32 pdev_id; 2464 }; 2465 2466 struct wmi_vdev_create_cmd { 2467 u32 tlv_header; 2468 u32 vdev_id; 2469 u32 vdev_type; 2470 u32 vdev_subtype; 2471 struct wmi_mac_addr vdev_macaddr; 2472 u32 num_cfg_txrx_streams; 2473 u32 pdev_id; 2474 } __packed; 2475 2476 struct wmi_vdev_txrx_streams { 2477 u32 tlv_header; 2478 u32 band; 2479 u32 supported_tx_streams; 2480 u32 supported_rx_streams; 2481 } __packed; 2482 2483 struct wmi_vdev_delete_cmd { 2484 u32 tlv_header; 2485 u32 vdev_id; 2486 } __packed; 2487 2488 struct wmi_vdev_up_cmd { 2489 u32 tlv_header; 2490 u32 vdev_id; 2491 u32 vdev_assoc_id; 2492 struct wmi_mac_addr vdev_bssid; 2493 struct wmi_mac_addr trans_bssid; 2494 u32 profile_idx; 2495 u32 profile_num; 2496 } __packed; 2497 2498 struct wmi_vdev_stop_cmd { 2499 u32 tlv_header; 2500 u32 vdev_id; 2501 } __packed; 2502 2503 struct wmi_vdev_down_cmd { 2504 u32 tlv_header; 2505 u32 vdev_id; 2506 } __packed; 2507 2508 #define WMI_VDEV_START_HIDDEN_SSID BIT(0) 2509 #define WMI_VDEV_START_PMF_ENABLED BIT(1) 2510 #define WMI_VDEV_START_LDPC_RX_ENABLED BIT(3) 2511 2512 struct wmi_ssid { 2513 u32 ssid_len; 2514 u32 ssid[8]; 2515 } __packed; 2516 2517 #define ATH11K_VDEV_SETUP_TIMEOUT_HZ (1 * HZ) 2518 2519 struct wmi_vdev_start_request_cmd { 2520 u32 tlv_header; 2521 u32 vdev_id; 2522 u32 requestor_id; 2523 u32 beacon_interval; 2524 u32 dtim_period; 2525 u32 flags; 2526 struct wmi_ssid ssid; 2527 u32 bcn_tx_rate; 2528 u32 bcn_txpower; 2529 u32 num_noa_descriptors; 2530 u32 disable_hw_ack; 2531 u32 preferred_tx_streams; 2532 u32 preferred_rx_streams; 2533 u32 he_ops; 2534 u32 cac_duration_ms; 2535 u32 regdomain; 2536 } __packed; 2537 2538 #define MGMT_TX_DL_FRM_LEN 64 2539 #define WMI_MAC_MAX_SSID_LENGTH 32 2540 struct mac_ssid { 2541 u8 length; 2542 u8 mac_ssid[WMI_MAC_MAX_SSID_LENGTH]; 2543 } __packed; 2544 2545 struct wmi_p2p_noa_descriptor { 2546 u32 type_count; 2547 u32 duration; 2548 u32 interval; 2549 u32 start_time; 2550 }; 2551 2552 struct channel_param { 2553 u8 chan_id; 2554 u8 pwr; 2555 u32 mhz; 2556 u32 half_rate:1, 2557 quarter_rate:1, 2558 dfs_set:1, 2559 dfs_set_cfreq2:1, 2560 is_chan_passive:1, 2561 allow_ht:1, 2562 allow_vht:1, 2563 allow_he:1, 2564 set_agile:1, 2565 psc_channel:1; 2566 u32 phy_mode; 2567 u32 cfreq1; 2568 u32 cfreq2; 2569 char maxpower; 2570 char minpower; 2571 char maxregpower; 2572 u8 antennamax; 2573 u8 reg_class_id; 2574 } __packed; 2575 2576 enum wmi_phy_mode { 2577 MODE_11A = 0, 2578 MODE_11G = 1, /* 11b/g Mode */ 2579 MODE_11B = 2, /* 11b Mode */ 2580 MODE_11GONLY = 3, /* 11g only Mode */ 2581 MODE_11NA_HT20 = 4, 2582 MODE_11NG_HT20 = 5, 2583 MODE_11NA_HT40 = 6, 2584 MODE_11NG_HT40 = 7, 2585 MODE_11AC_VHT20 = 8, 2586 MODE_11AC_VHT40 = 9, 2587 MODE_11AC_VHT80 = 10, 2588 MODE_11AC_VHT20_2G = 11, 2589 MODE_11AC_VHT40_2G = 12, 2590 MODE_11AC_VHT80_2G = 13, 2591 MODE_11AC_VHT80_80 = 14, 2592 MODE_11AC_VHT160 = 15, 2593 MODE_11AX_HE20 = 16, 2594 MODE_11AX_HE40 = 17, 2595 MODE_11AX_HE80 = 18, 2596 MODE_11AX_HE80_80 = 19, 2597 MODE_11AX_HE160 = 20, 2598 MODE_11AX_HE20_2G = 21, 2599 MODE_11AX_HE40_2G = 22, 2600 MODE_11AX_HE80_2G = 23, 2601 MODE_UNKNOWN = 24, 2602 MODE_MAX = 24 2603 }; 2604 2605 static inline const char *ath11k_wmi_phymode_str(enum wmi_phy_mode mode) 2606 { 2607 switch (mode) { 2608 case MODE_11A: 2609 return "11a"; 2610 case MODE_11G: 2611 return "11g"; 2612 case MODE_11B: 2613 return "11b"; 2614 case MODE_11GONLY: 2615 return "11gonly"; 2616 case MODE_11NA_HT20: 2617 return "11na-ht20"; 2618 case MODE_11NG_HT20: 2619 return "11ng-ht20"; 2620 case MODE_11NA_HT40: 2621 return "11na-ht40"; 2622 case MODE_11NG_HT40: 2623 return "11ng-ht40"; 2624 case MODE_11AC_VHT20: 2625 return "11ac-vht20"; 2626 case MODE_11AC_VHT40: 2627 return "11ac-vht40"; 2628 case MODE_11AC_VHT80: 2629 return "11ac-vht80"; 2630 case MODE_11AC_VHT160: 2631 return "11ac-vht160"; 2632 case MODE_11AC_VHT80_80: 2633 return "11ac-vht80+80"; 2634 case MODE_11AC_VHT20_2G: 2635 return "11ac-vht20-2g"; 2636 case MODE_11AC_VHT40_2G: 2637 return "11ac-vht40-2g"; 2638 case MODE_11AC_VHT80_2G: 2639 return "11ac-vht80-2g"; 2640 case MODE_11AX_HE20: 2641 return "11ax-he20"; 2642 case MODE_11AX_HE40: 2643 return "11ax-he40"; 2644 case MODE_11AX_HE80: 2645 return "11ax-he80"; 2646 case MODE_11AX_HE80_80: 2647 return "11ax-he80+80"; 2648 case MODE_11AX_HE160: 2649 return "11ax-he160"; 2650 case MODE_11AX_HE20_2G: 2651 return "11ax-he20-2g"; 2652 case MODE_11AX_HE40_2G: 2653 return "11ax-he40-2g"; 2654 case MODE_11AX_HE80_2G: 2655 return "11ax-he80-2g"; 2656 case MODE_UNKNOWN: 2657 /* skip */ 2658 break; 2659 2660 /* no default handler to allow compiler to check that the 2661 * enum is fully handled 2662 */ 2663 } 2664 2665 return "<unknown>"; 2666 } 2667 2668 struct wmi_channel_arg { 2669 u32 freq; 2670 u32 band_center_freq1; 2671 u32 band_center_freq2; 2672 bool passive; 2673 bool allow_ibss; 2674 bool allow_ht; 2675 bool allow_vht; 2676 bool ht40plus; 2677 bool chan_radar; 2678 bool freq2_radar; 2679 bool allow_he; 2680 u32 min_power; 2681 u32 max_power; 2682 u32 max_reg_power; 2683 u32 max_antenna_gain; 2684 enum wmi_phy_mode mode; 2685 }; 2686 2687 struct wmi_vdev_start_req_arg { 2688 u32 vdev_id; 2689 struct wmi_channel_arg channel; 2690 u32 bcn_intval; 2691 u32 dtim_period; 2692 u8 *ssid; 2693 u32 ssid_len; 2694 u32 bcn_tx_rate; 2695 u32 bcn_tx_power; 2696 bool disable_hw_ack; 2697 bool hidden_ssid; 2698 bool pmf_enabled; 2699 u32 he_ops; 2700 u32 cac_duration_ms; 2701 u32 regdomain; 2702 u32 pref_rx_streams; 2703 u32 pref_tx_streams; 2704 u32 num_noa_descriptors; 2705 }; 2706 2707 struct peer_create_params { 2708 const u8 *peer_addr; 2709 u32 peer_type; 2710 u32 vdev_id; 2711 }; 2712 2713 struct peer_delete_params { 2714 u8 vdev_id; 2715 }; 2716 2717 struct peer_flush_params { 2718 u32 peer_tid_bitmap; 2719 u8 vdev_id; 2720 }; 2721 2722 struct pdev_set_regdomain_params { 2723 u16 current_rd_in_use; 2724 u16 current_rd_2g; 2725 u16 current_rd_5g; 2726 u32 ctl_2g; 2727 u32 ctl_5g; 2728 u8 dfs_domain; 2729 u32 pdev_id; 2730 }; 2731 2732 struct rx_reorder_queue_remove_params { 2733 u8 *peer_macaddr; 2734 u16 vdev_id; 2735 u32 peer_tid_bitmap; 2736 }; 2737 2738 #define WMI_HOST_PDEV_ID_SOC 0xFF 2739 #define WMI_HOST_PDEV_ID_0 0 2740 #define WMI_HOST_PDEV_ID_1 1 2741 #define WMI_HOST_PDEV_ID_2 2 2742 2743 #define WMI_PDEV_ID_SOC 0 2744 #define WMI_PDEV_ID_1ST 1 2745 #define WMI_PDEV_ID_2ND 2 2746 #define WMI_PDEV_ID_3RD 3 2747 2748 /* Freq units in MHz */ 2749 #define REG_RULE_START_FREQ 0x0000ffff 2750 #define REG_RULE_END_FREQ 0xffff0000 2751 #define REG_RULE_FLAGS 0x0000ffff 2752 #define REG_RULE_MAX_BW 0x0000ffff 2753 #define REG_RULE_REG_PWR 0x00ff0000 2754 #define REG_RULE_ANT_GAIN 0xff000000 2755 2756 #define WMI_VDEV_PARAM_TXBF_SU_TX_BFEE BIT(0) 2757 #define WMI_VDEV_PARAM_TXBF_MU_TX_BFEE BIT(1) 2758 #define WMI_VDEV_PARAM_TXBF_SU_TX_BFER BIT(2) 2759 #define WMI_VDEV_PARAM_TXBF_MU_TX_BFER BIT(3) 2760 2761 #define HECAP_PHYDWORD_0 0 2762 #define HECAP_PHYDWORD_1 1 2763 #define HECAP_PHYDWORD_2 2 2764 2765 #define HECAP_PHY_SU_BFER BIT(31) 2766 #define HECAP_PHY_SU_BFEE BIT(0) 2767 #define HECAP_PHY_MU_BFER BIT(1) 2768 #define HECAP_PHY_UL_MUMIMO BIT(22) 2769 #define HECAP_PHY_UL_MUOFDMA BIT(23) 2770 2771 #define HECAP_PHY_SUBFMR_GET(hecap_phy) \ 2772 FIELD_GET(HECAP_PHY_SU_BFER, hecap_phy[HECAP_PHYDWORD_0]) 2773 2774 #define HECAP_PHY_SUBFME_GET(hecap_phy) \ 2775 FIELD_GET(HECAP_PHY_SU_BFEE, hecap_phy[HECAP_PHYDWORD_1]) 2776 2777 #define HECAP_PHY_MUBFMR_GET(hecap_phy) \ 2778 FIELD_GET(HECAP_PHY_MU_BFER, hecap_phy[HECAP_PHYDWORD_1]) 2779 2780 #define HECAP_PHY_ULMUMIMO_GET(hecap_phy) \ 2781 FIELD_GET(HECAP_PHY_UL_MUMIMO, hecap_phy[HECAP_PHYDWORD_0]) 2782 2783 #define HECAP_PHY_ULOFDMA_GET(hecap_phy) \ 2784 FIELD_GET(HECAP_PHY_UL_MUOFDMA, hecap_phy[HECAP_PHYDWORD_0]) 2785 2786 #define HE_MODE_SU_TX_BFEE BIT(0) 2787 #define HE_MODE_SU_TX_BFER BIT(1) 2788 #define HE_MODE_MU_TX_BFEE BIT(2) 2789 #define HE_MODE_MU_TX_BFER BIT(3) 2790 #define HE_MODE_DL_OFDMA BIT(4) 2791 #define HE_MODE_UL_OFDMA BIT(5) 2792 #define HE_MODE_UL_MUMIMO BIT(6) 2793 2794 #define HE_DL_MUOFDMA_ENABLE 1 2795 #define HE_UL_MUOFDMA_ENABLE 1 2796 #define HE_DL_MUMIMO_ENABLE 1 2797 #define HE_MU_BFEE_ENABLE 1 2798 #define HE_SU_BFEE_ENABLE 1 2799 2800 #define HE_VHT_SOUNDING_MODE_ENABLE 1 2801 #define HE_SU_MU_SOUNDING_MODE_ENABLE 1 2802 #define HE_TRIG_NONTRIG_SOUNDING_MODE_ENABLE 1 2803 2804 /* HE or VHT Sounding */ 2805 #define HE_VHT_SOUNDING_MODE BIT(0) 2806 /* SU or MU Sounding */ 2807 #define HE_SU_MU_SOUNDING_MODE BIT(2) 2808 /* Trig or Non-Trig Sounding */ 2809 #define HE_TRIG_NONTRIG_SOUNDING_MODE BIT(3) 2810 2811 #define WMI_TXBF_STS_CAP_OFFSET_LSB 4 2812 #define WMI_TXBF_STS_CAP_OFFSET_MASK 0x70 2813 #define WMI_BF_SOUND_DIM_OFFSET_LSB 8 2814 #define WMI_BF_SOUND_DIM_OFFSET_MASK 0x700 2815 2816 struct pdev_params { 2817 u32 param_id; 2818 u32 param_value; 2819 }; 2820 2821 enum wmi_peer_type { 2822 WMI_PEER_TYPE_DEFAULT = 0, 2823 WMI_PEER_TYPE_BSS = 1, 2824 WMI_PEER_TYPE_TDLS = 2, 2825 }; 2826 2827 struct wmi_peer_create_cmd { 2828 u32 tlv_header; 2829 u32 vdev_id; 2830 struct wmi_mac_addr peer_macaddr; 2831 u32 peer_type; 2832 } __packed; 2833 2834 struct wmi_peer_delete_cmd { 2835 u32 tlv_header; 2836 u32 vdev_id; 2837 struct wmi_mac_addr peer_macaddr; 2838 } __packed; 2839 2840 struct wmi_peer_reorder_queue_setup_cmd { 2841 u32 tlv_header; 2842 u32 vdev_id; 2843 struct wmi_mac_addr peer_macaddr; 2844 u32 tid; 2845 u32 queue_ptr_lo; 2846 u32 queue_ptr_hi; 2847 u32 queue_no; 2848 u32 ba_window_size_valid; 2849 u32 ba_window_size; 2850 } __packed; 2851 2852 struct wmi_peer_reorder_queue_remove_cmd { 2853 u32 tlv_header; 2854 u32 vdev_id; 2855 struct wmi_mac_addr peer_macaddr; 2856 u32 tid_mask; 2857 } __packed; 2858 2859 struct gpio_config_params { 2860 u32 gpio_num; 2861 u32 input; 2862 u32 pull_type; 2863 u32 intr_mode; 2864 }; 2865 2866 enum wmi_gpio_type { 2867 WMI_GPIO_PULL_NONE, 2868 WMI_GPIO_PULL_UP, 2869 WMI_GPIO_PULL_DOWN 2870 }; 2871 2872 enum wmi_gpio_intr_type { 2873 WMI_GPIO_INTTYPE_DISABLE, 2874 WMI_GPIO_INTTYPE_RISING_EDGE, 2875 WMI_GPIO_INTTYPE_FALLING_EDGE, 2876 WMI_GPIO_INTTYPE_BOTH_EDGE, 2877 WMI_GPIO_INTTYPE_LEVEL_LOW, 2878 WMI_GPIO_INTTYPE_LEVEL_HIGH 2879 }; 2880 2881 enum wmi_bss_chan_info_req_type { 2882 WMI_BSS_SURVEY_REQ_TYPE_READ = 1, 2883 WMI_BSS_SURVEY_REQ_TYPE_READ_CLEAR, 2884 }; 2885 2886 struct wmi_gpio_config_cmd_param { 2887 u32 tlv_header; 2888 u32 gpio_num; 2889 u32 input; 2890 u32 pull_type; 2891 u32 intr_mode; 2892 }; 2893 2894 struct gpio_output_params { 2895 u32 gpio_num; 2896 u32 set; 2897 }; 2898 2899 struct wmi_gpio_output_cmd_param { 2900 u32 tlv_header; 2901 u32 gpio_num; 2902 u32 set; 2903 }; 2904 2905 struct set_fwtest_params { 2906 u32 arg; 2907 u32 value; 2908 }; 2909 2910 struct wmi_fwtest_set_param_cmd_param { 2911 u32 tlv_header; 2912 u32 param_id; 2913 u32 param_value; 2914 }; 2915 2916 struct wmi_pdev_set_param_cmd { 2917 u32 tlv_header; 2918 u32 pdev_id; 2919 u32 param_id; 2920 u32 param_value; 2921 } __packed; 2922 2923 struct wmi_pdev_set_ps_mode_cmd { 2924 u32 tlv_header; 2925 u32 vdev_id; 2926 u32 sta_ps_mode; 2927 } __packed; 2928 2929 struct wmi_pdev_suspend_cmd { 2930 u32 tlv_header; 2931 u32 pdev_id; 2932 u32 suspend_opt; 2933 } __packed; 2934 2935 struct wmi_pdev_resume_cmd { 2936 u32 tlv_header; 2937 u32 pdev_id; 2938 } __packed; 2939 2940 struct wmi_pdev_bss_chan_info_req_cmd { 2941 u32 tlv_header; 2942 /* ref wmi_bss_chan_info_req_type */ 2943 u32 req_type; 2944 } __packed; 2945 2946 struct wmi_ap_ps_peer_cmd { 2947 u32 tlv_header; 2948 u32 vdev_id; 2949 struct wmi_mac_addr peer_macaddr; 2950 u32 param; 2951 u32 value; 2952 } __packed; 2953 2954 struct wmi_sta_powersave_param_cmd { 2955 u32 tlv_header; 2956 u32 vdev_id; 2957 u32 param; 2958 u32 value; 2959 } __packed; 2960 2961 struct wmi_pdev_set_regdomain_cmd { 2962 u32 tlv_header; 2963 u32 pdev_id; 2964 u32 reg_domain; 2965 u32 reg_domain_2g; 2966 u32 reg_domain_5g; 2967 u32 conformance_test_limit_2g; 2968 u32 conformance_test_limit_5g; 2969 u32 dfs_domain; 2970 } __packed; 2971 2972 struct wmi_peer_set_param_cmd { 2973 u32 tlv_header; 2974 u32 vdev_id; 2975 struct wmi_mac_addr peer_macaddr; 2976 u32 param_id; 2977 u32 param_value; 2978 } __packed; 2979 2980 struct wmi_peer_flush_tids_cmd { 2981 u32 tlv_header; 2982 u32 vdev_id; 2983 struct wmi_mac_addr peer_macaddr; 2984 u32 peer_tid_bitmap; 2985 } __packed; 2986 2987 struct wmi_dfs_phyerr_offload_cmd { 2988 u32 tlv_header; 2989 u32 pdev_id; 2990 } __packed; 2991 2992 struct wmi_bcn_offload_ctrl_cmd { 2993 u32 tlv_header; 2994 u32 vdev_id; 2995 u32 bcn_ctrl_op; 2996 } __packed; 2997 2998 enum scan_dwelltime_adaptive_mode { 2999 SCAN_DWELL_MODE_DEFAULT = 0, 3000 SCAN_DWELL_MODE_CONSERVATIVE = 1, 3001 SCAN_DWELL_MODE_MODERATE = 2, 3002 SCAN_DWELL_MODE_AGGRESSIVE = 3, 3003 SCAN_DWELL_MODE_STATIC = 4 3004 }; 3005 3006 #define WLAN_SCAN_MAX_NUM_SSID 10 3007 #define WLAN_SCAN_MAX_NUM_BSSID 10 3008 #define WLAN_SCAN_MAX_NUM_CHANNELS 40 3009 3010 #define WLAN_SSID_MAX_LEN 32 3011 3012 struct element_info { 3013 u32 len; 3014 u8 *ptr; 3015 }; 3016 3017 struct wlan_ssid { 3018 u8 length; 3019 u8 ssid[WLAN_SSID_MAX_LEN]; 3020 }; 3021 3022 #define WMI_IE_BITMAP_SIZE 8 3023 3024 #define WMI_SCAN_MAX_NUM_SSID 0x0A 3025 /* prefix used by scan requestor ids on the host */ 3026 #define WMI_HOST_SCAN_REQUESTOR_ID_PREFIX 0xA000 3027 3028 /* prefix used by scan request ids generated on the host */ 3029 /* host cycles through the lower 12 bits to generate ids */ 3030 #define WMI_HOST_SCAN_REQ_ID_PREFIX 0xA000 3031 3032 #define WLAN_SCAN_PARAMS_MAX_SSID 16 3033 #define WLAN_SCAN_PARAMS_MAX_BSSID 4 3034 #define WLAN_SCAN_PARAMS_MAX_IE_LEN 256 3035 3036 /* Values lower than this may be refused by some firmware revisions with a scan 3037 * completion with a timedout reason. 3038 */ 3039 #define WMI_SCAN_CHAN_MIN_TIME_MSEC 40 3040 3041 /* Scan priority numbers must be sequential, starting with 0 */ 3042 enum wmi_scan_priority { 3043 WMI_SCAN_PRIORITY_VERY_LOW = 0, 3044 WMI_SCAN_PRIORITY_LOW, 3045 WMI_SCAN_PRIORITY_MEDIUM, 3046 WMI_SCAN_PRIORITY_HIGH, 3047 WMI_SCAN_PRIORITY_VERY_HIGH, 3048 WMI_SCAN_PRIORITY_COUNT /* number of priorities supported */ 3049 }; 3050 3051 enum wmi_scan_event_type { 3052 WMI_SCAN_EVENT_STARTED = BIT(0), 3053 WMI_SCAN_EVENT_COMPLETED = BIT(1), 3054 WMI_SCAN_EVENT_BSS_CHANNEL = BIT(2), 3055 WMI_SCAN_EVENT_FOREIGN_CHAN = BIT(3), 3056 WMI_SCAN_EVENT_DEQUEUED = BIT(4), 3057 /* possibly by high-prio scan */ 3058 WMI_SCAN_EVENT_PREEMPTED = BIT(5), 3059 WMI_SCAN_EVENT_START_FAILED = BIT(6), 3060 WMI_SCAN_EVENT_RESTARTED = BIT(7), 3061 WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT = BIT(8), 3062 WMI_SCAN_EVENT_SUSPENDED = BIT(9), 3063 WMI_SCAN_EVENT_RESUMED = BIT(10), 3064 WMI_SCAN_EVENT_MAX = BIT(15), 3065 }; 3066 3067 enum wmi_scan_completion_reason { 3068 WMI_SCAN_REASON_COMPLETED, 3069 WMI_SCAN_REASON_CANCELLED, 3070 WMI_SCAN_REASON_PREEMPTED, 3071 WMI_SCAN_REASON_TIMEDOUT, 3072 WMI_SCAN_REASON_INTERNAL_FAILURE, 3073 WMI_SCAN_REASON_MAX, 3074 }; 3075 3076 struct wmi_start_scan_cmd { 3077 u32 tlv_header; 3078 u32 scan_id; 3079 u32 scan_req_id; 3080 u32 vdev_id; 3081 u32 scan_priority; 3082 u32 notify_scan_events; 3083 u32 dwell_time_active; 3084 u32 dwell_time_passive; 3085 u32 min_rest_time; 3086 u32 max_rest_time; 3087 u32 repeat_probe_time; 3088 u32 probe_spacing_time; 3089 u32 idle_time; 3090 u32 max_scan_time; 3091 u32 probe_delay; 3092 u32 scan_ctrl_flags; 3093 u32 burst_duration; 3094 u32 num_chan; 3095 u32 num_bssid; 3096 u32 num_ssids; 3097 u32 ie_len; 3098 u32 n_probes; 3099 struct wmi_mac_addr mac_addr; 3100 struct wmi_mac_addr mac_mask; 3101 u32 ie_bitmap[WMI_IE_BITMAP_SIZE]; 3102 u32 num_vendor_oui; 3103 u32 scan_ctrl_flags_ext; 3104 u32 dwell_time_active_2g; 3105 u32 dwell_time_active_6g; 3106 u32 dwell_time_passive_6g; 3107 u32 scan_start_offset; 3108 } __packed; 3109 3110 #define WMI_SCAN_FLAG_PASSIVE 0x1 3111 #define WMI_SCAN_ADD_BCAST_PROBE_REQ 0x2 3112 #define WMI_SCAN_ADD_CCK_RATES 0x4 3113 #define WMI_SCAN_ADD_OFDM_RATES 0x8 3114 #define WMI_SCAN_CHAN_STAT_EVENT 0x10 3115 #define WMI_SCAN_FILTER_PROBE_REQ 0x20 3116 #define WMI_SCAN_BYPASS_DFS_CHN 0x40 3117 #define WMI_SCAN_CONTINUE_ON_ERROR 0x80 3118 #define WMI_SCAN_FILTER_PROMISCUOS 0x100 3119 #define WMI_SCAN_FLAG_FORCE_ACTIVE_ON_DFS 0x200 3120 #define WMI_SCAN_ADD_TPC_IE_IN_PROBE_REQ 0x400 3121 #define WMI_SCAN_ADD_DS_IE_IN_PROBE_REQ 0x800 3122 #define WMI_SCAN_ADD_SPOOF_MAC_IN_PROBE_REQ 0x1000 3123 #define WMI_SCAN_OFFCHAN_MGMT_TX 0x2000 3124 #define WMI_SCAN_OFFCHAN_DATA_TX 0x4000 3125 #define WMI_SCAN_CAPTURE_PHY_ERROR 0x8000 3126 #define WMI_SCAN_FLAG_STRICT_PASSIVE_ON_PCHN 0x10000 3127 #define WMI_SCAN_FLAG_HALF_RATE_SUPPORT 0x20000 3128 #define WMI_SCAN_FLAG_QUARTER_RATE_SUPPORT 0x40000 3129 #define WMI_SCAN_RANDOM_SEQ_NO_IN_PROBE_REQ 0x80000 3130 #define WMI_SCAN_ENABLE_IE_WHTELIST_IN_PROBE_REQ 0x100000 3131 3132 #define WMI_SCAN_DWELL_MODE_MASK 0x00E00000 3133 #define WMI_SCAN_DWELL_MODE_SHIFT 21 3134 3135 enum { 3136 WMI_SCAN_DWELL_MODE_DEFAULT = 0, 3137 WMI_SCAN_DWELL_MODE_CONSERVATIVE = 1, 3138 WMI_SCAN_DWELL_MODE_MODERATE = 2, 3139 WMI_SCAN_DWELL_MODE_AGGRESSIVE = 3, 3140 WMI_SCAN_DWELL_MODE_STATIC = 4, 3141 }; 3142 3143 #define WMI_SCAN_SET_DWELL_MODE(flag, mode) \ 3144 ((flag) |= (((mode) << WMI_SCAN_DWELL_MODE_SHIFT) & \ 3145 WMI_SCAN_DWELL_MODE_MASK)) 3146 3147 struct hint_short_ssid { 3148 u32 freq_flags; 3149 u32 short_ssid; 3150 }; 3151 3152 struct hint_bssid { 3153 u32 freq_flags; 3154 struct wmi_mac_addr bssid; 3155 }; 3156 3157 struct scan_req_params { 3158 u32 scan_id; 3159 u32 scan_req_id; 3160 u32 vdev_id; 3161 u32 pdev_id; 3162 enum wmi_scan_priority scan_priority; 3163 union { 3164 struct { 3165 u32 scan_ev_started:1, 3166 scan_ev_completed:1, 3167 scan_ev_bss_chan:1, 3168 scan_ev_foreign_chan:1, 3169 scan_ev_dequeued:1, 3170 scan_ev_preempted:1, 3171 scan_ev_start_failed:1, 3172 scan_ev_restarted:1, 3173 scan_ev_foreign_chn_exit:1, 3174 scan_ev_invalid:1, 3175 scan_ev_gpio_timeout:1, 3176 scan_ev_suspended:1, 3177 scan_ev_resumed:1; 3178 }; 3179 u32 scan_events; 3180 }; 3181 u32 dwell_time_active; 3182 u32 dwell_time_active_2g; 3183 u32 dwell_time_passive; 3184 u32 dwell_time_active_6g; 3185 u32 dwell_time_passive_6g; 3186 u32 min_rest_time; 3187 u32 max_rest_time; 3188 u32 repeat_probe_time; 3189 u32 probe_spacing_time; 3190 u32 idle_time; 3191 u32 max_scan_time; 3192 u32 probe_delay; 3193 union { 3194 struct { 3195 u32 scan_f_passive:1, 3196 scan_f_bcast_probe:1, 3197 scan_f_cck_rates:1, 3198 scan_f_ofdm_rates:1, 3199 scan_f_chan_stat_evnt:1, 3200 scan_f_filter_prb_req:1, 3201 scan_f_bypass_dfs_chn:1, 3202 scan_f_continue_on_err:1, 3203 scan_f_offchan_mgmt_tx:1, 3204 scan_f_offchan_data_tx:1, 3205 scan_f_promisc_mode:1, 3206 scan_f_capture_phy_err:1, 3207 scan_f_strict_passive_pch:1, 3208 scan_f_half_rate:1, 3209 scan_f_quarter_rate:1, 3210 scan_f_force_active_dfs_chn:1, 3211 scan_f_add_tpc_ie_in_probe:1, 3212 scan_f_add_ds_ie_in_probe:1, 3213 scan_f_add_spoofed_mac_in_probe:1, 3214 scan_f_add_rand_seq_in_probe:1, 3215 scan_f_en_ie_whitelist_in_probe:1, 3216 scan_f_forced:1, 3217 scan_f_2ghz:1, 3218 scan_f_5ghz:1, 3219 scan_f_80mhz:1; 3220 }; 3221 u32 scan_flags; 3222 }; 3223 enum scan_dwelltime_adaptive_mode adaptive_dwell_time_mode; 3224 u32 burst_duration; 3225 u32 num_chan; 3226 u32 num_bssid; 3227 u32 num_ssids; 3228 u32 n_probes; 3229 u32 chan_list[WLAN_SCAN_MAX_NUM_CHANNELS]; 3230 u32 notify_scan_events; 3231 struct wlan_ssid ssid[WLAN_SCAN_MAX_NUM_SSID]; 3232 struct wmi_mac_addr bssid_list[WLAN_SCAN_MAX_NUM_BSSID]; 3233 struct element_info extraie; 3234 struct element_info htcap; 3235 struct element_info vhtcap; 3236 u32 num_hint_s_ssid; 3237 u32 num_hint_bssid; 3238 struct hint_short_ssid hint_s_ssid[WLAN_SCAN_MAX_HINT_S_SSID]; 3239 struct hint_bssid hint_bssid[WLAN_SCAN_MAX_HINT_BSSID]; 3240 }; 3241 3242 struct wmi_ssid_arg { 3243 int len; 3244 const u8 *ssid; 3245 }; 3246 3247 struct wmi_bssid_arg { 3248 const u8 *bssid; 3249 }; 3250 3251 struct wmi_start_scan_arg { 3252 u32 scan_id; 3253 u32 scan_req_id; 3254 u32 vdev_id; 3255 u32 scan_priority; 3256 u32 notify_scan_events; 3257 u32 dwell_time_active; 3258 u32 dwell_time_passive; 3259 u32 min_rest_time; 3260 u32 max_rest_time; 3261 u32 repeat_probe_time; 3262 u32 probe_spacing_time; 3263 u32 idle_time; 3264 u32 max_scan_time; 3265 u32 probe_delay; 3266 u32 scan_ctrl_flags; 3267 3268 u32 ie_len; 3269 u32 n_channels; 3270 u32 n_ssids; 3271 u32 n_bssids; 3272 3273 u8 ie[WLAN_SCAN_PARAMS_MAX_IE_LEN]; 3274 u32 channels[64]; 3275 struct wmi_ssid_arg ssids[WLAN_SCAN_PARAMS_MAX_SSID]; 3276 struct wmi_bssid_arg bssids[WLAN_SCAN_PARAMS_MAX_BSSID]; 3277 }; 3278 3279 #define WMI_SCAN_STOP_ONE 0x00000000 3280 #define WMI_SCN_STOP_VAP_ALL 0x01000000 3281 #define WMI_SCAN_STOP_ALL 0x04000000 3282 3283 /* Prefix 0xA000 indicates that the scan request 3284 * is trigger by HOST 3285 */ 3286 #define ATH11K_SCAN_ID 0xA000 3287 3288 enum scan_cancel_req_type { 3289 WLAN_SCAN_CANCEL_SINGLE = 1, 3290 WLAN_SCAN_CANCEL_VDEV_ALL, 3291 WLAN_SCAN_CANCEL_PDEV_ALL, 3292 }; 3293 3294 struct scan_cancel_param { 3295 u32 requester; 3296 u32 scan_id; 3297 enum scan_cancel_req_type req_type; 3298 u32 vdev_id; 3299 u32 pdev_id; 3300 }; 3301 3302 struct wmi_bcn_send_from_host_cmd { 3303 u32 tlv_header; 3304 u32 vdev_id; 3305 u32 data_len; 3306 union { 3307 u32 frag_ptr; 3308 u32 frag_ptr_lo; 3309 }; 3310 u32 frame_ctrl; 3311 u32 dtim_flag; 3312 u32 bcn_antenna; 3313 u32 frag_ptr_hi; 3314 }; 3315 3316 #define WMI_CHAN_INFO_MODE GENMASK(5, 0) 3317 #define WMI_CHAN_INFO_HT40_PLUS BIT(6) 3318 #define WMI_CHAN_INFO_PASSIVE BIT(7) 3319 #define WMI_CHAN_INFO_ADHOC_ALLOWED BIT(8) 3320 #define WMI_CHAN_INFO_AP_DISABLED BIT(9) 3321 #define WMI_CHAN_INFO_DFS BIT(10) 3322 #define WMI_CHAN_INFO_ALLOW_HT BIT(11) 3323 #define WMI_CHAN_INFO_ALLOW_VHT BIT(12) 3324 #define WMI_CHAN_INFO_CHAN_CHANGE_CAUSE_CSA BIT(13) 3325 #define WMI_CHAN_INFO_HALF_RATE BIT(14) 3326 #define WMI_CHAN_INFO_QUARTER_RATE BIT(15) 3327 #define WMI_CHAN_INFO_DFS_FREQ2 BIT(16) 3328 #define WMI_CHAN_INFO_ALLOW_HE BIT(17) 3329 #define WMI_CHAN_INFO_PSC BIT(18) 3330 3331 #define WMI_CHAN_REG_INFO1_MIN_PWR GENMASK(7, 0) 3332 #define WMI_CHAN_REG_INFO1_MAX_PWR GENMASK(15, 8) 3333 #define WMI_CHAN_REG_INFO1_MAX_REG_PWR GENMASK(23, 16) 3334 #define WMI_CHAN_REG_INFO1_REG_CLS GENMASK(31, 24) 3335 3336 #define WMI_CHAN_REG_INFO2_ANT_MAX GENMASK(7, 0) 3337 #define WMI_CHAN_REG_INFO2_MAX_TX_PWR GENMASK(15, 8) 3338 3339 struct wmi_channel { 3340 u32 tlv_header; 3341 u32 mhz; 3342 u32 band_center_freq1; 3343 u32 band_center_freq2; 3344 u32 info; 3345 u32 reg_info_1; 3346 u32 reg_info_2; 3347 } __packed; 3348 3349 struct wmi_mgmt_params { 3350 void *tx_frame; 3351 u16 frm_len; 3352 u8 vdev_id; 3353 u16 chanfreq; 3354 void *pdata; 3355 u16 desc_id; 3356 u8 *macaddr; 3357 }; 3358 3359 enum wmi_sta_ps_mode { 3360 WMI_STA_PS_MODE_DISABLED = 0, 3361 WMI_STA_PS_MODE_ENABLED = 1, 3362 }; 3363 3364 #define WMI_SMPS_MASK_LOWER_16BITS 0xFF 3365 #define WMI_SMPS_MASK_UPPER_3BITS 0x7 3366 #define WMI_SMPS_PARAM_VALUE_SHIFT 29 3367 3368 #define ATH11K_WMI_FW_HANG_ASSERT_TYPE 1 3369 #define ATH11K_WMI_FW_HANG_DELAY 0 3370 3371 /* type, 0:unused 1: ASSERT 2: not respond detect command 3372 * delay_time_ms, the simulate will delay time 3373 */ 3374 3375 struct wmi_force_fw_hang_cmd { 3376 u32 tlv_header; 3377 u32 type; 3378 u32 delay_time_ms; 3379 }; 3380 3381 struct wmi_vdev_set_param_cmd { 3382 u32 tlv_header; 3383 u32 vdev_id; 3384 u32 param_id; 3385 u32 param_value; 3386 } __packed; 3387 3388 enum wmi_stats_id { 3389 WMI_REQUEST_PEER_STAT = BIT(0), 3390 WMI_REQUEST_AP_STAT = BIT(1), 3391 WMI_REQUEST_PDEV_STAT = BIT(2), 3392 WMI_REQUEST_VDEV_STAT = BIT(3), 3393 WMI_REQUEST_BCNFLT_STAT = BIT(4), 3394 WMI_REQUEST_VDEV_RATE_STAT = BIT(5), 3395 WMI_REQUEST_INST_STAT = BIT(6), 3396 WMI_REQUEST_MIB_STAT = BIT(7), 3397 WMI_REQUEST_RSSI_PER_CHAIN_STAT = BIT(8), 3398 WMI_REQUEST_CONGESTION_STAT = BIT(9), 3399 WMI_REQUEST_PEER_EXTD_STAT = BIT(10), 3400 WMI_REQUEST_BCN_STAT = BIT(11), 3401 WMI_REQUEST_BCN_STAT_RESET = BIT(12), 3402 WMI_REQUEST_PEER_EXTD2_STAT = BIT(13), 3403 }; 3404 3405 struct wmi_request_stats_cmd { 3406 u32 tlv_header; 3407 enum wmi_stats_id stats_id; 3408 u32 vdev_id; 3409 struct wmi_mac_addr peer_macaddr; 3410 u32 pdev_id; 3411 } __packed; 3412 3413 struct wmi_get_pdev_temperature_cmd { 3414 u32 tlv_header; 3415 u32 param; 3416 u32 pdev_id; 3417 } __packed; 3418 3419 #define WMI_BEACON_TX_BUFFER_SIZE 512 3420 3421 struct wmi_bcn_tmpl_cmd { 3422 u32 tlv_header; 3423 u32 vdev_id; 3424 u32 tim_ie_offset; 3425 u32 buf_len; 3426 u32 csa_switch_count_offset; 3427 u32 ext_csa_switch_count_offset; 3428 u32 csa_event_bitmap; 3429 u32 mbssid_ie_offset; 3430 u32 esp_ie_offset; 3431 } __packed; 3432 3433 struct wmi_key_seq_counter { 3434 u32 key_seq_counter_l; 3435 u32 key_seq_counter_h; 3436 } __packed; 3437 3438 struct wmi_vdev_install_key_cmd { 3439 u32 tlv_header; 3440 u32 vdev_id; 3441 struct wmi_mac_addr peer_macaddr; 3442 u32 key_idx; 3443 u32 key_flags; 3444 u32 key_cipher; 3445 struct wmi_key_seq_counter key_rsc_counter; 3446 struct wmi_key_seq_counter key_global_rsc_counter; 3447 struct wmi_key_seq_counter key_tsc_counter; 3448 u8 wpi_key_rsc_counter[16]; 3449 u8 wpi_key_tsc_counter[16]; 3450 u32 key_len; 3451 u32 key_txmic_len; 3452 u32 key_rxmic_len; 3453 u32 is_group_key_id_valid; 3454 u32 group_key_id; 3455 3456 /* Followed by key_data containing key followed by 3457 * tx mic and then rx mic 3458 */ 3459 } __packed; 3460 3461 struct wmi_vdev_install_key_arg { 3462 u32 vdev_id; 3463 const u8 *macaddr; 3464 u32 key_idx; 3465 u32 key_flags; 3466 u32 key_cipher; 3467 u32 key_len; 3468 u32 key_txmic_len; 3469 u32 key_rxmic_len; 3470 u64 key_rsc_counter; 3471 const void *key_data; 3472 }; 3473 3474 #define WMI_MAX_SUPPORTED_RATES 128 3475 #define WMI_HOST_MAX_HECAP_PHY_SIZE 3 3476 #define WMI_HOST_MAX_HE_RATE_SET 3 3477 #define WMI_HECAP_TXRX_MCS_NSS_IDX_80 0 3478 #define WMI_HECAP_TXRX_MCS_NSS_IDX_160 1 3479 #define WMI_HECAP_TXRX_MCS_NSS_IDX_80_80 2 3480 3481 struct wmi_rate_set_arg { 3482 u32 num_rates; 3483 u8 rates[WMI_MAX_SUPPORTED_RATES]; 3484 }; 3485 3486 struct peer_assoc_params { 3487 struct wmi_mac_addr peer_macaddr; 3488 u32 vdev_id; 3489 u32 peer_new_assoc; 3490 u32 peer_associd; 3491 u32 peer_flags; 3492 u32 peer_caps; 3493 u32 peer_listen_intval; 3494 u32 peer_ht_caps; 3495 u32 peer_max_mpdu; 3496 u32 peer_mpdu_density; 3497 u32 peer_rate_caps; 3498 u32 peer_nss; 3499 u32 peer_vht_caps; 3500 u32 peer_phymode; 3501 u32 peer_ht_info[2]; 3502 struct wmi_rate_set_arg peer_legacy_rates; 3503 struct wmi_rate_set_arg peer_ht_rates; 3504 u32 rx_max_rate; 3505 u32 rx_mcs_set; 3506 u32 tx_max_rate; 3507 u32 tx_mcs_set; 3508 u8 vht_capable; 3509 u8 min_data_rate; 3510 u32 tx_max_mcs_nss; 3511 u32 peer_bw_rxnss_override; 3512 bool is_pmf_enabled; 3513 bool is_wme_set; 3514 bool qos_flag; 3515 bool apsd_flag; 3516 bool ht_flag; 3517 bool bw_40; 3518 bool bw_80; 3519 bool bw_160; 3520 bool stbc_flag; 3521 bool ldpc_flag; 3522 bool static_mimops_flag; 3523 bool dynamic_mimops_flag; 3524 bool spatial_mux_flag; 3525 bool vht_flag; 3526 bool vht_ng_flag; 3527 bool need_ptk_4_way; 3528 bool need_gtk_2_way; 3529 bool auth_flag; 3530 bool safe_mode_enabled; 3531 bool amsdu_disable; 3532 /* Use common structure */ 3533 u8 peer_mac[ETH_ALEN]; 3534 3535 bool he_flag; 3536 u32 peer_he_cap_macinfo[2]; 3537 u32 peer_he_cap_macinfo_internal; 3538 u32 peer_he_caps_6ghz; 3539 u32 peer_he_ops; 3540 u32 peer_he_cap_phyinfo[WMI_HOST_MAX_HECAP_PHY_SIZE]; 3541 u32 peer_he_mcs_count; 3542 u32 peer_he_rx_mcs_set[WMI_HOST_MAX_HE_RATE_SET]; 3543 u32 peer_he_tx_mcs_set[WMI_HOST_MAX_HE_RATE_SET]; 3544 bool twt_responder; 3545 bool twt_requester; 3546 struct ath11k_ppe_threshold peer_ppet; 3547 }; 3548 3549 struct wmi_peer_assoc_complete_cmd { 3550 u32 tlv_header; 3551 struct wmi_mac_addr peer_macaddr; 3552 u32 vdev_id; 3553 u32 peer_new_assoc; 3554 u32 peer_associd; 3555 u32 peer_flags; 3556 u32 peer_caps; 3557 u32 peer_listen_intval; 3558 u32 peer_ht_caps; 3559 u32 peer_max_mpdu; 3560 u32 peer_mpdu_density; 3561 u32 peer_rate_caps; 3562 u32 peer_nss; 3563 u32 peer_vht_caps; 3564 u32 peer_phymode; 3565 u32 peer_ht_info[2]; 3566 u32 num_peer_legacy_rates; 3567 u32 num_peer_ht_rates; 3568 u32 peer_bw_rxnss_override; 3569 struct wmi_ppe_threshold peer_ppet; 3570 u32 peer_he_cap_info; 3571 u32 peer_he_ops; 3572 u32 peer_he_cap_phy[WMI_MAX_HECAP_PHY_SIZE]; 3573 u32 peer_he_mcs; 3574 u32 peer_he_cap_info_ext; 3575 u32 peer_he_cap_info_internal; 3576 u32 min_data_rate; 3577 u32 peer_he_caps_6ghz; 3578 } __packed; 3579 3580 struct wmi_stop_scan_cmd { 3581 u32 tlv_header; 3582 u32 requestor; 3583 u32 scan_id; 3584 u32 req_type; 3585 u32 vdev_id; 3586 u32 pdev_id; 3587 }; 3588 3589 struct scan_chan_list_params { 3590 u32 pdev_id; 3591 u16 nallchans; 3592 struct channel_param ch_param[1]; 3593 }; 3594 3595 struct wmi_scan_chan_list_cmd { 3596 u32 tlv_header; 3597 u32 num_scan_chans; 3598 u32 flags; 3599 u32 pdev_id; 3600 } __packed; 3601 3602 #define WMI_MGMT_SEND_DOWNLD_LEN 64 3603 3604 #define WMI_TX_PARAMS_DWORD0_POWER GENMASK(7, 0) 3605 #define WMI_TX_PARAMS_DWORD0_MCS_MASK GENMASK(19, 8) 3606 #define WMI_TX_PARAMS_DWORD0_NSS_MASK GENMASK(27, 20) 3607 #define WMI_TX_PARAMS_DWORD0_RETRY_LIMIT GENMASK(31, 28) 3608 3609 #define WMI_TX_PARAMS_DWORD1_CHAIN_MASK GENMASK(7, 0) 3610 #define WMI_TX_PARAMS_DWORD1_BW_MASK GENMASK(14, 8) 3611 #define WMI_TX_PARAMS_DWORD1_PREAMBLE_TYPE GENMASK(19, 15) 3612 #define WMI_TX_PARAMS_DWORD1_FRAME_TYPE BIT(20) 3613 #define WMI_TX_PARAMS_DWORD1_RSVD GENMASK(31, 21) 3614 3615 struct wmi_mgmt_send_params { 3616 u32 tlv_header; 3617 u32 tx_params_dword0; 3618 u32 tx_params_dword1; 3619 }; 3620 3621 struct wmi_mgmt_send_cmd { 3622 u32 tlv_header; 3623 u32 vdev_id; 3624 u32 desc_id; 3625 u32 chanfreq; 3626 u32 paddr_lo; 3627 u32 paddr_hi; 3628 u32 frame_len; 3629 u32 buf_len; 3630 u32 tx_params_valid; 3631 3632 /* This TLV is followed by struct wmi_mgmt_frame */ 3633 3634 /* Followed by struct wmi_mgmt_send_params */ 3635 } __packed; 3636 3637 struct wmi_sta_powersave_mode_cmd { 3638 u32 tlv_header; 3639 u32 vdev_id; 3640 u32 sta_ps_mode; 3641 }; 3642 3643 struct wmi_sta_smps_force_mode_cmd { 3644 u32 tlv_header; 3645 u32 vdev_id; 3646 u32 forced_mode; 3647 }; 3648 3649 struct wmi_sta_smps_param_cmd { 3650 u32 tlv_header; 3651 u32 vdev_id; 3652 u32 param; 3653 u32 value; 3654 }; 3655 3656 struct wmi_bcn_prb_info { 3657 u32 tlv_header; 3658 u32 caps; 3659 u32 erp; 3660 } __packed; 3661 3662 enum { 3663 WMI_PDEV_SUSPEND, 3664 WMI_PDEV_SUSPEND_AND_DISABLE_INTR, 3665 }; 3666 3667 struct green_ap_ps_params { 3668 u32 value; 3669 }; 3670 3671 struct wmi_pdev_green_ap_ps_enable_cmd_param { 3672 u32 tlv_header; 3673 u32 pdev_id; 3674 u32 enable; 3675 }; 3676 3677 struct ap_ps_params { 3678 u32 vdev_id; 3679 u32 param; 3680 u32 value; 3681 }; 3682 3683 struct vdev_set_params { 3684 u32 if_id; 3685 u32 param_id; 3686 u32 param_value; 3687 }; 3688 3689 struct stats_request_params { 3690 u32 stats_id; 3691 u32 vdev_id; 3692 u32 pdev_id; 3693 }; 3694 3695 enum set_init_cc_type { 3696 WMI_COUNTRY_INFO_TYPE_ALPHA, 3697 WMI_COUNTRY_INFO_TYPE_COUNTRY_CODE, 3698 WMI_COUNTRY_INFO_TYPE_REGDOMAIN, 3699 }; 3700 3701 enum set_init_cc_flags { 3702 INVALID_CC, 3703 CC_IS_SET, 3704 REGDMN_IS_SET, 3705 ALPHA_IS_SET, 3706 }; 3707 3708 struct wmi_init_country_params { 3709 union { 3710 u16 country_code; 3711 u16 regdom_id; 3712 u8 alpha2[3]; 3713 } cc_info; 3714 enum set_init_cc_flags flags; 3715 }; 3716 3717 struct wmi_init_country_cmd { 3718 u32 tlv_header; 3719 u32 pdev_id; 3720 u32 init_cc_type; 3721 union { 3722 u32 country_code; 3723 u32 regdom_id; 3724 u32 alpha2; 3725 } cc_info; 3726 } __packed; 3727 3728 #define THERMAL_LEVELS 1 3729 struct tt_level_config { 3730 u32 tmplwm; 3731 u32 tmphwm; 3732 u32 dcoffpercent; 3733 u32 priority; 3734 }; 3735 3736 struct thermal_mitigation_params { 3737 u32 pdev_id; 3738 u32 enable; 3739 u32 dc; 3740 u32 dc_per_event; 3741 struct tt_level_config levelconf[THERMAL_LEVELS]; 3742 }; 3743 3744 struct wmi_therm_throt_config_request_cmd { 3745 u32 tlv_header; 3746 u32 pdev_id; 3747 u32 enable; 3748 u32 dc; 3749 u32 dc_per_event; 3750 u32 therm_throt_levels; 3751 } __packed; 3752 3753 struct wmi_therm_throt_level_config_info { 3754 u32 tlv_header; 3755 u32 temp_lwm; 3756 u32 temp_hwm; 3757 u32 dc_off_percent; 3758 u32 prio; 3759 } __packed; 3760 3761 struct wmi_delba_send_cmd { 3762 u32 tlv_header; 3763 u32 vdev_id; 3764 struct wmi_mac_addr peer_macaddr; 3765 u32 tid; 3766 u32 initiator; 3767 u32 reasoncode; 3768 } __packed; 3769 3770 struct wmi_addba_setresponse_cmd { 3771 u32 tlv_header; 3772 u32 vdev_id; 3773 struct wmi_mac_addr peer_macaddr; 3774 u32 tid; 3775 u32 statuscode; 3776 } __packed; 3777 3778 struct wmi_addba_send_cmd { 3779 u32 tlv_header; 3780 u32 vdev_id; 3781 struct wmi_mac_addr peer_macaddr; 3782 u32 tid; 3783 u32 buffersize; 3784 } __packed; 3785 3786 struct wmi_addba_clear_resp_cmd { 3787 u32 tlv_header; 3788 u32 vdev_id; 3789 struct wmi_mac_addr peer_macaddr; 3790 } __packed; 3791 3792 struct wmi_pdev_pktlog_filter_info { 3793 u32 tlv_header; 3794 struct wmi_mac_addr peer_macaddr; 3795 } __packed; 3796 3797 struct wmi_pdev_pktlog_filter_cmd { 3798 u32 tlv_header; 3799 u32 pdev_id; 3800 u32 enable; 3801 u32 filter_type; 3802 u32 num_mac; 3803 } __packed; 3804 3805 enum ath11k_wmi_pktlog_enable { 3806 ATH11K_WMI_PKTLOG_ENABLE_AUTO = 0, 3807 ATH11K_WMI_PKTLOG_ENABLE_FORCE = 1, 3808 }; 3809 3810 struct wmi_pktlog_enable_cmd { 3811 u32 tlv_header; 3812 u32 pdev_id; 3813 u32 evlist; /* WMI_PKTLOG_EVENT */ 3814 u32 enable; 3815 } __packed; 3816 3817 struct wmi_pktlog_disable_cmd { 3818 u32 tlv_header; 3819 u32 pdev_id; 3820 } __packed; 3821 3822 #define DFS_PHYERR_UNIT_TEST_CMD 0 3823 #define DFS_UNIT_TEST_MODULE 0x2b 3824 #define DFS_UNIT_TEST_TOKEN 0xAA 3825 3826 enum dfs_test_args_idx { 3827 DFS_TEST_CMDID = 0, 3828 DFS_TEST_PDEV_ID, 3829 DFS_TEST_RADAR_PARAM, 3830 DFS_MAX_TEST_ARGS, 3831 }; 3832 3833 struct wmi_dfs_unit_test_arg { 3834 u32 cmd_id; 3835 u32 pdev_id; 3836 u32 radar_param; 3837 }; 3838 3839 struct wmi_unit_test_cmd { 3840 u32 tlv_header; 3841 u32 vdev_id; 3842 u32 module_id; 3843 u32 num_args; 3844 u32 diag_token; 3845 /* Followed by test args*/ 3846 } __packed; 3847 3848 #define MAX_SUPPORTED_RATES 128 3849 3850 #define WMI_PEER_AUTH 0x00000001 3851 #define WMI_PEER_QOS 0x00000002 3852 #define WMI_PEER_NEED_PTK_4_WAY 0x00000004 3853 #define WMI_PEER_NEED_GTK_2_WAY 0x00000010 3854 #define WMI_PEER_HE 0x00000400 3855 #define WMI_PEER_APSD 0x00000800 3856 #define WMI_PEER_HT 0x00001000 3857 #define WMI_PEER_40MHZ 0x00002000 3858 #define WMI_PEER_STBC 0x00008000 3859 #define WMI_PEER_LDPC 0x00010000 3860 #define WMI_PEER_DYN_MIMOPS 0x00020000 3861 #define WMI_PEER_STATIC_MIMOPS 0x00040000 3862 #define WMI_PEER_SPATIAL_MUX 0x00200000 3863 #define WMI_PEER_TWT_REQ 0x00400000 3864 #define WMI_PEER_TWT_RESP 0x00800000 3865 #define WMI_PEER_VHT 0x02000000 3866 #define WMI_PEER_80MHZ 0x04000000 3867 #define WMI_PEER_PMF 0x08000000 3868 /* TODO: Place holder for WLAN_PEER_F_PS_PRESEND_REQUIRED = 0x10000000. 3869 * Need to be cleaned up 3870 */ 3871 #define WMI_PEER_IS_P2P_CAPABLE 0x20000000 3872 #define WMI_PEER_160MHZ 0x40000000 3873 #define WMI_PEER_SAFEMODE_EN 0x80000000 3874 3875 struct beacon_tmpl_params { 3876 u8 vdev_id; 3877 u32 tim_ie_offset; 3878 u32 tmpl_len; 3879 u32 tmpl_len_aligned; 3880 u32 csa_switch_count_offset; 3881 u32 ext_csa_switch_count_offset; 3882 u8 *frm; 3883 }; 3884 3885 struct wmi_rate_set { 3886 u32 num_rates; 3887 u32 rates[(MAX_SUPPORTED_RATES / 4) + 1]; 3888 }; 3889 3890 struct wmi_vht_rate_set { 3891 u32 tlv_header; 3892 u32 rx_max_rate; 3893 u32 rx_mcs_set; 3894 u32 tx_max_rate; 3895 u32 tx_mcs_set; 3896 u32 tx_max_mcs_nss; 3897 } __packed; 3898 3899 struct wmi_he_rate_set { 3900 u32 tlv_header; 3901 u32 rx_mcs_set; 3902 u32 tx_mcs_set; 3903 } __packed; 3904 3905 #define MAX_REG_RULES 10 3906 #define REG_ALPHA2_LEN 2 3907 3908 enum wmi_start_event_param { 3909 WMI_VDEV_START_RESP_EVENT = 0, 3910 WMI_VDEV_RESTART_RESP_EVENT, 3911 }; 3912 3913 struct wmi_vdev_start_resp_event { 3914 u32 vdev_id; 3915 u32 requestor_id; 3916 enum wmi_start_event_param resp_type; 3917 u32 status; 3918 u32 chain_mask; 3919 u32 smps_mode; 3920 union { 3921 u32 mac_id; 3922 u32 pdev_id; 3923 }; 3924 u32 cfgd_tx_streams; 3925 u32 cfgd_rx_streams; 3926 } __packed; 3927 3928 /* VDEV start response status codes */ 3929 enum wmi_vdev_start_resp_status_code { 3930 WMI_VDEV_START_RESPONSE_STATUS_SUCCESS = 0, 3931 WMI_VDEV_START_RESPONSE_INVALID_VDEVID = 1, 3932 WMI_VDEV_START_RESPONSE_NOT_SUPPORTED = 2, 3933 WMI_VDEV_START_RESPONSE_DFS_VIOLATION = 3, 3934 WMI_VDEV_START_RESPONSE_INVALID_REGDOMAIN = 4, 3935 }; 3936 3937 ; 3938 enum cc_setting_code { 3939 REG_SET_CC_STATUS_PASS = 0, 3940 REG_CURRENT_ALPHA2_NOT_FOUND = 1, 3941 REG_INIT_ALPHA2_NOT_FOUND = 2, 3942 REG_SET_CC_CHANGE_NOT_ALLOWED = 3, 3943 REG_SET_CC_STATUS_NO_MEMORY = 4, 3944 REG_SET_CC_STATUS_FAIL = 5, 3945 }; 3946 3947 /* Regaulatory Rule Flags Passed by FW */ 3948 #define REGULATORY_CHAN_DISABLED BIT(0) 3949 #define REGULATORY_CHAN_NO_IR BIT(1) 3950 #define REGULATORY_CHAN_RADAR BIT(3) 3951 #define REGULATORY_CHAN_NO_OFDM BIT(6) 3952 #define REGULATORY_CHAN_INDOOR_ONLY BIT(9) 3953 3954 #define REGULATORY_CHAN_NO_HT40 BIT(4) 3955 #define REGULATORY_CHAN_NO_80MHZ BIT(7) 3956 #define REGULATORY_CHAN_NO_160MHZ BIT(8) 3957 #define REGULATORY_CHAN_NO_20MHZ BIT(11) 3958 #define REGULATORY_CHAN_NO_10MHZ BIT(12) 3959 3960 enum { 3961 WMI_REG_SET_CC_STATUS_PASS = 0, 3962 WMI_REG_CURRENT_ALPHA2_NOT_FOUND = 1, 3963 WMI_REG_INIT_ALPHA2_NOT_FOUND = 2, 3964 WMI_REG_SET_CC_CHANGE_NOT_ALLOWED = 3, 3965 WMI_REG_SET_CC_STATUS_NO_MEMORY = 4, 3966 WMI_REG_SET_CC_STATUS_FAIL = 5, 3967 }; 3968 3969 struct cur_reg_rule { 3970 u16 start_freq; 3971 u16 end_freq; 3972 u16 max_bw; 3973 u8 reg_power; 3974 u8 ant_gain; 3975 u16 flags; 3976 }; 3977 3978 struct cur_regulatory_info { 3979 enum cc_setting_code status_code; 3980 u8 num_phy; 3981 u8 phy_id; 3982 u16 reg_dmn_pair; 3983 u16 ctry_code; 3984 u8 alpha2[REG_ALPHA2_LEN + 1]; 3985 u32 dfs_region; 3986 u32 phybitmap; 3987 u32 min_bw_2g; 3988 u32 max_bw_2g; 3989 u32 min_bw_5g; 3990 u32 max_bw_5g; 3991 u32 num_2g_reg_rules; 3992 u32 num_5g_reg_rules; 3993 struct cur_reg_rule *reg_rules_2g_ptr; 3994 struct cur_reg_rule *reg_rules_5g_ptr; 3995 }; 3996 3997 struct wmi_reg_chan_list_cc_event { 3998 u32 status_code; 3999 u32 phy_id; 4000 u32 alpha2; 4001 u32 num_phy; 4002 u32 country_id; 4003 u32 domain_code; 4004 u32 dfs_region; 4005 u32 phybitmap; 4006 u32 min_bw_2g; 4007 u32 max_bw_2g; 4008 u32 min_bw_5g; 4009 u32 max_bw_5g; 4010 u32 num_2g_reg_rules; 4011 u32 num_5g_reg_rules; 4012 } __packed; 4013 4014 struct wmi_regulatory_rule_struct { 4015 u32 tlv_header; 4016 u32 freq_info; 4017 u32 bw_pwr_info; 4018 u32 flag_info; 4019 }; 4020 4021 struct wmi_vdev_delete_resp_event { 4022 u32 vdev_id; 4023 } __packed; 4024 4025 struct wmi_peer_delete_resp_event { 4026 u32 vdev_id; 4027 struct wmi_mac_addr peer_macaddr; 4028 } __packed; 4029 4030 struct wmi_bcn_tx_status_event { 4031 u32 vdev_id; 4032 u32 tx_status; 4033 } __packed; 4034 4035 struct wmi_vdev_stopped_event { 4036 u32 vdev_id; 4037 } __packed; 4038 4039 struct wmi_pdev_bss_chan_info_event { 4040 u32 pdev_id; 4041 u32 freq; /* Units in MHz */ 4042 u32 noise_floor; /* units are dBm */ 4043 /* rx clear - how often the channel was unused */ 4044 u32 rx_clear_count_low; 4045 u32 rx_clear_count_high; 4046 /* cycle count - elapsed time during measured period, in clock ticks */ 4047 u32 cycle_count_low; 4048 u32 cycle_count_high; 4049 /* tx cycle count - elapsed time spent in tx, in clock ticks */ 4050 u32 tx_cycle_count_low; 4051 u32 tx_cycle_count_high; 4052 /* rx cycle count - elapsed time spent in rx, in clock ticks */ 4053 u32 rx_cycle_count_low; 4054 u32 rx_cycle_count_high; 4055 /*rx_cycle cnt for my bss in 64bits format */ 4056 u32 rx_bss_cycle_count_low; 4057 u32 rx_bss_cycle_count_high; 4058 } __packed; 4059 4060 #define WMI_VDEV_INSTALL_KEY_COMPL_STATUS_SUCCESS 0 4061 4062 struct wmi_vdev_install_key_compl_event { 4063 u32 vdev_id; 4064 struct wmi_mac_addr peer_macaddr; 4065 u32 key_idx; 4066 u32 key_flags; 4067 u32 status; 4068 } __packed; 4069 4070 struct wmi_vdev_install_key_complete_arg { 4071 u32 vdev_id; 4072 const u8 *macaddr; 4073 u32 key_idx; 4074 u32 key_flags; 4075 u32 status; 4076 }; 4077 4078 struct wmi_peer_assoc_conf_event { 4079 u32 vdev_id; 4080 struct wmi_mac_addr peer_macaddr; 4081 } __packed; 4082 4083 struct wmi_peer_assoc_conf_arg { 4084 u32 vdev_id; 4085 const u8 *macaddr; 4086 }; 4087 4088 struct wmi_fils_discovery_event { 4089 u32 vdev_id; 4090 u32 fils_tt; 4091 u32 tbtt; 4092 } __packed; 4093 4094 struct wmi_probe_resp_tx_status_event { 4095 u32 vdev_id; 4096 u32 tx_status; 4097 } __packed; 4098 4099 /* 4100 * PDEV statistics 4101 */ 4102 struct wmi_pdev_stats_base { 4103 s32 chan_nf; 4104 u32 tx_frame_count; /* Cycles spent transmitting frames */ 4105 u32 rx_frame_count; /* Cycles spent receiving frames */ 4106 u32 rx_clear_count; /* Total channel busy time, evidently */ 4107 u32 cycle_count; /* Total on-channel time */ 4108 u32 phy_err_count; 4109 u32 chan_tx_pwr; 4110 } __packed; 4111 4112 struct wmi_pdev_stats_extra { 4113 u32 ack_rx_bad; 4114 u32 rts_bad; 4115 u32 rts_good; 4116 u32 fcs_bad; 4117 u32 no_beacons; 4118 u32 mib_int_count; 4119 } __packed; 4120 4121 struct wmi_pdev_stats_tx { 4122 /* Num HTT cookies queued to dispatch list */ 4123 s32 comp_queued; 4124 4125 /* Num HTT cookies dispatched */ 4126 s32 comp_delivered; 4127 4128 /* Num MSDU queued to WAL */ 4129 s32 msdu_enqued; 4130 4131 /* Num MPDU queue to WAL */ 4132 s32 mpdu_enqued; 4133 4134 /* Num MSDUs dropped by WMM limit */ 4135 s32 wmm_drop; 4136 4137 /* Num Local frames queued */ 4138 s32 local_enqued; 4139 4140 /* Num Local frames done */ 4141 s32 local_freed; 4142 4143 /* Num queued to HW */ 4144 s32 hw_queued; 4145 4146 /* Num PPDU reaped from HW */ 4147 s32 hw_reaped; 4148 4149 /* Num underruns */ 4150 s32 underrun; 4151 4152 /* Num PPDUs cleaned up in TX abort */ 4153 s32 tx_abort; 4154 4155 /* Num MPDUs requed by SW */ 4156 s32 mpdus_requed; 4157 4158 /* excessive retries */ 4159 u32 tx_ko; 4160 4161 /* data hw rate code */ 4162 u32 data_rc; 4163 4164 /* Scheduler self triggers */ 4165 u32 self_triggers; 4166 4167 /* frames dropped due to excessive sw retries */ 4168 u32 sw_retry_failure; 4169 4170 /* illegal rate phy errors */ 4171 u32 illgl_rate_phy_err; 4172 4173 /* wal pdev continuous xretry */ 4174 u32 pdev_cont_xretry; 4175 4176 /* wal pdev tx timeouts */ 4177 u32 pdev_tx_timeout; 4178 4179 /* wal pdev resets */ 4180 u32 pdev_resets; 4181 4182 /* frames dropped due to non-availability of stateless TIDs */ 4183 u32 stateless_tid_alloc_failure; 4184 4185 /* PhY/BB underrun */ 4186 u32 phy_underrun; 4187 4188 /* MPDU is more than txop limit */ 4189 u32 txop_ovf; 4190 } __packed; 4191 4192 struct wmi_pdev_stats_rx { 4193 /* Cnts any change in ring routing mid-ppdu */ 4194 s32 mid_ppdu_route_change; 4195 4196 /* Total number of statuses processed */ 4197 s32 status_rcvd; 4198 4199 /* Extra frags on rings 0-3 */ 4200 s32 r0_frags; 4201 s32 r1_frags; 4202 s32 r2_frags; 4203 s32 r3_frags; 4204 4205 /* MSDUs / MPDUs delivered to HTT */ 4206 s32 htt_msdus; 4207 s32 htt_mpdus; 4208 4209 /* MSDUs / MPDUs delivered to local stack */ 4210 s32 loc_msdus; 4211 s32 loc_mpdus; 4212 4213 /* AMSDUs that have more MSDUs than the status ring size */ 4214 s32 oversize_amsdu; 4215 4216 /* Number of PHY errors */ 4217 s32 phy_errs; 4218 4219 /* Number of PHY errors drops */ 4220 s32 phy_err_drop; 4221 4222 /* Number of mpdu errors - FCS, MIC, ENC etc. */ 4223 s32 mpdu_errs; 4224 } __packed; 4225 4226 struct wmi_pdev_stats { 4227 struct wmi_pdev_stats_base base; 4228 struct wmi_pdev_stats_tx tx; 4229 struct wmi_pdev_stats_rx rx; 4230 } __packed; 4231 4232 #define WLAN_MAX_AC 4 4233 #define MAX_TX_RATE_VALUES 10 4234 #define MAX_TX_RATE_VALUES 10 4235 4236 struct wmi_vdev_stats { 4237 u32 vdev_id; 4238 u32 beacon_snr; 4239 u32 data_snr; 4240 u32 num_tx_frames[WLAN_MAX_AC]; 4241 u32 num_rx_frames; 4242 u32 num_tx_frames_retries[WLAN_MAX_AC]; 4243 u32 num_tx_frames_failures[WLAN_MAX_AC]; 4244 u32 num_rts_fail; 4245 u32 num_rts_success; 4246 u32 num_rx_err; 4247 u32 num_rx_discard; 4248 u32 num_tx_not_acked; 4249 u32 tx_rate_history[MAX_TX_RATE_VALUES]; 4250 u32 beacon_rssi_history[MAX_TX_RATE_VALUES]; 4251 } __packed; 4252 4253 struct wmi_bcn_stats { 4254 u32 vdev_id; 4255 u32 tx_bcn_succ_cnt; 4256 u32 tx_bcn_outage_cnt; 4257 } __packed; 4258 4259 struct wmi_stats_event { 4260 u32 stats_id; 4261 u32 num_pdev_stats; 4262 u32 num_vdev_stats; 4263 u32 num_peer_stats; 4264 u32 num_bcnflt_stats; 4265 u32 num_chan_stats; 4266 u32 num_mib_stats; 4267 u32 pdev_id; 4268 u32 num_bcn_stats; 4269 u32 num_peer_extd_stats; 4270 u32 num_peer_extd2_stats; 4271 } __packed; 4272 4273 struct wmi_pdev_ctl_failsafe_chk_event { 4274 u32 pdev_id; 4275 u32 ctl_failsafe_status; 4276 } __packed; 4277 4278 struct wmi_pdev_csa_switch_ev { 4279 u32 pdev_id; 4280 u32 current_switch_count; 4281 u32 num_vdevs; 4282 } __packed; 4283 4284 struct wmi_pdev_radar_ev { 4285 u32 pdev_id; 4286 u32 detection_mode; 4287 u32 chan_freq; 4288 u32 chan_width; 4289 u32 detector_id; 4290 u32 segment_id; 4291 u32 timestamp; 4292 u32 is_chirp; 4293 s32 freq_offset; 4294 s32 sidx; 4295 } __packed; 4296 4297 struct wmi_pdev_temperature_event { 4298 /* temperature value in Celcius degree */ 4299 s32 temp; 4300 u32 pdev_id; 4301 } __packed; 4302 4303 #define WMI_RX_STATUS_OK 0x00 4304 #define WMI_RX_STATUS_ERR_CRC 0x01 4305 #define WMI_RX_STATUS_ERR_DECRYPT 0x08 4306 #define WMI_RX_STATUS_ERR_MIC 0x10 4307 #define WMI_RX_STATUS_ERR_KEY_CACHE_MISS 0x20 4308 4309 #define WLAN_MGMT_TXRX_HOST_MAX_ANTENNA 4 4310 4311 struct mgmt_rx_event_params { 4312 u32 chan_freq; 4313 u32 channel; 4314 u32 snr; 4315 u8 rssi_ctl[WLAN_MGMT_TXRX_HOST_MAX_ANTENNA]; 4316 u32 rate; 4317 enum wmi_phy_mode phy_mode; 4318 u32 buf_len; 4319 int status; 4320 u32 flags; 4321 int rssi; 4322 u32 tsf_delta; 4323 u8 pdev_id; 4324 }; 4325 4326 #define ATH_MAX_ANTENNA 4 4327 4328 struct wmi_mgmt_rx_hdr { 4329 u32 channel; 4330 u32 snr; 4331 u32 rate; 4332 u32 phy_mode; 4333 u32 buf_len; 4334 u32 status; 4335 u32 rssi_ctl[ATH_MAX_ANTENNA]; 4336 u32 flags; 4337 int rssi; 4338 u32 tsf_delta; 4339 u32 rx_tsf_l32; 4340 u32 rx_tsf_u32; 4341 u32 pdev_id; 4342 u32 chan_freq; 4343 } __packed; 4344 4345 #define MAX_ANTENNA_EIGHT 8 4346 4347 struct wmi_rssi_ctl_ext { 4348 u32 tlv_header; 4349 u32 rssi_ctl_ext[MAX_ANTENNA_EIGHT - ATH_MAX_ANTENNA]; 4350 }; 4351 4352 struct wmi_mgmt_tx_compl_event { 4353 u32 desc_id; 4354 u32 status; 4355 u32 pdev_id; 4356 } __packed; 4357 4358 struct wmi_scan_event { 4359 u32 event_type; /* %WMI_SCAN_EVENT_ */ 4360 u32 reason; /* %WMI_SCAN_REASON_ */ 4361 u32 channel_freq; /* only valid for WMI_SCAN_EVENT_FOREIGN_CHANNEL */ 4362 u32 scan_req_id; 4363 u32 scan_id; 4364 u32 vdev_id; 4365 /* TSF Timestamp when the scan event (%WMI_SCAN_EVENT_) is completed 4366 * In case of AP it is TSF of the AP vdev 4367 * In case of STA connected state, this is the TSF of the AP 4368 * In case of STA not connected, it will be the free running HW timer 4369 */ 4370 u32 tsf_timestamp; 4371 } __packed; 4372 4373 struct wmi_peer_sta_kickout_arg { 4374 const u8 *mac_addr; 4375 }; 4376 4377 struct wmi_peer_sta_kickout_event { 4378 struct wmi_mac_addr peer_macaddr; 4379 } __packed; 4380 4381 enum wmi_roam_reason { 4382 WMI_ROAM_REASON_BETTER_AP = 1, 4383 WMI_ROAM_REASON_BEACON_MISS = 2, 4384 WMI_ROAM_REASON_LOW_RSSI = 3, 4385 WMI_ROAM_REASON_SUITABLE_AP_FOUND = 4, 4386 WMI_ROAM_REASON_HO_FAILED = 5, 4387 4388 /* keep last */ 4389 WMI_ROAM_REASON_MAX, 4390 }; 4391 4392 struct wmi_roam_event { 4393 u32 vdev_id; 4394 u32 reason; 4395 u32 rssi; 4396 } __packed; 4397 4398 #define WMI_CHAN_INFO_START_RESP 0 4399 #define WMI_CHAN_INFO_END_RESP 1 4400 4401 struct wmi_chan_info_event { 4402 u32 err_code; 4403 u32 freq; 4404 u32 cmd_flags; 4405 u32 noise_floor; 4406 u32 rx_clear_count; 4407 u32 cycle_count; 4408 u32 chan_tx_pwr_range; 4409 u32 chan_tx_pwr_tp; 4410 u32 rx_frame_count; 4411 u32 my_bss_rx_cycle_count; 4412 u32 rx_11b_mode_data_duration; 4413 u32 tx_frame_cnt; 4414 u32 mac_clk_mhz; 4415 u32 vdev_id; 4416 } __packed; 4417 4418 struct ath11k_targ_cap { 4419 u32 phy_capability; 4420 u32 max_frag_entry; 4421 u32 num_rf_chains; 4422 u32 ht_cap_info; 4423 u32 vht_cap_info; 4424 u32 vht_supp_mcs; 4425 u32 hw_min_tx_power; 4426 u32 hw_max_tx_power; 4427 u32 sys_cap_info; 4428 u32 min_pkt_size_enable; 4429 u32 max_bcn_ie_size; 4430 u32 max_num_scan_channels; 4431 u32 max_supported_macs; 4432 u32 wmi_fw_sub_feat_caps; 4433 u32 txrx_chainmask; 4434 u32 default_dbs_hw_mode_index; 4435 u32 num_msdu_desc; 4436 }; 4437 4438 enum wmi_vdev_type { 4439 WMI_VDEV_TYPE_AP = 1, 4440 WMI_VDEV_TYPE_STA = 2, 4441 WMI_VDEV_TYPE_IBSS = 3, 4442 WMI_VDEV_TYPE_MONITOR = 4, 4443 }; 4444 4445 enum wmi_vdev_subtype { 4446 WMI_VDEV_SUBTYPE_NONE, 4447 WMI_VDEV_SUBTYPE_P2P_DEVICE, 4448 WMI_VDEV_SUBTYPE_P2P_CLIENT, 4449 WMI_VDEV_SUBTYPE_P2P_GO, 4450 WMI_VDEV_SUBTYPE_PROXY_STA, 4451 WMI_VDEV_SUBTYPE_MESH_NON_11S, 4452 WMI_VDEV_SUBTYPE_MESH_11S, 4453 }; 4454 4455 enum wmi_sta_powersave_param { 4456 WMI_STA_PS_PARAM_RX_WAKE_POLICY = 0, 4457 WMI_STA_PS_PARAM_TX_WAKE_THRESHOLD = 1, 4458 WMI_STA_PS_PARAM_PSPOLL_COUNT = 2, 4459 WMI_STA_PS_PARAM_INACTIVITY_TIME = 3, 4460 WMI_STA_PS_PARAM_UAPSD = 4, 4461 }; 4462 4463 #define WMI_UAPSD_AC_TYPE_DELI 0 4464 #define WMI_UAPSD_AC_TYPE_TRIG 1 4465 4466 #define WMI_UAPSD_AC_BIT_MASK(ac, type) \ 4467 ((type == WMI_UAPSD_AC_TYPE_DELI) ? \ 4468 (1 << (ac << 1)) : (1 << ((ac << 1) + 1))) 4469 4470 enum wmi_sta_ps_param_uapsd { 4471 WMI_STA_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0), 4472 WMI_STA_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1), 4473 WMI_STA_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2), 4474 WMI_STA_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3), 4475 WMI_STA_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4), 4476 WMI_STA_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5), 4477 WMI_STA_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6), 4478 WMI_STA_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7), 4479 }; 4480 4481 #define WMI_STA_UAPSD_MAX_INTERVAL_MSEC UINT_MAX 4482 4483 struct wmi_sta_uapsd_auto_trig_param { 4484 u32 wmm_ac; 4485 u32 user_priority; 4486 u32 service_interval; 4487 u32 suspend_interval; 4488 u32 delay_interval; 4489 }; 4490 4491 struct wmi_sta_uapsd_auto_trig_cmd_fixed_param { 4492 u32 vdev_id; 4493 struct wmi_mac_addr peer_macaddr; 4494 u32 num_ac; 4495 }; 4496 4497 struct wmi_sta_uapsd_auto_trig_arg { 4498 u32 wmm_ac; 4499 u32 user_priority; 4500 u32 service_interval; 4501 u32 suspend_interval; 4502 u32 delay_interval; 4503 }; 4504 4505 enum wmi_sta_ps_param_tx_wake_threshold { 4506 WMI_STA_PS_TX_WAKE_THRESHOLD_NEVER = 0, 4507 WMI_STA_PS_TX_WAKE_THRESHOLD_ALWAYS = 1, 4508 4509 /* Values greater than one indicate that many TX attempts per beacon 4510 * interval before the STA will wake up 4511 */ 4512 }; 4513 4514 /* The maximum number of PS-Poll frames the FW will send in response to 4515 * traffic advertised in TIM before waking up (by sending a null frame with PS 4516 * = 0). Value 0 has a special meaning: there is no maximum count and the FW 4517 * will send as many PS-Poll as are necessary to retrieve buffered BU. This 4518 * parameter is used when the RX wake policy is 4519 * WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD and ignored when the RX wake 4520 * policy is WMI_STA_PS_RX_WAKE_POLICY_WAKE. 4521 */ 4522 enum wmi_sta_ps_param_pspoll_count { 4523 WMI_STA_PS_PSPOLL_COUNT_NO_MAX = 0, 4524 /* Values greater than 0 indicate the maximum numer of PS-Poll frames 4525 * FW will send before waking up. 4526 */ 4527 }; 4528 4529 /* U-APSD configuration of peer station from (re)assoc request and TSPECs */ 4530 enum wmi_ap_ps_param_uapsd { 4531 WMI_AP_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0), 4532 WMI_AP_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1), 4533 WMI_AP_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2), 4534 WMI_AP_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3), 4535 WMI_AP_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4), 4536 WMI_AP_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5), 4537 WMI_AP_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6), 4538 WMI_AP_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7), 4539 }; 4540 4541 /* U-APSD maximum service period of peer station */ 4542 enum wmi_ap_ps_peer_param_max_sp { 4543 WMI_AP_PS_PEER_PARAM_MAX_SP_UNLIMITED = 0, 4544 WMI_AP_PS_PEER_PARAM_MAX_SP_2 = 1, 4545 WMI_AP_PS_PEER_PARAM_MAX_SP_4 = 2, 4546 WMI_AP_PS_PEER_PARAM_MAX_SP_6 = 3, 4547 MAX_WMI_AP_PS_PEER_PARAM_MAX_SP, 4548 }; 4549 4550 enum wmi_ap_ps_peer_param { 4551 /** Set uapsd configuration for a given peer. 4552 * 4553 * This include the delivery and trigger enabled state for each AC. 4554 * The host MLME needs to set this based on AP capability and stations 4555 * request Set in the association request received from the station. 4556 * 4557 * Lower 8 bits of the value specify the UAPSD configuration. 4558 * 4559 * (see enum wmi_ap_ps_param_uapsd) 4560 * The default value is 0. 4561 */ 4562 WMI_AP_PS_PEER_PARAM_UAPSD = 0, 4563 4564 /** 4565 * Set the service period for a UAPSD capable station 4566 * 4567 * The service period from wme ie in the (re)assoc request frame. 4568 * 4569 * (see enum wmi_ap_ps_peer_param_max_sp) 4570 */ 4571 WMI_AP_PS_PEER_PARAM_MAX_SP = 1, 4572 4573 /** Time in seconds for aging out buffered frames 4574 * for STA in power save 4575 */ 4576 WMI_AP_PS_PEER_PARAM_AGEOUT_TIME = 2, 4577 4578 /** Specify frame types that are considered SIFS 4579 * RESP trigger frame 4580 */ 4581 WMI_AP_PS_PEER_PARAM_SIFS_RESP_FRMTYPE = 3, 4582 4583 /** Specifies the trigger state of TID. 4584 * Valid only for UAPSD frame type 4585 */ 4586 WMI_AP_PS_PEER_PARAM_SIFS_RESP_UAPSD = 4, 4587 4588 /* Specifies the WNM sleep state of a STA */ 4589 WMI_AP_PS_PEER_PARAM_WNM_SLEEP = 5, 4590 }; 4591 4592 #define DISABLE_SIFS_RESPONSE_TRIGGER 0 4593 4594 #define WMI_MAX_KEY_INDEX 3 4595 #define WMI_MAX_KEY_LEN 32 4596 4597 #define WMI_KEY_PAIRWISE 0x00 4598 #define WMI_KEY_GROUP 0x01 4599 4600 #define WMI_CIPHER_NONE 0x0 /* clear key */ 4601 #define WMI_CIPHER_WEP 0x1 4602 #define WMI_CIPHER_TKIP 0x2 4603 #define WMI_CIPHER_AES_OCB 0x3 4604 #define WMI_CIPHER_AES_CCM 0x4 4605 #define WMI_CIPHER_WAPI 0x5 4606 #define WMI_CIPHER_CKIP 0x6 4607 #define WMI_CIPHER_AES_CMAC 0x7 4608 #define WMI_CIPHER_ANY 0x8 4609 #define WMI_CIPHER_AES_GCM 0x9 4610 #define WMI_CIPHER_AES_GMAC 0xa 4611 4612 /* Value to disable fixed rate setting */ 4613 #define WMI_FIXED_RATE_NONE (0xffff) 4614 4615 #define ATH11K_RC_VERSION_OFFSET 28 4616 #define ATH11K_RC_PREAMBLE_OFFSET 8 4617 #define ATH11K_RC_NSS_OFFSET 5 4618 4619 #define ATH11K_HW_RATE_CODE(rate, nss, preamble) \ 4620 ((1 << ATH11K_RC_VERSION_OFFSET) | \ 4621 ((nss) << ATH11K_RC_NSS_OFFSET) | \ 4622 ((preamble) << ATH11K_RC_PREAMBLE_OFFSET) | \ 4623 (rate)) 4624 4625 /* Preamble types to be used with VDEV fixed rate configuration */ 4626 enum wmi_rate_preamble { 4627 WMI_RATE_PREAMBLE_OFDM, 4628 WMI_RATE_PREAMBLE_CCK, 4629 WMI_RATE_PREAMBLE_HT, 4630 WMI_RATE_PREAMBLE_VHT, 4631 WMI_RATE_PREAMBLE_HE, 4632 }; 4633 4634 /** 4635 * enum wmi_rtscts_prot_mode - Enable/Disable RTS/CTS and CTS2Self Protection. 4636 * @WMI_RTS_CTS_DISABLED : RTS/CTS protection is disabled. 4637 * @WMI_USE_RTS_CTS : RTS/CTS Enabled. 4638 * @WMI_USE_CTS2SELF : CTS to self protection Enabled. 4639 */ 4640 enum wmi_rtscts_prot_mode { 4641 WMI_RTS_CTS_DISABLED = 0, 4642 WMI_USE_RTS_CTS = 1, 4643 WMI_USE_CTS2SELF = 2, 4644 }; 4645 4646 /** 4647 * enum wmi_rtscts_profile - Selection of RTS CTS profile along with enabling 4648 * protection mode. 4649 * @WMI_RTSCTS_FOR_NO_RATESERIES - Neither of rate-series should use RTS-CTS 4650 * @WMI_RTSCTS_FOR_SECOND_RATESERIES - Only second rate-series will use RTS-CTS 4651 * @WMI_RTSCTS_ACROSS_SW_RETRIES - Only the second rate-series will use RTS-CTS, 4652 * but if there's a sw retry, both the rate 4653 * series will use RTS-CTS. 4654 * @WMI_RTSCTS_ERP - RTS/CTS used for ERP protection for every PPDU. 4655 * @WMI_RTSCTS_FOR_ALL_RATESERIES - Enable RTS-CTS for all rate series. 4656 */ 4657 enum wmi_rtscts_profile { 4658 WMI_RTSCTS_FOR_NO_RATESERIES = 0, 4659 WMI_RTSCTS_FOR_SECOND_RATESERIES = 1, 4660 WMI_RTSCTS_ACROSS_SW_RETRIES = 2, 4661 WMI_RTSCTS_ERP = 3, 4662 WMI_RTSCTS_FOR_ALL_RATESERIES = 4, 4663 }; 4664 4665 struct ath11k_hal_reg_cap { 4666 u32 eeprom_rd; 4667 u32 eeprom_rd_ext; 4668 u32 regcap1; 4669 u32 regcap2; 4670 u32 wireless_modes; 4671 u32 low_2ghz_chan; 4672 u32 high_2ghz_chan; 4673 u32 low_5ghz_chan; 4674 u32 high_5ghz_chan; 4675 }; 4676 4677 struct ath11k_mem_chunk { 4678 void *vaddr; 4679 dma_addr_t paddr; 4680 u32 len; 4681 u32 req_id; 4682 }; 4683 4684 #define WMI_SKB_HEADROOM sizeof(struct wmi_cmd_hdr) 4685 4686 enum wmi_sta_ps_param_rx_wake_policy { 4687 WMI_STA_PS_RX_WAKE_POLICY_WAKE = 0, 4688 WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD = 1, 4689 }; 4690 4691 /* Do not change existing values! Used by ath11k_frame_mode parameter 4692 * module parameter. 4693 */ 4694 enum ath11k_hw_txrx_mode { 4695 ATH11K_HW_TXRX_RAW = 0, 4696 ATH11K_HW_TXRX_NATIVE_WIFI = 1, 4697 ATH11K_HW_TXRX_ETHERNET = 2, 4698 }; 4699 4700 struct wmi_wmm_params { 4701 u32 tlv_header; 4702 u32 cwmin; 4703 u32 cwmax; 4704 u32 aifs; 4705 u32 txoplimit; 4706 u32 acm; 4707 u32 no_ack; 4708 } __packed; 4709 4710 struct wmi_wmm_params_arg { 4711 u8 acm; 4712 u8 aifs; 4713 u16 cwmin; 4714 u16 cwmax; 4715 u16 txop; 4716 u8 no_ack; 4717 }; 4718 4719 struct wmi_vdev_set_wmm_params_cmd { 4720 u32 tlv_header; 4721 u32 vdev_id; 4722 struct wmi_wmm_params wmm_params[4]; 4723 u32 wmm_param_type; 4724 } __packed; 4725 4726 struct wmi_wmm_params_all_arg { 4727 struct wmi_wmm_params_arg ac_be; 4728 struct wmi_wmm_params_arg ac_bk; 4729 struct wmi_wmm_params_arg ac_vi; 4730 struct wmi_wmm_params_arg ac_vo; 4731 }; 4732 4733 #define ATH11K_TWT_DEF_STA_CONG_TIMER_MS 5000 4734 #define ATH11K_TWT_DEF_DEFAULT_SLOT_SIZE 10 4735 #define ATH11K_TWT_DEF_CONGESTION_THRESH_SETUP 50 4736 #define ATH11K_TWT_DEF_CONGESTION_THRESH_TEARDOWN 20 4737 #define ATH11K_TWT_DEF_CONGESTION_THRESH_CRITICAL 100 4738 #define ATH11K_TWT_DEF_INTERFERENCE_THRESH_TEARDOWN 80 4739 #define ATH11K_TWT_DEF_INTERFERENCE_THRESH_SETUP 50 4740 #define ATH11K_TWT_DEF_MIN_NO_STA_SETUP 10 4741 #define ATH11K_TWT_DEF_MIN_NO_STA_TEARDOWN 2 4742 #define ATH11K_TWT_DEF_NO_OF_BCAST_MCAST_SLOTS 2 4743 #define ATH11K_TWT_DEF_MIN_NO_TWT_SLOTS 2 4744 #define ATH11K_TWT_DEF_MAX_NO_STA_TWT 500 4745 #define ATH11K_TWT_DEF_MODE_CHECK_INTERVAL 10000 4746 #define ATH11K_TWT_DEF_ADD_STA_SLOT_INTERVAL 1000 4747 #define ATH11K_TWT_DEF_REMOVE_STA_SLOT_INTERVAL 5000 4748 4749 struct wmi_twt_enable_params_cmd { 4750 u32 tlv_header; 4751 u32 pdev_id; 4752 u32 sta_cong_timer_ms; 4753 u32 mbss_support; 4754 u32 default_slot_size; 4755 u32 congestion_thresh_setup; 4756 u32 congestion_thresh_teardown; 4757 u32 congestion_thresh_critical; 4758 u32 interference_thresh_teardown; 4759 u32 interference_thresh_setup; 4760 u32 min_no_sta_setup; 4761 u32 min_no_sta_teardown; 4762 u32 no_of_bcast_mcast_slots; 4763 u32 min_no_twt_slots; 4764 u32 max_no_sta_twt; 4765 u32 mode_check_interval; 4766 u32 add_sta_slot_interval; 4767 u32 remove_sta_slot_interval; 4768 } __packed; 4769 4770 struct wmi_twt_disable_params_cmd { 4771 u32 tlv_header; 4772 u32 pdev_id; 4773 } __packed; 4774 4775 struct wmi_obss_spatial_reuse_params_cmd { 4776 u32 tlv_header; 4777 u32 pdev_id; 4778 u32 enable; 4779 s32 obss_min; 4780 s32 obss_max; 4781 u32 vdev_id; 4782 } __packed; 4783 4784 #define ATH11K_BSS_COLOR_COLLISION_SCAN_PERIOD_MS 200 4785 #define ATH11K_OBSS_COLOR_COLLISION_DETECTION_DISABLE 0 4786 #define ATH11K_OBSS_COLOR_COLLISION_DETECTION 1 4787 4788 #define ATH11K_BSS_COLOR_COLLISION_DETECTION_STA_PERIOD_MS 10000 4789 #define ATH11K_BSS_COLOR_COLLISION_DETECTION_AP_PERIOD_MS 5000 4790 4791 struct wmi_obss_color_collision_cfg_params_cmd { 4792 u32 tlv_header; 4793 u32 vdev_id; 4794 u32 flags; 4795 u32 evt_type; 4796 u32 current_bss_color; 4797 u32 detection_period_ms; 4798 u32 scan_period_ms; 4799 u32 free_slot_expiry_time_ms; 4800 } __packed; 4801 4802 struct wmi_bss_color_change_enable_params_cmd { 4803 u32 tlv_header; 4804 u32 vdev_id; 4805 u32 enable; 4806 } __packed; 4807 4808 #define ATH11K_IPV4_TH_SEED_SIZE 5 4809 #define ATH11K_IPV6_TH_SEED_SIZE 11 4810 4811 struct ath11k_wmi_pdev_lro_config_cmd { 4812 u32 tlv_header; 4813 u32 lro_enable; 4814 u32 res; 4815 u32 th_4[ATH11K_IPV4_TH_SEED_SIZE]; 4816 u32 th_6[ATH11K_IPV6_TH_SEED_SIZE]; 4817 u32 pdev_id; 4818 } __packed; 4819 4820 #define ATH11K_WMI_SPECTRAL_COUNT_DEFAULT 0 4821 #define ATH11K_WMI_SPECTRAL_PERIOD_DEFAULT 224 4822 #define ATH11K_WMI_SPECTRAL_PRIORITY_DEFAULT 1 4823 #define ATH11K_WMI_SPECTRAL_FFT_SIZE_DEFAULT 7 4824 #define ATH11K_WMI_SPECTRAL_GC_ENA_DEFAULT 1 4825 #define ATH11K_WMI_SPECTRAL_RESTART_ENA_DEFAULT 0 4826 #define ATH11K_WMI_SPECTRAL_NOISE_FLOOR_REF_DEFAULT -96 4827 #define ATH11K_WMI_SPECTRAL_INIT_DELAY_DEFAULT 80 4828 #define ATH11K_WMI_SPECTRAL_NB_TONE_THR_DEFAULT 12 4829 #define ATH11K_WMI_SPECTRAL_STR_BIN_THR_DEFAULT 8 4830 #define ATH11K_WMI_SPECTRAL_WB_RPT_MODE_DEFAULT 0 4831 #define ATH11K_WMI_SPECTRAL_RSSI_RPT_MODE_DEFAULT 0 4832 #define ATH11K_WMI_SPECTRAL_RSSI_THR_DEFAULT 0xf0 4833 #define ATH11K_WMI_SPECTRAL_PWR_FORMAT_DEFAULT 0 4834 #define ATH11K_WMI_SPECTRAL_RPT_MODE_DEFAULT 2 4835 #define ATH11K_WMI_SPECTRAL_BIN_SCALE_DEFAULT 1 4836 #define ATH11K_WMI_SPECTRAL_DBM_ADJ_DEFAULT 1 4837 #define ATH11K_WMI_SPECTRAL_CHN_MASK_DEFAULT 1 4838 4839 struct ath11k_wmi_vdev_spectral_conf_param { 4840 u32 vdev_id; 4841 u32 scan_count; 4842 u32 scan_period; 4843 u32 scan_priority; 4844 u32 scan_fft_size; 4845 u32 scan_gc_ena; 4846 u32 scan_restart_ena; 4847 u32 scan_noise_floor_ref; 4848 u32 scan_init_delay; 4849 u32 scan_nb_tone_thr; 4850 u32 scan_str_bin_thr; 4851 u32 scan_wb_rpt_mode; 4852 u32 scan_rssi_rpt_mode; 4853 u32 scan_rssi_thr; 4854 u32 scan_pwr_format; 4855 u32 scan_rpt_mode; 4856 u32 scan_bin_scale; 4857 u32 scan_dbm_adj; 4858 u32 scan_chn_mask; 4859 } __packed; 4860 4861 struct ath11k_wmi_vdev_spectral_conf_cmd { 4862 u32 tlv_header; 4863 struct ath11k_wmi_vdev_spectral_conf_param param; 4864 } __packed; 4865 4866 #define ATH11K_WMI_SPECTRAL_TRIGGER_CMD_TRIGGER 1 4867 #define ATH11K_WMI_SPECTRAL_TRIGGER_CMD_CLEAR 2 4868 #define ATH11K_WMI_SPECTRAL_ENABLE_CMD_ENABLE 1 4869 #define ATH11K_WMI_SPECTRAL_ENABLE_CMD_DISABLE 2 4870 4871 struct ath11k_wmi_vdev_spectral_enable_cmd { 4872 u32 tlv_header; 4873 u32 vdev_id; 4874 u32 trigger_cmd; 4875 u32 enable_cmd; 4876 } __packed; 4877 4878 struct ath11k_wmi_pdev_dma_ring_cfg_req_cmd { 4879 u32 tlv_header; 4880 u32 pdev_id; 4881 u32 module_id; /* see enum wmi_direct_buffer_module */ 4882 u32 base_paddr_lo; 4883 u32 base_paddr_hi; 4884 u32 head_idx_paddr_lo; 4885 u32 head_idx_paddr_hi; 4886 u32 tail_idx_paddr_lo; 4887 u32 tail_idx_paddr_hi; 4888 u32 num_elems; /* Number of elems in the ring */ 4889 u32 buf_size; /* size of allocated buffer in bytes */ 4890 4891 /* Number of wmi_dma_buf_release_entry packed together */ 4892 u32 num_resp_per_event; 4893 4894 /* Target should timeout and send whatever resp 4895 * it has if this time expires, units in milliseconds 4896 */ 4897 u32 event_timeout_ms; 4898 } __packed; 4899 4900 struct ath11k_wmi_dma_buf_release_fixed_param { 4901 u32 pdev_id; 4902 u32 module_id; 4903 u32 num_buf_release_entry; 4904 u32 num_meta_data_entry; 4905 } __packed; 4906 4907 struct wmi_dma_buf_release_entry { 4908 u32 tlv_header; 4909 u32 paddr_lo; 4910 4911 /* Bits 11:0: address of data 4912 * Bits 31:12: host context data 4913 */ 4914 u32 paddr_hi; 4915 } __packed; 4916 4917 #define WMI_SPECTRAL_META_INFO1_FREQ1 GENMASK(15, 0) 4918 #define WMI_SPECTRAL_META_INFO1_FREQ2 GENMASK(31, 16) 4919 4920 #define WMI_SPECTRAL_META_INFO2_CHN_WIDTH GENMASK(7, 0) 4921 4922 struct wmi_dma_buf_release_meta_data { 4923 u32 tlv_header; 4924 s32 noise_floor[WMI_MAX_CHAINS]; 4925 u32 reset_delay; 4926 u32 freq1; 4927 u32 freq2; 4928 u32 ch_width; 4929 } __packed; 4930 4931 enum wmi_fils_discovery_cmd_type { 4932 WMI_FILS_DISCOVERY_CMD, 4933 WMI_UNSOL_BCAST_PROBE_RESP, 4934 }; 4935 4936 struct wmi_fils_discovery_cmd { 4937 u32 tlv_header; 4938 u32 vdev_id; 4939 u32 interval; 4940 u32 config; /* enum wmi_fils_discovery_cmd_type */ 4941 } __packed; 4942 4943 struct wmi_fils_discovery_tmpl_cmd { 4944 u32 tlv_header; 4945 u32 vdev_id; 4946 u32 buf_len; 4947 } __packed; 4948 4949 struct wmi_probe_tmpl_cmd { 4950 u32 tlv_header; 4951 u32 vdev_id; 4952 u32 buf_len; 4953 } __packed; 4954 4955 struct target_resource_config { 4956 u32 num_vdevs; 4957 u32 num_peers; 4958 u32 num_active_peers; 4959 u32 num_offload_peers; 4960 u32 num_offload_reorder_buffs; 4961 u32 num_peer_keys; 4962 u32 num_tids; 4963 u32 ast_skid_limit; 4964 u32 tx_chain_mask; 4965 u32 rx_chain_mask; 4966 u32 rx_timeout_pri[4]; 4967 u32 rx_decap_mode; 4968 u32 scan_max_pending_req; 4969 u32 bmiss_offload_max_vdev; 4970 u32 roam_offload_max_vdev; 4971 u32 roam_offload_max_ap_profiles; 4972 u32 num_mcast_groups; 4973 u32 num_mcast_table_elems; 4974 u32 mcast2ucast_mode; 4975 u32 tx_dbg_log_size; 4976 u32 num_wds_entries; 4977 u32 dma_burst_size; 4978 u32 mac_aggr_delim; 4979 u32 rx_skip_defrag_timeout_dup_detection_check; 4980 u32 vow_config; 4981 u32 gtk_offload_max_vdev; 4982 u32 num_msdu_desc; 4983 u32 max_frag_entries; 4984 u32 max_peer_ext_stats; 4985 u32 smart_ant_cap; 4986 u32 bk_minfree; 4987 u32 be_minfree; 4988 u32 vi_minfree; 4989 u32 vo_minfree; 4990 u32 rx_batchmode; 4991 u32 tt_support; 4992 u32 atf_config; 4993 u32 iphdr_pad_config; 4994 u32 qwrap_config:16, 4995 alloc_frag_desc_for_data_pkt:16; 4996 u32 num_tdls_vdevs; 4997 u32 num_tdls_conn_table_entries; 4998 u32 beacon_tx_offload_max_vdev; 4999 u32 num_multicast_filter_entries; 5000 u32 num_wow_filters; 5001 u32 num_keep_alive_pattern; 5002 u32 keep_alive_pattern_size; 5003 u32 max_tdls_concurrent_sleep_sta; 5004 u32 max_tdls_concurrent_buffer_sta; 5005 u32 wmi_send_separate; 5006 u32 num_ocb_vdevs; 5007 u32 num_ocb_channels; 5008 u32 num_ocb_schedules; 5009 u32 num_ns_ext_tuples_cfg; 5010 u32 bpf_instruction_size; 5011 u32 max_bssid_rx_filters; 5012 u32 use_pdev_id; 5013 u32 peer_map_unmap_v2_support; 5014 u32 sched_params; 5015 u32 twt_ap_pdev_count; 5016 u32 twt_ap_sta_count; 5017 }; 5018 5019 #define WMI_MAX_MEM_REQS 32 5020 5021 #define MAX_RADIOS 3 5022 5023 #define WMI_SERVICE_READY_TIMEOUT_HZ (5 * HZ) 5024 #define WMI_SEND_TIMEOUT_HZ (3 * HZ) 5025 5026 struct ath11k_wmi_base { 5027 struct ath11k_base *ab; 5028 struct ath11k_pdev_wmi wmi[MAX_RADIOS]; 5029 enum ath11k_htc_ep_id wmi_endpoint_id[MAX_RADIOS]; 5030 u32 max_msg_len[MAX_RADIOS]; 5031 5032 struct completion service_ready; 5033 struct completion unified_ready; 5034 DECLARE_BITMAP(svc_map, WMI_MAX_EXT_SERVICE); 5035 wait_queue_head_t tx_credits_wq; 5036 const struct wmi_peer_flags_map *peer_flags; 5037 u32 num_mem_chunks; 5038 u32 rx_decap_mode; 5039 struct wmi_host_mem_chunk mem_chunks[WMI_MAX_MEM_REQS]; 5040 5041 enum wmi_host_hw_mode_config_type preferred_hw_mode; 5042 struct target_resource_config wlan_resource_config; 5043 5044 struct ath11k_targ_cap *targ_cap; 5045 }; 5046 5047 /* WOW structures */ 5048 enum wmi_wow_wakeup_event { 5049 WOW_BMISS_EVENT = 0, 5050 WOW_BETTER_AP_EVENT, 5051 WOW_DEAUTH_RECVD_EVENT, 5052 WOW_MAGIC_PKT_RECVD_EVENT, 5053 WOW_GTK_ERR_EVENT, 5054 WOW_FOURWAY_HSHAKE_EVENT, 5055 WOW_EAPOL_RECVD_EVENT, 5056 WOW_NLO_DETECTED_EVENT, 5057 WOW_DISASSOC_RECVD_EVENT, 5058 WOW_PATTERN_MATCH_EVENT, 5059 WOW_CSA_IE_EVENT, 5060 WOW_PROBE_REQ_WPS_IE_EVENT, 5061 WOW_AUTH_REQ_EVENT, 5062 WOW_ASSOC_REQ_EVENT, 5063 WOW_HTT_EVENT, 5064 WOW_RA_MATCH_EVENT, 5065 WOW_HOST_AUTO_SHUTDOWN_EVENT, 5066 WOW_IOAC_MAGIC_EVENT, 5067 WOW_IOAC_SHORT_EVENT, 5068 WOW_IOAC_EXTEND_EVENT, 5069 WOW_IOAC_TIMER_EVENT, 5070 WOW_DFS_PHYERR_RADAR_EVENT, 5071 WOW_BEACON_EVENT, 5072 WOW_CLIENT_KICKOUT_EVENT, 5073 WOW_EVENT_MAX, 5074 }; 5075 5076 enum wmi_wow_interface_cfg { 5077 WOW_IFACE_PAUSE_ENABLED, 5078 WOW_IFACE_PAUSE_DISABLED 5079 }; 5080 5081 #define C2S(x) case x: return #x 5082 5083 static inline const char *wow_wakeup_event(enum wmi_wow_wakeup_event ev) 5084 { 5085 switch (ev) { 5086 C2S(WOW_BMISS_EVENT); 5087 C2S(WOW_BETTER_AP_EVENT); 5088 C2S(WOW_DEAUTH_RECVD_EVENT); 5089 C2S(WOW_MAGIC_PKT_RECVD_EVENT); 5090 C2S(WOW_GTK_ERR_EVENT); 5091 C2S(WOW_FOURWAY_HSHAKE_EVENT); 5092 C2S(WOW_EAPOL_RECVD_EVENT); 5093 C2S(WOW_NLO_DETECTED_EVENT); 5094 C2S(WOW_DISASSOC_RECVD_EVENT); 5095 C2S(WOW_PATTERN_MATCH_EVENT); 5096 C2S(WOW_CSA_IE_EVENT); 5097 C2S(WOW_PROBE_REQ_WPS_IE_EVENT); 5098 C2S(WOW_AUTH_REQ_EVENT); 5099 C2S(WOW_ASSOC_REQ_EVENT); 5100 C2S(WOW_HTT_EVENT); 5101 C2S(WOW_RA_MATCH_EVENT); 5102 C2S(WOW_HOST_AUTO_SHUTDOWN_EVENT); 5103 C2S(WOW_IOAC_MAGIC_EVENT); 5104 C2S(WOW_IOAC_SHORT_EVENT); 5105 C2S(WOW_IOAC_EXTEND_EVENT); 5106 C2S(WOW_IOAC_TIMER_EVENT); 5107 C2S(WOW_DFS_PHYERR_RADAR_EVENT); 5108 C2S(WOW_BEACON_EVENT); 5109 C2S(WOW_CLIENT_KICKOUT_EVENT); 5110 C2S(WOW_EVENT_MAX); 5111 default: 5112 return NULL; 5113 } 5114 } 5115 5116 enum wmi_wow_wake_reason { 5117 WOW_REASON_UNSPECIFIED = -1, 5118 WOW_REASON_NLOD = 0, 5119 WOW_REASON_AP_ASSOC_LOST, 5120 WOW_REASON_LOW_RSSI, 5121 WOW_REASON_DEAUTH_RECVD, 5122 WOW_REASON_DISASSOC_RECVD, 5123 WOW_REASON_GTK_HS_ERR, 5124 WOW_REASON_EAP_REQ, 5125 WOW_REASON_FOURWAY_HS_RECV, 5126 WOW_REASON_TIMER_INTR_RECV, 5127 WOW_REASON_PATTERN_MATCH_FOUND, 5128 WOW_REASON_RECV_MAGIC_PATTERN, 5129 WOW_REASON_P2P_DISC, 5130 WOW_REASON_WLAN_HB, 5131 WOW_REASON_CSA_EVENT, 5132 WOW_REASON_PROBE_REQ_WPS_IE_RECV, 5133 WOW_REASON_AUTH_REQ_RECV, 5134 WOW_REASON_ASSOC_REQ_RECV, 5135 WOW_REASON_HTT_EVENT, 5136 WOW_REASON_RA_MATCH, 5137 WOW_REASON_HOST_AUTO_SHUTDOWN, 5138 WOW_REASON_IOAC_MAGIC_EVENT, 5139 WOW_REASON_IOAC_SHORT_EVENT, 5140 WOW_REASON_IOAC_EXTEND_EVENT, 5141 WOW_REASON_IOAC_TIMER_EVENT, 5142 WOW_REASON_ROAM_HO, 5143 WOW_REASON_DFS_PHYERR_RADADR_EVENT, 5144 WOW_REASON_BEACON_RECV, 5145 WOW_REASON_CLIENT_KICKOUT_EVENT, 5146 WOW_REASON_PAGE_FAULT = 0x3a, 5147 WOW_REASON_DEBUG_TEST = 0xFF, 5148 }; 5149 5150 static inline const char *wow_reason(enum wmi_wow_wake_reason reason) 5151 { 5152 switch (reason) { 5153 C2S(WOW_REASON_UNSPECIFIED); 5154 C2S(WOW_REASON_NLOD); 5155 C2S(WOW_REASON_AP_ASSOC_LOST); 5156 C2S(WOW_REASON_LOW_RSSI); 5157 C2S(WOW_REASON_DEAUTH_RECVD); 5158 C2S(WOW_REASON_DISASSOC_RECVD); 5159 C2S(WOW_REASON_GTK_HS_ERR); 5160 C2S(WOW_REASON_EAP_REQ); 5161 C2S(WOW_REASON_FOURWAY_HS_RECV); 5162 C2S(WOW_REASON_TIMER_INTR_RECV); 5163 C2S(WOW_REASON_PATTERN_MATCH_FOUND); 5164 C2S(WOW_REASON_RECV_MAGIC_PATTERN); 5165 C2S(WOW_REASON_P2P_DISC); 5166 C2S(WOW_REASON_WLAN_HB); 5167 C2S(WOW_REASON_CSA_EVENT); 5168 C2S(WOW_REASON_PROBE_REQ_WPS_IE_RECV); 5169 C2S(WOW_REASON_AUTH_REQ_RECV); 5170 C2S(WOW_REASON_ASSOC_REQ_RECV); 5171 C2S(WOW_REASON_HTT_EVENT); 5172 C2S(WOW_REASON_RA_MATCH); 5173 C2S(WOW_REASON_HOST_AUTO_SHUTDOWN); 5174 C2S(WOW_REASON_IOAC_MAGIC_EVENT); 5175 C2S(WOW_REASON_IOAC_SHORT_EVENT); 5176 C2S(WOW_REASON_IOAC_EXTEND_EVENT); 5177 C2S(WOW_REASON_IOAC_TIMER_EVENT); 5178 C2S(WOW_REASON_ROAM_HO); 5179 C2S(WOW_REASON_DFS_PHYERR_RADADR_EVENT); 5180 C2S(WOW_REASON_BEACON_RECV); 5181 C2S(WOW_REASON_CLIENT_KICKOUT_EVENT); 5182 C2S(WOW_REASON_PAGE_FAULT); 5183 C2S(WOW_REASON_DEBUG_TEST); 5184 default: 5185 return NULL; 5186 } 5187 } 5188 5189 #undef C2S 5190 5191 struct wmi_wow_enable_cmd { 5192 u32 tlv_header; 5193 u32 enable; 5194 u32 pause_iface_config; 5195 u32 flags; 5196 } __packed; 5197 5198 struct wmi_wow_host_wakeup_ind { 5199 u32 tlv_header; 5200 u32 reserved; 5201 } __packed; 5202 5203 struct wmi_wow_ev_arg { 5204 u32 vdev_id; 5205 u32 flag; 5206 enum wmi_wow_wake_reason wake_reason; 5207 u32 data_len; 5208 }; 5209 5210 int ath11k_wmi_cmd_send(struct ath11k_pdev_wmi *wmi, struct sk_buff *skb, 5211 u32 cmd_id); 5212 struct sk_buff *ath11k_wmi_alloc_skb(struct ath11k_wmi_base *wmi_sc, u32 len); 5213 int ath11k_wmi_mgmt_send(struct ath11k *ar, u32 vdev_id, u32 buf_id, 5214 struct sk_buff *frame); 5215 int ath11k_wmi_bcn_tmpl(struct ath11k *ar, u32 vdev_id, 5216 struct ieee80211_mutable_offsets *offs, 5217 struct sk_buff *bcn); 5218 int ath11k_wmi_vdev_down(struct ath11k *ar, u8 vdev_id); 5219 int ath11k_wmi_vdev_up(struct ath11k *ar, u32 vdev_id, u32 aid, 5220 const u8 *bssid); 5221 int ath11k_wmi_vdev_stop(struct ath11k *ar, u8 vdev_id); 5222 int ath11k_wmi_vdev_start(struct ath11k *ar, struct wmi_vdev_start_req_arg *arg, 5223 bool restart); 5224 int ath11k_wmi_set_peer_param(struct ath11k *ar, const u8 *peer_addr, 5225 u32 vdev_id, u32 param_id, u32 param_val); 5226 int ath11k_wmi_pdev_set_param(struct ath11k *ar, u32 param_id, 5227 u32 param_value, u8 pdev_id); 5228 int ath11k_wmi_pdev_set_ps_mode(struct ath11k *ar, int vdev_id, u32 enable); 5229 int ath11k_wmi_wait_for_unified_ready(struct ath11k_base *ab); 5230 int ath11k_wmi_cmd_init(struct ath11k_base *ab); 5231 int ath11k_wmi_wait_for_service_ready(struct ath11k_base *ab); 5232 int ath11k_wmi_connect(struct ath11k_base *ab); 5233 int ath11k_wmi_pdev_attach(struct ath11k_base *ab, 5234 u8 pdev_id); 5235 int ath11k_wmi_attach(struct ath11k_base *ab); 5236 void ath11k_wmi_detach(struct ath11k_base *ab); 5237 int ath11k_wmi_vdev_create(struct ath11k *ar, u8 *macaddr, 5238 struct vdev_create_params *param); 5239 int ath11k_wmi_peer_rx_reorder_queue_setup(struct ath11k *ar, int vdev_id, 5240 const u8 *addr, dma_addr_t paddr, 5241 u8 tid, u8 ba_window_size_valid, 5242 u32 ba_window_size); 5243 int ath11k_wmi_send_peer_create_cmd(struct ath11k *ar, 5244 struct peer_create_params *param); 5245 int ath11k_wmi_vdev_set_param_cmd(struct ath11k *ar, u32 vdev_id, 5246 u32 param_id, u32 param_value); 5247 5248 int ath11k_wmi_set_sta_ps_param(struct ath11k *ar, u32 vdev_id, 5249 u32 param, u32 param_value); 5250 int ath11k_wmi_force_fw_hang_cmd(struct ath11k *ar, u32 type, u32 delay_time_ms); 5251 int ath11k_wmi_send_peer_delete_cmd(struct ath11k *ar, 5252 const u8 *peer_addr, u8 vdev_id); 5253 int ath11k_wmi_vdev_delete(struct ath11k *ar, u8 vdev_id); 5254 void ath11k_wmi_start_scan_init(struct ath11k *ar, struct scan_req_params *arg); 5255 int ath11k_wmi_send_scan_start_cmd(struct ath11k *ar, 5256 struct scan_req_params *params); 5257 int ath11k_wmi_send_scan_stop_cmd(struct ath11k *ar, 5258 struct scan_cancel_param *param); 5259 int ath11k_wmi_send_wmm_update_cmd_tlv(struct ath11k *ar, u32 vdev_id, 5260 struct wmi_wmm_params_all_arg *param); 5261 int ath11k_wmi_pdev_suspend(struct ath11k *ar, u32 suspend_opt, 5262 u32 pdev_id); 5263 int ath11k_wmi_pdev_resume(struct ath11k *ar, u32 pdev_id); 5264 5265 int ath11k_wmi_send_peer_assoc_cmd(struct ath11k *ar, 5266 struct peer_assoc_params *param); 5267 int ath11k_wmi_vdev_install_key(struct ath11k *ar, 5268 struct wmi_vdev_install_key_arg *arg); 5269 int ath11k_wmi_pdev_bss_chan_info_request(struct ath11k *ar, 5270 enum wmi_bss_chan_info_req_type type); 5271 int ath11k_wmi_send_stats_request_cmd(struct ath11k *ar, 5272 struct stats_request_params *param); 5273 int ath11k_wmi_send_pdev_temperature_cmd(struct ath11k *ar); 5274 int ath11k_wmi_send_peer_flush_tids_cmd(struct ath11k *ar, 5275 u8 peer_addr[ETH_ALEN], 5276 struct peer_flush_params *param); 5277 int ath11k_wmi_send_set_ap_ps_param_cmd(struct ath11k *ar, u8 *peer_addr, 5278 struct ap_ps_params *param); 5279 int ath11k_wmi_send_scan_chan_list_cmd(struct ath11k *ar, 5280 struct scan_chan_list_params *chan_list); 5281 int ath11k_wmi_send_dfs_phyerr_offload_enable_cmd(struct ath11k *ar, 5282 u32 pdev_id); 5283 int ath11k_wmi_addba_clear_resp(struct ath11k *ar, u32 vdev_id, const u8 *mac); 5284 int ath11k_wmi_addba_send(struct ath11k *ar, u32 vdev_id, const u8 *mac, 5285 u32 tid, u32 buf_size); 5286 int ath11k_wmi_addba_set_resp(struct ath11k *ar, u32 vdev_id, const u8 *mac, 5287 u32 tid, u32 status); 5288 int ath11k_wmi_delba_send(struct ath11k *ar, u32 vdev_id, const u8 *mac, 5289 u32 tid, u32 initiator, u32 reason); 5290 int ath11k_wmi_send_bcn_offload_control_cmd(struct ath11k *ar, 5291 u32 vdev_id, u32 bcn_ctrl_op); 5292 int 5293 ath11k_wmi_send_init_country_cmd(struct ath11k *ar, 5294 struct wmi_init_country_params init_cc_param); 5295 int 5296 ath11k_wmi_send_thermal_mitigation_param_cmd(struct ath11k *ar, 5297 struct thermal_mitigation_params *param); 5298 int ath11k_wmi_pdev_pktlog_enable(struct ath11k *ar, u32 pktlog_filter); 5299 int ath11k_wmi_pdev_pktlog_disable(struct ath11k *ar); 5300 int ath11k_wmi_pdev_peer_pktlog_filter(struct ath11k *ar, u8 *addr, u8 enable); 5301 int 5302 ath11k_wmi_rx_reord_queue_remove(struct ath11k *ar, 5303 struct rx_reorder_queue_remove_params *param); 5304 int ath11k_wmi_send_pdev_set_regdomain(struct ath11k *ar, 5305 struct pdev_set_regdomain_params *param); 5306 int ath11k_wmi_pull_fw_stats(struct ath11k_base *ab, struct sk_buff *skb, 5307 struct ath11k_fw_stats *stats); 5308 size_t ath11k_wmi_fw_stats_num_peers(struct list_head *head); 5309 size_t ath11k_wmi_fw_stats_num_peers_extd(struct list_head *head); 5310 size_t ath11k_wmi_fw_stats_num_vdevs(struct list_head *head); 5311 void ath11k_wmi_fw_stats_fill(struct ath11k *ar, 5312 struct ath11k_fw_stats *fw_stats, u32 stats_id, 5313 char *buf); 5314 int ath11k_wmi_simulate_radar(struct ath11k *ar); 5315 int ath11k_wmi_send_twt_enable_cmd(struct ath11k *ar, u32 pdev_id); 5316 int ath11k_wmi_send_twt_disable_cmd(struct ath11k *ar, u32 pdev_id); 5317 int ath11k_wmi_send_obss_spr_cmd(struct ath11k *ar, u32 vdev_id, 5318 struct ieee80211_he_obss_pd *he_obss_pd); 5319 int ath11k_wmi_send_obss_color_collision_cfg_cmd(struct ath11k *ar, u32 vdev_id, 5320 u8 bss_color, u32 period, 5321 bool enable); 5322 int ath11k_wmi_send_bss_color_change_enable_cmd(struct ath11k *ar, u32 vdev_id, 5323 bool enable); 5324 int ath11k_wmi_pdev_lro_cfg(struct ath11k *ar, int pdev_id); 5325 int ath11k_wmi_pdev_dma_ring_cfg(struct ath11k *ar, 5326 struct ath11k_wmi_pdev_dma_ring_cfg_req_cmd *param); 5327 int ath11k_wmi_vdev_spectral_enable(struct ath11k *ar, u32 vdev_id, 5328 u32 trigger, u32 enable); 5329 int ath11k_wmi_vdev_spectral_conf(struct ath11k *ar, 5330 struct ath11k_wmi_vdev_spectral_conf_param *param); 5331 int ath11k_wmi_fils_discovery_tmpl(struct ath11k *ar, u32 vdev_id, 5332 struct sk_buff *tmpl); 5333 int ath11k_wmi_fils_discovery(struct ath11k *ar, u32 vdev_id, u32 interval, 5334 bool unsol_bcast_probe_resp_enabled); 5335 int ath11k_wmi_probe_resp_tmpl(struct ath11k *ar, u32 vdev_id, 5336 struct sk_buff *tmpl); 5337 int ath11k_wmi_set_hw_mode(struct ath11k_base *ab, 5338 enum wmi_host_hw_mode_config_type mode); 5339 int ath11k_wmi_wow_host_wakeup_ind(struct ath11k *ar); 5340 int ath11k_wmi_wow_enable(struct ath11k *ar); 5341 5342 #endif 5343